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From: Philippe W. <phi...@sk...> - 2015-07-22 21:42:57
|
On Wed, 2015-07-22 at 09:53 -0700, Carl E. Love wrote: > On Wed, 2015-07-22 at 17:43 +0100, Tom Hughes wrote: > > > > On Power 8, big endian > > > > > > gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR > > > #define PRIxPTR __PRIPTR_PREFIX "x" > > > > > > > > > So that seems to work on all of the platforms. > > > > From what Florian says you may get a different answer using g++ though, > > which is the issue here? > > Hmm, OK, I tried changing gcc to g++ > > g++ -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR > > I do get the same results. But there does seem to be some question on > what macros are supplied? Not sure about the answer to that question. Revision 15435 should fix the problem, tested on x86 and ppc64 (gcc110). Philippe |
|
From: <sv...@va...> - 2015-07-22 21:37:15
|
Author: philippe
Date: Wed Jul 22 22:37:06 2015
New Revision: 15435
Log:
Unbreak the build on several setups :
It looks like the standard says that
#define __STDC_FORMAT_MACROS
is needed in c++ in order to have PRIxPTR defined.
At least on gcc110 g++ 4.7.2, leak_cpp_interior.cpp
was not compiling.
Modified:
trunk/memcheck/tests/leak_cpp_interior.cpp
trunk/memcheck/tests/leak_cpp_interior.stderr.exp
trunk/memcheck/tests/leak_cpp_interior.stderr.exp-64bit
Modified: trunk/memcheck/tests/leak_cpp_interior.cpp
==============================================================================
--- trunk/memcheck/tests/leak_cpp_interior.cpp (original)
+++ trunk/memcheck/tests/leak_cpp_interior.cpp Wed Jul 22 22:37:06 2015
@@ -1,3 +1,4 @@
+#define __STDC_FORMAT_MACROS
#include <inttypes.h>
#include <stdio.h>
#include <unistd.h>
Modified: trunk/memcheck/tests/leak_cpp_interior.stderr.exp
==============================================================================
--- trunk/memcheck/tests/leak_cpp_interior.stderr.exp (original)
+++ trunk/memcheck/tests/leak_cpp_interior.stderr.exp Wed Jul 22 22:37:06 2015
@@ -2,8 +2,8 @@
valgrind output will go to log
VALGRIND_DO_LEAK_CHECK
4 bytes in 1 blocks are definitely lost in loss record ... of ...
- by 0x........: doit() (leak_cpp_interior.cpp:114)
- by 0x........: main (leak_cpp_interior.cpp:129)
+ by 0x........: doit() (leak_cpp_interior.cpp:115)
+ by 0x........: main (leak_cpp_interior.cpp:130)
LEAK SUMMARY:
definitely lost: 4 bytes in 1 blocks
Modified: trunk/memcheck/tests/leak_cpp_interior.stderr.exp-64bit
==============================================================================
--- trunk/memcheck/tests/leak_cpp_interior.stderr.exp-64bit (original)
+++ trunk/memcheck/tests/leak_cpp_interior.stderr.exp-64bit Wed Jul 22 22:37:06 2015
@@ -2,8 +2,8 @@
valgrind output will go to log
VALGRIND_DO_LEAK_CHECK
8 bytes in 1 blocks are definitely lost in loss record ... of ...
- by 0x........: doit() (leak_cpp_interior.cpp:114)
- by 0x........: main (leak_cpp_interior.cpp:129)
+ by 0x........: doit() (leak_cpp_interior.cpp:115)
+ by 0x........: main (leak_cpp_interior.cpp:130)
LEAK SUMMARY:
definitely lost: 8 bytes in 1 blocks
|
|
From: Florian K. <fl...@ei...> - 2015-07-22 20:45:52
|
When valgrind 3.10.0 was released in September 2014, the feature to attach a debugger using --db-attach was deprecated and scheduled to be removed in the next feature release. The rationale for deprecation is valgrind's built-in GDB server. Its capabilities are superior and it is also less brittle. Detailed documentation can be found here: http://valgrind.org/docs/manual/manual-core-adv.html#manual-core-adv.gdbserver This note is a gentle reminder of that upcoming change. We haven't heard any objections to the plan and *now* would be a good time to raise them, if there are any. Florian |
|
From: <sv...@va...> - 2015-07-22 18:56:03
|
Author: florian
Date: Wed Jul 22 19:55:49 2015
New Revision: 15434
Log:
Move prototype to the proper section.
Modified:
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/priv_aspacemgr.h
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/priv_aspacemgr.h
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/priv_aspacemgr.h (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/priv_aspacemgr.h Wed Jul 22 19:55:49 2015
@@ -125,6 +125,8 @@
extern
Bool ML_(am_resolve_filename) ( Int fd, /*OUT*/HChar* buf, Int nbuf );
+void ML_(am_show_len_concisely)( /*OUT*/HChar *buf, Addr start, Addr end );
+
/* ------ Implemented separately in aspacemgr-linux.c ------ */
/* Do a sanity check (/proc/self/maps sync check) */
@@ -157,7 +159,6 @@
/* ------ Implemented in aspacemgr-segments.c ------ */
void ML_(am_segments_init)( void );
void ML_(am_add_segment)( const NSegment *seg );
-void ML_(am_show_len_concisely)( /*OUT*/HChar *buf, Addr start, Addr end );
void ML_(am_show_segment_full)( Int logLevel, Int segNo, const NSegment *seg );
void ML_(am_change_permissions)( Addr start, SizeT len, UInt prot );
void ML_(am_clientise)( Addr start, SizeT len );
|
|
From: <sv...@va...> - 2015-07-22 18:54:32
|
Author: florian
Date: Wed Jul 22 19:54:21 2015
New Revision: 15433
Log:
Highlight inserted nore in graph. Makes for easier proof-reading.
Modified:
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/dot.c
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:27.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:28.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:31.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:32.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i14:16.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:45.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:60.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:61.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i17:24.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i19:41.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:54.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:60.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:61.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i2:27.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i30:60.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i31:32.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:58.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:61.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i38:46.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i39:46.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:27.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:6.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i4:21.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:22.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:25.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:18.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:19.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:27.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:24.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:27.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i8:49.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i9:30.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:30.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:60.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i20:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:100.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:40.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:80.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i25:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i31:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:100.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:80.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i60:80.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i70:100.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:10.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:100.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:20.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:60.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i20:30.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i40:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i51:100.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i0:20.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i40:50.dot
branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i80:100.dot
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/dot.c
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/dot.c (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/dot.c Wed Jul 22 19:54:21 2015
@@ -88,12 +88,11 @@
style = "filled";
fill_color = "grey";
}
-#if 0
if (node == inserted_node) {
style = "filled";
fill_color = "yellow";
}
-#endif
+
static char label[100]; // large enough
sprintf(label, "%ld:%ld", node->start, node->end);
write_node_aux(fp, node, label, color, shape,
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:27.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:27.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:27.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_61[label="0:61"];
N_0_31[label="0:31"];
N_0_28[label="0:28"][style="filled"][fillcolor="grey"];
-N_0_27[label="0:27"];
+N_0_27[label="0:27"][style="filled"][fillcolor="yellow"];
N_28_28[label="28:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:28.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:28.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:28.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_61[label="0:61"];
N_0_31[label="0:31"];
-N_0_28[label="0:28"];
+N_0_28[label="0:28"][style="filled"][fillcolor="yellow"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
N_32_58[label="32:58"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:31.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:31.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:31.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_61[label="0:61"];
-N_0_31[label="0:31"];
+N_0_31[label="0:31"][style="filled"][fillcolor="yellow"];
N_32_61[label="32:61"];
N_32_58[label="32:58"];
N_32_55[label="32:55"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:32.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:32.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:32.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_61[label="0:61"][style="filled"][fillcolor="grey"];
-N_0_32[label="0:32"];
+N_0_32[label="0:32"][style="filled"][fillcolor="yellow"];
N_33_61[label="33:61"];
N_33_34[label="33:34"];
N_35_61[label="35:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i0:50.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_61[label="0:61"][style="filled"][fillcolor="grey"];
-N_0_50[label="0:50"];
+N_0_50[label="0:50"][style="filled"][fillcolor="yellow"];
N_51_61[label="51:61"];
N_51_52[label="51:52"];
N_53_61[label="53:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i14:16.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i14:16.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i14:16.dot Wed Jul 22 19:54:21 2015
@@ -18,7 +18,7 @@
N_11_19[label="11:19"];
N_11_13[label="11:13"];
N_14_19[label="14:19"];
-N_14_16[label="14:16"];
+N_14_16[label="14:16"][style="filled"][fillcolor="yellow"];
N_17_19[label="17:19"];
N_20_22[label="20:22"];
N_23_25[label="23:25"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:45.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:45.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:45.dot Wed Jul 22 19:54:21 2015
@@ -15,7 +15,7 @@
N_8_10[label="8:10"];
N_11_13[label="11:13"];
N_14_14[label="14:14"];
-N_15_45[label="15:45"];
+N_15_45[label="15:45"][style="filled"][fillcolor="yellow"];
N_46_61[label="46:61"];
N_46_46[label="46:46"];
N_47_61[label="47:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:60.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:60.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:60.dot Wed Jul 22 19:54:21 2015
@@ -15,7 +15,7 @@
N_8_10[label="8:10"];
N_11_13[label="11:13"];
N_14_14[label="14:14"];
-N_15_60[label="15:60"];
+N_15_60[label="15:60"][style="filled"][fillcolor="yellow"];
N_61_61[label="61:61"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:61.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:61.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i15:61.dot Wed Jul 22 19:54:21 2015
@@ -14,7 +14,7 @@
N_8_10[label="8:10"];
N_11_13[label="11:13"];
N_14_14[label="14:14"];
-N_15_61[label="15:61"];
+N_15_61[label="15:61"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i17:24.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i17:24.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i17:24.dot Wed Jul 22 19:54:21 2015
@@ -18,7 +18,7 @@
N_8_10[label="8:10"];
N_11_13[label="11:13"];
N_14_16[label="14:16"];
-N_17_24[label="17:24"];
+N_17_24[label="17:24"][style="filled"][fillcolor="yellow"];
N_25_25[label="25:25"];
N_26_28[label="26:28"];
N_29_31[label="29:31"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i19:41.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i19:41.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i19:41.dot Wed Jul 22 19:54:21 2015
@@ -17,7 +17,7 @@
N_11_13[label="11:13"];
N_14_16[label="14:16"];
N_17_18[label="17:18"];
-N_19_41[label="19:41"];
+N_19_41[label="19:41"][style="filled"][fillcolor="yellow"];
N_42_61[label="42:61"];
N_42_43[label="42:43"];
N_44_61[label="44:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:50.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_61[label="0:61"][style="filled"][fillcolor="grey"];
N_0_50[label="0:50"];
N_0_0[label="0:0"];
-N_1_50[label="1:50"];
+N_1_50[label="1:50"][style="filled"][fillcolor="yellow"];
N_51_61[label="51:61"];
N_51_52[label="51:52"];
N_53_61[label="53:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:54.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:54.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:54.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_61[label="0:61"][style="filled"][fillcolor="grey"];
N_0_54[label="0:54"];
N_0_0[label="0:0"];
-N_1_54[label="1:54"];
+N_1_54[label="1:54"][style="filled"][fillcolor="yellow"];
N_55_61[label="55:61"];
N_55_55[label="55:55"];
N_56_61[label="56:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:60.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:60.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:60.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_61[label="0:61"][style="filled"][fillcolor="grey"];
N_0_60[label="0:60"];
N_0_0[label="0:0"];
-N_1_60[label="1:60"];
+N_1_60[label="1:60"][style="filled"][fillcolor="yellow"];
N_61_61[label="61:61"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:61.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:61.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i1:61.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_61[label="0:61"][style="filled"][fillcolor="grey"];
N_0_0[label="0:0"];
-N_1_61[label="1:61"];
+N_1_61[label="1:61"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i2:27.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i2:27.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i2:27.dot Wed Jul 22 19:54:21 2015
@@ -7,7 +7,7 @@
N_0_28[label="0:28"][style="filled"][fillcolor="grey"];
N_0_27[label="0:27"];
N_0_1[label="0:1"];
-N_2_27[label="2:27"];
+N_2_27[label="2:27"][style="filled"][fillcolor="yellow"];
N_28_28[label="28:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i30:60.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i30:60.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i30:60.dot Wed Jul 22 19:54:21 2015
@@ -25,7 +25,7 @@
N_23_25[label="23:25"];
N_26_28[label="26:28"];
N_29_29[label="29:29"];
-N_30_60[label="30:60"];
+N_30_60[label="30:60"][style="filled"][fillcolor="yellow"];
N_61_61[label="61:61"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i31:32.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i31:32.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i31:32.dot Wed Jul 22 19:54:21 2015
@@ -25,7 +25,7 @@
N_23_25[label="23:25"];
N_26_28[label="26:28"];
N_29_30[label="29:30"];
-N_31_32[label="31:32"];
+N_31_32[label="31:32"][style="filled"][fillcolor="yellow"];
N_33_61[label="33:61"];
N_33_34[label="33:34"];
N_35_61[label="35:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:58.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:58.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:58.dot Wed Jul 22 19:54:21 2015
@@ -25,7 +25,7 @@
N_26_28[label="26:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
-N_32_58[label="32:58"];
+N_32_58[label="32:58"][style="filled"][fillcolor="yellow"];
N_59_61[label="59:61"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:61.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:61.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i32:61.dot Wed Jul 22 19:54:21 2015
@@ -24,7 +24,7 @@
N_23_25[label="23:25"];
N_26_28[label="26:28"];
N_29_31[label="29:31"];
-N_32_61[label="32:61"];
+N_32_61[label="32:61"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i38:46.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i38:46.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i38:46.dot Wed Jul 22 19:54:21 2015
@@ -32,7 +32,7 @@
N_35_52[label="35:52"];
N_35_37[label="35:37"];
N_38_52[label="38:52"][style="filled"][fillcolor="grey"];
-N_38_46[label="38:46"];
+N_38_46[label="38:46"][style="filled"][fillcolor="yellow"];
N_47_52[label="47:52"];
N_47_49[label="47:49"];
N_50_52[label="50:52"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i39:46.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i39:46.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i39:46.dot Wed Jul 22 19:54:21 2015
@@ -34,7 +34,7 @@
N_38_52[label="38:52"][style="filled"][fillcolor="grey"];
N_38_46[label="38:46"];
N_38_38[label="38:38"];
-N_39_46[label="39:46"];
+N_39_46[label="39:46"][style="filled"][fillcolor="yellow"];
N_47_52[label="47:52"];
N_47_49[label="47:49"];
N_50_52[label="50:52"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:27.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:27.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:27.dot Wed Jul 22 19:54:21 2015
@@ -7,7 +7,7 @@
N_0_28[label="0:28"][style="filled"][fillcolor="grey"];
N_0_27[label="0:27"];
N_0_2[label="0:2"];
-N_3_27[label="3:27"];
+N_3_27[label="3:27"][style="filled"][fillcolor="yellow"];
N_28_28[label="28:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:6.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:6.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i3:6.dot Wed Jul 22 19:54:21 2015
@@ -8,7 +8,7 @@
N_0_25[label="0:25"];
N_0_2[label="0:2"];
N_3_25[label="3:25"][style="filled"][fillcolor="grey"];
-N_3_6[label="3:6"];
+N_3_6[label="3:6"][style="filled"][fillcolor="yellow"];
N_7_25[label="7:25"];
N_7_7[label="7:7"];
N_8_25[label="8:25"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i4:21.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i4:21.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i4:21.dot Wed Jul 22 19:54:21 2015
@@ -10,7 +10,7 @@
N_3_25[label="3:25"][style="filled"][fillcolor="grey"];
N_3_21[label="3:21"];
N_3_3[label="3:3"];
-N_4_21[label="4:21"];
+N_4_21[label="4:21"][style="filled"][fillcolor="yellow"];
N_22_25[label="22:25"];
N_22_22[label="22:22"];
N_23_25[label="23:25"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:22.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:22.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:22.dot Wed Jul 22 19:54:21 2015
@@ -10,7 +10,7 @@
N_3_25[label="3:25"];
N_3_4[label="3:4"];
N_5_25[label="5:25"];
-N_5_22[label="5:22"];
+N_5_22[label="5:22"][style="filled"][fillcolor="yellow"];
N_23_25[label="23:25"];
N_26_28[label="26:28"];
N_29_31[label="29:31"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:25.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:25.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i5:25.dot Wed Jul 22 19:54:21 2015
@@ -9,7 +9,7 @@
N_0_2[label="0:2"];
N_3_25[label="3:25"];
N_3_4[label="3:4"];
-N_5_25[label="5:25"];
+N_5_25[label="5:25"][style="filled"][fillcolor="yellow"];
N_26_28[label="26:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:18.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:18.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:18.dot Wed Jul 22 19:54:21 2015
@@ -14,7 +14,7 @@
N_5_19[label="5:19"][style="filled"][fillcolor="grey"];
N_5_18[label="5:18"];
N_5_5[label="5:5"];
-N_6_18[label="6:18"];
+N_6_18[label="6:18"][style="filled"][fillcolor="yellow"];
N_19_19[label="19:19"];
N_20_22[label="20:22"];
N_23_25[label="23:25"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:19.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:19.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:19.dot Wed Jul 22 19:54:21 2015
@@ -13,7 +13,7 @@
N_5_22[label="5:22"];
N_5_19[label="5:19"][style="filled"][fillcolor="grey"];
N_5_5[label="5:5"];
-N_6_19[label="6:19"];
+N_6_19[label="6:19"][style="filled"][fillcolor="yellow"];
N_20_22[label="20:22"];
N_23_25[label="23:25"];
N_26_28[label="26:28"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:27.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:27.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i6:27.dot Wed Jul 22 19:54:21 2015
@@ -11,7 +11,7 @@
N_0_2[label="0:2"];
N_3_4[label="3:4"];
N_5_5[label="5:5"];
-N_6_27[label="6:27"];
+N_6_27[label="6:27"][style="filled"][fillcolor="yellow"];
N_28_28[label="28:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:24.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:24.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:24.dot Wed Jul 22 19:54:21 2015
@@ -12,7 +12,7 @@
N_5_25[label="5:25"][style="filled"][fillcolor="grey"];
N_5_24[label="5:24"];
N_5_6[label="5:6"];
-N_7_24[label="7:24"];
+N_7_24[label="7:24"][style="filled"][fillcolor="yellow"];
N_25_25[label="25:25"];
N_26_28[label="26:28"];
N_29_31[label="29:31"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:27.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:27.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i7:27.dot Wed Jul 22 19:54:21 2015
@@ -11,7 +11,7 @@
N_0_2[label="0:2"];
N_3_4[label="3:4"];
N_5_6[label="5:6"];
-N_7_27[label="7:27"];
+N_7_27[label="7:27"][style="filled"][fillcolor="yellow"];
N_28_28[label="28:28"];
N_29_31[label="29:31"];
N_32_61[label="32:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i8:49.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i8:49.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i8:49.dot Wed Jul 22 19:54:21 2015
@@ -9,7 +9,7 @@
N_0_2[label="0:2"];
N_3_4[label="3:4"];
N_5_7[label="5:7"];
-N_8_49[label="8:49"];
+N_8_49[label="8:49"][style="filled"][fillcolor="yellow"];
N_50_61[label="50:61"];
N_50_52[label="50:52"];
N_53_61[label="53:61"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i9:30.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i9:30.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/big-i9:30.dot Wed Jul 22 19:54:21 2015
@@ -12,7 +12,7 @@
N_3_4[label="3:4"];
N_5_7[label="5:7"];
N_8_8[label="8:8"];
-N_9_30[label="9:30"];
+N_9_30[label="9:30"][style="filled"][fillcolor="yellow"];
N_31_31[label="31:31"];
N_32_61[label="32:61"];
N_32_58[label="32:58"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:30.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:30.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:30.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_100[label="0:100"];
N_0_50[label="0:50"][style="filled"][fillcolor="grey"];
-N_0_30[label="0:30"];
+N_0_30[label="0:30"][style="filled"][fillcolor="yellow"];
N_31_50[label="31:50"];
N_51_100[label="51:100"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:50.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_100[label="0:100"];
-N_0_50[label="0:50"];
+N_0_50[label="0:50"][style="filled"][fillcolor="yellow"];
N_51_100[label="51:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:60.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:60.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i0:60.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
-N_0_60[label="0:60"];
+N_0_60[label="0:60"][style="filled"][fillcolor="yellow"];
N_61_100[label="61:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i20:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i20:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i20:50.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_100[label="0:100"];
N_0_50[label="0:50"][style="filled"][fillcolor="grey"];
N_0_19[label="0:19"];
-N_20_50[label="20:50"];
+N_20_50[label="20:50"][style="filled"][fillcolor="yellow"];
N_51_100[label="51:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:100.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:100.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:100.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
N_0_29[label="0:29"];
-N_30_100[label="30:100"];
+N_30_100[label="30:100"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:40.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:40.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:40.dot Wed Jul 22 19:54:21 2015
@@ -6,7 +6,7 @@
N_0_50[label="0:50"][style="filled"][fillcolor="grey"];
N_0_29[label="0:29"];
N_30_50[label="30:50"];
-N_30_40[label="30:40"];
+N_30_40[label="30:40"][style="filled"][fillcolor="yellow"];
N_41_50[label="41:50"];
N_51_100[label="51:100"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:80.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:80.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l1-i30:80.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
N_0_80[label="0:80"];
N_0_29[label="0:29"];
-N_30_80[label="30:80"];
+N_30_80[label="30:80"][style="filled"][fillcolor="yellow"];
N_81_100[label="81:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i25:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i25:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i25:50.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_20_50[label="20:50"][style="filled"][fillcolor="grey"];
N_20_24[label="20:24"];
-N_25_50[label="25:50"];
+N_25_50[label="25:50"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i31:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i31:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/l2-i31:50.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_20_50[label="20:50"][style="filled"][fillcolor="grey"];
N_20_30[label="20:30"];
-N_31_50[label="31:50"];
+N_31_50[label="31:50"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:100.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:100.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:100.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_100[label="0:100"];
N_0_50[label="0:50"];
-N_51_100[label="51:100"];
+N_51_100[label="51:100"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:80.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:80.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i51:80.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_100[label="0:100"];
N_0_50[label="0:50"];
N_51_100[label="51:100"][style="filled"][fillcolor="grey"];
-N_51_80[label="51:80"];
+N_51_80[label="51:80"][style="filled"][fillcolor="yellow"];
N_81_100[label="81:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i60:80.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i60:80.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i60:80.dot Wed Jul 22 19:54:21 2015
@@ -7,7 +7,7 @@
N_51_100[label="51:100"][style="filled"][fillcolor="grey"];
N_51_59[label="51:59"];
N_60_100[label="60:100"];
-N_60_80[label="60:80"];
+N_60_80[label="60:80"][style="filled"][fillcolor="yellow"];
N_81_100[label="81:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i70:100.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i70:100.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r1-i70:100.dot Wed Jul 22 19:54:21 2015
@@ -6,7 +6,7 @@
N_0_50[label="0:50"];
N_51_100[label="51:100"][style="filled"][fillcolor="grey"];
N_51_69[label="51:69"];
-N_70_100[label="70:100"];
+N_70_100[label="70:100"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:10.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:10.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:10.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
-N_0_10[label="0:10"];
+N_0_10[label="0:10"][style="filled"][fillcolor="yellow"];
N_11_100[label="11:100"];
N_11_50[label="11:50"];
N_51_100[label="51:100"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i0:50.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
-N_0_50[label="0:50"];
+N_0_50[label="0:50"][style="filled"][fillcolor="yellow"];
N_51_100[label="51:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:100.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:100.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:100.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_100[label="0:100"];
N_0_9[label="0:9"];
-N_10_100[label="10:100"];
+N_10_100[label="10:100"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:20.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:20.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:20.dot Wed Jul 22 19:54:21 2015
@@ -6,7 +6,7 @@
N_0_9[label="0:9"];
N_10_100[label="10:100"];
N_10_50[label="10:50"][style="filled"][fillcolor="grey"];
-N_10_20[label="10:20"];
+N_10_20[label="10:20"][style="filled"][fillcolor="yellow"];
N_21_50[label="21:50"];
N_51_100[label="51:100"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:50.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_100[label="0:100"];
N_0_9[label="0:9"];
N_10_100[label="10:100"];
-N_10_50[label="10:50"];
+N_10_50[label="10:50"][style="filled"][fillcolor="yellow"];
N_51_100[label="51:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:60.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:60.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i10:60.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_100[label="0:100"];
N_0_9[label="0:9"];
N_10_100[label="10:100"][style="filled"][fillcolor="grey"];
-N_10_60[label="10:60"];
+N_10_60[label="10:60"][style="filled"][fillcolor="yellow"];
N_61_100[label="61:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i20:30.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i20:30.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i20:30.dot Wed Jul 22 19:54:21 2015
@@ -8,7 +8,7 @@
N_10_50[label="10:50"][style="filled"][fillcolor="grey"];
N_10_19[label="10:19"];
N_20_50[label="20:50"];
-N_20_30[label="20:30"];
+N_20_30[label="20:30"][style="filled"][fillcolor="yellow"];
N_31_50[label="31:50"];
N_51_100[label="51:100"];
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i40:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i40:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i40:50.dot Wed Jul 22 19:54:21 2015
@@ -7,7 +7,7 @@
N_10_100[label="10:100"];
N_10_50[label="10:50"][style="filled"][fillcolor="grey"];
N_10_39[label="10:39"];
-N_40_50[label="40:50"];
+N_40_50[label="40:50"][style="filled"][fillcolor="yellow"];
N_51_100[label="51:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i51:100.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i51:100.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/r2-i51:100.dot Wed Jul 22 19:54:21 2015
@@ -6,7 +6,7 @@
N_0_9[label="0:9"];
N_10_100[label="10:100"];
N_10_50[label="10:50"];
-N_51_100[label="51:100"];
+N_51_100[label="51:100"][style="filled"][fillcolor="yellow"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i0:20.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i0:20.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i0:20.dot Wed Jul 22 19:54:21 2015
@@ -3,7 +3,7 @@
/* Nodes */
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
-N_0_20[label="0:20"];
+N_0_20[label="0:20"][style="filled"][fillcolor="yellow"];
N_21_100[label="21:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i40:50.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i40:50.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i40:50.dot Wed Jul 22 19:54:21 2015
@@ -5,7 +5,7 @@
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
N_0_39[label="0:39"];
N_40_100[label="40:100"];
-N_40_50[label="40:50"];
+N_40_50[label="40:50"][style="filled"][fillcolor="yellow"];
N_51_100[label="51:100"];
/* Edges */
Modified: branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i80:100.dot
==============================================================================
--- branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i80:100.dot (original)
+++ branches/ASPACEM_TWEAKS/coregrind/m_aspacemgr/unit-test/tests/golden/root-i80:100.dot Wed Jul 22 19:54:21 2015
@@ -4,7 +4,7 @@
N_0_100[label="0:100"][style="filled"][fillcolor="grey"];
N_0_79[label="0:79"];
-N_80_100[label="80:100"];
+N_80_100[label="80:100"][style="filled"][fillcolor="yellow"];
/* Edges */
|
|
From: Carl E. L. <ce...@us...> - 2015-07-22 16:53:41
|
On Wed, 2015-07-22 at 17:43 +0100, Tom Hughes wrote:
> > On Power 8, big endian
> >
> > gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR
> > #define PRIxPTR __PRIPTR_PREFIX "x"
> >
> >
> > So that seems to work on all of the platforms.
>
> From what Florian says you may get a different answer using g++ though,
> which is the issue here?
Hmm, OK, I tried changing gcc to g++
g++ -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR
I do get the same results. But there does seem to be some question on
what macros are supplied? Not sure about the answer to that question.
Carl Love
|
|
From: Tom H. <to...@co...> - 2015-07-22 16:43:18
|
On 22/07/15 17:41, Carl E. Love wrote: > I tested the change suggested by Ivo and the compile test from Tom. > > On Wed, 2015-07-22 at 17:18 +0100, Tom Hughes wrote: >> gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR > > On Power 7, big endian: > > gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR > #define PRIxPTR __PRIPTR_PREFIX "x" > > > On Power 8, little endian: > > gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR > #define PRIxPTR __PRIPTR_PREFIX "x" > > On Power 8, big endian > > gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR > #define PRIxPTR __PRIPTR_PREFIX "x" > > > So that seems to work on all of the platforms. From what Florian says you may get a different answer using g++ though, which is the issue here? Tom -- Tom Hughes (to...@co...) http://compton.nu/ |
|
From: Carl E. L. <ce...@us...> - 2015-07-22 16:41:23
|
Tom, Ivo:
I tested the change suggested by Ivo and the compile test from Tom.
On Wed, 2015-07-22 at 17:18 +0100, Tom Hughes wrote:
> gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR
On Power 7, big endian:
gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR
#define PRIxPTR __PRIPTR_PREFIX "x"
On Power 8, little endian:
gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR
#define PRIxPTR __PRIPTR_PREFIX "x"
On Power 8, big endian
gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR
#define PRIxPTR __PRIPTR_PREFIX "x"
So that seems to work on all of the platforms.
I have also tested the fix suggested by Ivo Raisr
+ sprintf(who_points_at_cmd, "who_points_at %#llx 20",
+ (unsigned long long) (char*)ptr - sizeof(void*));
The change also compiles successfully. The regression tests run but I
get an additional error on the leak_cpp_interior test.
== 614 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/leak_cpp_interior (stderr)
helgrind/tests/tc20_verifywrap (stderr)
So, it looks like either fix will take care of the compiling issue. We still have an issue with the testcase.
The test case output is as follows:
--- leak_cpp_interior.stderr.exp-64bit 2015-07-22 09:38:34.383232305 -0500
+++ leak_cpp_interior.stderr.out 2015-07-22 11:17:44.028761872 -0500
@@ -2,8 +2,8 @@
valgrind output will go to log
VALGRIND_DO_LEAK_CHECK
8 bytes in 1 blocks are definitely lost in loss record ... of ...
- by 0x........: doit() (leak_cpp_interior.cpp:114)
- by 0x........: main (leak_cpp_interior.cpp:129)
+ by 0x........: doit() (leak_cpp_interior.cpp:123)
+ by 0x........: main (leak_cpp_interior.cpp:138)
Looks like the error is just due to the fact that the code has changed causing the line number to change. That
should be an easy fix.
Carl Love
|
|
From: Patrick J. L. <lop...@gm...> - 2015-07-22 16:37:17
|
On Wed, Jul 22, 2015 at 9:21 AM, Florian Krohm <fl...@ei...> wrote: > C99 says on page 197, footnote 2, that C++ programs must explicitly > define __STDC__FORMAT_MACROS to get the format macros. Ditto for > the limit macros. C99 also says the intptr_t and uintptr_t typedefs are optional (section 7.18.1.4). Modern POSIX (http://pubs.opengroup.org/stage7tc1/basedefs/inttypes.h.html and http://pubs.opengroup.org/stage7tc1/basedefs/stdint.h.html) requires uintptr_t for XSI conformance, and it does not say anything about defining any macros to get the definitions. Although it does not contemplate C++ at all... C++11 has uintptr_t as optional and technically puts these macros in <cinttypes>. - Pat |
|
From: Tom H. <to...@co...> - 2015-07-22 16:25:50
|
On 22/07/15 16:34, Carl E. Love wrote: > The Solaris support was recently added in Valgrind commit 15426. It > included the following change: > > Index: memcheck/tests/leak_cpp_interior.cpp > =================================================================== > --- memcheck/tests/leak_cpp_interior.cpp (revision 15425) > +++ memcheck/tests/leak_cpp_interior.cpp (revision 15426) > @@ -1,3 +1,4 @@ > +#include <inttypes.h> > #include <stdio.h> > #include <unistd.h> > #include <stdint.h> > @@ -107,7 +108,8 @@ > > // prepare the who_points_at cmd we will run. > // Do it here to avoid having ptr or its exterior ptr kept in a register. > - sprintf(who_points_at_cmd, "who_points_at %p 20", (char*)ptr - sizeof(void*)); > + sprintf(who_points_at_cmd, "who_points_at %#" PRIxPTR " 20", > + (uintptr_t) (char*)ptr - sizeof(void*)); > > ptr2 = new MyClass[0]; // "interior but exterior ptr". > // ptr2 points after the chunk, is wrongly considered by memcheck as definitely leaked. > > > The change doesn't seem to compile on a PPC64 Power 7 Big endian > machine. I haven't check the other PPC64 platforms yet. I saw that the > nightly regression test had failed. I did a fresh pull of the code and > tried compiling and verified that I see the compile failure. I then > reverted the change locally and was able to get the compile to > successfully complete. The regression test also runs but as expected we > get an additional failure on that particular test. > > I am not much of a C++ programmer so I am not sure what the correct fix > should be for this issue. If you can take a look at it I would > appreciate it. Let me know if I can help out testing a fix. Thanks. Well what is the error it is reporting? Tom -- Tom Hughes (to...@co...) http://compton.nu/ |
|
From: Florian K. <fl...@ei...> - 2015-07-22 16:21:55
|
C99 says on page 197, footnote 2, that C++ programs must explicitly define __STDC__FORMAT_MACROS to get the format macros. Ditto for the limit macros. */ #ifdef __cplusplus # ifndef __STDC_FORMAT_MACROS # define __STDC_FORMAT_MACROS # endif # ifndef __STDC_LIMIT_MACROS # define __STDC_LIMIT_MACROS # endif #endif #include <inttypes.h> Florian On 22.07.2015 17:34, Carl E. Love wrote: > Julian: > > The Solaris support was recently added in Valgrind commit 15426. It > included the following change: > > Index: memcheck/tests/leak_cpp_interior.cpp > =================================================================== > --- memcheck/tests/leak_cpp_interior.cpp (revision 15425) > +++ memcheck/tests/leak_cpp_interior.cpp (revision 15426) > @@ -1,3 +1,4 @@ > +#include <inttypes.h> > #include <stdio.h> > #include <unistd.h> > #include <stdint.h> > @@ -107,7 +108,8 @@ > > // prepare the who_points_at cmd we will run. > // Do it here to avoid having ptr or its exterior ptr kept in a register. > - sprintf(who_points_at_cmd, "who_points_at %p 20", (char*)ptr - sizeof(void*)); > + sprintf(who_points_at_cmd, "who_points_at %#" PRIxPTR " 20", > + (uintptr_t) (char*)ptr - sizeof(void*)); > > ptr2 = new MyClass[0]; // "interior but exterior ptr". > // ptr2 points after the chunk, is wrongly considered by memcheck as definitely leaked. > > > The change doesn't seem to compile on a PPC64 Power 7 Big endian > machine. I haven't check the other PPC64 platforms yet. I saw that the > nightly regression test had failed. I did a fresh pull of the code and > tried compiling and verified that I see the compile failure. I then > reverted the change locally and was able to get the compile to > successfully complete. The regression test also runs but as expected we > get an additional failure on that particular test. > > I am not much of a C++ programmer so I am not sure what the correct fix > should be for this issue. If you can take a look at it I would > appreciate it. Let me know if I can help out testing a fix. Thanks. > > Carl Love > > > ------------------------------------------------------------------------------ > _______________________________________________ > Valgrind-developers mailing list > Val...@li... > https://lists.sourceforge.net/lists/listinfo/valgrind-developers > |
|
From: Tom H. <to...@co...> - 2015-07-22 16:18:50
|
On 22/07/15 17:11, Carl E. Love wrote: > I../../include -I../../VEX/pub -I../../VEX/pub -DVGA_ppc64be=1 -DVGO_linux=1 -D\ > VGP_ppc64be_linux=1 -DVGPV_ppc64be_linux_vanilla=1 -DVGA_SEC_ppc32=1 -DVGP_SEC_\ > ppc64be_linux=1 -Winline -Wall -Wshadow -Wno-long-long -g -fno-stack-protector\ > -m64 -MT leak_cpp_interior.o -MD -MP -MF $depbase.Tpo -c -o leak_cpp_interio\ > r.o leak_cpp_interior.cpp &&\ > mv -f $depbase.Tpo $depbase.Po > leak_cpp_interior.cpp: In function ‘void doit()’: > leak_cpp_interior.cpp:111: error: expected ‘)’ before ‘PRIxPTR’ > leak_cpp_interior.cpp:112: warning: conversion lacks type at end of format > leak_cpp_interior.cpp:112: warning: too many arguments for format > make[5]: *** [leak_cpp_interior.o] Error 1 That seems odd... Can you do it with -E and see what the preprocessor is expanded PRIxPTR to? Actually I guess given than message it isn't - maybe there is an include missing? It has inttypes.h though, which ought to be enough. Can you try this: gcc -include inttypes.h -E -dM - < /dev/null | fgrep PRIxPTR Hopefully it will print something like: #define PRIxPTR __PRIPTR_PREFIX "x" Tom -- Tom Hughes (to...@co...) http://compton.nu/ |
|
From: Carl E. L. <ce...@us...> - 2015-07-22 16:12:06
|
On Wed, 2015-07-22 at 16:53 +0100, Tom Hughes wrote:
> On 22/07/15 16:34, Carl E. Love wrote:
>
> > The Solaris support was recently added in Valgrind commit 15426. It
> > included the following change:
> >
> > Index: memcheck/tests/leak_cpp_interior.cpp
> > ===================================================================
> > --- memcheck/tests/leak_cpp_interior.cpp (revision 15425)
> > +++ memcheck/tests/leak_cpp_interior.cpp (revision 15426)
> > @@ -1,3 +1,4 @@
> > +#include <inttypes.h>
> > #include <stdio.h>
> > #include <unistd.h>
> > #include <stdint.h>
> > @@ -107,7 +108,8 @@
> >
> > // prepare the who_points_at cmd we will run.
> > // Do it here to avoid having ptr or its exterior ptr kept in a register.
> > - sprintf(who_points_at_cmd, "who_points_at %p 20", (char*)ptr - sizeof(void*));
> > + sprintf(who_points_at_cmd, "who_points_at %#" PRIxPTR " 20",
> > + (uintptr_t) (char*)ptr - sizeof(void*));
> >
> > ptr2 = new MyClass[0]; // "interior but exterior ptr".
> > // ptr2 points after the chunk, is wrongly considered by memcheck as definitely leaked.
> >
> >
> > The change doesn't seem to compile on a PPC64 Power 7 Big endian
> > machine. I haven't check the other PPC64 platforms yet. I saw that the
> > nightly regression test had failed. I did a fresh pull of the code and
> > tried compiling and verified that I see the compile failure. I then
> > reverted the change locally and was able to get the compile to
> > successfully complete. The regression test also runs but as expected we
> > get an additional failure on that particular test.
> >
> > I am not much of a C++ programmer so I am not sure what the correct fix
> > should be for this issue. If you can take a look at it I would
> > appreciate it. Let me know if I can help out testing a fix. Thanks.
>
> Well what is the error it is reporting?
>
Sorry, I thought I had pasted it in.
I../../include -I../../VEX/pub -I../../VEX/pub -DVGA_ppc64be=1 -DVGO_linux=1 -D\
VGP_ppc64be_linux=1 -DVGPV_ppc64be_linux_vanilla=1 -DVGA_SEC_ppc32=1 -DVGP_SEC_\
ppc64be_linux=1 -Winline -Wall -Wshadow -Wno-long-long -g -fno-stack-protector\
-m64 -MT leak_cpp_interior.o -MD -MP -MF $depbase.Tpo -c -o leak_cpp_interio\
r.o leak_cpp_interior.cpp &&\
mv -f $depbase.Tpo $depbase.Po
leak_cpp_interior.cpp: In function ‘void doit()’:
leak_cpp_interior.cpp:111: error: expected ‘)’ before ‘PRIxPTR’
leak_cpp_interior.cpp:112: warning: conversion lacks type at end of format
leak_cpp_interior.cpp:112: warning: too many arguments for format
make[5]: *** [leak_cpp_interior.o] Error 1
Sorry for being a space cadet and forgetting that little detail. Argh!
Carl Love
|
|
From: Ivo R. <ivo...@gm...> - 2015-07-22 16:10:42
|
2015-07-22 17:34 GMT+02:00 Carl E. Love <ce...@us...>: > Julian: > > The Solaris support was recently added in Valgrind commit 15426. It > included the following change: > > Index: memcheck/tests/leak_cpp_interior.cpp > =================================================================== > --- memcheck/tests/leak_cpp_interior.cpp (revision 15425) > +++ memcheck/tests/leak_cpp_interior.cpp (revision 15426) > @@ -1,3 +1,4 @@ > +#include <inttypes.h> > #include <stdio.h> > #include <unistd.h> > #include <stdint.h> > @@ -107,7 +108,8 @@ > > // prepare the who_points_at cmd we will run. > // Do it here to avoid having ptr or its exterior ptr kept in a > register. > - sprintf(who_points_at_cmd, "who_points_at %p 20", (char*)ptr - > sizeof(void*)); > + sprintf(who_points_at_cmd, "who_points_at %#" PRIxPTR " 20", > + (uintptr_t) (char*)ptr - sizeof(void*)); > > ptr2 = new MyClass[0]; // "interior but exterior ptr". > // ptr2 points after the chunk, is wrongly considered by memcheck as > definitely leaked. > > > The change doesn't seem to compile on a PPC64 Power 7 Big endian > machine. I haven't check the other PPC64 platforms yet. I saw that the > nightly regression test had failed. I did a fresh pull of the code and > tried compiling and verified that I see the compile failure. I then > reverted the change locally and was able to get the compile to > successfully complete. The regression test also runs but as expected we > get an additional failure on that particular test. > > I am not much of a C++ programmer so I am not sure what the correct fix > should be for this issue. If you can take a look at it I would > appreciate it. Let me know if I can help out testing a fix. Thanks. > It seems that PRIxPTR is not recognized by the g++ compiler. Please try this fix: -#include <inttypes.h> ... + sprintf(who_points_at_cmd, "who_points_at %#llx 20", + (unsigned long long) (char*)ptr - sizeof(void*)); The same problem exists on arm-linux, I hope the same fix will suffice. Kind regards, I. |
|
From: Carl E. L. <ce...@us...> - 2015-07-22 15:34:14
|
Julian:
The Solaris support was recently added in Valgrind commit 15426. It
included the following change:
Index: memcheck/tests/leak_cpp_interior.cpp
===================================================================
--- memcheck/tests/leak_cpp_interior.cpp (revision 15425)
+++ memcheck/tests/leak_cpp_interior.cpp (revision 15426)
@@ -1,3 +1,4 @@
+#include <inttypes.h>
#include <stdio.h>
#include <unistd.h>
#include <stdint.h>
@@ -107,7 +108,8 @@
// prepare the who_points_at cmd we will run.
// Do it here to avoid having ptr or its exterior ptr kept in a register.
- sprintf(who_points_at_cmd, "who_points_at %p 20", (char*)ptr - sizeof(void*));
+ sprintf(who_points_at_cmd, "who_points_at %#" PRIxPTR " 20",
+ (uintptr_t) (char*)ptr - sizeof(void*));
ptr2 = new MyClass[0]; // "interior but exterior ptr".
// ptr2 points after the chunk, is wrongly considered by memcheck as definitely leaked.
The change doesn't seem to compile on a PPC64 Power 7 Big endian
machine. I haven't check the other PPC64 platforms yet. I saw that the
nightly regression test had failed. I did a fresh pull of the code and
tried compiling and verified that I see the compile failure. I then
reverted the change locally and was able to get the compile to
successfully complete. The regression test also runs but as expected we
get an additional failure on that particular test.
I am not much of a C++ programmer so I am not sure what the correct fix
should be for this issue. If you can take a look at it I would
appreciate it. Let me know if I can help out testing a fix. Thanks.
Carl Love
|
|
From: <sv...@va...> - 2015-07-22 11:22:46
|
Author: sewardj
Date: Mon Jul 20 14:11:03 2015
New Revision: 15419
Log:
Bug 349879 - [PATCH] memcheck: add handwritten assembly for helperc_LOADV
Patch from Matthias Schwarzott (zz...@ge...)
Also, add better sectioning with comment lines, as this part of the code
was getting hard to follow.
Modified:
trunk/memcheck/mc_main.c
Modified: trunk/memcheck/mc_main.c
==============================================================================
--- trunk/memcheck/mc_main.c (original)
+++ trunk/memcheck/mc_main.c Mon Jul 20 14:11:03 2015
@@ -1311,6 +1311,7 @@
static
__attribute__((noinline))
+__attribute__((used))
VG_REGPARM(3) /* make sure we're using a fixed calling convention, since
this function may get called from hand written assembly. */
ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
@@ -4318,8 +4319,9 @@
= 0xFFFF'FFF0'0000'0007
*/
-
-/* ------------------------ Size = 16 ------------------------ */
+/*------------------------------------------------------------*/
+/*--- LOADV256 and LOADV128 ---*/
+/*------------------------------------------------------------*/
static INLINE
void mc_LOADV_128_or_256 ( /*OUT*/ULong* res,
@@ -4387,7 +4389,9 @@
mc_LOADV_128_or_256(&res->w64[0], a, 128, False);
}
-/* ------------------------ Size = 8 ------------------------ */
+/*------------------------------------------------------------*/
+/*--- LOADV64 ---*/
+/*------------------------------------------------------------*/
static INLINE
ULong mc_LOADV64 ( Addr a, Bool isBigEndian )
@@ -4473,14 +4477,52 @@
".previous\n"
);
+#elif ENABLE_ASSEMBLY_HELPERS && defined(PERF_FAST_LOADV) \
+ && (defined(VGP_x86_linux) || defined(VGP_x86_darwin))
+__asm__(
+".text\n"
+".align 16\n"
+".global vgMemCheck_helperc_LOADV64le\n"
+".type vgMemCheck_helperc_LOADV64le, @function\n"
+"vgMemCheck_helperc_LOADV64le:\n"
+" test $0x7, %eax\n"
+" jne .LLV64LE2\n" /* jump if not aligned */
+" mov %eax, %ecx\n"
+" movzwl %ax, %edx\n"
+" shr $0x10, %ecx\n"
+" mov primary_map(,%ecx,4), %ecx\n"
+" shr $0x3, %edx\n"
+" movzwl (%ecx,%edx,2), %edx\n"
+" cmp $0xaaaa, %edx\n"
+" jne .LLV64LE1\n" /* jump if not all defined */
+" xor %eax, %eax\n" /* return 0 in edx:eax */
+" xor %edx, %edx\n"
+" ret\n"
+".LLV64LE1:\n"
+" cmp $0x5555, %edx\n"
+" jne .LLV64LE2\n" /* jump if not all undefined */
+" or $0xffffffff, %eax\n" /* else return all bits set in edx:eax */
+" or $0xffffffff, %edx\n"
+" ret\n"
+".LLV64LE2:\n"
+" xor %ecx, %ecx\n" /* tail call to mc_LOADVn_slow(a, 64, 0) */
+" mov $64, %edx\n"
+" jmp mc_LOADVn_slow\n"
+".size vgMemCheck_helperc_LOADV64le, .-vgMemCheck_helperc_LOADV64le\n"
+".previous\n"
+);
+
#else
-// Generic for all platforms except arm32-linux
+// Generic for all platforms except arm32-linux, x86-{linux,darwin}
VG_REGPARM(1) ULong MC_(helperc_LOADV64le) ( Addr a )
{
return mc_LOADV64(a, False);
}
#endif
+/*------------------------------------------------------------*/
+/*--- STOREV64 ---*/
+/*------------------------------------------------------------*/
static INLINE
void mc_STOREV64 ( Addr a, ULong vbits64, Bool isBigEndian )
@@ -4548,8 +4590,9 @@
mc_STOREV64(a, vbits64, False);
}
-
-/* ------------------------ Size = 4 ------------------------ */
+/*------------------------------------------------------------*/
+/*--- LOADV32 ---*/
+/*------------------------------------------------------------*/
static INLINE
UWord mc_LOADV32 ( Addr a, Bool isBigEndian )
@@ -4632,14 +4675,50 @@
".previous\n"
);
+#elif ENABLE_ASSEMBLY_HELPERS && defined(PERF_FAST_LOADV) \
+ && (defined(VGP_x86_linux) || defined(VGP_x86_darwin))
+__asm__(
+".text\n"
+".align 16\n"
+".global vgMemCheck_helperc_LOADV32le\n"
+".type vgMemCheck_helperc_LOADV32le, @function\n"
+"vgMemCheck_helperc_LOADV32le:\n"
+" test $0x3, %eax\n"
+" jnz .LLV32LE2\n" /* jump if misaligned */
+" mov %eax, %edx\n"
+" shr $16, %edx\n"
+" mov primary_map(,%edx,4), %ecx\n"
+" movzwl %ax, %edx\n"
+" shr $2, %edx\n"
+" movzbl (%ecx,%edx,1), %edx\n"
+" cmp $0xaa, %edx\n" /* compare to VA_BITS8_DEFINED */
+" jne .LLV32LE1\n" /* jump if not completely defined */
+" xor %eax, %eax\n" /* else return V_BITS32_DEFINED */
+" ret\n"
+".LLV32LE1:\n"
+" cmp $0x55, %edx\n" /* compare to VA_BITS8_UNDEFINED */
+" jne .LLV32LE2\n" /* jump if not completely undefined */
+" or $0xffffffff, %eax\n" /* else return V_BITS32_UNDEFINED */
+" ret\n"
+".LLV32LE2:\n"
+" xor %ecx, %ecx\n" /* tail call mc_LOADVn_slow(a, 32, 0) */
+" mov $32, %edx\n"
+" jmp mc_LOADVn_slow\n"
+".size vgMemCheck_helperc_LOADV32le, .-vgMemCheck_helperc_LOADV32le\n"
+".previous\n"
+);
+
#else
-// Generic for all platforms except arm32-linux
+// Generic for all platforms except arm32-linux, x86-{linux,darwin}
VG_REGPARM(1) UWord MC_(helperc_LOADV32le) ( Addr a )
{
return mc_LOADV32(a, False);
}
#endif
+/*------------------------------------------------------------*/
+/*--- STOREV32 ---*/
+/*------------------------------------------------------------*/
static INLINE
void mc_STOREV32 ( Addr a, UWord vbits32, Bool isBigEndian )
@@ -4705,8 +4784,9 @@
mc_STOREV32(a, vbits32, False);
}
-
-/* ------------------------ Size = 2 ------------------------ */
+/*------------------------------------------------------------*/
+/*--- LOADV16 ---*/
+/*------------------------------------------------------------*/
static INLINE
UWord mc_LOADV16 ( Addr a, Bool isBigEndian )
@@ -4808,14 +4888,63 @@
".previous\n"
);
+#elif ENABLE_ASSEMBLY_HELPERS && defined(PERF_FAST_LOADV) \
+ && (defined(VGP_x86_linux) || defined(VGP_x86_darwin))
+__asm__(
+".text\n"
+".align 16\n"
+".global vgMemCheck_helperc_LOADV16le\n"
+".type vgMemCheck_helperc_LOADV16le, @function\n"
+"vgMemCheck_helperc_LOADV16le:\n"
+" test $0x1, %eax\n"
+" jne .LLV16LE5\n" /* jump if not aligned */
+" mov %eax, %edx\n"
+" shr $0x10, %edx\n"
+" mov primary_map(,%edx,4), %ecx\n"
+" movzwl %ax, %edx\n"
+" shr $0x2, %edx\n"
+" movzbl (%ecx,%edx,1), %edx\n"/* edx = VA bits for 32bit */
+" cmp $0xaa, %edx\n" /* compare to VA_BITS8_DEFINED */
+" jne .LLV16LE2\n" /* jump if not all 32bits defined */
+".LLV16LE1:\n"
+" mov $0xffff0000,%eax\n" /* V_BITS16_DEFINED | top16safe */
+" ret\n"
+".LLV16LE2:\n"
+" cmp $0x55, %edx\n" /* compare to VA_BITS8_UNDEFINED */
+" jne .LLV16LE4\n" /* jump if not all 32bits undefined */
+".LLV16LE3:\n"
+" or $0xffffffff,%eax\n" /* V_BITS16_UNDEFINED | top16safe */
+" ret\n"
+".LLV16LE4:\n"
+" mov %eax, %ecx\n"
+" and $0x2, %ecx\n"
+" add %ecx, %ecx\n"
+" sar %cl, %edx\n"
+" and $0xf, %edx\n"
+" cmp $0xa, %edx\n"
+" je .LLV16LE1\n" /* jump if all 16bits are defined */
+" cmp $0x5, %edx\n"
+" je .LLV16LE3\n" /* jump if all 16bits are undefined */
+".LLV16LE5:\n"
+" xor %ecx, %ecx\n" /* tail call mc_LOADVn_slow(a, 16, 0) */
+" mov $16, %edx\n"
+" jmp mc_LOADVn_slow\n"
+".size vgMemCheck_helperc_LOADV16le, .-vgMemCheck_helperc_LOADV16le \n"
+".previous\n"
+);
+
#else
-// Generic for all platforms except arm32-linux
+// Generic for all platforms except arm32-linux, x86-{linux,darwin}
VG_REGPARM(1) UWord MC_(helperc_LOADV16le) ( Addr a )
{
return mc_LOADV16(a, False);
}
#endif
+/*------------------------------------------------------------*/
+/*--- STOREV16 ---*/
+/*------------------------------------------------------------*/
+
/* True if the vabits4 in vabits8 indicate a and a+1 are accessible. */
static INLINE
Bool accessible_vabits4_in_vabits8 ( Addr a, UChar vabits8 )
@@ -4897,8 +5026,10 @@
mc_STOREV16(a, vbits16, False);
}
+/*------------------------------------------------------------*/
+/*--- LOADV8 ---*/
+/*------------------------------------------------------------*/
-/* ------------------------ Size = 1 ------------------------ */
/* Note: endianness is irrelevant for size == 1 */
// Non-generic assembly for arm32-linux
@@ -4950,8 +5081,51 @@
".previous\n"
);
+/* Non-generic assembly for x86-linux */
+#elif ENABLE_ASSEMBLY_HELPERS && defined(PERF_FAST_LOADV) \
+ && (defined(VGP_x86_linux) || defined(VGP_x86_darwin))
+__asm__(
+".text\n"
+".align 16\n"
+".global vgMemCheck_helperc_LOADV8\n"
+".type vgMemCheck_helperc_LOADV8, @function\n"
+"vgMemCheck_helperc_LOADV8:\n"
+" mov %eax, %edx\n"
+" shr $0x10, %edx\n"
+" mov primary_map(,%edx,4), %ecx\n"
+" movzwl %ax, %edx\n"
+" shr $0x2, %edx\n"
+" movzbl (%ecx,%edx,1), %edx\n"/* edx = VA bits for 32bit */
+" cmp $0xaa, %edx\n" /* compare to VA_BITS8_DEFINED? */
+" jne .LLV8LE2\n" /* jump if not defined */
+".LLV8LE1:\n"
+" mov $0xffffff00, %eax\n" /* V_BITS8_DEFINED | top24safe */
+" ret\n"
+".LLV8LE2:\n"
+" cmp $0x55, %edx\n" /* compare to VA_BITS8_UNDEFINED */
+" jne .LLV8LE4\n" /* jump if not all 32bits are undefined */
+".LLV8LE3:\n"
+" or $0xffffffff, %eax\n" /* V_BITS8_UNDEFINED | top24safe */
+" ret\n"
+".LLV8LE4:\n"
+" mov %eax, %ecx\n"
+" and $0x3, %ecx\n"
+" add %ecx, %ecx\n"
+" sar %cl, %edx\n"
+" and $0x3, %edx\n"
+" cmp $0x2, %edx\n"
+" je .LLV8LE1\n" /* jump if all 8bits are defined */
+" cmp $0x1, %edx\n"
+" je .LLV8LE3\n" /* jump if all 8bits are undefined */
+" xor %ecx, %ecx\n" /* tail call to mc_LOADVn_slow(a, 8, 0) */
+" mov $0x8, %edx\n"
+" jmp mc_LOADVn_slow\n"
+".size vgMemCheck_helperc_LOADV8, .-vgMemCheck_helperc_LOADV8\n"
+".previous\n"
+);
+
#else
-// Generic for all platforms except arm32-linux
+// Generic for all platforms except arm32-linux, x86-{linux,darwin}
VG_REGPARM(1)
UWord MC_(helperc_LOADV8) ( Addr a )
{
@@ -4994,6 +5168,9 @@
}
#endif
+/*------------------------------------------------------------*/
+/*--- STOREV8 ---*/
+/*------------------------------------------------------------*/
VG_REGPARM(2)
void MC_(helperc_STOREV8) ( Addr a, UWord vbits8 )
|
|
From: <sv...@va...> - 2015-07-22 10:13:00
|
Author: sewardj
Date: Mon Jul 20 10:59:25 2015
New Revision: 15418
Log:
VG_(helperc_LOADV64le): add handwritten assembly helper for ARM32
VG_(helperc_LOADV32le): VG_(helperc_LOADV16le): VG_(helperc_LOADV8):
use ".L" style assembly labels so they don't appears as new symbols
during disassembly.
Modified:
trunk/memcheck/mc_main.c
Modified: trunk/memcheck/mc_main.c
==============================================================================
--- trunk/memcheck/mc_main.c (original)
+++ trunk/memcheck/mc_main.c Mon Jul 20 10:59:25 2015
@@ -4426,14 +4426,60 @@
#endif
}
+// Generic for all platforms
VG_REGPARM(1) ULong MC_(helperc_LOADV64be) ( Addr a )
{
return mc_LOADV64(a, True);
}
+
+// Non-generic assembly for arm32-linux
+#if ENABLE_ASSEMBLY_HELPERS && defined(PERF_FAST_LOADV) \
+ && defined(VGP_arm_linux)
+__asm__( /* Derived from the 32 bit assembly helper */
+".text \n"
+".align 2 \n"
+".global vgMemCheck_helperc_LOADV64le \n"
+".type vgMemCheck_helperc_LOADV64le, %function \n"
+"vgMemCheck_helperc_LOADV64le: \n"
+" tst r0, #7 \n"
+" movw r3, #:lower16:primary_map \n"
+" bne .LLV64LEc4 \n" // if misaligned
+" lsr r2, r0, #16 \n"
+" movt r3, #:upper16:primary_map \n"
+" ldr r2, [r3, r2, lsl #2] \n"
+" uxth r1, r0 \n" // r1 is 0-(16)-0 X-(13)-X 000
+" movw r3, #0xAAAA \n"
+" lsr r1, r1, #3 \n"
+" ldrh r1, [r2, r1] \n"
+" cmp r1, r3 \n" // 0xAAAA == VA_BITS16_DEFINED
+" bne .LLV64LEc0 \n" // if !all_defined
+" mov r1, #0x0 \n" // 0x0 == V_BITS32_DEFINED
+" mov r0, #0x0 \n" // 0x0 == V_BITS32_DEFINED
+" bx lr \n"
+".LLV64LEc0: \n"
+" movw r3, #0x5555 \n"
+" cmp r1, r3 \n" // 0x5555 == VA_BITS16_UNDEFINED
+" bne .LLV64LEc4 \n" // if !all_undefined
+" mov r1, #0xFFFFFFFF \n" // 0xFFFFFFFF == V_BITS32_UNDEFINED
+" mov r0, #0xFFFFFFFF \n" // 0xFFFFFFFF == V_BITS32_UNDEFINED
+" bx lr \n"
+".LLV64LEc4: \n"
+" push {r4, lr} \n"
+" mov r2, #0 \n"
+" mov r1, #64 \n"
+" bl mc_LOADVn_slow \n"
+" pop {r4, pc} \n"
+".size vgMemCheck_helperc_LOADV64le, .-vgMemCheck_helperc_LOADV64le \n"
+".previous\n"
+);
+
+#else
+// Generic for all platforms except arm32-linux
VG_REGPARM(1) ULong MC_(helperc_LOADV64le) ( Addr a )
{
return mc_LOADV64(a, False);
}
+#endif
static INLINE
@@ -4561,22 +4607,22 @@
"vgMemCheck_helperc_LOADV32le: \n"
" tst r0, #3 \n" // 1
" movw r3, #:lower16:primary_map \n" // 1
-" bne LV32c4 \n" // 2 if misaligned
+" bne .LLV32LEc4 \n" // 2 if misaligned
" lsr r2, r0, #16 \n" // 3
" movt r3, #:upper16:primary_map \n" // 3
" ldr r2, [r3, r2, lsl #2] \n" // 4
" uxth r1, r0 \n" // 4
" ldrb r1, [r2, r1, lsr #2] \n" // 5
" cmp r1, #0xAA \n" // 6 0xAA == VA_BITS8_DEFINED
-" bne LV32c0 \n" // 7 if !all_defined
+" bne .LLV32LEc0 \n" // 7 if !all_defined
" mov r0, #0x0 \n" // 8 0x0 == V_BITS32_DEFINED
" bx lr \n" // 9
-"LV32c0: \n"
+".LLV32LEc0: \n"
" cmp r1, #0x55 \n" // 0x55 == VA_BITS8_UNDEFINED
-" bne LV32c4 \n" // if !all_undefined
+" bne .LLV32LEc4 \n" // if !all_undefined
" mov r0, #0xFFFFFFFF \n" // 0xFFFFFFFF == V_BITS32_UNDEFINED
" bx lr \n"
-"LV32c4: \n"
+".LLV32LEc4: \n"
" push {r4, lr} \n"
" mov r2, #0 \n"
" mov r1, #32 \n"
@@ -4719,7 +4765,7 @@
".type vgMemCheck_helperc_LOADV16le, %function \n"
"vgMemCheck_helperc_LOADV16le: \n" //
" tst r0, #1 \n" //
-" bne LV16c12 \n" // if misaligned
+" bne .LLV16LEc12 \n" // if misaligned
" lsr r2, r0, #16 \n" // r2 = pri-map-ix
" movw r3, #:lower16:primary_map \n" //
" uxth r1, r0 \n" // r1 = sec-map-offB
@@ -4727,32 +4773,32 @@
" ldr r2, [r3, r2, lsl #2] \n" // r2 = sec-map
" ldrb r1, [r2, r1, lsr #2] \n" // r1 = sec-map-VABITS8
" cmp r1, #0xAA \n" // r1 == VA_BITS8_DEFINED?
-" bne LV16c0 \n" // no, goto LV16c0
-"LV16h9: \n" //
+" bne .LLV16LEc0 \n" // no, goto .LLV16LEc0
+".LLV16LEh9: \n" //
" mov r0, #0xFFFFFFFF \n" //
" lsl r0, r0, #16 \n" // V_BITS16_DEFINED | top16safe
" bx lr \n" //
-"LV16c0: \n" //
+".LLV16LEc0: \n" //
" cmp r1, #0x55 \n" // VA_BITS8_UNDEFINED
-" bne LV16c4 \n" //
-"LV16c2: \n" //
+" bne .LLV16LEc4 \n" //
+".LLV16LEc2: \n" //
" mov r0, #0xFFFFFFFF \n" // V_BITS16_UNDEFINED | top16safe
" bx lr \n" //
-"LV16c4: \n" //
+".LLV16LEc4: \n" //
// r1 holds sec-map-VABITS8. r0 holds the address and is 2-aligned.
// Extract the relevant 4 bits and inspect.
-" and r2, r0, #2 \n" // addr & 2
-" add r2, r2, r2 \n" // 2 * (addr & 2)
-" lsr r1, r1, r2 \n" // sec-map-VABITS8 >> (2 * (addr & 2))
-" and r1, r1, #15 \n" // (sec-map-VABITS8 >> (2 * (addr & 2))) & 15
+" and r2, r0, #2 \n" // addr & 2
+" add r2, r2, r2 \n" // 2 * (addr & 2)
+" lsr r1, r1, r2 \n" // sec-map-VABITS8 >> (2 * (addr & 2))
+" and r1, r1, #15 \n" // (sec-map-VABITS8 >> (2 * (addr & 2))) & 15
" cmp r1, #0xA \n" // VA_BITS4_DEFINED
-" beq LV16h9 \n" //
+" beq .LLV16LEh9 \n" //
" cmp r1, #0x5 \n" // VA_BITS4_UNDEFINED
-" beq LV16c2 \n" //
+" beq .LLV16LEc2 \n" //
-"LV16c12: \n" //
+".LLV16LEc12: \n" //
" push {r4, lr} \n" //
" mov r2, #0 \n" //
" mov r1, #16 \n" //
@@ -4871,29 +4917,29 @@
" ldr r2, [r3, r2, lsl #2] \n" // r2 = sec-map
" ldrb r1, [r2, r1, lsr #2] \n" // r1 = sec-map-VABITS8
" cmp r1, #0xAA \n" // r1 == VA_BITS8_DEFINED?
-" bne LV8c0 \n" // no, goto LV8c0
-"LV8h9: \n" //
+" bne .LLV8c0 \n" // no, goto .LLV8c0
+".LLV8h9: \n" //
" mov r0, #0xFFFFFF00 \n" // V_BITS8_DEFINED | top24safe
" bx lr \n" //
-"LV8c0: \n" //
+".LLV8c0: \n" //
" cmp r1, #0x55 \n" // VA_BITS8_UNDEFINED
-" bne LV8c4 \n" //
-"LV8c2: \n" //
+" bne .LLV8c4 \n" //
+".LLV8c2: \n" //
" mov r0, #0xFFFFFFFF \n" // V_BITS8_UNDEFINED | top24safe
" bx lr \n" //
-"LV8c4: \n" //
+".LLV8c4: \n" //
// r1 holds sec-map-VABITS8
// r0 holds the address. Extract the relevant 2 bits and inspect.
-" and r2, r0, #3 \n" // addr & 3
-" add r2, r2, r2 \n" // 2 * (addr & 3)
-" lsr r1, r1, r2 \n" // sec-map-VABITS8 >> (2 * (addr & 3))
-" and r1, r1, #3 \n" // (sec-map-VABITS8 >> (2 * (addr & 3))) & 3
+" and r2, r0, #3 \n" // addr & 3
+" add r2, r2, r2 \n" // 2 * (addr & 3)
+" lsr r1, r1, r2 \n" // sec-map-VABITS8 >> (2 * (addr & 3))
+" and r1, r1, #3 \n" // (sec-map-VABITS8 >> (2 * (addr & 3))) & 3
" cmp r1, #2 \n" // VA_BITS2_DEFINED
-" beq LV8h9 \n" //
+" beq .LLV8h9 \n" //
" cmp r1, #1 \n" // VA_BITS2_UNDEFINED
-" beq LV8c2 \n" //
+" beq .LLV8c2 \n" //
" push {r4, lr} \n" //
" mov r2, #0 \n" //
|
|
From: <sv...@va...> - 2015-07-22 10:12:52
|
Author: carll
Date: Mon Jul 20 23:22:42 2015
New Revision: 15425
Log:
Patch 7 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (wil...@vn...).
A handful of cosmetic changes to the ppc32 and ppc64 makefiles.
Cleans up some whitespace issues, spaces/tabs/etc,
Rearranges some of the contents so they are logically group, and
more consistent between the 32- and 64- bit versions of the same.
Bugzilla 34979
Modified:
trunk/none/tests/ppc32/Makefile.am
trunk/none/tests/ppc64/Makefile.am
Modified: trunk/none/tests/ppc32/Makefile.am
==============================================================================
--- trunk/none/tests/ppc32/Makefile.am (original)
+++ trunk/none/tests/ppc32/Makefile.am Mon Jul 20 23:22:42 2015
@@ -9,12 +9,12 @@
bug139050-ppc32.stdout.exp bug139050-ppc32.stderr.exp \
bug139050-ppc32.vgtest \
ldstrev.stderr.exp ldstrev.stdout.exp ldstrev.vgtest \
- lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
jm-int.stderr.exp jm-int.stdout.exp jm-int.vgtest \
jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest jm-fp.stdout.exp-BE2 \
jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan \
jm-vmx.vgtest \
jm-misc.stderr.exp jm-misc.stdout.exp jm-misc.vgtest \
+ lsw.stderr.exp lsw.stdout.exp lsw.vgtest \
mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \
mcrfs.stderr.exp mcrfs.stdout.exp mcrfs.vgtest \
round.stderr.exp round.stdout.exp round.vgtest \
@@ -40,31 +40,25 @@
test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest \
jm_vec_isa_2_07.stderr.exp jm_vec_isa_2_07.stdout.exp jm_vec_isa_2_07.vgtest \
jm_fp_isa_2_07.stderr.exp jm_fp_isa_2_07.stdout.exp jm_fp_isa_2_07.vgtest \
- jm_int_isa_2_07.stdout.exp \
jm_int_isa_2_07.stderr.exp jm_int_isa_2_07.vgtest \
+ jm_int_isa_2_07.stdout.exp \
test_isa_2_07_part2.stderr.exp test_isa_2_07_part2.stdout.exp test_isa_2_07_part2.vgtest \
test_tm.stderr.exp test_tm.stdout.exp test_tm.vgtest \
test_touch_tm.stderr.exp test_touch_tm.stdout.exp test_touch_tm.vgtest \
ldst_multiple.stderr.exp ldst_multiple.stdout.exp ldst_multiple.vgtest \
data-cache-instructions.stderr.exp data-cache-instructions.stdout.exp data-cache-instructions.vgtest
-
check_PROGRAMS = \
allexec \
- bug129390-ppc32 \
- bug139050-ppc32 \
- ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \
- testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
- test_isa_2_06_part1 \
- test_isa_2_06_part2 \
- test_isa_2_06_part3 \
+ lsw jm-insns round \
+ test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \
test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \
- test_isa_2_07_part1 \
- test_isa_2_07_part2 \
- test_tm \
- test_touch_tm \
- ldst_multiple \
- data-cache-instructions
+ test_isa_2_07_part1 test_isa_2_07_part2 \
+ test_tm test_touch_tm ldst_multiple data-cache-instructions \
+ test_fx test_gx \
+ testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \
+ bug129390-ppc32 bug139050-ppc32 \
+ ldstrev mftocrf mcrfs
AM_CFLAGS += @FLAG_M32@
AM_CXXFLAGS += @FLAG_M32@
@@ -132,16 +126,13 @@
@FLAG_M32@ $(BUILD_FLAGS_DFP)
test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_DFP)
-
test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_DFP)
-
test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_DFP)
test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
- @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
-
+ @FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
Modified: trunk/none/tests/ppc64/Makefile.am
==============================================================================
--- trunk/none/tests/ppc64/Makefile.am (original)
+++ trunk/none/tests/ppc64/Makefile.am Mon Jul 20 23:22:42 2015
@@ -17,7 +17,8 @@
opcodes.h \
power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \
power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest \
- test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest test_isa_2_06_part1.stdout.exp-LE \
+ test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest \
+ test_isa_2_06_part1.stdout.exp-LE \
test_isa_2_06_part2.stderr.exp test_isa_2_06_part2.stdout.exp test_isa_2_06_part2.vgtest \
test_isa_2_06_part3.stderr.exp test_isa_2_06_part3.stdout.exp test_isa_2_06_part3.vgtest \
test_dfp1.stderr.exp test_dfp1.stdout.exp test_dfp1.vgtest \
@@ -38,11 +39,14 @@
check_PROGRAMS = \
allexec \
- jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp \
- power6_mf_gpr test_isa_2_06_part1 test_isa_2_06_part2 \
- test_isa_2_06_part3 test_dfp1 test_dfp2 test_dfp3 test_dfp4 \
- test_dfp5 test_isa_2_07_part1 test_isa_2_07_part2 \
- test_tm test_touch_tm ldst_multiple data-cache-instructions
+ lsw jm-insns round \
+ test_isa_2_06_part1 test_isa_2_06_part2 test_isa_2_06_part3 \
+ test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5 \
+ test_isa_2_07_part1 test_isa_2_07_part2 \
+ test_tm test_touch_tm ldst_multiple data-cache-instructions \
+ power6_mf_gpr std_reg_imm \
+ twi_tdi tw_td power6_bcmp
+
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
@@ -86,6 +90,9 @@
HTM_FLAG = -mhtm -DSUPPORTS_HTM
endif
+jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \
+ @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC)
+
test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
@@ -95,26 +102,19 @@
test_isa_2_06_part3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
-jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \
- @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC)
-
test_dfp1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_DFP)
-
test_dfp2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_DFP)
test_dfp3_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_DFP)
-
test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_DFP)
-
test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(DFP_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_DFP)
test_isa_2_07_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
-
test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
|
|
From: <sv...@va...> - 2015-07-22 09:17:50
|
Author: carll
Date: Mon Jul 20 19:53:56 2015
New Revision: 15420
Log:
Patch 1 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (wil...@vn...).
Add generic (ppc64) aux vector capability checking script.
This consolidates several of the existing _cap checking scripts.
Bugzilla 34979
Added:
trunk/tests/check_ppc64_auxv_cap
Modified:
trunk/tests/Makefile.am
Modified: trunk/tests/Makefile.am
==============================================================================
--- trunk/tests/Makefile.am (original)
+++ trunk/tests/Makefile.am Mon Jul 20 19:53:56 2015
@@ -8,6 +8,7 @@
check_makefile_consistency \
check_dfp_cap \
check_vmx_cap \
+ check_ppc64_auxv_cap \
filter_addresses \
filter_discards \
filter_libc \
Added: trunk/tests/check_ppc64_auxv_cap
==============================================================================
--- trunk/tests/check_ppc64_auxv_cap (added)
+++ trunk/tests/check_ppc64_auxv_cap Mon Jul 20 19:53:56 2015
@@ -0,0 +1,44 @@
+#!/bin/sh
+
+# Check if the passed in (CAPABILITY_WORD) matches a value found in the
+# current hwcap aux vector.
+
+# return '0' to indicate the capability was found.
+# return '1' for not found, or any other error condition.
+
+CAPABILITY_WORD=$1
+
+# SANITY CHECK Begin:
+# These are potential hwcap values as found in the glibc dl-procinfo.c
+# sources as of July 2015.
+P_HWCAP_1=" vsx arch_2_06 power6x dfp pa6t arch_2_05 ic_snoop smt booke"
+P_HWCAP_2=" cellbe power5+ power5 power4 notb efpdouble efpsingle spe"
+P_HWCAP_3=" ucache 4xxmac mmu fpu altivec ppc601 ppc64 ppc32 "
+P_HWCAP2_1=" tar isel ebb dscr htm arch_2_07 "
+CAPABILITY_FOUND="no"
+for POTENTIAL_CAP in $P_HWCAP_1 $P_HWCAP_2 $P_HWCAP_3 $P_HWCAP2_1 ; do
+ if [ "x$CAPABILITY_WORD" = "x$POTENTIAL_CAP" ]; then
+ CAPABILITY_FOUND="yes"
+ break
+ fi
+done
+if [ x$CAPABILITY_FOUND = "xno" ]; then
+ echo "Warning: did not find $CAPABILITY_WORD in the potential capabilities list."
+ echo " LD_SHOW_AUXV=1 /bin/true | grep ^AT_HWCAP "
+ echo " Double-check that the input value [$CAPABILITY_WORD] is valid."
+fi
+# SANITY CHECK End
+
+# Capability Check Begin:
+LD_SHOW_AUXV=1 /bin/true | grep ^AT_HWCAP | grep -w $CAPABILITY_WORD 2>&1 > /dev/null
+if [ "$?" -eq "0" ]; then
+ #echo "found the capability"
+ exit 0
+elif [ "$?" -eq "2" ]; then
+ # echo "grep failure"
+ exit 1
+else
+ #echo "did not find the capability"
+ exit 1
+fi
+
|
|
From: <sv...@va...> - 2015-07-22 09:03:00
|
Author: carll
Date: Mon Jul 20 22:57:21 2015
New Revision: 15424
Log:
Patch 6 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (wil...@vn...).
Rework hwcap checking in configure.ac. This adds and swizzles
some of the capability checking as found in configure.ac.
This cleans up some corner cases where capabilities were assumed
based on compiler features, but not supported by the platform.
- clean up vsx kludge, and remove associated comment.
- check assorted capabilities against the hwcap values, including
altivec, vsx, dfp, htm, ISA_2_0* .
Bugzilla 34979
Modified:
trunk/configure.ac
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Mon Jul 20 22:57:21 2015
@@ -1285,16 +1285,38 @@
])
# gather hardware capabilities. (hardware/kernel/libc)
+AC_HWCAP_CONTAINS_FLAG([altivec],[HWCAP_HAS_ALTIVEC])
+AC_HWCAP_CONTAINS_FLAG([vsx],[HWCAP_HAS_VSX])
+AC_HWCAP_CONTAINS_FLAG([dfp],[HWCAP_HAS_DFP])
+AC_HWCAP_CONTAINS_FLAG([arch_2_05],[HWCAP_HAS_ISA_2_05])
+AC_HWCAP_CONTAINS_FLAG([arch_2_06],[HWCAP_HAS_ISA_2_06])
+AC_HWCAP_CONTAINS_FLAG([arch_2_07],[HWCAP_HAS_ISA_2_07])
AC_HWCAP_CONTAINS_FLAG([htm],[HWCAP_HAS_HTM])
+# ISA Levels
+AM_CONDITIONAL(HAS_ISA_2_05, [test x$HWCAP_HAS_ISA_2_05 = xyes])
+AM_CONDITIONAL(HAS_ISA_2_06, [test x$HWCAP_HAS_ISA_2_06 = xyes])
+# compiler support for isa 2.07 level instructions
+AC_MSG_CHECKING([that assembler knows ISA 2.07 instructions ])
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
+]], [[
+ __asm__ __volatile__("mtvsrd 1,2 ");
+]])], [
+ac_asm_have_isa_2_07=yes
+AC_MSG_RESULT([yes])
+], [
+ac_asm_have_isa_2_07=no
+AC_MSG_RESULT([no])
+])
+AM_CONDITIONAL(HAS_ISA_2_07, [test x$ac_asm_have_isa_2_07 = xyes \
+ -a x$HWCAP_HAS_ISA_2_07 = xyes])
+
+# altivec (vsx) support.
# does this compiler support -maltivec and does it have the include file
# <altivec.h> ?
-
-AC_MSG_CHECKING([for Altivec])
-
+AC_MSG_CHECKING([for Altivec support in the compiler ])
safe_CFLAGS=$CFLAGS
CFLAGS="-maltivec -Werror"
-
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#include <altivec.h>
]], [[
@@ -1309,42 +1331,48 @@
AC_MSG_RESULT([no])
])
CFLAGS=$safe_CFLAGS
-
-AM_CONDITIONAL([HAS_ALTIVEC], [test x$ac_have_altivec = xyes])
-
+AM_CONDITIONAL([HAS_ALTIVEC], [test x$ac_have_altivec = xyes \
+ -a x$HWCAP_HAS_ALTIVEC = xyes])
# Check that both: the compiler supports -mvsx and that the assembler
# understands VSX instructions. If either of those doesn't work,
-# conclude that we can't do VSX. NOTE: basically this is a kludge
-# in that it conflates two things that should be separate -- whether
-# the compiler understands the flag vs whether the assembler
-# understands the opcodes. This really ought to be cleaned up
-# and done properly, like it is for x86/x86_64.
-
-AC_MSG_CHECKING([for VSX])
-
+# conclude that we can't do VSX.
+AC_MSG_CHECKING([for VSX compiler flag support])
safe_CFLAGS=$CFLAGS
CFLAGS="-mvsx -Werror"
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
+]], [[
+]])], [
+ac_compiler_supports_vsx_flag=yes
+AC_MSG_RESULT([yes])
+], [
+ac_compiler_supports_vsx_flag=no
+AC_MSG_RESULT([no])
+])
+CFLAGS=$safe_CFLAGS
+AC_MSG_CHECKING([for VSX support in the assembler ])
+safe_CFLAGS=$CFLAGS
+CFLAGS="-mvsx -Werror"
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#include <altivec.h>
]], [[
vector unsigned int v;
__asm__ __volatile__("xsmaddadp 32, 32, 33" ::: "memory","cc");
]])], [
-ac_have_vsx=yes
+ac_compiler_supports_vsx=yes
AC_MSG_RESULT([yes])
], [
-ac_have_vsx=no
+ac_compiler_supports_vsx=no
AC_MSG_RESULT([no])
])
CFLAGS=$safe_CFLAGS
+AM_CONDITIONAL([HAS_VSX], [test x$ac_compiler_supports_vsx_flag = xyes \
+ -a x$ac_compiler_supports_vsx = xyes \
+ -a x$HWCAP_HAS_VSX = xyes ])
-AM_CONDITIONAL(HAS_VSX, test x$ac_have_vsx = xyes)
-
-
+# DFP (Decimal Float)
AC_MSG_CHECKING([that assembler knows DFP])
-
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
]], [[
__asm__ __volatile__("dadd 1, 2, 3");
@@ -1356,8 +1384,6 @@
ac_asm_have_dfp=no
AC_MSG_RESULT([no])
])
-
-
AC_MSG_CHECKING([that compiler knows -mhard-dfp switch])
safe_CFLAGS=$CFLAGS
CFLAGS="-mhard-dfp -Werror"
@@ -1366,47 +1392,31 @@
__asm__ __volatile__("dadd 1, 2, 3");
__asm__ __volatile__("dcffix 1, 2");
]])], [
-ac_gcc_have_dfp=yes
+ac_compiler_have_dfp=yes
AC_MSG_RESULT([yes])
], [
-ac_gcc_have_dfp=no
+ac_compiler_have_dfp=no
AC_MSG_RESULT([no])
])
-
CFLAGS=$safe_CFLAGS
-
-AM_CONDITIONAL(HAS_DFP, test x$ac_asm_have_dfp = xyes -a x$ac_gcc_have_dfp = xyes)
-
+AM_CONDITIONAL(HAS_DFP, test x$ac_asm_have_dfp = xyes \
+ -a x$ac_compiler_have_dfp = xyes \
+ -a x$HWCAP_HAS_DFP = xyes )
AC_MSG_CHECKING([that compiler knows DFP datatypes])
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
]], [[
_Decimal64 x = 0.0DD;
]])], [
-ac_gcc_have_dfp_type=yes
-AC_MSG_RESULT([yes])
-], [
-ac_gcc_have_dfp_type=no
-AC_MSG_RESULT([no])
-])
-
-AM_CONDITIONAL(BUILD_DFP_TESTS, test x$ac_gcc_have_dfp_type = xyes)
-
-# isa 2.07 checking
-AC_MSG_CHECKING([that assembler knows ISA 2.07 ])
-
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
-]], [[
- __asm__ __volatile__("mtvsrd 1,2 ");
-]])], [
-ac_asm_have_isa_2_07=yes
+ac_compiler_have_dfp_type=yes
AC_MSG_RESULT([yes])
], [
-ac_asm_have_isa_2_07=no
+ac_compiler_have_dfp_type=no
AC_MSG_RESULT([no])
])
+AM_CONDITIONAL(BUILD_DFP_TESTS, test x$ac_compiler_have_dfp_type = xyes \
+ -a xHWCAP_$HAS_DFP = xyes )
-AM_CONDITIONAL(HAS_ISA_2_07, test x$ac_asm_have_isa_2_07 = xyes)
# HTM (Hardware Transactional Memory)
AC_MSG_CHECKING([if compiler accepts the -mhtm flag])
|
|
From: <sv...@va...> - 2015-07-22 09:02:58
|
Author: rhyskidd
Date: Sat Jul 18 06:53:56 2015
New Revision: 15415
Log:
Documentation: Ensure alignment of the x86 and amd64 darwin code in m_sigframe. Follows from a side-by-side code review.
Modified:
trunk/coregrind/m_sigframe/sigframe-amd64-darwin.c
trunk/coregrind/m_sigframe/sigframe-x86-darwin.c
Modified: trunk/coregrind/m_sigframe/sigframe-amd64-darwin.c
==============================================================================
--- trunk/coregrind/m_sigframe/sigframe-amd64-darwin.c (original)
+++ trunk/coregrind/m_sigframe/sigframe-amd64-darwin.c Sat Jul 18 06:53:56 2015
@@ -222,7 +222,7 @@
if (VG_(clo_trace_signals))
VG_(message)(Vg_DebugMsg,
"sigframe_create (thread %d): "
- "next EIP=%#lx, next ESP=%#lx\n",
+ "next RIP=%#lx, next RSP=%#lx\n",
tid, (Addr)handler, (Addr)frame );
}
@@ -252,17 +252,15 @@
in VG_(sigframe_create) just above. */
vg_assert(VG_IS_16_ALIGNED((Addr)frame + 8));
- /* restore the entire guest state, and shadows, from the
- frame. Note, as per comments above, this is a kludge - should
- restore it from saved ucontext. Oh well. */
- tst->arch.vex = frame->vex;
- tst->arch.vex_shadow1 = frame->vex_shadow1;
- tst->arch.vex_shadow2 = frame->vex_shadow2;
+ /* restore the entire guest state, and shadows, from the frame. */
+ tst->arch.vex = frame->vex;
+ tst->arch.vex_shadow1 = frame->vex_shadow1;
+ tst->arch.vex_shadow2 = frame->vex_shadow2;
restore_from_ucontext(tst, &frame->fake_ucontext);
- tst->sig_mask = frame->mask;
- tst->tmp_sig_mask = frame->mask;
- sigNo = frame->sigNo_private;
+ tst->sig_mask = frame->mask;
+ tst->tmp_sig_mask = frame->mask;
+ sigNo = frame->sigNo_private;
if (VG_(clo_trace_signals))
VG_(message)(Vg_DebugMsg,
Modified: trunk/coregrind/m_sigframe/sigframe-x86-darwin.c
==============================================================================
--- trunk/coregrind/m_sigframe/sigframe-x86-darwin.c (original)
+++ trunk/coregrind/m_sigframe/sigframe-x86-darwin.c Sat Jul 18 06:53:56 2015
@@ -65,9 +65,9 @@
UInt a2_siginfo;
UInt a3_ucontext;
UChar lower_guardzone[512]; // put nothing here
- VexGuestX86State gst;
- VexGuestX86State gshadow1;
- VexGuestX86State gshadow2;
+ VexGuestX86State vex;
+ VexGuestX86State vex_shadow1;
+ VexGuestX86State vex_shadow2;
vki_siginfo_t fake_siginfo;
struct vki_ucontext fake_ucontext;
UInt magicPI;
@@ -163,16 +163,16 @@
/* clear it (very conservatively) */
VG_(memset)(&frame->lower_guardzone, 0, sizeof frame->lower_guardzone);
- VG_(memset)(&frame->gst, 0, sizeof(VexGuestX86State));
- VG_(memset)(&frame->gshadow1, 0, sizeof(VexGuestX86State));
- VG_(memset)(&frame->gshadow2, 0, sizeof(VexGuestX86State));
+ VG_(memset)(&frame->vex, 0, sizeof(VexGuestX86State));
+ VG_(memset)(&frame->vex_shadow1, 0, sizeof(VexGuestX86State));
+ VG_(memset)(&frame->vex_shadow2, 0, sizeof(VexGuestX86State));
VG_(memset)(&frame->fake_siginfo, 0, sizeof(frame->fake_siginfo));
VG_(memset)(&frame->fake_ucontext, 0, sizeof(frame->fake_ucontext));
/* save stuff in frame */
- frame->gst = tst->arch.vex;
- frame->gshadow1 = tst->arch.vex_shadow1;
- frame->gshadow2 = tst->arch.vex_shadow2;
+ frame->vex = tst->arch.vex;
+ frame->vex_shadow1 = tst->arch.vex_shadow1;
+ frame->vex_shadow2 = tst->arch.vex_shadow2;
frame->sigNo_private = sigNo;
frame->mask = tst->sig_mask;
frame->magicPI = 0x31415927;
@@ -194,9 +194,11 @@
VG_TRACK( pre_mem_write, Vg_CoreSignal, tid, "signal handler frame",
(Addr)frame, 4*sizeof(UInt) );
frame->returnAddr = (UInt)&VG_(x86_darwin_SUBST_FOR_sigreturn);
- frame->a1_signo = sigNo;
- frame->a2_siginfo = (UInt)&frame->fake_siginfo;
- frame->a3_ucontext = (UInt)&frame->fake_ucontext;
+
+ frame->a1_signo = sigNo;
+ frame->a2_siginfo = (UInt) &frame->fake_siginfo;
+ frame->a3_ucontext = (UInt) &frame->fake_ucontext;
+
VG_TRACK( post_mem_write, Vg_CoreSignal, tid,
(Addr)frame, 4*sizeof(UInt) );
VG_TRACK( post_mem_write, Vg_CoreSignal, tid,
@@ -233,21 +235,19 @@
frame = (struct hacky_sigframe*)(esp - 4);
vg_assert(frame->magicPI == 0x31415927);
- /* This +8 is because of the -4 referred to in the ELF ABI comment
+ /* This +4 is because of the -4 referred to in the ELF ABI comment
in VG_(sigframe_create) just above. */
vg_assert(VG_IS_16_ALIGNED((Addr)frame + 4));
- /* restore the entire guest state, and shadows, from the
- frame. Note, as per comments above, this is a kludge - should
- restore it from saved ucontext. Oh well. */
- tst->arch.vex = frame->gst;
- tst->arch.vex_shadow1 = frame->gshadow1;
- tst->arch.vex_shadow2 = frame->gshadow2;
+ /* restore the entire guest state, and shadows, from the frame. */
+ tst->arch.vex = frame->vex;
+ tst->arch.vex_shadow1 = frame->vex_shadow1;
+ tst->arch.vex_shadow2 = frame->vex_shadow2;
restore_from_ucontext(tst, &frame->fake_ucontext);
- tst->sig_mask = frame->mask;
- tst->tmp_sig_mask = frame->mask;
- sigNo = frame->sigNo_private;
+ tst->sig_mask = frame->mask;
+ tst->tmp_sig_mask = frame->mask;
+ sigNo = frame->sigNo_private;
if (VG_(clo_trace_signals))
VG_(message)(Vg_DebugMsg,
|
Author: carll
Date: Mon Jul 20 22:25:32 2015
New Revision: 15423
Log:
Patch 4 and 5 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (wil...@vn...).
Patches 4 and 5 need to be applied together. Add convenience function
for processing hwcap entries. Add logic to check for HTM support in compiler.
Bugzilla 34979
Modified:
trunk/configure.ac
trunk/none/tests/ppc32/Makefile.am
trunk/none/tests/ppc64/Makefile.am
trunk/none/tests/ppc64/test_tm.c
trunk/none/tests/ppc64/test_touch_tm.c
Modified: trunk/configure.ac
==============================================================================
--- trunk/configure.ac (original)
+++ trunk/configure.ac Mon Jul 20 22:25:32 2015
@@ -1264,6 +1264,28 @@
[],
[#include <pthread.h>])
+# Convenience function. Set flags based on the existing HWCAP entries.
+# The AT_HWCAP entries are generated by glibc, and are based on
+# functions supported by the hardware/system/libc.
+# Subsequent support for whether the capability will actually be utilized
+# will also be checked against the compiler capabilities.
+# called as
+# AC_HWCAP_CONTAINS_FLAG[hwcap_string_to_match],[VARIABLE_TO_SET]
+AC_DEFUN([AC_HWCAP_CONTAINS_FLAG],[
+ AUXV_CHECK_FOR=$1
+ AC_MSG_CHECKING([if AT_HWCAP contains the $AUXV_CHECK_FOR indicator])
+ if `LD_SHOW_AUXV=1 /bin/true | grep ^AT_HWCAP | grep -q -w ${AUXV_CHECK_FOR}`
+ then
+ AC_MSG_RESULT([yes])
+ AC_SUBST([$2],[yes])
+ else
+ AC_MSG_RESULT([no])
+ AC_SUBST([$2],[])
+ fi
+])
+
+# gather hardware capabilities. (hardware/kernel/libc)
+AC_HWCAP_CONTAINS_FLAG([htm],[HWCAP_HAS_HTM])
# does this compiler support -maltivec and does it have the include file
# <altivec.h> ?
@@ -1386,6 +1408,42 @@
AM_CONDITIONAL(HAS_ISA_2_07, test x$ac_asm_have_isa_2_07 = xyes)
+# HTM (Hardware Transactional Memory)
+AC_MSG_CHECKING([if compiler accepts the -mhtm flag])
+safe_CFLAGS=$CFLAGS
+CFLAGS="-mhtm -Werror"
+AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
+]], [[
+ return 0;
+]])], [
+AC_MSG_RESULT([yes])
+ac_compiler_supports_htm=yes
+], [
+AC_MSG_RESULT([no])
+ac_compiler_supports_htm=no
+])
+CFLAGS=$safe_CFLAGS
+
+AC_MSG_CHECKING([if compiler can find the htm builtins])
+safe_CFLAGS=$CFLAGS
+CFLAGS="-mhtm -Werror"
+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
+ ]], [[
+ if (__builtin_tbegin (0))
+ __builtin_tend (0);
+ ]])], [
+ AC_MSG_RESULT([yes])
+ac_compiler_sees_htm_builtins=yes
+ ], [
+ AC_MSG_RESULT([no])
+ac_compiler_sees_htm_builtins=no
+ ])
+CFLAGS=$safe_CFLAGS
+
+AM_CONDITIONAL(SUPPORTS_HTM, test x$ac_compiler_supports_htm = xyes \
+ -a x$ac_compiler_sees_htm_builtins = xyes \
+ -a x$HWCAP_HAS_HTM = xyes )
+
# Check for pthread_create@GLIBC2.0
AC_MSG_CHECKING([for pthread_create@GLIBC2.0()])
Modified: trunk/none/tests/ppc32/Makefile.am
==============================================================================
--- trunk/none/tests/ppc32/Makefile.am (original)
+++ trunk/none/tests/ppc32/Makefile.am Mon Jul 20 22:25:32 2015
@@ -99,13 +99,17 @@
endif
if HAS_ISA_2_07
-BUILD_FLAGS_ISA_2_07 = -mhtm -mcpu=power8
+BUILD_FLAGS_ISA_2_07 = -mcpu=power8
ISA_2_07_FLAG = -DHAS_ISA_2_07
else
BUILD_FLAGS_ISA_2_07 =
ISA_2_07_FLAG =
endif
+if SUPPORTS_HTM
+HTM_FLAG = -mhtm -DSUPPORTS_HTM
+endif
+
jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames \
@FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_ALTIVEC)
@@ -141,9 +145,9 @@
test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
-test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
+test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_2_07_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
-test_touch_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
+test_touch_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_2_07_FLAG) \
@FLAG_M32@ $(BUILD_FLAGS_ISA_2_07)
test_isa_2_06_part3_LDADD = -lm
Modified: trunk/none/tests/ppc64/Makefile.am
==============================================================================
--- trunk/none/tests/ppc64/Makefile.am (original)
+++ trunk/none/tests/ppc64/Makefile.am Mon Jul 20 22:25:32 2015
@@ -75,13 +75,17 @@
endif
if HAS_ISA_2_07
-BUILD_FLAGS_ISA_2_07 = -mhtm -mcpu=power8
+BUILD_FLAGS_ISA_2_07 = -mcpu=power8
ISA_2_07_FLAG = -DHAS_ISA_2_07
else
BUILD_FLAGS_ISA_2_07 =
ISA_2_07_FLAG =
endif
+if SUPPORTS_HTM
+HTM_FLAG = -mhtm -DSUPPORTS_HTM
+endif
+
test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \
@FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX)
@@ -114,9 +118,9 @@
test_isa_2_07_part2_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
-test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
+test_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_2_07_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
-test_touch_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(ISA_2_07_FLAG) \
+test_touch_tm_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(HTM_FLAG) $(ISA_2_07_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_ISA_2_07)
test_isa_2_06_part3_LDADD = -lm
Modified: trunk/none/tests/ppc64/test_tm.c
==============================================================================
--- trunk/none/tests/ppc64/test_tm.c (original)
+++ trunk/none/tests/ppc64/test_tm.c Mon Jul 20 22:25:32 2015
@@ -1,5 +1,5 @@
#include <stdio.h>
-#ifdef HAS_ISA_2_07
+#ifdef SUPPORTS_HTM
int __attribute__ ((noinline)) htm_begin (int r3, int r4)
{
int ret;
@@ -14,10 +14,12 @@
#endif
int main (void) {
-#ifdef HAS_ISA_2_07
+#ifdef SUPPORTS_HTM
int ret;
ret = htm_begin (10, 20);
printf ("ret = %d, expected = 10\n", ret);
+#else
+ printf ("No HTM support.");
#endif
return 0;
}
Modified: trunk/none/tests/ppc64/test_touch_tm.c
==============================================================================
--- trunk/none/tests/ppc64/test_touch_tm.c (original)
+++ trunk/none/tests/ppc64/test_touch_tm.c Mon Jul 20 22:25:32 2015
@@ -1,7 +1,7 @@
#include <stdio.h>
int main (void) {
-#ifdef HAS_ISA_2_07
+#ifdef SUPPORTS_HTM
/* Just get the compiler to generate each of the TM instructions
* so we can verify that valgrind recognizes them.
* For now, only the tbegin instruction does anything in valgrind.
@@ -18,6 +18,8 @@
__builtin_trechkpt (); // not recognized by early HW
__builtin_treclaim (0); // not recognized by early HW
__builtin_tsr (0);
+#else
+ printf ("No HTM support.");
#endif
return 0;
}
|
|
From: <sv...@va...> - 2015-07-22 09:02:58
|
Author: carll
Date: Mon Jul 20 20:36:53 2015
New Revision: 15421
Log:
Patch 2 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (wil...@vn...).
Update all vgtest files to reference the new capability check helper.
This includes a few adjustments to ensure the test is checking for
the specific capability. I.e. isa_2_07 is a requirement for htm, but
does not indicate htm support is actually present.
Bugzilla 34979
Modified:
trunk/memcheck/tests/ppc32/power_ISA2_07.vgtest
trunk/memcheck/tests/ppc64/power_ISA2_07.vgtest
trunk/none/tests/ppc32/bug129390-ppc32.vgtest
trunk/none/tests/ppc32/jm-vmx.vgtest
trunk/none/tests/ppc32/jm_fp_isa_2_07.vgtest
trunk/none/tests/ppc32/jm_int_isa_2_07.vgtest
trunk/none/tests/ppc32/jm_vec_isa_2_07.vgtest
trunk/none/tests/ppc32/testVMX.vgtest
trunk/none/tests/ppc32/test_dfp1.vgtest
trunk/none/tests/ppc32/test_dfp2.vgtest
trunk/none/tests/ppc32/test_dfp3.vgtest
trunk/none/tests/ppc32/test_dfp4.vgtest
trunk/none/tests/ppc32/test_dfp5.vgtest
trunk/none/tests/ppc32/test_isa_2_06_part1.vgtest
trunk/none/tests/ppc32/test_isa_2_06_part2.vgtest
trunk/none/tests/ppc32/test_isa_2_06_part3.vgtest
trunk/none/tests/ppc32/test_isa_2_07_part2.vgtest
trunk/none/tests/ppc32/test_tm.vgtest
trunk/none/tests/ppc32/test_touch_tm.vgtest
trunk/none/tests/ppc64/jm-vmx.vgtest
trunk/none/tests/ppc64/jm_fp_isa_2_07.vgtest
trunk/none/tests/ppc64/jm_int_isa_2_07.vgtest
trunk/none/tests/ppc64/jm_vec_isa_2_07.vgtest
trunk/none/tests/ppc64/test_dfp1.vgtest
trunk/none/tests/ppc64/test_dfp2.vgtest
trunk/none/tests/ppc64/test_dfp3.vgtest
trunk/none/tests/ppc64/test_dfp4.vgtest
trunk/none/tests/ppc64/test_dfp5.vgtest
trunk/none/tests/ppc64/test_isa_2_06_part1.vgtest
trunk/none/tests/ppc64/test_isa_2_06_part2.vgtest
trunk/none/tests/ppc64/test_isa_2_06_part3.vgtest
trunk/none/tests/ppc64/test_isa_2_07_part2.vgtest
trunk/none/tests/ppc64/test_tm.vgtest
trunk/none/tests/ppc64/test_touch_tm.vgtest
trunk/tests/check_ppc64_auxv_cap (props changed)
Modified: trunk/memcheck/tests/ppc32/power_ISA2_07.vgtest
==============================================================================
--- trunk/memcheck/tests/ppc32/power_ISA2_07.vgtest (original)
+++ trunk/memcheck/tests/ppc32/power_ISA2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,3 +1,3 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: power_ISA2_07
-vgopts:
+vgopts:
Modified: trunk/memcheck/tests/ppc64/power_ISA2_07.vgtest
==============================================================================
--- trunk/memcheck/tests/ppc64/power_ISA2_07.vgtest (original)
+++ trunk/memcheck/tests/ppc64/power_ISA2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,3 +1,3 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: power_ISA2_07
vgopts:
Modified: trunk/none/tests/ppc32/bug129390-ppc32.vgtest
==============================================================================
--- trunk/none/tests/ppc32/bug129390-ppc32.vgtest (original)
+++ trunk/none/tests/ppc32/bug129390-ppc32.vgtest Mon Jul 20 20:36:53 2015
@@ -1,3 +1,3 @@
-prereq: ../../../tests/check_vmx_cap
+prereq: ../../../tests/check_ppc64_auxv_cap altivec
prog: bug129390-ppc32
vgopts: -q
Modified: trunk/none/tests/ppc32/jm-vmx.vgtest
==============================================================================
--- trunk/none/tests/ppc32/jm-vmx.vgtest (original)
+++ trunk/none/tests/ppc32/jm-vmx.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_vmx_cap
+prereq: ../../../tests/check_ppc64_auxv_cap altivec
prog: jm-insns -a
Modified: trunk/none/tests/ppc32/jm_fp_isa_2_07.vgtest
==============================================================================
--- trunk/none/tests/ppc32/jm_fp_isa_2_07.vgtest (original)
+++ trunk/none/tests/ppc32/jm_fp_isa_2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part1 -f
Modified: trunk/none/tests/ppc32/jm_int_isa_2_07.vgtest
==============================================================================
--- trunk/none/tests/ppc32/jm_int_isa_2_07.vgtest (original)
+++ trunk/none/tests/ppc32/jm_int_isa_2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part1 -i
Modified: trunk/none/tests/ppc32/jm_vec_isa_2_07.vgtest
==============================================================================
--- trunk/none/tests/ppc32/jm_vec_isa_2_07.vgtest (original)
+++ trunk/none/tests/ppc32/jm_vec_isa_2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap && ! ../../../tests/check_ppc64le_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part1 -a
Modified: trunk/none/tests/ppc32/testVMX.vgtest
==============================================================================
--- trunk/none/tests/ppc32/testVMX.vgtest (original)
+++ trunk/none/tests/ppc32/testVMX.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_vmx_cap
+prereq: ../../../tests/check_ppc64_auxv_cap altivec
prog: testVMX
Modified: trunk/none/tests/ppc32/test_dfp1.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_dfp1.vgtest (original)
+++ trunk/none/tests/ppc32/test_dfp1.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp1
Modified: trunk/none/tests/ppc32/test_dfp2.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_dfp2.vgtest (original)
+++ trunk/none/tests/ppc32/test_dfp2.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp2
Modified: trunk/none/tests/ppc32/test_dfp3.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_dfp3.vgtest (original)
+++ trunk/none/tests/ppc32/test_dfp3.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp3
Modified: trunk/none/tests/ppc32/test_dfp4.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_dfp4.vgtest (original)
+++ trunk/none/tests/ppc32/test_dfp4.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp4
Modified: trunk/none/tests/ppc32/test_dfp5.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_dfp5.vgtest (original)
+++ trunk/none/tests/ppc32/test_dfp5.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp5
Modified: trunk/none/tests/ppc32/test_isa_2_06_part1.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_isa_2_06_part1.vgtest (original)
+++ trunk/none/tests/ppc32/test_isa_2_06_part1.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_06_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_06
prog: test_isa_2_06_part1
Modified: trunk/none/tests/ppc32/test_isa_2_06_part2.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_isa_2_06_part2.vgtest (original)
+++ trunk/none/tests/ppc32/test_isa_2_06_part2.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_06_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_06
prog: test_isa_2_06_part2
Modified: trunk/none/tests/ppc32/test_isa_2_06_part3.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_isa_2_06_part3.vgtest (original)
+++ trunk/none/tests/ppc32/test_isa_2_06_part3.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_06_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_06
prog: test_isa_2_06_part3
Modified: trunk/none/tests/ppc32/test_isa_2_07_part2.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_isa_2_07_part2.vgtest (original)
+++ trunk/none/tests/ppc32/test_isa_2_07_part2.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part2
Modified: trunk/none/tests/ppc32/test_tm.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_tm.vgtest (original)
+++ trunk/none/tests/ppc32/test_tm.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap htm
prog: test_tm
Modified: trunk/none/tests/ppc32/test_touch_tm.vgtest
==============================================================================
--- trunk/none/tests/ppc32/test_touch_tm.vgtest (original)
+++ trunk/none/tests/ppc32/test_touch_tm.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap htm
prog: test_touch_tm
Modified: trunk/none/tests/ppc64/jm-vmx.vgtest
==============================================================================
--- trunk/none/tests/ppc64/jm-vmx.vgtest (original)
+++ trunk/none/tests/ppc64/jm-vmx.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_vmx_cap
+prereq: ../../../tests/check_ppc64_auxv_cap altivec
prog: jm-insns -a
Modified: trunk/none/tests/ppc64/jm_fp_isa_2_07.vgtest
==============================================================================
--- trunk/none/tests/ppc64/jm_fp_isa_2_07.vgtest (original)
+++ trunk/none/tests/ppc64/jm_fp_isa_2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part1 -f
Modified: trunk/none/tests/ppc64/jm_int_isa_2_07.vgtest
==============================================================================
--- trunk/none/tests/ppc64/jm_int_isa_2_07.vgtest (original)
+++ trunk/none/tests/ppc64/jm_int_isa_2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part1 -i
Modified: trunk/none/tests/ppc64/jm_vec_isa_2_07.vgtest
==============================================================================
--- trunk/none/tests/ppc64/jm_vec_isa_2_07.vgtest (original)
+++ trunk/none/tests/ppc64/jm_vec_isa_2_07.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part1 -a
Modified: trunk/none/tests/ppc64/test_dfp1.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_dfp1.vgtest (original)
+++ trunk/none/tests/ppc64/test_dfp1.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp1
Modified: trunk/none/tests/ppc64/test_dfp2.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_dfp2.vgtest (original)
+++ trunk/none/tests/ppc64/test_dfp2.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp2
Modified: trunk/none/tests/ppc64/test_dfp3.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_dfp3.vgtest (original)
+++ trunk/none/tests/ppc64/test_dfp3.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp3
Modified: trunk/none/tests/ppc64/test_dfp4.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_dfp4.vgtest (original)
+++ trunk/none/tests/ppc64/test_dfp4.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp4
Modified: trunk/none/tests/ppc64/test_dfp5.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_dfp5.vgtest (original)
+++ trunk/none/tests/ppc64/test_dfp5.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_dfp_cap
+prereq: ../../../tests/check_ppc64_auxv_cap dfp
prog: test_dfp5
Modified: trunk/none/tests/ppc64/test_isa_2_06_part1.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_isa_2_06_part1.vgtest (original)
+++ trunk/none/tests/ppc64/test_isa_2_06_part1.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_06_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_06
prog: test_isa_2_06_part1
Modified: trunk/none/tests/ppc64/test_isa_2_06_part2.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_isa_2_06_part2.vgtest (original)
+++ trunk/none/tests/ppc64/test_isa_2_06_part2.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_06_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_06
prog: test_isa_2_06_part2
Modified: trunk/none/tests/ppc64/test_isa_2_06_part3.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_isa_2_06_part3.vgtest (original)
+++ trunk/none/tests/ppc64/test_isa_2_06_part3.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_06_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_06
prog: test_isa_2_06_part3
Modified: trunk/none/tests/ppc64/test_isa_2_07_part2.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_isa_2_07_part2.vgtest (original)
+++ trunk/none/tests/ppc64/test_isa_2_07_part2.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: test_isa_2_07_part2
Modified: trunk/none/tests/ppc64/test_tm.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_tm.vgtest (original)
+++ trunk/none/tests/ppc64/test_tm.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap htm
prog: test_tm
Modified: trunk/none/tests/ppc64/test_touch_tm.vgtest
==============================================================================
--- trunk/none/tests/ppc64/test_touch_tm.vgtest (original)
+++ trunk/none/tests/ppc64/test_touch_tm.vgtest Mon Jul 20 20:36:53 2015
@@ -1,2 +1,2 @@
-prereq: ../../../tests/check_isa-2_07_cap
+prereq: ../../../tests/check_ppc64_auxv_cap htm
prog: test_touch_tm
|
|
From: <sv...@va...> - 2015-07-22 09:02:55
|
Author: rhyskidd
Date: Sun Jul 19 08:19:54 2015
New Revision: 15417
Log:
Block the running of a known hanging regression test on OS X. Partial fix for bz#344416, and related to BZ#216837.
Modified:
trunk/helgrind/tests/pth_cond_destroy_busy.vgtest
Modified: trunk/helgrind/tests/pth_cond_destroy_busy.vgtest
==============================================================================
--- trunk/helgrind/tests/pth_cond_destroy_busy.vgtest (original)
+++ trunk/helgrind/tests/pth_cond_destroy_busy.vgtest Sun Jul 19 08:19:54 2015
@@ -1 +1,2 @@
+prereq: ! `../../tests/os_test darwin`
prog: ../../drd/tests/pth_cond_destroy_busy
|
|
From: <sv...@va...> - 2015-07-22 09:02:55
|
Author: carll
Date: Mon Jul 20 21:36:47 2015
New Revision: 15422
Log:
Patch 3 of 7, improve PPC HW capabiltiy checking.
The patch was submitted by Will Schmidt (wil...@vn...).
remove unused capability checking scripts.
these have been replaced by the check_ppc64_auxv_cap script.
change tests/check_ppc64_auxv_cap to executable. Tried to make it
executable on the last commit but for some reason it didn't seem to suceed.
Bugzilla 34979
Removed:
trunk/tests/check_dfp_cap
trunk/tests/check_isa-2_06_cap
trunk/tests/check_isa-2_07_cap
trunk/tests/check_vmx_cap
Modified:
trunk/tests/Makefile.am
trunk/tests/check_ppc64_auxv_cap (props changed)
Modified: trunk/tests/Makefile.am
==============================================================================
--- trunk/tests/Makefile.am (original)
+++ trunk/tests/Makefile.am Mon Jul 20 21:36:47 2015
@@ -3,11 +3,7 @@
dist_noinst_SCRIPTS = \
check_headers_and_includes \
- check_isa-2_06_cap \
- check_isa-2_07_cap \
check_makefile_consistency \
- check_dfp_cap \
- check_vmx_cap \
check_ppc64_auxv_cap \
filter_addresses \
filter_discards \
Removed: trunk/tests/check_dfp_cap
==============================================================================
--- trunk/tests/check_dfp_cap (original)
+++ trunk/tests/check_dfp_cap (removed)
@@ -1,10 +0,0 @@
-#!/bin/sh
-
-# We use this script to check whether or not the processor supports Decimal Floating Point (DFP).
-
-LD_SHOW_AUXV=1 /bin/true | grep dfp > /dev/null 2>&1
-if [ "$?" -ne "0" ]; then
- exit 1
-else
- exit 0
-fi
Removed: trunk/tests/check_isa-2_06_cap
==============================================================================
--- trunk/tests/check_isa-2_06_cap (original)
+++ trunk/tests/check_isa-2_06_cap (removed)
@@ -1,12 +0,0 @@
-#!/bin/sh
-
-# We use this script to check whether or not the processor supports Power ISA 2.06 or later.
-DIR="$( cd "$( dirname "$0" )" && pwd )"
-LD_SHOW_AUXV=1 /bin/true | grep arch_2_06 > /dev/null 2>&1
-
-if [ "$?" -ne "0" ]; then
- exit 1
-else
- exit 0
-fi
-
Removed: trunk/tests/check_isa-2_07_cap
==============================================================================
--- trunk/tests/check_isa-2_07_cap (original)
+++ trunk/tests/check_isa-2_07_cap (removed)
@@ -1,12 +0,0 @@
-#!/bin/sh
-
-# We use this script to check whether or not the processor supports
-# Power ISA 2.07.
-DIR="$( cd "$( dirname "$0" )" && pwd )"
-LD_SHOW_AUXV=1 /bin/true | grep arch_2_07 > /dev/null 2>&1
-
-if [ "$?" -ne "0" ]; then
- exit 1
-else
- exit 0
-fi
Removed: trunk/tests/check_vmx_cap
==============================================================================
--- trunk/tests/check_vmx_cap (original)
+++ trunk/tests/check_vmx_cap (removed)
@@ -1,11 +0,0 @@
-#!/bin/sh
-
-# We use this script to check whether or not the processor supports VMX (aka "Altivec").
-
-LD_SHOW_AUXV=1 /bin/true | grep altivec > /dev/null 2>&1
-if [ "$?" -ne "0" ]; then
- exit 1
-else
- exit 0
-fi
-
|