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From: <sv...@va...> - 2015-04-22 21:17:56
|
Author: carll
Date: Wed Apr 22 22:17:48 2015
New Revision: 15136
Log:
There is an ABI change in how the PPC64 gcc compiler handles 128 bit arguments
are aligned with GCC 5.0. The compiler generates a "note" about this starting
with GCC 4.9. To avoid generating the "note", the passing of the arguments
were changed to a pointer to make it pass by reference rather then pass by
value.
bugzilla 346487.
Modified:
trunk/NEWS
trunk/none/tests/ppc32/test_dfp4.c
trunk/none/tests/ppc32/test_dfp5.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Wed Apr 22 22:17:48 2015
@@ -164,6 +164,8 @@
346416 Add support for LL_IOC_PATH2FID and LL_IOC_GETPARENT Lustre ioctls
n-i-bz Enable rt_sigpending syscall on ppc64 linux.
346474 Added support for accessing the PPC64 TEXASRU register
+346487 Change PPC64 function calls with 128-bit values to use a pointer so
+ the compiler will not generate a note about an ABI change.
Release 3.10.1 (25 November 2014)
Modified: trunk/none/tests/ppc32/test_dfp4.c
==============================================================================
--- trunk/none/tests/ppc32/test_dfp4.c (original)
+++ trunk/none/tests/ppc32/test_dfp4.c Wed Apr 22 22:17:48 2015
@@ -93,9 +93,9 @@
* BF is the condition register bit field which can range from 0-7. But for
* testing purposes, we only use BF values of '0' and '5'.
*/
-static void _test_dtstdc(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused)))
+static void _test_dtstdc(int BF, int DCM, dfp_val_t *val1, dfp_val_t *x1 __attribute__((unused)))
{
- _Decimal64 f14 = val1.dec_val;
+ _Decimal64 f14 = val1->dec_val;
if (DCM < 0 || DCM > 5 || !(BF == 0 || BF == 5)) {
fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DCM);
return;
@@ -142,9 +142,9 @@
}
}
-static void _test_dtstdcq(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused)))
+static void _test_dtstdcq(int BF, int DCM, dfp_val_t *val1, dfp_val_t *x1 __attribute__((unused)))
{
- _Decimal128 f14 = val1.dec_val128;
+ _Decimal128 f14 = val1->dec_val128;
if (DCM < 0 || DCM > 5 || !(BF == 0 || BF == 5)) {
fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DCM);
return;
@@ -197,9 +197,9 @@
* BF is the condition register bit field which can range from 0-7. But for
* testing purposes, we only use BF values of '0' and '5'.
*/
-static void _test_dtstdg(int BF, int DGM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused)))
+static void _test_dtstdg(int BF, int DGM, dfp_val_t *val1, dfp_val_t *x1 __attribute__((unused)))
{
- _Decimal64 f14 = val1.dec_val;
+ _Decimal64 f14 = val1->dec_val;
if (DGM < 0 || DGM > 5 || !(BF == 0 || BF == 5)) {
fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DGM);
return;
@@ -246,9 +246,9 @@
}
}
-static void _test_dtstdgq(int BF, int DGM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused)))
+static void _test_dtstdgq(int BF, int DGM, dfp_val_t *val1, dfp_val_t *x1 __attribute__((unused)))
{
- _Decimal128 f14 = val1.dec_val128;
+ _Decimal128 f14 = val1->dec_val128;
if (DGM < 0 || DGM > 5 || !(BF == 0 || BF == 5)) {
fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DGM);
return;
@@ -300,10 +300,10 @@
* from 0-7, but for testing purposes, we only use BF values of '4' and '7'.
*/
static void
-_test_dtstex(int BF, int x __attribute__((unused)), dfp_val_t val1, dfp_val_t val2)
+_test_dtstex(int BF, int x __attribute__((unused)), dfp_val_t *val1, dfp_val_t *val2)
{
- _Decimal64 f14 = val1.dec_val;
- _Decimal64 f16 = val2.dec_val;
+ _Decimal64 f14 = val1->dec_val;
+ _Decimal64 f16 = val2->dec_val;
if (!(BF == 4 || BF == 7)) {
fprintf(stderr, "Invalid input to asm test: a=%d\n", BF);
return;
@@ -320,10 +320,10 @@
}
}
-static void _test_dtstexq(int BF, int x __attribute__((unused)), dfp_val_t val1, dfp_val_t val2)
+static void _test_dtstexq(int BF, int x __attribute__((unused)), dfp_val_t *val1, dfp_val_t *val2)
{
- _Decimal128 f14 = val1.dec_val128;
- _Decimal128 f16 = val2.dec_val128;
+ _Decimal128 f14 = val1->dec_val128;
+ _Decimal128 f16 = val2->dec_val128;
if (!(BF == 4 || BF == 7)) {
fprintf(stderr, "Invalid input to asm test: a=%d\n", BF);
return;
@@ -342,7 +342,7 @@
-typedef void (*test_func_t)(int a, int b, dfp_val_t val1, dfp_val_t val2);
+typedef void (*test_funcp_t)(int a, int b, dfp_val_t *val1, dfp_val_t *val2);
typedef void (*test_driver_func_t)(void);
typedef struct test_table
{
@@ -454,7 +454,7 @@
typedef struct dfp_test
{
- test_func_t test_func;
+ test_funcp_t test_func;
const char * name;
dfp_test_args_t * targs;
int num_tests;
@@ -464,7 +464,7 @@
typedef struct dfp_one_arg_test
{
- test_func_t test_func;
+ test_funcp_t test_func;
const char * name;
precision_type_t precision;
const char * op;
@@ -483,7 +483,7 @@
static void test_dfp_ClassAndGroupTest_ops(void)
{
- test_func_t func;
+ test_funcp_t func;
dfp_val_t test_val, dummy;
int k = 0;
@@ -509,7 +509,13 @@
unsigned int flags;
SET_FPSCR_ZERO;
SET_CR_XER_ZERO;
- (*func)(BF, data_class_OR_group, test_val, dummy);
+
+ /* There is an ABI change in how 128 bit arguments are aligned
+ * with GCC 5.0. The compiler generates a "note" about this
+ * starting with GCC 4.8. To avoid generating the "note", pass
+ * the address of the 128-bit arguments rather then the value.
+ */
+ (*func)(BF, data_class_OR_group, &test_val, &dummy);
GET_CR(flags);
condreg = ((flags >> (4 * (7-BF)))) & 0xf;
@@ -547,7 +553,7 @@
static void test_dfp_ExpTest_ops(void)
{
dfp_val_t test_val1, test_val2;
- test_func_t func;
+ test_funcp_t func;
int k = 0;
while ((func = dfp_ExpTest_tests[k].test_func)) {
@@ -577,7 +583,12 @@
SET_FPSCR_ZERO;
SET_CR_XER_ZERO;
- (*func)(BF, 0, test_val1, test_val2);
+ /* There is an ABI change in how 128 bit arguments are aligned
+ * with GCC 5.0. The compiler generates a "note" about this
+ * starting with GCC 4.8. To avoid generating the "note", pass
+ * the address of the 128-bit arguments rather then the value.
+ */
+ (*func)(BF, 0, &test_val1, &test_val2);
GET_CR(flags);
condreg = ((flags >> (4 * (7-BF)))) & 0xf;
Modified: trunk/none/tests/ppc32/test_dfp5.c
==============================================================================
--- trunk/none/tests/ppc32/test_dfp5.c (original)
+++ trunk/none/tests/ppc32/test_dfp5.c Wed Apr 22 22:17:48 2015
@@ -93,9 +93,9 @@
enum BF_vals { BF_val1 = 0, BF_val2 = 1, BF_val3 =6};
// The assembly-level instructions being tested
-static void _test_dtstsf(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
+static void _test_dtstsf(unsigned int BF, unsigned int ref_sig, dfp_val_t *valB)
{
- _Decimal64 f16 = valB.dec_val;
+ _Decimal64 f16 = valB->dec_val;
register HWord_t r14 __asm__ ("r14");
double f14;
r14 = (HWord_t)&ref_sig;
@@ -117,9 +117,9 @@
}
}
-static void _test_dtstsfq(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
+static void _test_dtstsfq(unsigned int BF, unsigned int ref_sig, dfp_val_t *valB)
{
- _Decimal128 f16 = valB.dec_val128;
+ _Decimal128 f16 = valB->dec_val128;
register HWord_t r14 __asm__ ("r14");
double f14;
r14 = (HWord_t)&ref_sig;
@@ -141,11 +141,11 @@
}
}
-static dfp_val_t _test_ddedpd(unsigned int SP, dfp_val_t valB)
+static dfp_val_t _test_ddedpd(unsigned int SP, dfp_val_t *valB)
{
_Decimal64 ret = 0;
dfp_val_t result;
- _Decimal64 f16 = valB.dec_val;
+ _Decimal64 f16 = valB->dec_val;
switch (SP) {
case 0:
__asm__ __volatile__ ("ddedpd. 0, %0, %1" : "=f" (ret) : "f" (f16));
@@ -168,11 +168,11 @@
}
-static dfp_val_t _test_ddedpdq(unsigned int SP, dfp_val_t valB)
+static dfp_val_t _test_ddedpdq(unsigned int SP, dfp_val_t *valB)
{
_Decimal128 ret = 0;
dfp_val_t result;
- _Decimal128 f16 = valB.dec_val128;
+ _Decimal128 f16 = valB->dec_val128;
switch (SP) {
case 0:
__asm__ __volatile__ ("ddedpdq 0, %0, %1" : "=f" (ret) : "f" (f16));
@@ -194,11 +194,11 @@
return result;
}
-static dfp_val_t _test_denbcd(unsigned int S, dfp_val_t valB)
+static dfp_val_t _test_denbcd(unsigned int S, dfp_val_t *valB)
{
_Decimal64 ret = 0;
dfp_val_t result;
- _Decimal64 f16 = valB.dec_val;
+ _Decimal64 f16 = valB->dec_val;
switch (S) {
case 0:
__asm__ __volatile__ ("denbcd. 0, %0, %1" : "=f" (ret) : "f" (f16));
@@ -215,11 +215,11 @@
}
-static dfp_val_t _test_denbcdq(unsigned int S, dfp_val_t valB)
+static dfp_val_t _test_denbcdq(unsigned int S, dfp_val_t *valB)
{
_Decimal128 ret = 0;
dfp_val_t result;
- _Decimal128 f16 = valB.dec_val128;
+ _Decimal128 f16 = valB->dec_val128;
switch (S) {
case 0:
__asm__ __volatile__ ("denbcdq 0, %0, %1" : "=f" (ret) : "f" (f16));
@@ -236,8 +236,8 @@
}
-typedef void (*test_func_t)(unsigned int imm, unsigned int imm2, dfp_val_t valB);
-typedef dfp_val_t (*test_func_bcd_t)(unsigned int imm, dfp_val_t valB);
+typedef void (*test_funcp_t)(unsigned int imm, unsigned int imm2, dfp_val_t *valB);
+typedef dfp_val_t (*test_func_bcdp_t)(unsigned int imm, dfp_val_t *valB);
typedef void (*test_driver_func_t)(void);
typedef struct test_table
{
@@ -384,7 +384,7 @@
typedef struct dfp_one_arg_test
{
- test_func_t test_func;
+ test_funcp_t test_func;
const char * name;
precision_type_t precision;
const char * op;
@@ -392,7 +392,7 @@
typedef struct dfp_one_arg_bcd_test
{
- test_func_bcd_t test_func;
+ test_func_bcdp_t test_func;
const char * name;
precision_type_t precision;
const char * op;
@@ -407,7 +407,7 @@
static void test_dfp_ddedpd_ops(void)
{
- test_func_bcd_t func;
+ test_func_bcdp_t func;
dfp_val_t test_val;
int k = 0;
@@ -428,7 +428,13 @@
for (SP = 0; SP < 4; SP++) {
dfp_val_t result;
- result = (*func)(SP, test_val);
+
+ /* There is an ABI change in how 128 bit arguments are aligned
+ * with GCC 5.0. The compiler generates a "note" about this
+ * starting with GCC 4.8. To avoid generating the "note", pass
+ * the address of the 128-bit arguments rather then the value.
+ */
+ result = (*func)(SP, &test_val);
printf("%s (SP=%d) %s", test_def.name, SP, test_def.op);
if (test_def.precision == LONG_TEST) {
printf("%016llx ==> %016llx\n", test_val.u64_val, result.u64_val);
@@ -453,7 +459,7 @@
static void test_dfp_denbcd_ops(void)
{
- test_func_bcd_t func;
+ test_func_bcdp_t func;
dfp_val_t test_val;
int num_test_vals;
@@ -490,7 +496,12 @@
test_val.u128.vall = bcd128_vals[(i * 2) + 1];
}
- result = (*func)(S, test_val);
+ /* There is an API change in how 128 bit arguments are aligned
+ * with GCC 5.0. The compiler generates a "note" about this
+ * starting with GCC 4.8. To avoid generating the "note", pass
+ * the address of the 128-bit arguments rather then the value.
+ */
+ result = (*func)(S, &test_val);
printf("%s (S=%d) %s", test_def.name, S, test_def.op);
if (test_def.precision == LONG_TEST) {
printf("%016llx ==> %016llx\n", test_val.u64_val, result.u64_val);
@@ -516,7 +527,7 @@
static void test_dfp_test_significance_ops(void)
{
- test_func_t func;
+ test_funcp_t func;
dfp_val_t test_valB;
int k = 0;
unsigned int BF_vals[] = {BF_val1, BF_val2, BF_val3};
@@ -545,7 +556,12 @@
BF = BF_vals[bf_idx];
SET_FPSCR_ZERO;
SET_CR_XER_ZERO;
- (*func)(BF, reference_sig, test_valB);
+ /* There is an ABI change in how 128 bit arguments are aligned
+ * with GCC 5.0. The compiler generates a "note" about this
+ * starting with GCC 4.9. To avoid generating the "note", pass
+ * the address of the 128-bit arguments rather then the value.
+ */
+ (*func)(BF, reference_sig, &test_valB);
GET_CR(flags);
condreg = ((flags >> (4 * (7-BF)))) & 0xf;
|
|
From: Carl E. L. <ce...@us...> - 2015-04-22 20:22:25
|
On Sun, 2015-04-19 at 07:57 -0700, Patrick J. LoPresti wrote: > On Sat, Apr 18, 2015 at 3:47 AM, Florian Krohm <fl...@ei...> wrote: > > > > What you describe would work but require additional configury. And that > > is something I would like to avoid. We already have 3000 lines of it. > > If will be less work to simply modify the test to not pass these values > > as function arguments. > > Assuming that is possible, I agree. Although even that demands > cluttering the source with a long comment if the needed approach is > unnatural. > > When it is impossible or inconvenient to modify the source, the > approach I have seen is to place all such warning suppressions in one > header file. And then dispatch on the compiler version in that header > (not in the configure script). Something like > <http://stackoverflow.com/a/18463996/768469>. > > This approach keeps the source uncluttered, and it adds little to the > testing burden since (a) it is simple enough to get right every time > and (b) these are just warning suppressions. > > This is part of the cost of keeping everything "-Wall clean" across > multiple platforms. But it is not a large cost compared to the > benefits. > > - Pat > The 128-bit function arguments are passed by value. By changing the arguments to pointers we can pass them by reference and thus avoid the compiler issue. The change is simple and doesn't impact the readability of the code. I put in a comment about why it is being passed by reference. I have changed a number of the function calls so far and it seems to take care of the issue. Just working on finishing up the rest. This source code change will fix the issue. Carl Love |
|
From: <sv...@va...> - 2015-04-22 16:28:30
|
Author: carll
Date: Wed Apr 22 17:28:22 2015
New Revision: 15135
Log:
Update NEWS file with bix for bugzilla 346474.
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Wed Apr 22 17:28:22 2015
@@ -163,6 +163,7 @@
346324 Add support for the ppc instructions lbarx, lharx, stbcs, sthcs
346416 Add support for LL_IOC_PATH2FID and LL_IOC_GETPARENT Lustre ioctls
n-i-bz Enable rt_sigpending syscall on ppc64 linux.
+346474 Added support for accessing the PPC64 TEXASRU register
Release 3.10.1 (25 November 2014)
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From: <sv...@va...> - 2015-04-22 16:17:14
|
Author: carll
Date: Wed Apr 22 17:17:06 2015
New Revision: 15134
Log:
Add support for the TEXASRU register. This register contains information on
transactional memory instruction summary information. This register contains
the upper 32-bits of the transaction information. Note, the valgrind
implementation of transactional memory instructions is limited. Currently, the
contents of the TEXASRU register will always return 0. The lower 64-bits of
the trasnaction information in the TEXASR register will contain the failure
information as setup by Valgrind.
The vex commit 3143 contains the changes needed to support the TEXASRU
register on PPC64.
The support requires changing the value of MAX_REG_WRITE_SIZE in
memcheck/mc_main.c from 1696 to 1712. The change is made in this
valgrind commit.
This patch addresses Bugzilla 346474
Modified:
trunk/memcheck/mc_main.c
Modified: trunk/memcheck/mc_main.c
==============================================================================
--- trunk/memcheck/mc_main.c (original)
+++ trunk/memcheck/mc_main.c Wed Apr 22 17:17:06 2015
@@ -4142,7 +4142,7 @@
static void mc_post_reg_write ( CorePart part, ThreadId tid,
PtrdiffT offset, SizeT size)
{
-# define MAX_REG_WRITE_SIZE 1696
+# define MAX_REG_WRITE_SIZE 1712
UChar area[MAX_REG_WRITE_SIZE];
tl_assert(size <= MAX_REG_WRITE_SIZE);
VG_(memset)(area, V_BITS8_DEFINED, size);
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From: <sv...@va...> - 2015-04-22 16:15:48
|
Author: carll
Date: Wed Apr 22 17:15:41 2015
New Revision: 3143
Log:
Add support for the TEXASRU register. This register contains information on
transactional memory instruction summary information. This register contains
the upper 32-bits of the transaction information. Note, the valgrind
implementation of transactional memory instructions is limited. Currently, the
contents of the TEXASRU register will always return 0. The lower 64-bits of
the trasnaction information in the TEXASR register will contain the failure
information as setup by Valgrind.
This commit contains the changes needed to support the TEXASRU register on
PPC64.
This support requires changing the value of MAX_REG_WRITE_SIZE in
memcheck/mc_main.c from 1696 to 1712. The change is made in the corresponding
valgrind commit.
This patch addresses Bugzilla 346474
Modified:
trunk/priv/guest_ppc_toIR.c
trunk/pub/libvex_guest_ppc32.h
trunk/pub/libvex_guest_ppc64.h
Modified: trunk/priv/guest_ppc_toIR.c
==============================================================================
--- trunk/priv/guest_ppc_toIR.c (original)
+++ trunk/priv/guest_ppc_toIR.c Wed Apr 22 17:15:41 2015
@@ -286,6 +286,7 @@
#define OFFB_NRADDR_GPR2 offsetofPPCGuestState(guest_NRADDR_GPR2)
#define OFFB_TFHAR offsetofPPCGuestState(guest_TFHAR)
#define OFFB_TEXASR offsetofPPCGuestState(guest_TEXASR)
+#define OFFB_TEXASRU offsetofPPCGuestState(guest_TEXASRU)
#define OFFB_TFIAR offsetofPPCGuestState(guest_TFIAR)
@@ -436,6 +437,7 @@
PPC_GST_TFHAR, // Transactional Failure Handler Address Register
PPC_GST_TFIAR, // Transactional Failure Instruction Address Register
PPC_GST_TEXASR, // Transactional EXception And Summary Register
+ PPC_GST_TEXASRU, // Transactional EXception And Summary Register Upper
PPC_GST_MAX
} PPC_GST;
@@ -2739,6 +2741,9 @@
case PPC_GST_TEXASR:
return IRExpr_Get( OFFB_TEXASR, ty );
+ case PPC_GST_TEXASRU:
+ return IRExpr_Get( OFFB_TEXASRU, ty );
+
case PPC_GST_TFIAR:
return IRExpr_Get( OFFB_TFIAR, ty );
@@ -2907,6 +2912,12 @@
vassert( ty_src == Ity_I64 );
stmt( IRStmt_Put( OFFB_TEXASR, src ) );
break;
+
+ case PPC_GST_TEXASRU:
+ vassert( ty_src == Ity_I32 );
+ stmt( IRStmt_Put( OFFB_TEXASRU, src ) );
+ break;
+
case PPC_GST_TFIAR:
vassert( ty_src == Ity_I64 );
stmt( IRStmt_Put( OFFB_TFIAR, src ) );
@@ -3337,9 +3348,10 @@
static void storeTMfailure( Addr64 err_address, ULong tm_reason,
Addr64 handler_address )
{
- putGST( PPC_GST_TFIAR, mkU64( err_address ) );
- putGST( PPC_GST_TEXASR, mkU64( tm_reason ) );
- putGST( PPC_GST_TFHAR, mkU64( handler_address ) );
+ putGST( PPC_GST_TFIAR, mkU64( err_address ) );
+ putGST( PPC_GST_TEXASR, mkU64( tm_reason ) );
+ putGST( PPC_GST_TEXASRU, mkU32( 0 ) );
+ putGST( PPC_GST_TFHAR, mkU64( handler_address ) );
}
/*------------------------------------------------------------*/
@@ -7115,6 +7127,10 @@
DIP("mfspr r%u (TEXASR)\n", rD_addr);
putIReg( rD_addr, getGST( PPC_GST_TEXASR) );
break;
+ case 0x83: // 131
+ DIP("mfspr r%u (TEXASRU)\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_TEXASRU) );
+ break;
case 0x100:
DIP("mfvrsave r%u\n", rD_addr);
putIReg( rD_addr, mkWidenFrom32(ty, getGST( PPC_GST_VRSAVE ),
Modified: trunk/pub/libvex_guest_ppc32.h
==============================================================================
--- trunk/pub/libvex_guest_ppc32.h (original)
+++ trunk/pub/libvex_guest_ppc32.h Wed Apr 22 17:15:41 2015
@@ -241,9 +241,10 @@
/* 1360 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
/* 1368 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1376 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
+ /* 1384 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
/* Padding to make it have an 16-aligned size */
- /* 1384 */ UInt padding2;
+ /* 1388 */ UInt padding2;
}
VexGuestPPC32State;
Modified: trunk/pub/libvex_guest_ppc64.h
==============================================================================
--- trunk/pub/libvex_guest_ppc64.h (original)
+++ trunk/pub/libvex_guest_ppc64.h Wed Apr 22 17:15:41 2015
@@ -282,6 +282,12 @@
/* 1656 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
/* 1664 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1672 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
+ /* 1680 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
+
+ /* Padding to make it have an 16-aligned size */
+ /* 1684 */ UInt padding1;
+ /* 1688 */ UInt padding2;
+ /* 1692 */ UInt padding3;
}
VexGuestPPC64State;
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From: Mark W. <mj...@re...> - 2015-04-22 15:30:12
|
On Tue, 2015-04-21 at 10:58 +0200, Thomas Huth wrote: > The following patch seems to fix this issue for me, however since I am > not very experienced with valgrind yet, could somebody please have a > closer look whether this is the right way to deal with this missing > syscall? Yes, that is the correct way. I have installed your patch as valgrind svn r15133. With it programs using sigpending work under valgrind on ppc64. Thanks, Mark |
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From: <sv...@va...> - 2015-04-22 15:29:12
|
Author: mjw
Date: Wed Apr 22 16:29:03 2015
New Revision: 15133
Log:
Enable rt_sigpending syscall on ppc64 linux.
Patch from Thomas Huth <th...@re...>
Modified:
trunk/NEWS
trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Wed Apr 22 16:29:03 2015
@@ -162,6 +162,7 @@
346267 Fix compiler warning about casting arguments, ppc64.
346324 Add support for the ppc instructions lbarx, lharx, stbcs, sthcs
346416 Add support for LL_IOC_PATH2FID and LL_IOC_GETPARENT Lustre ioctls
+n-i-bz Enable rt_sigpending syscall on ppc64 linux.
Release 3.10.1 (25 November 2014)
Modified: trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c Wed Apr 22 16:29:03 2015
@@ -988,7 +988,7 @@
LINXY(__NR_rt_sigaction, sys_rt_sigaction), // 173
LINXY(__NR_rt_sigprocmask, sys_rt_sigprocmask), // 174
-// _____(__NR_rt_sigpending, sys_rt_sigpending), // 175
+ LINXY(__NR_rt_sigpending, sys_rt_sigpending), // 175
LINXY(__NR_rt_sigtimedwait, sys_rt_sigtimedwait), // 176
LINXY(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo), // 177
LINX_(__NR_rt_sigsuspend, sys_rt_sigsuspend), // 178
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From: Florian K. <fl...@ei...> - 2015-04-22 14:20:40
|
On 22.04.2015 15:58, Julian Seward wrote: > > On 22/04/15 15:50, sv...@va... wrote: >> Author: florian >> - if (next == NULL || next->kind != SkResvn || seg->smode != SmUpper) >> + if (next == NULL || next->kind != SkResvn || next->smode != SmUpper) > > What's the severity of this? Is it a regression or was it always there? The error was in code that I had added at some point - perhaps a month ago. Not a regression. > How did you find it? I spotted it and it did not make any sense. The fix was obvious. Florian |
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From: <sv...@va...> - 2015-04-22 14:16:19
|
Author: florian
Date: Wed Apr 22 15:16:11 2015
New Revision: 15132
Log:
Rename VG_(am_is_bogus_client_stack_pointer) to
VG_(am_addr_is_in_extensible_client_stack).
Modified:
trunk/coregrind/m_aspacemgr/aspacemgr-linux.c
trunk/coregrind/m_syswrap/syswrap-main.c
trunk/coregrind/pub_core_aspacemgr.h
Modified: trunk/coregrind/m_aspacemgr/aspacemgr-linux.c
==============================================================================
--- trunk/coregrind/m_aspacemgr/aspacemgr-linux.c (original)
+++ trunk/coregrind/m_aspacemgr/aspacemgr-linux.c Wed Apr 22 15:16:11 2015
@@ -1282,12 +1282,12 @@
}
-/* Check whether ADDR looks like a bogus stack pointer. Non-bogosity is
- defined as follows: ADDR is not bogus if
- (1) it points into an already mapped stack segment, OR
- (2) it points into a reservation segment into which an abutting SkAnonC
+/* Check whether ADDR looks like an address or address-to-be located in an
+ extensible client stack segment. Return true if
+ (1) ADDR is located in an already mapped stack segment, OR
+ (2) ADDR is located in a reservation segment into which an abutting SkAnonC
segment can be extended. */
-Bool VG_(am_is_bogus_client_stack_pointer)( Addr addr )
+Bool VG_(am_addr_is_in_extensible_client_stack)( Addr addr )
{
const NSegment *seg = nsegments + find_nsegment_idx(addr);
@@ -1297,17 +1297,17 @@
case SkFileV:
case SkFileC:
case SkShmC:
- return True;
+ return False;
case SkResvn: {
- if (seg->smode != SmUpper) return True;
+ if (seg->smode != SmUpper) return False;
/* If the the abutting segment towards higher addresses is an SkAnonC
segment, then ADDR is a future stack pointer. */
const NSegment *next = VG_(am_next_nsegment)(seg, /*forward*/ True);
- if (next == NULL || next->kind != SkAnonC) return True;
+ if (next == NULL || next->kind != SkAnonC) return False;
/* OK; looks like a stack segment */
- return False;
+ return True;
}
case SkAnonC: {
@@ -1315,10 +1315,10 @@
segment, then ADDR is a stack pointer into mapped memory. */
const NSegment *next = VG_(am_next_nsegment)(seg, /*forward*/ False);
if (next == NULL || next->kind != SkResvn || next->smode != SmUpper)
- return True;
+ return False;
/* OK; looks like a stack segment */
- return False;
+ return True;
}
default:
Modified: trunk/coregrind/m_syswrap/syswrap-main.c
==============================================================================
--- trunk/coregrind/m_syswrap/syswrap-main.c (original)
+++ trunk/coregrind/m_syswrap/syswrap-main.c Wed Apr 22 15:16:11 2015
@@ -1550,7 +1550,7 @@
So the approximation we're taking here is to extend the stack only
if the client stack pointer does not look bogus. */
- if (! VG_(am_is_bogus_client_stack_pointer)(stackMin))
+ if (VG_(am_addr_is_in_extensible_client_stack)(stackMin))
VG_(extend_stack)( tid, stackMin );
}
# endif
Modified: trunk/coregrind/pub_core_aspacemgr.h
==============================================================================
--- trunk/coregrind/pub_core_aspacemgr.h (original)
+++ trunk/coregrind/pub_core_aspacemgr.h Wed Apr 22 15:16:11 2015
@@ -91,8 +91,9 @@
extern Bool VG_(am_is_valid_for_client_or_free_or_resvn)
( Addr start, SizeT len, UInt prot );
-/* Check whether ADDR looks like a bogus stack pointer. */
-extern Bool VG_(am_is_bogus_client_stack_pointer)( Addr addr );
+/* Check whether ADDR looks like an address or address-to-be located in an
+ extensible client stack segment. */
+extern Bool VG_(am_addr_is_in_extensible_client_stack)( Addr addr );
/* Trivial fn: return the total amount of space in anonymous mappings,
both for V and the client. Is used for printing stats in
|
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From: Julian S. <js...@ac...> - 2015-04-22 14:07:34
|
On 22/04/15 15:50, sv...@va... wrote: > Author: florian > - if (next == NULL || next->kind != SkResvn || seg->smode != SmUpper) > + if (next == NULL || next->kind != SkResvn || next->smode != SmUpper) What's the severity of this? Is it a regression or was it always there? How did you find it? J |
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From: <sv...@va...> - 2015-04-22 13:50:20
|
Author: florian
Date: Wed Apr 22 14:50:13 2015
New Revision: 15131
Log:
Fix a silly bug.
Modified:
trunk/coregrind/m_aspacemgr/aspacemgr-linux.c
Modified: trunk/coregrind/m_aspacemgr/aspacemgr-linux.c
==============================================================================
--- trunk/coregrind/m_aspacemgr/aspacemgr-linux.c (original)
+++ trunk/coregrind/m_aspacemgr/aspacemgr-linux.c Wed Apr 22 14:50:13 2015
@@ -1314,7 +1314,7 @@
/* If the abutting segment towards lower addresses is an SkResvn
segment, then ADDR is a stack pointer into mapped memory. */
const NSegment *next = VG_(am_next_nsegment)(seg, /*forward*/ False);
- if (next == NULL || next->kind != SkResvn || seg->smode != SmUpper)
+ if (next == NULL || next->kind != SkResvn || next->smode != SmUpper)
return True;
/* OK; looks like a stack segment */
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From: Bart V. A. <bva...@ac...> - 2015-04-22 10:20:10
|
On 04/21/15 23:02, Philippe Waroquiers wrote: > On Mon, 2015-04-20 at 23:46 +0200, Florian Krohm wrote: >> On 20.04.2015 23:28, Philippe Waroquiers wrote: >>> Nice cleanup. >>> One small comment: wouldn't the description of VG_(sr_as_string)() >>> better be put in the .h rather than in the .c file ? >>> The fact that the memory is static (or must be freed by the caller) >>> is better described there ? >> >> I tend to favour small comments in header files and put noteworthy >> details next to the implementation. But I have no strong feelings and we >> don't have a policy for this either. So if you want to change it please >> feel free. > Done as revision 15127. > > At work, we have a convention/guideline that to know how to use a > module, it is/should be sufficient to read the 'spec' (i.e. the .h) > of the module. > This allows to limit the reading to what is needed. > E.g. allows to skip internal functions/comments/internal data structures > and so on. > > So, information for the caller such as > 'you must free the returned pointer' > or > 'returns a static buffer, overwritten on next invocation' > is better placed in the .h, following this convention. > > I think many modules of Valgrind already follows > this approach. > > Maybe we could be more systematic in that approach ? There might be good reasons to add documentation for Valgrind functions in Valgrind header files. But I think it's worth mentioning here that there is a strict policy in the Linux kernel is to add such documentation in the .c files only. The rationale behind this policy is that it is easy to forget to update a header file when modifying the implementation. That's why in the Linux kernel the documentation is kept close to the implementation. Bart. |
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From: <sv...@va...> - 2015-04-22 09:43:00
|
Author: bart
Date: Wed Apr 22 09:07:35 2015
New Revision: 15130
Log:
NEWS: Add entry for bug #346416 / trunk r15123
Modified:
trunk/NEWS
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Wed Apr 22 09:07:35 2015
@@ -161,6 +161,7 @@
entries on ppc.
346267 Fix compiler warning about casting arguments, ppc64.
346324 Add support for the ppc instructions lbarx, lharx, stbcs, sthcs
+346416 Add support for LL_IOC_PATH2FID and LL_IOC_GETPARENT Lustre ioctls
Release 3.10.1 (25 November 2014)
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