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From: <sv...@va...> - 2014-11-03 22:43:52
|
Author: florian
Date: Mon Nov 3 22:43:42 2014
New Revision: 14685
Log:
Merge r14308 from the BUF_REMOVAL branch to trunk
Changes VG_(describe_IP) to return the untruncated result in a statically
allocated local buffer. Fix call sites and update two .exp files who had
truncated names.
Modified:
trunk/ (props changed)
trunk/coregrind/m_debuginfo/debuginfo.c
trunk/coregrind/m_gdbserver/m_gdbserver.c
trunk/coregrind/m_gdbserver/target.c
trunk/coregrind/m_stacktrace.c
trunk/include/pub_tool_debuginfo.h
trunk/massif/ms_main.c
trunk/massif/tests/long-names.c
trunk/massif/tests/long-names.post.exp
trunk/memcheck/tests/long_namespace_xml.cpp
trunk/memcheck/tests/long_namespace_xml.stderr.exp
Modified: trunk/coregrind/m_debuginfo/debuginfo.c
==============================================================================
--- trunk/coregrind/m_debuginfo/debuginfo.c (original)
+++ trunk/coregrind/m_debuginfo/debuginfo.c Mon Nov 3 22:43:42 2014
@@ -1,4 +1,4 @@
-
+/* -*- mode: C; c-basic-offset: 3; -*- */
/*--------------------------------------------------------------------*/
/*--- Top level management of symbols and debugging information. ---*/
@@ -2154,86 +2154,75 @@
}
-/* VG_(describe_IP): print into buf info on code address, function
- name and filename. */
-
-/* Copy str into buf starting at n, but not going past buf[n_buf-1]
- and always ensuring that buf is zero-terminated. */
+/* VG_(describe_IP): return info on code address, function name and
+ filename. The returned string is allocated in a static buffer and will
+ be overwritten in the next invocation. */
-static Int putStr ( Int n, Int n_buf, HChar* buf, const HChar* str )
+/* Copy str into *buf starting at n, ensuring that buf is zero-terminated.
+ Return the index of the terminating null character. */
+static SizeT
+putStr( SizeT n, HChar** buf, SizeT *bufsiz, const HChar* str )
{
- vg_assert(n_buf > 0);
- vg_assert(n >= 0 && n < n_buf);
- for (; n < n_buf-1 && *str != 0; n++,str++)
- buf[n] = *str;
- vg_assert(n >= 0 && n < n_buf);
- buf[n] = '\0';
- return n;
-}
+ SizeT slen = VG_(strlen)(str);
+ SizeT need = n + slen + 1;
-/* Same as putStr, but escaping chars for XML output, and
- also not adding more than count chars to n_buf. */
+ if (need > *bufsiz) {
+ if (need < 256) need = 256;
+ *bufsiz = need;
+ *buf = ML_(dinfo_realloc)("putStr", *buf, *bufsiz);
+ }
-static Int putStrEsc ( Int n, Int n_buf, Int count, HChar* buf,
- const HChar* str )
+ VG_(strcpy)(*buf + n, str);
+
+ return n + slen;
+}
+
+/* Same as putStr, but escaping chars for XML output. */
+static SizeT
+putStrEsc( SizeT n, HChar** buf, SizeT *bufsiz, const HChar* str )
{
HChar alt[2];
- vg_assert(n_buf > 0);
- vg_assert(count >= 0 && count < n_buf);
- vg_assert(n >= 0 && n < n_buf);
+
for (; *str != 0; str++) {
- vg_assert(count >= 0);
- if (count <= 0)
- goto done;
switch (*str) {
case '&':
- if (count < 5) goto done;
- n = putStr( n, n_buf, buf, "&");
- count -= 5;
+ n = putStr( n, buf, bufsiz, "&");
break;
case '<':
- if (count < 4) goto done;
- n = putStr( n, n_buf, buf, "<");
- count -= 4;
+ n = putStr( n, buf, bufsiz, "<");
break;
case '>':
- if (count < 4) goto done;
- n = putStr( n, n_buf, buf, ">");
- count -= 4;
+ n = putStr( n, buf, bufsiz, ">");
break;
default:
- if (count < 1) goto done;
alt[0] = *str;
alt[1] = 0;
- n = putStr( n, n_buf, buf, alt );
- count -= 1;
+ n = putStr( n, buf, bufsiz, alt );
break;
}
}
- done:
- vg_assert(count >= 0); /* should not go -ve in loop */
- vg_assert(n >= 0 && n < n_buf);
return n;
}
-HChar* VG_(describe_IP)(Addr eip, HChar* buf, Int n_buf, InlIPCursor *iipc)
+const HChar* VG_(describe_IP)(Addr eip, const InlIPCursor *iipc)
{
+ static HChar *buf = NULL;
+ static SizeT bufsiz = 0;
# define APPEND(_str) \
- n = putStr(n, n_buf, buf, _str)
-# define APPEND_ESC(_count,_str) \
- n = putStrEsc(n, n_buf, (_count), buf, (_str))
-# define BUF_LEN 4096
+ n = putStr(n, &buf, &bufsiz, _str)
+# define APPEND_ESC(_str) \
+ n = putStrEsc(n, &buf, &bufsiz, _str)
UInt lineno;
- HChar ibuf[50];
- Int n = 0;
+ HChar ibuf[50]; // large enough
+ SizeT n = 0;
vg_assert (!iipc || iipc->eip == eip);
- static const HChar *buf_fn;
- static const HChar *buf_obj;
- static const HChar *buf_srcloc;
- static const HChar *buf_dirname;
+ const HChar *buf_fn;
+ const HChar *buf_obj;
+ const HChar *buf_srcloc;
+ const HChar *buf_dirname;
Bool know_dirinfo = False;
Bool know_fnname;
@@ -2251,7 +2240,7 @@
: NULL;
vg_assert (next_inl);
// The function we are in is called by next_inl.
- buf_fn = next_inl->inlinedfn; // FIXME: IS THIS SAFE ??
+ buf_fn = next_inl->inlinedfn;
know_fnname = True;
// INLINED????
@@ -2302,11 +2291,7 @@
const HChar* maybe_newline2 = human_readable ? "\n " : "";
/* Print in XML format, dumping in as much info as we know.
- Ensure all tags are balanced even if the individual strings
- are too long. Allocate 1/10 of BUF_LEN to the object name,
- 6/10s to the function name, 1/10 to the directory name and
- 1/10 to the file name, leaving 1/10 for all the fixed-length
- stuff. */
+ Ensure all tags are balanced. */
APPEND("<frame>");
VG_(sprintf)(ibuf,"<ip>0x%llX</ip>", (ULong)eip);
APPEND(maybe_newline);
@@ -2314,25 +2299,25 @@
if (know_objname) {
APPEND(maybe_newline);
APPEND("<obj>");
- APPEND_ESC(1*BUF_LEN/10, buf_obj);
+ APPEND_ESC(buf_obj);
APPEND("</obj>");
}
if (know_fnname) {
APPEND(maybe_newline);
APPEND("<fn>");
- APPEND_ESC(6*BUF_LEN/10, buf_fn);
+ APPEND_ESC(buf_fn);
APPEND("</fn>");
}
if (know_srcloc) {
if (know_dirinfo) {
APPEND(maybe_newline);
APPEND("<dir>");
- APPEND_ESC(1*BUF_LEN/10, buf_dirname);
+ APPEND_ESC(buf_dirname);
APPEND("</dir>");
}
APPEND(maybe_newline);
APPEND("<file>");
- APPEND_ESC(1*BUF_LEN/10, buf_srcloc);
+ APPEND_ESC(buf_srcloc);
APPEND("</file>");
APPEND(maybe_newline);
APPEND("<line>");
@@ -2412,7 +2397,6 @@
# undef APPEND
# undef APPEND_ESC
-# undef BUF_LEN
}
Modified: trunk/coregrind/m_gdbserver/m_gdbserver.c
==============================================================================
--- trunk/coregrind/m_gdbserver/m_gdbserver.c (original)
+++ trunk/coregrind/m_gdbserver/m_gdbserver.c Mon Nov 3 22:43:42 2014
@@ -146,8 +146,8 @@
if (w == 2) w = 0;
if (is_code) {
- HChar name[200];
- VG_(describe_IP) (addr, name, 200, NULL); // FIXME: get rid of name
+ const HChar *name;
+ name = VG_(describe_IP) (addr, NULL);
if (buf[w]) VG_(free)(buf[w]);
buf[w] = VG_(strdup)("gdbserver sym", name);
} else {
Modified: trunk/coregrind/m_gdbserver/target.c
==============================================================================
--- trunk/coregrind/m_gdbserver/target.c (original)
+++ trunk/coregrind/m_gdbserver/target.c Mon Nov 3 22:43:42 2014
@@ -176,11 +176,9 @@
}
static
-char* sym (Addr addr)
+const HChar* sym (Addr addr)
{
- static char buf[200];
- VG_(describe_IP) (addr, buf, 200, NULL);
- return buf;
+ return VG_(describe_IP) (addr, NULL);
}
ThreadId vgdb_interrupted_tid = 0;
Modified: trunk/coregrind/m_stacktrace.c
==============================================================================
--- trunk/coregrind/m_stacktrace.c (original)
+++ trunk/coregrind/m_stacktrace.c Mon Nov 3 22:43:42 2014
@@ -1449,14 +1449,10 @@
static void printIpDesc(UInt n, Addr ip, void* uu_opaque)
{
- #define BUF_LEN 4096
-
- static HChar buf[BUF_LEN];
-
InlIPCursor *iipc = VG_(new_IIPC)(ip);
do {
- VG_(describe_IP)(ip, buf, BUF_LEN, iipc);
+ const HChar *buf = VG_(describe_IP)(ip, iipc);
if (VG_(clo_xml)) {
VG_(printf_xml)(" %s\n", buf);
} else {
Modified: trunk/include/pub_tool_debuginfo.h
==============================================================================
--- trunk/include/pub_tool_debuginfo.h (original)
+++ trunk/include/pub_tool_debuginfo.h Mon Nov 3 22:43:42 2014
@@ -129,28 +129,29 @@
by doing successive calls to VG_(describe_IP). */
typedef struct _InlIPCursor InlIPCursor;
-/* Puts into 'buf' info about the code address %eip: the address, function
+/* Returns info about the code address %eip: the address, function
name (if known) and filename/line number (if known), like this:
0x4001BF05: realloc (vg_replace_malloc.c:339)
- 'n_buf' gives length of 'buf'. Returns 'buf'.
-
eip can possibly corresponds to inlined function call(s).
To describe eip and the inlined function calls, the following must
be done:
InlIPCursor *iipc = VG_(new_IIPC)(eip);
do {
- VG_(describe_IP)(eip, buf, n_buf, iipc);
+ buf = VG_(describe_IP)(eip, iipc);
... use buf ...
} while (VG_(next_IIPC)(iipc));
VG_(delete_IIPC)(iipc);
To only describe eip, without the inlined calls at eip, give a NULL iipc:
- VG_(describe_IP)(eip, buf, n_buf, NULL);
+ buf = VG_(describe_IP)(eip, NULL);
+
+ Note, that the returned string is allocated in a static buffer local to
+ VG_(describe_IP). That buffer will be overwritten with every invocation.
+ Therefore, callers need to possibly stash away the string.
*/
-extern HChar* VG_(describe_IP)(Addr eip, HChar* buf, Int n_buf,
- InlIPCursor* iipc);
+extern const HChar* VG_(describe_IP)(Addr eip, const InlIPCursor* iipc);
/* Builds a IIPC (Inlined IP Cursor) to describe eip and all the inlined calls
at eip. Such a cursor must be deleted after use using VG_(delete_IIPC). */
Modified: trunk/massif/ms_main.c
==============================================================================
--- trunk/massif/ms_main.c (original)
+++ trunk/massif/ms_main.c Mon Nov 3 22:43:42 2014
@@ -2135,8 +2135,7 @@
// Used for printing function names. Is made static to keep it out
// of the stack frame -- this function is recursive. Obviously this
// now means its contents are trashed across the recursive call.
- static HChar ip_desc_array[BUF_LEN];
- const HChar* ip_desc = ip_desc_array;
+ const HChar* ip_desc;
switch (sxpt->tag) {
case SigSXPt:
@@ -2166,7 +2165,7 @@
}
// We need the -1 to get the line number right, But I'm not sure why.
- ip_desc = VG_(describe_IP)(sxpt->Sig.ip-1, ip_desc_array, BUF_LEN, NULL);
+ ip_desc = VG_(describe_IP)(sxpt->Sig.ip-1, NULL);
}
// Do the non-ip_desc part first...
@@ -2187,28 +2186,13 @@
}
}
}
- // Nb: We treat this specially (ie. we don't use FP) so that if the
- // ip_desc is too long (eg. due to a long C++ function name), it'll
- // get truncated, but the '\n' is still there so its a valid file.
- // (At one point we were truncating without adding the '\n', which
- // caused bug #155929.)
- //
- // Also, we account for the length of the address in ip_desc when
- // truncating. (The longest address we could have is 18 chars: "0x"
- // plus 16 address digits.) This ensures that the truncated function
- // name always has the same length, which makes truncation
- // deterministic and thus makes testing easier.
- tl_assert(j <= 18);
- // FIXME: this whole code block will go away, once VG_(describe_IP)
- // FIXME: has been fixed; I'm keeping it for now so testcases won't fail
- HChar FP_buf[BUF_LEN];
- VG_(snprintf)(FP_buf, BUF_LEN, "%s\n", ip_desc);
- FP_buf[BUF_LEN-18+j-5] = '.'; // "..." at the end make the
- FP_buf[BUF_LEN-18+j-4] = '.'; // truncation more obvious.
- FP_buf[BUF_LEN-18+j-3] = '.';
- FP_buf[BUF_LEN-18+j-2] = '\n'; // The last char is '\n'.
- FP_buf[BUF_LEN-18+j-1] = '\0'; // The string is terminated.
- VG_(fprintf)(fp, "%s", FP_buf);
+ // It used to be that ip_desc was truncated at the end.
+ // But there does not seem to be a good reason for that. Besides,
+ // the string was truncated at the right, which is less than ideal.
+ // Truncation at the beginning of the string would have been preferable.
+ // Think several nested namespaces in C++....
+ // Anyhow, we spit out the full-length string now.
+ VG_(fprintf)(fp, "%s\n", ip_desc);
// Indent.
tl_assert(depth+1 < depth_str_len-1); // -1 for end NUL char
@@ -2232,7 +2216,7 @@
if (InsigSXPt == child->tag)
n_insig_children_sxpts++;
- // Ok, print the child. NB: contents of ip_desc_array will be
+ // Ok, print the child. NB: contents of ip_desc will be
// trashed by this recursive call. Doesn't matter currently,
// but worth noting.
pp_snapshot_SXPt(fp, child, depth+1, depth_str, depth_str_len,
Modified: trunk/massif/tests/long-names.c
==============================================================================
--- trunk/massif/tests/long-names.c (original)
+++ trunk/massif/tests/long-names.c Mon Nov 3 22:43:42 2014
@@ -1,8 +1,8 @@
#include <stdio.h>
#include <stdlib.h>
-// This function name is long enough to get truncated. Nb: we need multiple
-// .exp.out* files because different length addresses can occur, which
-// result in a different number of chars from this name being truncated.
+// Long function name. Make sure it is not truncated.
+
+
#define A2500 \
abcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghij\
abcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghij\
Modified: trunk/massif/tests/long-names.post.exp
==============================================================================
--- trunk/massif/tests/long-names.post.exp (original)
+++ trunk/massif/tests/long-names.post.exp Mon Nov 3 22:43:42 2014
@@ -39,10 +39,10 @@
1 2,000 2,000 2,000 0 0
2 4,000 4,000 4,000 0 0
100.00% (4,000B) (heap allocation functions) malloc/new/new[], --alloc-fns, etc.
-->100.00% (4,000B) 0x........: abcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefgh
ijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefg
hijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabc...
+->100.00% (4,000B) 0x........: abcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefgh
ijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefg
hijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghij (long-names.c:61)
->50.00% (2,000B) 0x........: main (long-names.c:68)
|
- ->50.00% (2,000B) 0x........: abcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefg
hijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdef
ghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabc...
+ ->50.00% (2,000B) 0x........: abcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefg
hijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdef
ghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghijabcdefghijABCDEFGHIJabcdefghijABCDEFGHIJabcdefghij (long-names.c:62)
->50.00% (2,000B) 0x........: main (long-names.c:68)
--------------------------------------------------------------------------------
Modified: trunk/memcheck/tests/long_namespace_xml.cpp
==============================================================================
--- trunk/memcheck/tests/long_namespace_xml.cpp (original)
+++ trunk/memcheck/tests/long_namespace_xml.cpp Mon Nov 3 22:43:42 2014
@@ -1,5 +1,5 @@
-/* Check that very long function names are safely truncated in
+/* Check that very long function names are NOT truncated in
memcheck's XML output. */
Modified: trunk/memcheck/tests/long_namespace_xml.stderr.exp
==============================================================================
--- trunk/memcheck/tests/long_namespace_xml.stderr.exp (original)
+++ trunk/memcheck/tests/long_namespace_xml.stderr.exp Mon Nov 3 22:43:42 2014
@@ -37,7 +37,7 @@
<frame>
<ip>0x........</ip>
<obj>...</obj>
- <fn>abcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopq
rstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqr
stuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklm</fn>
+ <fn>abcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopq
rstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqr
stuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrstuvwxyzabcdefghijklmnopqrs
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<dir>...</dir>
<file>long_namespace_xml.cpp</file>
<line>...</line>
@@ -64,7 +64,7 @@
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XYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWX
YZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZABCDEFGHIJKLMNOPQRSTUVWXYZ::f()</fn>
<dir>...</dir>
<file>long_namespace_xml.cpp</file>
<line>...</line>
|
|
From: Rhys K. <rhy...@gm...> - 2014-11-03 14:42:12
|
Hi list,
In the changeset from r14683, I'm fairly sure the HUGETLB option as a
shmflg to shmget() is a Linux 2.6+ only flag.
i.e. the changes to trunk/coregrind/m_syswrap/syswrap-darwin.c can be reversed.
The patch to the darwin file is currently causing compiler errors on
that platform.
On 2 November 2014 09:00, <sv...@va...> wrote:
> Author: philippe
> Date: Sat Nov 1 22:00:50 2014
> New Revision: 14683
>
> Log:
> fix 338995 shmat with hugepages (SHM_HUGETLB) fails with EINVAL
>
> Bug is not really fixed, instead the SHM_HUGETLB flag is ignored.
> Note that it is not straightforward to properly fix this,
> as this implies either to learn aspacemgr what huge pages are.
> Also, the trick used in the fix for 333051 cannot be used easily,
> because the SHM_HUGETLB flag is given in shmget, while the mmap
> is done in shmat.
>
> So, the easiest is to just ignore the SHM_HUGETLB flag.
>
> SHM_HUGETLB is supposed to only give a performance impact.
> Ignoring it should be benign.
> Theoretically, the caller might expect a sucessful shmget(SHM_HUGETLB)+shmat
> to give pages aligned on e.g. 1MB.
> In this case, bad luck, the program will misbehave under valgrind.
> To warn of this, a warning is given (once) when SHM_HUGETLB is seen.
>
> The map_unmap.c test has been restructured somewaht to allow
> TEST_SHM_HUGETLB to be tested independently (or not) of the TEST_MAP_HUGETLB.
>
> Note also that by default, testing MAP_HUGETLB and SHM_HUGETLB
> is disabled as usually, huge pages are not enabled.
>
>
>
> Modified:
> trunk/NEWS
> trunk/coregrind/m_syswrap/syswrap-darwin.c
> trunk/coregrind/m_syswrap/syswrap-linux.c
> trunk/include/vki/vki-linux.h
> trunk/none/tests/map_unmap.c
>
> Modified: trunk/NEWS
> ==============================================================================
> --- trunk/NEWS (original)
> +++ trunk/NEWS Sat Nov 1 22:00:50 2014
> @@ -31,6 +31,7 @@
> 335440 arm64: ld1 (single structure) is not implemented
> 335713 arm64: unhanded instruction: prfm (immediate)
> 338731 ppc: Fix testuite build for toolchains not supporting -maltivec
> +338995 shmat with hugepages (SHM_HUGETLB) fails with EINVAL
> 339020 ppc64: memcheck/tests/ppc64/power_ISA2_05 failing in nightly build
> 339156 gdbsrv not called for fatal signal
> 339442 Fix testsuite build failure on OS X 10.9
>
> Modified: trunk/coregrind/m_syswrap/syswrap-darwin.c
> ==============================================================================
> --- trunk/coregrind/m_syswrap/syswrap-darwin.c (original)
> +++ trunk/coregrind/m_syswrap/syswrap-darwin.c Sat Nov 1 22:00:50 2014
> @@ -2310,6 +2310,15 @@
> {
> PRINT("shmget ( %ld, %ld, %ld )",ARG1,ARG2,ARG3);
> PRE_REG_READ3(long, "shmget", vki_key_t, key, vki_size_t, size, int, shmflg);
> + if (ARG3 & VKI_SHM_HUGETLB) {
> + static Bool warning_given = False;
> + ARG3 &= ~VKI_SHM_HUGETLB;
> + if (!warning_given) {
> + warning_given = True;
> + VG_(umsg)(
> + "WARNING: valgrind ignores shmget(shmflg) SHM_HUGETLB\n");
> + }
> + }
> }
>
> PRE(shm_open)
>
> Modified: trunk/coregrind/m_syswrap/syswrap-linux.c
> ==============================================================================
> --- trunk/coregrind/m_syswrap/syswrap-linux.c (original)
> +++ trunk/coregrind/m_syswrap/syswrap-linux.c Sat Nov 1 22:00:50 2014
> @@ -3593,6 +3593,15 @@
> case VKI_SHMGET:
> PRE_REG_READ4(int, "ipc",
> vki_uint, call, int, first, int, second, int, third);
> + if (ARG4 & VKI_SHM_HUGETLB) {
> + static Bool warning_given = False;
> + ARG4 &= ~VKI_SHM_HUGETLB;
> + if (!warning_given) {
> + warning_given = True;
> + VG_(umsg)(
> + "WARNING: valgrind ignores shmget(shmflg) SHM_HUGETLB\n");
> + }
> + }
> break;
> case VKI_SHMCTL: /* IPCOP_shmctl */
> PRE_REG_READ5(int, "ipc",
> @@ -3795,6 +3804,15 @@
> {
> PRINT("sys_shmget ( %ld, %ld, %ld )",ARG1,ARG2,ARG3);
> PRE_REG_READ3(long, "shmget", vki_key_t, key, vki_size_t, size, int, shmflg);
> + if (ARG3 & VKI_SHM_HUGETLB) {
> + static Bool warning_given = False;
> + ARG3 &= ~VKI_SHM_HUGETLB;
> + if (!warning_given) {
> + warning_given = True;
> + VG_(umsg)(
> + "WARNING: valgrind ignores shmget(shmflg) SHM_HUGETLB\n");
> + }
> + }
> }
>
> PRE(wrap_sys_shmat)
>
> Modified: trunk/include/vki/vki-linux.h
> ==============================================================================
> --- trunk/include/vki/vki-linux.h (original)
> +++ trunk/include/vki/vki-linux.h Sat Nov 1 22:00:50 2014
> @@ -1160,6 +1160,9 @@
>
> #define VKI_IPC_64 0x0100 /* New version (support 32-bit UIDs, bigger
> message sizes, etc. */
> +// From /usr/include/bits/shm.h
> +# define VKI_SHM_HUGETLB 04000
> +
>
> //----------------------------------------------------------------------
> // From linux-2.6.8.1/include/linux/sem.h
>
> Modified: trunk/none/tests/map_unmap.c
> ==============================================================================
> --- trunk/none/tests/map_unmap.c (original)
> +++ trunk/none/tests/map_unmap.c Sat Nov 1 22:00:50 2014
> @@ -10,7 +10,7 @@
> echo 20 > /proc/sys/vm/nr_hugepages
> Once this is done, uncomment the below, and recompile.
> */
> -// #define TEST_MAP_HUGETLB 1
> +//#define TEST_MAP_HUGETLB 1
>
> /* Similarly, testing SHM_HUGETLB huge pages is disabled by default.
> To have shmget/shmat big pages working, do (as root)
> @@ -18,13 +18,12 @@
> where 500 is the groupid of the user that runs this test
> Once this is done, uncomment the below, and recompile.
> */
> -// #define TEST_SHM_HUGETLB 1
> +//#define TEST_SHM_HUGETLB 1
>
> -#ifdef TEST_MAP_HUGETLB
> -#include <sys/ipc.h>
> -#include <sys/shm.h>
> -#include <sys/stat.h>
> +// Size to use for huge pages
> +#define HUGESZ (4 * 1024 * 1024)
>
> +#ifdef TEST_MAP_HUGETLB
> /* Ensure this compiles on pre 2.6 systems, or on glibc missing MAP_HUGETLB */
> #ifndef MAP_HUGETLB
> /* The below works for me on an f12/x86 linux */
> @@ -34,6 +33,9 @@
> #endif /* TEST_MAP_HUGETLB */
>
> #ifdef TEST_SHM_HUGETLB
> +#include <sys/ipc.h>
> +#include <sys/shm.h>
> +#include <sys/stat.h>
> #ifndef SHM_HUGETLB
> #define SHM_HUGETLB 04000
> #endif
> @@ -114,7 +116,6 @@
> }
>
> #ifdef TEST_MAP_HUGETLB
> -#define HUGESZ (4 * 1024 * 1024)
> {
> void *expect3;
> expect3 = domap(HUGESZ, MAP_HUGETLB);
>
>
> ------------------------------------------------------------------------------
> _______________________________________________
> Valgrind-developers mailing list
> Val...@li...
> https://lists.sourceforge.net/lists/listinfo/valgrind-developers
|
|
From: <sv...@va...> - 2014-11-03 09:53:10
|
Author: sewardj
Date: Mon Nov 3 09:52:57 2014
New Revision: 14684
Log:
Add tests for all SIMD FP instructions, except int<->fp conversions.
Modified:
trunk/none/tests/arm64/fp_and_simd.c
trunk/none/tests/arm64/fp_and_simd.stdout.exp
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Mon Nov 3 09:52:57 2014
@@ -11,6 +11,9 @@
typedef signed int Int;
typedef unsigned char UChar;
typedef unsigned long long int ULong;
+typedef signed long long int Long;
+typedef double Double;
+typedef float Float;
typedef unsigned char Bool;
#define False ((Bool)0)
@@ -28,8 +31,8 @@
UShort u16[8];
UInt u32[4];
ULong u64[2];
- float f32[4];
- double f64[2];
+ Float f32[4];
+ Double f64[2];
};
typedef union _V128 V128;
@@ -78,6 +81,17 @@
printf("%02x", (Int)v->u8[i]);
}
+static void showBlock ( const char* msg, V128* block, Int nBlock )
+{
+ Int i;
+ printf("%s\n", msg);
+ for (i = 0; i < nBlock; i++) {
+ printf(" ");
+ showV128(&block[i]);
+ printf("\n");
+ }
+}
+
__attribute__((unused))
static void* memalign16(size_t szB)
{
@@ -88,11 +102,146 @@
return x;
}
+static ULong dup4x16 ( UInt x )
+{
+ ULong r = x & 0xF;
+ r |= (r << 4);
+ r |= (r << 8);
+ r |= (r << 16);
+ r |= (r << 32);
+ return r;
+}
+
+// Generate a random double-precision number. About 1 time in 2,
+// instead return a special value (+/- Inf, +/-Nan, denorm).
+// This ensures that many of the groups of 4 calls here will
+// return a special value.
+
+static Double special_values[10];
+static Bool special_values_initted = False;
+
+static __attribute__((noinline))
+Double negate ( Double d ) { return -d; }
+static __attribute__((noinline))
+Double divf64 ( Double x, Double y ) { return x/y; }
+
+static __attribute__((noinline))
+Double plusZero ( void ) { return 0.0; }
+static __attribute__((noinline))
+Double minusZero ( void ) { return negate(plusZero()); }
+
+static __attribute__((noinline))
+Double plusOne ( void ) { return 1.0; }
+static __attribute__((noinline))
+Double minusOne ( void ) { return negate(plusOne()); }
+
+static __attribute__((noinline))
+Double plusInf ( void ) { return 1.0 / 0.0; }
+static __attribute__((noinline))
+Double minusInf ( void ) { return negate(plusInf()); }
+
+static __attribute__((noinline))
+Double plusNaN ( void ) { return divf64(plusInf(),plusInf()); }
+static __attribute__((noinline))
+Double minusNaN ( void ) { return negate(plusNaN()); }
+
+static __attribute__((noinline))
+Double plusDenorm ( void ) { return 1.23e-315 / 1e3; }
+static __attribute__((noinline))
+Double minusDenorm ( void ) { return negate(plusDenorm()); }
+
+
+static void ensure_special_values_initted ( void )
+{
+ if (special_values_initted) return;
+ special_values[0] = plusZero();
+ special_values[1] = minusZero();
+ special_values[2] = plusOne();
+ special_values[3] = minusOne();
+ special_values[4] = plusInf();
+ special_values[5] = minusInf();
+ special_values[6] = plusNaN();
+ special_values[7] = minusNaN();
+ special_values[8] = plusDenorm();
+ special_values[9] = minusDenorm();
+ special_values_initted = True;
+ int i;
+ printf("\n");
+ for (i = 0; i < 10; i++) {
+ printf("special value %d = %e\n", i, special_values[i]);
+ }
+ printf("\n");
+}
+
+static Double randDouble ( void )
+{
+ ensure_special_values_initted();
+ UChar c = randUChar();
+ if (c >= 128) {
+ // return a normal number most of the time.
+ // 0 .. 2^63-1
+ ULong u64 = randULong(TyDF);
+ // -2^62 .. 2^62-1
+ Long s64 = (Long)u64;
+ // -2^55 .. 2^55-1
+ s64 >>= (62-55);
+ // and now as a float
+ return (Double)s64;
+ }
+ c = randUChar() % 10;
+ return special_values[c];
+}
+
+static Float randFloat ( void )
+{
+ ensure_special_values_initted();
+ UChar c = randUChar();
+ if (c >= 128) {
+ // return a normal number most of the time.
+ // 0 .. 2^63-1
+ ULong u64 = randULong(TyDF);
+ // -2^62 .. 2^62-1
+ Long s64 = (Long)u64;
+ // -2^25 .. 2^25-1
+ s64 >>= (62-25);
+ // and now as a float
+ return (Float)s64;
+ }
+ c = randUChar() % 10;
+ return special_values[c];
+}
+
+void randBlock_Doubles ( V128* block, Int nBlock )
+{
+ Int i;
+ for (i = 0; i < nBlock; i++) {
+ block[i].f64[0] = randDouble();
+ block[i].f64[1] = randDouble();
+ }
+}
+
+void randBlock_Floats ( V128* block, Int nBlock )
+{
+ Int i;
+ for (i = 0; i < nBlock; i++) {
+ block[i].f32[0] = randFloat();
+ block[i].f32[1] = randFloat();
+ block[i].f32[2] = randFloat();
+ block[i].f32[3] = randFloat();
+ }
+}
+
/* ---------------------------------------------------------------- */
-/* -- Test macros -- */
+/* -- Parameterisable test macros -- */
/* ---------------------------------------------------------------- */
+#define DO50(_action) \
+ do { \
+ Int _qq; for (_qq = 0; _qq < 50; _qq++) { _action ; } \
+ } while (0)
+
+
/* Note this also sets the destination register to a known value (0x55..55)
since it can sometimes be an input to the instruction too. */
#define GEN_UNARY_TEST(INSN,SUFFIXD,SUFFIXN) \
@@ -292,8 +441,58 @@
}
+/* Generate a test that involves four vector regs,
+ with no bias as towards which is input or output. It's also OK
+ to use v16, v17, v18 as scratch. */
+#define GEN_FOURVEC_TEST(TESTNAME,INSN,VECREG1NO,VECREG2NO, \
+ VECREG3NO,VECREG4NO) \
+ __attribute__((noinline)) \
+ static void test_##TESTNAME ( LaneTy ty ) { \
+ Int i; \
+ for (i = 0; i < ITERS; i++) { \
+ V128 block[8+1]; \
+ memset(block, 0x55, sizeof(block)); \
+ randV128(&block[0], ty); \
+ randV128(&block[1], ty); \
+ randV128(&block[2], ty); \
+ randV128(&block[3], ty); \
+ randV128(&block[4], ty); \
+ randV128(&block[5], ty); \
+ randV128(&block[6], ty); \
+ randV128(&block[7], ty); \
+ __asm__ __volatile__( \
+ "mov x30, #0 ; msr fpsr, x30 ; " \
+ "ldr q"#VECREG1NO", [%0, #0] ; " \
+ "ldr q"#VECREG2NO", [%0, #16] ; " \
+ "ldr q"#VECREG3NO", [%0, #32] ; " \
+ "ldr q"#VECREG4NO", [%0, #48] ; " \
+ INSN " ; " \
+ "str q"#VECREG1NO", [%0, #64] ; " \
+ "str q"#VECREG2NO", [%0, #80] ; " \
+ "str q"#VECREG3NO", [%0, #96] ; " \
+ "str q"#VECREG4NO", [%0, #112] ; " \
+ "mrs x30, fpsr ; str x30, [%0, #128] " \
+ : : "r"(&block[0]) \
+ : "memory", "v"#VECREG1NO, "v"#VECREG2NO, \
+ "v"#VECREG3NO, "v"#VECREG4NO, \
+ "v16", "v17", "v18", "x30" \
+ ); \
+ printf(INSN " "); \
+ UInt fpsr = 0xFFFFFF60 & block[8].u32[0]; \
+ showV128(&block[0]); printf(" "); \
+ showV128(&block[1]); printf(" "); \
+ showV128(&block[2]); printf(" "); \
+ showV128(&block[3]); printf(" "); \
+ showV128(&block[4]); printf(" "); \
+ showV128(&block[5]); printf(" "); \
+ showV128(&block[6]); printf(" "); \
+ showV128(&block[7]); printf(" fpsr=%08x\n", fpsr); \
+ } \
+ }
+
+
/* ---------------------------------------------------------------- */
-/* -- Test functions -- */
+/* -- Test functions and non-parameterisable test macros -- */
/* ---------------------------------------------------------------- */
void test_UMINV ( void )
@@ -891,6 +1090,991 @@
}
+//======== FCCMP_D ========//
+
+#define GEN_test_FCCMP_D_D_0xF_EQ \
+ __attribute__((noinline)) static void test_FCCMP_D_D_0xF_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_D_D_0xF_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp d29, d11, #0xf, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_D_D_0xF_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMP_D_D_0xF_NE \
+ __attribute__((noinline)) static void test_FCCMP_D_D_0xF_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_D_D_0xF_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp d29, d11, #0xf, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_D_D_0xF_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMP_D_D_0x0_EQ \
+ __attribute__((noinline)) static void test_FCCMP_D_D_0x0_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_D_D_0x0_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp d29, d11, #0x0, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_D_D_0x0_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMP_D_D_0x0_NE \
+ __attribute__((noinline)) static void test_FCCMP_D_D_0x0_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_D_D_0x0_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp d29, d11, #0x0, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_D_D_0x0_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCCMP_S ========//
+
+#define GEN_test_FCCMP_S_S_0xF_EQ \
+ __attribute__((noinline)) static void test_FCCMP_S_S_0xF_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0xF_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp s29, s11, #0xf, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_S_S_0xF_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMP_S_S_0xF_NE \
+ __attribute__((noinline)) static void test_FCCMP_S_S_0xF_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0xF_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp s29, s11, #0xf, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_S_S_0xF_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMP_S_S_0x0_EQ \
+ __attribute__((noinline)) static void test_FCCMP_S_S_0x0_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0x0_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp s29, s11, #0x0, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_S_S_0x0_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMP_S_S_0x0_NE \
+ __attribute__((noinline)) static void test_FCCMP_S_S_0x0_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0x0_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmp s29, s11, #0x0, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMP_S_S_0x0_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCCMPE_D ========//
+
+#define GEN_test_FCCMPE_D_D_0xF_EQ \
+ __attribute__((noinline)) static void test_FCCMPE_D_D_0xF_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMPE_D_D_0xF_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe d29, d11, #0xf, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_D_D_0xF_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMPE_D_D_0xF_NE \
+ __attribute__((noinline)) static void test_FCCMPE_D_D_0xF_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMPE_D_D_0xF_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe d29, d11, #0xf, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_D_D_0xF_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMPE_D_D_0x0_EQ \
+ __attribute__((noinline)) static void test_FCCMPE_D_D_0x0_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMPE_D_D_0x0_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe d29, d11, #0x0, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_D_D_0x0_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMPE_D_D_0x0_NE \
+ __attribute__((noinline)) static void test_FCCMPE_D_D_0x0_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMPE_D_D_0x0_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe d29, d11, #0x0, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_D_D_0x0_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCCMPE_S ========//
+
+#define GEN_test_FCCMPE_S_S_0xF_EQ \
+ __attribute__((noinline)) static void test_FCCMPE_S_S_0xF_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0xF_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe s29, s11, #0xf, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_S_S_0xF_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMPE_S_S_0xF_NE \
+ __attribute__((noinline)) static void test_FCCMPE_S_S_0xF_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMPE_S_S_0xF_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe s29, s11, #0xf, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_S_S_0xF_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMPE_S_S_0x0_EQ \
+ __attribute__((noinline)) static void test_FCCMPE_S_S_0x0_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0x0_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe s29, s11, #0x0, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_S_S_0x0_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+#define GEN_test_FCCMPE_S_S_0x0_NE \
+ __attribute__((noinline)) static void test_FCCMPE_S_S_0x0_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCCMP_S_S_0x0_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fccmpe s29, s11, #0x0, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCCMPE_S_S_0x0_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMEQ_D_D ========//
+
+#define GEN_test_FCMEQ_D_D \
+ __attribute__((noinline)) static void test_FCMEQ_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMEQ_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmeq d29, d11, d9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMEQ_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMEQ_S_S ========//
+
+#define GEN_test_FCMEQ_S_S \
+ __attribute__((noinline)) static void test_FCMEQ_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMEQ_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmeq s29, s11, s9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMEQ_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGE_D_D ========//
+
+#define GEN_test_FCMGE_D_D \
+ __attribute__((noinline)) static void test_FCMGE_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGE_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmge d29, d11, d9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGE_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGE_S_S ========//
+
+#define GEN_test_FCMGE_S_S \
+ __attribute__((noinline)) static void test_FCMGE_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGE_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmge s29, s11, s9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGE_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGT_D_D ========//
+
+#define GEN_test_FCMGT_D_D \
+ __attribute__((noinline)) static void test_FCMGT_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGT_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmgt d29, d11, d9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGT_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGT_S_S ========//
+
+#define GEN_test_FCMGT_S_S \
+ __attribute__((noinline)) static void test_FCMGT_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGT_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmgt s29, s11, s9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGT_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FACGT_D_D ========//
+
+#define GEN_test_FACGT_D_D \
+ __attribute__((noinline)) static void test_FACGT_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FACGT_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "facgt d29, d11, d9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FACGT_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FACGT_S_S ========//
+
+#define GEN_test_FACGT_S_S \
+ __attribute__((noinline)) static void test_FACGT_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FACGT_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "facgt s29, s11, s9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FACGT_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FACGE_D_D ========//
+
+#define GEN_test_FACGE_D_D \
+ __attribute__((noinline)) static void test_FACGE_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FACGE_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "facge d29, d11, d9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FACGE_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FACGE_S_S ========//
+
+#define GEN_test_FACGE_S_S \
+ __attribute__((noinline)) static void test_FACGE_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FACGE_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "facge s29, s11, s9; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FACGE_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMEQ_Z_D ========//
+
+#define GEN_test_FCMEQ_Z_D \
+ __attribute__((noinline)) static void test_FCMEQ_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMEQ_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmeq d29, d11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMEQ_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMEQ_Z_S ========//
+
+#define GEN_test_FCMEQ_Z_S \
+ __attribute__((noinline)) static void test_FCMEQ_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMEQ_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmeq s29, s11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMEQ_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGE_Z_D ========//
+
+#define GEN_test_FCMGE_Z_D \
+ __attribute__((noinline)) static void test_FCMGE_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGE_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmge d29, d11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGE_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGE_Z_S ========//
+
+#define GEN_test_FCMGE_Z_S \
+ __attribute__((noinline)) static void test_FCMGE_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGE_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmge s29, s11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGE_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGT_Z_D ========//
+
+#define GEN_test_FCMGT_Z_D \
+ __attribute__((noinline)) static void test_FCMGT_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGT_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmgt d29, d11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGT_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMGT_Z_S ========//
+
+#define GEN_test_FCMGT_Z_S \
+ __attribute__((noinline)) static void test_FCMGT_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMGT_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmgt s29, s11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMGT_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMLE_Z_D ========//
+
+#define GEN_test_FCMLE_Z_D \
+ __attribute__((noinline)) static void test_FCMLE_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMLE_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmle d29, d11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMLE_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMLE_Z_S ========//
+
+#define GEN_test_FCMLE_Z_S \
+ __attribute__((noinline)) static void test_FCMLE_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMLE_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmle s29, s11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMLE_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMLT_Z_D ========//
+
+#define GEN_test_FCMLT_Z_D \
+ __attribute__((noinline)) static void test_FCMLT_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMLT_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmlt d29, d11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMLT_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMLT_Z_S ========//
+
+#define GEN_test_FCMLT_Z_S \
+ __attribute__((noinline)) static void test_FCMLT_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMLT_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmlt s29, s11, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMLT_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMP_D_D ========//
+
+#define GEN_test_FCMP_D_D \
+ __attribute__((noinline)) static void test_FCMP_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMP_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmp d29, d11; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMP_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMP_S_S ========//
+
+#define GEN_test_FCMP_S_S \
+ __attribute__((noinline)) static void test_FCMP_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMP_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmp s29, s11; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMP_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMPE_D_D ========//
+
+#define GEN_test_FCMPE_D_D \
+ __attribute__((noinline)) static void test_FCMPE_D_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMPE_D_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmpe d29, d11; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMPE_D_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMPE_S_S ========//
+
+#define GEN_test_FCMPE_S_S \
+ __attribute__((noinline)) static void test_FCMPE_S_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMPE_S_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmpe s29, s11; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMPE_S_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMP_Z_D ========//
+
+#define GEN_test_FCMP_Z_D \
+ __attribute__((noinline)) static void test_FCMP_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMP_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmp d29, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMP_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMP_Z_S ========//
+
+#define GEN_test_FCMP_Z_S \
+ __attribute__((noinline)) static void test_FCMP_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMP_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmp s29, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMP_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMPE_Z_D ========//
+
+#define GEN_test_FCMPE_Z_D \
+ __attribute__((noinline)) static void test_FCMPE_Z_D ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMPE_Z_D before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmpe d29, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMPE_Z_D after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCMPE_Z_S ========//
+
+#define GEN_test_FCMPE_Z_S \
+ __attribute__((noinline)) static void test_FCMPE_Z_S ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Floats(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCMPE_Z_S before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcmpe s29, #0; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCMPE_Z_S after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCSEL_D_D_D_EQ ========//
+
+#define GEN_test_FCSEL_D_D_D_EQ \
+ __attribute__((noinline)) static void test_FCSEL_D_D_D_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCSEL_D_D_D_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcsel d29, d11, d9, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCSEL_D_D_D_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCSEL_D_D_D_NE ========//
+
+#define GEN_test_FCSEL_D_D_D_NE \
+ __attribute__((noinline)) static void test_FCSEL_D_D_D_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCSEL_D_D_D_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcsel d29, d11, d9, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCSEL_D_D_D_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCSEL_S_S_S_EQ ========//
+
+#define GEN_test_FCSEL_S_S_S_EQ \
+ __attribute__((noinline)) static void test_FCSEL_S_S_S_EQ ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCSEL_S_S_S_EQ before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcsel s29, s11, s9, eq; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCSEL_S_S_S_EQ after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+//======== FCSEL_S_S_S_NE ========//
+
+#define GEN_test_FCSEL_S_S_S_NE \
+ __attribute__((noinline)) static void test_FCSEL_S_S_S_NE ( void ) \
+ { \
+ V128 block[4]; \
+ randBlock_Doubles(&block[0], 3); \
+ block[3].u64[0] = dup4x16(0x5); block[3].u64[1] = dup4x16(0xA); \
+ showBlock("FCSEL_S_S_S_NE before", &block[0], 4); \
+ __asm__ __volatile__( \
+ "ldr x9, [%0, 48]; msr nzcv, x9; " \
+ "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
+ "fcsel s29, s11, s9, ne; " \
+ "mrs x9, nzcv; str x9, [%0, 48]; " \
+ "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
+ ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
+ ); \
+ showBlock("FCSEL_S_S_S_NE after", &block[0], 4); \
+ printf("\n"); \
+ }
+
+
/* ---------------------------------------------------------------- */
/* -- Tests, in the same order that they appear in main() -- */
/* ---------------------------------------------------------------- */
@@ -939,49 +2123,90 @@
GEN_THREEVEC_TEST(faddp_4s_4s_4s, "faddp v2.4s, v23.4s, v11.4s", 2, 23, 11)
GEN_THREEVEC_TEST(faddp_2s_2s_2s, "faddp v2.2s, v23.2s, v11.2s", 2, 23, 11)
-// fccmp d,s
-// fccmpe d,s
-
-// fcmeq d,s
-// fcmge d,s
-// fcmgt d,s
-// facgt d,s (floating abs compare GE)
-// facge d,s (floating abs compare GE)
-
-GEN_BINARY_TEST(fcmeq, 2d, 2d, 2d)
-GEN_BINARY_TEST(fcmeq, 4s, 4s, 4s)
-GEN_BINARY_TEST(fcmeq, 2s, 2s, 2s)
-GEN_BINARY_TEST(fcmge, 2d, 2d, 2d)
-GEN_BINARY_TEST(fcmge, 4s, 4s, 4s)
-GEN_BINARY_TEST(fcmge, 2s, 2s, 2s)
-GEN_BINARY_TEST(fcmgt, 2d, 2d, 2d)
-GEN_BINARY_TEST(fcmgt, 4s, 4s, 4s)
-GEN_BINARY_TEST(fcmgt, 2s, 2s, 2s)
-GEN_BINARY_TEST(facge, 2d, 2d, 2d)
-GEN_BINARY_TEST(facge, 4s, 4s, 4s)
-GEN_BINARY_TEST(facge, 2s, 2s, 2s)
-GEN_BINARY_TEST(facgt, 2d, 2d, 2d)
-GEN_BINARY_TEST(facgt, 4s, 4s, 4s)
-GEN_BINARY_TEST(facgt, 2s, 2s, 2s)
-
-// fcmeq_z d,s
-// fcmge_z d,s
-// fcmgt_z d,s
-// fcmle_z d,s
-// fcmlt_z d,s
-
-// fcmeq_z 2d,4s,2s
-// fcmge_z 2d,4s,2s
-// fcmgt_z 2d,4s,2s
-// fcmle_z 2d,4s,2s
-// fcmlt_z 2d,4s,2s
-
-// fcmp_z d,s
-// fcmpe_z d,s
-// fcmp d,s (floating point quiet, set flags)
-// fcmpe d,s (floating point signaling, set flags)
-
-// fcsel d,s (fp cond select)
+GEN_test_FCCMP_D_D_0xF_EQ
+GEN_test_FCCMP_D_D_0xF_NE
+GEN_test_FCCMP_D_D_0x0_EQ
+GEN_test_FCCMP_D_D_0x0_NE
+GEN_test_FCCMP_S_S_0xF_EQ
+GEN_test_FCCMP_S_S_0xF_NE
+GEN_test_FCCMP_S_S_0x0_EQ
+GEN_test_FCCMP_S_S_0x0_NE
+GEN_test_FCCMPE_D_D_0xF_EQ
+GEN_test_FCCMPE_D_D_0xF_NE
+GEN_test_FCCMPE_D_D_0x0_EQ
+GEN_test_FCCMPE_D_D_0x0_NE
+GEN_test_FCCMPE_S_S_0xF_EQ
+GEN_test_FCCMPE_S_S_0xF_NE
+GEN_test_FCCMPE_S_S_0x0_EQ
+GEN_test_FCCMPE_S_S_0x0_NE
+
+GEN_test_FCMEQ_D_D
+GEN_test_FCMEQ_S_S
+GEN_test_FCMGE_D_D
+GEN_test_FCMGE_S_S
+GEN_test_FCMGT_D_D
+GEN_test_FCMGT_S_S
+GEN_test_FACGT_D_D
+GEN_test_FACGT_S_S
+GEN_test_FACGE_D_D
+GEN_test_FACGE_S_S
+
+GEN_THREEVEC_TEST(fcmeq_2d_2d_2d, "fcmeq v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmeq_4s_4s_4s, "fcmeq v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmeq_2s_2s_2s, "fcmeq v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmge_2d_2d_2d, "fcmge v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmge_4s_4s_4s, "fcmge v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmge_2s_2s_2s, "fcmge v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmgt_2d_2d_2d, "fcmgt v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmgt_4s_4s_4s, "fcmgt v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fcmgt_2s_2s_2s, "fcmgt v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(facge_2d_2d_2d, "facge v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(facge_4s_4s_4s, "facge v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(facge_2s_2s_2s, "facge v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(facgt_2d_2d_2d, "facgt v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(facgt_4s_4s_4s, "facgt v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(facgt_2s_2s_2s, "facgt v2.2s, v23.2s, v11.2s", 2, 23, 11)
+
+GEN_test_FCMEQ_Z_D
+GEN_test_FCMEQ_Z_S
+GEN_test_FCMGE_Z_D
+GEN_test_FCMGE_Z_S
+GEN_test_FCMGT_Z_D
+GEN_test_FCMGT_Z_S
+GEN_test_FCMLE_Z_D
+GEN_test_FCMLE_Z_S
+GEN_test_FCMLT_Z_D
+GEN_test_FCMLT_Z_S
+
+GEN_TWOVEC_TEST(fcmeq_z_2d_2d, "fcmeq v2.2d, v23.2d, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmeq_z_4s_4s, "fcmeq v2.4s, v23.4s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmeq_z_2s_2s, "fcmeq v2.2s, v23.2s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmge_z_2d_2d, "fcmge v2.2d, v23.2d, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmge_z_4s_4s, "fcmge v2.4s, v23.4s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmge_z_2s_2s, "fcmge v2.2s, v23.2s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmgt_z_2d_2d, "fcmgt v2.2d, v23.2d, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmgt_z_4s_4s, "fcmgt v2.4s, v23.4s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmgt_z_2s_2s, "fcmgt v2.2s, v23.2s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmle_z_2d_2d, "fcmle v2.2d, v23.2d, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmle_z_4s_4s, "fcmle v2.4s, v23.4s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmle_z_2s_2s, "fcmle v2.2s, v23.2s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmlt_z_2d_2d, "fcmlt v2.2d, v23.2d, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmlt_z_4s_4s, "fcmlt v2.4s, v23.4s, #0", 2, 23)
+GEN_TWOVEC_TEST(fcmlt_z_2s_2s, "fcmlt v2.2s, v23.2s, #0", 2, 23)
+
+GEN_test_FCMP_Z_D
+GEN_test_FCMP_Z_S
+GEN_test_FCMPE_Z_D
+GEN_test_FCMPE_Z_S
+GEN_test_FCMP_D_D
+GEN_test_FCMP_S_S
+GEN_test_FCMPE_D_D
+GEN_test_FCMPE_S_S
+
+GEN_test_FCSEL_D_D_D_EQ
+GEN_test_FCSEL_D_D_D_NE
+GEN_test_FCSEL_S_S_S_EQ
+GEN_test_FCSEL_S_S_S_NE
GEN_THREEVEC_TEST(fdiv_d_d_d, "fdiv d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fdiv_s_s_s, "fdiv s2, s11, s29", 2, 11, 29)
@@ -989,52 +2214,85 @@
GEN_BINARY_TEST(fdiv, 4s, 4s, 4s)
GEN_BINARY_TEST(fdiv, 2s, 2s, 2s)
-// fmadd d,s
-// fnmadd d,s
-// fmsub d,s
-// fnmsub d,s
+GEN_FOURVEC_TEST(fmadd_d_d_d_d, "fmadd d2, d11, d29, d3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fmadd_s_s_s_s, "fmadd s2, s11, s29, s3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fnmadd_d_d_d_d, "fnmadd d2, d11, d29, d3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fnmadd_s_s_s_s, "fnmadd s2, s11, s29, s3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fmsub_d_d_d_d, "fmsub d2, d11, d29, d3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fmsub_s_s_s_s, "fmsub s2, s11, s29, s3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fnmsub_d_d_d_d, "fnmsub d2, d11, d29, d3", 2, 11, 29, 3)
+GEN_FOURVEC_TEST(fnmsub_s_s_s_s, "fnmsub s2, s11, s29, s3", 2, 11, 29, 3)
GEN_THREEVEC_TEST(fnmul_d_d_d, "fnmul d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fnmul_s_s_s, "fnmul s2, s11, s29", 2, 11, 29)
-// fmax d,s
-// fmin d,s
-// fmaxnm d,s ("max number")
-// fminnm d,s
-
-// fmax 2d,4s,2s
-// fmin 2d,4s,2s
-// fmaxnm 2d,4s,2s
-// fminnm 2d,4s,2s
-
-// fmaxnmp d_2d,s_2s ("max number pairwise")
-// fminnmp d_2d,s_2s
-
-// fmaxnmp 2d,4s,2s
-// fminnmp 2d,4s,2s
-
-// fmaxnmv s_4s (maxnum across vector)
-// fminnmv s_4s
-
-// fmaxp d_2d,s_2s (max of a pair)
-// fminp d_2d,s_2s (max of a pair)
-
-// fmaxp 2d,4s,2s (max pairwise)
-// fminp 2d,4s,2s
-
-// fmaxv s_4s (max across vector)
-// fminv s_4s
-
-// FIXME these need to be THREEVEC
-GEN_BINARY_TEST(fmla, 2d, 2d, 2d)
-GEN_BINARY_TEST(fmla, 4s, 4s, 4s)
-GEN_BINARY_TEST(fmla, 2s, 2s, 2s)
-GEN_BINARY_TEST(fmls, 2d, 2d, 2d)
-GEN_BINARY_TEST(fmls, 4s, 4s, 4s)
-GEN_BINARY_TEST(fmls, 2s, 2s, 2s)
-
-// fmla d_d_d[],s_s_s[] (by element)
-// fmls d_d_d[],s_s_s[] (by element)
+GEN_THREEVEC_TEST(fmax_d_d_d, "fmax d2, d11, d29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmax_s_s_s, "fmax s2, s11, s29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmin_d_d_d, "fmin d2, d11, d29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmin_s_s_s, "fmin s2, s11, s29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmaxnm_d_d_d, "fmaxnm d2, d11, d29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmaxnm_s_s_s, "fmaxnm s2, s11, s29", 2, 11, 29)
+GEN_THREEVEC_TEST(fminnm_d_d_d, "fminnm d2, d11, d29", 2, 11, 29)
+GEN_THREEVEC_TEST(fminnm_s_s_s, "fminnm s2, s11, s29", 2, 11, 29)
+
+GEN_THREEVEC_TEST(fmax_2d_2d_2d, "fmax v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmax_4s_4s_4s, "fmax v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmax_2s_2s_2s, "fmax v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmin_2d_2d_2d, "fmin v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmin_4s_4s_4s, "fmin v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmin_2s_2s_2s, "fmin v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxnm_2d_2d_2d, "fmaxnm v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxnm_4s_4s_4s, "fmaxnm v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxnm_2s_2s_2s, "fmaxnm v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fminnm_2d_2d_2d, "fminnm v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fminnm_4s_4s_4s, "fminnm v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fminnm_2s_2s_2s, "fminnm v2.2s, v23.2s, v11.2s", 2, 23, 11)
+
+GEN_TWOVEC_TEST(fmaxnmp_d_2d, "fmaxnmp d2, v23.2d", 2, 23)
+GEN_TWOVEC_TEST(fmaxnmp_s_2s, "fmaxnmp s2, v23.2s", 2, 23)
+GEN_TWOVEC_TEST(fminnmp_d_2d, "fminnmp d2, v23.2d", 2, 23)
+GEN_TWOVEC_TEST(fminnmp_s_2s, "fminnmp s2, v23.2s", 2, 23)
+
+GEN_THREEVEC_TEST(fmaxnmp_2d_2d_2d, "fmaxnmp v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxnmp_4s_4s_4s, "fmaxnmp v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxnmp_2s_2s_2s, "fmaxnmp v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fminnmp_2d_2d_2d, "fminnmp v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fminnmp_4s_4s_4s, "fminnmp v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fminnmp_2s_2s_2s, "fminnmp v2.2s, v23.2s, v11.2s", 2, 23, 11)
+
+GEN_TWOVEC_TEST(fmaxnmv_s_4s, "fmaxnmv s2, v23.4s", 2, 23)
+GEN_TWOVEC_TEST(fminnmv_s_4s, "fminnmv s2, v23.4s", 2, 23)
+
+GEN_TWOVEC_TEST(fmaxp_d_2d, "fmaxp d2, v23.2d", 2, 23)
+GEN_TWOVEC_TEST(fmaxp_s_2s, "fmaxp s2, v23.2s", 2, 23)
+GEN_TWOVEC_TEST(fminp_d_2d, "fminp d2, v23.2d", 2, 23)
+GEN_TWOVEC_TEST(fminp_s_2s, "fminp s2, v23.2s", 2, 23)
+
+GEN_THREEVEC_TEST(fmaxp_2d_2d_2d, "fmaxp v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxp_4s_4s_4s, "fmaxp v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmaxp_2s_2s_2s, "fmaxp v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fminp_2d_2d_2d, "fminp v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fminp_4s_4s_4s, "fminp v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fminp_2s_2s_2s, "fminp v2.2s, v23.2s, v11.2s", 2, 23, 11)
+
+GEN_TWOVEC_TEST(fmaxv_s_4s, "fmaxv s2, v23.4s", 2, 23)
+GEN_TWOVEC_TEST(fminv_s_4s, "fminv s2, v23.4s", 2, 23)
+
+GEN_THREEVEC_TEST(fmla_2d_2d_2d, "fmla v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmla_4s_4s_4s, "fmla v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmla_2s_2s_2s, "fmla v2.2s, v23.2s, v11.2s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmls_2d_2d_2d, "fmls v2.2d, v23.2d, v11.2d", 2, 23, 11)
+GEN_THREEVEC_TEST(fmls_4s_4s_4s, "fmls v2.4s, v23.4s, v11.4s", 2, 23, 11)
+GEN_THREEVEC_TEST(fmls_2s_2s_2s, "fmls v2.2s, v23.2s, v11.2s", 2, 23, 11)
+
+GEN_THREEVEC_TEST(fmla_d_d_d0, "fmla d2, d11, v29.d[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmla_d_d_d1, "fmla d2, d11, v29.d[1]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmla_s_s_s0, "fmla s2, s11, v29.s[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmla_s_s_s3, "fmla s2, s11, v29.s[3]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmls_d_d_d0, "fmls d2, d11, v29.d[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmls_d_d_d1, "fmls d2, d11, v29.d[1]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmls_s_s_s0, "fmls s2, s11, v29.s[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmls_s_s_s3, "fmls s2, s11, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(fmla_2d_2d_d0, "fmla v2.2d, v11.2d, v29.d[0]", 2, 11, 29)
GEN_THREEVEC_TEST(fmla_2d_2d_d1, "fmla v2.2d, v11.2d, v29.d[1]", 2, 11, 29)
@@ -1078,7 +2336,10 @@
GEN_TWOVEC_TEST(fmov_s_imm_02, "fmov s22, #-4.0", 22, 23)
GEN_TWOVEC_TEST(fmov_s_imm_03, "fmov s22, #-1.0", 22, 23)
-// fmul d_d_d[],s_s_s[]
+GEN_THREEVEC_TEST(fmul_d_d_d0, "fmul d2, d11, v29.d[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_d_d_d1, "fmul d2, d11, v29.d[1]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_s_s_s0, "fmul s2, s11, v29.s[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_s_s_s3, "fmul s2, s11, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_2d_2d_d0, "fmul v2.2d, v11.2d, v29.d[0]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_2d_2d_d1, "fmul v2.2d, v11.2d, v29.d[1]", 2, 11, 29)
@@ -1087,47 +2348,92 @@
GEN_THREEVEC_TEST(fmul_2s_2s_s0, "fmul v2.2s, v11.2s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_2s_2s_s3, "fmul v2.2s, v11.2s, v29.s[3]", 2, 11, 29)
-GEN_THREEVEC_TEST(fmul_d_d_d, "fmul d2, d11, d29", 2, 11, 29)
-GEN_THREEVEC_TEST(fmul_s_s_s, "fmul s2, s11, s29", 2, 11, 29)
-GEN_BINARY_TEST(fmul, 2d, 2d, 2d)
-GEN_BINARY_TEST(fmul, 4s, 4s, 4s)
-GEN_BINARY_TEST(fmul, 2s, 2s, 2s)
-
-// fmulx d_d_d[],s_s_s[]
-// fmulx 2d_2d_d[],4s_4s_s[],2s_2s_s[]
-
-// fmulx d,s
-// fmulx 2d,4s,2s
-
-// frecpe d,s (recip estimate)
-// frecpe 2d,4s,2s
-
-// frecps d,s (recip step)
-// frecps 2d,4s,2s
-
-// frecpx d,s (recip exponent)
-
-// frinta d,s
-// frinti d,s
-// frintm d,s
-// frintn d,s
-// frintp d,s
-// frintx d,s
-// frintz d,s
-
-// frinta 2d,4s,2s (round to integral, nearest away)
-// frinti 2d,4s,2s (round to integral, per FPCR)
-// frintm 2d,4s,2s (round to integral, minus inf)
-// frintn 2d,4s,2s (round to integral, nearest, to even)
-// frintp 2d,4s,2s (round to integral, plus inf)
-// frintx 2d,4s,2s (round to integral exact, per FPCR)
-// frintz 2d,4s,2s (round to integral, zero)
-
-// frsqrte d,s (est)
-// frsqrte 2d,4s,2s
-
-// frsqrts d,s (step)
-// frsqrts 2d,4s,2s
+GEN_THREEVEC_TEST(fmul_d_d_d, "fmul d2, d11, d29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_s_s_s, "fmul s2, s11, s29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_2d_2d_2d, "fmul v2.2d, v11.2d, v29.2d", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_4s_4s_4s, "fmul v2.4s, v11.4s, v29.4s", 2, 11, 29)
+GEN_THREEVEC_TEST(fmul_2s_2s_2s, "fmul v2.2s, v11.2s, v29.2s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(fmulx_d_d_d0, "fmulx d2, d11, v29.d[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_d_d_d1, "fmulx d2, d11, v29.d[1]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_s_s_s0, "fmulx s2, s11, v29.s[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_s_s_s3, "fmulx s2, s11, v29.s[3]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_2d_2d_d0, "fmulx v2.2d, v11.2d, v29.d[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_2d_2d_d1, "fmulx v2.2d, v11.2d, v29.d[1]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_4s_4s_s0, "fmulx v2.4s, v11.4s, v29.s[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_4s_4s_s3, "fmulx v2.4s, v11.4s, v29.s[3]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_2s_2s_s0, "fmulx v2.2s, v11.2s, v29.s[0]", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_2s_2s_s3, "fmulx v2.2s, v11.2s, v29.s[3]", 2, 11, 29)
+
+GEN_THREEVEC_TEST(fmulx_d_d_d, "fmulx d2, d11, d29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_s_s_s, "fmulx s2, s11, s29", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_2d_2d_2d, "fmulx v2.2d, v11.2d, v29.2d", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_4s_4s_4s, "fmulx v2.4s, v11.4s, v29.4s", 2, 11, 29)
+GEN_THREEVEC_TEST(fmulx_2s_2s_2s, "fmulx v2.2s, v11.2s, v29.2s", 2, 11, 29)
+
+GEN_TWOVEC_TEST(frecpe_d_d, "frecpe d22, d23", 22, 23)
+GEN_TWOVEC_TEST(frecpe_s_s, "frecpe s22, s23", 22, 23)
+GEN_TWOVEC_TEST(frecpe_2d_2d, "frecpe v22.2d, v23.2d", 22, 23)
+GEN_...
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