You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
1
(5) |
2
(11) |
3
|
4
(9) |
5
(10) |
6
(4) |
7
(14) |
|
8
(15) |
9
(15) |
10
(14) |
11
(13) |
12
(16) |
13
(12) |
14
(9) |
|
15
(21) |
16
(13) |
17
(11) |
18
(13) |
19
(5) |
20
(29) |
21
(20) |
|
22
(13) |
23
(18) |
24
(21) |
25
(17) |
26
(26) |
27
(13) |
28
(17) |
|
29
(10) |
30
(5) |
|
|
|
|
|
|
From: <sv...@va...> - 2014-06-04 11:44:51
|
Author: sewardj
Date: Wed Jun 4 11:44:45 2014
New Revision: 2867
Log:
Support the "ishst" variant of "dmb". Fixes #335263. (di...@go...)
Modified:
trunk/priv/guest_arm64_toIR.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Wed Jun 4 11:44:45 2014
@@ -4731,6 +4731,11 @@
DIP("dmb ish\n");
return True;
}
+ if (INSN(31,0) == 0xD5033ABF) {
+ stmt(IRStmt_MBE(Imbe_Fence));
+ DIP("dmb ishst\n");
+ return True;
+ }
if (INSN(31,0) == 0xD5033B9F) {
stmt(IRStmt_MBE(Imbe_Fence));
DIP("dsb ish\n");
|
|
From: <sv...@va...> - 2014-06-04 11:37:01
|
Author: sewardj
Date: Wed Jun 4 11:36:54 2014
New Revision: 2866
Log:
Support movi_{16b,8b}_#imm8. Fixes #335262. (di...@go...)
Modified:
trunk/priv/guest_arm64_toIR.c
Modified: trunk/priv/guest_arm64_toIR.c
==============================================================================
--- trunk/priv/guest_arm64_toIR.c (original)
+++ trunk/priv/guest_arm64_toIR.c Wed Jun 4 11:36:54 2014
@@ -5398,7 +5398,7 @@
MOV Vd.2d #imm (q=1)
Allowable op:cmode
FMOV = 1:1111
- MOVI = 0:xx00, 1:0x00, 1:10x0, 1:110x, 11110
+ MOVI = 0:xx00, 1:0x00, 1:10x0, 1:110x, x:1110
*/
if (INSN(31,31) == 0
&& INSN(28,19) == BITS10(0,1,1,1,1,0,0,0,0,0)
@@ -5418,7 +5418,7 @@
case BITS5(1,0,0,0,0): case BITS5(1,0,1,0,0): // 1:0x00
case BITS5(1,1,0,0,0): case BITS5(1,1,0,1,0): // 1:10x0
case BITS5(1,1,1,0,0): case BITS5(1,1,1,0,1): // 1:110x
- case BITS5(1,1,1,1,0): // 1:1110
+ case BITS5(1,1,1,1,0): case BITS5(0,1,1,1,0): // x:1110
ok = True; break;
default:
break;
|
|
From: <sv...@va...> - 2014-06-04 11:36:35
|
Author: dejanj
Date: Wed Jun 4 11:36:21 2014
New Revision: 13994
Log:
mips64: Tests for Cavium MIPS Octeon Atomic and Count Instructions.
Tests for instructions:
baddu, pop, dpop, saa, saad, laa, laad, lai, laid, lad, ladd, law, lawd,
las, lasd, lac, lacd
Added:
trunk/none/tests/mips64/cvm_atomic.c
trunk/none/tests/mips64/cvm_atomic.stderr.exp
trunk/none/tests/mips64/cvm_atomic.stdout.exp-LE
trunk/none/tests/mips64/cvm_atomic.stdout.exp-non-octeon
trunk/none/tests/mips64/cvm_atomic.vgtest
trunk/none/tests/mips64/cvm_atomic_thread.c
trunk/none/tests/mips64/cvm_atomic_thread.stderr.exp
trunk/none/tests/mips64/cvm_atomic_thread.stdout.exp-LE
trunk/none/tests/mips64/cvm_atomic_thread.stdout.exp-non-octeon
trunk/none/tests/mips64/cvm_atomic_thread.vgtest
Modified:
trunk/NEWS
trunk/docs/internals/3_9_BUGSTATUS.txt
trunk/none/tests/mips64/ (props changed)
trunk/none/tests/mips64/Makefile.am
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Wed Jun 4 11:36:21 2014
@@ -90,6 +90,7 @@
326921 coregrind fails to compile m_trampoline.S with MIPS/Linux port of V
326983 Clear direction flag after tests on amd64.
327212 Do not prepend the current directory to absolute path names.
+327223 Support for Cavium MIPS Octeon Atomic and Count Instructions
327238 Callgrind Assertion 'passed <= last_bb->cjmp_count' failed
327284 s390x: Fix translation of the risbg instruction
327639 vex amd64->IR pcmpestri SSE4.2 instruction is unsupported 0x34
Modified: trunk/docs/internals/3_9_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_9_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_9_BUGSTATUS.txt Wed Jun 4 11:36:21 2014
@@ -38,7 +38,6 @@
=== VEX/mips ===========================================================
-327223 Support for Cavium MIPS Octeon Atomic and Count Instructions
328147 vex mips->IR: unhandled instruction bytes: 0x0 0x0 0x0 0xE
=== VEX/ppc ============================================================
Modified: trunk/none/tests/mips64/Makefile.am
==============================================================================
--- trunk/none/tests/mips64/Makefile.am (original)
+++ trunk/none/tests/mips64/Makefile.am Wed Jun 4 11:36:21 2014
@@ -15,6 +15,10 @@
cvm_lx_ins.stdout.exp-LE cvm_lx_ins.stdout.exp-BE \
cvm_lx_ins.stdout.exp-non-octeon \
cvm_lx_ins.stderr.exp cvm_lx_ins.vgtest \
+ cvm_atomic.stdout.exp-LE cvm_atomic.stdout.exp-non-octeon \
+ cvm_atomic.stderr.exp cvm_atomic.vgtest \
+ cvm_atomic_thread.stdout.exp-LE cvm_atomic_thread.stdout.exp-non-octeon \
+ cvm_atomic_thread.stderr.exp cvm_atomic_thread.vgtest \
extract_insert_bit_field.stdout.exp-mips64 \
extract_insert_bit_field.stdout.exp-mips64r2 \
extract_insert_bit_field.stderr.exp extract_insert_bit_field.vgtest \
@@ -61,6 +65,8 @@
branches \
cvm_ins \
cvm_lx_ins \
+ cvm_atomic \
+ cvm_atomic_thread \
extract_insert_bit_field \
fpu_arithmetic \
fpu_branches \
@@ -89,6 +95,8 @@
cvm_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON@
cvm_lx_ins_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
+cvm_atomic_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
+cvm_atomic_thread_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
load_indexed_instructions_CFLAGS = $(AM_CFLAGS) -g -O0 @FLAG_OCTEON2@
fpu_arithmetic_CFLAGS = $(AM_CFLAGS) -lm
Added: trunk/none/tests/mips64/cvm_atomic.c
==============================================================================
--- trunk/none/tests/mips64/cvm_atomic.c (added)
+++ trunk/none/tests/mips64/cvm_atomic.c Wed Jun 4 11:36:21 2014
@@ -0,0 +1,298 @@
+#include <stdio.h>
+
+#define N 256
+
+unsigned long long reg_val_double[N];
+
+void init_reg_val_double()
+{
+ unsigned long c = 19650218UL;
+ int i;
+ reg_val_double[0]= c & 0xffffffffUL;
+ for (i = 1; i < N; i++) {
+ reg_val_double[i] = (1812433253UL * (reg_val_double[i - 1] ^
+ (reg_val_double[i - 1] >> 30)) + i);
+ }
+}
+
+
+/* Make a copy of original array to prevent the unexpected changes by Atomic Add
+ Instructions */
+unsigned long long reg_val_double_copy[N];
+
+void copy_reg_val_double()
+{
+ int i;
+ for (i = 0; i < N; i++) {
+ reg_val_double_copy[i] = reg_val_double[i];
+ }
+}
+
+/* TEST1_32/64 macro is used in load atomic increment/decrement/set/clear
+ instructions. After executing each instruction we must check both memory
+ location and register value.
+
+ 1: Move arguments (offset and base address) to registers
+ 2: Add offset and base address to make absolute address
+ 3: Execute instruction
+ 4: Move result from register ($t3)
+ 5: Load memory data ('lw' for 32bit instruction and 'ld' for 64bit addresses)
+*/
+#define TEST1_32(instruction, offset,mem) \
+{ \
+ unsigned long out = 0; \
+ unsigned long res_mem = 0; \
+ __asm__ volatile( \
+ "move $t0, %2" "\n\t" \
+ "move $t1, %3" "\n\t" \
+ "daddu $t0, $t1, $t0" "\n\t" \
+ instruction " $t3, ($t0)" "\n\t" \
+ "move %0, $t3" "\n\t" \
+ "lw %1, 0($t0)" "\n\t" \
+ : "=&r" (out), "=&r"(res_mem) \
+ : "r" (mem) , "r" (offset) \
+ : "$12", "$13", "cc", "memory" \
+ ); \
+ printf("%s :: offset: 0x%x, out: 0x%lx, result:0x%lx\n", \
+ instruction, offset, out, res_mem); \
+}
+
+#define TEST1_64(instruction, offset,mem) \
+{ \
+ unsigned long out = 0; \
+ unsigned long res_mem = 0; \
+ __asm__ volatile( \
+ "move $t0, %2" "\n\t" \
+ "move $t1, %3" "\n\t" \
+ "daddu $t0, $t1, $t0" "\n\t" \
+ instruction " $t3, ($t0)" "\n\t" \
+ "move %0, $t3" "\n\t" \
+ "ld %1, 0($t0)" "\n\t" \
+ : "=&r" (out), "=&r"(res_mem) \
+ : "r" (mem) , "r" (offset) \
+ : "$12", "$13", "cc", "memory" \
+ ); \
+ printf("%s :: offset: 0x%x, out: 0x%lx, result: 0x%lx\n", \
+ instruction, offset, out, res_mem); \
+}
+
+/* Test 2 macro is used for pop/dpop/baddu instructions. After executing each
+ instructions the macro performs following operations:
+
+ 1: Move arguments to registers
+ 2: Execute instruction
+ 3: Move result to register ($t3)
+*/
+#define TEST2(instruction, RSVal, RTVal) \
+{ \
+ unsigned long out; \
+ __asm__ volatile( \
+ "move $t1, %1" "\n\t" \
+ "move $t2, %2" "\n\t" \
+ instruction "\n\t" \
+ "move %0, $t3" "\n\t" \
+ : "=&r" (out) \
+ : "r" (RSVal), "r" (RTVal) \
+ : "$12", "$13", "cc", "memory" \
+ ); \
+ printf("%s :: rd 0x%lx, rs 0x%llx, rt 0x%llx\n", \
+ instruction, out, (long long) RSVal, (long long) RTVal); \
+}
+
+/* TEST3 macro is used for store atomic add and store atomic add doubleword
+ instructions. Following operations are performed by the test macro:
+
+ 1: Move arguments to the register
+ 2: Add offset and base address to make absolute address
+ 3: Execute instruction
+ 4: Load memory data
+*/
+#define TEST3(instruction, offset, mem, value) \
+{ \
+ unsigned long out = 0; \
+ unsigned long outPre = 0; \
+ __asm__ volatile( \
+ "move $t0, %2" "\n\t" \
+ "move $t1, %3" "\n\t" \
+ "daddu $t0, $t1, $t0" "\n\t" \
+ "ld %1, 0($t0)" "\n\t" \
+ "move $t2, %4" "\n\t" \
+ instruction " $t2, ($t0)" "\n\t" \
+ "ld %0, 0($t0)" "\n\t" \
+ : "=&r" (out), "=&r" (outPre) \
+ : "r" (mem) , "r" (offset), "r" (value) \
+ : "$12", "$13", "$14", "cc", "memory" \
+ ); \
+ printf("%s :: value: 0x%llx, memPre: 0x%lx, mem: 0x%lx\n", \
+ instruction, value, outPre, out); \
+}
+
+/* TEST4_32/64 is used for load atomic add/swap instructions. Following
+ operations are performed by macro after execution of each instruction:
+
+ 1: Move arguments to register.
+ 2: Add offset and base address to make absolute address.
+ 3: Execute instruction.
+ 4: Move result to register.
+ 5: Load memory data ('lw' for 32bit instruction and 'ld' for 64bit).
+*/
+#define TEST4_32(instruction, offset, mem) \
+{ \
+ unsigned long out = 0; \
+ unsigned long res_mem = 0; \
+ __asm__ volatile( \
+ "move $t0, %2" "\n\t" \
+ "move $t1, %3" "\n\t" \
+ "daddu $t0, $t0, $t1" "\n\t" \
+ instruction " $t3, ($t0), $t1" "\n\t" \
+ "move %0, $t3" "\n\t" \
+ "lw %1, 0($t0)" "\n\t" \
+ : "=&r" (out), "=&r"(res_mem) \
+ : "r" (mem) , "r" (offset) \
+ : "$12", "$13", "cc", "memory" \
+ ); \
+ printf("%s :: offset: 0x%x, out: 0x%lx, result:0x%lx\n", \
+ instruction, offset, out, res_mem); \
+}
+
+#define TEST4_64(instruction, offset, mem) \
+{ \
+ unsigned long out = 0; \
+ unsigned long res_mem = 0; \
+ __asm__ volatile( \
+ "move $t0, %2" "\n\t" \
+ "move $t1, %3" "\n\t" \
+ "daddu $t0, $t0, $t1" "\n\t" \
+ instruction " $t3, ($t0), $t1" "\n\t" \
+ "move %0, $t3" "\n\t" \
+ "ld %1, 0($t0)" "\n\t" \
+ : "=&r" (out), "=&r"(res_mem) \
+ : "r" (mem) , "r" (offset) \
+ : "$12", "$13", "cc", "memory" \
+ ); \
+ printf("%s :: offset: 0x%x, out: 0x%lx, result: 0x%lx\n", \
+ instruction, offset, out, res_mem); \
+}
+
+typedef enum {
+ BADDU, POP, DPOP, SAA, SAAD, LAA, LAAD, LAW, LAWD, LAI, LAID, LAD, LADD,
+ LAS, LASD, LAC, LACD
+} cvm_op;
+
+int main()
+{
+#if (_MIPS_ARCH_OCTEON2)
+ init_reg_val_double();
+ int i,j;
+ cvm_op op;
+ for (op = BADDU; op <= LACD; op++) {
+ switch(op){
+ /* Unsigned Byte Add - BADDU rd, rs, rt; Cavium OCTEON */
+ case BADDU: {
+ for(i = 4; i < N; i += 4)
+ for(j = 4; j < N; j += 4)
+ TEST2("baddu $t3, $t1, $t2", reg_val_double[i],
+ reg_val_double[j]);
+ break;
+ }
+ case POP: { /* Count Ones in a Word - POP */
+ for(j = 4; j < N; j += 4)
+ TEST2("pop $t3, $t1", reg_val_double[j], 0);
+ break;
+ }
+ case DPOP: { /* Count Ones in a Doubleword - DPOP */
+ for(j = 8; j < N; j += 8)
+ TEST2("dpop $t3, $t1", reg_val_double[j], 0);
+ break;
+ }
+ case SAA: { /* Atomic Add Word - saa rt, (base). */
+ copy_reg_val_double();
+ for(j = 4; j < N; j += 4)
+ TEST3("saa", j, reg_val_double_copy, reg_val_double[j]);
+ break;
+ }
+ case SAAD: { /* Atomic Add Double - saad rt, (base). */
+ copy_reg_val_double();
+ for(j = 8; j < N; j += 8)
+ TEST3("saad", j, reg_val_double_copy, reg_val_double[j]);
+ break;
+ }
+ case LAA: { /* Load Atomic Add Word - laa rd, (base), rt. */
+ copy_reg_val_double();
+ for(j = 4; j < N; j += 4)
+ TEST4_32("laa", j, reg_val_double_copy);
+ break;
+ }
+ case LAAD: { /* Load Atomic Add Double - laad rd, (base), rt */
+ copy_reg_val_double();
+ for(j = 8; j < N; j += 8)
+ TEST4_64("laad ", j, reg_val_double_copy);
+ break;
+ }
+ case LAW: { /* Load Atomic Swap Word - law rd, (base), rt */
+ copy_reg_val_double();
+ for(j = 4; j < N; j += 4)
+ TEST4_32("law", j, reg_val_double_copy);
+ break;
+ }
+ case LAWD: { /* Load Atomic Swap Double - lawd rd, (base), rt */
+ copy_reg_val_double();
+ for(j = 8; j < N; j += 8)
+ TEST4_64("lawd", j, reg_val_double_copy);
+ break;
+ }
+ case LAI: { /* Load Atomic Increment Word - lai rd, (base) */
+ copy_reg_val_double();
+ for(i = 4; i < N; i += 4)
+ TEST1_32("lai", i, reg_val_double_copy);
+ break;
+ }
+ case LAID: { /* Load Atomic Increment Double - laid rd, (base) */
+ copy_reg_val_double();
+ for(i = 8; i < N; i += 8)
+ TEST1_64("laid ", i, reg_val_double_copy);
+ break;
+ }
+ case LAD: { /* Load Atomic Decrement Word - lad rd, (base) */
+ copy_reg_val_double();
+ for(i = 4; i < N; i += 4)
+ TEST1_32("lad", i, reg_val_double_copy);
+ break;
+ }
+ case LADD: { /* Load Atomic Decrement Double - ladd rd, (base) */
+ copy_reg_val_double();
+ for(i = 8; i < N; i += 8)
+ TEST1_64("ladd",i, reg_val_double_copy);
+ break;
+ }
+ case LAS:{ /* Load Atomic Set Word - las rd, (base) */
+ copy_reg_val_double();
+ for(i = 4; i < N; i += 4)
+ TEST1_32("las",i, reg_val_double_copy);
+ break;
+ }
+ case LASD:{ /* Load Atomic Set Word - lasd rd, (base) */
+ copy_reg_val_double();
+ for(i = 8; i < N; i += 8)
+ TEST1_64("lasd",i, reg_val_double_copy);
+ break;
+ }
+ case LAC: { /* Load Atomic Clear Word - lac rd, (base) */
+ copy_reg_val_double();
+ for(i = 4; i < N; i += 4)
+ TEST1_32("lac",i, reg_val_double_copy);
+ break;
+ }
+ case LACD: { /* Load Atomic Clear Double - lacd rd, (base) */
+ copy_reg_val_double();
+ for(i = 8; i < N; i += 8)
+ TEST1_64("lacd",i, reg_val_double_copy);
+ break;
+ }
+ default:
+ printf("Nothing to be executed \n");
+ }
+ }
+#endif
+ return 0;
+}
Added: trunk/none/tests/mips64/cvm_atomic.stderr.exp
==============================================================================
(empty)
Added: trunk/none/tests/mips64/cvm_atomic.stdout.exp-LE
==============================================================================
--- trunk/none/tests/mips64/cvm_atomic.stdout.exp-LE (added)
+++ trunk/none/tests/mips64/cvm_atomic.stdout.exp-LE Wed Jun 4 11:36:21 2014
@@ -0,0 +1,4721 @@
+baddu $t3, $t1, $t2 :: rd 0x4, rs 0x42b0c0a28677b502, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x42b0c0a28677b502, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x82, rs 0x42b0c0a28677b502, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0x99, rs 0x42b0c0a28677b502, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x42b0c0a28677b502, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0x68, rs 0x42b0c0a28677b502, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0x38, rs 0x42b0c0a28677b502, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0xa9, rs 0x42b0c0a28677b502, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0x16, rs 0x42b0c0a28677b502, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0x42, rs 0x42b0c0a28677b502, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0x5c, rs 0x42b0c0a28677b502, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0xba, rs 0x42b0c0a28677b502, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0xad, rs 0x42b0c0a28677b502, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0x51, rs 0x42b0c0a28677b502, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0x3c, rs 0x42b0c0a28677b502, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0xaf, rs 0x42b0c0a28677b502, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x9d, rs 0x42b0c0a28677b502, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0x52, rs 0x42b0c0a28677b502, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0xc2, rs 0x42b0c0a28677b502, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0x46, rs 0x42b0c0a28677b502, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0x29, rs 0x42b0c0a28677b502, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0x91, rs 0x42b0c0a28677b502, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0xd9, rs 0x42b0c0a28677b502, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0x27, rs 0x42b0c0a28677b502, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0xe5, rs 0x42b0c0a28677b502, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0xf, rs 0x42b0c0a28677b502, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x89, rs 0x42b0c0a28677b502, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0x7b, rs 0x42b0c0a28677b502, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0x35, rs 0x42b0c0a28677b502, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0xdc, rs 0x42b0c0a28677b502, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0xa4, rs 0x42b0c0a28677b502, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0x4d, rs 0x42b0c0a28677b502, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0xc, rs 0x42b0c0a28677b502, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0x42b0c0a28677b502, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x42b0c0a28677b502, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0x38, rs 0x42b0c0a28677b502, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0x93, rs 0x42b0c0a28677b502, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0xf4, rs 0x42b0c0a28677b502, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0x6d, rs 0x42b0c0a28677b502, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0x63, rs 0x42b0c0a28677b502, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0x3f, rs 0x42b0c0a28677b502, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0x28, rs 0x42b0c0a28677b502, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0x6d, rs 0x42b0c0a28677b502, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0x42b0c0a28677b502, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0x4c, rs 0x42b0c0a28677b502, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0x70, rs 0x42b0c0a28677b502, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0xf7, rs 0x42b0c0a28677b502, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0x51, rs 0x42b0c0a28677b502, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x9f, rs 0x42b0c0a28677b502, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0xcb, rs 0x42b0c0a28677b502, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0x65, rs 0x42b0c0a28677b502, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0xf7, rs 0x42b0c0a28677b502, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0xf5, rs 0x42b0c0a28677b502, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0xdf, rs 0x42b0c0a28677b502, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0x29, rs 0x42b0c0a28677b502, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0x81, rs 0x42b0c0a28677b502, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0xb4, rs 0x42b0c0a28677b502, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0x59, rs 0x42b0c0a28677b502, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0x5d, rs 0x42b0c0a28677b502, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0x8b, rs 0x42b0c0a28677b502, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0x54, rs 0x42b0c0a28677b502, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0x42b0c0a28677b502, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0x68, rs 0x42b0c0a28677b502, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x9e705cc51ad8dca0, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0x40, rs 0x9e705cc51ad8dca0, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x20, rs 0x9e705cc51ad8dca0, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0x37, rs 0x9e705cc51ad8dca0, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0x65, rs 0x9e705cc51ad8dca0, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0x6, rs 0x9e705cc51ad8dca0, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0xd6, rs 0x9e705cc51ad8dca0, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0x47, rs 0x9e705cc51ad8dca0, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0xb4, rs 0x9e705cc51ad8dca0, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0xe0, rs 0x9e705cc51ad8dca0, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0xfa, rs 0x9e705cc51ad8dca0, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0x58, rs 0x9e705cc51ad8dca0, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0x4b, rs 0x9e705cc51ad8dca0, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0xef, rs 0x9e705cc51ad8dca0, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0xda, rs 0x9e705cc51ad8dca0, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0x4d, rs 0x9e705cc51ad8dca0, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x3b, rs 0x9e705cc51ad8dca0, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0xf0, rs 0x9e705cc51ad8dca0, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0x60, rs 0x9e705cc51ad8dca0, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0xe4, rs 0x9e705cc51ad8dca0, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x9e705cc51ad8dca0, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0x2f, rs 0x9e705cc51ad8dca0, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0x77, rs 0x9e705cc51ad8dca0, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0xc5, rs 0x9e705cc51ad8dca0, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0x83, rs 0x9e705cc51ad8dca0, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0xad, rs 0x9e705cc51ad8dca0, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x27, rs 0x9e705cc51ad8dca0, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0x19, rs 0x9e705cc51ad8dca0, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0xd3, rs 0x9e705cc51ad8dca0, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x7a, rs 0x9e705cc51ad8dca0, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0x42, rs 0x9e705cc51ad8dca0, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0xeb, rs 0x9e705cc51ad8dca0, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0xaa, rs 0x9e705cc51ad8dca0, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x9e705cc51ad8dca0, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0x2a, rs 0x9e705cc51ad8dca0, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0xd6, rs 0x9e705cc51ad8dca0, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0x31, rs 0x9e705cc51ad8dca0, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x92, rs 0x9e705cc51ad8dca0, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0xb, rs 0x9e705cc51ad8dca0, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0x1, rs 0x9e705cc51ad8dca0, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0xdd, rs 0x9e705cc51ad8dca0, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0xc6, rs 0x9e705cc51ad8dca0, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0xb, rs 0x9e705cc51ad8dca0, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x9e705cc51ad8dca0, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0xea, rs 0x9e705cc51ad8dca0, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0xe, rs 0x9e705cc51ad8dca0, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x95, rs 0x9e705cc51ad8dca0, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0xef, rs 0x9e705cc51ad8dca0, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x3d, rs 0x9e705cc51ad8dca0, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0x69, rs 0x9e705cc51ad8dca0, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0x3, rs 0x9e705cc51ad8dca0, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x95, rs 0x9e705cc51ad8dca0, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x93, rs 0x9e705cc51ad8dca0, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0x7d, rs 0x9e705cc51ad8dca0, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x9e705cc51ad8dca0, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0x1f, rs 0x9e705cc51ad8dca0, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0x52, rs 0x9e705cc51ad8dca0, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0xf7, rs 0x9e705cc51ad8dca0, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0xfb, rs 0x9e705cc51ad8dca0, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0x29, rs 0x9e705cc51ad8dca0, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0xf2, rs 0x9e705cc51ad8dca0, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x9e705cc51ad8dca0, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0x6, rs 0x9e705cc51ad8dca0, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0x82, rs 0x47f505569a08a180, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0x20, rs 0x47f505569a08a180, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x0, rs 0x47f505569a08a180, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0x17, rs 0x47f505569a08a180, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0x45, rs 0x47f505569a08a180, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0xe6, rs 0x47f505569a08a180, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0xb6, rs 0x47f505569a08a180, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0x27, rs 0x47f505569a08a180, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0x94, rs 0x47f505569a08a180, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0xc0, rs 0x47f505569a08a180, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0xda, rs 0x47f505569a08a180, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0x38, rs 0x47f505569a08a180, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0x2b, rs 0x47f505569a08a180, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0xcf, rs 0x47f505569a08a180, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0xba, rs 0x47f505569a08a180, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0x2d, rs 0x47f505569a08a180, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x1b, rs 0x47f505569a08a180, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0xd0, rs 0x47f505569a08a180, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0x40, rs 0x47f505569a08a180, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0xc4, rs 0x47f505569a08a180, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0xa7, rs 0x47f505569a08a180, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0xf, rs 0x47f505569a08a180, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0x57, rs 0x47f505569a08a180, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0xa5, rs 0x47f505569a08a180, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0x63, rs 0x47f505569a08a180, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0x8d, rs 0x47f505569a08a180, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x7, rs 0x47f505569a08a180, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0xf9, rs 0x47f505569a08a180, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0xb3, rs 0x47f505569a08a180, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x5a, rs 0x47f505569a08a180, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0x22, rs 0x47f505569a08a180, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0xcb, rs 0x47f505569a08a180, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0x8a, rs 0x47f505569a08a180, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0x47f505569a08a180, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0xa, rs 0x47f505569a08a180, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0xb6, rs 0x47f505569a08a180, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0x11, rs 0x47f505569a08a180, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x72, rs 0x47f505569a08a180, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0xeb, rs 0x47f505569a08a180, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0xe1, rs 0x47f505569a08a180, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0xbd, rs 0x47f505569a08a180, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0xa6, rs 0x47f505569a08a180, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0xeb, rs 0x47f505569a08a180, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0x47f505569a08a180, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0xca, rs 0x47f505569a08a180, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0x47f505569a08a180, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x75, rs 0x47f505569a08a180, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0xcf, rs 0x47f505569a08a180, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x1d, rs 0x47f505569a08a180, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0x49, rs 0x47f505569a08a180, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0xe3, rs 0x47f505569a08a180, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x75, rs 0x47f505569a08a180, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x73, rs 0x47f505569a08a180, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0x5d, rs 0x47f505569a08a180, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0xa7, rs 0x47f505569a08a180, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0xff, rs 0x47f505569a08a180, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0x32, rs 0x47f505569a08a180, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0xd7, rs 0x47f505569a08a180, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0xdb, rs 0x47f505569a08a180, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0x9, rs 0x47f505569a08a180, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0xd2, rs 0x47f505569a08a180, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0x47f505569a08a180, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0xe6, rs 0x47f505569a08a180, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0x99, rs 0x94ff52fc81afa797, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0x37, rs 0x94ff52fc81afa797, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x17, rs 0x94ff52fc81afa797, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0x2e, rs 0x94ff52fc81afa797, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0x5c, rs 0x94ff52fc81afa797, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0xfd, rs 0x94ff52fc81afa797, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0xcd, rs 0x94ff52fc81afa797, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0x3e, rs 0x94ff52fc81afa797, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0xab, rs 0x94ff52fc81afa797, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0xd7, rs 0x94ff52fc81afa797, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0xf1, rs 0x94ff52fc81afa797, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0x4f, rs 0x94ff52fc81afa797, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0x42, rs 0x94ff52fc81afa797, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0xe6, rs 0x94ff52fc81afa797, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0xd1, rs 0x94ff52fc81afa797, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0x44, rs 0x94ff52fc81afa797, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x32, rs 0x94ff52fc81afa797, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0xe7, rs 0x94ff52fc81afa797, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0x57, rs 0x94ff52fc81afa797, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0xdb, rs 0x94ff52fc81afa797, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0xbe, rs 0x94ff52fc81afa797, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0x26, rs 0x94ff52fc81afa797, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0x6e, rs 0x94ff52fc81afa797, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0xbc, rs 0x94ff52fc81afa797, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0x7a, rs 0x94ff52fc81afa797, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0xa4, rs 0x94ff52fc81afa797, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x1e, rs 0x94ff52fc81afa797, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0x10, rs 0x94ff52fc81afa797, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0xca, rs 0x94ff52fc81afa797, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x71, rs 0x94ff52fc81afa797, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0x39, rs 0x94ff52fc81afa797, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0xe2, rs 0x94ff52fc81afa797, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0xa1, rs 0x94ff52fc81afa797, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x83, rs 0x94ff52fc81afa797, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0x21, rs 0x94ff52fc81afa797, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0xcd, rs 0x94ff52fc81afa797, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0x28, rs 0x94ff52fc81afa797, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x89, rs 0x94ff52fc81afa797, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0x2, rs 0x94ff52fc81afa797, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0xf8, rs 0x94ff52fc81afa797, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0xd4, rs 0x94ff52fc81afa797, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0xbd, rs 0x94ff52fc81afa797, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0x2, rs 0x94ff52fc81afa797, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x83, rs 0x94ff52fc81afa797, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0xe1, rs 0x94ff52fc81afa797, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0x5, rs 0x94ff52fc81afa797, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x94ff52fc81afa797, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0xe6, rs 0x94ff52fc81afa797, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x34, rs 0x94ff52fc81afa797, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0x60, rs 0x94ff52fc81afa797, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0xfa, rs 0x94ff52fc81afa797, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x94ff52fc81afa797, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x8a, rs 0x94ff52fc81afa797, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0x74, rs 0x94ff52fc81afa797, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0xbe, rs 0x94ff52fc81afa797, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0x16, rs 0x94ff52fc81afa797, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0x49, rs 0x94ff52fc81afa797, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0x94ff52fc81afa797, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0xf2, rs 0x94ff52fc81afa797, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0x20, rs 0x94ff52fc81afa797, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0xe9, rs 0x94ff52fc81afa797, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0x83, rs 0x94ff52fc81afa797, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0xfd, rs 0x94ff52fc81afa797, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x556b3ecaccf17ac5, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0x65, rs 0x556b3ecaccf17ac5, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x45, rs 0x556b3ecaccf17ac5, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0x5c, rs 0x556b3ecaccf17ac5, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0x8a, rs 0x556b3ecaccf17ac5, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0x2b, rs 0x556b3ecaccf17ac5, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0xfb, rs 0x556b3ecaccf17ac5, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0x556b3ecaccf17ac5, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0xd9, rs 0x556b3ecaccf17ac5, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0x5, rs 0x556b3ecaccf17ac5, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0x1f, rs 0x556b3ecaccf17ac5, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0x7d, rs 0x556b3ecaccf17ac5, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0x70, rs 0x556b3ecaccf17ac5, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0x14, rs 0x556b3ecaccf17ac5, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0xff, rs 0x556b3ecaccf17ac5, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0x72, rs 0x556b3ecaccf17ac5, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x60, rs 0x556b3ecaccf17ac5, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0x15, rs 0x556b3ecaccf17ac5, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0x85, rs 0x556b3ecaccf17ac5, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0x9, rs 0x556b3ecaccf17ac5, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0xec, rs 0x556b3ecaccf17ac5, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0x54, rs 0x556b3ecaccf17ac5, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0x556b3ecaccf17ac5, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0xea, rs 0x556b3ecaccf17ac5, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0xa8, rs 0x556b3ecaccf17ac5, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0xd2, rs 0x556b3ecaccf17ac5, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x4c, rs 0x556b3ecaccf17ac5, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0x3e, rs 0x556b3ecaccf17ac5, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0xf8, rs 0x556b3ecaccf17ac5, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x9f, rs 0x556b3ecaccf17ac5, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0x67, rs 0x556b3ecaccf17ac5, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0x10, rs 0x556b3ecaccf17ac5, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0xcf, rs 0x556b3ecaccf17ac5, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0xb1, rs 0x556b3ecaccf17ac5, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0x4f, rs 0x556b3ecaccf17ac5, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0xfb, rs 0x556b3ecaccf17ac5, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0x56, rs 0x556b3ecaccf17ac5, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0xb7, rs 0x556b3ecaccf17ac5, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0x30, rs 0x556b3ecaccf17ac5, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0x26, rs 0x556b3ecaccf17ac5, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0x2, rs 0x556b3ecaccf17ac5, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0xeb, rs 0x556b3ecaccf17ac5, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0x30, rs 0x556b3ecaccf17ac5, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0xb1, rs 0x556b3ecaccf17ac5, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0xf, rs 0x556b3ecaccf17ac5, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0x33, rs 0x556b3ecaccf17ac5, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0xba, rs 0x556b3ecaccf17ac5, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0x14, rs 0x556b3ecaccf17ac5, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x62, rs 0x556b3ecaccf17ac5, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0x8e, rs 0x556b3ecaccf17ac5, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0x28, rs 0x556b3ecaccf17ac5, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0xba, rs 0x556b3ecaccf17ac5, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0xb8, rs 0x556b3ecaccf17ac5, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x556b3ecaccf17ac5, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0xec, rs 0x556b3ecaccf17ac5, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0x44, rs 0x556b3ecaccf17ac5, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0x77, rs 0x556b3ecaccf17ac5, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0x1c, rs 0x556b3ecaccf17ac5, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0x20, rs 0x556b3ecaccf17ac5, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0x4e, rs 0x556b3ecaccf17ac5, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0x17, rs 0x556b3ecaccf17ac5, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0xb1, rs 0x556b3ecaccf17ac5, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0x2b, rs 0x556b3ecaccf17ac5, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0x68, rs 0x3c2cd9a9cda20766, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0x6, rs 0x3c2cd9a9cda20766, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0xe6, rs 0x3c2cd9a9cda20766, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0xfd, rs 0x3c2cd9a9cda20766, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0x2b, rs 0x3c2cd9a9cda20766, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0xcc, rs 0x3c2cd9a9cda20766, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0x3c2cd9a9cda20766, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0xd, rs 0x3c2cd9a9cda20766, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0x7a, rs 0x3c2cd9a9cda20766, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0xa6, rs 0x3c2cd9a9cda20766, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0xc0, rs 0x3c2cd9a9cda20766, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0x1e, rs 0x3c2cd9a9cda20766, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0x11, rs 0x3c2cd9a9cda20766, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0xb5, rs 0x3c2cd9a9cda20766, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0xa0, rs 0x3c2cd9a9cda20766, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0x13, rs 0x3c2cd9a9cda20766, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x1, rs 0x3c2cd9a9cda20766, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0xb6, rs 0x3c2cd9a9cda20766, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0x26, rs 0x3c2cd9a9cda20766, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0xaa, rs 0x3c2cd9a9cda20766, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0x8d, rs 0x3c2cd9a9cda20766, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0xf5, rs 0x3c2cd9a9cda20766, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0x3d, rs 0x3c2cd9a9cda20766, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0x8b, rs 0x3c2cd9a9cda20766, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0x49, rs 0x3c2cd9a9cda20766, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0x73, rs 0x3c2cd9a9cda20766, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0xed, rs 0x3c2cd9a9cda20766, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0xdf, rs 0x3c2cd9a9cda20766, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0x99, rs 0x3c2cd9a9cda20766, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x40, rs 0x3c2cd9a9cda20766, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0x8, rs 0x3c2cd9a9cda20766, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0xb1, rs 0x3c2cd9a9cda20766, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0x70, rs 0x3c2cd9a9cda20766, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x52, rs 0x3c2cd9a9cda20766, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0xf0, rs 0x3c2cd9a9cda20766, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0x3c2cd9a9cda20766, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0xf7, rs 0x3c2cd9a9cda20766, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x58, rs 0x3c2cd9a9cda20766, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0xd1, rs 0x3c2cd9a9cda20766, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x3c2cd9a9cda20766, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0xa3, rs 0x3c2cd9a9cda20766, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0x8c, rs 0x3c2cd9a9cda20766, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0xd1, rs 0x3c2cd9a9cda20766, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x52, rs 0x3c2cd9a9cda20766, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0xb0, rs 0x3c2cd9a9cda20766, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0xd4, rs 0x3c2cd9a9cda20766, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x5b, rs 0x3c2cd9a9cda20766, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0xb5, rs 0x3c2cd9a9cda20766, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x3, rs 0x3c2cd9a9cda20766, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0x2f, rs 0x3c2cd9a9cda20766, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0xc9, rs 0x3c2cd9a9cda20766, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x5b, rs 0x3c2cd9a9cda20766, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x59, rs 0x3c2cd9a9cda20766, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0x43, rs 0x3c2cd9a9cda20766, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0x8d, rs 0x3c2cd9a9cda20766, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0xe5, rs 0x3c2cd9a9cda20766, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0x18, rs 0x3c2cd9a9cda20766, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0xbd, rs 0x3c2cd9a9cda20766, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0xc1, rs 0x3c2cd9a9cda20766, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0xef, rs 0x3c2cd9a9cda20766, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0xb8, rs 0x3c2cd9a9cda20766, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0x52, rs 0x3c2cd9a9cda20766, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0xcc, rs 0x3c2cd9a9cda20766, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0x38, rs 0xd0d070db710cd036, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0xd6, rs 0xd0d070db710cd036, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0xb6, rs 0xd0d070db710cd036, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0xcd, rs 0xd0d070db710cd036, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0xfb, rs 0xd0d070db710cd036, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0xd0d070db710cd036, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0xd0d070db710cd036, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0xdd, rs 0xd0d070db710cd036, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0x4a, rs 0xd0d070db710cd036, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0x76, rs 0xd0d070db710cd036, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0x90, rs 0xd0d070db710cd036, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0xd0d070db710cd036, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0xe1, rs 0xd0d070db710cd036, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0x85, rs 0xd0d070db710cd036, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0x70, rs 0xd0d070db710cd036, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0xe3, rs 0xd0d070db710cd036, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0xd1, rs 0xd0d070db710cd036, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0x86, rs 0xd0d070db710cd036, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0xf6, rs 0xd0d070db710cd036, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0x7a, rs 0xd0d070db710cd036, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0x5d, rs 0xd0d070db710cd036, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0xc5, rs 0xd0d070db710cd036, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0xd, rs 0xd0d070db710cd036, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0x5b, rs 0xd0d070db710cd036, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0x19, rs 0xd0d070db710cd036, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0x43, rs 0xd0d070db710cd036, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0xbd, rs 0xd0d070db710cd036, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0xaf, rs 0xd0d070db710cd036, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0x69, rs 0xd0d070db710cd036, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x10, rs 0xd0d070db710cd036, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0xd8, rs 0xd0d070db710cd036, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0x81, rs 0xd0d070db710cd036, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0x40, rs 0xd0d070db710cd036, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x22, rs 0xd0d070db710cd036, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0xc0, rs 0xd0d070db710cd036, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0xd0d070db710cd036, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0xc7, rs 0xd0d070db710cd036, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x28, rs 0xd0d070db710cd036, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0xa1, rs 0xd0d070db710cd036, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0x97, rs 0xd0d070db710cd036, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0x73, rs 0xd0d070db710cd036, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0x5c, rs 0xd0d070db710cd036, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0xa1, rs 0xd0d070db710cd036, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x22, rs 0xd0d070db710cd036, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0x80, rs 0xd0d070db710cd036, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0xa4, rs 0xd0d070db710cd036, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x2b, rs 0xd0d070db710cd036, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0x85, rs 0xd0d070db710cd036, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0xd3, rs 0xd0d070db710cd036, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0xff, rs 0xd0d070db710cd036, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0x99, rs 0xd0d070db710cd036, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x2b, rs 0xd0d070db710cd036, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x29, rs 0xd0d070db710cd036, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0x13, rs 0xd0d070db710cd036, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0x5d, rs 0xd0d070db710cd036, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0xb5, rs 0xd0d070db710cd036, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0xe8, rs 0xd0d070db710cd036, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0x8d, rs 0xd0d070db710cd036, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0x91, rs 0xd0d070db710cd036, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0xbf, rs 0xd0d070db710cd036, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0x88, rs 0xd0d070db710cd036, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0x22, rs 0xd0d070db710cd036, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0xd0d070db710cd036, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0xa9, rs 0x2f39454412d6e4a7, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0x47, rs 0x2f39454412d6e4a7, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x27, rs 0x2f39454412d6e4a7, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0x3e, rs 0x2f39454412d6e4a7, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0x6c, rs 0x2f39454412d6e4a7, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0xd, rs 0x2f39454412d6e4a7, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0xdd, rs 0x2f39454412d6e4a7, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0x4e, rs 0x2f39454412d6e4a7, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0xbb, rs 0x2f39454412d6e4a7, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0xe7, rs 0x2f39454412d6e4a7, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0x1, rs 0x2f39454412d6e4a7, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0x5f, rs 0x2f39454412d6e4a7, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0x52, rs 0x2f39454412d6e4a7, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0xf6, rs 0x2f39454412d6e4a7, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0xe1, rs 0x2f39454412d6e4a7, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0x54, rs 0x2f39454412d6e4a7, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0x42, rs 0x2f39454412d6e4a7, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0xf7, rs 0x2f39454412d6e4a7, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0x67, rs 0x2f39454412d6e4a7, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0xeb, rs 0x2f39454412d6e4a7, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0xce, rs 0x2f39454412d6e4a7, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0x36, rs 0x2f39454412d6e4a7, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0x7e, rs 0x2f39454412d6e4a7, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0xcc, rs 0x2f39454412d6e4a7, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0x8a, rs 0x2f39454412d6e4a7, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0xb4, rs 0x2f39454412d6e4a7, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x2e, rs 0x2f39454412d6e4a7, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0x20, rs 0x2f39454412d6e4a7, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0xda, rs 0x2f39454412d6e4a7, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0x81, rs 0x2f39454412d6e4a7, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0x49, rs 0x2f39454412d6e4a7, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0xf2, rs 0x2f39454412d6e4a7, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0xb1, rs 0x2f39454412d6e4a7, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x93, rs 0x2f39454412d6e4a7, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0x31, rs 0x2f39454412d6e4a7, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0xdd, rs 0x2f39454412d6e4a7, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0x38, rs 0x2f39454412d6e4a7, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x99, rs 0x2f39454412d6e4a7, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0x12, rs 0x2f39454412d6e4a7, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0x8, rs 0x2f39454412d6e4a7, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0xe4, rs 0x2f39454412d6e4a7, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0xcd, rs 0x2f39454412d6e4a7, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0x12, rs 0x2f39454412d6e4a7, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x93, rs 0x2f39454412d6e4a7, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0xf1, rs 0x2f39454412d6e4a7, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0x15, rs 0x2f39454412d6e4a7, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0x2f39454412d6e4a7, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0xf6, rs 0x2f39454412d6e4a7, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0x44, rs 0x2f39454412d6e4a7, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0x70, rs 0x2f39454412d6e4a7, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0xa, rs 0x2f39454412d6e4a7, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x9c, rs 0x2f39454412d6e4a7, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x9a, rs 0x2f39454412d6e4a7, rt 0xf2e7a490978058f3
+baddu $t3, $t1, $t2 :: rd 0x84, rs 0x2f39454412d6e4a7, rt 0xa3d991b79941dedd
+baddu $t3, $t1, $t2 :: rd 0xce, rs 0x2f39454412d6e4a7, rt 0x185b88e0db8d7d27
+baddu $t3, $t1, $t2 :: rd 0x26, rs 0x2f39454412d6e4a7, rt 0xd58ecbabde35697f
+baddu $t3, $t1, $t2 :: rd 0x59, rs 0x2f39454412d6e4a7, rt 0x2f7e224a1c170ab2
+baddu $t3, $t1, $t2 :: rd 0xfe, rs 0x2f39454412d6e4a7, rt 0xfe71fca06c0eb657
+baddu $t3, $t1, $t2 :: rd 0x2, rs 0x2f39454412d6e4a7, rt 0xeed8f3518102315b
+baddu $t3, $t1, $t2 :: rd 0x30, rs 0x2f39454412d6e4a7, rt 0x34fdfc9a9302be89
+baddu $t3, $t1, $t2 :: rd 0xf9, rs 0x2f39454412d6e4a7, rt 0xc49ee3ad81b5af52
+baddu $t3, $t1, $t2 :: rd 0x93, rs 0x2f39454412d6e4a7, rt 0x9e02de4b678930ec
+baddu $t3, $t1, $t2 :: rd 0xd, rs 0x2f39454412d6e4a7, rt 0x680cce5fb236b666
+baddu $t3, $t1, $t2 :: rd 0x16, rs 0xed5005cbc8b0a214, rt 0x42b0c0a28677b502
+baddu $t3, $t1, $t2 :: rd 0xb4, rs 0xed5005cbc8b0a214, rt 0x9e705cc51ad8dca0
+baddu $t3, $t1, $t2 :: rd 0x94, rs 0xed5005cbc8b0a214, rt 0x47f505569a08a180
+baddu $t3, $t1, $t2 :: rd 0xab, rs 0xed5005cbc8b0a214, rt 0x94ff52fc81afa797
+baddu $t3, $t1, $t2 :: rd 0xd9, rs 0xed5005cbc8b0a214, rt 0x556b3ecaccf17ac5
+baddu $t3, $t1, $t2 :: rd 0x7a, rs 0xed5005cbc8b0a214, rt 0x3c2cd9a9cda20766
+baddu $t3, $t1, $t2 :: rd 0x4a, rs 0xed5005cbc8b0a214, rt 0xd0d070db710cd036
+baddu $t3, $t1, $t2 :: rd 0xbb, rs 0xed5005cbc8b0a214, rt 0x2f39454412d6e4a7
+baddu $t3, $t1, $t2 :: rd 0x28, rs 0xed5005cbc8b0a214, rt 0xed5005cbc8b0a214
+baddu $t3, $t1, $t2 :: rd 0x54, rs 0xed5005cbc8b0a214, rt 0x87750a04ad765040
+baddu $t3, $t1, $t2 :: rd 0x6e, rs 0xed5005cbc8b0a214, rt 0xc4c770f630dcca5a
+baddu $t3, $t1, $t2 :: rd 0xcc, rs 0xed5005cbc8b0a214, rt 0xbb8c035e0de0f0b8
+baddu $t3, $t1, $t2 :: rd 0xbf, rs 0xed5005cbc8b0a214, rt 0x49fbf6a795b1a5ab
+baddu $t3, $t1, $t2 :: rd 0x63, rs 0xed5005cbc8b0a214, rt 0xd685884e76558c4f
+baddu $t3, $t1, $t2 :: rd 0x4e, rs 0xed5005cbc8b0a214, rt 0x58300f029cae393a
+baddu $t3, $t1, $t2 :: rd 0xc1, rs 0xed5005cbc8b0a214, rt 0xde230867a630f6ad
+baddu $t3, $t1, $t2 :: rd 0xaf, rs 0xed5005cbc8b0a214, rt 0x81daf8200468319b
+baddu $t3, $t1, $t2 :: rd 0x64, rs 0xed5005cbc8b0a214, rt 0x6778fdf3ba52a850
+baddu $t3, $t1, $t2 :: rd 0xd4, rs 0xed5005cbc8b0a214, rt 0xe4627f3fe5255fc0
+baddu $t3, $t1, $t2 :: rd 0x58, rs 0xed5005cbc8b0a214, rt 0x7caf83d2880ff344
+baddu $t3, $t1, $t2 :: rd 0x3b, rs 0xed5005cbc8b0a214, rt 0x24296b75a76fa427
+baddu $t3, $t1, $t2 :: rd 0xa3, rs 0xed5005cbc8b0a214, rt 0x70dc3454bfe348f
+baddu $t3, $t1, $t2 :: rd 0xeb, rs 0xed5005cbc8b0a214, rt 0x3f63daa9afd199d7
+baddu $t3, $t1, $t2 :: rd 0x39, rs 0xed5005cbc8b0a214, rt 0xe54750d5d9257f25
+baddu $t3, $t1, $t2 :: rd 0xf7, rs 0xed5005cbc8b0a214, rt 0x3ce839a51cf929e3
+baddu $t3, $t1, $t2 :: rd 0x21, rs 0xed5005cbc8b0a214, rt 0x84785280dd301d0d
+baddu $t3, $t1, $t2 :: rd 0x9b, rs 0xed5005cbc8b0a214, rt 0x663d061055833287
+baddu $t3, $t1, $t2 :: rd 0x8d, rs 0xed5005cbc8b0a214, rt 0x9ca4bdbd32be479
+baddu $t3, $t1, $t2 :: rd 0x47, rs 0xed5005cbc8b0a214, rt 0x36a6f7fa3c0c9f33
+baddu $t3, $t1, $t2 :: rd 0xee, rs 0xed5005cbc8b0a214, rt 0xa8b08fe67a8bc7da
+baddu $t3, $t1, $t2 :: rd 0xb6, rs 0xed5005cbc8b0a214, rt 0xb665ed5e7f89e9a2
+baddu $t3, $t1, $t2 :: rd 0x5f, rs 0xed5005cbc8b0a214, rt 0x420b34f533734a4b
+baddu $t3, $t1, $t2 :: rd 0x1e, rs 0xed5005cbc8b0a214, rt 0xeaded5c53dad020a
+baddu $t3, $t1, $t2 :: rd 0x0, rs 0xed5005cbc8b0a214, rt 0x2299b0e01d5e68ec
+baddu $t3, $t1, $t2 :: rd 0x9e, rs 0xed5005cbc8b0a214, rt 0xe5e9a314be7fa08a
+baddu $t3, $t1, $t2 :: rd 0x4a, rs 0xed5005cbc8b0a214, rt 0x4aeb6ca0e3459e36
+baddu $t3, $t1, $t2 :: rd 0xa5, rs 0xed5005cbc8b0a214, rt 0x993138f16cfde991
+baddu $t3, $t1, $t2 :: rd 0x6, rs 0xed5005cbc8b0a214, rt 0x8cff404aede292f2
+baddu $t3, $t1, $t2 :: rd 0x7f, rs 0xed5005cbc8b0a214, rt 0x42e9f8548b739b6b
+baddu $t3, $t1, $t2 :: rd 0x75, rs 0xed5005cbc8b0a214, rt 0x276af70a0e128561
+baddu $t3, $t1, $t2 :: rd 0x51, rs 0xed5005cbc8b0a214, rt 0x1f9720f946923c3d
+baddu $t3, $t1, $t2 :: rd 0x3a, rs 0xed5005cbc8b0a214, rt 0xc7a59be7800f3d26
+baddu $t3, $t1, $t2 :: rd 0x7f, rs 0xed5005cbc8b0a214, rt 0x743e568d2fcf486b
+baddu $t3, $t1, $t2 :: rd 0x0, rs 0xed5005cbc8b0a214, rt 0xdfb254da422346ec
+baddu $t3, $t1, $t2 :: rd 0x5e, rs 0xed5005cbc8b0a214, rt 0x3c07af97fba6704a
+baddu $t3, $t1, $t2 :: rd 0x82, rs 0xed5005cbc8b0a214, rt 0xd5b2120c6f52416e
+baddu $t3, $t1, $t2 :: rd 0x9, rs 0xed5005cbc8b0a214, rt 0xa388c16272f1f8f5
+baddu $t3, $t1, $t2 :: rd 0x63, rs 0xed5005cbc8b0a214, rt 0xb42ad6e659a7b04f
+baddu $t3, $t1, $t2 :: rd 0xb1, rs 0xed5005cbc8b0a214, rt 0x53606bb4bf0c999d
+baddu $t3, $t1, $t2 :: rd 0xdd, rs 0xed5005cbc8b0a214, rt 0x15ebf6121dca77c9
+baddu $t3, $t1, $t2 :: rd 0x77, rs 0xed5005cbc8b0a214, rt 0x14abf36419fb9e63
+baddu $t3, $t1, $t2 :: rd 0x9, rs 0xed5005cbc8b0a214, rt 0x7e35ce6d56e670f5
+baddu $t3, $t1, $t2 :: rd 0x7, rs 0xed5005cbc8b0a214, rt 0xf2e7a490978058f3
+bad...
[truncated message content] |
|
From: <sv...@va...> - 2014-06-04 11:28:26
|
Author: dejanj
Date: Wed Jun 4 11:28:07 2014
New Revision: 2865
Log:
mips64: Support for Cavium MIPS Octeon Atomic and Count Instructions.
Implement Cavium MIPS specific instructions:
baddu, pop, dpop, saa, saad, laa, laad, lai, laid, lad, ladd, law, lawd,
las, lasd, lac, lacd
Fixes BZ #327223.
Modified:
trunk/priv/guest_mips_toIR.c
trunk/priv/host_mips_defs.c
trunk/priv/host_mips_defs.h
trunk/priv/host_mips_isel.c
Modified: trunk/priv/guest_mips_toIR.c
==============================================================================
--- trunk/priv/guest_mips_toIR.c (original)
+++ trunk/priv/guest_mips_toIR.c Wed Jun 4 11:28:07 2014
@@ -2170,6 +2170,62 @@
/*********************************************************/
/*--- Cavium Specific Instructions ---*/
/*********************************************************/
+
+/* Convenience function to yield to thread scheduler */
+static void jump_back(IRExpr *condition)
+{
+ stmt( IRStmt_Exit(condition,
+ Ijk_Yield,
+ IRConst_U64( guest_PC_curr_instr ),
+ OFFB_PC) );
+}
+
+/* Based on s390_irgen_load_and_add32. */
+static void mips_irgen_load_and_add32(IRTemp op1addr, IRTemp new_val,
+ UChar rd, Bool putIntoRd)
+{
+ IRCAS *cas;
+ IRTemp old_mem = newTemp(Ity_I32);
+ IRTemp expd = newTemp(Ity_I32);
+
+ assign(expd, load(Ity_I32, mkexpr(op1addr)));
+
+ cas = mkIRCAS(IRTemp_INVALID, old_mem,
+ Iend_LE, mkexpr(op1addr),
+ NULL, mkexpr(expd), /* expected value */
+ NULL, mkexpr(new_val) /* new value */);
+ stmt(IRStmt_CAS(cas));
+
+ /* If old_mem contains the expected value, then the CAS succeeded.
+ Otherwise, it did not */
+ jump_back(binop(Iop_CmpNE32, mkexpr(old_mem), mkexpr(expd)));
+ if (putIntoRd)
+ putIReg(rd, mkWidenFrom32(Ity_I64, mkexpr(old_mem), True));
+}
+
+/* Based on s390_irgen_load_and_add64. */
+static void mips_irgen_load_and_add64(IRTemp op1addr, IRTemp new_val,
+ UChar rd, Bool putIntoRd)
+{
+ IRCAS *cas;
+ IRTemp old_mem = newTemp(Ity_I64);
+ IRTemp expd = newTemp(Ity_I64);
+
+ assign(expd, load(Ity_I64, mkexpr(op1addr)));
+
+ cas = mkIRCAS(IRTemp_INVALID, old_mem,
+ Iend_LE, mkexpr(op1addr),
+ NULL, mkexpr(expd), /* expected value */
+ NULL, mkexpr(new_val) /* new value */);
+ stmt(IRStmt_CAS(cas));
+
+ /* If old_mem contains the expected value, then the CAS succeeded.
+ Otherwise, it did not */
+ jump_back(binop(Iop_CmpNE64, mkexpr(old_mem), mkexpr(expd)));
+ if (putIntoRd)
+ putIReg(rd, mkexpr(old_mem));
+}
+
static Bool dis_instr_CVM ( UInt theInstr )
{
UChar opc2 = get_function(theInstr);
@@ -2177,7 +2233,7 @@
UChar regRs = get_rs(theInstr);
UChar regRt = get_rt(theInstr);
UChar regRd = get_rd(theInstr);
- UInt imm = get_imm(theInstr);
+ UInt imm = get_imm(theInstr);
UChar lenM1 = get_msb(theInstr);
UChar p = get_lsb(theInstr);
IRType ty = mode64? Ity_I64 : Ity_I32;
@@ -2188,8 +2244,8 @@
UInt size;
assign(tmpRs, getIReg(regRs));
- switch(opc1){
- case 0x1C: {
+ switch(opc1) {
+ case 0x1C: {
switch(opc2) {
case 0x03: { /* DMUL rd, rs, rt */
DIP("dmul r%d, r%d, r%d", regRd, regRs, regRt);
@@ -2199,6 +2255,277 @@
break;
}
+ case 0x18: { /* Store Atomic Add Word - SAA; Cavium OCTEON */
+ DIP("saa r%u, (r%u)", regRt, regRs);
+ IRTemp addr = newTemp(Ity_I64);
+ IRTemp new = newTemp(Ity_I32);
+ assign (addr, getIReg(regRs));
+ assign(new, binop(Iop_Add32,
+ load(Ity_I32, mkexpr(addr)),
+ mkNarrowTo32(ty, getIReg(regRt))));
+ mips_irgen_load_and_add32(addr, new, 0, False);
+ break;
+ }
+
+ /* Store Atomic Add Doubleword - SAAD; Cavium OCTEON */
+ case 0x19: {
+ DIP( "saad r%u, (r%u)", regRt, regRs);
+ IRTemp addr = newTemp(Ity_I64);
+ IRTemp new = newTemp(Ity_I64);
+ assign (addr, getIReg(regRs));
+ assign(new, binop(Iop_Add64,
+ load(Ity_I64, mkexpr(addr)),
+ getIReg(regRt)));
+ mips_irgen_load_and_add64(addr, new, 0, False);
+ break;
+ }
+
+ /* LAI, LAID, LAD, LADD, LAS, LASD,
+ LAC, LACD, LAA, LAAD, LAW, LAWD */
+ case 0x1f: {
+ UInt opc3 = get_sa(theInstr);
+ IRTemp addr = newTemp(Ity_I64);
+ switch (opc3) {
+ /* Load Atomic Increment Word - LAI; Cavium OCTEON2 */
+ case 0x02: {
+ DIP("lai r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I32);
+ assign(addr, getIReg(regRs));
+ assign(new, binop(Iop_Add32,
+ load(Ity_I32, mkexpr(addr)),
+ mkU32(1)));
+ mips_irgen_load_and_add32(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Increment Doubleword - LAID; Cavium OCTEON2 */
+ case 0x03: {
+ DIP("laid r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I64);
+ assign(addr, getIReg(regRs));
+ assign(new, binop(Iop_Add64,
+ load(Ity_I64, mkexpr(addr)),
+ mkU64(1)));
+ mips_irgen_load_and_add64(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Decrement Word - LAD; Cavium OCTEON2 */
+ case 0x06: {
+ DIP("lad r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I32);
+ assign(addr, getIReg(regRs));
+ assign(new, binop(Iop_Sub32,
+ load(Ity_I32, mkexpr(addr)),
+ mkU32(1)));
+ mips_irgen_load_and_add32(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Decrement Doubleword - LADD; Cavium OCTEON2 */
+ case 0x07: {
+ DIP("ladd r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I64);
+ assign (addr, getIReg(regRs));
+ assign(new, binop(Iop_Sub64,
+ load(Ity_I64, mkexpr(addr)),
+ mkU64(1)));
+ mips_irgen_load_and_add64(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Set Word - LAS; Cavium OCTEON2 */
+ case 0x0a: {
+ DIP("las r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I32);
+ assign(addr, getIReg(regRs));
+ assign(new, mkU32(0xffffffff));
+ mips_irgen_load_and_add32(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Set Doubleword - LASD; Cavium OCTEON2 */
+ case 0x0b: {
+ DIP("lasd r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I64);
+ assign (addr, getIReg(regRs));
+ assign(new, mkU64(0xffffffffffffffff));
+ mips_irgen_load_and_add64(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Clear Word - LAC; Cavium OCTEON2 */
+ case 0x0e: {
+ DIP("lac r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I32);
+ assign (addr, getIReg(regRs));
+ assign(new, mkU32(0));
+ mips_irgen_load_and_add32(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Clear Doubleword - LACD; Cavium OCTEON2 */
+ case 0x0f: {
+ DIP("lacd r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I64);
+ assign(addr, getIReg(regRs));
+ assign(new, mkU64(0));
+ mips_irgen_load_and_add64(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Add Word - LAA; Cavium OCTEON2 */
+ case 0x12: {
+ DIP("laa r%u,(r%u),r%u\n", regRd, regRs, regRt);
+ IRTemp new = newTemp(Ity_I32);
+ assign(addr, getIReg(regRs));
+ assign(new, binop(Iop_Add32,
+ load(Ity_I32, mkexpr(addr)),
+ mkNarrowTo32(ty, getIReg(regRt))));
+ mips_irgen_load_and_add32(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Add Doubleword - LAAD; Cavium OCTEON2 */
+ case 0x13: {
+ DIP("laad r%u,(r%u),r%u\n", regRd, regRs, regRt);
+ IRTemp new = newTemp(Ity_I64);
+ assign (addr, getIReg(regRs));
+ assign(new, binop(Iop_Add64,
+ load(Ity_I64, mkexpr(addr)),
+ getIReg(regRt)));
+ mips_irgen_load_and_add64(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Swap Word - LAW; Cavium OCTEON2 */
+ case 0x16: {
+ DIP("law r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I32);
+ assign(addr, getIReg(regRs));
+ assign(new, mkNarrowTo32(ty, getIReg(regRt)));
+ mips_irgen_load_and_add32(addr, new, regRd, True);
+ break;
+ }
+ /* Load Atomic Swap Doubleword - LAWD; Cavium OCTEON2 */
+ case 0x17: {
+ DIP("lawd r%u,(r%u)\n", regRd, regRs);
+ IRTemp new = newTemp(Ity_I64);
+ assign(addr, getIReg(regRs));
+ assign(new, getIReg(regRt));
+ mips_irgen_load_and_add64(addr, new, regRd, True);
+ break;
+ }
+ default:
+ vex_printf("Unknown laxx instruction, opc3=0x%x\n", opc3);
+ vex_printf("Instruction=0x%08x\n", theInstr);
+ return False;
+ }
+ break;
+ }
+
+ /* Unsigned Byte Add - BADDU rd, rs, rt; Cavium OCTEON */
+ case 0x28: {
+ DIP("BADDU r%d, r%d, r%d", regRs, regRt, regRd);
+ IRTemp t0 = newTemp(Ity_I8);
+
+ assign(t0, binop(Iop_Add8,
+ mkNarrowTo8(ty, getIReg(regRs)),
+ mkNarrowTo8(ty, getIReg(regRt))));
+
+ if (mode64)
+ putIReg(regRd, binop(mkSzOp(ty, Iop_And8),
+ unop(Iop_8Uto64, mkexpr(t0)),
+ mkSzImm(ty, 0xFF)));
+ else
+ putIReg(regRd, binop(mkSzOp(ty, Iop_And8),
+ unop(Iop_8Uto32, mkexpr(t0)),
+ mkSzImm(ty, 0xFF)));
+ break;
+ }
+
+ case 0x2c: { /* Count Ones in a Word - POP; Cavium OCTEON */
+ int i, shift[5];
+ IRTemp mask[5];
+ IRTemp old = newTemp(ty);
+ IRTemp nyu = IRTemp_INVALID;
+ assign(old, getIReg(regRs));
+ DIP("pop r%d, r%d", regRd, regRs);
+
+ for (i = 0; i < 5; i++) {
+ mask[i] = newTemp(ty);
+ shift[i] = 1 << i;
+ }
+ if(mode64) {
+ assign(mask[0], mkU64(0x0000000055555555));
+ assign(mask[1], mkU64(0x0000000033333333));
+ assign(mask[2], mkU64(0x000000000F0F0F0F));
+ assign(mask[3], mkU64(0x0000000000FF00FF));
+ assign(mask[4], mkU64(0x000000000000FFFF));
+
+ for (i = 0; i < 5; i++) {
+ nyu = newTemp(ty);
+ assign(nyu,
+ binop(Iop_Add64,
+ binop(Iop_And64,
+ mkexpr(old), mkexpr(mask[i])),
+ binop(Iop_And64,
+ binop(Iop_Shr64,
+ mkexpr(old), mkU8(shift[i])),
+ mkexpr(mask[i]))));
+ old = nyu;
+ }
+ } else {
+ assign(mask[0], mkU32(0x55555555));
+ assign(mask[1], mkU32(0x33333333));
+ assign(mask[2], mkU32(0x0F0F0F0F));
+ assign(mask[3], mkU32(0x00FF00FF));
+ assign(mask[4], mkU32(0x0000FFFF));
+ assign(old, getIReg(regRs));
+
+ for (i = 0; i < 5; i++) {
+ nyu = newTemp(ty);
+ assign(nyu,
+ binop(Iop_Add32,
+ binop(Iop_And32,
+ mkexpr(old), mkexpr(mask[i])),
+ binop(Iop_And32,
+ binop(Iop_Shr32,
+ mkexpr(old), mkU8(shift[i])),
+ mkexpr(mask[i]))));
+ old = nyu;
+ }
+ }
+ putIReg(regRd, mkexpr(nyu));
+ break;
+ }
+
+ /* Count Ones in a Doubleword - DPOP; Cavium OCTEON */
+ case 0x2d: {
+ int i, shift[6];
+ IRTemp mask[6];
+ IRTemp old = newTemp(ty);
+ IRTemp nyu = IRTemp_INVALID;
+ DIP("dpop r%d, r%d", regRd, regRs);
+
+ for (i = 0; i < 6; i++) {
+ mask[i] = newTemp(ty);
+ shift[i] = 1 << i;
+ }
+ vassert(mode64); /*Caution! Only for Mode 64*/
+ assign(mask[0], mkU64(0x5555555555555555ULL));
+ assign(mask[1], mkU64(0x3333333333333333ULL));
+ assign(mask[2], mkU64(0x0F0F0F0F0F0F0F0FULL));
+ assign(mask[3], mkU64(0x00FF00FF00FF00FFULL));
+ assign(mask[4], mkU64(0x0000FFFF0000FFFFULL));
+ assign(mask[5], mkU64(0x00000000FFFFFFFFULL));
+ assign(old, getIReg(regRs));
+ for (i = 0; i < 6; i++) {
+ nyu = newTemp(Ity_I64);
+ assign(nyu,
+ binop(Iop_Add64,
+ binop(Iop_And64,
+ mkexpr(old), mkexpr(mask[i])),
+ binop(Iop_And64,
+ binop(Iop_Shr64,
+ mkexpr(old), mkU8(shift[i])),
+ mkexpr(mask[i]))));
+ old = nyu;
+ }
+ putIReg(regRd, mkexpr(nyu));
+ break;
+ }
+
case 0x32: /* 5. CINS rd, rs, p, lenm1 */
DIP("cins r%u, r%u, %d, %d\n", regRt, regRs, p, lenM1);
assign ( tmp , binop(Iop_Shl64, mkexpr(tmpRs),
@@ -2291,7 +2618,7 @@
}
break;
} /* opc1 0x1C ends here*/
- case 0x1F:{
+ case 0x1F: {
switch(opc2) {
case 0x0A: { // lx - Load indexed instructions
switch (get_sa(theInstr)) {
@@ -14120,34 +14447,40 @@
case 0x1C: /* Special2 */
switch (function) {
- /* Cavium Specific instructions */
- case 0x03: case 0x32: case 0x33: /* DMUL, CINS , CINS32 */
- case 0x3A: case 0x3B: case 0x2B: /* EXT, EXT32, SNE */
- /* CVM Compare Instructions */
- case 0x2A: case 0x2E: case 0x2F: /* SEQ, SEQI, SNEI */
- if (VEX_MIPS_COMP_ID(archinfo->hwcaps) == VEX_PRID_COMP_CAVIUM) {
- if (dis_instr_CVM(cins))
- break;
- goto decode_failure;
- } else {
- goto decode_failure;
- }
+ /* Cavium Specific instructions */
+ case 0x03: case 0x32: case 0x33: /* DMUL, CINS , CINS32 */
+ case 0x3A: case 0x3B: case 0x2B: /* EXT, EXT32, SNE */
+ /* CVM Compare Instructions */
+ case 0x2A: case 0x2E: case 0x2F: /* SEQ, SEQI, SNEI */
+ /* CPU Load, Store, Memory, and Control Instructions */
+ case 0x18: case 0x19: /* SAA, SAAD */
+ case 0x1F: /* LAA, LAAD, LAI, LAID */
+ case 0x28: case 0x2C: case 0x2D: /* BADDU, POP, DPOP */
+ if (VEX_MIPS_COMP_ID(archinfo->hwcaps) == VEX_PRID_COMP_CAVIUM) {
+ if (dis_instr_CVM(cins))
+ break;
+ goto decode_failure;
+ } else {
+ goto decode_failure;
+ }
break;
- case 0x02: { /* MUL */
- DIP("mul r%d, r%d, r%d", rd, rs, rt);
- if (mode64) {
- IRTemp tmpRs32 = newTemp(Ity_I32);
- IRTemp tmpRt32 = newTemp(Ity_I32);
- IRTemp tmpRes = newTemp(Ity_I32);
- assign(tmpRs32, mkNarrowTo32(ty, getIReg(rs)));
- assign(tmpRt32, mkNarrowTo32(ty, getIReg(rt)));
- assign(tmpRes, binop(Iop_Mul32, mkexpr(tmpRs32), mkexpr(tmpRt32)));
- putIReg(rd, mkWidenFrom32(ty, mkexpr(tmpRes), True));
- } else
- putIReg(rd, binop(Iop_Mul32, getIReg(rs), getIReg(rt)));
- break;
- }
+ case 0x02: { /* MUL */
+ DIP("mul r%d, r%d, r%d", rd, rs, rt);
+ if (mode64) {
+ IRTemp tmpRs32 = newTemp(Ity_I32);
+ IRTemp tmpRt32 = newTemp(Ity_I32);
+ IRTemp tmpRes = newTemp(Ity_I32);
+
+ assign(tmpRs32, mkNarrowTo32(ty, getIReg(rs)));
+ assign(tmpRt32, mkNarrowTo32(ty, getIReg(rt)));
+ assign(tmpRes, binop(Iop_Mul32,
+ mkexpr(tmpRs32), mkexpr(tmpRt32)));
+ putIReg(rd, mkWidenFrom32(ty, mkexpr(tmpRes), True));
+ } else
+ putIReg(rd, binop(Iop_Mul32, getIReg(rs), getIReg(rt)));
+ break;
+ }
case 0x00: { /* MADD */
if (mode64) {
Modified: trunk/priv/host_mips_defs.c
==============================================================================
--- trunk/priv/host_mips_defs.c (original)
+++ trunk/priv/host_mips_defs.c Wed Jun 4 11:28:07 2014
@@ -1399,6 +1399,23 @@
return i;
}
+MIPSInstr *MIPSInstr_Cas(UChar sz, HReg old, HReg addr,
+ HReg expd, HReg data, Bool mode64)
+{
+ MIPSInstr *i = LibVEX_Alloc(sizeof(MIPSInstr));
+ i->tag = Min_Cas;
+ i->Min.Cas.sz = sz;
+ i->Min.Cas.old = old;
+ i->Min.Cas.addr = addr;
+ i->Min.Cas.expd = expd;
+ i->Min.Cas.data = data;
+ vassert(sz == 1 || sz == 2 || sz == 4 || sz == 8);
+
+ if (sz == 8)
+ vassert(mode64);
+ return i;
+}
+
MIPSInstr *MIPSInstr_StoreC(UChar sz, MIPSAMode * dst, HReg src, Bool mode64)
{
MIPSInstr *i = LibVEX_Alloc(sizeof(MIPSInstr));
@@ -1777,6 +1794,55 @@
ppMIPSAMode(i->Min.LoadL.src, mode64);
return;
}
+ case Min_Cas: {
+ Bool sz8 = toBool(i->Min.Cas.sz == 8);
+ /*
+ * ll(d) old, 0(addr)
+ * bne old, expd, end
+ * nop
+ * (d)addiu old, old, 1
+ * sc(d) data, 0(addr)
+ * movn old, expd, data
+ * end:
+ */
+ // ll(d) old, 0(addr)
+ vex_printf("cas: ");
+
+ vex_printf("%s ", sz8 ? "lld" : "ll");
+ ppHRegMIPS(i->Min.Cas.old , mode64);
+ vex_printf(", 0(");
+ ppHRegMIPS(i->Min.Cas.addr , mode64);
+ vex_printf(")\n");
+
+ vex_printf("bne ");
+ ppHRegMIPS(i->Min.Cas.old , mode64);
+ vex_printf(", ");
+ ppHRegMIPS(i->Min.Cas.expd , mode64);
+ vex_printf(", end\n");
+
+ vex_printf("nop\n");
+
+ vex_printf("%s ", sz8 ? "daddiu" : "addiu");
+ ppHRegMIPS(i->Min.Cas.old , mode64);
+ vex_printf(", ");
+ ppHRegMIPS(i->Min.Cas.old , mode64);
+ vex_printf(", 1\n");
+
+ vex_printf("%s ", sz8 ? "scd" : "sc");
+ ppHRegMIPS(i->Min.Cas.data , mode64);
+ vex_printf(", 0(");
+ ppHRegMIPS(i->Min.Cas.addr , mode64);
+ vex_printf(")\n");
+
+ vex_printf("movn ");
+ ppHRegMIPS(i->Min.Cas.old , mode64);
+ vex_printf(", ");
+ ppHRegMIPS(i->Min.Cas.expd , mode64);
+ vex_printf(", ");
+ ppHRegMIPS(i->Min.Cas.data , mode64);
+ vex_printf("\nend:");
+ return;
+ }
case Min_StoreC: {
vex_printf("sc ");
ppHRegMIPS(i->Min.StoreC.src, mode64);
@@ -2062,6 +2128,12 @@
addRegUsage_MIPSAMode(u, i->Min.LoadL.src);
addHRegUse(u, HRmWrite, i->Min.LoadL.dst);
return;
+ case Min_Cas:
+ addHRegUse(u, HRmWrite, i->Min.Cas.old);
+ addHRegUse(u, HRmRead, i->Min.Cas.addr);
+ addHRegUse(u, HRmRead, i->Min.Cas.expd);
+ addHRegUse(u, HRmModify, i->Min.Cas.data);
+ return;
case Min_StoreC:
addHRegUse(u, HRmWrite, i->Min.StoreC.src);
addHRegUse(u, HRmRead, i->Min.StoreC.src);
@@ -2214,6 +2286,12 @@
mapRegs_MIPSAMode(m, i->Min.LoadL.src);
mapReg(m, &i->Min.LoadL.dst);
return;
+ case Min_Cas:
+ mapReg(m, &i->Min.Cas.old);
+ mapReg(m, &i->Min.Cas.addr);
+ mapReg(m, &i->Min.Cas.expd);
+ mapReg(m, &i->Min.Cas.data);
+ return;
case Min_StoreC:
mapReg(m, &i->Min.StoreC.src);
mapRegs_MIPSAMode(m, i->Min.StoreC.dst);
@@ -3459,8 +3537,8 @@
switch (i->Min.XAssisted.jk) {
case Ijk_ClientReq: trcval = VEX_TRC_JMP_CLIENTREQ; break;
case Ijk_Sys_syscall: trcval = VEX_TRC_JMP_SYS_SYSCALL; break;
- /* case Ijk_Sys_int128: trcval = VEX_TRC_JMP_SYS_INT128; break;
- case Ijk_Yield: trcval = VEX_TRC_JMP_YIELD; break; */
+ /* case Ijk_Sys_int128: trcval = VEX_TRC_JMP_SYS_INT128; break; */
+ case Ijk_Yield: trcval = VEX_TRC_JMP_YIELD; break;
case Ijk_EmWarn: trcval = VEX_TRC_JMP_EMWARN; break;
case Ijk_EmFail: trcval = VEX_TRC_JMP_EMFAIL; break;
/* case Ijk_MapFail: trcval = VEX_TRC_JMP_MAPFAIL; break; */
@@ -3646,6 +3724,39 @@
p = mkFormI(p, 0x3C, r_dst, r_src, idx);
goto done;
}
+ case Min_Cas: {
+ if (i->Min.Cas.sz != 8 && i->Min.Cas.sz != 4)
+ goto bad;
+ UInt old = iregNo(i->Min.Cas.old, mode64);
+ UInt addr = iregNo(i->Min.Cas.addr, mode64);
+ UInt expd = iregNo(i->Min.Cas.expd, mode64);
+ UInt data = iregNo(i->Min.Cas.data, mode64);
+ Bool sz8 = toBool(i->Min.Cas.sz == 8);
+
+ /*
+ * ll(d) old, 0(addr)
+ * bne old, expd, end
+ * nop
+ * (d)addiu old, old, 1
+ * sc(d) data, 0(addr)
+ * movn old, expd, data
+ * end:
+ */
+ // ll(d) old, 0(addr)
+ p = mkFormI(p, sz8 ? 0x34 : 0x30, addr, old, 0);
+ // bne old, expd, end
+ p = mkFormI(p, 5, old, expd, 4);
+ // nop
+ p = mkFormR(p, 0, 0, 0, 0, 0, 0);
+ // (d)addiu old, old, 1
+ p = mkFormI(p, sz8 ? 25 : 9, old, old, 1);
+ // sc(d) data, 0(addr)
+ p = mkFormI(p, sz8 ? 0x3C : 0x38, addr, data, 0);
+ // movn old, expd, data
+ p = mkFormR(p, 0, expd, data, old, 0, 0xb);
+
+ goto done;
+ }
case Min_RdWrLR: {
UInt reg = iregNo(i->Min.RdWrLR.gpr, mode64);
Bool wrLR = i->Min.RdWrLR.wrLR;
Modified: trunk/priv/host_mips_defs.h
==============================================================================
--- trunk/priv/host_mips_defs.h (original)
+++ trunk/priv/host_mips_defs.h Wed Jun 4 11:28:07 2014
@@ -325,6 +325,7 @@
Min_Load, /* zero-extending load a 8|16|32 bit value from mem */
Min_Store, /* store a 8|16|32 bit value to mem */
+ Min_Cas, /* compare and swap */
Min_LoadL, /* mips Load Linked Word - LL */
Min_StoreC, /* mips Store Conditional Word - SC */
@@ -521,6 +522,13 @@
} LoadL;
struct {
UChar sz; /* 4|8 */
+ HReg old;
+ HReg addr;
+ HReg expd;
+ HReg data;
+ } Cas;
+ struct {
+ UChar sz; /* 4|8 */
MIPSAMode *dst;
HReg src;
} StoreC;
@@ -649,6 +657,8 @@
Bool mode64);
extern MIPSInstr *MIPSInstr_StoreC(UChar sz, MIPSAMode * dst, HReg src,
Bool mode64);
+extern MIPSInstr *MIPSInstr_Cas(UChar sz, HReg old, HReg addr,
+ HReg expd, HReg data, Bool mode64);
extern MIPSInstr *MIPSInstr_Call ( MIPSCondCode, Addr64, UInt, HReg, RetLoc );
extern MIPSInstr *MIPSInstr_CallAlways ( MIPSCondCode, Addr64, UInt, RetLoc );
Modified: trunk/priv/host_mips_isel.c
==============================================================================
--- trunk/priv/host_mips_isel.c (original)
+++ trunk/priv/host_mips_isel.c Wed Jun 4 11:28:07 2014
@@ -971,7 +971,9 @@
|| e->Iex.Binop.op == Iop_CmpLE32S
|| e->Iex.Binop.op == Iop_CmpLE64S
|| e->Iex.Binop.op == Iop_CmpLT64S
- || e->Iex.Binop.op == Iop_CmpEQ64) {
+ || e->Iex.Binop.op == Iop_CmpEQ64
+ || e->Iex.Binop.op == Iop_CasCmpEQ32
+ || e->Iex.Binop.op == Iop_CasCmpEQ64) {
Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
|| e->Iex.Binop.op == Iop_CmpLE32S
@@ -986,6 +988,7 @@
switch (e->Iex.Binop.op) {
case Iop_CmpEQ32:
+ case Iop_CasCmpEQ32:
cc = MIPScc_EQ;
size32 = True;
break;
@@ -1030,6 +1033,7 @@
size32 = False;
break;
case Iop_CmpEQ64:
+ case Iop_CasCmpEQ64:
cc = MIPScc_EQ;
size32 = False;
break;
@@ -2051,7 +2055,9 @@
|| e->Iex.Binop.op == Iop_CmpLE32S
|| e->Iex.Binop.op == Iop_CmpLE64S
|| e->Iex.Binop.op == Iop_CmpLT64S
- || e->Iex.Binop.op == Iop_CmpEQ64) {
+ || e->Iex.Binop.op == Iop_CmpEQ64
+ || e->Iex.Binop.op == Iop_CasCmpEQ32
+ || e->Iex.Binop.op == Iop_CasCmpEQ64) {
Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S
|| e->Iex.Binop.op == Iop_CmpLE32S
@@ -2066,6 +2072,7 @@
switch (e->Iex.Binop.op) {
case Iop_CmpEQ32:
+ case Iop_CasCmpEQ32:
cc = MIPScc_EQ;
size32 = True;
break;
@@ -2102,6 +2109,7 @@
size32 = False;
break;
case Iop_CmpEQ64:
+ case Iop_CasCmpEQ64:
cc = MIPScc_EQ;
size32 = False;
break;
@@ -3933,6 +3941,20 @@
goto stmt_fail;
/* NOTREACHED */}
+ case Ist_CAS:
+ if (stmt->Ist.CAS.details->oldHi == IRTemp_INVALID) {
+ IRCAS *cas = stmt->Ist.CAS.details;
+ HReg old = lookupIRTemp(env, cas->oldLo);
+ HReg addr = iselWordExpr_R(env, cas->addr);
+ HReg expd = iselWordExpr_R(env, cas->expdLo);
+ HReg data = iselWordExpr_R(env, cas->dataLo);
+ if (typeOfIRTemp(env->type_env, cas->oldLo) == Ity_I64) {
+ addInstr(env, MIPSInstr_Cas(8, old, addr, expd, data, mode64));
+ } else if (typeOfIRTemp(env->type_env, cas->oldLo) == Ity_I32) {
+ addInstr(env, MIPSInstr_Cas(4, old, addr, expd, data, mode64));
+ }
+ }
+
/* --------- INSTR MARK --------- */
/* Doesn't generate any executable code ... */
case Ist_IMark:
@@ -3997,6 +4019,7 @@
case Ijk_NoDecode:
case Ijk_NoRedir:
case Ijk_SigBUS:
+ case Ijk_Yield:
case Ijk_SigTRAP:
case Ijk_SigFPE_IntDiv:
case Ijk_SigFPE_IntOvf:
|
|
From: <sv...@va...> - 2014-06-04 11:20:42
|
Author: sewardj
Date: Wed Jun 4 11:20:18 2014
New Revision: 13993
Log:
Make each test disable-able, and enable tests of instructions that are
currently supported.
Modified:
trunk/none/tests/arm64/fp_and_simd.c
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Wed Jun 4 11:20:18 2014
@@ -2926,48 +2926,48 @@
// fabs d,s
// fabs 2d,4s,2s
- test_fabs_d_d(TyDF);
- test_fabs_s_s(TySF);
- test_fabs_2d_2d(TyDF);
- test_fabs_4s_4s(TySF);
- test_fabs_2s_2s(TyDF);
- test_fneg_2d_2d(TySF);
- test_fneg_4s_4s(TyDF);
- test_fneg_2s_2s(TySF);
+ if (1) test_fabs_d_d(TyDF);
+ if (1) test_fabs_s_s(TySF);
+ if (1) test_fabs_2d_2d(TyDF);
+ if (1) test_fabs_4s_4s(TySF);
+ if (1) test_fabs_2s_2s(TyDF);
+ if (1) test_fneg_2d_2d(TySF);
+ if (1) test_fneg_4s_4s(TyDF);
+ if (1) test_fneg_2s_2s(TySF);
// fneg d,s
// fneg 2d,4s,2s
- test_fneg_d_d(TyDF);
- test_fneg_s_s(TySF);
+ if (1) test_fneg_d_d(TyDF);
+ if (1) test_fneg_s_s(TySF);
// fsqrt d,s
// fsqrt 2d,4s,2s
- test_fsqrt_d_d(TyDF);
- test_fsqrt_s_s(TySF);
+ if (1) test_fsqrt_d_d(TyDF);
+ if (1) test_fsqrt_s_s(TySF);
// fadd d,s
// fsub d,s
- test_fadd_d_d_d(TyDF);
- test_fadd_s_s_s(TySF);
- test_fsub_d_d_d(TyDF);
- test_fsub_s_s_s(TySF);
+ if (1) test_fadd_d_d_d(TyDF);
+ if (1) test_fadd_s_s_s(TySF);
+ if (1) test_fsub_d_d_d(TyDF);
+ if (1) test_fsub_s_s_s(TySF);
// fadd 2d,4s,2s
// fsub 2d,4s,2s
- test_fadd_2d_2d_2d(TyDF);
- test_fadd_4s_4s_4s(TySF);
- test_fadd_2s_2s_2s(TySF);
- test_fsub_2d_2d_2d(TyDF);
- test_fsub_4s_4s_4s(TySF);
- test_fsub_2s_2s_2s(TySF);
+ if (1) test_fadd_2d_2d_2d(TyDF);
+ if (1) test_fadd_4s_4s_4s(TySF);
+ if (1) test_fadd_2s_2s_2s(TySF);
+ if (1) test_fsub_2d_2d_2d(TyDF);
+ if (1) test_fsub_4s_4s_4s(TySF);
+ if (1) test_fsub_2s_2s_2s(TySF);
// fabd d,s
// fabd 2d,4s,2s
- test_fabd_d_d_d(TyDF);
- test_fabd_s_s_s(TySF);
- test_fabd_2d_2d_2d(TyDF);
- test_fabd_4s_4s_4s(TySF);
- test_fabd_2s_2s_2s(TySF);
+ if (1) test_fabd_d_d_d(TyDF);
+ if (1) test_fabd_s_s_s(TySF);
+ if (1) test_fabd_2d_2d_2d(TyDF);
+ if (1) test_fabd_4s_4s_4s(TySF);
+ if (1) test_fabd_2s_2s_2s(TySF);
// faddp d,s (floating add pair)
// faddp 2d,4s,2s
@@ -2986,21 +2986,21 @@
// fcmgt 2d,4s,2s
// facge 2d,4s,2s
// facgt 2d,4s,2s
- test_fcmeq_2d_2d_2d(TyDF);
- test_fcmeq_4s_4s_4s(TySF);
- test_fcmeq_2s_2s_2s(TySF);
- test_fcmge_2d_2d_2d(TyDF);
- test_fcmge_4s_4s_4s(TySF);
- test_fcmge_2s_2s_2s(TySF);
- test_fcmgt_2d_2d_2d(TyDF);
- test_fcmgt_4s_4s_4s(TySF);
- test_fcmgt_2s_2s_2s(TySF);
- test_facge_2d_2d_2d(TyDF);
- test_facge_4s_4s_4s(TySF);
- test_facge_2s_2s_2s(TySF);
- test_facgt_2d_2d_2d(TyDF);
- test_facgt_4s_4s_4s(TySF);
- test_facgt_2s_2s_2s(TySF);
+ if (1) test_fcmeq_2d_2d_2d(TyDF);
+ if (1) test_fcmeq_4s_4s_4s(TySF);
+ if (1) test_fcmeq_2s_2s_2s(TySF);
+ if (1) test_fcmge_2d_2d_2d(TyDF);
+ if (1) test_fcmge_4s_4s_4s(TySF);
+ if (1) test_fcmge_2s_2s_2s(TySF);
+ if (1) test_fcmgt_2d_2d_2d(TyDF);
+ if (1) test_fcmgt_4s_4s_4s(TySF);
+ if (1) test_fcmgt_2s_2s_2s(TySF);
+ if (1) test_facge_2d_2d_2d(TyDF);
+ if (1) test_facge_4s_4s_4s(TySF);
+ if (1) test_facge_2s_2s_2s(TySF);
+ if (1) test_facgt_2d_2d_2d(TyDF);
+ if (1) test_facgt_4s_4s_4s(TySF);
+ if (1) test_facgt_2s_2s_2s(TySF);
// fcmeq_z d,s
// fcmge_z d,s
@@ -3023,11 +3023,11 @@
// fdiv d,s
// fdiv 2d,4s,2s
- test_fdiv_d_d_d(TyDF);
- test_fdiv_s_s_s(TySF);
- test_fdiv_2d_2d_2d(TyDF);
- test_fdiv_4s_4s_4s(TySF);
- test_fdiv_2s_2s_2s(TySF);
+ if (1) test_fdiv_d_d_d(TyDF);
+ if (1) test_fdiv_s_s_s(TySF);
+ if (1) test_fdiv_2d_2d_2d(TyDF);
+ if (1) test_fdiv_4s_4s_4s(TySF);
+ if (1) test_fdiv_2s_2s_2s(TySF);
// fmadd d,s
// fnmadd d,s
@@ -3035,8 +3035,8 @@
// fnmsub d,s
// fnmul d,s
- test_fnmul_d_d_d(TyDF);
- test_fnmul_s_s_s(TySF);
+ if (1) test_fnmul_d_d_d(TyDF);
+ if (1) test_fnmul_s_s_s(TySF);
// fmax d,s
// fmin d,s
@@ -3068,12 +3068,12 @@
// fmla 2d,4s,2s
// fmls 2d,4s,2s
- test_fmla_2d_2d_2d(TyDF);
- test_fmla_4s_4s_4s(TySF);
- test_fmla_2s_2s_2s(TySF);
- test_fmls_2d_2d_2d(TyDF);
- test_fmls_4s_4s_4s(TySF);
- test_fmls_2s_2s_2s(TySF);
+ if (1) test_fmla_2d_2d_2d(TyDF);
+ if (1) test_fmla_4s_4s_4s(TySF);
+ if (1) test_fmla_2s_2s_2s(TySF);
+ if (1) test_fmls_2d_2d_2d(TyDF);
+ if (1) test_fmls_4s_4s_4s(TySF);
+ if (1) test_fmls_2s_2s_2s(TySF);
// fmla d_d_d[],s_s_s[] (by element)
// fmls d_d_d[],s_s_s[] (by element)
@@ -3083,9 +3083,9 @@
// fmov 2d,4s,2s #imm (part of the MOVI/MVNI/ORR/BIC imm group)
// INCOMPLETE
- test_fmov_2d_imm_01(TyD);
- test_fmov_2d_imm_02(TyD);
- test_fmov_2d_imm_03(TyD);
+ if (1) test_fmov_2d_imm_01(TyD);
+ if (1) test_fmov_2d_imm_02(TyD);
+ if (1) test_fmov_2d_imm_03(TyD);
if (0) test_fmov_4s_imm_01(TyS);
if (0) test_fmov_4s_imm_02(TyS);
if (0) test_fmov_4s_imm_03(TyS);
@@ -3094,35 +3094,35 @@
if (0) test_fmov_2s_imm_03(TyS);
// fmov d_d,s_s
- test_fmov_d_d(TyDF);
- test_fmov_s_s(TySF);
+ if (1) test_fmov_d_d(TyDF);
+ if (1) test_fmov_s_s(TySF);
// fmov s_w,w_s,d_x,d[1]_x,x_d,x_d[1]
- test_fmov_s_w(TyS);
- test_fmov_d_x(TyD);
- test_fmov_d1_x(TyD);
- test_fmov_w_s(TyS);
- test_fmov_x_d(TyD);
- test_fmov_x_d1(TyD);
+ if (1) test_fmov_s_w(TyS);
+ if (1) test_fmov_d_x(TyD);
+ if (1) test_fmov_d1_x(TyD);
+ if (1) test_fmov_w_s(TyS);
+ if (1) test_fmov_x_d(TyD);
+ if (1) test_fmov_x_d1(TyD);
// fmov d,s #imm
- test_fmov_d_imm_01(TyNONE);
- test_fmov_d_imm_02(TyNONE);
- test_fmov_d_imm_03(TyNONE);
- test_fmov_s_imm_01(TyNONE);
- test_fmov_s_imm_02(TyNONE);
- test_fmov_s_imm_03(TyNONE);
+ if (1) test_fmov_d_imm_01(TyNONE);
+ if (1) test_fmov_d_imm_02(TyNONE);
+ if (1) test_fmov_d_imm_03(TyNONE);
+ if (1) test_fmov_s_imm_01(TyNONE);
+ if (1) test_fmov_s_imm_02(TyNONE);
+ if (1) test_fmov_s_imm_03(TyNONE);
// fmul d_d_d[],s_s_s[]
// fmul 2d_2d_d[],4s_4s_s[],2s_2s_s[]
// fmul 2d,4s,2s
// fmul d,s
- test_fmul_d_d_d(TyDF);
- test_fmul_s_s_s(TySF);
- test_fmul_2d_2d_2d(TyDF);
- test_fmul_4s_4s_4s(TySF);
- test_fmul_2s_2s_2s(TySF);
+ if (1) test_fmul_d_d_d(TyDF);
+ if (1) test_fmul_s_s_s(TySF);
+ if (1) test_fmul_2d_2d_2d(TyDF);
+ if (1) test_fmul_4s_4s_4s(TySF);
+ if (1) test_fmul_2s_2s_2s(TySF);
// fmulx d_d_d[],s_s_s[]
// fmulx 2d_2d_d[],4s_4s_s[],2s_2s_s[]
@@ -3168,8 +3168,8 @@
// fcvtn{2} 4h/4s, 8h/4s, 2s/2d, 4s/2d (float convert to narrower form)
// INCOMPLETE
- test_fcvtn_2s_2d(TyDF);
- test_fcvtn_4s_2d(TyDF);
+ if (1) test_fcvtn_2s_2d(TyDF);
+ if (1) test_fcvtn_4s_2d(TyDF);
// fcvtas d,s (fcvt to signed int, nearest, ties away)
// fcvtau d,s (fcvt to unsigned int, nearest, ties away)
@@ -3233,121 +3233,121 @@
// scvtf s_w, d_w, s_x, d_x
// ucvtf s_w, d_w, s_x, d_x
- test_scvtf_s_w(TyS);
- test_scvtf_d_w(TyS);
- test_scvtf_s_x(TyD);
- test_scvtf_d_x(TyD);
- test_ucvtf_s_w(TyS);
- test_ucvtf_d_w(TyS);
- test_ucvtf_s_x(TyD);
- test_ucvtf_d_x(TyD);
+ if (1) test_scvtf_s_w(TyS);
+ if (1) test_scvtf_d_w(TyS);
+ if (1) test_scvtf_s_x(TyD);
+ if (1) test_scvtf_d_x(TyD);
+ if (1) test_ucvtf_s_w(TyS);
+ if (1) test_ucvtf_d_w(TyS);
+ if (1) test_ucvtf_s_x(TyD);
+ if (1) test_ucvtf_d_x(TyD);
// ======================== INT ========================
// abs d
// neg d
- test_abs_d_d(TyD);
- test_neg_d_d(TyD);
+ if (0) test_abs_d_d(TyD);
+ if (0) test_neg_d_d(TyD);
// abs 2d,4s,2s,8h,4h,16b,8b
// neg 2d,4s,2s,8h,4h,16b,8b
- test_abs_2d_2d(TyD);
- test_abs_4s_4s(TyS);
- test_abs_2s_2s(TyS);
- test_abs_8h_8h(TyH);
- test_abs_4h_4h(TyH);
- test_abs_16b_16b(TyB);
- test_abs_8b_8b(TyB);
- test_neg_2d_2d(TyD);
- test_neg_4s_4s(TyS);
- test_neg_2s_2s(TyS);
- test_neg_8h_8h(TyH);
- test_neg_4h_4h(TyH);
- test_neg_16b_16b(TyB);
- test_neg_8b_8b(TyB);
+ if (0) test_abs_2d_2d(TyD);
+ if (0) test_abs_4s_4s(TyS);
+ if (0) test_abs_2s_2s(TyS);
+ if (0) test_abs_8h_8h(TyH);
+ if (0) test_abs_4h_4h(TyH);
+ if (0) test_abs_16b_16b(TyB);
+ if (0) test_abs_8b_8b(TyB);
+ if (1) test_neg_2d_2d(TyD);
+ if (1) test_neg_4s_4s(TyS);
+ if (1) test_neg_2s_2s(TyS);
+ if (1) test_neg_8h_8h(TyH);
+ if (1) test_neg_4h_4h(TyH);
+ if (1) test_neg_16b_16b(TyB);
+ if (1) test_neg_8b_8b(TyB);
// add d
// sub d
- test_add_d_d_d(TyD);
- test_sub_d_d_d(TyD);
+ if (1) test_add_d_d_d(TyD);
+ if (1) test_sub_d_d_d(TyD);
// add 2d,4s,2s,8h,4h,16b,8b
// sub 2d,4s,2s,8h,4h,16b,8b
- test_add_2d_2d_2d(TyD);
- test_add_4s_4s_4s(TyS);
- test_add_2s_2s_2s(TyS);
- test_add_8h_8h_8h(TyH);
- test_add_4h_4h_4h(TyH);
- test_add_16b_16b_16b(TyB);
- test_add_8b_8b_8b(TyB);
- test_sub_2d_2d_2d(TyD);
- test_sub_4s_4s_4s(TyS);
- test_sub_2s_2s_2s(TyS);
- test_sub_8h_8h_8h(TyH);
- test_sub_4h_4h_4h(TyH);
- test_sub_16b_16b_16b(TyB);
- test_sub_8b_8b_8b(TyB);
+ if (1) test_add_2d_2d_2d(TyD);
+ if (1) test_add_4s_4s_4s(TyS);
+ if (1) test_add_2s_2s_2s(TyS);
+ if (1) test_add_8h_8h_8h(TyH);
+ if (1) test_add_4h_4h_4h(TyH);
+ if (1) test_add_16b_16b_16b(TyB);
+ if (1) test_add_8b_8b_8b(TyB);
+ if (1) test_sub_2d_2d_2d(TyD);
+ if (1) test_sub_4s_4s_4s(TyS);
+ if (1) test_sub_2s_2s_2s(TyS);
+ if (1) test_sub_8h_8h_8h(TyH);
+ if (1) test_sub_4h_4h_4h(TyH);
+ if (1) test_sub_16b_16b_16b(TyB);
+ if (1) test_sub_8b_8b_8b(TyB);
// addhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h
// subhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h
// raddhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h
// rsubhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h
- test_addhn_2s_2d_2d(TyD);
- test_addhn2_4s_2d_2d(TyD);
- test_addhn_4h_4s_4s(TyS);
- test_addhn2_8h_4s_4s(TyS);
- test_addhn_8b_8h_8h(TyH);
- test_addhn2_16b_8h_8h(TyH);
- test_subhn_2s_2d_2d(TyD);
- test_subhn2_4s_2d_2d(TyD);
- test_subhn_4h_4s_4s(TyS);
- test_subhn2_8h_4s_4s(TyS);
- test_subhn_8b_8h_8h(TyH);
- test_subhn2_16b_8h_8h(TyH);
- test_raddhn_2s_2d_2d(TyD);
- test_raddhn2_4s_2d_2d(TyD);
- test_raddhn_4h_4s_4s(TyS);
- test_raddhn2_8h_4s_4s(TyS);
- test_raddhn_8b_8h_8h(TyH);
- test_raddhn2_16b_8h_8h(TyH);
- test_rsubhn_2s_2d_2d(TyD);
- test_rsubhn2_4s_2d_2d(TyD);
- test_rsubhn_4h_4s_4s(TyS);
- test_rsubhn2_8h_4s_4s(TyS);
- test_rsubhn_8b_8h_8h(TyH);
- test_rsubhn2_16b_8h_8h(TyH);
+ if (0) test_addhn_2s_2d_2d(TyD);
+ if (0) test_addhn2_4s_2d_2d(TyD);
+ if (0) test_addhn_4h_4s_4s(TyS);
+ if (0) test_addhn2_8h_4s_4s(TyS);
+ if (0) test_addhn_8b_8h_8h(TyH);
+ if (0) test_addhn2_16b_8h_8h(TyH);
+ if (0) test_subhn_2s_2d_2d(TyD);
+ if (0) test_subhn2_4s_2d_2d(TyD);
+ if (0) test_subhn_4h_4s_4s(TyS);
+ if (0) test_subhn2_8h_4s_4s(TyS);
+ if (0) test_subhn_8b_8h_8h(TyH);
+ if (0) test_subhn2_16b_8h_8h(TyH);
+ if (0) test_raddhn_2s_2d_2d(TyD);
+ if (0) test_raddhn2_4s_2d_2d(TyD);
+ if (0) test_raddhn_4h_4s_4s(TyS);
+ if (0) test_raddhn2_8h_4s_4s(TyS);
+ if (0) test_raddhn_8b_8h_8h(TyH);
+ if (0) test_raddhn2_16b_8h_8h(TyH);
+ if (0) test_rsubhn_2s_2d_2d(TyD);
+ if (0) test_rsubhn2_4s_2d_2d(TyD);
+ if (0) test_rsubhn_4h_4s_4s(TyS);
+ if (0) test_rsubhn2_8h_4s_4s(TyS);
+ if (0) test_rsubhn_8b_8h_8h(TyH);
+ if (0) test_rsubhn2_16b_8h_8h(TyH);
// addp d (add pairs, across)
- test_addp_d_2d(TyD);
+ if (0) test_addp_d_2d(TyD);
// addp 2d,4s,2s,8h,4h,16b,8b
- test_addp_2d_2d_2d(TyD);
- test_addp_4s_4s_4s(TyS);
- test_addp_2s_2s_2s(TyS);
- test_addp_8h_8h_8h(TyH);
- test_addp_4h_4h_4h(TyH);
- test_addp_16b_16b_16b(TyB);
- test_addp_8b_8b_8b(TyB);
+ if (0) test_addp_2d_2d_2d(TyD);
+ if (0) test_addp_4s_4s_4s(TyS);
+ if (0) test_addp_2s_2s_2s(TyS);
+ if (0) test_addp_8h_8h_8h(TyH);
+ if (0) test_addp_4h_4h_4h(TyH);
+ if (0) test_addp_16b_16b_16b(TyB);
+ if (0) test_addp_8b_8b_8b(TyB);
// addv 4s,8h,4h,16b,18b (reduce across vector)
- test_addv_s_4s(TyS);
- test_addv_h_8h(TyH);
- test_addv_h_4h(TyH);
- test_addv_b_16b(TyB);
- test_addv_b_8b(TyB);
+ if (0) test_addv_s_4s(TyS);
+ if (0) test_addv_h_8h(TyH);
+ if (0) test_addv_h_4h(TyH);
+ if (0) test_addv_b_16b(TyB);
+ if (0) test_addv_b_8b(TyB);
// and 16b,8b
// bic 16b,8b
// orn 16b,8b
// orr 16b,8b
- test_and_16b_16b_16b(TyB);
- test_and_8b_8b_8b(TyB);
- test_bic_16b_16b_16b(TyB);
- test_bic_8b_8b_8b(TyB);
- test_orr_16b_16b_16b(TyB);
- test_orr_8b_8b_8b(TyB);
- test_orn_16b_16b_16b(TyB);
- test_orn_8b_8b_8b(TyB);
+ if (1) test_and_16b_16b_16b(TyB);
+ if (1) test_and_8b_8b_8b(TyB);
+ if (1) test_bic_16b_16b_16b(TyB);
+ if (1) test_bic_8b_8b_8b(TyB);
+ if (1) test_orr_16b_16b_16b(TyB);
+ if (1) test_orr_8b_8b_8b(TyB);
+ if (1) test_orn_16b_16b_16b(TyB);
+ if (1) test_orn_8b_8b_8b(TyB);
// orr 8h,4h #imm8, LSL #0 or 8
// orr 4s,2s #imm8, LSL #0, 8, 16 or 24
@@ -3355,58 +3355,58 @@
// bic 4s,2s #imm8, LSL #0, 8, 16 or 24
// movi and mvni are very similar, a superset of these.
// Cases are below.
- test_orr_8h_0x5A_lsl0(TyH);
- test_orr_8h_0xA5_lsl8(TyH);
- test_orr_4h_0x5A_lsl0(TyH);
- test_orr_4h_0xA5_lsl8(TyH);
- test_orr_4s_0x5A_lsl0(TyS);
- test_orr_4s_0x6B_lsl8(TyS);
- test_orr_4s_0x49_lsl16(TyS);
- test_orr_4s_0x3D_lsl24(TyS);
- test_orr_2s_0x5A_lsl0(TyS);
- test_orr_2s_0x6B_lsl8(TyS);
- test_orr_2s_0x49_lsl16(TyS);
- test_orr_2s_0x3D_lsl24(TyS);
- test_bic_8h_0x5A_lsl0(TyH);
- test_bic_8h_0xA5_lsl8(TyH);
- test_bic_4h_0x5A_lsl0(TyH);
- test_bic_4h_0xA5_lsl8(TyH);
- test_bic_4s_0x5A_lsl0(TyS);
- test_bic_4s_0x6B_lsl8(TyS);
- test_bic_4s_0x49_lsl16(TyS);
- test_bic_4s_0x3D_lsl24(TyS);
- test_bic_2s_0x5A_lsl0(TyS);
- test_bic_2s_0x6B_lsl8(TyS);
- test_bic_2s_0x49_lsl16(TyS);
- test_bic_2s_0x3D_lsl24(TyS);
+ if (0) test_orr_8h_0x5A_lsl0(TyH);
+ if (0) test_orr_8h_0xA5_lsl8(TyH);
+ if (0) test_orr_4h_0x5A_lsl0(TyH);
+ if (0) test_orr_4h_0xA5_lsl8(TyH);
+ if (0) test_orr_4s_0x5A_lsl0(TyS);
+ if (0) test_orr_4s_0x6B_lsl8(TyS);
+ if (0) test_orr_4s_0x49_lsl16(TyS);
+ if (0) test_orr_4s_0x3D_lsl24(TyS);
+ if (0) test_orr_2s_0x5A_lsl0(TyS);
+ if (0) test_orr_2s_0x6B_lsl8(TyS);
+ if (0) test_orr_2s_0x49_lsl16(TyS);
+ if (0) test_orr_2s_0x3D_lsl24(TyS);
+ if (0) test_bic_8h_0x5A_lsl0(TyH);
+ if (0) test_bic_8h_0xA5_lsl8(TyH);
+ if (0) test_bic_4h_0x5A_lsl0(TyH);
+ if (0) test_bic_4h_0xA5_lsl8(TyH);
+ if (0) test_bic_4s_0x5A_lsl0(TyS);
+ if (0) test_bic_4s_0x6B_lsl8(TyS);
+ if (0) test_bic_4s_0x49_lsl16(TyS);
+ if (0) test_bic_4s_0x3D_lsl24(TyS);
+ if (0) test_bic_2s_0x5A_lsl0(TyS);
+ if (0) test_bic_2s_0x6B_lsl8(TyS);
+ if (0) test_bic_2s_0x49_lsl16(TyS);
+ if (0) test_bic_2s_0x3D_lsl24(TyS);
// bif 16b,8b (vector) (bit insert if false)
// bit 16b,8b (vector) (bit insert if true)
// bsl 16b,8b (vector) (bit select)
// eor 16b,8b (vector)
- test_bif_16b_16b_16b(TyB);
- test_bif_8b_8b_8b(TyB);
- test_bit_16b_16b_16b(TyB);
- test_bit_8b_8b_8b(TyB);
- test_bsl_16b_16b_16b(TyB);
- test_bsl_8b_8b_8b(TyB);
- test_eor_16b_16b_16b(TyB);
- test_eor_8b_8b_8b(TyB);
+ if (1) test_bif_16b_16b_16b(TyB);
+ if (1) test_bif_8b_8b_8b(TyB);
+ if (1) test_bit_16b_16b_16b(TyB);
+ if (1) test_bit_8b_8b_8b(TyB);
+ if (1) test_bsl_16b_16b_16b(TyB);
+ if (1) test_bsl_8b_8b_8b(TyB);
+ if (1) test_eor_16b_16b_16b(TyB);
+ if (1) test_eor_8b_8b_8b(TyB);
// cls 4s,2s,8h,4h,16b,8b (count leading sign bits)
// clz 4s,2s,8h,4h,16b,8b (count leading zero bits)
- test_cls_4s_4s(TyS);
- test_cls_2s_2s(TyS);
- test_cls_8h_8h(TyH);
- test_cls_4h_4h(TyH);
- test_cls_16b_16b(TyB);
- test_cls_8b_8b(TyB);
- test_clz_4s_4s(TyS);
- test_clz_2s_2s(TyS);
- test_clz_8h_8h(TyH);
- test_clz_4h_4h(TyH);
- test_clz_16b_16b(TyB);
- test_clz_8b_8b(TyB);
+ if (0) test_cls_4s_4s(TyS);
+ if (0) test_cls_2s_2s(TyS);
+ if (0) test_cls_8h_8h(TyH);
+ if (0) test_cls_4h_4h(TyH);
+ if (0) test_cls_16b_16b(TyB);
+ if (0) test_cls_8b_8b(TyB);
+ if (0) test_clz_4s_4s(TyS);
+ if (0) test_clz_2s_2s(TyS);
+ if (0) test_clz_8h_8h(TyH);
+ if (0) test_clz_4h_4h(TyH);
+ if (0) test_clz_16b_16b(TyB);
+ if (0) test_clz_8b_8b(TyB);
// cmeq d
// cmge d
@@ -3414,12 +3414,12 @@
// cmhi d
// cmhs d
// cmtst d
- test_cmeq_d_d_d(TyD);
- test_cmge_d_d_d(TyD);
- test_cmgt_d_d_d(TyD);
- test_cmhi_d_d_d(TyD);
- test_cmhs_d_d_d(TyD);
- test_cmtst_d_d_d(TyD);
+ if (0) test_cmeq_d_d_d(TyD);
+ if (0) test_cmge_d_d_d(TyD);
+ if (0) test_cmgt_d_d_d(TyD);
+ if (0) test_cmhi_d_d_d(TyD);
+ if (0) test_cmhs_d_d_d(TyD);
+ if (0) test_cmtst_d_d_d(TyD);
// cmeq 2d,4s,2s,8h,4h,16b,8b
// cmge 2d,4s,2s,8h,4h,16b,8b
@@ -3427,652 +3427,652 @@
// cmhi 2d,4s,2s,8h,4h,16b,8b
// cmhs 2d,4s,2s,8h,4h,16b,8b
// cmtst 2d,4s,2s,8h,4h,16b,8b
- test_cmeq_2d_2d_2d(TyD);
- test_cmeq_4s_4s_4s(TyS);
- test_cmeq_2s_2s_2s(TyS);
- test_cmeq_8h_8h_8h(TyH);
- test_cmeq_4h_4h_4h(TyH);
- test_cmeq_16b_16b_16b(TyB);
- test_cmeq_8b_8b_8b(TyB);
- test_cmge_2d_2d_2d(TyD);
- test_cmge_4s_4s_4s(TyS);
- test_cmge_2s_2s_2s(TyS);
- test_cmge_8h_8h_8h(TyH);
- test_cmge_4h_4h_4h(TyH);
- test_cmge_16b_16b_16b(TyB);
- test_cmge_8b_8b_8b(TyB);
- test_cmgt_2d_2d_2d(TyD);
- test_cmgt_4s_4s_4s(TyS);
- test_cmgt_2s_2s_2s(TyS);
- test_cmgt_8h_8h_8h(TyH);
- test_cmgt_4h_4h_4h(TyH);
- test_cmgt_16b_16b_16b(TyB);
- test_cmgt_8b_8b_8b(TyB);
- test_cmhi_2d_2d_2d(TyD);
- test_cmhi_4s_4s_4s(TyS);
- test_cmhi_2s_2s_2s(TyS);
- test_cmhi_8h_8h_8h(TyH);
- test_cmhi_4h_4h_4h(TyH);
- test_cmhi_16b_16b_16b(TyB);
- test_cmhi_8b_8b_8b(TyB);
- test_cmhs_2d_2d_2d(TyD);
- test_cmhs_4s_4s_4s(TyS);
- test_cmhs_2s_2s_2s(TyS);
- test_cmhs_8h_8h_8h(TyH);
- test_cmhs_4h_4h_4h(TyH);
- test_cmhs_16b_16b_16b(TyB);
- test_cmhs_8b_8b_8b(TyB);
- test_cmtst_2d_2d_2d(TyD);
- test_cmtst_4s_4s_4s(TyS);
- test_cmtst_2s_2s_2s(TyS);
- test_cmtst_8h_8h_8h(TyH);
- test_cmtst_4h_4h_4h(TyH);
- test_cmtst_16b_16b_16b(TyB);
- test_cmtst_8b_8b_8b(TyB);
+ if (1) test_cmeq_2d_2d_2d(TyD);
+ if (1) test_cmeq_4s_4s_4s(TyS);
+ if (1) test_cmeq_2s_2s_2s(TyS);
+ if (1) test_cmeq_8h_8h_8h(TyH);
+ if (1) test_cmeq_4h_4h_4h(TyH);
+ if (1) test_cmeq_16b_16b_16b(TyB);
+ if (1) test_cmeq_8b_8b_8b(TyB);
+ if (1) test_cmge_2d_2d_2d(TyD);
+ if (1) test_cmge_4s_4s_4s(TyS);
+ if (1) test_cmge_2s_2s_2s(TyS);
+ if (1) test_cmge_8h_8h_8h(TyH);
+ if (1) test_cmge_4h_4h_4h(TyH);
+ if (1) test_cmge_16b_16b_16b(TyB);
+ if (1) test_cmge_8b_8b_8b(TyB);
+ if (1) test_cmgt_2d_2d_2d(TyD);
+ if (1) test_cmgt_4s_4s_4s(TyS);
+ if (1) test_cmgt_2s_2s_2s(TyS);
+ if (1) test_cmgt_8h_8h_8h(TyH);
+ if (1) test_cmgt_4h_4h_4h(TyH);
+ if (1) test_cmgt_16b_16b_16b(TyB);
+ if (1) test_cmgt_8b_8b_8b(TyB);
+ if (1) test_cmhi_2d_2d_2d(TyD);
+ if (1) test_cmhi_4s_4s_4s(TyS);
+ if (1) test_cmhi_2s_2s_2s(TyS);
+ if (1) test_cmhi_8h_8h_8h(TyH);
+ if (1) test_cmhi_4h_4h_4h(TyH);
+ if (1) test_cmhi_16b_16b_16b(TyB);
+ if (1) test_cmhi_8b_8b_8b(TyB);
+ if (1) test_cmhs_2d_2d_2d(TyD);
+ if (1) test_cmhs_4s_4s_4s(TyS);
+ if (1) test_cmhs_2s_2s_2s(TyS);
+ if (1) test_cmhs_8h_8h_8h(TyH);
+ if (1) test_cmhs_4h_4h_4h(TyH);
+ if (1) test_cmhs_16b_16b_16b(TyB);
+ if (1) test_cmhs_8b_8b_8b(TyB);
+ if (1) test_cmtst_2d_2d_2d(TyD);
+ if (1) test_cmtst_4s_4s_4s(TyS);
+ if (1) test_cmtst_2s_2s_2s(TyS);
+ if (1) test_cmtst_8h_8h_8h(TyH);
+ if (1) test_cmtst_4h_4h_4h(TyH);
+ if (1) test_cmtst_16b_16b_16b(TyB);
+ if (1) test_cmtst_8b_8b_8b(TyB);
// cmeq_z d
// cmge_z d
// cmgt_z d
// cmle_z d
// cmlt_z d
- test_cmeq_zero_d_d(TyD);
- test_cmge_zero_d_d(TyD);
- test_cmgt_zero_d_d(TyD);
- test_cmle_zero_d_d(TyD);
- test_cmlt_zero_d_d(TyD);
+ if (1) test_cmeq_zero_d_d(TyD);
+ if (0) test_cmge_zero_d_d(TyD);
+ if (0) test_cmgt_zero_d_d(TyD);
+ if (0) test_cmle_zero_d_d(TyD);
+ if (0) test_cmlt_zero_d_d(TyD);
// cmeq_z 2d,4s,2s,8h,4h,16b,8b
// cmge_z 2d,4s,2s,8h,4h,16b,8b
// cmgt_z 2d,4s,2s,8h,4h,16b,8b
// cmle_z 2d,4s,2s,8h,4h,16b,8b
// cmlt_z 2d,4s,2s,8h,4h,16b,8b
- test_cmeq_zero_2d_2d(TyD);
- test_cmeq_zero_4s_4s(TyS);
- test_cmeq_zero_2s_2s(TyS);
- test_cmeq_zero_8h_8h(TyH);
- test_cmeq_zero_4h_4h(TyH);
- test_cmeq_zero_16b_16b(TyB);
- test_cmeq_zero_8b_8b(TyB);
- test_cmge_zero_2d_2d(TyD);
- test_cmge_zero_4s_4s(TyS);
- test_cmge_zero_2s_2s(TyS);
- test_cmge_zero_8h_8h(TyH);
- test_cmge_zero_4h_4h(TyH);
- test_cmge_zero_16b_16b(TyB);
- test_cmge_zero_8b_8b(TyB);
- test_cmgt_zero_2d_2d(TyD);
- test_cmgt_zero_4s_4s(TyS);
- test_cmgt_zero_2s_2s(TyS);
- test_cmgt_zero_8h_8h(TyH);
- test_cmgt_zero_4h_4h(TyH);
- test_cmgt_zero_16b_16b(TyB);
- test_cmgt_zero_8b_8b(TyB);
- test_cmle_zero_2d_2d(TyD);
- test_cmle_zero_4s_4s(TyS);
- test_cmle_zero_2s_2s(TyS);
- test_cmle_zero_8h_8h(TyH);
- test_cmle_zero_4h_4h(TyH);
- test_cmle_zero_16b_16b(TyB);
- test_cmle_zero_8b_8b(TyB);
- test_cmlt_zero_2d_2d(TyD);
- test_cmlt_zero_4s_4s(TyS);
- test_cmlt_zero_2s_2s(TyS);
- test_cmlt_zero_8h_8h(TyH);
- test_cmlt_zero_4h_4h(TyH);
- test_cmlt_zero_16b_16b(TyB);
- test_cmlt_zero_8b_8b(TyB);
+ if (1) test_cmeq_zero_2d_2d(TyD);
+ if (1) test_cmeq_zero_4s_4s(TyS);
+ if (1) test_cmeq_zero_2s_2s(TyS);
+ if (1) test_cmeq_zero_8h_8h(TyH);
+ if (1) test_cmeq_zero_4h_4h(TyH);
+ if (1) test_cmeq_zero_16b_16b(TyB);
+ if (1) test_cmeq_zero_8b_8b(TyB);
+ if (1) test_cmge_zero_2d_2d(TyD);
+ if (1) test_cmge_zero_4s_4s(TyS);
+ if (1) test_cmge_zero_2s_2s(TyS);
+ if (1) test_cmge_zero_8h_8h(TyH);
+ if (1) test_cmge_zero_4h_4h(TyH);
+ if (1) test_cmge_zero_16b_16b(TyB);
+ if (1) test_cmge_zero_8b_8b(TyB);
+ if (1) test_cmgt_zero_2d_2d(TyD);
+ if (1) test_cmgt_zero_4s_4s(TyS);
+ if (1) test_cmgt_zero_2s_2s(TyS);
+ if (1) test_cmgt_zero_8h_8h(TyH);
+ if (1) test_cmgt_zero_4h_4h(TyH);
+ if (1) test_cmgt_zero_16b_16b(TyB);
+ if (1) test_cmgt_zero_8b_8b(TyB);
+ if (1) test_cmle_zero_2d_2d(TyD);
+ if (1) test_cmle_zero_4s_4s(TyS);
+ if (1) test_cmle_zero_2s_2s(TyS);
+ if (1) test_cmle_zero_8h_8h(TyH);
+ if (1) test_cmle_zero_4h_4h(TyH);
+ if (1) test_cmle_zero_16b_16b(TyB);
+ if (1) test_cmle_zero_8b_8b(TyB);
+ if (1) test_cmlt_zero_2d_2d(TyD);
+ if (1) test_cmlt_zero_4s_4s(TyS);
+ if (1) test_cmlt_zero_2s_2s(TyS);
+ if (1) test_cmlt_zero_8h_8h(TyH);
+ if (1) test_cmlt_zero_4h_4h(TyH);
+ if (1) test_cmlt_zero_16b_16b(TyB);
+ if (1) test_cmlt_zero_8b_8b(TyB);
// cnt 16b,8b (population count per byte)
- test_cnt_16b_16b(TyB);
- test_cnt_8b_8b(TyB);
+ if (0) test_cnt_16b_16b(TyB);
+ if (0) test_cnt_8b_8b(TyB);
// dup d,s,h,b (vec elem to scalar)
- test_dup_d_d0(TyD);
- test_dup_d_d1(TyD);
- test_dup_s_s0(TyS);
- test_dup_s_s3(TyS);
- test_dup_h_h0(TyH);
- test_dup_h_h6(TyH);
- test_dup_b_b0(TyB);
- test_dup_b_b13(TyB);
+ if (0) test_dup_d_d0(TyD);
+ if (0) test_dup_d_d1(TyD);
+ if (0) test_dup_s_s0(TyS);
+ if (0) test_dup_s_s3(TyS);
+ if (0) test_dup_h_h0(TyH);
+ if (0) test_dup_h_h6(TyH);
+ if (0) test_dup_b_b0(TyB);
+ if (0) test_dup_b_b13(TyB);
// dup 2d,4s,2s,8h,4h,16b,8b (vec elem to vector)
- test_dup_2d_d0(TyD);
- test_dup_2d_d1(TyD);
- test_dup_4s_s0(TyS);
- test_dup_4s_s3(TyS);
- test_dup_2s_s0(TyS);
- test_dup_2s_s2(TyS);
- test_dup_8h_h0(TyH);
- test_dup_8h_h6(TyH);
- test_dup_4h_h1(TyH);
- test_dup_4h_h5(TyH);
- test_dup_16b_b2(TyB);
- test_dup_16b_b12(TyB);
- test_dup_8b_b3(TyB);
- test_dup_8b_b13(TyB);
+ if (1) test_dup_2d_d0(TyD);
+ if (1) test_dup_2d_d1(TyD);
+ if (1) test_dup_4s_s0(TyS);
+ if (1) test_dup_4s_s3(TyS);
+ if (1) test_dup_2s_s0(TyS);
+ if (1) test_dup_2s_s2(TyS);
+ if (1) test_dup_8h_h0(TyH);
+ if (1) test_dup_8h_h6(TyH);
+ if (1) test_dup_4h_h1(TyH);
+ if (1) test_dup_4h_h5(TyH);
+ if (1) test_dup_16b_b2(TyB);
+ if (1) test_dup_16b_b12(TyB);
+ if (1) test_dup_8b_b3(TyB);
+ if (1) test_dup_8b_b13(TyB);
// dup 2d,4s,2s,8h,4h,16b,8b (general reg to vector)
- test_dup_2d_x(TyD);
- test_dup_4s_w(TyS);
- test_dup_2s_w(TyS);
- test_dup_8h_w(TyH);
- test_dup_4h_w(TyH);
- test_dup_16b_w(TyB);
- test_dup_8b_w(TyB);
+ if (1) test_dup_2d_x(TyD);
+ if (1) test_dup_4s_w(TyS);
+ if (1) test_dup_2s_w(TyS);
+ if (1) test_dup_8h_w(TyH);
+ if (1) test_dup_4h_w(TyH);
+ if (1) test_dup_16b_w(TyB);
+ if (1) test_dup_8b_w(TyB);
// ext 16b,8b,#imm4 (concat 2 vectors, then slice)
- test_ext_16b_16b_16b_0x0(TyB);
- test_ext_16b_16b_16b_0x7(TyB);
- test_ext_16b_16b_16b_0x8(TyB);
- test_ext_16b_16b_16b_0x9(TyB);
- test_ext_16b_16b_16b_0xF(TyB);
- test_ext_8b_8b_8b_0x0(TyB);
- test_ext_8b_8b_8b_0x1(TyB);
- test_ext_8b_8b_8b_0x6(TyB);
- test_ext_8b_8b_8b_0x7(TyB);
+ if (0) test_ext_16b_16b_16b_0x0(TyB);
+ if (0) test_ext_16b_16b_16b_0x7(TyB);
+ if (0) test_ext_16b_16b_16b_0x8(TyB);
+ if (0) test_ext_16b_16b_16b_0x9(TyB);
+ if (0) test_ext_16b_16b_16b_0xF(TyB);
+ if (0) test_ext_8b_8b_8b_0x0(TyB);
+ if (0) test_ext_8b_8b_8b_0x1(TyB);
+ if (0) test_ext_8b_8b_8b_0x6(TyB);
+ if (0) test_ext_8b_8b_8b_0x7(TyB);
// ins d[]_d[],s[]_s[],h[]_h[],b[]_b[]
- test_ins_d0_d0(TyD);
- test_ins_d0_d1(TyD);
- test_ins_d1_d0(TyD);
- test_ins_d1_d1(TyD);
- test_ins_s0_s2(TyS);
- test_ins_s3_s0(TyS);
- test_ins_s2_s1(TyS);
- test_ins_s1_s3(TyS);
- test_ins_h0_h6(TyH);
- test_ins_h7_h0(TyH);
- test_ins_h6_h1(TyH);
- test_ins_h1_h7(TyH);
- test_ins_b0_b14(TyB);
- test_ins_b15_b8(TyB);
- test_ins_b13_b9(TyB);
- test_ins_b5_b12(TyB);
+ if (0) test_ins_d0_d0(TyD);
+ if (0) test_ins_d0_d1(TyD);
+ if (0) test_ins_d1_d0(TyD);
+ if (0) test_ins_d1_d1(TyD);
+ if (0) test_ins_s0_s2(TyS);
+ if (0) test_ins_s3_s0(TyS);
+ if (0) test_ins_s2_s1(TyS);
+ if (0) test_ins_s1_s3(TyS);
+ if (0) test_ins_h0_h6(TyH);
+ if (0) test_ins_h7_h0(TyH);
+ if (0) test_ins_h6_h1(TyH);
+ if (0) test_ins_h1_h7(TyH);
+ if (0) test_ins_b0_b14(TyB);
+ if (0) test_ins_b15_b8(TyB);
+ if (0) test_ins_b13_b9(TyB);
+ if (0) test_ins_b5_b12(TyB);
// ins d[]_x, s[]_w, h[]_w, b[]_w
- test_INS_general();
+ if (1) test_INS_general();
// mla 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[]
// mls 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[]
// mul 4s_4s_s[],2s_2s_s[],8h_8h_h[],4h_4h_h[]
- test_mla_4s_4s_s0(TyS);
- test_mla_4s_4s_s3(TyS);
- test_mla_2s_2s_s0(TyS);
- test_mla_2s_2s_s3(TyS);
- test_mla_8h_8h_h1(TyH);
- test_mla_8h_8h_h5(TyH);
- test_mla_4h_4h_h2(TyH);
- test_mla_4h_4h_h7(TyH);
- test_mls_4s_4s_s0(TyS);
- test_mls_4s_4s_s3(TyS);
- test_mls_2s_2s_s0(TyS);
- test_mls_2s_2s_s3(TyS);
- test_mls_8h_8h_h1(TyH);
- test_mls_8h_8h_h5(TyH);
- test_mls_4h_4h_h2(TyH);
- test_mls_4h_4h_h7(TyH);
- test_mul_4s_4s_s0(TyS);
- test_mul_4s_4s_s3(TyS);
- test_mul_2s_2s_s0(TyS);
- test_mul_2s_2s_s3(TyS);
- test_mul_8h_8h_h1(TyH);
- test_mul_8h_8h_h5(TyH);
- test_mul_4h_4h_h2(TyH);
- test_mul_4h_4h_h7(TyH);
+ if (0) test_mla_4s_4s_s0(TyS);
+ if (0) test_mla_4s_4s_s3(TyS);
+ if (0) test_mla_2s_2s_s0(TyS);
+ if (0) test_mla_2s_2s_s3(TyS);
+ if (0) test_mla_8h_8h_h1(TyH);
+ if (0) test_mla_8h_8h_h5(TyH);
+ if (0) test_mla_4h_4h_h2(TyH);
+ if (0) test_mla_4h_4h_h7(TyH);
+ if (0) test_mls_4s_4s_s0(TyS);
+ if (0) test_mls_4s_4s_s3(TyS);
+ if (0) test_mls_2s_2s_s0(TyS);
+ if (0) test_mls_2s_2s_s3(TyS);
+ if (0) test_mls_8h_8h_h1(TyH);
+ if (0) test_mls_8h_8h_h5(TyH);
+ if (0) test_mls_4h_4h_h2(TyH);
+ if (0) test_mls_4h_4h_h7(TyH);
+ if (0) test_mul_4s_4s_s0(TyS);
+ if (0) test_mul_4s_4s_s3(TyS);
+ if (0) test_mul_2s_2s_s0(TyS);
+ if (0) test_mul_2s_2s_s3(TyS);
+ if (0) test_mul_8h_8h_h1(TyH);
+ if (0) test_mul_8h_8h_h5(TyH);
+ if (0) test_mul_4h_4h_h2(TyH);
+ if (0) test_mul_4h_4h_h7(TyH);
// mla 4s,2s,8h,4h,16b,8b
// mls 4s,2s,8h,4h,16b,8b
// mul 4s,2s,8h,4h,16b,8b
- test_mla_4s_4s_4s(TyS);
- test_mla_2s_2s_2s(TyS);
- test_mla_8h_8h_8h(TyH);
- test_mla_4h_4h_4h(TyH);
- test_mla_16b_16b_16b(TyB);
- test_mla_8b_8b_8b(TyB);
- test_mls_4s_4s_4s(TyS);
- test_mls_2s_2s_2s(TyS);
- test_mls_8h_8h_8h(TyH);
- test_mls_4h_4h_4h(TyH);
- test_mls_16b_16b_16b(TyB);
- test_mls_8b_8b_8b(TyB);
- test_mul_4s_4s_4s(TyS);
- test_mul_2s_2s_2s(TyS);
- test_mul_8h_8h_8h(TyH);
- test_mul_4h_4h_4h(TyH);
- test_mul_16b_16b_16b(TyB);
- test_mul_8b_8b_8b(TyB);
+ if (1) test_mla_4s_4s_4s(TyS);
+ if (1) test_mla_2s_2s_2s(TyS);
+ if (1) test_mla_8h_8h_8h(TyH);
+ if (1) test_mla_4h_4h_4h(TyH);
+ if (1) test_mla_16b_16b_16b(TyB);
+ if (1) test_mla_8b_8b_8b(TyB);
+ if (1) test_mls_4s_4s_4s(TyS);
+ if (1) test_mls_2s_2s_2s(TyS);
+ if (1) test_mls_8h_8h_8h(TyH);
+ if (1) test_mls_4h_4h_4h(TyH);
+ if (1) test_mls_16b_16b_16b(TyB);
+ if (1) test_mls_8b_8b_8b(TyB);
+ if (1) test_mul_4s_4s_4s(TyS);
+ if (1) test_mul_2s_2s_2s(TyS);
+ if (1) test_mul_8h_8h_8h(TyH);
+ if (1) test_mul_4h_4h_4h(TyH);
+ if (1) test_mul_16b_16b_16b(TyB);
+ if (1) test_mul_8b_8b_8b(TyB);
// Some of these movi and mvni cases are similar to orr and bic
// cases with immediates. Maybe they should be moved together.
// movi 16b,8b #imm8, LSL #0
- test_movi_16b_0x9C_lsl0(TyB);
- test_movi_8b_0x8B_lsl0(TyB);
+ if (0) test_movi_16b_0x9C_lsl0(TyB);
+ if (0) test_movi_8b_0x8B_lsl0(TyB);
// movi 8h,4h #imm8, LSL #0 or 8
// mvni 8h,4h #imm8, LSL #0 or 8
- test_movi_8h_0x5A_lsl0(TyH);
- test_movi_8h_0xA5_lsl8(TyH);
- test_movi_4h_0x5A_lsl0(TyH);
- test_movi_4h_0xA5_lsl8(TyH);
- test_mvni_8h_0x5A_lsl0(TyH);
- test_mvni_8h_0xA5_lsl8(TyH);
- test_mvni_4h_0x5A_lsl0(TyH);
- test_mvni_4h_0xA5_lsl8(TyH);
+ if (0) test_movi_8h_0x5A_lsl0(TyH);
+ if (0) test_movi_8h_0xA5_lsl8(TyH);
+ if (0) test_movi_4h_0x5A_lsl0(TyH);
+ if (0) test_movi_4h_0xA5_lsl8(TyH);
+ if (0) test_mvni_8h_0x5A_lsl0(TyH);
+ if (0) test_mvni_8h_0xA5_lsl8(TyH);
+ if (0) test_mvni_4h_0x5A_lsl0(TyH);
+ if (0) test_mvni_4h_0xA5_lsl8(TyH);
// movi 4s,2s #imm8, LSL #0, 8, 16, 24
// mvni 4s,2s #imm8, LSL #0, 8, 16, 24
- test_movi_4s_0x5A_lsl0(TyS);
- test_movi_4s_0x6B_lsl8(TyS);
- test_movi_4s_0x49_lsl16(TyS);
- test_movi_4s_0x3D_lsl24(TyS);
- test_movi_2s_0x5A_lsl0(TyS);
- test_movi_2s_0x6B_lsl8(TyS);
- test_movi_2s_0x49_lsl16(TyS);
- test_movi_2s_0x3D_lsl24(TyS);
- test_mvni_4s_0x5A_lsl0(TyS);
- test_mvni_4s_0x6B_lsl8(TyS);
- test_mvni_4s_0x49_lsl16(TyS);
- test_mvni_4s_0x3D_lsl24(TyS);
- test_mvni_2s_0x5A_lsl0(TyS);
- test_mvni_2s_0x6B_lsl8(TyS);
- test_mvni_2s_0x49_lsl16(TyS);
- test_mvni_2s_0x3D_lsl24(TyS);
+ if (1) test_movi_4s_0x5A_lsl0(TyS);
+ if (0) test_movi_4s_0x6B_lsl8(TyS);
+ if (0) test_movi_4s_0x49_lsl16(TyS);
+ if (0) test_movi_4s_0x3D_lsl24(TyS);
+ if (0) test_movi_2s_0x5A_lsl0(TyS);
+ if (0) test_movi_2s_0x6B_lsl8(TyS);
+ if (0) test_movi_2s_0x49_lsl16(TyS);
+ if (0) test_movi_2s_0x3D_lsl24(TyS);
+ if (0) test_mvni_4s_0x5A_lsl0(TyS);
+ if (0) test_mvni_4s_0x6B_lsl8(TyS);
+ if (0) test_mvni_4s_0x49_lsl16(TyS);
+ if (0) test_mvni_4s_0x3D_lsl24(TyS);
+ if (0) test_mvni_2s_0x5A_lsl0(TyS);
+ if (0) test_mvni_2s_0x6B_lsl8(TyS);
+ if (0) test_mvni_2s_0x49_lsl16(TyS);
+ if (0) test_mvni_2s_0x3D_lsl24(TyS);
// movi 4s,2s #imm8, MSL #8 or 16
// mvni 4s,2s #imm8, MSL #8 or 16
- test_movi_4s_0x6B_msl8(TyS);
- test_movi_4s_0x94_msl16(TyS);
- test_movi_2s_0x7A_msl8(TyS);
- test_movi_2s_0xA5_msl16(TyS);
- test_mvni_4s_0x6B_msl8(TyS);
- test_mvni_4s_0x94_msl16(TyS);
- test_mvni_2s_0x7A_msl8(TyS);
- test_mvni_2s_0xA5_msl16(TyS);
+ if (0) test_movi_4s_0x6B_msl8(TyS);
+ if (0) test_movi_4s_0x94_msl16(TyS);
+ if (0) test_movi_2s_0x7A_msl8(TyS);
+ if (0) test_movi_2s_0xA5_msl16(TyS);
+ if (0) test_mvni_4s_0x6B_msl8(TyS);
+ if (0) test_mvni_4s_0x94_msl16(TyS);
+ if (0) test_mvni_2s_0x7A_msl8(TyS);
+ if (0) test_mvni_2s_0xA5_msl16(TyS);
// movi d, #imm64
// movi 2d, #imm64
- test_movi_d_0xA5(TyD);
- test_movi_2d_0xB4(TyD);
+ if (0) test_movi_d_0xA5(TyD);
+ if (0) test_movi_2d_0xB4(TyD);
// not 16b,8b
- test_not_16b_16b(TyB);
- test_not_8b_8b(TyB);
+ if (0) test_not_16b_16b(TyB);
+ if (0) test_not_8b_8b(TyB);
// pmul 16b,8b
- test_pmul_16b_16b_16b(TyB);
- test_pmul_8b_8b_8b(TyB);
+ if (0) test_pmul_16b_16b_16b(TyB);
+ if (0) test_pmul_8b_8b_8b(TyB);
// pmull{2} 8h_8b_8b,8h_16b_16b,1q_1d_1d,1q_2d_2d
- test_pmull_8h_8b_8b(TyB);
- test_pmull2_8h_16b_16b(TyB);
- //test_pmull_1q_1d_1d(TyD);
- //test_pmull_1q_2d_2d(TyD);
+ if (0) test_pmull_8h_8b_8b(TyB);
+ if (0) test_pmull2_8h_16b_16b(TyB);
+ //if (0) test_pmull_1q_1d_1d(TyD);
+ //if (0) test_pmull_1q_2d_2d(TyD);
// rbit 16b,8b
// rev16 16b,8b
// rev32 16b,8b,8h,4h
// rev64 16b,8b,8h,4h,4s,2s
- test_rbit_16b_16b(TyB);
- test_rbit_8b_8b(TyB);
- test_rev16_16b_16b(TyB);
- test_rev16_8b_8b(TyB);
- test_rev32_16b_16b(TyB);
- test_rev32_8b_8b(TyB);
- test_rev32_8h_8h(TyH);
- test_rev32_4h_4h(TyH);
- test_rev64_16b_16b(TyB);
- test_rev64_8b_8b(TyB);
- test_rev64_8h_8h(TyH);
- test_rev64_4h_4h(TyH);
- test_rev64_4s_4s(TyS);
- test_rev64_2s_2s(TyS);
+ if (0) test_rbit_16b_16b(TyB);
+ if (0) test_rbit_8b_8b(TyB);
+ if (0) test_rev16_16b_16b(TyB);
+ if (0) test_rev16_8b_8b(TyB);
+ if (0) test_rev32_16b_16b(TyB);
+ if (0) test_rev32_8b_8b(TyB);
+ if (0) test_rev32_8h_8h(TyH);
+ if (0) test_rev32_4h_4h(TyH);
+ if (0) test_rev64_16b_16b(TyB);
+ if (0) test_rev64_8b_8b(TyB);
+ if (0) test_rev64_8h_8h(TyH);
+ if (0) test_rev64_4h_4h(TyH);
+ if (0) test_rev64_4s_4s(TyS);
+ if (0) test_rev64_2s_2s(TyS);
// saba 16b,8b,8h,4h,4s,2s
// uaba 16b,8b,8h,4h,4s,2s
- test_saba_4s_4s_4s(TyS);
- test_saba_2s_2s_2s(TyS);
- test_saba_8h_8h_8h(TyH);
- test_saba_4h_4h_4h(TyH);
- test_saba_16b_16b_16b(TyB);
- test_saba_8b_8b_8b(TyB);
- test_uaba_4s_4s_4s(TyS);
- test_uaba_2s_2s_2s(TyS);
- test_uaba_8h_8h_8h(TyH);
- test_uaba_4h_4h_4h(TyH);
- test_uaba_16b_16b_16b(TyB);
- test_uaba_8b_8b_8b(TyB);
+ if (0) test_saba_4s_4s_4s(TyS);
+ if (0) test_saba_2s_2s_2s(TyS);
+ if (0) test_saba_8h_8h_8h(TyH);
+ if (0) test_saba_4h_4h_4h(TyH);
+ if (0) test_saba_16b_16b_16b(TyB);
+ if (0) test_saba_8b_8b_8b(TyB);
+ if (0) test_uaba_4s_4s_4s(TyS);
+ if (0) test_uaba_2s_2s_2s(TyS);
+ if (0) test_uaba_8h_8h_8h(TyH);
+ if (0) test_uaba_4h_4h_4h(TyH);
+ if (0) test_uaba_16b_16b_16b(TyB);
+ if (0) test_uaba_8b_8b_8b(TyB);
// sabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// uabal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
- test_sabal_2d_2s_2s(TyS);
- test_sabal2_2d_4s_4s(TyS);
- test_sabal_4s_4h_4h(TyH);
- test_sabal2_4s_8h_8h(TyH);
- test_sabal_8h_8b_8b(TyB);
- test_sabal2_8h_16b_16b(TyB);
- test_uabal_2d_2s_2s(TyS);
- test_uabal2_2d_4s_4s(TyS);
- test_uabal_4s_4h_4h(TyH);
- test_uabal2_4s_8h_8h(TyH);
- test_uabal_8h_8b_8b(TyB);
- test_uabal2_8h_16b_16b(TyB);
+ if (0) test_sabal_2d_2s_2s(TyS);
+ if (0) test_sabal2_2d_4s_4s(TyS);
+ if (0) test_sabal_4s_4h_4h(TyH);
+ if (0) test_sabal2_4s_8h_8h(TyH);
+ if (0) test_sabal_8h_8b_8b(TyB);
+ if (0) test_sabal2_8h_16b_16b(TyB);
+ if (0) test_uabal_2d_2s_2s(TyS);
+ if (0) test_uabal2_2d_4s_4s(TyS);
+ if (0) test_uabal_4s_4h_4h(TyH);
+ if (0) test_uabal2_4s_8h_8h(TyH);
+ if (0) test_uabal_8h_8b_8b(TyB);
+ if (0) test_uabal2_8h_16b_16b(TyB);
// sabd 16b,8b,8h,4h,4s,2s
// uabd 16b,8b,8h,4h,4s,2s
- test_sabd_4s_4s_4s(TyS);
- test_sabd_2s_2s_2s(TyS);
- test_sabd_8h_8h_8h(TyH);
- test_sabd_4h_4h_4h(TyH);
- test_sabd_16b_16b_16b(TyB);
- test_sabd_8b_8b_8b(TyB);
- test_uabd_4s_4s_4s(TyS);
- test_uabd_2s_2s_2s(TyS);
- test_uabd_8h_8h_8h(TyH);
- test_uabd_4h_4h_4h(TyH);
- test_uabd_16b_16b_16b(TyB);
- test_uabd_8b_8b_8b(TyB);
+ if (0) test_sabd_4s_4s_4s(TyS);
+ if (0) test_sabd_2s_2s_2s(TyS);
+ if (0) test_sabd_8h_8h_8h(TyH);
+ if (0) test_sabd_4h_4h_4h(TyH);
+ if (0) test_sabd_16b_16b_16b(TyB);
+ if (0) test_sabd_8b_8b_8b(TyB);
+ if (0) test_uabd_4s_4s_4s(TyS);
+ if (0) test_uabd_2s_2s_2s(TyS);
+ if (0) test_uabd_8h_8h_8h(TyH);
+ if (0) test_uabd_4h_4h_4h(TyH);
+ if (0) test_uabd_16b_16b_16b(TyB);
+ if (0) test_uabd_8b_8b_8b(TyB);
// sabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// uabdl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
- test_sabdl_2d_2s_2s(TyS);
- test_sabdl2_2d_4s_4s(TyS);
- test_sabdl_4s_4h_4h(TyH);
- test_sabdl2_4s_8h_8h(TyH);
- test_sabdl_8h_8b_8b(TyB);
- test_sabdl2_8h_16b_16b(TyB);
- test_uabdl_2d_2s_2s(TyS);
- test_uabdl2_2d_4s_4s(TyS);
- test_uabdl_4s_4h_4h(TyH);
- test_uabdl2_4s_8h_8h(TyH);
- test_uabdl_8h_8b_8b(TyB);
- test_uabdl2_8h_16b_16b(TyB);
+ if (0) test_sabdl_2d_2s_2s(TyS);
+ if (0) test_sabdl2_2d_4s_4s(TyS);
+ if (0) test_sabdl_4s_4h_4h(TyH);
+ if (0) test_sabdl2_4s_8h_8h(TyH);
+ if (0) test_sabdl_8h_8b_8b(TyB);
+ if (0) test_sabdl2_8h_16b_16b(TyB);
+ if (0) test_uabdl_2d_2s_2s(TyS);
+ if (0) test_uabdl2_2d_4s_4s(TyS);
+ if (0) test_uabdl_4s_4h_4h(TyH);
+ if (0) test_uabdl2_4s_8h_8h(TyH);
+ if (0) test_uabdl_8h_8b_8b(TyB);
+ if (0) test_uabdl2_8h_16b_16b(TyB);
// sadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s
// uadalp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s
- test_sadalp_1d_2s(TyS);
- test_sadalp_2d_4s(TyS);
- test_sadalp_2s_4h(TyH);
- test_sadalp_4s_8h(TyH);
- test_sadalp_4h_8b(TyB);
- test_sadalp_8h_16b(TyB);
- test_uadalp_1d_2s(TyS);
- test_uadalp_2d_4s(TyS);
- test_uadalp_2s_4h(TyH);
- test_uadalp_4s_8h(TyH);
- test_uadalp_4h_8b(TyB);
- test_uadalp_8h_16b(TyB);
+ if (0) test_sadalp_1d_2s(TyS);
+ if (0) test_sadalp_2d_4s(TyS);
+ if (0) test_sadalp_2s_4h(TyH);
+ if (0) test_sadalp_4s_8h(TyH);
+ if (0) test_sadalp_4h_8b(TyB);
+ if (0) test_sadalp_8h_16b(TyB);
+ if (0) test_uadalp_1d_2s(TyS);
+ if (0) test_uadalp_2d_4s(TyS);
+ if (0) test_uadalp_2s_4h(TyH);
+ if (0) test_uadalp_4s_8h(TyH);
+ if (0) test_uadalp_4h_8b(TyB);
+ if (0) test_uadalp_8h_16b(TyB);
// saddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// uaddl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// ssubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// usubl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
- test_saddl_2d_2s_2s(TyS);
- test_saddl2_2d_4s_4s(TyS);
- test_saddl_4s_4h_4h(TyH);
- test_saddl2_4s_8h_8h(TyH);
- test_saddl_8h_8b_8b(TyB);
- test_saddl2_8h_16b_16b(TyB);
- test_uaddl_2d_2s_2s(TyS);
- test_uaddl2_2d_4s_4s(TyS);
- test_uaddl_4s_4h_4h(TyH);
- test_uaddl2_4s_8h_8h(TyH);
- test_uaddl_8h_8b_8b(TyB);
- test_uaddl2_8h_16b_16b(TyB);
- test_ssubl_2d_2s_2s(TyS);
- test_ssubl2_2d_4s_4s(TyS);
- test_ssubl_4s_4h_4h(TyH);
- test_ssubl2_4s_8h_8h(TyH);
- test_ssubl_8h_8b_8b(TyB);
- test_ssubl2_8h_16b_16b(TyB);
- test_usubl_2d_2s_2s(TyS);
- test_usubl2_2d_4s_4s(TyS);
- test_usubl_4s_4h_4h(TyH);
- test_usubl2_4s_8h_8h(TyH);
- test_usubl_8h_8b_8b(TyB);
- test_usubl2_8h_16b_16b(TyB);
+ if (0) test_saddl_2d_2s_2s(TyS);
+ if (0) test_saddl2_2d_4s_4s(TyS);
+ if (0) test_saddl_4s_4h_4h(TyH);
+ if (0) test_saddl2_4s_8h_8h(TyH);
+ if (0) test_saddl_8h_8b_8b(TyB);
+ if (0) test_saddl2_8h_16b_16b(TyB);
+ if (0) test_uaddl_2d_2s_2s(TyS);
+ if (0) test_uaddl2_2d_4s_4s(TyS);
+ if (0) test_uaddl_4s_4h_4h(TyH);
+ if (0) test_uaddl2_4s_8h_8h(TyH);
+ if (0) test_uaddl_8h_8b_8b(TyB);
+ if (0) test_uaddl2_8h_16b_16b(TyB);
+ if (0) test_ssubl_2d_2s_2s(TyS);
+ if (0) test_ssubl2_2d_4s_4s(TyS);
+ if (0) test_ssubl_4s_4h_4h(TyH);
+ if (0) test_ssubl2_4s_8h_8h(TyH);
+ if (0) test_ssubl_8h_8b_8b(TyB);
+ if (0) test_ssubl2_8h_16b_16b(TyB);
+ if (0) test_usubl_2d_2s_2s(TyS);
+ if (0) test_usubl2_2d_4s_4s(TyS);
+ if (0) test_usubl_4s_4h_4h(TyH);
+ if (0) test_usubl2_4s_8h_8h(TyH);
+ if (0) test_usubl_8h_8b_8b(TyB);
+ if (0) test_usubl2_8h_16b_16b(TyB);
// saddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s
// uaddlp 4h_8b,8h_16b,2s_4h,4s_8h,1d_2s,2d_4s
- test_saddlp_1d_2s(TyS);
- test_saddlp_2d_4s(TyS);
- test_saddlp_2s_4h(TyH);
- test_saddlp_4s_8h(TyH);
- test_saddlp_4h_8b(TyB);
- test_saddlp_8h_16b(TyB);
- test_uaddlp_1d_2s(TyS);
- test_uaddlp_2d_4s(TyS);
- test_uaddlp_2s_4h(TyH);
- test_uaddlp_4s_8h(TyH);
- test_uaddlp_4h_8b(TyB);
- test_uaddlp_8h_16b(TyB);
+ if (0) test_saddlp_1d_2s(TyS);
+ if (0) test_saddlp_2d_4s(TyS);
+ if (0) test_saddlp_2s_4h(TyH);
+ if (0) test_saddlp_4s_8h(TyH);
+ if (0) test_saddlp_4h_8b(TyB);
+ if (0) test_saddlp_8h_16b(TyB);
+ if (0) test_uaddlp_1d_2s(TyS);
+ if (0) test_uaddlp_2d_4s(TyS);
+ if (0) test_uaddlp_2s_4h(TyH);
+ if (0) test_uaddlp_4s_8h(TyH);
+ if (0) test_uaddlp_4h_8b(TyB);
+ if (0) test_uaddlp_8h_16b(TyB);
// saddlv h_16b/8b, s_8h/4h, d_4s
// uaddlv h_16b/8b, s_8h/4h, d_4s
- test_saddlv_h_16b(TyB);
- test_saddlv_h_8b(TyB);
- test_saddlv_s_8h(TyH);
- test_saddlv_s_4h(TyH);
- test_saddlv_d_4s(TyH);
- test_uaddlv_h_16b(TyB);
- test_uaddlv_h_8b(TyB);
- test_uaddlv_s_8h(TyH);
- test_uaddlv_s_4h(TyH);
- test_uaddlv_d_4s(TyH);
+ if (0) test_saddlv_h_16b(TyB);
+ if (0) test_saddlv_h_8b(TyB);
+ if (0) test_saddlv_s_8h(TyH);
+ if (0) test_saddlv_s_4h(TyH);
+ if (0) test_saddlv_d_4s(TyH);
+ if (0) test_uaddlv_h_16b(TyB);
+ if (0) test_uaddlv_h_8b(TyB);
+ if (0) test_uaddlv_s_8h(TyH);
+ if (0) test_uaddlv_s_4h(TyH);
+ if (0) test_uaddlv_d_4s(TyH);
// saddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s
// uaddw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s
// ssubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s
// usubw{2} 8h_8h_16b/8b, 4s_4s_8h/4h, 2d_2d_4s/2s
- test_saddw2_8h_8h_16b(TyB);
- test_saddw_8h_8h_8b(TyB);
- test_saddw2_4s_4s_8h(TyH);
- test_saddw_4s_4s_4h(TyH);
- test_saddw2_2d_2d_4s(TyS);
- test_saddw_2d_2d_2s(TyS);
- test_uaddw2_8h_8h_16b(TyB);
- test_uaddw_8h_8h_8b(TyB);
- test_uaddw2_4s_4s_8h(TyH);
- test_uaddw_4s_4s_4h(TyH);
- test_uaddw2_2d_2d_4s(TyS);
- test_uaddw_2d_2d_2s(TyS);
- test_ssubw2_8h_8h_16b(TyB);
- test_ssubw_8h_8h_8b(TyB);
- test_ssubw2_4s_4s_8h(TyH);
- test_ssubw_4s_4s_4h(TyH);
- test_ssubw2_2d_2d_4s(TyS);
- test_ssubw_2d_2d_2s(TyS);
- test_usubw2_8h_8h_16b(TyB);
- test_usubw_8h_8h_8b(TyB);
- test_usubw2_4s_4s_8h(TyH);
- test_usubw_4s_4s_4h(TyH);
- test_usubw2_2d_2d_4s(TyS);
- test_usubw_2d_2d_2s(TyS);
+ if (0) test_saddw2_8h_8h_16b(TyB);
+ if (0) test_saddw_8h_8h_8b(TyB);
+ if (0) test_saddw2_4s_4s_8h(TyH);
+ if (0) test_saddw_4s_4s_4h(TyH);
+ if (0) test_saddw2_2d_2d_4s(TyS);
+ if (0) test_saddw_2d_2d_2s(TyS);
+ if (0) test_uaddw2_8h_8h_16b(TyB);
+ if (0) test_uaddw_8h_8h_8b(TyB);
+ if (0) test_uaddw2_4s_4s_8h(TyH);
+ if (0) test_uaddw_4s_4s_4h(TyH);
+ if (0) test_uaddw2_2d_2d_4s(TyS);
+ if (0) test_uaddw_2d_2d_2s(TyS);
+ if (0) test_ssubw2_8h_8h_16b(TyB);
+ if (0) test_ssubw_8h_8h_8b(TyB);
+ if (0) test_ssubw2_4s_4s_8h(TyH);
+ if (0) test_ssubw_4s_4s_4h(TyH);
+ if (0) test_ssubw2_2d_2d_4s(TyS);
+ if (0) test_ssubw_2d_2d_2s(TyS);
+ if (0) test_usubw2_8h_8h_16b(TyB);
+ if (0) test_usubw_8h_8h_8b(TyB);
+ if (0) test_usubw2_4s_4s_8h(TyH);
+ if (0) test_usubw_4s_4s_4h(TyH);
+ if (0) test_usubw2_2d_2d_4s(TyS);
+ if (0) test_usubw_2d_2d_2s(TyS);
// shadd 16b,8b,8h,4h,4s,2s
// uhadd 16b,8b,8h,4h,4s,2s
// shsub 16b,8b,8h,4h,4s,2s
// uhsub 16b,8b,8h,4h,4s,2s
- test_shadd_4s_4s_4s(TyS);
- test_shadd_2s_2s_2s(TyS);
- test_shadd_8h_8h_8h(TyH);
- test_shadd_4h_4h_4h(TyH);
- test_shadd_16b_16b_16b(TyB);
- test_shadd_8b_8b_8b(TyB);
- test_uhadd_4s_4s_4s(TyS);
- test_uhadd_2s_2s_2s(TyS);
- test_uhadd_8h_8h_8h(TyH);
- test_uhadd_4h_4h_4h(TyH);
- test_uhadd_16b_16b_16b(TyB);
- test_uhadd_8b_8b_8b(TyB);
- test_shsub_4s_4s_4s(TyS);
- test_shsub_2s_2s_2s(TyS);
- test_shsub_8h_8h_8h(TyH);
- test_shsub_4h_4h_4h(TyH);
- test_shsub_16b_16b_16b(TyB);
- test_shsub_8b_8b_8b(TyB);
- test_uhsub_4s_4s_4s(TyS);
- test_uhsub_2s_2s_2s(TyS);
- test_uhsub_8h_8h_8h(TyH);
- test_uhsub_4h_4h_4h(TyH);
- test_uhsub_16b_16b_16b(TyB);
- test_uhsub_8b_8b_8b(TyB);
+ if (0) test_shadd_4s_4s_4s(TyS);
+ if (0) test_shadd_2s_2s_2s(TyS);
+ if (0) test_shadd_8h_8h_8h(TyH);
+ if (0) test_shadd_4h_4h_4h(TyH);
+ if (0) test_shadd_16b_16b_16b(TyB);
+ if (0) test_shadd_8b_8b_8b(TyB);
+ if (0) test_uhadd_4s_4s_4s(TyS);
+ if (0) test_uhadd_2s_2s_2s(TyS);
+ if (0) test_uhadd_8h_8h_8h(TyH);
+ if (0) test_uhadd_4h_4h_4h(TyH);
+ if (0) test_uhadd_16b_16b_16b(TyB);
+ if (0) test_uhadd_8b_8b_8b(TyB);
+ if (0) test_shsub_4s_4s_4s(TyS);
+ if (0) test_shsub_2s_2s_2s(TyS);
+ if (0) test_shsub_8h_8h_8h(TyH);
+ if (0) test_shsub_4h_4h_4h(TyH);
+ if (0) test_shsub_16b_16b_16b(TyB);
+ if (0) test_shsub_8b_8b_8b(TyB);
+ if (0) test_uhsub_4s_4s_4s(TyS);
+ if (0) test_uhsub_2s_2s_2s(TyS);
+ if (0) test_uhsub_8h_8h_8h(TyH);
+ if (0) test_uhsub_4h_4h_4h(TyH);
+ if (0) test_uhsub_16b_16b_16b(TyB);
+ if (0) test_uhsub_8b_8b_8b(TyB);
// shll{2} 8h_8b/16b_#8, 4s_4h/8h_#16, 2d_2s/4s_#32
- test_shll_8h_8b_8(TyB);
- test_shll2_8h_16b_8(TyB);
- test_shll_4s_4h_16(TyH);
- test_shll2_4s_8h_16(TyH);
- test_shll_2d_2s_32(TyS);
- test_shll2_2d_4s_32(TyS);
+ if (0) test_shll_8h_8b_8(TyB);
+ if (0) test_shll2_8h_16b_8(TyB);
+ if (0) test_shll_4s_4h_16(TyH);
+ if (0) test_shll2_4s_8h_16(TyH);
+ if (0) test_shll_2d_2s_32(TyS);
+ if (0) test_shll2_2d_4s_32(TyS);
// shrn{2} 2s/4s_2d, 8h/4h_4s, 8b/16b_8h, #imm in 1 .. elem_bits
// rshrn{2} 2s/4s_2d, 8h/4h_4s, 8b/16b_8h, #imm in 1 .. elem_bits
- test_shrn_2s_2d_1(TyD);
- test_shrn_2s_2d_32(TyD);
- test_shrn2_4s_2d_1(TyD);
- test_shrn2_4s_2d_32(TyD);
- test_shrn_4h_4s_1(TyS);
- test_shrn_4h_4s_16(TyS);
- test_shrn2_8h_4s_1(TyS);
- test_shrn2_8h_4s_16(TyS);
- test_shrn_8b_8h_1(TyH);
- test_shrn_8b_8h_8(TyH);
- test_shrn2_16b_8h_1(TyH);
- test_shrn2_16b_8h_8(TyH);
- test_rshrn_2s_2d_1(TyD);
- test_rshrn_2s_2d_32(TyD);
- test_rshrn2_4s_2d_1(TyD);
- test_rshrn2_4s_2d_32(TyD);
- test_rshrn_4h_4s_1(TyS);
- test_rshrn_4h_4s_16(TyS);
- test_rshrn2_8h_4s_1(TyS);
- test_rshrn2_8h_4s_16(TyS);
- test_rshrn_8b_8h_1(TyH);
- test_rshrn_8b_8h_8(TyH);
- test_rshrn2_16b_8h_1(TyH);
- test_rshrn2_16b_8h_8(TyH);
+ if (0) test_shrn_2s_2d_1(TyD);
+ if (0) test_shrn_2s_2d_32(TyD);
+ if (0) test_shrn2_4s_2d_1(TyD);
+ if (0) test_shrn2_4s_2d_32(TyD);
+ if (0) test_shrn_4h_4s_1(TyS);
+ if (0) test_shrn_4h_4s_16(TyS);
+ if (0) test_shrn2_8h_4s_1(TyS);
+ if (0) test_shrn2_8h_4s_16(TyS);
+ if (0) test_shrn_8b_8h_1(TyH);
+ if (0) test_shrn_8b_8h_8(TyH);
+ if (0) test_shrn2_16b_8h_1(TyH);
+ if (0) test_shrn2_16b_8h_8(TyH);
+ if (0) test_rshrn_2s_2d_1(TyD);
+ if (0) test_rshrn_2s_2d_32(TyD);
+ if (0) test_rshrn2_4s_2d_1(TyD);
+ if (0) test_rshrn2_4s_2d_32(TyD);
+ if (0) test_rshrn_4h_4s_1(TyS);
+ if (0) test_rshrn_4h_4s_16(TyS);
+ if (0) test_rshrn2_8h_4s_1(TyS);
+ if (0) test_rshrn2_8h_4s_16(TyS);
+ if (0) test_rshrn_8b_8h_1(TyH);
+ if (0) test_rshrn_8b_8h_8(TyH);
+ if (0) test_rshrn2_16b_8h_1(TyH);
+ if (0) test_rshrn2_16b_8h_8(TyH);
// sli d_#imm
// sri d_#imm
- test_sli_d_d_0(TyD);
- test_sli_d_d_32(TyD);
- test_sli_d_d_63(TyD);
- test_sri_d_d_1(TyD);
- test_sri_d_d_33(TyD);
- test_sri_d_d_64(TyD);
+ if (0) test_sli_d_d_0(TyD);
+ if (0) test_sli_d_d_32(TyD);
+ if (0) test_sli_d_d_63(TyD);
+ if (0) test_sri_d_d_1(TyD);
+ if (0) test_sri_d_d_33(TyD);
+ if (0) test_sri_d_d_64(TyD);
// sli 2d,4s,2s,8h,4h,16b,8b _#imm
// sri 2d,4s,2s,8h,4h,16b,8b _#imm
- test_sli_2d_2d_0(TyD);
- test_sli_2d_2d_32(TyD);
- test_sli_2d_2d_63(TyD);
- test_sli_4s_4s_0(TyS);
- test_sli_4s_4s_16(TyS);
- test_sli_4s_4s_31(TyS);
- test_sli_2s_2s_0(TyS);
- test_sli_2s_2s_16(TyS);
- test_sli_2s_2s_31(TyS);
- test_sli_8h_8h_0(TyH);
- test_sli_8h_8h_8(TyH);
- test_sli_8h_8h_15(TyH);
- test_sli_4h_4h_0(TyH);
- test_sli_4h_4h_8(TyH);
- test_sli_4h_4h_15(TyH);
- test_sli_16b_16b_0(TyB);
- test_sli_16b_16b_3(TyB);
- test_sli_16b_16b_7(TyB);
- test_sli_8b_8b_0(TyB);
- test_sli_8b_8b_3(TyB);
- test_sli_8b_8b_7(TyB);
- test_sri_2d_2d_1(TyD);
- test_sri_2d_2d_33(TyD);
- test_sri_2d_2d_64(TyD);
- test_sri_4s_4s_1(TyS);
- test_sri_4s_4s_17(TyS);
- test_sri_4s_4s_32(TyS);
- test_sri_2s_2s_1(TyS);
- test_sri_2s_2s_17(TyS);
- test_sri_2s_2s_32(TyS);
- test_sri_8h_8h_1(TyH);
- test_sri_8h_8h_8(TyH);
- test_sri_8h_8h_16(TyH);
- test_sri_4h_4h_1(TyH);
- test_sri_4h_4h_8(TyH);
- test_sri_4h_4h_16(TyH);
- test_sri_16b_16b_1(TyB);
- test_sri_16b_16b_4(TyB);
- test_sri_16b_16b_8(TyB);
- test_sri_8b_8b_1(TyB);
- test_sri_8b_8b_4(TyB);
- test_sri_8b_8b_8(TyB);
+ if (0) test_sli_2d_2d_0(TyD);
+ if (0) test_sli_2d_2d_32(TyD);
+ if (0) test_sli_2d_2d_63(TyD);
+ if (0) test_sli_4s_4s_0(TyS);
+ if (0) test_sli_4s_4s_16(TyS);
+ if (0) test_sli_4s_4s_31(TyS);
+ if (0) test_sli_2s_2s_0(TyS);
+ if (0) test_sli_2s_2s_16(TyS);
+ if (0) test_sli_2s_2s_31(TyS);
+ if (0) test_sli_8h_8h_0(TyH);
+ if (0) test_sli_8h_8h_8(TyH);
+ if (0) test_sli_8h_8h_15(TyH);
+ if (0) test_sli_4h_4h_0(TyH);
+ if (0) test_sli_4h_4h_8(TyH);
+ if (0) test_sli_4h_4h_15(TyH);
+ if (0) test_sli_16b_16b_0(TyB);
+ if (0) test_sli_16b_16b_3(TyB);
+ if (0) test_sli_16b_16b_7(TyB);
+ if (0) test_sli_8b_8b_0(TyB);
+ if (0) test_sli_8b_8b_3(TyB);
+ if (0) test_sli_8b_8b_7(TyB);
+ if (0) test_sri_2d_2d_1(TyD);
+ if (0) test_sri_2d_2d_33(TyD);
+ if (0) test_sri_2d_2d_64(TyD);
+ if (0) test_sri_4s_4s_1(TyS);
+ if (0) test_sri_4s_4s_17(TyS);
+ if (0) test_sri_4s_4s_32(TyS);
+ if (0) test_sri_2s_2s_1(TyS);
+ if (0) test_sri_2s_2s_17(TyS);
+ if (0) test_sri_2s_2s_32(TyS);
+ if (0) test_sri_8h_8h_1(TyH);
+ if (0) test_sri_8h_8h_8(TyH);
+ if (0) test_sri_8h_8h_16(TyH);
+ if (0) test_sri_4h_4h_1(TyH);
+ if (0) test_sri_4h_4h_8(TyH);
+ if (0) test_sri_4h_4h_16(TyH);
+ if (0) test_sri_16b_16b_1(TyB);
+ if (0) test_sri_16b_16b_4(TyB);
+ if (0) test_sri_16b_16b_8(TyB);
+ if (0) test_sri_8b_8b_1(TyB);
+ if (0) test_sri_8b_8b_4(TyB);
+ if (0) test_sri_8b_8b_8(TyB);
// smax 4s,2s,8h,4h,16b,8b
// umax 4s,2s,8h,4h,16b,8b
// smin 4s,2s,8h,4h,16b,8b
// umin 4s,2s,8h,4h,16b,8b
- test_smax_4s_4s_4s(TyS);
- test_smax_2s_2s_2s(TyS);
- test_smax_8h_8h_8h(TyH);
- test_smax_4h_4h_4h(TyH);
- test_smax_16b_16b_16b(TyB);
- test_smax_8b_8b_8b(TyB);
- test_umax_4s_4s_4s(TyS);
- test_umax_2s_2s_2s(TyS);
- test_umax_8h_8h_8h(TyH);
- test_umax_4h_4h_4h(TyH);
- test_umax_16b_16b_16b(TyB);
- test_umax_8b_8b_8b(TyB);
- test_smin_4s_4s_4s(TyS);
- test_smin_2s_2s_2s(TyS);
- test_smin_8h_8h_8h(TyH);
- test_smin_4h_4h_4h(TyH);
- test_smin_16b_16b_16b(TyB);
- test_smin_8b_8b_8b(TyB);
- test_umin_4s_4s_4s(TyS);
- test_umin_2s_2s_2s(TyS);
- test_umin_8h_8h_8h(TyH);
- test_umin_4h_4h_4h(TyH);
- test_umin_16b_16b_16b(TyB);
- test_umin_8b_8b_8b(TyB);
+ if (1) test_smax_4s_4s_4s(TyS);
+ if (1) test_smax_2s_2s_2s(TyS);
+ if (1) test_smax_8h_8h_8h(TyH);
+ if (1) test_smax_4h_4h_4h(TyH);
+ if (1) test_smax_16b_16b_16b(TyB);
+ if (1) test_smax_8b_8b_8b(TyB);
+ if (1) test_umax_4s_4s_4s(TyS);
+ if (1) test_umax_2s_2s_2s(TyS);
+ if (1) test_umax_8h_8h_8h(TyH);
+ if (1) test_umax_4h_4h_4h(TyH);
+ if (1) test_umax_16b_16b_16b(TyB);
+ if (1) test_umax_8b_8b_8b(TyB);
+ if (1) test_smin_4s_4s_4s(TyS);
+ if (1) test_smin_2s_2s_2s(TyS);
+ if (1) test_smin_8h_8h_8h(TyH);
+ if (1) test_smin_4h_4h_4h(TyH);
+ if (1) test_smin_16b_16b_16b(TyB);
+ if (1) test_smin_8b_8b_8b(TyB);
+ if (1) test_umin_4s_4s_4s(TyS);
+ if (1) test_umin_2s_2s_2s(TyS);
+ if (1) test_umin_8h_8h_8h(TyH);
+ if (1) test_umin_4h_4h_4h(TyH);
+ if (1) test_umin_16b_16b_16b(TyB);
+ if (1) test_umin_8b_8b_8b(TyB);
// smaxp 4s,2s,8h,4h,16b,8b
// umaxp 4s,2s,8h,4h,16b,8b
// sminp 4s,2s,8h,4h,16b,8b
// uminp 4s,2s,8h,4h,16b,8b
- test_smaxp_4s_4s_4s(TyS);
- test_smaxp_2s_2s_2s(TyS);
- test_smaxp_8h_8h_8h(TyH);
- test_smaxp_4h_4h_4h(TyH);
- test_smaxp_16b_16b_16b(TyB);
- test_smaxp_8b_8b_8b(TyB);
- test_umaxp_4s_4s_4s(TyS);
- test_umaxp_2s_2s_2s(TyS);
- test_umaxp_8h_8h_8h(TyH);
- test_umaxp_4h_4h_4h(TyH);
- test_umaxp_16b_16b_16b(TyB);
- test_umaxp_8b_8b_8b(TyB);
- test_sminp_4s_4s_4s(TyS);
- test_sminp_2s_2s_2s(TyS);
- test_sminp_8h_8h_8h(TyH);
- test_sminp_4h_4h_4h(TyH);
- test_sminp_16b_16b_16b(TyB);
- test_sminp_8b_8b_8b(TyB);
- test_uminp_4s_4s_4s(TyS);
- test_uminp_2s_2s_2s(TyS);
- test_uminp_8h_8h_8h(TyH);
- test_uminp_4h_4h_4h(TyH);
- test_uminp_16b_16b_16b(TyB);
- test_uminp_8b_8b_8b(TyB);
+ if (0) test_smaxp_4s_4s_4s(TyS);
+ if (0) test_smaxp_2s_2s_2s(TyS);
+ if (0) test_smaxp_8h_8h_8h(TyH);
+ if (0) test_smaxp_4h_4h_4h(TyH);
+ if (0) test_smaxp_16b_16b_16b(TyB);
+ if (0) test_smaxp_8b_8b_8b(TyB);
+ if (0) test_umaxp_4s_4s_4s(TyS);
+ if (0) test_umaxp_2s_2s_2s(TyS);
+ if (0) test_umaxp_8h_8h_8h(TyH);
+ if (0) test_umaxp_4h_4h_4h(TyH);
+ if (0) test_umaxp_16b_16b_16b(TyB);
+ if (0) test_umaxp_8b_8b_8b(TyB);
+ if (0) test_sminp_4s_4s_4s(TyS);
+ if (0) test_sminp_2s_2s_2s(TyS);
+ if (0) test_sminp_8h_8h_8h(TyH);
+ if (0) test_sminp_4h_4h_4h(TyH);
+ if (0) test_sminp_16b_16b_16b(TyB);
+ if (0) test_sminp_8b_8b_8b(TyB);
+ if (0) test_uminp_4s_4s_4s(TyS);
+ if (0) test_uminp_2s_2s_2s(TyS);
+ if (0) test_uminp_8h_8h_8h(TyH);
+ if (0) test_uminp_4h_4h_4h(TyH);
+ if (0) test_uminp_16b_16b_16b(TyB);
+ if (0) test_uminp_8b_8b_8b(TyB);
// smaxv s_4s,h_8h,h_4h,b_16b,b_8b
// umaxv s_4s,h_8h,h_4h,b_16b,b_8b
// sminv s_4s,h_8h,h_4h,b_16b,b_8b
// uminv s_4s,h_8h,h_4h,b_16b,b_8b
- test_SMAXV();
- test_UMAXV();
- test_SMINV();
- test_UMINV();
+ if (1) test_SMAXV();
+ if (1) test_UMAXV();
+ if (1) test_SMINV();
+ if (1) test_UMINV();
// smlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[]
// umlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[]
@@ -4080,54 +4080,54 @@
// umlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[]
// smull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[]
// umull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[]
- test_smlal_2d_2s_s0(TyS);
- test_smlal_2d_2s_s3(TyS);
- test_smlal2_2d_4s_s1(TyS);
- test_smlal2_2d_4s_s2(TyS);
- test_smlal_4s_4h_h0(TyH);
- test_smlal_4s_4h_h7(TyH);
- test_smlal2_4s_8h_h1(TyH);
- test_smlal2_4s_8h_h4(TyH);
- test_umlal_2d_2s_s0(TyS);
- test_umlal_2d_2s_s3(TyS);
- test_umlal2_2d_4s_s1(TyS);
- test_umlal2_2d_4s_s2(TyS);
- test_umlal_4s_4h_h0(TyH);
- test_umlal_4s_4h_h7(TyH);
- test_umlal2_4s_8h_h1(TyH);
- test_umlal2_4s_8h_h4(TyH);
- test_smlsl_2d_2s_s0(TyS);
- test_smlsl_2d_2s_s3(TyS);
- test_smlsl2_2d_4s_s1(TyS);
- test_smlsl2_2d_4s_s2(TyS);
- test_smlsl_4s_4h_h0(TyH);
- test_smlsl_4s_4h_h7(TyH);
- test_smlsl2_4s_8h_h1(TyH);
- test_smlsl2_4s_8h_h4(TyH);
- test_umlsl_2d_2s_s0(TyS);
- test_umlsl_2d_2s_s3(TyS);
- test_umlsl2_2d_4s_s1(TyS);
- test_umlsl2_2d_4s_s2(TyS);
- test_umlsl_4s_4h_h0(TyH);
- test_umlsl_4s_4h_h7(TyH);
- test_umlsl2_4s_8h_h1(TyH);
- test_umlsl2_4s_8h_h4(TyH);
- test_smull_2d_2s_s0(TyS);
- test_smull_2d_2s_s3(TyS);
- test_smull2_2d_4s_s1(TyS);
- test_smull2_2d_4s_s2(TyS);
- test_smull_4s_4h_h0(TyH);
- test_smull_4s_4h_h7(TyH);
- test_smull2_4s_8h_h1(TyH);
- test_smull2_4s_8h_h4(TyH);
- test_umull_2d_2s_s0(TyS);
- test_umull_2d_2s_s3(TyS);
- test_umull2_2d_4s_s1(TyS);
- test_umull2_2d_4s_s2(TyS);
- test_umull_4s_4h_h0(TyH);
- test_umull_4s_4h_h7(TyH);
- test_umull2_4s_8h_h1(TyH);
- test_umull2_4s_8h_h4(TyH);
+ if (0) test_smlal_2d_2s_s0(TyS);
+ if (0) test_smlal_2d_2s_s3(TyS);
+ if (0) test_smlal2_2d_4s_s1(TyS);
+ if (0) test_smlal2_2d_4s_s2(TyS);
+ if (0) test_smlal_4s_4h_h0(TyH);
+ if (0) test_smlal_4s_4h_h7(TyH);
+ if (0) test_smlal2_4s_8h_h1(TyH);
+ if (0) test_smlal2_4s_8h_h4(TyH);
+ if (0) test_umlal_2d_2s_s0(TyS);
+ if (0) test_umlal_2d_2s_s3(TyS);
+ if (0) test_umlal2_2d_4s_s1(TyS);
+ if (0) test_umlal2_2d_4s_s2(TyS);
+ if (0) test_umlal_4s_4h_h0(TyH);
+ if (0) test_umlal_4s_4h_h7(TyH);
+ if (0) test_umlal2_4s_8h_h1(TyH);
+ if (0) test_umlal2_4s_8h_h4(TyH);
+ if (0) test_smlsl_2d_2s_s0(TyS);
+ if (0) test_smlsl_2d_2s_s3(TyS);
+ if (0) test_smlsl2_2d_4s_s1(TyS);
+ if (0) test_smlsl2_2d_4s_s2(TyS);
+ if (0) test_smlsl_4s_4h_h0(TyH);
+ if (0) test_smlsl_4s_4h_h7(TyH);
+ if (0) test_smlsl2_4s_8h_h1(TyH);
+ if (0) test_smlsl2_4s_8h_h4(TyH);
+ if (0) test_umlsl_2d_2s_s0(TyS);
+ if (0) test_umlsl_2d_2s_s3(TyS);
+ if (0) test_umlsl2_2d_4s_s1(TyS);
+ if (0) test_umlsl2_2d_4s_s2(TyS);
+ if (0) test_umlsl_4s_4h_h0(TyH);
+ if (0) test_umlsl_4s_4h_h7(TyH);
+ if (0) test_umlsl2_4s_8h_h1(TyH);
+ if (0) test_umlsl2_4s_8h_h4(TyH);
+ if (0) test_smull_2d_2s_s0(TyS);
+ if (0) test_smull_2d_2s_s3(TyS);
+ if (0) test_smull2_2d_4s_s1(TyS);
+ if (0) test_smull2_2d_4s_s2(TyS);
+ if (0) test_smull_4s_4h_h0(TyH);
+ if (0) test_smull_4s_4h_h7(TyH);
+ if (0) test_smull2_4s_8h_h1(TyH);
+ if (0) test_smull2_4s_8h_h4(TyH);
+ if (0) test_umull_2d_2s_s0(TyS);
+ if (0) test_umull_2d_2s_s3(TyS);
+ if (0) test_umull2_2d_4s_s1(TyS);
+ if (0) test_umull2_2d_4s_s2(TyS);
+ if (0) test_umull_4s_4h_h0(TyH);
+ if (0) test_umull_4s_4h_h7(TyH);
+ if (0) test_umull2_4s_8h_h1(TyH);
+ if (0) test_umull2_4s_8h_h4(TyH);
// smlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// umlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
@@ -4135,317 +4135,317 @@
// umlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// smull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// umull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
- test_smlal_2d_2s_2s(TyS);
- test_smlal2_2d_4s_4s(TyS);
- test_smlal_4s_4h_4h(TyH);
- test_smlal2_4s_8h_8h(TyH);
- test_smlal_8h_8b_8b(TyB);
- test_smlal2_8h_16b_16b(TyB);
- test_umlal_2d_2s_2s(TyS);
- test_umlal2_2d_4s_4s(TyS);
- test_umlal_4s_4h_4h(TyH);
- test_umlal2_4s_8h_8h(TyH);
- test_umlal_8h_8b_8b(TyB);
- test_umlal2_8h_16b_16b(TyB);
- test_smlsl_2d_2s_2s(TyS);
- test_smlsl2_2d_4s_4s(TyS);
- test_smlsl_4s_4h_4h(TyH);
- test_smlsl2_4s_8h_8h(TyH);
- test_smlsl_8h_8b_8b(TyB);
- test_smlsl2_8h_16b_16b(TyB);
- test_umlsl_2d_2s_2s(TyS);
- test_umlsl2_2d_4s_4s(TyS);
- test_umlsl_4s_4h_4h(TyH);
- test_umlsl2_4s_8h_8h(TyH);
- test_umlsl_8h_8b_8b(TyB);
- test_umlsl2_8h_16b_16b(TyB);
- test_smull_2d_2...
[truncated message content] |
|
From: Ivo R. <iv...@iv...> - 2014-06-02 18:20:38
|
So after some investigation I would like to continue with this thread. 2014-06-01 4:12 GMT+02:00 John Reiser <jr...@bi...>: > Instead, perform the comparison only when the result can > possibly affect execution, which is at a system call. The dark side here is that execution is affected almost immediately, affecting almost *any* system call, not just few of them. That means not just system calls issued by the client program and intercepted in m_syswrap machinery - also syscalls used internally by valgrind for its housekeeping are affected. So instead of going this murky direction I was thinking whether at least one of the following could be feasible somehow: 1) The control flag "sc_sigblock" is set from just single place in libc. It is a small static function. This means it cannot be intercepted by a simple preload. Nonetheless, valgrind instruments this function before it runs it, like all other code. What would it take to recognize this function as currently instrumented, match the corresponding instruction block against some pattern, and replace the instruction block with something more suitable for our purposes? 2) The control flag is a part of thread control block shared between kernel and libc. Address of this control block is conveyed from kernel to libc as a result of syscall. This means valgrind has the possibility to change this address to whatever it likes. Would it be possible to return some "special" address in the sense that when libc tries to access this address (+ some offset), something happens? I have in mind for example accessing non-mapped page which would result in SIGSEGV being sent to valgrind. Valgrind then does the "right" thing (TM) :-) Now handling SIGSEGV for every access would be probably too heavyweight and I guess fixup from its handling would be too complex. Perhaps there exists another mechanism which I am not aware of? I. |
|
From: Philippe W. <phi...@sk...> - 2014-06-02 04:48:35
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora (7.5.1-37.fc18) Assembler: GNU assembler version 2.23.51.0.1-7.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.8.8-202.fc18.ppc64p7 ppc64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on gcc110 ( Fedora release 18 (Spherical Cow), ppc64 ) Started at 2014-06-01 20:00:11 PDT Ended at 2014-06-01 21:45:15 PDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 580 tests, 8 stderr failures, 3 stdout failures, 0 stderrB failures, 0 stdoutB failures, 2 post failures == memcheck/tests/linux/getregset (stdout) memcheck/tests/linux/getregset (stderr) memcheck/tests/ppc64/power_ISA2_05 (stdout) memcheck/tests/supp_unknown (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) helgrind/tests/pth_cond_destroy_busy (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.22s no: 1.6s ( 7.1x, -----) me: 2.9s (13.2x, -----) ca:17.8s (81.0x, -----) he: 1.7s ( 7.9x, -----) ca: 5.3s (24.2x, -----) dr: 1.7s ( 7.6x, -----) ma: 2.1s ( 9.6x, -----) bigcode1 valgrind-old:0.22s no: 1.6s ( 7.1x, 0.0%) me: 2.9s (13.2x, 0.0%) ca:17.9s (81.2x, -0.3%) he: 1.7s ( 7.9x, -0.6%) ca: 5.5s (25.2x, -4.1%) dr: 1.7s ( 7.8x, -3.0%) ma: 2.1s ( 9.6x, 0.0%) -- bigcode2 -- bigcode2 valgrind-new:0.23s no: 1.6s ( 6.7x, -----) me: 3.1s (13.7x, -----) ca:17.9s (78.0x, -----) he: 2.2s ( 9.6x, -----) ca: 5.8s (25.4x, -----) dr: 1.9s ( 8.3x, -----) ma: 2.1s ( 9.3x, -----) bigcode2 valgrind-old:0.23s no: 1.5s ( 6.7x, 1.3%) me: 3.1s (13.3x, 2.9%) ca:18.1s (78.9x, -1.1%) he: 2.1s ( 9.1x, 5.0%) ca: 5.4s (23.6x, 7.4%) dr: 1.8s ( 8.0x, 4.2%) ma: 2.1s ( 9.2x, 0.5%) -- bz2 -- bz2 valgrind-new:0.74s no: 4.7s ( 6.3x, -----) me:11.7s (15.8x, -----) ca:25.8s (34.8x, -----) he:14.6s (19.8x, -----) ca:24.5s (33.1x, -----) dr:19.4s (26.1x, -----) ma: 4.6s ( 6.2x, -----) bz2 valgrind-old:0.74s no: 4.6s ( 6.2x, 2.6%) me:11.8s (15.9x, -1.0%) ca:25.8s (34.8x, -0.1%) he:14.7s (19.9x, -0.6%) ca:24.9s (33.7x, -1.8%) dr:19.4s (26.3x, -0.5%) ma: 4.7s ( 6.3x, -2.0%) -- fbench -- fbench valgrind-new:0.34s no: 2.2s ( 6.4x, -----) me: 5.2s (15.3x, -----) ca: 8.4s (24.8x, -----) he: 5.2s (15.4x, -----) ca: 7.5s (22.2x, -----) dr: 5.0s (14.6x, -----) ma: 2.1s ( 6.3x, -----) fbench valgrind-old:0.34s no: 2.2s ( 6.4x, -0.5%) me: 5.2s (15.2x, 0.2%) ca: 8.4s (24.8x, -0.2%) he: 5.3s (15.6x, -1.0%) ca: 7.5s (22.2x, 0.0%) dr: 5.0s (14.6x, 0.4%) ma: 2.2s ( 6.6x, -4.7%) -- ffbench -- ffbench valgrind-new:0.44s no: 1.3s ( 3.0x, -----) me: 2.5s ( 5.6x, -----) ca: 2.6s ( 5.9x, -----) he: 6.9s (15.7x, -----) ca: 7.1s (16.2x, -----) dr: 5.0s (11.4x, -----) ma: 1.2s ( 2.8x, -----) ffbench valgrind-old:0.44s no: 1.4s ( 3.2x, -6.8%) me: 2.6s ( 5.9x, -6.5%) ca: 2.5s ( 5.6x, 4.6%) he: 7.0s (15.9x, -1.3%) ca: 7.0s (16.0x, 1.4%) dr: 5.0s (11.4x, -0.2%) ma: 1.0s ( 2.3x, 18.4%) -- heap -- heap valgrind-new:0.41s no: 2.4s ( 5.9x, -----) me:10.9s (26.6x, -----) ca:13.3s (32.4x, -----) he:11.8s (28.9x, -----) ca:12.2s (29.7x, -----) dr: 8.3s (20.1x, -----) ma: 8.7s (21.2x, -----) heap valgrind-old:0.41s no: 2.4s ( 5.8x, 0.4%) me: 9.5s (23.1x, 13.1%) ca:13.1s (32.0x, 1.2%) he:11.8s (28.9x, 0.1%) ca:12.2s (29.6x, 0.1%) dr: 8.1s (19.9x, 1.5%) ma: 8.6s (20.9x, 1.4%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.42s no: 2.6s ( 6.1x, -----) me:13.5s (32.2x, -----) ca:14.2s (33.7x, -----) he:13.3s (31.7x, -----) ca:13.1s (31.2x, -----) dr: 9.0s (21.3x, -----) ma: 8.8s (21.0x, -----) heap_pdb4 valgrind-old:0.42s no: 2.7s ( 6.4x, -4.3%) me:13.6s (32.4x, -0.7%) ca:14.1s (33.7x, 0.1%) he:13.1s (31.1x, 1.7%) ca:13.1s (31.2x, -0.2%) dr: 9.1s (21.5x, -1.0%) ma: 8.7s (20.6x, 1.8%) -- many-loss-records -- many-loss-records valgrind-new:0.03s no: 0.5s (17.7x, -----) me: 2.2s (72.3x, -----) ca: 1.9s (62.7x, -----) he: 1.9s (61.7x, -----) ca: 2.4s (81.0x, -----) dr: 1.6s (53.3x, -----) ma: 1.6s (53.0x, -----) many-loss-records valgrind-old:0.03s no: 0.5s (17.7x, 0.0%) me: 2.1s (70.7x, 2.3%) ca: 1.9s (62.7x, 0.0%) he: 1.8s (61.0x, 1.1%) ca: 1.9s (61.7x, 23.9%) dr: 1.6s (51.7x, 3.1%) ma: 1.6s (52.3x, 1.3%) -- many-xpts -- many-xpts valgrind-new:0.07s no: 0.7s (10.6x, -----) me: 3.3s (47.4x, -----) ca: 4.8s (67.9x, -----) he: 4.9s (69.9x, -----) ca: 2.9s (41.4x, -----) dr: 2.3s (32.3x, -----) ma: 2.3s (32.3x, -----) many-xpts valgrind-old:0.07s no: 0.7s (10.6x, 0.0%) me: 3.3s (47.6x, -0.3%) ca: 4.7s (67.1x, 1.1%) he: 4.8s (69.0x, 1.2%) ca: 2.9s (41.1x, 0.7%) dr: 2.2s (32.1x, 0.4%) ma: 2.2s (32.1x, 0.4%) -- sarp -- sarp valgrind-new:0.02s no: 0.4s (20.0x, -----) me: 3.0s (150.5x, -----) ca: 3.0s (152.5x, -----) he:11.3s (564.5x, -----) ca: 1.7s (86.5x, -----) dr: 1.1s (53.5x, -----) ma: 0.4s (21.0x, -----) sarp valgrind-old:0.02s no: 0.4s (21.0x, -5.0%) me: 3.1s (154.5x, -2.7%) ca: 3.0s (148.5x, 2.6%) he:11.2s (559.0x, 1.0%) ca: 1.9s (97.0x,-12.1%) dr: 1.1s (54.5x, -1.9%) ma: 0.4s (22.0x, -4.8%) -- tinycc -- tinycc valgrind-new:0.27s no: 3.0s (11.0x, -----) me:13.7s (50.7x, -----) ca:17.3s (64.1x, -----) he:19.0s (70.3x, -----) ca:15.6s (57.9x, -----) dr:12.2s (45.2x, -----) ma: 3.8s (14.1x, -----) tinycc valgrind-old:0.27s no: 3.0s (11.1x, -1.0%) me:13.8s (51.0x, -0.6%) ca:17.2s (63.9x, 0.3%) he:18.9s (70.1x, 0.2%) ca:15.6s (57.9x, 0.1%) dr:12.1s (44.9x, 0.6%) ma: 3.8s (14.1x, 0.5%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 55m4.375s user 53m57.035s sys 0m21.008s |
|
From: Christian B. <bor...@de...> - 2014-06-02 04:13:00
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.5.1-0.7.29) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.23.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.101-0.21-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP3 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP3 gcc 4.3.4 on z196 (s390x) ) Started at 2014-06-02 03:45:02 CEST Ended at 2014-06-02 06:12:48 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 647 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/pth_cond_destroy_busy (stderr) helgrind/tests/tc20_verifywrap (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.22s no: 4.4s (19.8x, -----) me: 6.9s (31.4x, -----) ca:26.5s (120.3x, -----) he: 5.1s (23.0x, -----) ca: 9.1s (41.5x, -----) dr: 5.3s (24.3x, -----) ma: 4.6s (20.7x, -----) bigcode1 valgrind-old:0.22s no: 4.4s (19.8x, 0.0%) me: 6.9s (31.3x, 0.1%) ca:26.5s (120.3x, 0.0%) he: 5.1s (23.0x, 0.0%) ca: 9.2s (41.6x, -0.1%) dr: 5.3s (24.3x, 0.0%) ma: 4.6s (20.7x, 0.0%) -- bigcode2 -- bigcode2 valgrind-new:0.24s no: 7.3s (30.5x, -----) me:13.8s (57.6x, -----) ca:39.8s (166.0x, -----) he:10.1s (42.0x, -----) ca:14.3s (59.6x, -----) dr: 9.5s (39.5x, -----) ma: 8.1s (33.5x, -----) bigcode2 valgrind-old:0.24s no: 7.3s (30.6x, -0.4%) me:13.9s (58.0x, -0.8%) ca:40.0s (166.7x, -0.4%) he:10.1s (42.0x, 0.0%) ca:14.3s (59.5x, 0.3%) dr: 9.4s (39.2x, 0.5%) ma: 8.0s (33.3x, 0.7%) -- bz2 -- bz2 valgrind-new:0.70s no: 5.1s ( 7.3x, -----) me:12.7s (18.2x, -----) ca:30.6s (43.7x, -----) he:19.6s (28.0x, -----) ca:34.3s (49.0x, -----) dr:29.1s (41.5x, -----) ma: 3.9s ( 5.6x, -----) bz2 valgrind-old:0.70s no: 5.2s ( 7.4x, -1.4%) me:12.8s (18.2x, -0.2%) ca:30.7s (43.8x, -0.3%) he:19.7s (28.1x, -0.3%) ca:34.3s (49.0x, 0.0%) dr:29.0s (41.5x, 0.1%) ma: 3.9s ( 5.6x, 0.8%) -- fbench -- fbench valgrind-new:0.40s no: 1.6s ( 4.0x, -----) me: 4.2s (10.5x, -----) ca: 9.3s (23.3x, -----) he: 6.2s (15.6x, -----) ca: 7.2s (18.0x, -----) dr: 5.6s (13.9x, -----) ma: 1.7s ( 4.3x, -----) fbench valgrind-old:0.40s no: 1.6s ( 4.0x, -0.6%) me: 4.2s (10.5x, 0.0%) ca: 9.3s (23.3x, -0.2%) he: 6.3s (15.6x, -0.2%) ca: 7.2s (18.0x, -0.1%) dr: 5.6s (14.0x, -0.4%) ma: 1.7s ( 4.3x, -0.6%) -- ffbench -- ffbench valgrind-new:0.21s no: 1.1s ( 5.1x, -----) me: 3.0s (14.2x, -----) ca: 3.0s (14.5x, -----) he:44.1s (210.0x, -----) ca: 9.6s (45.9x, -----) dr: 6.9s (32.8x, -----) ma: 1.0s ( 4.6x, -----) ffbench valgrind-old:0.21s no: 1.1s ( 5.0x, 1.9%) me: 3.0s (14.1x, 0.7%) ca: 3.0s (14.4x, 1.0%) he:44.2s (210.4x, -0.2%) ca: 9.6s (45.9x, 0.0%) dr: 6.9s (32.9x, -0.1%) ma: 0.9s ( 4.5x, 1.0%) -- heap -- heap valgrind-new:0.23s no: 1.9s ( 8.1x, -----) me: 8.7s (37.7x, -----) ca:13.2s (57.2x, -----) he:12.8s (55.9x, -----) ca:11.2s (48.7x, -----) dr: 7.7s (33.4x, -----) ma: 7.9s (34.3x, -----) heap valgrind-old:0.23s no: 1.9s ( 8.1x, 0.0%) me: 8.7s (37.7x, -0.2%) ca:13.1s (57.0x, 0.3%) he:12.9s (56.0x, -0.2%) ca:11.2s (48.7x, 0.2%) dr: 7.7s (33.5x, -0.4%) ma: 7.9s (34.3x, 0.1%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.22s no: 2.0s ( 9.3x, -----) me:12.9s (58.8x, -----) ca:14.3s (65.0x, -----) he:14.3s (65.0x, -----) ca:12.4s (56.5x, -----) dr: 8.8s (40.0x, -----) ma: 8.1s (37.0x, -----) heap_pdb4 valgrind-old:0.22s no: 2.1s ( 9.5x, -2.4%) me:12.8s (58.2x, 0.9%) ca:14.3s (65.2x, -0.3%) he:14.1s (64.3x, 1.2%) ca:12.4s (56.2x, 0.5%) dr: 8.7s (39.6x, 1.1%) ma: 8.0s (36.5x, 1.1%) -- many-loss-records -- many-loss-records valgrind-new:0.02s no: 0.5s (24.0x, -----) me: 2.1s (104.0x, -----) ca: 1.9s (96.5x, -----) he: 2.2s (108.0x, -----) ca: 1.9s (95.5x, -----) dr: 1.7s (87.0x, -----) ma: 1.7s (83.0x, -----) many-loss-records valgrind-old:0.02s no: 0.5s (24.0x, 0.0%) me: 2.1s (104.0x, 0.0%) ca: 1.9s (97.0x, -0.5%) he: 2.2s (108.0x, 0.0%) ca: 1.9s (95.5x, 0.0%) dr: 1.7s (87.0x, 0.0%) ma: 1.7s (83.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.06s no: 0.6s (10.7x, -----) me: 3.1s (52.2x, -----) ca:376.8s (6279.8x, -----) he: 6.5s (108.7x, -----) ca: 2.8s (46.3x, -----) dr: 2.5s (42.0x, -----) ma: 2.6s (43.8x, -----) many-xpts valgrind-old:0.06s no: 0.6s (10.7x, 0.0%) me: 3.1s (52.0x, 0.3%) ca:371.4s (6189.5x, 1.4%) he: 6.5s (108.7x, 0.0%) ca: 2.8s (46.3x, 0.0%) dr: 2.5s (42.0x, 0.0%) ma: 2.6s (43.8x, 0.0%) -- sarp -- sarp valgrind-new:0.03s no: 0.6s (19.0x, -----) me: 3.4s (114.0x, -----) ca: 3.1s (104.3x, -----) he:16.8s (559.3x, -----) ca: 2.0s (68.3x, -----) dr: 1.5s (49.0x, -----) ma: 0.5s (16.0x, -----) sarp valgrind-old:0.03s no: 0.6s (19.3x, -1.8%) me: 3.4s (114.0x, 0.0%) ca: 3.1s (104.3x, 0.0%) he:16.5s (548.7x, 1.9%) ca: 2.0s (68.3x, 0.0%) dr: 1.5s (49.0x, 0.0%) ma: 0.5s (16.0x, 0.0%) -- tinycc -- tinycc valgrind-new:0.22s no: 2.8s (12.9x, -----) me:14.5s (65.8x, -----) ca:30.0s (136.5x, -----) he:27.8s (126.1x, -----) ca:21.4s (97.4x, -----) dr:20.4s (92.8x, -----) ma: 4.0s (18.0x, -----) tinycc valgrind-old:0.22s no: 2.8s (12.9x, 0.0%) me:14.5s (65.9x, -0.1%) ca:30.1s (136.9x, -0.3%) he:28.0s (127.3x, -0.9%) ca:21.4s (97.5x, -0.1%) dr:20.4s (92.8x, -0.0%) ma: 4.0s (18.0x, 0.0%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 110m58.012s user 109m52.021s sys 0m53.653s |
|
From: Tom H. <to...@co...> - 2014-06-02 03:27:28
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) GDB: Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2014-06-02 03:53:56 BST Ended at 2014-06-02 04:27:11 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 650 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/amd64/insn-pcmpistri (stderr) memcheck/tests/err_disable4 (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Rich C. <rc...@wi...> - 2014-06-02 03:01:30
|
valgrind revision: 13992
VEX revision: 2864
C compiler: gcc (SUSE Linux) 4.7.2 20130108 [gcc-4_7-branch revision 195012]
GDB: GNU gdb (GDB) SUSE (7.5.1-2.1.1)
Assembler: GNU assembler (GNU Binutils; openSUSE 12.3) 2.23.1
C library: GNU C Library (GNU libc) stable release version 2.17 (git c758a6861537)
uname -mrs: Linux 3.7.9-1.1-desktop x86_64
Vendor version: Welcome to openSUSE 12.3 "Dartmouth" Beta 1 - Kernel %r (%t).
Nightly build on ultra ( gcc (SUSE Linux) 4.7.2 20130108 [gcc-4_7-branch revision 195012] Linux 3.7.9-1.1-desktop x86_64 )
Started at 2014-06-01 21:30:01 CDT
Ended at 2014-06-01 22:01:19 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 673 tests, 0 stderr failures, 0 stdout failures, 2 stderrB failures, 0 stdoutB failures, 0 post failures ==
gdbserver_tests/hginfo (stderrB)
gdbserver_tests/mssnapshot (stderrB)
=================================================
./valgrind-new/gdbserver_tests/hginfo.stderrB.diff
=================================================
--- hginfo.stderrB.exp 2014-06-01 21:46:16.324366177 -0500
+++ hginfo.stderrB.out 2014-06-01 21:49:40.430655910 -0500
@@ -1,5 +1,11 @@
relaying data between gdb and process ....
+Missing separate debuginfo for /lib64/ld-linux-x86-64.so.2
+Try: zypper install -C "debuginfo(build-id)=ecb8ef1a6904a2a3ec60a527f415f520c8636158"
vgdb-error value changed from 0 to 999999
+Missing separate debuginfo for /lib64/libpthread.so.0
+Try: zypper install -C "debuginfo(build-id)=ef5f5dbcb2398c608fef7884e1bfb65be3b5f0ef"
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=bd1473e8e6a4c10a14731b5be4b35b4e87db2af7"
Lock ga 0x........ {
Address 0x........ is 0 bytes inside data symbol "mx"
kind mbRec
=================================================
./valgrind-new/gdbserver_tests/mssnapshot.stderrB.diff
=================================================
--- mssnapshot.stderrB.exp 2014-06-01 21:46:16.328366065 -0500
+++ mssnapshot.stderrB.out 2014-06-01 21:50:13.169739926 -0500
@@ -1,5 +1,11 @@
relaying data between gdb and process ....
+Missing separate debuginfo for /lib64/ld-linux-x86-64.so.2
+Try: zypper install -C "debuginfo(build-id)=ecb8ef1a6904a2a3ec60a527f415f520c8636158"
vgdb-error value changed from 0 to 999999
+Missing separate debuginfo for /lib64/libpthread.so.0
+Try: zypper install -C "debuginfo(build-id)=ef5f5dbcb2398c608fef7884e1bfb65be3b5f0ef"
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=bd1473e8e6a4c10a14731b5be4b35b4e87db2af7"
general valgrind monitor commands:
help [debug] : monitor command help. With debug: + debugging commands
v.wait [<ms>] : sleep <ms> (default 0) then continue
=================================================
./valgrind-old/gdbserver_tests/hginfo.stderrB.diff
=================================================
--- hginfo.stderrB.exp 2014-06-01 21:30:41.089562426 -0500
+++ hginfo.stderrB.out 2014-06-01 21:34:21.139377088 -0500
@@ -1,5 +1,11 @@
relaying data between gdb and process ....
+Missing separate debuginfo for /lib64/ld-linux-x86-64.so.2
+Try: zypper install -C "debuginfo(build-id)=ecb8ef1a6904a2a3ec60a527f415f520c8636158"
vgdb-error value changed from 0 to 999999
+Missing separate debuginfo for /lib64/libpthread.so.0
+Try: zypper install -C "debuginfo(build-id)=ef5f5dbcb2398c608fef7884e1bfb65be3b5f0ef"
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=bd1473e8e6a4c10a14731b5be4b35b4e87db2af7"
Lock ga 0x........ {
Address 0x........ is 0 bytes inside data symbol "mx"
kind mbRec
=================================================
./valgrind-old/gdbserver_tests/mssnapshot.stderrB.diff
=================================================
--- mssnapshot.stderrB.exp 2014-06-01 21:30:41.092562341 -0500
+++ mssnapshot.stderrB.out 2014-06-01 21:34:52.818490626 -0500
@@ -1,5 +1,11 @@
relaying data between gdb and process ....
+Missing separate debuginfo for /lib64/ld-linux-x86-64.so.2
+Try: zypper install -C "debuginfo(build-id)=ecb8ef1a6904a2a3ec60a527f415f520c8636158"
vgdb-error value changed from 0 to 999999
+Missing separate debuginfo for /lib64/libpthread.so.0
+Try: zypper install -C "debuginfo(build-id)=ef5f5dbcb2398c608fef7884e1bfb65be3b5f0ef"
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=bd1473e8e6a4c10a14731b5be4b35b4e87db2af7"
general valgrind monitor commands:
help [debug] : monitor command help. With debug: + debugging commands
v.wait [<ms>] : sleep <ms> (default 0) then continue
|
|
From: Tom H. <to...@co...> - 2014-06-02 02:51:11
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2014-06-02 03:15:09 BST Ended at 2014-06-02 03:50:51 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 1 stderr failure, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == gdbserver_tests/hginfo (stderrB) memcheck/tests/err_disable4 (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-06-02 03:33:07.012540733 +0100 --- new.short 2014-06-02 03:50:51.686701914 +0100 *************** *** 8,10 **** ! == 680 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) --- 8,11 ---- ! == 680 tests, 1 stderr failure, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == ! gdbserver_tests/hginfo (stderrB) memcheck/tests/err_disable4 (stderr) |
|
From: Tom H. <to...@co...> - 2014-06-02 02:41:28
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.50.20110722-16.fc16) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2014-06-02 03:03:36 BST Ended at 2014-06-02 03:41:16 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 1 stderr failure, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == gdbserver_tests/hginfo (stderrB) memcheck/tests/err_disable4 (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2014-06-02 03:23:18.895001808 +0100 --- new.short 2014-06-02 03:41:16.677950551 +0100 *************** *** 8,11 **** ! == 680 tests, 1 stderr failure, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == ! gdbserver_tests/hginfo (stderrB) memcheck/tests/err_disable4 (stderr) --- 8,10 ---- ! == 680 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) |
|
From: Tom H. <to...@co...> - 2014-06-02 02:35:05
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2014-06-02 02:54:22 BST Ended at 2014-06-02 03:34:53 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 5 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/err_disable4 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
|
From: Rich C. <rc...@wi...> - 2014-06-02 02:29:27
|
valgrind revision: 13992
VEX revision: 2864
C compiler: gcc (SUSE Linux) 4.8.1 20130909 [gcc-4_8-branch revision 202388]
GDB: GNU gdb (GDB; openSUSE Factory) 7.6.50.20130731-cvs
Assembler: GNU assembler (GNU Binutils; openSUSE Factory) 2.23.2
C library: GNU C Library (GNU libc) stable release version 2.18 (git )
uname -mrs: Linux 3.11.4-3-desktop x86_64
Vendor version: Welcome to openSUSE 13.1 "Bottle" Beta 1 - Kernel %r (%t).
Nightly build on rodan ( Linux 3.11.4-3-desktop x86_64 )
Started at 2014-06-01 19:22:01 CDT
Ended at 2014-06-01 21:29:22 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 594 tests, 5 stderr failures, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures ==
gdbserver_tests/hginfo (stderrB)
memcheck/tests/err_disable3 (stderr)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/threadname (stderr)
memcheck/tests/threadname_xml (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
=================================================
./valgrind-new/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-06-01 20:27:05.338238181 -0500
+++ hackedbz2.stderr.out 2014-06-01 21:28:04.053680937 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-new/gdbserver_tests/hginfo.stderrB.diff
=================================================
--- hginfo.stderrB.exp 2014-06-01 20:27:04.329226476 -0500
+++ hginfo.stderrB.out 2014-06-01 20:41:10.437041710 -0500
@@ -13,6 +13,6 @@
Lock ga 0x........ {
Address 0x........ is 0 bytes inside data symbol "mx"
kind mbRec
- { W1:thread #x tid 3 }
+ { W1:thread #x tid 2 }
}
Address 0x........ is 0 bytes inside an unallocated block of size 1,008 in arena "client"
=================================================
./valgrind-new/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-06-01 20:27:06.310249457 -0500
+++ err_disable3.stderr.out 2014-06-01 20:45:28.856039488 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-new/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-06-01 20:27:07.106258691 -0500
+++ err_disable4.stderr.out 2014-06-01 20:45:33.081088500 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-new/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-06-01 20:27:07.128258946 -0500
+++ threadname.stderr.out 2014-06-01 20:51:26.556188971 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-new/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-06-01 20:27:06.606252891 -0500
+++ threadname_xml.stderr.out 2014-06-01 20:51:28.605212741 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-old/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-06-01 19:22:22.574196360 -0500
+++ hackedbz2.stderr.out 2014-06-01 20:24:57.999760997 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-old/gdbserver_tests/hginfo.stderrB.diff
=================================================
--- hginfo.stderrB.exp 2014-06-01 19:23:28.816964806 -0500
+++ hginfo.stderrB.out 2014-06-01 19:37:57.018036332 -0500
@@ -13,6 +13,6 @@
Lock ga 0x........ {
Address 0x........ is 0 bytes inside data symbol "mx"
kind mbRec
- { W1:thread #x tid 3 }
+ { W1:thread #x tid 2 }
}
Address 0x........ is 0 bytes inside an unallocated block of size 1,008 in arena "client"
=================================================
./valgrind-old/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-06-01 19:23:38.298074791 -0500
+++ err_disable3.stderr.out 2014-06-01 19:42:17.713060512 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-old/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-06-01 19:23:41.344110127 -0500
+++ err_disable4.stderr.out 2014-06-01 19:42:26.313160277 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-old/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-06-01 19:23:38.726079757 -0500
+++ threadname.stderr.out 2014-06-01 19:48:21.427279712 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-old/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-06-01 19:23:41.376110498 -0500
+++ threadname_xml.stderr.out 2014-06-01 19:48:23.541304236 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
|
|
From: Tom H. <to...@co...> - 2014-06-02 02:25:16
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora 7.5.1-42.fc18 Assembler: GNU assembler version 2.23.51.0.1-10.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2014-06-02 02:43:33 BST Ended at 2014-06-02 03:25:02 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
|
From: Tom H. <to...@co...> - 2014-06-02 02:12:32
|
valgrind revision: 13992 VEX revision: 2864 C compiler: gcc (GCC) 4.8.2 20131212 (Red Hat 4.8.2-7) GDB: GNU gdb (GDB) Fedora 7.6.1-46.fc19 Assembler: GNU assembler version 2.23.52.0.1-9.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2014-06-02 02:31:50 BST Ended at 2014-06-02 03:12:15 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 680 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) |
|
From: <sv...@va...> - 2014-06-01 17:46:28
|
Author: sewardj
Date: Sun Jun 1 17:46:18 2014
New Revision: 13992
Log:
Update.
Modified:
trunk/docs/internals/3_9_BUGSTATUS.txt
Modified: trunk/docs/internals/3_9_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_9_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_9_BUGSTATUS.txt Sun Jun 1 17:46:18 2014
@@ -23,6 +23,15 @@
Probably WONTFIX or CANTFIX
== 328423
+=== VEX/arm64 ==========================================================
+
+335262 arm64: movi 8bit version is not supported
+335263 arm64: dmb instruction is not implemented
+335440 arm64: ld1 (single structure) is not implemented
+335496 arm64: sbc/abc instructions are not implemented
+335554 arm64: unhanded instruction: abs
+335564 arm64: unhandled instruction fcvtpu Xn, Sn
+
=== VEX/x86 ============================================================
333625 Program under valgrind calculates complex exp() wrongly
@@ -177,3 +186,20 @@
333628 Out of tree build (is fixed, but needs to land)
335143 Capabilities not supported
197259 (wine) Unsupported arch_prtctl option
+
+---
+
+334665 vex x86->IR: unhandled instruction bytes: 0xC4 0xE2 0x73 0xF7
+334802 valgrind does not always explain why a given option is bad
+334834 PPC64 Little Endian support, patch 2
+334836 PPC64 Little Endian support, patch 3 testcase fixes
+335034 Unhandled ioctl: HCIGETDEVLIST
+335353 expected output of exp-sgcheck/tests/hackedbz2 mismatch with gcc 4.8.1
+335441 unhandled ioctl 0x8905 (SIOCATMARK) when running wine under valgrind (patch)
+249435 Analyzing wine programs with callgrind triggers a crash (NEEDS CLOSE)
+335563 wine's kernel32/thread test fails under valgrind
+335618 arm(thumb): unhanded instruction: mov.w rN, pc/sp
+335629 Compile error
+
+31 May 2014
+
|
|
From: Julian S. <js...@ac...> - 2014-06-01 17:20:26
|
On 05/23/2014 09:15 AM, Schuele, Tobias wrote: > Hi, we would like to employ Valgrind for dynamic instrumentation of ARM binaries on Linux. > Since the search function at Gmane seems not to work, I wonder if somebody can give > me information about the current status of ARM support. According to the website, it is > "medium" resp. "fairly complete" for 3.7.X. Is there still anything missing in 3.9.0 and > if so, what? Thank you very much in advance! I assume you are referring to 32-bit ARM. If so, there is almost complete instruction set coverage for the ARMv7 instruction set, including SIMD (NEON) and the media-V6 instructions. I routinely run large ARM/Thumb applications on it. J |
|
From: John R.
|
>> The most likely way to implement such a feature in valgrind >> would be to have a Solaris-specific implementation of every system call >> that is affected by the special control word. If <stdlib.h> "read()" >> were affected then there would be a Solaris-specific version of >> "Int VG_(read)" [currently in coregrind/m_libcfile.c] which would >> implement the feature: test the word, call sigprocmask() if necessary, >> etc. That's the more subtle side, the one for valgrind internal uses. The obvious side is the stuff in coregrind/m_syswrap/priv_syswrap-generic.h and so on, which handles tracking the effects of system calls from emulated user code. |
|
From: Ivo R. <iv...@iv...> - 2014-06-01 03:18:39
|
>> I would like to ask what are the possibilities of intercepting a write to a memory address >> under valgrind, regardless of a tool currently used. > > It would be possible, but unlikely. Every store to memory > would have to compare against the address. That's too slow. Thank you for confirming my suspicion. > Instead, perform the comparison only when the result can > possibly affect execution, which is at a system call. That's what I had in my sleeve provided the write interception proves unfeasible. >> ---------------------- >> Motivation is the following: Solaris contains a special >> libc/kernel synchronization mechanism. > > Does this feature of Solaris has a name? Please tell us the name, > and include a link to the documentation. It is called 'schedctl' and you can find the header file here: http://src.illumos.org/source/xref/illumos-gate/usr/src/uts/common/sys/schedctl.h#70 Not much documentation is available, though. The concept is briefly touched here: https://blogs.oracle.com/dave/entry/inverted_schedctl_usage_in_the but it mainly discusses 'sc_preemptctl' flag, not 'sc_sigblock' flag. > Either the address (or an algorithm to compute it) is known in advance > before each thread starts, or the thread performs a system call to > learn the address that the OS has chosen. Please document. The latter - OS provides an address of sc_shared_t (after a corresponding syscall). That piece of memory is then shared between kernel and libc for a particular thread. > One likely possibility is that the address is a fixed offset > into the thread control block, where libc and the kernel > have agreed on the location and layout of that block. Exactly. > The most likely way to implement such a feature in valgrind > would be to have a Solaris-specific implementation of every system call > that is affected by the special control word. If <stdlib.h> "read()" > were affected then there would be a Solaris-specific version of > "Int VG_(read)" [currently in coregrind/m_libcfile.c] which would > implement the feature: test the word, call sigprocmask() if necessary, > etc. It might be necessary to have a Solaris-specific implementation > of EVERY system call where valgrind uses sigprocmask, if valgrind's > current internal use of sigprocmask is not compatible with the semantics > of the Solaris control word. Will investigate. Thank you for responding, I. |
|
From: John R.
|
On 05/31/2014 11:58 AM, Ivo Raisr wrote: > I would like to ask what are the possibilities > of intercepting a write to a memory address > under valgrind, regardless of a tool currently used. It would be possible, but unlikely. Every store to memory would have to compare against the address. That's too slow. Instead, perform the comparison only when the result can possibly affect execution, which is at a system call. > <<snip>> > ---------------------- > Motivation is the following: Solaris contains a special > libc/kernel synchronization mechanism. Does this feature of Solaris has a name? Please tell us the name, and include a link to the documentation. > A piece of per-thread memory is shared between libc and kernel. Either the address (or an algorithm to compute it) is known in advance before each thread starts, or the thread performs a system call to learn the address that the OS has chosen. Please document. One likely possibility is that the address is a fixed offset into the thread control block, where libc and the kernel have agreed on the location and layout of that block. > It is used for various purposes, one is for 'block-all-signals' > flag. Libc prior to certain synchronization operations writes to > that memory indicating to the kernel that all signals should > be blocked. Eventually a regular syscall is invoked; > kernel detects the flag, disables all signals and clears the > flag. The problem here is that setting this flag by libc > bypasses Valgrind's signal machinery which gets confused > by the fact that all signals are disabled in kernel without > knowing it (which would be no problem should this went > through regular syscall sigprocmask & friends). The most likely way to implement such a feature in valgrind would be to have a Solaris-specific implementation of every system call that is affected by the special control word. If <stdlib.h> "read()" were affected then there would be a Solaris-specific version of "Int VG_(read)" [currently in coregrind/m_libcfile.c] which would implement the feature: test the word, call sigprocmask() if necessary, etc. It might be necessary to have a Solaris-specific implementation of EVERY system call where valgrind uses sigprocmask, if valgrind's current internal use of sigprocmask is not compatible with the semantics of the Solaris control word. |