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From: <sv...@va...> - 2014-05-13 20:42:13
|
Author: mjw
Date: Tue May 13 20:42:04 2014
New Revision: 13961
Log:
Add send_signal to gdbserver_tests/Makefile.am (dist_noinst_SCRIPTS).
If the send_signal script is missing the nlvgdbsigqueue test would hang.
Modified:
trunk/gdbserver_tests/Makefile.am
Modified: trunk/gdbserver_tests/Makefile.am
==============================================================================
--- trunk/gdbserver_tests/Makefile.am (original)
+++ trunk/gdbserver_tests/Makefile.am Tue May 13 20:42:04 2014
@@ -4,7 +4,8 @@
dist_noinst_SCRIPTS = \
invoker simulate_control_c make_local_links \
filter_gdb filter_make_empty \
- filter_memcheck_monitor filter_stderr filter_vgdb
+ filter_memcheck_monitor filter_stderr filter_vgdb \
+ send_signal
EXTRA_DIST = \
README_DEVELOPERS \
|
|
From: <sv...@va...> - 2014-05-13 16:16:03
|
Author: sewardj
Date: Tue May 13 16:15:56 2014
New Revision: 13960
Log:
Followup to r13958: add reg-trash lists to inline assembly in
TESTINSTPCMISALIGNED TESTINSTPCMISALIGNED_DWORDOUT
TESTINSTPCMISALIGNED_2OUT and nice up the the indentation a bit.
Modified:
trunk/none/tests/arm/v6intThumb.c
Modified: trunk/none/tests/arm/v6intThumb.c
==============================================================================
--- trunk/none/tests/arm/v6intThumb.c (original)
+++ trunk/none/tests/arm/v6intThumb.c Tue May 13 16:15:56 2014
@@ -224,29 +224,30 @@
unsigned int out; \
unsigned int cpsr; \
__asm__ volatile(\
- ".align 4;" \
- "msr cpsr_f, %2;" \
- "mov " #RD ", #0;" \
- ".align 2;" \
- ".thumb;" \
- ".syntax unified;" \
- "nop;" \
- instruction ";" \
- "b .Lend" #label ";" \
- ".align 4;" \
- #label ": " \
- ".word 0x8191881b;" \
- ".word 0x18fe9c93;" \
- ".word 0x00000000;" \
- ".word 0x00000000;" \
- ".Lend" #label ":" \
- "mov %0, " #RD ";" \
- "mrs %1,cpsr;" \
- : "=&r" (out), "=&r" (cpsr) \
- : "r" (gen_cvin(cvin)) \
- ); \
- printf("%s :: rd 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
- instruction, out, \
+ ".align 4;" \
+ "msr cpsr_f, %2;" \
+ "mov " #RD ", #0;" \
+ ".align 2;" \
+ ".thumb;" \
+ ".syntax unified;" \
+ "nop;" \
+ instruction ";" \
+ "b .Lend" #label ";" \
+ ".align 4;" \
+ #label ": " \
+ ".word 0x8191881b;" \
+ ".word 0x18fe9c93;" \
+ ".word 0x00000000;" \
+ ".word 0x00000000;" \
+ ".Lend" #label ":" \
+ "mov %0, " #RD ";" \
+ "mrs %1, cpsr;" \
+ : "=&r" (out), "=&r" (cpsr) \
+ : "r" (gen_cvin(cvin)) \
+ : #RD, "cc", "memory" \
+ ); \
+ printf("%s :: rd 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
+ instruction, out, \
cpsr & 0xffff0000, \
((1<<31) & cpsr) ? 'N' : ' ', \
((1<<30) & cpsr) ? 'Z' : ' ', \
@@ -256,34 +257,35 @@
}
// this one uses d0, s0 and s2 (hardcoded)
-#define TESTINSTPCMISALIGNED_DWORDOUT(instruction, label, cvin) \
+#define TESTINSTPCMISALIGNED_DWORDOUT(instruction, label, cvin, extratrash) \
{ \
unsigned int out; \
unsigned int out2; \
unsigned int cpsr; \
__asm__ volatile(\
- ".align 4;" \
- "msr cpsr_f, %3;" \
- ".align 2;" \
- ".thumb;" \
- ".syntax unified;" \
- "nop;" \
- instruction ";" \
- "b .Lend" #label ";" \
- ".align 4;" \
- #label ": " \
- ".word 0x8191881b;" \
- ".word 0x18fe9c93;" \
- ".word 0x00000000;" \
- ".word 0x00000000;" \
- ".Lend" #label ":" \
- "vmov %0, s0;" \
- "vmov %1, s1;" \
- "mrs %2,cpsr;" \
- : "=&r" (out), "=&r" (out2), "=&r" (cpsr) \
- : "r" (gen_cvin(cvin)) \
- ); \
- printf("%s :: s0 0x%08x s1 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
+ ".align 4;" \
+ "msr cpsr_f, %3;" \
+ ".align 2;" \
+ ".thumb;" \
+ ".syntax unified;" \
+ "nop;" \
+ instruction ";" \
+ "b .Lend" #label ";" \
+ ".align 4;" \
+ #label ": " \
+ ".word 0x8191881b;" \
+ ".word 0x18fe9c93;" \
+ ".word 0x00000000;" \
+ ".word 0x00000000;" \
+ ".Lend" #label ":" \
+ "vmov %0, s0;" \
+ "vmov %1, s1;" \
+ "mrs %2, cpsr;" \
+ : "=&r" (out), "=&r" (out2), "=&r" (cpsr) \
+ : "r" (gen_cvin(cvin)) \
+ : "cc", "memory", "s0", "s1", extratrash \
+ ); \
+ printf("%s :: s0 0x%08x s1 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
instruction, out, out2, \
cpsr & 0xffff0000, \
((1<<31) & cpsr) ? 'N' : ' ', \
@@ -299,30 +301,31 @@
unsigned int out2; \
unsigned int cpsr; \
__asm__ volatile(\
- ".align 4;" \
- "msr cpsr_f, %3;" \
- "mov " #RD ", #0;" \
- "mov " #RD2 ", #0;" \
- ".align 2;" \
- ".thumb;" \
- ".syntax unified;" \
- "nop;" \
- instruction ";" \
- "b .Lend" #label ";" \
- ".align 4;" \
- #label ": " \
- ".word 0x8191881b;" \
- ".word 0x18fe9c93;" \
- ".word 0x00000000;" \
- ".word 0x00000000;" \
- ".Lend" #label ":" \
- "mov %0, " #RD ";" \
- "mov %1, " #RD2 ";" \
- "mrs %2,cpsr;" \
- : "=&r" (out), "=&r" (out2), "=&r" (cpsr) \
- : "r" (gen_cvin(cvin)) \
- ); \
- printf("%s :: rd 0x%08x rd2 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
+ ".align 4;" \
+ "msr cpsr_f, %3;" \
+ "mov " #RD ", #0;" \
+ "mov " #RD2 ", #0;" \
+ ".align 2;" \
+ ".thumb;" \
+ ".syntax unified;" \
+ "nop;" \
+ instruction ";" \
+ "b .Lend" #label ";" \
+ ".align 4;" \
+ #label ": " \
+ ".word 0x8191881b;" \
+ ".word 0x18fe9c93;" \
+ ".word 0x00000000;" \
+ ".word 0x00000000;" \
+ ".Lend" #label ":" \
+ "mov %0, " #RD ";" \
+ "mov %1, " #RD2 ";" \
+ "mrs %2, cpsr;" \
+ : "=&r" (out), "=&r" (out2), "=&r" (cpsr) \
+ : "r" (gen_cvin(cvin)) \
+ : #RD, #RD2, "cc", "memory" \
+ ); \
+ printf("%s :: rd 0x%08x rd2 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
instruction, out, out2, \
cpsr & 0xffff0000, \
((1<<31) & cpsr) ? 'N' : ' ', \
@@ -642,7 +645,7 @@
r1, label_magic_ldrsh, cv);
// omitting PLD/PLI
TESTINSTPCMISALIGNED_DWORDOUT("vldr d0, label_magic_vldr",
- label_magic_vldr, cv);
+ label_magic_vldr, cv, "d0");
TESTCARRYEND
|
|
From: <sv...@va...> - 2014-05-13 15:55:07
|
Author: sewardj
Date: Tue May 13 15:55:00 2014
New Revision: 13959
Log:
Thumb encoding: add test case for assertion failure caused by
"ldr.w pc, [reg, #imm]". See #333428. (di...@go...)
Modified:
trunk/none/tests/arm/v6intThumb.c
trunk/none/tests/arm/v6intThumb.stdout.exp
Modified: trunk/none/tests/arm/v6intThumb.c
==============================================================================
--- trunk/none/tests/arm/v6intThumb.c (original)
+++ trunk/none/tests/arm/v6intThumb.c Tue May 13 15:55:00 2014
@@ -342,6 +342,57 @@
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
+__attribute__((noinline))
+void test_ldr_pc(void) {
+ // special case of ldr PC, [rN, +imm?]
+ printf("tests for instructions modifying pc (ldr pc, add pc)\n");
+ {
+ unsigned int out;
+ unsigned int cpsr;
+ unsigned char tmpbuff[512]; // we use tmpbuff+432
+ int cvin = 0;
+
+ __asm__ volatile(
+ ".thumb;\n"
+ ".syntax unified ;\n"
+ "msr cpsr_f, %3 ;\n"
+ "mov r9, %2 ;\n"
+ "movw r2, #:lower16:.ldrwpclabel1 ;\n"
+ "movt r2, #:upper16:.ldrwpclabel1 ;\n"
+ "mov r0, #1 ;\n"
+ "orr r2, r0 ;\n" // set thumb bit to 1
+ "str r2, [r9, +#432] ;\n"
+ "bl .ldrwpclabel_continue ;\n"
+ ".align 4 ;\n"
+ ".ldrwpclabel1: \n"
+ "mov r1, #42 ;\n" // expected output value
+ "bl .ldrwpclabel_end ;\n"
+ ".ldrwpclabel_continue: \n"
+ "ldr.w pc, [r9, +#432] ;\n"
+ "mov r1, #0 ;\n" // should never get here
+ ".ldrwpclabel_end: \n"
+ "mov %0, r1 ;\n"
+ "mrs %1, cpsr ;\n"
+ : "=r"(out), "=r"(cpsr)
+ : "r"(tmpbuff), "r"(gen_cvin(cvin))
+ : "r9", "r2", "r0", "r1", "cc", "memory"
+ );
+
+ // print
+ printf("ldr.w pc, [r9, +#432] :: r1 0x%08x c:v-in %d, "
+ "cpsr 0x%08x %c%c%c%c\n", \
+ out, \
+ cvin, \
+ cpsr & 0xffff0000, \
+ ((1<<31) & cpsr) ? 'N' : ' ', \
+ ((1<<30) & cpsr) ? 'Z' : ' ', \
+ ((1<<29) & cpsr) ? 'C' : ' ', \
+ ((1<<28) & cpsr) ? 'V' : ' ' \
+ ); \
+
+ }
+}
+
static int old_main(void)
{
@@ -595,6 +646,7 @@
TESTCARRYEND
+ test_ldr_pc();
#if 0
printf("ROR\n");
TESTCARRY
Modified: trunk/none/tests/arm/v6intThumb.stdout.exp
==============================================================================
--- trunk/none/tests/arm/v6intThumb.stdout.exp (original)
+++ trunk/none/tests/arm/v6intThumb.stdout.exp Tue May 13 15:55:00 2014
@@ -17316,6 +17316,8 @@
ldrsb r1, label_magic_ldrsb :: rd 0x0000001b, cpsr 0xc0000000 NZ
ldrsh r1, label_magic_ldrsh :: rd 0xffff881b, cpsr 0xc0000000 NZ
vldr d0, label_magic_vldr :: s0 0x8191881b s1 0x18fe9c93, cpsr 0xc0000000 NZ
+tests for instructions modifying pc (ldr pc, add pc)
+ldr.w pc, [r9, +#432] :: r1 0x0000002a c:v-in 0, cpsr 0xc0000000 NZ
MUL
mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
|
|
From: <sv...@va...> - 2014-05-13 15:54:22
|
Author: sewardj
Date: Tue May 13 15:54:14 2014
New Revision: 2860
Log:
Thumb encoding: fix assertion failure caused by
"ldr.w pc, [reg, #imm]". Fixes #333428. (di...@go...)
Modified:
trunk/priv/guest_arm_toIR.c
Modified: trunk/priv/guest_arm_toIR.c
==============================================================================
--- trunk/priv/guest_arm_toIR.c (original)
+++ trunk/priv/guest_arm_toIR.c Tue May 13 15:54:14 2014
@@ -20416,9 +20416,8 @@
vassert(rT == 15);
vassert(condT == IRTemp_INVALID); /* due to check above */
llPutIReg(15, mkexpr(newRt));
- irsb->next = mkexpr(newRt);
- irsb->jumpkind = Ijk_Boring; /* or _Ret ? */
- dres.whatNext = Dis_StopHere;
+ dres.jk_StopHere = Ijk_Boring;
+ dres.whatNext = Dis_StopHere;
}
}
|
|
From: <sv...@va...> - 2014-05-13 14:46:02
|
Author: sewardj
Date: Tue May 13 14:45:54 2014
New Revision: 13958
Log:
Thumb encoding: add test cases for misaligned loads of the form
LD Rt, [Rn +/- #imm12] when Rn == PC
See #333145. (di...@go...)
Modified:
trunk/none/tests/arm/v6intThumb.c
trunk/none/tests/arm/v6intThumb.stdout.exp
Modified: trunk/none/tests/arm/v6intThumb.c
==============================================================================
--- trunk/none/tests/arm/v6intThumb.c (original)
+++ trunk/none/tests/arm/v6intThumb.c Tue May 13 14:45:54 2014
@@ -5,7 +5,7 @@
#include <stdio.h>
-static int gen_cvin(cvin)
+static int gen_cvin(int cvin)
{
int r = ((cvin & 2) ? (1<<29) : 0) | ((cvin & 1) ? (1<<28) : 0);
r |= (1 << 31) | (1 << 30);
@@ -218,6 +218,120 @@
); \
}
+// Tests misaligned access via PC+$#imm
+#define TESTINSTPCMISALIGNED(instruction, RD, label, cvin) \
+{ \
+ unsigned int out; \
+ unsigned int cpsr; \
+ __asm__ volatile(\
+ ".align 4;" \
+ "msr cpsr_f, %2;" \
+ "mov " #RD ", #0;" \
+ ".align 2;" \
+ ".thumb;" \
+ ".syntax unified;" \
+ "nop;" \
+ instruction ";" \
+ "b .Lend" #label ";" \
+ ".align 4;" \
+ #label ": " \
+ ".word 0x8191881b;" \
+ ".word 0x18fe9c93;" \
+ ".word 0x00000000;" \
+ ".word 0x00000000;" \
+ ".Lend" #label ":" \
+ "mov %0, " #RD ";" \
+ "mrs %1,cpsr;" \
+ : "=&r" (out), "=&r" (cpsr) \
+ : "r" (gen_cvin(cvin)) \
+ ); \
+ printf("%s :: rd 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
+ instruction, out, \
+ cpsr & 0xffff0000, \
+ ((1<<31) & cpsr) ? 'N' : ' ', \
+ ((1<<30) & cpsr) ? 'Z' : ' ', \
+ ((1<<29) & cpsr) ? 'C' : ' ', \
+ ((1<<28) & cpsr) ? 'V' : ' ' \
+ ); \
+}
+
+// this one uses d0, s0 and s2 (hardcoded)
+#define TESTINSTPCMISALIGNED_DWORDOUT(instruction, label, cvin) \
+{ \
+ unsigned int out; \
+ unsigned int out2; \
+ unsigned int cpsr; \
+ __asm__ volatile(\
+ ".align 4;" \
+ "msr cpsr_f, %3;" \
+ ".align 2;" \
+ ".thumb;" \
+ ".syntax unified;" \
+ "nop;" \
+ instruction ";" \
+ "b .Lend" #label ";" \
+ ".align 4;" \
+ #label ": " \
+ ".word 0x8191881b;" \
+ ".word 0x18fe9c93;" \
+ ".word 0x00000000;" \
+ ".word 0x00000000;" \
+ ".Lend" #label ":" \
+ "vmov %0, s0;" \
+ "vmov %1, s1;" \
+ "mrs %2,cpsr;" \
+ : "=&r" (out), "=&r" (out2), "=&r" (cpsr) \
+ : "r" (gen_cvin(cvin)) \
+ ); \
+ printf("%s :: s0 0x%08x s1 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
+ instruction, out, out2, \
+ cpsr & 0xffff0000, \
+ ((1<<31) & cpsr) ? 'N' : ' ', \
+ ((1<<30) & cpsr) ? 'Z' : ' ', \
+ ((1<<29) & cpsr) ? 'C' : ' ', \
+ ((1<<28) & cpsr) ? 'V' : ' ' \
+ ); \
+}
+
+#define TESTINSTPCMISALIGNED_2OUT(instruction, RD, RD2, label, cvin) \
+{ \
+ unsigned int out; \
+ unsigned int out2; \
+ unsigned int cpsr; \
+ __asm__ volatile(\
+ ".align 4;" \
+ "msr cpsr_f, %3;" \
+ "mov " #RD ", #0;" \
+ "mov " #RD2 ", #0;" \
+ ".align 2;" \
+ ".thumb;" \
+ ".syntax unified;" \
+ "nop;" \
+ instruction ";" \
+ "b .Lend" #label ";" \
+ ".align 4;" \
+ #label ": " \
+ ".word 0x8191881b;" \
+ ".word 0x18fe9c93;" \
+ ".word 0x00000000;" \
+ ".word 0x00000000;" \
+ ".Lend" #label ":" \
+ "mov %0, " #RD ";" \
+ "mov %1, " #RD2 ";" \
+ "mrs %2,cpsr;" \
+ : "=&r" (out), "=&r" (out2), "=&r" (cpsr) \
+ : "r" (gen_cvin(cvin)) \
+ ); \
+ printf("%s :: rd 0x%08x rd2 0x%08x, cpsr 0x%08x %c%c%c%c\n", \
+ instruction, out, out2, \
+ cpsr & 0xffff0000, \
+ ((1<<31) & cpsr) ? 'N' : ' ', \
+ ((1<<30) & cpsr) ? 'Z' : ' ', \
+ ((1<<29) & cpsr) ? 'C' : ' ', \
+ ((1<<28) & cpsr) ? 'V' : ' ' \
+ ); \
+}
+
/* helpers */
#define NOCARRY { int cv = 0; {
#define TESTCARRY { int cv = 0; for (cv = 0; cv < 4; cv++) {
@@ -457,6 +571,30 @@
TESTINST2("asrs r0, r1, #18", 0x00010000, r0, r1, cv);
TESTCARRYEND
+ printf("literal access [PC+#imm]\n");
+ NOCARRY
+ // this should result in r1=0
+ TESTINSTPCMISALIGNED("adr.w r1, label_magic_adrw; and r1, r1, #0x3",
+ r1, label_magic_adrw, cv);
+ // omitting LDC/LDC2
+ TESTINSTPCMISALIGNED("ldr r1, label_magic_ldr",
+ r1, label_magic_ldr, cv);
+ TESTINSTPCMISALIGNED("ldrb r1, label_magic_ldrb",
+ r1, label_magic_ldrb, cv);
+ TESTINSTPCMISALIGNED_2OUT("ldrd r0, r1, label_magic_ldrd",
+ r0, r1, label_magic_ldrd, cv);
+ TESTINSTPCMISALIGNED("ldrh r1, label_magic_ldrh",
+ r1, label_magic_ldrh, cv);
+ TESTINSTPCMISALIGNED("ldrsb r1, label_magic_ldrsb",
+ r1, label_magic_ldrsb, cv);
+ TESTINSTPCMISALIGNED("ldrsh r1, label_magic_ldrsh",
+ r1, label_magic_ldrsh, cv);
+ // omitting PLD/PLI
+ TESTINSTPCMISALIGNED_DWORDOUT("vldr d0, label_magic_vldr",
+ label_magic_vldr, cv);
+
+ TESTCARRYEND
+
#if 0
printf("ROR\n");
TESTCARRY
Modified: trunk/none/tests/arm/v6intThumb.stdout.exp
==============================================================================
--- trunk/none/tests/arm/v6intThumb.stdout.exp (original)
+++ trunk/none/tests/arm/v6intThumb.stdout.exp Tue May 13 14:45:54 2014
@@ -17307,6 +17307,15 @@
asrs r0, r1, #16 :: rd 0x00000001 rm 0x00010000, c:v-in 3, cpsr 0x10000000 V
asrs r0, r1, #17 :: rd 0x00000000 rm 0x00010000, c:v-in 3, cpsr 0x70000000 ZCV
asrs r0, r1, #18 :: rd 0x00000000 rm 0x00010000, c:v-in 3, cpsr 0x50000000 Z V
+literal access [PC+#imm]
+adr.w r1, label_magic_adrw; and r1, r1, #0x3 :: rd 0x00000000, cpsr 0xc0000000 NZ
+ldr r1, label_magic_ldr :: rd 0x8191881b, cpsr 0xc0000000 NZ
+ldrb r1, label_magic_ldrb :: rd 0x0000001b, cpsr 0xc0000000 NZ
+ldrd r0, r1, label_magic_ldrd :: rd 0x8191881b rd2 0x18fe9c93, cpsr 0xc0000000 NZ
+ldrh r1, label_magic_ldrh :: rd 0x0000881b, cpsr 0xc0000000 NZ
+ldrsb r1, label_magic_ldrsb :: rd 0x0000001b, cpsr 0xc0000000 NZ
+ldrsh r1, label_magic_ldrsh :: rd 0xffff881b, cpsr 0xc0000000 NZ
+vldr d0, label_magic_vldr :: s0 0x8191881b s1 0x18fe9c93, cpsr 0xc0000000 NZ
MUL
mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ
|
|
From: <sv...@va...> - 2014-05-13 14:44:29
|
Author: sewardj
Date: Tue May 13 14:44:21 2014
New Revision: 2859
Log:
Thumb encoding: correctly deal with misaligned loads of the form
LD Rt, [Rn +/- #imm12] when Rn == PC
Fixes #333145. (di...@go...)
Modified:
trunk/priv/guest_arm_toIR.c
Modified: trunk/priv/guest_arm_toIR.c
==============================================================================
--- trunk/priv/guest_arm_toIR.c (original)
+++ trunk/priv/guest_arm_toIR.c Tue May 13 14:44:21 2014
@@ -20278,34 +20278,32 @@
/* --------------- LD/ST reg+imm12 --------------- */
/* Loads and stores of the form:
- op Rt, [Rn, +#imm12]
+ op Rt, [Rn, #+-imm12]
where op is one of
ldrb ldrh ldr ldrsb ldrsh
strb strh str
*/
if (INSN0(15,9) == BITS7(1,1,1,1,1,0,0)) {
Bool valid = True;
- Bool syned = False;
+ Bool syned = INSN0(8,8) == 1;
Bool isST = False;
IRType ty = Ity_I8;
+ UInt bU = INSN0(7,7); // 1: +imm 0: -imm
+ // -imm is only supported by literal versions
const HChar* nm = "???";
- switch (INSN0(8,4)) {
- case BITS5(0,1,0,0,0): // strb
+ switch (INSN0(6,4)) {
+ case BITS3(0,0,0): // strb
nm = "strb"; isST = True; break;
- case BITS5(0,1,0,0,1): // ldrb
- nm = "ldrb"; break;
- case BITS5(1,1,0,0,1): // ldrsb
- nm = "ldrsb"; syned = True; break;
- case BITS5(0,1,0,1,0): // strh
+ case BITS3(0,0,1): // ldrb
+ nm = syned ? "ldrsb" : "ldrb"; break;
+ case BITS3(0,1,0): // strh
nm = "strh"; ty = Ity_I16; isST = True; break;
- case BITS5(0,1,0,1,1): // ldrh
- nm = "ldrh"; ty = Ity_I16; break;
- case BITS5(1,1,0,1,1): // ldrsh
- nm = "ldrsh"; ty = Ity_I16; syned = True; break;
- case BITS5(0,1,1,0,0): // str
+ case BITS3(0,1,1): // ldrh
+ nm = syned ? "ldrsh" : "ldrh"; ty = Ity_I16; break;
+ case BITS3(1,0,0): // str
nm = "str"; ty = Ity_I32; isST = True; break;
- case BITS5(0,1,1,0,1):
+ case BITS3(1,0,1):
nm = "ldr"; ty = Ity_I32; break; // ldr
default:
valid = False; break;
@@ -20316,25 +20314,27 @@
UInt imm12 = INSN1(11,0);
Bool loadsPC = False;
- if (ty == Ity_I8 || ty == Ity_I16) {
- /* all 8- and 16-bit load and store cases have the
- same exclusion set. */
- if (rN == 15 || isBadRegT(rT))
+ if (rN != 15 && bU == 0) {
+ // only pc supports #-imm12
+ valid = False;
+ }
+
+ if (isST) {
+ if (syned) valid = False;
+ if (rN == 15 || rT == 15)
valid = False;
} else {
- vassert(ty == Ity_I32);
- if (isST) {
- if (rN == 15 || rT == 15)
- valid = False;
- } else {
- /* For a 32-bit load, rT == 15 is only allowable if we not
- in an IT block, or are the last in it. Need to insert
- a dynamic check for that. Also, in this particular
- case, rN == 15 is allowable. In this case however, the
- value obtained for rN is (apparently)
- "word-align(address of current insn + 4)". */
- if (rT == 15)
+ /* For a 32-bit load, rT == 15 is only allowable if we are not
+ in an IT block, or are the last in it. Need to insert
+ a dynamic check for that. Also, in this particular
+ case, rN == 15 is allowable. In this case however, the
+ value obtained for rN is (apparently)
+ "word-align(address of current insn + 4)". */
+ if (rT == 15) {
+ if (ty == Ity_I32)
loadsPC = True;
+ else // Can't do it for B/H loads
+ valid = False;
}
}
@@ -20352,15 +20352,16 @@
IRTemp rNt = newTemp(Ity_I32);
if (rN == 15) {
- vassert(ty == Ity_I32 && !isST);
- assign(rNt, binop(Iop_And32, getIRegT(rN), mkU32(~3)));
+ vassert(!isST);
+ assign(rNt, binop(Iop_And32, getIRegT(15), mkU32(~3)));
} else {
assign(rNt, getIRegT(rN));
}
IRTemp transAddr = newTemp(Ity_I32);
assign(transAddr,
- binop( Iop_Add32, mkexpr(rNt), mkU32(imm12) ));
+ binop(bU == 1 ? Iop_Add32 : Iop_Sub32,
+ mkexpr(rNt), mkU32(imm12)));
IRTemp oldRt = newTemp(Ity_I32);
assign(oldRt, getIRegT(rT));
|
|
From: <sv...@va...> - 2014-05-13 14:11:03
|
Author: sewardj
Date: Tue May 13 14:10:44 2014
New Revision: 13957
Log:
On 32-bit x86, allow lzcnt to be detected on Intel CPUs as well as on
AMDs. 64-bit equivalent does not have this bug. Fixes #334049.
Modified:
trunk/coregrind/m_machine.c
Modified: trunk/coregrind/m_machine.c
==============================================================================
--- trunk/coregrind/m_machine.c (original)
+++ trunk/coregrind/m_machine.c Tue May 13 14:10:44 2014
@@ -750,18 +750,24 @@
if (!have_cx8)
return False;
- /* Figure out if this is an AMD that can do mmxext and/or LZCNT. */
+ /* Figure out if this is an AMD that can do MMXEXT. */
have_mmxext = False;
- have_lzcnt = False;
if (0 == VG_(strcmp)(vstr, "AuthenticAMD")
&& max_extended >= 0x80000001) {
VG_(cpuid)(0x80000001, 0, &eax, &ebx, &ecx, &edx);
- have_lzcnt = (ecx & (1<<5)) != 0; /* True => have LZCNT */
-
/* Some older AMD processors support a sse1 subset (Integer SSE). */
have_mmxext = !have_sse1 && ((edx & (1<<22)) != 0);
}
+ /* Figure out if this is an AMD or Intel that can do LZCNT. */
+ have_lzcnt = False;
+ if ((0 == VG_(strcmp)(vstr, "AuthenticAMD")
+ || 0 == VG_(strcmp)(vstr, "GenuineIntel"))
+ && max_extended >= 0x80000001) {
+ VG_(cpuid)(0x80000001, 0, &eax, &ebx, &ecx, &edx);
+ have_lzcnt = (ecx & (1<<5)) != 0; /* True => have LZCNT */
+ }
+
/* Intel processors don't define the mmxext extension, but since it
is just a sse1 subset always define it when we have sse1. */
if (have_sse1)
@@ -852,7 +858,6 @@
}
}
-
/* cmpxchg8b is a minimum requirement now; if we don't have it we
must simply give up. But all CPUs since Pentium-I have it, so
that doesn't seem like much of a restriction. */
|
|
From: <sv...@va...> - 2014-05-13 09:35:03
|
Author: sewardj
Date: Tue May 13 09:34:54 2014
New Revision: 13956
Log:
Add more test cases: shll, shrn, rshrn, sli, sri, smaxp, umaxp, sminp,
uminp, smlal, umlal, smlsl, umlsl, smull, umull, sqabs, sqneg, sqadd,
uqadd, sqsub, uqsub, sqdmlal, sqdmlsl, sqdmull, sqrdmulh.
Modified:
trunk/none/tests/arm64/fp_and_simd.c
Modified: trunk/none/tests/arm64/fp_and_simd.c
==============================================================================
--- trunk/none/tests/arm64/fp_and_simd.c (original)
+++ trunk/none/tests/arm64/fp_and_simd.c Tue May 13 09:34:54 2014
@@ -1822,6 +1822,398 @@
GEN_THREEVEC_TEST(uhsub_16b_16b_16b,"uhsub v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_8b_8b_8b, "uhsub v2.8b, v11.8b, v29.8b", 2, 11, 29)
+GEN_TWOVEC_TEST(shll_8h_8b_8, "shll v3.8h, v24.8b, #8", 3, 24)
+GEN_TWOVEC_TEST(shll2_8h_16b_8, "shll2 v3.8h, v24.16b, #8", 3, 24)
+GEN_TWOVEC_TEST(shll_4s_4h_16, "shll v3.4s, v24.4h, #16", 3, 24)
+GEN_TWOVEC_TEST(shll2_4s_8h_16, "shll2 v3.4s, v24.8h, #16", 3, 24)
+GEN_TWOVEC_TEST(shll_2d_2s_32, "shll v3.2d, v24.2s, #32", 3, 24)
+GEN_TWOVEC_TEST(shll2_2d_4s_32, "shll2 v3.2d, v24.4s, #32", 3, 24)
+
+GEN_TWOVEC_TEST(shrn_2s_2d_1, "shrn v4.2s, v29.2d, #1", 4, 29)
+GEN_TWOVEC_TEST(shrn_2s_2d_32, "shrn v4.2s, v29.2d, #32", 4, 29)
+GEN_TWOVEC_TEST(shrn2_4s_2d_1, "shrn2 v4.4s, v29.2d, #1", 4, 29)
+GEN_TWOVEC_TEST(shrn2_4s_2d_32, "shrn2 v4.4s, v29.2d, #32", 4, 29)
+GEN_TWOVEC_TEST(shrn_4h_4s_1, "shrn v4.4h, v29.4s, #1", 4, 29)
+GEN_TWOVEC_TEST(shrn_4h_4s_16, "shrn v4.4h, v29.4s, #16", 4, 29)
+GEN_TWOVEC_TEST(shrn2_8h_4s_1, "shrn2 v4.8h, v29.4s, #1", 4, 29)
+GEN_TWOVEC_TEST(shrn2_8h_4s_16, "shrn2 v4.8h, v29.4s, #16", 4, 29)
+GEN_TWOVEC_TEST(shrn_8b_8h_1, "shrn v4.8b, v29.8h, #1", 4, 29)
+GEN_TWOVEC_TEST(shrn_8b_8h_8, "shrn v4.8b, v29.8h, #8", 4, 29)
+GEN_TWOVEC_TEST(shrn2_16b_8h_1, "shrn2 v4.16b, v29.8h, #1", 4, 29)
+GEN_TWOVEC_TEST(shrn2_16b_8h_8, "shrn2 v4.16b, v29.8h, #8", 4, 29)
+
+GEN_TWOVEC_TEST(rshrn_2s_2d_1, "rshrn v4.2s, v29.2d, #1", 4, 29)
+GEN_TWOVEC_TEST(rshrn_2s_2d_32, "rshrn v4.2s, v29.2d, #32", 4, 29)
+GEN_TWOVEC_TEST(rshrn2_4s_2d_1, "rshrn2 v4.4s, v29.2d, #1", 4, 29)
+GEN_TWOVEC_TEST(rshrn2_4s_2d_32, "rshrn2 v4.4s, v29.2d, #32", 4, 29)
+GEN_TWOVEC_TEST(rshrn_4h_4s_1, "rshrn v4.4h, v29.4s, #1", 4, 29)
+GEN_TWOVEC_TEST(rshrn_4h_4s_16, "rshrn v4.4h, v29.4s, #16", 4, 29)
+GEN_TWOVEC_TEST(rshrn2_8h_4s_1, "rshrn2 v4.8h, v29.4s, #1", 4, 29)
+GEN_TWOVEC_TEST(rshrn2_8h_4s_16, "rshrn2 v4.8h, v29.4s, #16", 4, 29)
+GEN_TWOVEC_TEST(rshrn_8b_8h_1, "rshrn v4.8b, v29.8h, #1", 4, 29)
+GEN_TWOVEC_TEST(rshrn_8b_8h_8, "rshrn v4.8b, v29.8h, #8", 4, 29)
+GEN_TWOVEC_TEST(rshrn2_16b_8h_1, "rshrn2 v4.16b, v29.8h, #1", 4, 29)
+GEN_TWOVEC_TEST(rshrn2_16b_8h_8, "rshrn2 v4.16b, v29.8h, #8", 4, 29)
+
+GEN_TWOVEC_TEST(sli_d_d_0, "sli d5, d28, #0", 5, 28)
+GEN_TWOVEC_TEST(sli_d_d_32, "sli d5, d28, #32", 5, 28)
+GEN_TWOVEC_TEST(sli_d_d_63, "sli d5, d28, #63", 5, 28)
+GEN_TWOVEC_TEST(sri_d_d_1, "sri d5, d28, #1", 5, 28)
+GEN_TWOVEC_TEST(sri_d_d_33, "sri d5, d28, #33", 5, 28)
+GEN_TWOVEC_TEST(sri_d_d_64, "sri d5, d28, #64", 5, 28)
+
+GEN_TWOVEC_TEST(sli_2d_2d_0, "sli v6.2d, v27.2d, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_2d_2d_32, "sli v6.2d, v27.2d, #32", 6, 27)
+GEN_TWOVEC_TEST(sli_2d_2d_63, "sli v6.2d, v27.2d, #63", 6, 27)
+GEN_TWOVEC_TEST(sli_4s_4s_0, "sli v6.4s, v27.4s, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_4s_4s_16, "sli v6.4s, v27.4s, #16", 6, 27)
+GEN_TWOVEC_TEST(sli_4s_4s_31, "sli v6.4s, v27.4s, #31", 6, 27)
+GEN_TWOVEC_TEST(sli_2s_2s_0, "sli v6.2s, v27.2s, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_2s_2s_16, "sli v6.2s, v27.2s, #16", 6, 27)
+GEN_TWOVEC_TEST(sli_2s_2s_31, "sli v6.2s, v27.2s, #31", 6, 27)
+GEN_TWOVEC_TEST(sli_8h_8h_0, "sli v6.8h, v27.8h, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_8h_8h_8, "sli v6.8h, v27.8h, #8", 6, 27)
+GEN_TWOVEC_TEST(sli_8h_8h_15, "sli v6.8h, v27.8h, #15", 6, 27)
+GEN_TWOVEC_TEST(sli_4h_4h_0, "sli v6.4h, v27.4h, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_4h_4h_8, "sli v6.4h, v27.4h, #8", 6, 27)
+GEN_TWOVEC_TEST(sli_4h_4h_15, "sli v6.4h, v27.4h, #15", 6, 27)
+GEN_TWOVEC_TEST(sli_16b_16b_0, "sli v6.16b, v27.16b, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_16b_16b_3, "sli v6.16b, v27.16b, #3", 6, 27)
+GEN_TWOVEC_TEST(sli_16b_16b_7, "sli v6.16b, v27.16b, #7", 6, 27)
+GEN_TWOVEC_TEST(sli_8b_8b_0, "sli v6.8b, v27.8b, #0", 6, 27)
+GEN_TWOVEC_TEST(sli_8b_8b_3, "sli v6.8b, v27.8b, #3", 6, 27)
+GEN_TWOVEC_TEST(sli_8b_8b_7, "sli v6.8b, v27.8b, #7", 6, 27)
+
+GEN_TWOVEC_TEST(sri_2d_2d_1, "sri v6.2d, v27.2d, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_2d_2d_33, "sri v6.2d, v27.2d, #33", 6, 27)
+GEN_TWOVEC_TEST(sri_2d_2d_64, "sri v6.2d, v27.2d, #64", 6, 27)
+GEN_TWOVEC_TEST(sri_4s_4s_1, "sri v6.4s, v27.4s, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_4s_4s_17, "sri v6.4s, v27.4s, #17", 6, 27)
+GEN_TWOVEC_TEST(sri_4s_4s_32, "sri v6.4s, v27.4s, #32", 6, 27)
+GEN_TWOVEC_TEST(sri_2s_2s_1, "sri v6.2s, v27.2s, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_2s_2s_17, "sri v6.2s, v27.2s, #17", 6, 27)
+GEN_TWOVEC_TEST(sri_2s_2s_32, "sri v6.2s, v27.2s, #32", 6, 27)
+GEN_TWOVEC_TEST(sri_8h_8h_1, "sri v6.8h, v27.8h, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_8h_8h_8, "sri v6.8h, v27.8h, #8", 6, 27)
+GEN_TWOVEC_TEST(sri_8h_8h_16, "sri v6.8h, v27.8h, #16", 6, 27)
+GEN_TWOVEC_TEST(sri_4h_4h_1, "sri v6.4h, v27.4h, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_4h_4h_8, "sri v6.4h, v27.4h, #8", 6, 27)
+GEN_TWOVEC_TEST(sri_4h_4h_16, "sri v6.4h, v27.4h, #16", 6, 27)
+GEN_TWOVEC_TEST(sri_16b_16b_1, "sri v6.16b, v27.16b, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_16b_16b_4, "sri v6.16b, v27.16b, #4", 6, 27)
+GEN_TWOVEC_TEST(sri_16b_16b_8, "sri v6.16b, v27.16b, #8", 6, 27)
+GEN_TWOVEC_TEST(sri_8b_8b_1, "sri v6.8b, v27.8b, #1", 6, 27)
+GEN_TWOVEC_TEST(sri_8b_8b_4, "sri v6.8b, v27.8b, #4", 6, 27)
+GEN_TWOVEC_TEST(sri_8b_8b_8, "sri v6.8b, v27.8b, #8", 6, 27)
+
+GEN_BINARY_TEST(smaxp, 4s, 4s, 4s)
+GEN_BINARY_TEST(smaxp, 2s, 2s, 2s)
+GEN_BINARY_TEST(smaxp, 8h, 8h, 8h)
+GEN_BINARY_TEST(smaxp, 4h, 4h, 4h)
+GEN_BINARY_TEST(smaxp, 16b, 16b, 16b)
+GEN_BINARY_TEST(smaxp, 8b, 8b, 8b)
+
+GEN_BINARY_TEST(umaxp, 4s, 4s, 4s)
+GEN_BINARY_TEST(umaxp, 2s, 2s, 2s)
+GEN_BINARY_TEST(umaxp, 8h, 8h, 8h)
+GEN_BINARY_TEST(umaxp, 4h, 4h, 4h)
+GEN_BINARY_TEST(umaxp, 16b, 16b, 16b)
+GEN_BINARY_TEST(umaxp, 8b, 8b, 8b)
+
+GEN_BINARY_TEST(sminp, 4s, 4s, 4s)
+GEN_BINARY_TEST(sminp, 2s, 2s, 2s)
+GEN_BINARY_TEST(sminp, 8h, 8h, 8h)
+GEN_BINARY_TEST(sminp, 4h, 4h, 4h)
+GEN_BINARY_TEST(sminp, 16b, 16b, 16b)
+GEN_BINARY_TEST(sminp, 8b, 8b, 8b)
+
+GEN_BINARY_TEST(uminp, 4s, 4s, 4s)
+GEN_BINARY_TEST(uminp, 2s, 2s, 2s)
+GEN_BINARY_TEST(uminp, 8h, 8h, 8h)
+GEN_BINARY_TEST(uminp, 4h, 4h, 4h)
+GEN_BINARY_TEST(uminp, 16b, 16b, 16b)
+GEN_BINARY_TEST(uminp, 8b, 8b, 8b)
+
+GEN_THREEVEC_TEST(smlal_2d_2s_s0, "smlal v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal_2d_2s_s3, "smlal v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal2_2d_4s_s1, "smlal2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal2_2d_4s_s2, "smlal2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal_4s_4h_h0, "smlal v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal_4s_4h_h7, "smlal v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal2_4s_8h_h1, "smlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlal2_4s_8h_h4, "smlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+
+GEN_THREEVEC_TEST(umlal_2d_2s_s0, "umlal v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal_2d_2s_s3, "umlal v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal2_2d_4s_s1, "umlal2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal2_2d_4s_s2, "umlal2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal_4s_4h_h0, "umlal v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal_4s_4h_h7, "umlal v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal2_4s_8h_h1, "umlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlal2_4s_8h_h4, "umlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+
+GEN_THREEVEC_TEST(smlsl_2d_2s_s0, "smlsl v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl_2d_2s_s3, "smlsl v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl2_2d_4s_s1, "smlsl2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl2_2d_4s_s2, "smlsl2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl_4s_4h_h0, "smlsl v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl_4s_4h_h7, "smlsl v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl2_4s_8h_h1, "smlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(smlsl2_4s_8h_h4, "smlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+
+GEN_THREEVEC_TEST(umlsl_2d_2s_s0, "umlsl v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl_2d_2s_s3, "umlsl v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl2_2d_4s_s1, "umlsl2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl2_2d_4s_s2, "umlsl2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl_4s_4h_h0, "umlsl v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl_4s_4h_h7, "umlsl v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl2_4s_8h_h1, "umlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(umlsl2_4s_8h_h4, "umlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+
+GEN_THREEVEC_TEST(smull_2d_2s_s0, "smull v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull_2d_2s_s3, "smull v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull2_2d_4s_s1, "smull2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull2_2d_4s_s2, "smull2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull_4s_4h_h0, "smull v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull_4s_4h_h7, "smull v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull2_4s_8h_h1, "smull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(smull2_4s_8h_h4, "smull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+
+GEN_THREEVEC_TEST(umull_2d_2s_s0, "umull v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull_2d_2s_s3, "umull v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull2_2d_4s_s1, "umull2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull2_2d_4s_s2, "umull2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull_4s_4h_h0, "umull v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull_4s_4h_h7, "umull v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull2_4s_8h_h1, "umull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+GEN_THREEVEC_TEST(umull2_4s_8h_h4, "umull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
+
+GEN_THREEVEC_TEST(smlal_2d_2s_2s, "smlal v2.2d, v11.2s, v29.2s", 2, 11, 29)
+GEN_THREEVEC_TEST(smlal2_2d_4s_4s, "smlal2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smlal_4s_4h_4h, "smlal v2.4s, v11.4h, v29.4h", 2, 11, 29)
+GEN_THREEVEC_TEST(smlal2_4s_8h_8h, "smlal2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smlal_8h_8b_8b, "smlal v2.8h, v11.8b, v29.8b", 2, 11, 29)
+GEN_THREEVEC_TEST(smlal2_8h_16b_16b,
+ "smlal2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umlal_2d_2s_2s, "umlal v2.2d, v11.2s, v29.2s", 2, 11, 29)
+GEN_THREEVEC_TEST(umlal2_2d_4s_4s, "umlal2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umlal_4s_4h_4h, "umlal v2.4s, v11.4h, v29.4h", 2, 11, 29)
+GEN_THREEVEC_TEST(umlal2_4s_8h_8h, "umlal2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umlal_8h_8b_8b, "umlal v2.8h, v11.8b, v29.8b", 2, 11, 29)
+GEN_THREEVEC_TEST(umlal2_8h_16b_16b,
+ "umlal2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smlsl_2d_2s_2s, "smlsl v2.2d, v11.2s, v29.2s", 2, 11, 29)
+GEN_THREEVEC_TEST(smlsl2_2d_4s_4s, "smlsl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smlsl_4s_4h_4h, "smlsl v2.4s, v11.4h, v29.4h", 2, 11, 29)
+GEN_THREEVEC_TEST(smlsl2_4s_8h_8h, "smlsl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smlsl_8h_8b_8b, "smlsl v2.8h, v11.8b, v29.8b", 2, 11, 29)
+GEN_THREEVEC_TEST(smlsl2_8h_16b_16b,
+ "smlsl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umlsl_2d_2s_2s, "umlsl v2.2d, v11.2s, v29.2s", 2, 11, 29)
+GEN_THREEVEC_TEST(umlsl2_2d_4s_4s, "umlsl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umlsl_4s_4h_4h, "umlsl v2.4s, v11.4h, v29.4h", 2, 11, 29)
+GEN_THREEVEC_TEST(umlsl2_4s_8h_8h, "umlsl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umlsl_8h_8b_8b, "umlsl v2.8h, v11.8b, v29.8b", 2, 11, 29)
+GEN_THREEVEC_TEST(umlsl2_8h_16b_16b,
+ "umlsl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smull_2d_2s_2s, "smull v2.2d, v11.2s, v29.2s", 2, 11, 29)
+GEN_THREEVEC_TEST(smull2_2d_4s_4s, "smull2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smull_4s_4h_4h, "smull v2.4s, v11.4h, v29.4h", 2, 11, 29)
+GEN_THREEVEC_TEST(smull2_4s_8h_8h, "smull2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
+
+GEN_THREEVEC_TEST(smull_8h_8b_8b, "smull v2.8h, v11.8b, v29.8b", 2, 11, 29)
+GEN_THREEVEC_TEST(smull2_8h_16b_16b,
+ "smull2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umull_2d_2s_2s, "umull v2.2d, v11.2s, v29.2s", 2, 11, 29)
+GEN_THREEVEC_TEST(umull2_2d_4s_4s, "umull2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umull_4s_4h_4h, "umull v2.4s, v11.4h, v29.4h", 2, 11, 29)
+GEN_THREEVEC_TEST(umull2_4s_8h_8h, "umull2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
+
+GEN_THREEVEC_TEST(umull_8h_8b_8b, "umull v2.8h, v11.8b, v29.8b", 2, 11, 29)
+GEN_THREEVEC_TEST(umull2_8h_16b_16b,
+ "umull2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
+
+GEN_TWOVEC_TEST(sqabs_d_d, "sqabs d7, d30", 7, 30)
+GEN_TWOVEC_TEST(sqabs_s_s, "sqabs s7, s30", 7, 30)
+GEN_TWOVEC_TEST(sqabs_h_h, "sqabs h7, h30", 7, 30)
+GEN_TWOVEC_TEST(sqabs_b_b, "sqabs b7, b30", 7, 30)
+
+GEN_TWOVEC_TEST(sqneg_d_d, "sqneg d7, d30", 7, 30)
+GEN_TWOVEC_TEST(sqneg_s_s, "sqneg s7, s30", 7, 30)
+GEN_TWOVEC_TEST(sqneg_h_h, "sqneg h7, h30", 7, 30)
+GEN_TWOVEC_TEST(sqneg_b_b, "sqneg b7, b30", 7, 30)
+
+GEN_UNARY_TEST(sqabs, 2d, 2d)
+GEN_UNARY_TEST(sqabs, 4s, 4s)
+GEN_UNARY_TEST(sqabs, 2s, 2s)
+GEN_UNARY_TEST(sqabs, 8h, 8h)
+GEN_UNARY_TEST(sqabs, 4h, 4h)
+GEN_UNARY_TEST(sqabs, 16b, 16b)
+GEN_UNARY_TEST(sqabs, 8b, 8b)
+
+GEN_UNARY_TEST(sqneg, 2d, 2d)
+GEN_UNARY_TEST(sqneg, 4s, 4s)
+GEN_UNARY_TEST(sqneg, 2s, 2s)
+GEN_UNARY_TEST(sqneg, 8h, 8h)
+GEN_UNARY_TEST(sqneg, 4h, 4h)
+GEN_UNARY_TEST(sqneg, 16b, 16b)
+GEN_UNARY_TEST(sqneg, 8b, 8b)
+
+GEN_THREEVEC_TEST(sqadd_d_d_d, "sqadd d1, d2, d4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_s_s_s, "sqadd s1, s2, s4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_h_h_h, "sqadd h1, h2, h4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_b_b_b, "sqadd b1, b2, b4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_2d_2d_2d, "sqadd v1.2d, v2.2d, v4.2d", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_4s_4s_4s, "sqadd v1.4s, v2.4s, v4.4s", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_2s_2s_2s, "sqadd v1.2s, v2.2s, v4.2s", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_8h_8h_8h, "sqadd v1.8h, v2.8h, v4.8h", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_4h_4h_4h, "sqadd v1.4h, v2.4h, v4.4h", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_16b_16b_16b, "sqadd v1.16b, v2.16b, v4.16b", 1, 2, 4)
+GEN_THREEVEC_TEST(sqadd_8b_8b_8b, "sqadd v1.8b, v2.8b, v4.8b", 1, 2, 4)
+
+GEN_THREEVEC_TEST(uqadd_d_d_d, "uqadd d1, d2, d4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_s_s_s, "uqadd s1, s2, s4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_h_h_h, "uqadd h1, h2, h4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_b_b_b, "uqadd b1, b2, b4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_2d_2d_2d, "uqadd v1.2d, v2.2d, v4.2d", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_4s_4s_4s, "uqadd v1.4s, v2.4s, v4.4s", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_2s_2s_2s, "uqadd v1.2s, v2.2s, v4.2s", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_8h_8h_8h, "uqadd v1.8h, v2.8h, v4.8h", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_4h_4h_4h, "uqadd v1.4h, v2.4h, v4.4h", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_16b_16b_16b, "uqadd v1.16b, v2.16b, v4.16b", 1, 2, 4)
+GEN_THREEVEC_TEST(uqadd_8b_8b_8b, "uqadd v1.8b, v2.8b, v4.8b", 1, 2, 4)
+
+GEN_THREEVEC_TEST(sqsub_d_d_d, "sqsub d1, d2, d4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_s_s_s, "sqsub s1, s2, s4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_h_h_h, "sqsub h1, h2, h4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_b_b_b, "sqsub b1, b2, b4", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_2d_2d_2d, "sqsub v1.2d, v2.2d, v4.2d", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_4s_4s_4s, "sqsub v1.4s, v2.4s, v4.4s", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_2s_2s_2s, "sqsub v1.2s, v2.2s, v4.2s", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_8h_8h_8h, "sqsub v1.8h, v2.8h, v4.8h", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_4h_4h_4h, "sqsub v1.4h, v2.4h, v4.4h", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_16b_16b_16b, "sqsub v1.16b, v2.16b, v4.16b", 1, 2, 4)
+GEN_THREEVEC_TEST(sqsub_8b_8b_8b, "sqsub v1.8b, v2.8b, v4.8b", 1, 2, 4)
+
+GEN_THREEVEC_TEST(uqsub_d_d_d, "uqsub d1, d2, d4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_s_s_s, "uqsub s1, s2, s4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_h_h_h, "uqsub h1, h2, h4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_b_b_b, "uqsub b1, b2, b4", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_2d_2d_2d, "uqsub v1.2d, v2.2d, v4.2d", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_4s_4s_4s, "uqsub v1.4s, v2.4s, v4.4s", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_2s_2s_2s, "uqsub v1.2s, v2.2s, v4.2s", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_8h_8h_8h, "uqsub v1.8h, v2.8h, v4.8h", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_4h_4h_4h, "uqsub v1.4h, v2.4h, v4.4h", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_16b_16b_16b, "uqsub v1.16b, v2.16b, v4.16b", 1, 2, 4)
+GEN_THREEVEC_TEST(uqsub_8b_8b_8b, "uqsub v1.8b, v2.8b, v4.8b", 1, 2, 4)
+
+GEN_THREEVEC_TEST(sqdmlal_d_s_s0, "sqdmlal d31, s30, v29.s[0]", 31,30,29)
+GEN_THREEVEC_TEST(sqdmlal_d_s_s3, "sqdmlal d31, s30, v29.s[3]", 31,30,29)
+GEN_THREEVEC_TEST(sqdmlal_s_h_h1, "sqdmlal s31, h30, v13.h[1]", 31,30,13)
+GEN_THREEVEC_TEST(sqdmlal_s_h_h5, "sqdmlal s31, h30, v13.h[5]", 31,30,13)
+
+GEN_THREEVEC_TEST(sqdmlsl_d_s_s0, "sqdmlsl d31, s30, v29.s[0]", 31,30,29)
+GEN_THREEVEC_TEST(sqdmlsl_d_s_s3, "sqdmlsl d31, s30, v29.s[3]", 31,30,29)
+GEN_THREEVEC_TEST(sqdmlsl_s_h_h1, "sqdmlsl s31, h30, v13.h[1]", 31,30,13)
+GEN_THREEVEC_TEST(sqdmlsl_s_h_h5, "sqdmlsl s31, h30, v13.h[5]", 31,30,13)
+
+GEN_THREEVEC_TEST(sqdmull_d_s_s0, "sqdmull d31, s30, v29.s[0]", 31,30,29)
+GEN_THREEVEC_TEST(sqdmull_d_s_s3, "sqdmull d31, s30, v29.s[3]", 31,30,29)
+GEN_THREEVEC_TEST(sqdmull_s_h_h1, "sqdmull s31, h30, v13.h[1]", 31,30,13)
+GEN_THREEVEC_TEST(sqdmull_s_h_h5, "sqdmull s31, h30, v13.h[5]", 31,30,13)
+
+GEN_THREEVEC_TEST(sqdmlal_2d_2s_s0, "sqdmlal v29.2d, v20.2s, v3.s[0]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal_2d_2s_s3, "sqdmlal v29.2d, v20.2s, v3.s[3]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal2_2d_4s_s1,"sqdmlal2 v29.2d, v20.4s, v3.s[1]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal2_2d_4s_s2,"sqdmlal2 v29.2d, v20.4s, v3.s[2]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal_4s_4h_h0, "sqdmlal v29.4s, v20.4h, v3.h[0]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal_4s_4h_h7, "sqdmlal v29.4s, v20.4h, v3.h[7]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal2_4s_8h_h1,"sqdmlal2 v29.4s, v20.8h, v3.h[1]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlal2_4s_8h_h4,"sqdmlal2 v29.4s, v20.8h, v3.h[1]",29,20,3)
+
+GEN_THREEVEC_TEST(sqdmlsl_2d_2s_s0, "sqdmlsl v29.2d, v20.2s, v3.s[0]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl_2d_2s_s3, "sqdmlsl v29.2d, v20.2s, v3.s[3]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl2_2d_4s_s1,"sqdmlsl2 v29.2d, v20.4s, v3.s[1]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl2_2d_4s_s2,"sqdmlsl2 v29.2d, v20.4s, v3.s[2]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl_4s_4h_h0, "sqdmlsl v29.4s, v20.4h, v3.h[0]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl_4s_4h_h7, "sqdmlsl v29.4s, v20.4h, v3.h[7]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl2_4s_8h_h1,"sqdmlsl2 v29.4s, v20.8h, v3.h[1]",29,20,3)
+GEN_THREEVEC_TEST(sqdmlsl2_4s_8h_h4,"sqdmlsl2 v29.4s, v20.8h, v3.h[1]",29,20,3)
+
+GEN_THREEVEC_TEST(sqdmull_2d_2s_s0, "sqdmull v29.2d, v20.2s, v3.s[0]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull_2d_2s_s3, "sqdmull v29.2d, v20.2s, v3.s[3]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull2_2d_4s_s1,"sqdmull2 v29.2d, v20.4s, v3.s[1]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull2_2d_4s_s2,"sqdmull2 v29.2d, v20.4s, v3.s[2]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull_4s_4h_h0, "sqdmull v29.4s, v20.4h, v3.h[0]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull_4s_4h_h7, "sqdmull v29.4s, v20.4h, v3.h[7]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull2_4s_8h_h1,"sqdmull2 v29.4s, v20.8h, v3.h[1]",29,20,3)
+GEN_THREEVEC_TEST(sqdmull2_4s_8h_h4,"sqdmull2 v29.4s, v20.8h, v3.h[1]",29,20,3)
+
+GEN_THREEVEC_TEST(sqdmlal_d_s_s, "sqdmlal d0, s8, s16", 0, 8, 16)
+GEN_THREEVEC_TEST(sqdmlal_s_h_h, "sqdmlal s0, h8, h16", 0, 8, 16)
+GEN_THREEVEC_TEST(sqdmlsl_d_s_s, "sqdmlsl d0, s8, s16", 0, 8, 16)
+GEN_THREEVEC_TEST(sqdmlsl_s_h_h, "sqdmlsl s0, h8, h16", 0, 8, 16)
+GEN_THREEVEC_TEST(sqdmull_d_s_s, "sqdmull d0, s8, s16", 0, 8, 16)
+GEN_THREEVEC_TEST(sqdmull_s_h_h, "sqdmull s0, h8, h16", 0, 8, 16)
+
+GEN_THREEVEC_TEST(sqdmlal_2d_2s_2s, "sqdmlal v2.2d, v11.2s, v29.2s", 2,11,29)
+GEN_THREEVEC_TEST(sqdmlal2_2d_4s_4s, "sqdmlal2 v2.2d, v11.4s, v29.4s", 2,11,29)
+GEN_THREEVEC_TEST(sqdmlal_4s_4h_4h, "sqdmlal v2.4s, v11.4h, v29.4h", 2,11,29)
+GEN_THREEVEC_TEST(sqdmlal2_4s_8h_8h, "sqdmlal2 v2.4s, v11.8h, v29.8h", 2,11,29)
+
+GEN_THREEVEC_TEST(sqdmlsl_2d_2s_2s, "sqdmlsl v2.2d, v11.2s, v29.2s", 2,11,29)
+GEN_THREEVEC_TEST(sqdmlsl2_2d_4s_4s, "sqdmlsl2 v2.2d, v11.4s, v29.4s", 2,11,29)
+GEN_THREEVEC_TEST(sqdmlsl_4s_4h_4h, "sqdmlsl v2.4s, v11.4h, v29.4h", 2,11,29)
+GEN_THREEVEC_TEST(sqdmlsl2_4s_8h_8h, "sqdmlsl2 v2.4s, v11.8h, v29.8h", 2,11,29)
+
+GEN_THREEVEC_TEST(sqdmull_2d_2s_2s, "sqdmull v2.2d, v11.2s, v29.2s", 2,11,29)
+GEN_THREEVEC_TEST(sqdmull2_2d_4s_4s, "sqdmull2 v2.2d, v11.4s, v29.4s", 2,11,29)
+GEN_THREEVEC_TEST(sqdmull_4s_4h_4h, "sqdmull v2.4s, v11.4h, v29.4h", 2,11,29)
+GEN_THREEVEC_TEST(sqdmull2_4s_8h_8h, "sqdmull2 v2.4s, v11.8h, v29.8h", 2,11,29)
+
+GEN_THREEVEC_TEST(sqdmulh_s_s_s1, "sqdmulh s0, s1, v2.s[1]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_s_s_s3, "sqdmulh s0, s1, v2.s[3]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_h_h_h2, "sqdmulh h0, h1, v2.h[2]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_h_h_h7, "sqdmulh h0, h1, v2.h[7]", 0,1,2)
+
+GEN_THREEVEC_TEST(sqrdmulh_s_s_s1, "sqrdmulh s0, s1, v2.s[1]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_s_s_s3, "sqrdmulh s0, s1, v2.s[3]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_h_h_h2, "sqrdmulh h0, h1, v2.h[2]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_h_h_h7, "sqrdmulh h0, h1, v2.h[7]", 0,1,2)
+
+GEN_THREEVEC_TEST(sqdmulh_4s_4s_s1, "sqdmulh v0.4s, v1.4s, v2.s[1]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_4s_4s_s3, "sqdmulh v0.4s, v1.4s, v2.s[3]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_2s_2s_s1, "sqdmulh v0.2s, v1.2s, v2.s[1]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_2s_2s_s3, "sqdmulh v0.2s, v1.2s, v2.s[3]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_8h_8h_h2, "sqdmulh v0.8h, v1.8h, v2.h[2]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_8h_8h_h7, "sqdmulh v0.8h, v1.8h, v2.h[7]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_4h_4h_h2, "sqdmulh v0.4h, v1.4h, v2.h[2]", 0,1,2)
+GEN_THREEVEC_TEST(sqdmulh_4h_4h_h7, "sqdmulh v0.4h, v1.4h, v2.h[7]", 0,1,2)
+
+GEN_THREEVEC_TEST(sqrdmulh_4s_4s_s1, "sqrdmulh v0.4s, v1.4s, v2.s[1]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_4s_4s_s3, "sqrdmulh v0.4s, v1.4s, v2.s[3]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_2s_2s_s1, "sqrdmulh v0.2s, v1.2s, v2.s[1]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_2s_2s_s3, "sqrdmulh v0.2s, v1.2s, v2.s[3]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_8h_8h_h2, "sqrdmulh v0.8h, v1.8h, v2.h[2]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_8h_8h_h7, "sqrdmulh v0.8h, v1.8h, v2.h[7]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_4h_4h_h2, "sqrdmulh v0.4h, v1.4h, v2.h[2]", 0,1,2)
+GEN_THREEVEC_TEST(sqrdmulh_4h_4h_h7, "sqrdmulh v0.4h, v1.4h, v2.h[7]", 0,1,2)
+
/* ---------------------------------------------------------------- */
/* -- main() -- */
@@ -2828,15 +3220,93 @@
test_uhsub_8b_8b_8b(TyB);
// shll{2} 8h_8b/16b_#8, 4s_4h/8h_#16, 2d_2s/4s_#32
-
- // shrn{2} 2s/4s_2d, 8h/4h_4s, 2s/4s_2d, #imm in 1 .. elem_bits
- // rshrn{2} 2s/4s_2d, 8h/4h_4s, 2s/4s_2d, #imm in 1 .. elem_bits
+ test_shll_8h_8b_8(TyB);
+ test_shll2_8h_16b_8(TyB);
+ test_shll_4s_4h_16(TyH);
+ test_shll2_4s_8h_16(TyH);
+ test_shll_2d_2s_32(TyS);
+ test_shll2_2d_4s_32(TyS);
+
+ // shrn{2} 2s/4s_2d, 8h/4h_4s, 8b/16b_8h, #imm in 1 .. elem_bits
+ // rshrn{2} 2s/4s_2d, 8h/4h_4s, 8b/16b_8h, #imm in 1 .. elem_bits
+ test_shrn_2s_2d_1(TyD);
+ test_shrn_2s_2d_32(TyD);
+ test_shrn2_4s_2d_1(TyD);
+ test_shrn2_4s_2d_32(TyD);
+ test_shrn_4h_4s_1(TyS);
+ test_shrn_4h_4s_16(TyS);
+ test_shrn2_8h_4s_1(TyS);
+ test_shrn2_8h_4s_16(TyS);
+ test_shrn_8b_8h_1(TyH);
+ test_shrn_8b_8h_8(TyH);
+ test_shrn2_16b_8h_1(TyH);
+ test_shrn2_16b_8h_8(TyH);
+ test_rshrn_2s_2d_1(TyD);
+ test_rshrn_2s_2d_32(TyD);
+ test_rshrn2_4s_2d_1(TyD);
+ test_rshrn2_4s_2d_32(TyD);
+ test_rshrn_4h_4s_1(TyS);
+ test_rshrn_4h_4s_16(TyS);
+ test_rshrn2_8h_4s_1(TyS);
+ test_rshrn2_8h_4s_16(TyS);
+ test_rshrn_8b_8h_1(TyH);
+ test_rshrn_8b_8h_8(TyH);
+ test_rshrn2_16b_8h_1(TyH);
+ test_rshrn2_16b_8h_8(TyH);
// sli d_#imm
// sri d_#imm
+ test_sli_d_d_0(TyD);
+ test_sli_d_d_32(TyD);
+ test_sli_d_d_63(TyD);
+ test_sri_d_d_1(TyD);
+ test_sri_d_d_33(TyD);
+ test_sri_d_d_64(TyD);
// sli 2d,4s,2s,8h,4h,16b,8b _#imm
// sri 2d,4s,2s,8h,4h,16b,8b _#imm
+ test_sli_2d_2d_0(TyD);
+ test_sli_2d_2d_32(TyD);
+ test_sli_2d_2d_63(TyD);
+ test_sli_4s_4s_0(TyS);
+ test_sli_4s_4s_16(TyS);
+ test_sli_4s_4s_31(TyS);
+ test_sli_2s_2s_0(TyS);
+ test_sli_2s_2s_16(TyS);
+ test_sli_2s_2s_31(TyS);
+ test_sli_8h_8h_0(TyH);
+ test_sli_8h_8h_8(TyH);
+ test_sli_8h_8h_15(TyH);
+ test_sli_4h_4h_0(TyH);
+ test_sli_4h_4h_8(TyH);
+ test_sli_4h_4h_15(TyH);
+ test_sli_16b_16b_0(TyB);
+ test_sli_16b_16b_3(TyB);
+ test_sli_16b_16b_7(TyB);
+ test_sli_8b_8b_0(TyB);
+ test_sli_8b_8b_3(TyB);
+ test_sli_8b_8b_7(TyB);
+ test_sri_2d_2d_1(TyD);
+ test_sri_2d_2d_33(TyD);
+ test_sri_2d_2d_64(TyD);
+ test_sri_4s_4s_1(TyS);
+ test_sri_4s_4s_17(TyS);
+ test_sri_4s_4s_32(TyS);
+ test_sri_2s_2s_1(TyS);
+ test_sri_2s_2s_17(TyS);
+ test_sri_2s_2s_32(TyS);
+ test_sri_8h_8h_1(TyH);
+ test_sri_8h_8h_8(TyH);
+ test_sri_8h_8h_16(TyH);
+ test_sri_4h_4h_1(TyH);
+ test_sri_4h_4h_8(TyH);
+ test_sri_4h_4h_16(TyH);
+ test_sri_16b_16b_1(TyB);
+ test_sri_16b_16b_4(TyB);
+ test_sri_16b_16b_8(TyB);
+ test_sri_8b_8b_1(TyB);
+ test_sri_8b_8b_4(TyB);
+ test_sri_8b_8b_8(TyB);
// smax 4s,2s,8h,4h,16b,8b
// umax 4s,2s,8h,4h,16b,8b
@@ -2871,6 +3341,30 @@
// umaxp 4s,2s,8h,4h,16b,8b
// sminp 4s,2s,8h,4h,16b,8b
// uminp 4s,2s,8h,4h,16b,8b
+ test_smaxp_4s_4s_4s(TyS);
+ test_smaxp_2s_2s_2s(TyS);
+ test_smaxp_8h_8h_8h(TyH);
+ test_smaxp_4h_4h_4h(TyH);
+ test_smaxp_16b_16b_16b(TyB);
+ test_smaxp_8b_8b_8b(TyB);
+ test_umaxp_4s_4s_4s(TyS);
+ test_umaxp_2s_2s_2s(TyS);
+ test_umaxp_8h_8h_8h(TyH);
+ test_umaxp_4h_4h_4h(TyH);
+ test_umaxp_16b_16b_16b(TyB);
+ test_umaxp_8b_8b_8b(TyB);
+ test_sminp_4s_4s_4s(TyS);
+ test_sminp_2s_2s_2s(TyS);
+ test_sminp_8h_8h_8h(TyH);
+ test_sminp_4h_4h_4h(TyH);
+ test_sminp_16b_16b_16b(TyB);
+ test_sminp_8b_8b_8b(TyB);
+ test_uminp_4s_4s_4s(TyS);
+ test_uminp_2s_2s_2s(TyS);
+ test_uminp_8h_8h_8h(TyH);
+ test_uminp_4h_4h_4h(TyH);
+ test_uminp_16b_16b_16b(TyB);
+ test_uminp_8b_8b_8b(TyB);
// smaxv s_4s,h_8h,h_4h,b_16b,b_8b
// umaxv s_4s,h_8h,h_4h,b_16b,b_8b
@@ -2887,6 +3381,54 @@
// umlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[]
// smull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[]
// umull{2} 2d_2s/4s_s[]. 4s_4h/8h_h[]
+ test_smlal_2d_2s_s0(TyS);
+ test_smlal_2d_2s_s3(TyS);
+ test_smlal2_2d_4s_s1(TyS);
+ test_smlal2_2d_4s_s2(TyS);
+ test_smlal_4s_4h_h0(TyH);
+ test_smlal_4s_4h_h7(TyH);
+ test_smlal2_4s_8h_h1(TyH);
+ test_smlal2_4s_8h_h4(TyH);
+ test_umlal_2d_2s_s0(TyS);
+ test_umlal_2d_2s_s3(TyS);
+ test_umlal2_2d_4s_s1(TyS);
+ test_umlal2_2d_4s_s2(TyS);
+ test_umlal_4s_4h_h0(TyH);
+ test_umlal_4s_4h_h7(TyH);
+ test_umlal2_4s_8h_h1(TyH);
+ test_umlal2_4s_8h_h4(TyH);
+ test_smlsl_2d_2s_s0(TyS);
+ test_smlsl_2d_2s_s3(TyS);
+ test_smlsl2_2d_4s_s1(TyS);
+ test_smlsl2_2d_4s_s2(TyS);
+ test_smlsl_4s_4h_h0(TyH);
+ test_smlsl_4s_4h_h7(TyH);
+ test_smlsl2_4s_8h_h1(TyH);
+ test_smlsl2_4s_8h_h4(TyH);
+ test_umlsl_2d_2s_s0(TyS);
+ test_umlsl_2d_2s_s3(TyS);
+ test_umlsl2_2d_4s_s1(TyS);
+ test_umlsl2_2d_4s_s2(TyS);
+ test_umlsl_4s_4h_h0(TyH);
+ test_umlsl_4s_4h_h7(TyH);
+ test_umlsl2_4s_8h_h1(TyH);
+ test_umlsl2_4s_8h_h4(TyH);
+ test_smull_2d_2s_s0(TyS);
+ test_smull_2d_2s_s3(TyS);
+ test_smull2_2d_4s_s1(TyS);
+ test_smull2_2d_4s_s2(TyS);
+ test_smull_4s_4h_h0(TyH);
+ test_smull_4s_4h_h7(TyH);
+ test_smull2_4s_8h_h1(TyH);
+ test_smull2_4s_8h_h4(TyH);
+ test_umull_2d_2s_s0(TyS);
+ test_umull_2d_2s_s3(TyS);
+ test_umull2_2d_4s_s1(TyS);
+ test_umull2_2d_4s_s2(TyS);
+ test_umull_4s_4h_h0(TyH);
+ test_umull_4s_4h_h7(TyH);
+ test_umull2_4s_8h_h1(TyH);
+ test_umull2_4s_8h_h4(TyH);
// smlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// umlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
@@ -2894,10 +3436,45 @@
// umlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// smull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
// umull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h), 8h_(8b_8b)/(16b_16b)
+ test_smlal_2d_2s_2s(TyS);
+ test_smlal2_2d_4s_4s(TyS);
+ test_smlal_4s_4h_4h(TyH);
+ test_smlal2_4s_8h_8h(TyH);
+ test_smlal_8h_8b_8b(TyB);
+ test_smlal2_8h_16b_16b(TyB);
+ test_umlal_2d_2s_2s(TyS);
+ test_umlal2_2d_4s_4s(TyS);
+ test_umlal_4s_4h_4h(TyH);
+ test_umlal2_4s_8h_8h(TyH);
+ test_umlal_8h_8b_8b(TyB);
+ test_umlal2_8h_16b_16b(TyB);
+ test_smlsl_2d_2s_2s(TyS);
+ test_smlsl2_2d_4s_4s(TyS);
+ test_smlsl_4s_4h_4h(TyH);
+ test_smlsl2_4s_8h_8h(TyH);
+ test_smlsl_8h_8b_8b(TyB);
+ test_smlsl2_8h_16b_16b(TyB);
+ test_umlsl_2d_2s_2s(TyS);
+ test_umlsl2_2d_4s_4s(TyS);
+ test_umlsl_4s_4h_4h(TyH);
+ test_umlsl2_4s_8h_8h(TyH);
+ test_umlsl_8h_8b_8b(TyB);
+ test_umlsl2_8h_16b_16b(TyB);
+ test_smull_2d_2s_2s(TyS);
+ test_smull2_2d_4s_4s(TyS);
+ test_smull_4s_4h_4h(TyH);
+ test_smull2_4s_8h_8h(TyH);
+ test_smull_8h_8b_8b(TyB);
+ test_smull2_8h_16b_16b(TyB);
+ test_umull_2d_2s_2s(TyS);
+ test_umull2_2d_4s_4s(TyS);
+ test_umull_4s_4h_4h(TyH);
+ test_umull2_4s_8h_8h(TyH);
+ test_umull_8h_8b_8b(TyB);
+ test_umull2_8h_16b_16b(TyB);
// smov w_b[], w_h[], x_b[], x_h[], x_s[]
- // umov w_b[], w_h[], x_b[], x_h[], x_s[]
- // INCOMPLETE
+ // umov w_b[], w_h[], w_s[], x_d[]
test_umov_x_d0(TyD);
test_umov_x_d1(TyD);
test_umov_w_s0(TyS);
@@ -2919,41 +3496,185 @@
// sqabs d,s,h,b
// sqneg d,s,h,b
+ test_sqabs_d_d(TyD);
+ test_sqabs_s_s(TyS);
+ test_sqabs_h_h(TyH);
+ test_sqabs_b_b(TyB);
+ test_sqneg_d_d(TyD);
+ test_sqneg_s_s(TyS);
+ test_sqneg_h_h(TyH);
+ test_sqneg_b_b(TyB);
// sqabs 2d,4s,2s,8h,4h,16b,8b
// sqneg 2d,4s,2s,8h,4h,16b,8b
+ test_sqabs_2d_2d(TyD);
+ test_sqabs_4s_4s(TyS);
+ test_sqabs_2s_2s(TyS);
+ test_sqabs_8h_8h(TyH);
+ test_sqabs_4h_4h(TyH);
+ test_sqabs_16b_16b(TyB);
+ test_sqabs_8b_8b(TyB);
+ test_sqneg_2d_2d(TyD);
+ test_sqneg_4s_4s(TyS);
+ test_sqneg_2s_2s(TyS);
+ test_sqneg_8h_8h(TyH);
+ test_sqneg_4h_4h(TyH);
+ test_sqneg_16b_16b(TyB);
+ test_sqneg_8b_8b(TyB);
// sqadd d,s,h,b
// uqadd d,s,h,b
// sqsub d,s,h,b
// uqsub d,s,h,b
+ test_sqadd_d_d_d(TyD);
+ test_sqadd_s_s_s(TyS);
+ test_sqadd_h_h_h(TyH);
+ test_sqadd_b_b_b(TyB);
+ test_uqadd_d_d_d(TyD);
+ test_uqadd_s_s_s(TyS);
+ test_uqadd_h_h_h(TyH);
+ test_uqadd_b_b_b(TyB);
+ test_sqsub_d_d_d(TyD);
+ test_sqsub_s_s_s(TyS);
+ test_sqsub_h_h_h(TyH);
+ test_sqsub_b_b_b(TyB);
+ test_uqsub_d_d_d(TyD);
+ test_uqsub_s_s_s(TyS);
+ test_uqsub_h_h_h(TyH);
+ test_uqsub_b_b_b(TyB);
// sqadd 2d,4s,2s,8h,4h,16b,8b
// uqadd 2d,4s,2s,8h,4h,16b,8b
// sqsub 2d,4s,2s,8h,4h,16b,8b
// uqsub 2d,4s,2s,8h,4h,16b,8b
+ test_sqadd_2d_2d_2d(TyD);
+ test_sqadd_4s_4s_4s(TyS);
+ test_sqadd_2s_2s_2s(TyS);
+ test_sqadd_8h_8h_8h(TyH);
+ test_sqadd_4h_4h_4h(TyH);
+ test_sqadd_16b_16b_16b(TyB);
+ test_sqadd_8b_8b_8b(TyB);
+ test_uqadd_2d_2d_2d(TyD);
+ test_uqadd_4s_4s_4s(TyS);
+ test_uqadd_2s_2s_2s(TyS);
+ test_uqadd_8h_8h_8h(TyH);
+ test_uqadd_4h_4h_4h(TyH);
+ test_uqadd_16b_16b_16b(TyB);
+ test_uqadd_8b_8b_8b(TyB);
+ test_sqsub_2d_2d_2d(TyD);
+ test_sqsub_4s_4s_4s(TyS);
+ test_sqsub_2s_2s_2s(TyS);
+ test_sqsub_8h_8h_8h(TyH);
+ test_sqsub_4h_4h_4h(TyH);
+ test_sqsub_16b_16b_16b(TyB);
+ test_sqsub_8b_8b_8b(TyB);
+ test_uqsub_2d_2d_2d(TyD);
+ test_uqsub_4s_4s_4s(TyS);
+ test_uqsub_2s_2s_2s(TyS);
+ test_uqsub_8h_8h_8h(TyH);
+ test_uqsub_4h_4h_4h(TyH);
+ test_uqsub_16b_16b_16b(TyB);
+ test_uqsub_8b_8b_8b(TyB);
// sqdmlal d_s_s[], s_h_h[]
// sqdmlsl d_s_s[], s_h_h[]
// sqdmull d_s_s[], s_h_h[]
+ test_sqdmlal_d_s_s0(TyS);
+ test_sqdmlal_d_s_s3(TyS);
+ test_sqdmlal_s_h_h1(TyH);
+ test_sqdmlal_s_h_h5(TyH);
+ test_sqdmlsl_d_s_s0(TyS);
+ test_sqdmlsl_d_s_s3(TyS);
+ test_sqdmlsl_s_h_h1(TyH);
+ test_sqdmlsl_s_h_h5(TyH);
+ test_sqdmull_d_s_s0(TyS);
+ test_sqdmull_d_s_s3(TyS);
+ test_sqdmull_s_h_h1(TyH);
+ test_sqdmull_s_h_h5(TyH);
// sqdmlal{2} 2d_2s/4s_s[], 4s_4h/8h_h[]
// sqdmlsl{2} 2d_2s/4s_s[], 4s_4h/8h_h[]
// sqdmull{2} 2d_2s/4s_s[], 4s_4h/2h_h[]
+ test_sqdmlal_2d_2s_s0(TyS);
+ test_sqdmlal_2d_2s_s3(TyS);
+ test_sqdmlal2_2d_4s_s1(TyS);
+ test_sqdmlal2_2d_4s_s2(TyS);
+ test_sqdmlal_4s_4h_h0(TyH);
+ test_sqdmlal_4s_4h_h7(TyH);
+ test_sqdmlal2_4s_8h_h1(TyH);
+ test_sqdmlal2_4s_8h_h4(TyH);
+ test_sqdmlsl_2d_2s_s0(TyS);
+ test_sqdmlsl_2d_2s_s3(TyS);
+ test_sqdmlsl2_2d_4s_s1(TyS);
+ test_sqdmlsl2_2d_4s_s2(TyS);
+ test_sqdmlsl_4s_4h_h0(TyH);
+ test_sqdmlsl_4s_4h_h7(TyH);
+ test_sqdmlsl2_4s_8h_h1(TyH);
+ test_sqdmlsl2_4s_8h_h4(TyH);
+ test_sqdmull_2d_2s_s0(TyS);
+ test_sqdmull_2d_2s_s3(TyS);
+ test_sqdmull2_2d_4s_s1(TyS);
+ test_sqdmull2_2d_4s_s2(TyS);
+ test_sqdmull_4s_4h_h0(TyH);
+ test_sqdmull_4s_4h_h7(TyH);
+ test_sqdmull2_4s_8h_h1(TyH);
+ test_sqdmull2_4s_8h_h4(TyH);
// sqdmlal d_s_s, s_h_h
// sqdmlsl d_s_s, s_h_h
// sqdmull d_s_s, s_h_h
+ test_sqdmlal_d_s_s(TyS);
+ test_sqdmlal_s_h_h(TyH);
+ test_sqdmlsl_d_s_s(TyS);
+ test_sqdmlsl_s_h_h(TyH);
+ test_sqdmull_d_s_s(TyS);
+ test_sqdmull_s_h_h(TyH);
// sqdmlal{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h)
// sqdmlsl{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h)
// sqdmull{2} 2d_(2s_2s)/(4s_4s), 4s_(4h_4h)/(8h_8h)
+ test_sqdmlal_2d_2s_2s(TyS);
+ test_sqdmlal2_2d_4s_4s(TyS);
+ test_sqdmlal_4s_4h_4h(TyH);
+ test_sqdmlal2_4s_8h_8h(TyH);
+ test_sqdmlsl_2d_2s_2s(TyS);
+ test_sqdmlsl2_2d_4s_4s(TyS);
+ test_sqdmlsl_4s_4h_4h(TyH);
+ test_sqdmlsl2_4s_8h_8h(TyH);
+ test_sqdmull_2d_2s_2s(TyS);
+ test_sqdmull2_2d_4s_4s(TyS);
+ test_sqdmull_4s_4h_4h(TyH);
+ test_sqdmull2_4s_8h_8h(TyH);
// sqdmulh s_s_s[], h_h_h[]
// sqrdmulh s_s_s[], h_h_h[]
+ test_sqdmulh_s_s_s1(TyS);
+ test_sqdmulh_s_s_s3(TyS);
+ test_sqdmulh_h_h_h2(TyH);
+ test_sqdmulh_h_h_h7(TyH);
+ test_sqrdmulh_s_s_s1(TyS);
+ test_sqrdmulh_s_s_s3(TyS);
+ test_sqrdmulh_h_h_h2(TyH);
+ test_sqrdmulh_h_h_h7(TyH);
// sqdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[]
// sqrdmulh 4s_4s_s[], 2s_2s_s[], 8h_8h_h[], 4h_4h_h[]
+ test_sqdmulh_4s_4s_s1(TyS);
+ test_sqdmulh_4s_4s_s3(TyS);
+ test_sqdmulh_2s_2s_s1(TyS);
+ test_sqdmulh_2s_2s_s3(TyS);
+ test_sqdmulh_8h_8h_h2(TyH);
+ test_sqdmulh_8h_8h_h7(TyH);
+ test_sqdmulh_4h_4h_h2(TyH);
+ test_sqdmulh_4h_4h_h7(TyH);
+ test_sqrdmulh_4s_4s_s1(TyS);
+ test_sqrdmulh_4s_4s_s3(TyS);
+ test_sqrdmulh_2s_2s_s1(TyS);
+ test_sqrdmulh_2s_2s_s3(TyS);
+ test_sqrdmulh_8h_8h_h2(TyH);
+ test_sqrdmulh_8h_8h_h7(TyH);
+ test_sqrdmulh_4h_4h_h2(TyH);
+ test_sqrdmulh_4h_4h_h7(TyH);
// sqdmulh h,s
// sqrdmulh h,s
|
|
From: <sv...@va...> - 2014-05-13 09:29:41
|
Author: sewardj
Date: Tue May 13 09:29:33 2014
New Revision: 13955
Log:
Minor updates.
Modified:
trunk/NEWS
trunk/README.android
Modified: trunk/NEWS
==============================================================================
--- trunk/NEWS (original)
+++ trunk/NEWS Tue May 13 09:29:33 2014
@@ -63,6 +63,7 @@
where XXXXXX is the bug number as listed below.
175819 Support for ipv6 socket reporting with --track-fds
+232510 make distcheck fails
308729 vex x86->IR: unhandled instruction bytes 0xf 0x5 (syscall)
325110 Add test-cases for Power ISA 2.06 insns: divdo/divdo. and divduo/divduo.
325124 [MIPSEL] Compilation error
Modified: trunk/README.android
==============================================================================
--- trunk/README.android (original)
+++ trunk/README.android Tue May 13 09:29:33 2014
@@ -32,6 +32,8 @@
For the android emulator, the versions needed and how to
install them are described in README.android_emulator.
+You can get android-ndk-r6 from
+http://dl.google.com/android/ndk/android-ndk-r6-linux-x86.tar.bz2
Install it somewhere. Doesn't matter where. Then do this:
|
|
From: <sv...@va...> - 2014-05-13 09:28:30
|
Author: sewardj
Date: Tue May 13 09:28:19 2014
New Revision: 13954
Log:
Update.
Modified:
trunk/docs/internals/3_9_BUGSTATUS.txt
Modified: trunk/docs/internals/3_9_BUGSTATUS.txt
==============================================================================
--- trunk/docs/internals/3_9_BUGSTATUS.txt (original)
+++ trunk/docs/internals/3_9_BUGSTATUS.txt Tue May 13 09:28:19 2014
@@ -6,15 +6,14 @@
325328 __float128 loses precision under memcheck
== 197915
-326469 amd64->IR: 0x66 0xF 0x3A 0x63 0xC1 0xE 0x89 0xC8 (pcmpistri)
+326469 amd64->IR: 0x66 0xF 0x3A 0x63 0xC1 0xE (pcmpistri 0x0E)
326821 Double overflow/underflow handling broken (after exp())
327285 amd64->IR: 0x8F 0xEA 0xF8 0x10 0xCE 0x3 0x1D 0x0
- == 323431
+ == 323431 (probably amd specific, vpcmov)
327639 vex amd64->IR pcmpestri SSE4.2 instruction is unsupported 0x34
328878 vex amd64->IR pcmpestri SSE4.2 instruction is unsupported 0x14
-328089 amd64->IR: 0xF0 0xF 0xC0 0x10
328357 amd64->IR: 0x8F 0xEA 0xF8 0x10 0xEF 0x3 0x5 0x0
-329245 amd64->IR: 0x48 0xF 0x5A 0x7 0x48 0xF 0x5A 0x4F
+329245 amd64->IR: 0x48 0xF 0x5A 0x7 (rex.W cvtps2pd (%rdi),%xmm0)
330319 amd64->IR: 0xF 0x1 0xD5 0x31 0xC0 0xC3 0x48 0x8D (xend)
330590 Missing support for multiple VEX CMP instruction Opcodes (Causes SIGILL)
330808 Crash with Intel IPP samples (MMX related assertion)
@@ -65,6 +64,7 @@
333788 Valgrind does not support the CDROM_DISC_STATUS ioctl (has patch)
333817 Valgrind reports the memory areas written to by the SG_IO
ioctl as untouched
+334585 recvmmsg unhandled (+patch) (arm)
=== Debuginfo reader ===================================================
@@ -108,7 +108,6 @@
Assertion '!already_present' failed.
332591 False positive: invalid read in vfprintf (KNOWN BUG)
-
=== Tools/Massif =======================================================
332765 ms_print reports bad error if temp file can't be created
@@ -128,6 +127,9 @@
Error: illegal operands `cfc1 $t0,$31'
331126 Compiling with mipsbe toolchain
331314 [MIPS]Valgrind crash just after startup
+334649 Cavium Octeon 2 MIPS64: valgrind is up but ld.so assert
+ "rtld.c: 1257: dl_main: Assertion
+ '_rtld_local._dl_rtld_map.l_relocated' failed" and exits
=== other/arm ==========================================================
@@ -171,9 +173,11 @@
328721 MSVC 2008 compiler warns about while(0) in warning level 4
330293 Please add a AppData application description (Valkyrie)
333628 Out of tree build
+ == 256174
334110 Why install internal headers/libraries/.pc file?
+n-i-bz Fix mingw64 support in valgrind.h (dev@, 9 May 2014)
========================================================================
========================================================================
-Fri May 9 13:17:50 CEST 2014
+Mon May 12 16:19:52 CEST 2014
|
|
From: Philippe W. <phi...@sk...> - 2014-05-13 04:43:36
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora (7.5.1-37.fc18) Assembler: GNU assembler version 2.23.51.0.1-7.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.8.8-202.fc18.ppc64p7 ppc64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on gcc110 ( Fedora release 18 (Spherical Cow), ppc64 ) Started at 2014-05-12 20:00:08 PDT Ended at 2014-05-12 21:40:21 PDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 578 tests, 32 stderr failures, 3 stdout failures, 0 stderrB failures, 0 stdoutB failures, 2 post failures == memcheck/tests/linux/getregset (stdout) memcheck/tests/linux/getregset (stderr) memcheck/tests/ppc64/power_ISA2_05 (stdout) memcheck/tests/supp_unknown (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) helgrind/tests/annotate_rwlock (stderr) helgrind/tests/free_is_write (stderr) helgrind/tests/hg02_deadlock (stderr) helgrind/tests/hg03_inherit (stderr) helgrind/tests/hg04_race (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/locked_vs_unlocked1_fwd (stderr) helgrind/tests/locked_vs_unlocked1_rev (stderr) helgrind/tests/locked_vs_unlocked2 (stderr) helgrind/tests/locked_vs_unlocked3 (stderr) helgrind/tests/pth_barrier1 (stderr) helgrind/tests/pth_barrier2 (stderr) helgrind/tests/pth_barrier3 (stderr) helgrind/tests/pth_cond_destroy_busy (stderr) helgrind/tests/pth_destroy_cond (stderr) helgrind/tests/rwlock_race (stderr) helgrind/tests/tc01_simple_race (stderr) helgrind/tests/tc05_simple_race (stderr) helgrind/tests/tc06_two_races (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) helgrind/tests/tc14_laog_dinphils (stderr) helgrind/tests/tc16_byterace (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc19_shadowmem (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.26s no: 1.7s ( 6.6x, -----) me: 3.0s (11.5x, -----) ca:18.1s (69.8x, -----) he: 1.9s ( 7.2x, -----) ca: 5.8s (22.4x, -----) dr: 1.9s ( 7.2x, -----) ma: 2.2s ( 8.3x, -----) bigcode1 valgrind-old:0.26s no: 1.5s ( 5.8x, 11.1%) me: 3.0s (11.6x, -0.7%) ca:18.1s (69.4x, 0.6%) he: 1.8s ( 7.1x, 2.1%) ca: 5.4s (20.9x, 6.5%) dr: 1.7s ( 6.5x, 8.6%) ma: 2.2s ( 8.7x, -4.2%) -- bigcode2 -- bigcode2 valgrind-new:0.26s no: 1.7s ( 6.6x, -----) me: 3.2s (12.3x, -----) ca:18.8s (72.4x, -----) he: 2.1s ( 8.0x, -----) ca: 5.4s (20.8x, -----) dr: 1.8s ( 7.0x, -----) ma: 2.1s ( 8.3x, -----) bigcode2 valgrind-old:0.26s no: 1.5s ( 5.8x, 11.6%) me: 2.9s (11.2x, 8.8%) ca:18.2s (70.2x, 3.1%) he: 2.1s ( 8.1x, -0.5%) ca: 5.4s (20.8x, 0.0%) dr: 1.8s ( 7.1x, -0.5%) ma: 2.1s ( 8.2x, 0.9%) -- bz2 -- bz2 valgrind-new:0.72s no: 4.6s ( 6.4x, -----) me:11.6s (16.0x, -----) ca:25.9s (36.0x, -----) he:14.6s (20.2x, -----) ca:24.2s (33.6x, -----) dr:19.1s (26.5x, -----) ma: 4.7s ( 6.5x, -----) bz2 valgrind-old:0.72s no: 4.6s ( 6.3x, 0.7%) me:11.6s (16.0x, 0.0%) ca:25.8s (35.9x, 0.4%) he:14.9s (20.7x, -2.4%) ca:24.5s (34.1x, -1.4%) dr:19.2s (26.7x, -0.8%) ma: 4.7s ( 6.5x, -0.2%) -- fbench -- fbench valgrind-new:0.34s no: 2.1s ( 6.2x, -----) me: 5.2s (15.3x, -----) ca: 8.5s (25.0x, -----) he: 5.2s (15.4x, -----) ca: 7.4s (21.9x, -----) dr: 4.8s (14.2x, -----) ma: 2.1s ( 6.3x, -----) fbench valgrind-old:0.34s no: 2.1s ( 6.2x, -0.5%) me: 5.2s (15.3x, -0.4%) ca: 8.4s (24.9x, 0.7%) he: 5.4s (15.8x, -2.5%) ca: 8.1s (23.9x, -9.2%) dr: 4.9s (14.4x, -1.0%) ma: 2.1s ( 6.3x, 0.0%) -- ffbench -- ffbench valgrind-new:0.45s no: 1.3s ( 2.9x, -----) me: 2.4s ( 5.4x, -----) ca: 2.5s ( 5.6x, -----) he: 7.0s (15.6x, -----) ca: 7.3s (16.2x, -----) dr: 4.9s (10.9x, -----) ma: 1.1s ( 2.4x, -----) ffbench valgrind-old:0.45s no: 1.3s ( 2.9x, 0.0%) me: 2.4s ( 5.4x, -0.4%) ca: 2.5s ( 5.6x, -0.4%) he: 7.1s (15.8x, -0.9%) ca: 7.2s (16.1x, 1.1%) dr: 5.0s (11.0x, -0.8%) ma: 1.1s ( 2.4x, -0.9%) -- heap -- heap valgrind-new:0.41s no: 2.4s ( 5.9x, -----) me: 9.7s (23.6x, -----) ca:13.1s (32.0x, -----) he:12.1s (29.4x, -----) ca:12.1s (29.5x, -----) dr: 8.6s (20.9x, -----) ma: 8.7s (21.3x, -----) heap valgrind-old:0.41s no: 2.5s ( 6.0x, -1.2%) me: 9.7s (23.5x, 0.2%) ca:13.2s (32.3x, -0.8%) he:12.2s (29.6x, -0.7%) ca:12.1s (29.5x, 0.1%) dr: 8.5s (20.6x, 1.3%) ma: 8.7s (21.1x, 0.7%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.42s no: 2.7s ( 6.3x, -----) me:13.7s (32.7x, -----) ca:14.2s (33.8x, -----) he:13.5s (32.1x, -----) ca:13.1s (31.3x, -----) dr: 9.4s (22.5x, -----) ma: 8.9s (21.2x, -----) heap_pdb4 valgrind-old:0.42s no: 2.6s ( 6.2x, 1.9%) me:13.7s (32.6x, 0.1%) ca:14.1s (33.6x, 0.7%) he:13.4s (31.9x, 0.8%) ca:13.1s (31.2x, 0.2%) dr: 9.5s (22.7x, -1.0%) ma: 8.9s (21.2x, 0.1%) -- many-loss-records -- many-loss-records valgrind-new:0.03s no: 0.5s (17.7x, -----) me: 2.2s (72.7x, -----) ca: 1.9s (63.7x, -----) he: 1.8s (61.0x, -----) ca: 1.9s (62.3x, -----) dr: 1.6s (53.3x, -----) ma: 1.6s (52.3x, -----) many-loss-records valgrind-old:0.03s no: 0.5s (18.0x, -1.9%) me: 2.2s (72.7x, 0.0%) ca: 1.9s (62.7x, 1.6%) he: 1.8s (61.3x, -0.5%) ca: 1.9s (61.7x, 1.1%) dr: 1.6s (53.7x, -0.6%) ma: 1.6s (52.0x, 0.6%) -- many-xpts -- many-xpts valgrind-new:0.06s no: 0.7s (12.3x, -----) me: 3.4s (56.3x, -----) ca: 4.7s (78.3x, -----) he: 4.9s (81.5x, -----) ca: 2.9s (48.0x, -----) dr: 2.4s (39.5x, -----) ma: 2.3s (37.8x, -----) many-xpts valgrind-old:0.06s no: 0.7s (12.3x, 0.0%) me: 3.4s (56.2x, 0.3%) ca: 4.7s (78.5x, -0.2%) he: 4.9s (81.3x, 0.2%) ca: 2.9s (48.0x, 0.0%) dr: 2.4s (39.2x, 0.8%) ma: 2.3s (37.8x, 0.0%) -- sarp -- sarp valgrind-new:0.02s no: 0.4s (20.0x, -----) me: 3.0s (151.5x, -----) ca: 3.0s (149.5x, -----) he:11.2s (562.0x, -----) ca: 1.9s (95.0x, -----) dr: 1.1s (55.0x, -----) ma: 0.4s (21.0x, -----) sarp valgrind-old:0.02s no: 0.4s (19.5x, 2.5%) me: 3.0s (151.0x, 0.3%) ca: 3.0s (148.5x, 0.7%) he:11.1s (557.0x, 0.9%) ca: 1.8s (88.5x, 6.8%) dr: 1.1s (54.5x, 0.9%) ma: 0.4s (20.5x, 2.4%) -- tinycc -- tinycc valgrind-new:0.27s no: 3.0s (11.1x, -----) me:13.8s (51.1x, -----) ca:17.4s (64.3x, -----) he:19.0s (70.5x, -----) ca:15.7s (58.0x, -----) dr:12.1s (44.7x, -----) ma: 3.8s (14.1x, -----) tinycc valgrind-old:0.27s no: 3.0s (11.0x, 0.7%) me:13.8s (51.0x, 0.3%) ca:17.3s (64.0x, 0.5%) he:19.0s (70.3x, 0.4%) ca:15.6s (57.7x, 0.5%) dr:12.1s (44.7x, 0.0%) ma: 3.8s (14.1x, 0.0%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 53m42.310s user 52m27.913s sys 0m19.103s |
|
From: Christian B. <bor...@de...> - 2014-05-13 04:17:40
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.5.1-0.7.29) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.23.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.101-0.21-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP3 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP3 gcc 4.3.4 on z196 (s390x) ) Started at 2014-05-13 03:45:01 CEST Ended at 2014-05-13 06:17:28 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 645 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/pth_cond_destroy_busy (stderr) --tools=none,memcheck,callgrind,helgrind,cachegrind,drd,massif --reps=3 --vg=../valgrind-new --vg=../valgrind-old -- Running tests in perf ---------------------------------------------- -- bigcode1 -- bigcode1 valgrind-new:0.22s no: 4.3s (19.6x, -----) me: 6.9s (31.3x, -----) ca:26.4s (119.8x, -----) he: 5.1s (23.0x, -----) ca: 9.1s (41.5x, -----) dr: 5.4s (24.5x, -----) ma: 4.6s (20.9x, -----) bigcode1 valgrind-old:0.22s no: 4.3s (19.6x, 0.0%) me: 6.9s (31.5x, -0.4%) ca:26.3s (119.7x, 0.0%) he: 5.1s (23.0x, 0.2%) ca: 9.2s (41.6x, -0.2%) dr: 5.4s (24.4x, 0.2%) ma: 4.6s (20.9x, 0.0%) -- bigcode2 -- bigcode2 valgrind-new:0.24s no: 7.2s (30.1x, -----) me:13.8s (57.5x, -----) ca:39.6s (164.8x, -----) he:10.1s (42.1x, -----) ca:14.2s (59.4x, -----) dr: 9.7s (40.3x, -----) ma: 8.1s (33.8x, -----) bigcode2 valgrind-old:0.24s no: 7.2s (29.9x, 0.6%) me:13.9s (57.9x, -0.7%) ca:39.5s (164.4x, 0.3%) he:10.1s (42.0x, 0.1%) ca:14.3s (59.5x, -0.2%) dr: 9.5s (39.8x, 1.3%) ma: 8.1s (33.5x, 0.6%) -- bz2 -- bz2 valgrind-new:0.69s no: 5.1s ( 7.4x, -----) me:12.7s (18.3x, -----) ca:30.6s (44.3x, -----) he:19.6s (28.4x, -----) ca:34.3s (49.7x, -----) dr:29.4s (42.7x, -----) ma: 3.9s ( 5.6x, -----) bz2 valgrind-old:0.69s no: 5.1s ( 7.4x, 0.0%) me:12.6s (18.3x, 0.3%) ca:30.6s (44.4x, -0.2%) he:19.6s (28.4x, 0.1%) ca:34.3s (49.7x, 0.0%) dr:29.4s (42.6x, 0.1%) ma: 3.9s ( 5.6x, 0.0%) -- fbench -- fbench valgrind-new:0.40s no: 1.6s ( 4.0x, -----) me: 4.2s (10.5x, -----) ca: 9.3s (23.2x, -----) he: 6.3s (15.8x, -----) ca: 7.2s (18.0x, -----) dr: 5.4s (13.5x, -----) ma: 1.7s ( 4.2x, -----) fbench valgrind-old:0.40s no: 1.6s ( 4.0x, -0.6%) me: 4.2s (10.4x, 0.5%) ca: 9.3s (23.1x, 0.1%) he: 6.3s (15.8x, 0.0%) ca: 7.2s (17.9x, 0.4%) dr: 5.5s (13.6x, -1.1%) ma: 1.7s ( 4.2x, -0.0%) -- ffbench -- ffbench valgrind-new:0.21s no: 1.1s ( 5.2x, -----) me: 3.1s (14.6x, -----) ca: 3.0s (14.5x, -----) he:44.1s (210.0x, -----) ca: 9.6s (45.8x, -----) dr: 6.8s (32.4x, -----) ma: 1.0s ( 4.7x, -----) ffbench valgrind-old:0.21s no: 1.1s ( 5.0x, 4.5%) me: 2.9s (14.0x, 4.2%) ca: 3.0s (14.4x, 1.0%) he:44.1s (210.1x, -0.0%) ca: 9.6s (45.8x, 0.1%) dr: 6.8s (32.4x, 0.0%) ma: 1.0s ( 4.6x, 1.0%) -- heap -- heap valgrind-new:0.24s no: 1.9s ( 7.8x, -----) me: 8.7s (36.3x, -----) ca:13.1s (54.8x, -----) he:13.2s (54.8x, -----) ca:11.3s (46.9x, -----) dr: 7.7s (32.1x, -----) ma: 8.0s (33.5x, -----) heap valgrind-old:0.24s no: 1.9s ( 7.8x, -1.1%) me: 8.8s (36.5x, -0.7%) ca:13.2s (54.8x, -0.1%) he:13.1s (54.4x, 0.8%) ca:11.2s (46.7x, 0.4%) dr: 7.6s (31.8x, 0.8%) ma: 7.8s (32.5x, 2.9%) -- heap_pdb4 -- heap_pdb4 valgrind-new:0.22s no: 2.0s ( 9.3x, -----) me:12.8s (58.3x, -----) ca:14.2s (64.7x, -----) he:14.3s (65.0x, -----) ca:12.3s (56.0x, -----) dr: 8.5s (38.5x, -----) ma: 7.9s (36.1x, -----) heap_pdb4 valgrind-old:0.22s no: 2.0s ( 9.3x, 0.0%) me:12.9s (58.8x, -0.9%) ca:14.1s (64.3x, 0.6%) he:14.3s (65.0x, 0.1%) ca:12.3s (56.0x, -0.1%) dr: 8.4s (38.2x, 0.6%) ma: 7.9s (36.0x, 0.3%) -- many-loss-records -- many-loss-records valgrind-new:0.02s no: 0.5s (23.5x, -----) me: 2.1s (104.0x, -----) ca: 1.9s (97.0x, -----) he: 2.2s (109.5x, -----) ca: 1.9s (95.5x, -----) dr: 1.7s (86.0x, -----) ma: 1.6s (82.0x, -----) many-loss-records valgrind-old:0.02s no: 0.5s (23.5x, 0.0%) me: 2.1s (104.0x, 0.0%) ca: 1.9s (97.0x, 0.0%) he: 2.2s (109.5x, 0.0%) ca: 1.9s (95.5x, 0.0%) dr: 1.7s (86.0x, 0.0%) ma: 1.6s (82.0x, 0.0%) -- many-xpts -- many-xpts valgrind-new:0.07s no: 0.6s ( 9.0x, -----) me: 3.1s (45.0x, -----) ca:370.1s (5287.7x, -----) he: 6.7s (96.0x, -----) ca: 2.8s (39.9x, -----) dr: 2.5s (35.9x, -----) ma: 2.6s (36.9x, -----) many-xpts valgrind-old:0.07s no: 0.6s ( 9.0x, 0.0%) me: 3.1s (45.0x, 0.0%) ca:372.6s (5322.3x, -0.7%) he: 6.7s (96.1x, -0.1%) ca: 2.8s (39.9x, 0.0%) dr: 2.5s (35.9x, 0.0%) ma: 2.6s (37.0x, -0.4%) -- sarp -- sarp valgrind-new:0.03s no: 0.6s (19.0x, -----) me: 3.5s (116.3x, -----) ca: 3.1s (104.7x, -----) he:17.6s (588.3x, -----) ca: 2.0s (68.3x, -----) dr: 1.4s (45.0x, -----) ma: 0.5s (16.3x, -----) sarp valgrind-old:0.03s no: 0.6s (19.0x, 0.0%) me: 3.5s (116.3x, 0.0%) ca: 3.1s (105.0x, -0.3%) he:17.6s (587.0x, 0.2%) ca: 2.0s (68.3x, 0.0%) dr: 1.4s (45.0x, 0.0%) ma: 0.5s (16.0x, 2.0%) -- tinycc -- tinycc valgrind-new:0.22s no: 2.8s (12.8x, -----) me:14.5s (66.1x, -----) ca:29.9s (136.0x, -----) he:28.2s (128.4x, -----) ca:21.5s (97.7x, -----) dr:20.4s (92.9x, -----) ma: 4.0s (18.2x, -----) tinycc valgrind-old:0.22s no: 2.8s (12.9x, -0.4%) me:14.6s (66.4x, -0.4%) ca:29.9s (135.8x, 0.2%) he:28.1s (127.7x, 0.6%) ca:21.3s (96.9x, 0.8%) dr:20.4s (92.6x, 0.2%) ma: 4.0s (18.0x, 1.0%) -- Finished tests in perf ---------------------------------------------- == 11 programs, 154 timings ================= real 110m44.539s user 109m53.634s sys 0m43.372s |
|
From: Tom H. <to...@co...> - 2014-05-13 03:30:15
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) GDB: Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2014-05-13 03:52:25 BST Ended at 2014-05-13 04:29:58 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 649 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/amd64/insn-pcmpistri (stderr) none/tests/amd64/sse4-64 (stdout) |
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From: Rich C. <rc...@wi...> - 2014-05-13 03:11:59
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (SUSE Linux) 4.7.2 20130108 [gcc-4_7-branch revision 195012] GDB: GNU gdb (GDB) SUSE (7.5.1-2.1.1) Assembler: GNU assembler (GNU Binutils; openSUSE 12.3) 2.23.1 C library: GNU C Library (GNU libc) stable release version 2.17 (git c758a6861537) uname -mrs: Linux 3.7.9-1.1-desktop x86_64 Vendor version: Welcome to openSUSE 12.3 "Dartmouth" Beta 1 - Kernel %r (%t). Nightly build on ultra ( gcc (SUSE Linux) 4.7.2 20130108 [gcc-4_7-branch revision 195012] Linux 3.7.9-1.1-desktop x86_64 ) Started at 2014-05-12 21:30:01 CDT Ended at 2014-05-12 22:11:49 CDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 671 tests, 0 stderr failures, 0 stdout failures, 1 stderrB failure, 0 stdoutB failures, 0 post failures == gdbserver_tests/mssnapshot (stderrB) ================================================= ./valgrind-new/gdbserver_tests/mssnapshot.stderrB.diff ================================================= --- mssnapshot.stderrB.exp 2014-05-12 21:56:58.075473369 -0500 +++ mssnapshot.stderrB.out 2014-05-12 22:00:50.273151114 -0500 @@ -1,5 +1,11 @@ relaying data between gdb and process .... +Missing separate debuginfo for /lib64/ld-linux-x86-64.so.2 +Try: zypper install -C "debuginfo(build-id)=ecb8ef1a6904a2a3ec60a527f415f520c8636158" vgdb-error value changed from 0 to 999999 +Missing separate debuginfo for /lib64/libpthread.so.0 +Try: zypper install -C "debuginfo(build-id)=ef5f5dbcb2398c608fef7884e1bfb65be3b5f0ef" +Missing separate debuginfo for /lib64/libc.so.6 +Try: zypper install -C "debuginfo(build-id)=bd1473e8e6a4c10a14731b5be4b35b4e87db2af7" general valgrind monitor commands: help [debug] : monitor command help. With debug: + debugging commands v.wait [<ms>] : sleep <ms> (default 0) then continue ================================================= ./valgrind-old/gdbserver_tests/mssnapshot.stderrB.diff ================================================= --- mssnapshot.stderrB.exp 2014-05-12 21:30:26.431710710 -0500 +++ mssnapshot.stderrB.out 2014-05-12 21:39:48.778449356 -0500 @@ -1,5 +1,11 @@ relaying data between gdb and process .... +Missing separate debuginfo for /lib64/ld-linux-x86-64.so.2 +Try: zypper install -C "debuginfo(build-id)=ecb8ef1a6904a2a3ec60a527f415f520c8636158" vgdb-error value changed from 0 to 999999 +Missing separate debuginfo for /lib64/libpthread.so.0 +Try: zypper install -C "debuginfo(build-id)=ef5f5dbcb2398c608fef7884e1bfb65be3b5f0ef" +Missing separate debuginfo for /lib64/libc.so.6 +Try: zypper install -C "debuginfo(build-id)=bd1473e8e6a4c10a14731b5be4b35b4e87db2af7" general valgrind monitor commands: help [debug] : monitor command help. With debug: + debugging commands v.wait [<ms>] : sleep <ms> (default 0) then continue |
|
From: Tom H. <to...@co...> - 2014-05-13 03:02:02
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2014-05-13 03:13:10 BST Ended at 2014-05-13 04:01:50 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 678 tests, 0 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == |
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From: Tom H. <to...@co...> - 2014-05-13 02:52:16
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.50.20110722-16.fc16) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2014-05-13 03:02:00 BST Ended at 2014-05-13 03:52:02 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 678 tests, 0 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == |
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From: Tom H. <to...@co...> - 2014-05-13 02:36:39
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2014-05-13 02:51:20 BST Ended at 2014-05-13 03:36:14 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 678 tests, 4 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
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From: Tom H. <to...@co...> - 2014-05-13 02:28:58
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora 7.5.1-42.fc18 Assembler: GNU assembler version 2.23.51.0.1-10.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2014-05-13 02:41:04 BST Ended at 2014-05-13 03:28:45 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 678 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
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From: Rich C. <rc...@wi...> - 2014-05-13 02:28:14
|
valgrind revision: 13953
VEX revision: 2858
C compiler: gcc (SUSE Linux) 4.8.1 20130909 [gcc-4_8-branch revision 202388]
GDB: GNU gdb (GDB; openSUSE Factory) 7.6.50.20130731-cvs
Assembler: GNU assembler (GNU Binutils; openSUSE Factory) 2.23.2
C library: GNU C Library (GNU libc) stable release version 2.18 (git )
uname -mrs: Linux 3.11.4-3-desktop x86_64
Vendor version: Welcome to openSUSE 13.1 "Bottle" Beta 1 - Kernel %r (%t).
Nightly build on rodan ( Linux 3.11.4-3-desktop x86_64 )
Started at 2014-05-12 19:22:01 CDT
Ended at 2014-05-12 21:28:11 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 592 tests, 5 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/err_disable3 (stderr)
memcheck/tests/err_disable4 (stderr)
memcheck/tests/threadname (stderr)
memcheck/tests/threadname_xml (stderr)
exp-sgcheck/tests/hackedbz2 (stderr)
=================================================
./valgrind-new/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-05-12 20:26:42.579391680 -0500
+++ hackedbz2.stderr.out 2014-05-12 21:26:54.740294382 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-new/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-05-12 20:26:19.574124808 -0500
+++ err_disable3.stderr.out 2014-05-12 20:45:18.846340882 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-new/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-05-12 20:26:24.145177835 -0500
+++ err_disable4.stderr.out 2014-05-12 20:45:22.679385347 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-new/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-05-12 20:26:24.176178194 -0500
+++ threadname.stderr.out 2014-05-12 20:51:10.030414776 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-new/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-05-12 20:26:19.604125156 -0500
+++ threadname_xml.stderr.out 2014-05-12 20:51:12.063438360 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
=================================================
./valgrind-old/exp-sgcheck/tests/hackedbz2.stderr.diff-glibc28-amd64
=================================================
--- hackedbz2.stderr.exp-glibc28-amd64 2014-05-12 19:22:30.623707250 -0500
+++ hackedbz2.stderr.out 2014-05-12 20:24:14.866678096 -0500
@@ -1,7 +1,6 @@
Invalid read of size 1
- at 0x........: vex_strlen (hackedbz2.c:1006)
- by 0x........: add_to_myprintf_buf (hackedbz2.c:1284)
+ at 0x........: add_to_myprintf_buf (hackedbz2.c:1006)
by 0x........: vex_printf (hackedbz2.c:1155)
by 0x........: BZ2_compressBlock (hackedbz2.c:4039)
by 0x........: handle_compress (hackedbz2.c:4761)
=================================================
./valgrind-old/memcheck/tests/err_disable3.stderr.diff
=================================================
--- err_disable3.stderr.exp 2014-05-12 19:22:38.222795403 -0500
+++ err_disable3.stderr.out 2014-05-12 19:41:45.622105754 -0500
@@ -10,8 +10,6 @@
Thread 2:
Invalid read of size 1
at 0x........: err (err_disable3.c:25)
- by 0x........: child_fn (err_disable3.c:31)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable3.c:42)
=================================================
./valgrind-old/memcheck/tests/err_disable4.stderr.diff
=================================================
--- err_disable4.stderr.exp 2014-05-12 19:22:39.358808581 -0500
+++ err_disable4.stderr.out 2014-05-12 19:42:10.441393669 -0500
@@ -1501,8 +1501,6 @@
Thread x:
Invalid read of size 1
at 0x........: err (err_disable4.c:41)
- by 0x........: child_fn_2 (err_disable4.c:55)
- ...
Address 0x........ is 5 bytes inside a block of size 10 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (err_disable4.c:68)
=================================================
./valgrind-old/memcheck/tests/threadname.stderr.diff
=================================================
--- threadname.stderr.exp 2014-05-12 19:22:37.530787375 -0500
+++ threadname.stderr.out 2014-05-12 19:48:09.836562816 -0500
@@ -9,36 +9,12 @@
Thread 2:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_0 (threadname.c:53)
- ...
Address 0x........ is 0 bytes after a block of size 2 alloc'd
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: bad_things (threadname.c:15)
by 0x........: child_fn_0 (threadname.c:53)
...
-Thread 3 try1:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
- Address 0x........ is 0 bytes after a block of size 3 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_1 (threadname.c:38)
- ...
-
-Thread 4 012345678901234:
-Invalid write of size 1
- at 0x........: bad_things (threadname.c:16)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
- Address 0x........ is 0 bytes after a block of size 4 alloc'd
- at 0x........: malloc (vg_replace_malloc.c:...)
- by 0x........: bad_things (threadname.c:15)
- by 0x........: child_fn_2 (threadname.c:26)
- ...
-
Thread 1:
Invalid write of size 1
at 0x........: bad_things (threadname.c:16)
=================================================
./valgrind-old/memcheck/tests/threadname_xml.stderr.diff
=================================================
--- threadname_xml.stderr.exp 2014-05-12 19:22:37.134782781 -0500
+++ threadname_xml.stderr.out 2014-05-12 19:48:11.940587223 -0500
@@ -94,14 +94,6 @@
<file>threadname.c</file>
<line>...</line>
</frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_0</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
</stack>
<auxwhat>Address 0x........ is 0 bytes after a block of size 2 alloc'd</auxwhat>
<stack>
@@ -135,112 +127,6 @@
<error>
<unique>0x........</unique>
<tid>...</tid>
- <threadname>try1</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 3 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>malloc</fn>
- <dir>...</dir>
- <file>vg_replace_malloc.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_1</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
-</error>
-
-<error>
- <unique>0x........</unique>
- <tid>...</tid>
- <threadname>012345678901234</threadname>
- <kind>InvalidWrite</kind>
- <what>Invalid write of size 1</what>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>bad_things</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
- <fn>child_fn_2</fn>
- <dir>...</dir>
- <file>threadname.c</file>
- <line>...</line>
- </frame>
- </stack>
- <auxwhat>Address 0x........ is 0 bytes after a block of size 4 alloc'd</auxwhat>
- <stack>
- <frame>
- <ip>0x........</ip>
- <obj>...</obj>
<truncated beyond 100 lines>
|
|
From: Tom H. <to...@co...> - 2014-05-13 02:11:45
|
valgrind revision: 13953 VEX revision: 2858 C compiler: gcc (GCC) 4.8.2 20131212 (Red Hat 4.8.2-7) GDB: GNU gdb (GDB) Fedora 7.6.1-46.fc19 Assembler: GNU assembler version 2.23.52.0.1-9.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.13.10-200.fc20.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2014-05-13 02:31:27 BST Ended at 2014-05-13 03:11:28 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 678 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == exp-sgcheck/tests/hackedbz2 (stderr) |