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From: <sv...@va...> - 2013-08-08 10:56:20
|
sewardj 2013-08-08 11:56:08 +0100 (Thu, 08 Aug 2013)
New Revision: 13489
Log:
A comprehensive test case for 128 bit shadow vector loads in the case
of partial addressibility, for --shadow-loads-ok=yes and =no. Not
portable and not hooked up to the test/build system yet.
Pertains to #294285.
Added files:
trunk/memcheck/tests/sh-mem-vec.c
trunk/out-32-plo-no.txt
trunk/out-32-plo-yes.txt
trunk/out-64-plo-no.txt
trunk/out-64-plo-yes.txt
Added: trunk/out-32-plo-no.txt (+804 -0)
===================================================================
--- trunk/out-32-plo-no.txt 2013-08-08 11:41:46 +01:00 (rev 13488)
+++ trunk/out-32-plo-no.txt 2013-08-08 11:56:08 +01:00 (rev 13489)
@@ -0,0 +1,804 @@
+==31009== Memcheck, a memory error detector
+==31009== Copyright (C) 2002-2012, and GNU GPL'd, by Julian Seward et al.
+==31009== Using Valgrind-3.9.0.SVN and LibVEX; rerun with -h for copyright info
+==31009== Command: ./memcheck/tests/sh-mem-vec-32
+==31009==
+
+20537 136 171 75 38 63 139 23 5 110 66 421 194 86 232 115
+ 56 198 303 65 285 137 309 203 147 37 179 137 65 181 379 118
+ 91 235 54 135 110 40 362 74 146 108 159 174 313 106 292 271
+ 183 65 277 34 250 172 283 111 141 30 26 15 184 93 79 99
+ 75 89 153 157 9 113 189 58 90 31 81 79 133 132 61 113
+ 282 15 119 12 57 361 14 250 93 116 226 215 229 275 186 126
+ 209 371 84 74 93 159 286 179 84 112 60 137 116 117 394 217
+ 77 133 197 265 72 43 280 26 604 47 194 171 199 411 123 112
+ 281 26 47 64 236 89 223 86 68 125 47 391 18 171 124 110
+ 59 135 143 240 73 242 72 59 345 20 46 415 77 87 34 125
+ 152 85 107 117 334 183 8 131 63 70 27 238 6 181 71 108
+ 242 542 53 94 50 86 181 173 141 125 33 75 409 38 109 70
+ 52 179 48 94 212 60 330 150 147 26 462 307 88 171 85 76
+ 108 108 296 253 152 124 196 227 116 12 606 61 197 120 94 269
+ 121 38 37 167 138 92 172 234 138 67 96 19 346 10 56 241
+ 142 130 85 495 65 176 87 140 46 124 70 100 78 142 270 22165
+
+160000 copies, 30739 d_aligned, 30741 s_aligned, 7092 both_aligned
+0 failures
+
+Expect 2 x no error
+
+Expect 2 x error
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x8048FFC: main (sh-mem-vec.c:276)
+==31009== Address 0x403505f is 1 bytes before a block of size 80,000 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31009==
+==31009== Invalid write of size 8
+==31009== at 0x804858F: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x8049005: main (sh-mem-vec.c:277)
+==31009== Address 0x403505f is 1 bytes before a block of size 80,000 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31009==
+
+Expect 2 x no error
+
+Expect 2 x error
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804907C: main (sh-mem-vec.c:285)
+==31009== Address 0x40488d1 is 79,985 bytes inside a block of size 80,000 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31009==
+==31009== Invalid write of size 8
+==31009== at 0x804858F: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x8049085: main (sh-mem-vec.c:286)
+==31009== Address 0x40488d9 is 79,993 bytes inside a block of size 80,000 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31009==
+
+------ PL Aligned case with 0 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048950 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dUddUddUddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 1 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048a00 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddUddUddUddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 2 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048ab0 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddUddUddUddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 3 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048b60 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddddUddUddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 4 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048c10 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddUddUddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 5 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048603: apply (sh-mem-vec.c:96)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048cc0 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048603: apply (sh-mem-vec.c:96)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddddddUddUddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048603: apply (sh-mem-vec.c:96)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 6 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048614: apply (sh-mem-vec.c:97)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048d70 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048614: apply (sh-mem-vec.c:97)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddddUddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048614: apply (sh-mem-vec.c:97)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 7 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048625: apply (sh-mem-vec.c:98)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048e20 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048625: apply (sh-mem-vec.c:98)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddddddddUddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048625: apply (sh-mem-vec.c:98)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 8 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048636: apply (sh-mem-vec.c:99)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048ed0 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048636: apply (sh-mem-vec.c:99)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddddddUddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048636: apply (sh-mem-vec.c:99)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 9 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048647: apply (sh-mem-vec.c:100)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4048f80 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048647: apply (sh-mem-vec.c:100)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddddddddddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048647: apply (sh-mem-vec.c:100)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 10 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048658: apply (sh-mem-vec.c:101)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4049030 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048658: apply (sh-mem-vec.c:101)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddddddddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048658: apply (sh-mem-vec.c:101)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 11 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048669: apply (sh-mem-vec.c:102)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x40490e0 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048669: apply (sh-mem-vec.c:102)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddddddddddddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048669: apply (sh-mem-vec.c:102)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 12 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x804867A: apply (sh-mem-vec.c:103)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4049190 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x804867A: apply (sh-mem-vec.c:103)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddddddddddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x804867A: apply (sh-mem-vec.c:103)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 13 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x804868B: apply (sh-mem-vec.c:104)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x4049240 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x804868B: apply (sh-mem-vec.c:104)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+ddddddddddddddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x804868B: apply (sh-mem-vec.c:104)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 14 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x804869C: apply (sh-mem-vec.c:105)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x40492f0 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x804869C: apply (sh-mem-vec.c:105)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddddddddddddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x804869C: apply (sh-mem-vec.c:105)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+------ PL Aligned case with 15 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80486AD: apply (sh-mem-vec.c:106)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009== Address 0x40493a0 is 0 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80486AD: apply (sh-mem-vec.c:106)
+==31009== by 0x80490B8: main (sh-mem-vec.c:292)
+==31009==
+
+dddddddddddddddd
+
+
+------ PL Unaligned case with 0 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049451 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dUddUddUddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 1 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049501 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddUddUddUddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 2 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x40495b1 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddUddUddUddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 3 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049661 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddddUddUddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 4 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049711 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddUddUddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 5 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048603: apply (sh-mem-vec.c:96)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x40497c1 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048603: apply (sh-mem-vec.c:96)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddddddUddUddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048603: apply (sh-mem-vec.c:96)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 6 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048614: apply (sh-mem-vec.c:97)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049871 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048614: apply (sh-mem-vec.c:97)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddddUddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048614: apply (sh-mem-vec.c:97)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 7 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048625: apply (sh-mem-vec.c:98)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049921 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048625: apply (sh-mem-vec.c:98)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddddddddUddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048625: apply (sh-mem-vec.c:98)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 8 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048636: apply (sh-mem-vec.c:99)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x40499d1 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048636: apply (sh-mem-vec.c:99)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddddddUddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048636: apply (sh-mem-vec.c:99)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 9 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048647: apply (sh-mem-vec.c:100)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049a81 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048647: apply (sh-mem-vec.c:100)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddddddddddUddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048647: apply (sh-mem-vec.c:100)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 10 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048658: apply (sh-mem-vec.c:101)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049b31 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048658: apply (sh-mem-vec.c:101)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddddddddUddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048658: apply (sh-mem-vec.c:101)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 11 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x8048669: apply (sh-mem-vec.c:102)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049be1 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x8048669: apply (sh-mem-vec.c:102)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddddddddddddUddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x8048669: apply (sh-mem-vec.c:102)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 12 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x804867A: apply (sh-mem-vec.c:103)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049c91 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x804867A: apply (sh-mem-vec.c:103)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddddddddddUdd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x804867A: apply (sh-mem-vec.c:103)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 13 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x804868B: apply (sh-mem-vec.c:104)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049d41 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x804868B: apply (sh-mem-vec.c:104)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+ddddddddddddddUd
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x804868B: apply (sh-mem-vec.c:104)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 14 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x804869C: apply (sh-mem-vec.c:105)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049df1 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x804869C: apply (sh-mem-vec.c:105)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddddddddddddU
+
+==31009== Conditional jump or move depends on uninitialised value(s)
+==31009== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31009== by 0x804869C: apply (sh-mem-vec.c:105)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+------ PL Unaligned case with 15 leading acc+def bytes ------
+
+==31009== Invalid read of size 16
+==31009== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31009== by 0x804898B: do_partial_load_case (sh-mem-vec.c:171)
+==31009== by 0x80486AD: apply (sh-mem-vec.c:106)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009== Address 0x4049ea1 is 1 bytes inside a block of size 64 alloc'd
+==31009== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31009== by 0x80487BA: memalign16 (malloc.h:21)
+==31009== by 0x8048861: do_partial_load_case (sh-mem-vec.c:149)
+==31009== by 0x80486AD: apply (sh-mem-vec.c:106)
+==31009== by 0x80490D3: main (sh-mem-vec.c:295)
+==31009==
+
+dddddddddddddddd
+
+
+==31009==
+==31009== HEAP SUMMARY:
+==31009== in use at exit: 0 bytes in 0 blocks
+==31009== total heap usage: 33 allocs, 33 frees, 82,048 bytes allocated
+==31009==
+==31009== All heap blocks were freed -- no leaks are possible
+==31009==
+==31009== For counts of detected and suppressed errors, rerun with: -v
+==31009== Use --track-origins=yes to see where uninitialised values come from
+==31009== ERROR SUMMARY: 66 errors from 66 contexts (suppressed: 0 from 0)
Added: trunk/memcheck/tests/sh-mem-vec.c (+551 -0)
===================================================================
--- trunk/memcheck/tests/sh-mem-vec.c 2013-08-08 11:41:46 +01:00 (rev 13488)
+++ trunk/memcheck/tests/sh-mem-vec.c 2013-08-08 11:56:08 +01:00 (rev 13489)
@@ -0,0 +1,551 @@
+
+// Tests shadow memory correctness for 16-byte vector loads/stores
+
+#include <assert.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include "tests/malloc.h"
+#include "memcheck/memcheck.h"
+
+// What we're actually testing
+static __attribute__((noinline))
+void vector16_copy ( void* dst, void* src )
+{
+ __asm__ __volatile__(
+ "movups (%1), %%xmm7 ; movups %%xmm7, (%0)"
+ : /*OUT*/ : /*IN*/ "r"(dst), "r"(src) : "memory","xmm7"
+ );
+}
+
+// All the sizes here are in *bytes*, not bits.
+
+typedef unsigned char U1;
+typedef unsigned short U2;
+typedef unsigned int U4;
+typedef unsigned long long U8;
+typedef unsigned long int UWord;
+
+typedef unsigned char Bool;
+#define True ((Bool)1)
+#define False ((Bool)0)
+
+#define CFENCE __asm__ __volatile__("":::"cc","memory")
+
+
+static inline U4 randomU4 ( void )
+{
+ static U4 n = 0;
+ /* From "Numerical Recipes in C" 2nd Edition */
+ n = 1664525UL * n + 1013904223UL;
+ return n;
+}
+
+static inline U1 randomU1 ( void )
+{
+ return 0xFF & (randomU4() >> 13);
+}
+
+#define N_BYTES 80000
+#define N_EVENTS (N_BYTES * 2)
+
+// Return x, but with its definedness bits set to be its own value bits
+static inline U1 self_shadow ( U1 x )
+{
+ U1 res = 0xFF;
+ VALGRIND_MAKE_MEM_UNDEFINED(&res, 1);
+ res &= x;
+ return res;
+}
+
+static inline U1 get_shadow ( U1 x )
+{
+ U1 res = 0;
+ U4 r = VALGRIND_GET_VBITS(&x, &res, 1);
+ assert(r == 1 || r == 0);
+ return res;
+}
+
+static inline U1 make_def ( U1 x )
+{
+ U1 y = x;
+ VALGRIND_MAKE_MEM_DEFINED(&y, 1);
+ return y;
+}
+
+static inline U1 make_undef ( U1 x )
+{
+ U1 y = x;
+ VALGRIND_MAKE_MEM_UNDEFINED(&y, 1);
+ return y;
+}
+
+static void make_noaccess ( U1* dst )
+{
+ VALGRIND_MAKE_MEM_NOACCESS(dst, 1);
+}
+
+static void apply ( void(*fn)(U4,Bool), U4 arg1, Bool arg2 )
+{
+ switch (arg1 & (32-1)) {
+ case 0: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 1: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 2: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 3: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 4: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 5: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 6: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 7: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 8: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 9: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 10: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 11: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 12: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 13: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 14: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 15: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 16: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 17: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 18: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 19: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 20: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 21: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 22: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 23: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 24: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 25: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 26: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 27: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 28: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 29: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 30: CFENCE; fn(arg1, arg2); CFENCE; break;
+ case 31: CFENCE; fn(arg1, arg2); CFENCE; break;
+ default: CFENCE; fn(arg1, arg2); CFENCE; break;
+ }
+}
+
+ // Try doing some partial-loads-ok/not-ok testing.
+ /* Test cases:
+ - load, 16-aligned, all no-access
+ ==> addr err
+ - load, 16-aligned, 1 to 15 initial bytes accessible,
+ then at least one unaccessible byte,
+ then remaining bytes in any state.
+ ==> if PLO then no error, but returned V bits are undefined
+ for unaccessible bytes
+ else
+ error; and V bits are defined for unaccessible bytes
+
+ All of the above, but non-16-aligned:
+ -- all return an addressing error
+ */
+
+static void do_partial_load_case ( U4 nInitialValid, Bool aligned )
+{
+ fprintf(stderr,
+ "------ PL %s case with %u leading acc+def bytes ------\n\n",
+ aligned ? "Aligned" : "Unaligned", nInitialValid);
+
+ U1* block = memalign16(64);
+ U4 j;
+ for (j = 0; j < 64; j++) block[j] = 0;
+
+ if (!aligned) block++;
+
+ // Make the block have this pattern:
+ // block[0 .. i-1] accessible and defined
+ // block[i .. 15] repeating NOACCESS, UNDEF, DEF
+ // hence block[i], at the very least, is always NOACCESS
+ U4 i = nInitialValid;
+ for (j = i; j < 16; j++) {
+ switch ((j-i) % 3) {
+ case 0: make_noaccess(&block[j]); break;
+ case 1: block[j] = make_undef(block[j]); break;
+ case 2: /* already acc and def */ break;
+ }
+ }
+
+ // Do the access, possibly generating an error, and show the
+ // resulting V bits
+ U1 dst[16];
+ vector16_copy(&dst[0], block);
+
+ U1 dst_vbits[16];
+ U4 r = VALGRIND_GET_VBITS(&dst[0], &dst_vbits[0], 16);
+ assert(r == 1 || r == 0);
+
+ fprintf(stderr, "\n");
+ for (j = 0; j < 16; j++) {
+ fprintf(stderr, "%c", dst_vbits[j] == 0 ? 'd'
+ : dst_vbits[j] == 0xFF ? 'U' : '?');
+ }
+ fprintf(stderr, "\n\n");
+
+ // Also let's use the resulting value, to check we get an undef
+ // error
+ U1 sum = 0;
+ for (j = 0; j < 16; j++)
+ sum ^= dst[j];
+
+ if (sum == 42) {
+ CFENCE; fprintf(stderr, "%s", ""); CFENCE;
+ } else {
+ CFENCE; fprintf(stderr, "%s", ""); CFENCE;
+ }
+
+ fprintf(stderr, "\n");
+
+ if (!aligned) block--;
+ free(block);
+}
+
+int main ( void )
+{
+ U4 i;
+ U1* buf = memalign16(N_BYTES);
+
+ // Fill |buf| with bytes, so that zero bits have a zero shadow
+ // (are defined) and one bits have a one shadow (are undefined)
+ for (i = 0; i < N_BYTES/2; i++) {
+ buf[i] = self_shadow( (i & (1<<5)) ? 0x00 : 0xFF );
+ }
+ for ( ; i < N_BYTES; i++) {
+ buf[i] = self_shadow( randomU1() );
+ }
+
+ // Randomly copy the data around. Once every 8 srcs/dsts, force
+ // the src or dst to be aligned. Once every 64, force both to be
+ // aligned. So as to give the fast (aligned) paths some checking.
+ const U4 n_copies = N_EVENTS;
+ U4 n_d_aligned = 0;
+ U4 n_s_aligned = 0;
+ U4 n_both_aligned = 0;
+ U4 n_fails = 0;
+
+ for (i = 0; i < n_copies; i++) {
+ U4 si = randomU4() % (N_BYTES-16);
+ U4 di = randomU4() % (N_BYTES-16);
+ if (0 == (randomU1() & 7)) si &= ~(16-1);
+ if (0 == (randomU1() & 7)) di &= ~(16-1);
+ if (0 == (randomU1() & 63)) { di &= ~(16-1); si &= ~(16-1); }
+
+ void* dst = &buf[di];
+ void* src = &buf[si];
+
+ if (0 == (((UWord)src) & (16-1))) n_s_aligned++;
+ if (0 == (((UWord)dst) & (16-1))) n_d_aligned++;
+ if (0 == (((UWord)src) & (16-1)) && 0 == (((UWord)dst) & (16-1)))
+ n_both_aligned++;
+
+ vector16_copy(dst, src);
+ }
+
+ U4 freq[256];
+ for (i = 0; i < 256; i++)
+ freq[i] = 0;
+
+ for (i = 0; i < N_BYTES; i++) {
+ //if (i > 0 && 0 == (i & 0x0F)) fprintf(stderr, "\n");
+ U1 v_actual = make_def(buf[i]);
+ U1 v_shadow = get_shadow(buf[i]);
+ if (v_actual != v_shadow) n_fails++;
+ //fprintf(stderr, "%02x:%02x ", (U4)v_actual, (U4)v_shadow);
+ freq[(U4)v_actual]++;
+ }
+
+ fprintf(stderr, "\n");
+ U4 totFreq = 0;
+ for (i = 0; i < 256; i++) {
+ totFreq += freq[i];
+ if (i > 0 && (0 == (i % 16))) fprintf(stderr, "\n");
+ fprintf(stderr, "%5u ", freq[i]);
+ }
+ assert(totFreq == N_BYTES);
+
+ fprintf(stderr, "\n\n");
+ fprintf(stderr, "%u copies, %u d_aligned, %u s_aligned, %u both_aligned\n",
+ n_copies, n_d_aligned, n_s_aligned, n_both_aligned);
+ fprintf(stderr, "%u %s\n", n_fails, n_fails == 0 ? "failures" : "FAILURES");
+
+ // Check that we can detect underruns of the block.
+ fprintf(stderr, "\nExpect 2 x no error\n" );
+ vector16_copy( &buf[100], &buf[0] );
+ vector16_copy( &buf[0], &buf[100] );
+
+ fprintf(stderr, "\nExpect 2 x error\n\n" );
+ vector16_copy( &buf[100], &buf[-1] ); // invalid rd
+ vector16_copy( &buf[-1], &buf[100] ); // invalid wr
+
+ // and overruns ..
+ fprintf(stderr, "\nExpect 2 x no error\n" );
+ vector16_copy( &buf[200], &buf[N_BYTES-16 + 0] );
+ vector16_copy( &buf[N_BYTES-16 + 0], &buf[200] );
+
+ fprintf(stderr, "\nExpect 2 x error\n\n" );
+ vector16_copy( &buf[200], &buf[N_BYTES-16 + 1] );
+ vector16_copy( &buf[N_BYTES-16 + 1], &buf[200] );
+
+ free(buf);
+ fprintf(stderr, "\n");
+
+ for (i = 0; i < 16; i++)
+ apply( do_partial_load_case, i, True/*aligned*/ );
+
+ for (i = 0; i < 16; i++)
+ apply( do_partial_load_case, i, False/*not aligned*/ );
+
+ return 0;
+}
+
+// This is a version of sh-mem.c that works with vector types.
+// It's too difficult to roll that into the macro magic in
+// sh-mem.c, hence the separate program.
+
+// This program is a thorough test of the LOADVn/STOREVn shadow memory
+// operations.
+
+#include <assert.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include "memcheck/memcheck.h"
+
+#if defined(__APPLE__) && defined(__i386__)
+# define PLAT_x86_darwin 1
+#elif defined(__APPLE__) && defined(__x86_64__)
+# define PLAT_amd64_darwin 1
+#elif defined(__MINGW32__) || defined(__CYGWIN32__) \
+ || (defined(_WIN32) && defined(_M_IX86))
+# define PLAT_x86_win32 1
+#elif defined(__linux__) && defined(__i386__)
+# define PLAT_x86_linux 1
+#elif defined(__linux__) && defined(__x86_64__)
+# define PLAT_amd64_linux 1
+#elif defined(__linux__) && defined(__powerpc__) && !defined(__powerpc64__)
+# define PLAT_ppc32_linux 1
+#elif defined(__linux__) && defined(__powerpc__) && defined(__powerpc64__)
+# define PLAT_ppc64_linux 1
+#elif defined(__linux__) && defined(__arm__)
+# define PLAT_arm_linux 1
+#elif defined(__linux__) && defined(__s390__) && defined(__s390x__)
+# define PLAT_s390x_linux 1
+#elif defined(__linux__) && defined(__mips__) && (__mips == 64)
+# define PLAT_mips64_linux 1
+#elif defined(__linux__) && defined(__mips__) && !(__mips == 64)
+# define PLAT_mips32_linux 1
+#endif
+
+// All the sizes here are in *bytes*, not bits.
+
+typedef unsigned char U1;
+typedef unsigned short U2;
+typedef unsigned int U4;
+typedef unsigned long long U8;
+
+typedef float F4;
+typedef double F8;
+
+typedef unsigned char V16 __attribute__((vector_size (16)));
+
+typedef unsigned char Bool;
+#define False ((Bool)0)
+#define True ((Bool)1)
+
+#define SZB_OF_a 128
+
+// a[] is the array in which we do our loads and stores.
+// b[] is another one in which we do some copying.
+U8 a [SZB_OF_a / 8]; // Type is U8 to ensure it's 8-aligned
+U8 b [SZB_OF_a / 8]; // same size as a[]
+
+// XXX: should check the error cases for SET/GET_VBITS also
+
+static Bool eq_V16 ( V16 x, V16 y ) {
+ return 0 == memcmp(&x, &y, sizeof(x));
+}
+
+__attribute__((noinline))
+static void copy_V16 ( volatile V16* dst, volatile V16* src )
+{
+# if defined(PLAT_amd64_linux) || defined(PLAT_amd64_darwin)
+ __asm__ __volatile__( "movupd (%0),%%xmm0 ; movupd %%xmm0,(%1)"
+ : : "r"(src), "r"(dst) : "memory","xmm0");
+# else
+ *dst = *src;
+# endif
+}
+
+// For the byte 'x', build a value of 'size' bytes from that byte, eg:
+// size 1 --> x
+// size 2 --> xx
+// size 4 --> xxxx
+// size 8 --> xxxxxxxx
+// size 16 --> xxxxxxxx'xxxxxxxx
+// where the 0 bits are seen by Memcheck as defined, and the 1 bits are
+// seen as undefined (ie. the value of each bit matches its V bit, ie. the
+// resulting value is the same as its metavalue).
+//
+V16 build(int size, U1 byte)
+{
+ int i;
+ V16 mask; memset(&mask, 0, sizeof(mask));
+ V16 shres;
+ V16 res; memset(&res, 0xFF, sizeof(res));
+ V16 res2;
+ VALGRIND_MAKE_MEM_UNDEFINED(&res, sizeof(res));
+ assert(16 == size);
+
+ for (i = 0; i < size; i++) {
+ mask <<= 8;
+ mask |= (U8)byte;
+ }
+
+ res &= mask;
+
+ // res is now considered partially defined, but we know exactly what its
+ // value is (it happens to be the same as its metavalue).
+
+ (void)VALGRIND_GET_VBITS(&res, &shres, sizeof(res));
+ res2 = res;
+ // avoid the 'undefined' warning
+ (void)VALGRIND_MAKE_MEM_DEFINED(&res2, sizeof(res2));
+ assert(eq_V16(res2, shres));
+
+ return res;
+}
+
+// Check that all the bytes in a[x..y-1] have their V byte equal
+// to 'expected_byte''.
+// 'str' and 'offset' are only used for printing an error message if
+// something goes wrong.
+void check_all(U4 x, U4 y, U1 expected_byte,
+ char* str, int offset)
+{
+ U1 sh[SZB_OF_a]; // Used for getting a[]'s V bits
+ int i;
+ assert(x < y);
+ assert(y <= SZB_OF_a);
+ assert(x < SZB_OF_a);
+
+ (void)VALGRIND_GET_VBITS(a, sh, sizeof(a));
+ for (i = x; i < y; i++) {
+ if ( expected_byte != sh[i] ) {
+ fprintf(stderr, "\n\nFAILURE: %s, offset %d, byte %d -- "
+ "is 0x%x, should be 0x%x\n\n",
+ str, offset, i, sh[i], expected_byte);
+ exit(1);
+ }
+ }
+}
+
+int main(void)
+{
+ int h, i, j;
+ U1 *undefA, expected_byte;
+
+ if (0 == RUNNING_ON_VALGRIND) {
+ fprintf(stderr,
+ "error: this program only works when run under Valgrind\n");
+ exit(1);
+ }
+
+ // Check a[] has the expected alignment, and that it's not too high in
+ // the address space (which would trigger the slow cases in
+ // LOADVn/STOREVn) on 64-bit platforms).
+ assert( 0 == (long)a % 8);
+ if (sizeof(void*) == 8) {
+ assert( ((U1*)(&a[0])) < ((U1*)(32ULL * 1024*1024*1024)/*32G*/) );
+ }
+
+ // Check basic types have the expected sizes.
+ assert(1 == sizeof(U1));
+ assert(2 == sizeof(U2));
+ assert(4 == sizeof(U4));
+ assert(8 == sizeof(U8));
+ assert(16 == sizeof(V16));
+
+ // Create an array of values that has all the possible V bit metavalues.
+ // Because 0 represents a defined bit, and because undefA[] is initially
+ // zeroed, we have the nice property that:
+ //
+ // i == undefA[i] == V_bits_of(undefA[i])
+ //
+ // which is useful for testing below.
+ undefA = calloc(1, 256); // one for each possible undefinedness value
+ VALGRIND_MAKE_MEM_UNDEFINED(undefA, 256);
+ for (i = 0; i < 256; i++) {
+ undefA[i] &= i;
+ }
+
+ // This code does a whole lot of reads and writes of a particular size
+ // (NNN = 16 or 32), with varying alignments, of values with
+ // different not/partially/fully defined metavalues, and checks that the
+ // V bits are set in a[] as expected using GET_VBITS.
+ //
+ // 'Ty' is the type of the thing we are copying. It can be an integer
+ // type or an FP type. 'ITy' is the same-sized integer type (and thus
+ // will be the same as 'Ty' if 'ITy' is an integer type). 'ITy' is used
+ // when doing shifting/masking and stuff like that.
+
+#define Ty V16
+#define NNN 16
+#define VEC_EQ eq_V16
+
+ fprintf(stderr, "-- NNN: %d %s ------------------------\n",
+ NNN, "V16");
+ /* For all of the alignments from (0..NNN-1), eg. if NNN==16, we do */
+ /* alignments of 0, 1, 2 .. 15. */
+ for (h = 0; h < NNN; h++) {
+
+ size_t n = sizeof(a);
+ size_t nN = n / sizeof(Ty);
+ volatile Ty* aN = (Ty*)a;
+ volatile Ty* bN = (Ty*)b;
+ volatile Ty* aNb = (Ty*)(((U1*)aN) + h); /* set offset from a[] */
+ volatile Ty* bNb = (Ty*)(((U1*)bN) + h); /* set offset from b[] */
+
+ fprintf(stderr, "h = %d (checking %d..%d) ", h, h, (int)(n-NNN+h));
+
+ /* For each of the 256 possible V byte values... */
+ for (j = 0; j < 256; j++) {
+ /* build the value for i (one of: i, ii, iiii, iiiiiiii) */
+ V16 tmp = build(NNN, j);
+ Ty undefN_ITy = (Ty)tmp;
+ { /* This just checks that no overflow occurred when squeezing */
+ /* the output of build() into a variable of type 'Ty'. */
+ V16 tmpDef = tmp;
+ Ty undefN_ITyDef = undefN_ITy;
+ VALGRIND_MAKE_MEM_DEFINED(&tmpDef, 16 );
+ VALGRIND_MAKE_MEM_DEFINED(&undefN_ITyDef, NNN);
+ assert(VEC_EQ(tmpDef, undefN_ITyDef));
+ }
+
+ /* We have to use an array for undefN_Ty -- because if we try to
+ * convert an integer type from build into an FP type with a
+ * straight cast -- eg "float f = (float)i" -- the value gets
+ * converted. With this pointer/array nonsense the exact bit
+ * pattern gets used as an FP value unchanged (that FP value is
+ * undoubtedly nonsense, but that's not a problem here). */
+ Ty* undefN_Ty = (Ty*)&undefN_ITy;
+ if (0 == j % 32) fprintf(stderr, "%d...", j); /* progress meter */
+ fflush(stderr); fflush(stdout);
+
+ expected_byte = j;
+
+ /* STOREVn. Note that we use the first element of the undefN_Ty
+ * array, as explained above. */
+ for (i = 0; i < nN-1; i++) { copy_V16(&aNb[i], &undefN_Ty[0]); }
+ check_all(h, n-NNN+h, expected_byte,
+ "STOREVn", h);
+
+ /* LOADVn -- by copying the values to one place and then back,
+ * we ensure that LOADVn gets exercised. */
+ for (i = 0; i < nN-1; i++) { copy_V16(&bNb[i], &aNb[i]); }
+ for (i = 0; i < nN-1; i++) { copy_V16(&aNb[i], &bNb[i]); }
+ check_all(h, n-NNN+h, expected_byte, "LOADVn", h);
+ }
+ fprintf(stderr, "\n");
+ }
+
+ return 0;
+}
Added: trunk/out-32-plo-yes.txt (+617 -0)
===================================================================
--- trunk/out-32-plo-yes.txt 2013-08-08 11:41:46 +01:00 (rev 13488)
+++ trunk/out-32-plo-yes.txt 2013-08-08 11:56:08 +01:00 (rev 13489)
@@ -0,0 +1,617 @@
+==31013== Memcheck, a memory error detector
+==31013== Copyright (C) 2002-2012, and GNU GPL'd, by Julian Seward et al.
+==31013== Using Valgrind-3.9.0.SVN and LibVEX; rerun with -h for copyright info
+==31013== Command: ./memcheck/tests/sh-mem-vec-32
+==31013==
+
+20537 136 171 75 38 63 139 23 5 110 66 421 194 86 232 115
+ 56 198 303 65 285 137 309 203 147 37 179 137 65 181 379 118
+ 91 235 54 135 110 40 362 74 146 108 159 174 313 106 292 271
+ 183 65 277 34 250 172 283 111 141 30 26 15 184 93 79 99
+ 75 89 153 157 9 113 189 58 90 31 81 79 133 132 61 113
+ 282 15 119 12 57 361 14 250 93 116 226 215 229 275 186 126
+ 209 371 84 74 93 159 286 179 84 112 60 137 116 117 394 217
+ 77 133 197 265 72 43 280 26 604 47 194 171 199 411 123 112
+ 281 26 47 64 236 89 223 86 68 125 47 391 18 171 124 110
+ 59 135 143 240 73 242 72 59 345 20 46 415 77 87 34 125
+ 152 85 107 117 334 183 8 131 63 70 27 238 6 181 71 108
+ 242 542 53 94 50 86 181 173 141 125 33 75 409 38 109 70
+ 52 179 48 94 212 60 330 150 147 26 462 307 88 171 85 76
+ 108 108 296 253 152 124 196 227 116 12 606 61 197 120 94 269
+ 121 38 37 167 138 92 172 234 138 67 96 19 346 10 56 241
+ 142 130 85 495 65 176 87 140 46 124 70 100 78 142 270 22165
+
+160000 copies, 30739 d_aligned, 30741 s_aligned, 7092 both_aligned
+0 failures
+
+Expect 2 x no error
+
+Expect 2 x error
+
+==31013== Invalid read of size 16
+==31013== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31013== by 0x8048FFC: main (sh-mem-vec.c:276)
+==31013== Address 0x403505f is 1 bytes before a block of size 80,000 alloc'd
+==31013== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31013== by 0x80487BA: memalign16 (malloc.h:21)
+==31013== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31013==
+==31013== Invalid write of size 8
+==31013== at 0x804858F: vector16_copy (sh-mem-vec.c:15)
+==31013== by 0x8049005: main (sh-mem-vec.c:277)
+==31013== Address 0x403505f is 1 bytes before a block of size 80,000 alloc'd
+==31013== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31013== by 0x80487BA: memalign16 (malloc.h:21)
+==31013== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31013==
+
+Expect 2 x no error
+
+Expect 2 x error
+
+==31013== Invalid read of size 16
+==31013== at 0x804858C: vector16_copy (sh-mem-vec.c:15)
+==31013== by 0x804907C: main (sh-mem-vec.c:285)
+==31013== Address 0x40488d1 is 79,985 bytes inside a block of size 80,000 alloc'd
+==31013== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31013== by 0x80487BA: memalign16 (malloc.h:21)
+==31013== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31013==
+==31013== Invalid write of size 8
+==31013== at 0x804858F: vector16_copy (sh-mem-vec.c:15)
+==31013== by 0x8049085: main (sh-mem-vec.c:286)
+==31013== Address 0x40488d9 is 79,993 bytes inside a block of size 80,000 alloc'd
+==31013== at 0x400602A: memalign (vg_replace_malloc.c:755)
+==31013== by 0x80487BA: memalign16 (malloc.h:21)
+==31013== by 0x8048ADB: main (sh-mem-vec.c:205)
+==31013==
+
+------ PL Aligned case with 0 leading acc+def bytes ------
+
+
+UUdUUdUUdUUdUUdU
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x80485AE: apply (sh-mem-vec.c:91)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 1 leading acc+def bytes ------
+
+
+dUUdUUdUUdUUdUUd
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x80485BF: apply (sh-mem-vec.c:92)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 2 leading acc+def bytes ------
+
+
+ddUUdUUdUUdUUdUU
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x80485D0: apply (sh-mem-vec.c:93)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 3 leading acc+def bytes ------
+
+
+dddUUdUUdUUdUUdU
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x80485E1: apply (sh-mem-vec.c:94)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 4 leading acc+def bytes ------
+
+
+ddddUUdUUdUUdUUd
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x80485F2: apply (sh-mem-vec.c:95)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 5 leading acc+def bytes ------
+
+
+dddddUUdUUdUUdUU
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x8048603: apply (sh-mem-vec.c:96)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 6 leading acc+def bytes ------
+
+
+ddddddUUdUUdUUdU
+
+==31013== Conditional jump or move depends on uninitialised value(s)
+==31013== at 0x8048A8F: do_partial_load_case (sh-mem-vec.c:190)
+==31013== by 0x8048614: apply (sh-mem-vec.c:97)
+==31013== by 0x80490B8: main (sh-mem-vec.c:292)
+==31013==
+
+------ PL Aligned case with 7 leading acc+def...
[truncated message content] |
|
From: <sv...@va...> - 2013-08-08 10:41:57
|
sewardj 2013-08-08 11:41:46 +0100 (Thu, 08 Aug 2013)
New Revision: 13488
Log:
Fix # 294285: --partial-loads-ok does not work for 16-byte SSE loads
(core fixes for the memcheck handling of 128 bit loads)
(Patrick J. LoPresti, lop...@gm...)
Modified files:
trunk/memcheck/mc_include.h
trunk/memcheck/mc_main.c
trunk/memcheck/mc_translate.c
Modified: trunk/memcheck/mc_main.c (+194 -21)
===================================================================
--- trunk/memcheck/mc_main.c 2013-08-08 10:05:37 +01:00 (rev 13487)
+++ trunk/memcheck/mc_main.c 2013-08-08 11:41:46 +01:00 (rev 13488)
@@ -1130,6 +1130,121 @@
static
__attribute__((noinline))
+void mc_LOADV128_slow ( /*OUT*/V128* res, Addr a, Bool bigendian )
+{
+ SizeT nBits = 128;
+ V128 vbits128; /* result */
+ V128 pessim128; /* only used when p-l-ok=yes */
+ SSizeT bytes_per_long = 64 / 8;
+ SSizeT szL = nBits / 64; /* Size in longs */
+ SSizeT szB = bytes_per_long * szL;
+ SSizeT i, j; /* Must be signed. */
+ SizeT n_addrs_bad = 0;
+ Addr ai;
+ UChar vbits8;
+ Bool ok;
+
+ vbits128.w64[0] = V_BITS64_UNDEFINED;
+ vbits128.w64[1] = V_BITS64_UNDEFINED;
+ pessim128.w64[0] = V_BITS64_DEFINED;
+ pessim128.w64[1] = V_BITS64_DEFINED;
+
+ tl_assert(nBits == 128);
+
+ /* Make up a 128-bit result V word, which contains the loaded data
+ for valid addresses and Defined for invalid addresses. Iterate
+ over the bytes in the word, from the most significant down to
+ the least. The vbits to return are calculated into vbits128.
+ Also compute the pessimising value to be used when
+ --partial-loads-ok=yes. n_addrs_bad is redundant (the relevant
+ info can be gleaned from pessim128) but is used as a
+ cross-check. */
+ for (j = szL-1 ; j >= 0 ; j--) {
+ ULong vbits64 = V_BITS64_UNDEFINED;
+ ULong pessim64 = V_BITS64_DEFINED;
+ UWord long_index = byte_offset_w(szL, bigendian, j);
+ for (i = bytes_per_long-1; i >= 0; i--) {
+ PROF_EVENT(31, "mc_LOADV128_slow(loop)");
+ ai = a + long_index*bytes_per_long + byte_offset_w(bytes_per_long,
+ bigendian, i);
+ ok = get_vbits8(ai, &vbits8);
+ vbits64 <<= 8;
+ vbits64 |= vbits8;
+ if (!ok) n_addrs_bad++;
+ pessim64 <<= 8;
+ pessim64 |= (ok ? V_BITS8_DEFINED : V_BITS8_UNDEFINED);
+ }
+ vbits128.w64[long_index] = vbits64;
+ pessim128.w64[long_index] = pessim64;
+ }
+
+ /* In the common case, all the addresses involved are valid, so we
+ just return the computed V bits and have done. */
+ if (LIKELY(n_addrs_bad == 0)) {
+ *res = vbits128;
+ return;
+ }
+
+ /* If there's no possibility of getting a partial-loads-ok
+ exemption, report the error and quit. */
+ if (!MC_(clo_partial_loads_ok)) {
+ MC_(record_address_error)( VG_(get_running_tid)(), a, szB, False );
+ *res = vbits128;
+ return;
+ }
+
+ /* The partial-loads-ok excemption might apply. Find out if it
+ does. If so, don't report an addressing error, but do return
+ Undefined for the bytes that are out of range, so as to avoid
+ false negatives. If it doesn't apply, just report an addressing
+ error in the usual way. */
+
+ /* Some code steps along byte strings in aligned word-sized chunks
+ even when there is only a partially defined word at the end (eg,
+ optimised strlen). This is allowed by the memory model of
+ modern machines, since an aligned load cannot span two pages and
+ thus cannot "partially fault".
+
+ Therefore, a load from a partially-addressible place is allowed
+ if all of the following hold:
+ - the command-line flag is set [by default, it isn't]
+ - it's an aligned load
+ - at least one of the addresses in the word *is* valid
+
+ Since this suppresses the addressing error, we avoid false
+ negatives by marking bytes undefined when they come from an
+ invalid address.
+ */
+
+ /* "at least one of the addresses is invalid" */
+ tl_assert(pessim128.w64[0] != V_BITS64_DEFINED
+ || pessim128.w64[1] != V_BITS64_DEFINED);
+
+ if (0 == (a & (szB - 1)) && n_addrs_bad < szB) {
+ /* Exemption applies. Use the previously computed pessimising
+ value for vbits128 and return the combined result, but don't
+ flag an addressing error. The pessimising value is Defined
+ for valid addresses and Undefined for invalid addresses. */
+ /* for assumption that doing bitwise or implements UifU */
+ tl_assert(V_BIT_UNDEFINED == 1 && V_BIT_DEFINED == 0);
+ /* (really need "UifU" here...)
+ vbits128 UifU= pessim128 (is pessimised by it, iow) */
+ for (j = szL-1 ; j >= 0 ; j--)
+ vbits128.w64[j] |= pessim128.w64[j];
+ *res = vbits128;
+ return;
+ }
+
+ /* Exemption doesn't apply. Flag an addressing error in the normal
+ way. */
+ MC_(record_address_error)( VG_(get_running_tid)(), a, szB, False );
+
+ *res = vbits128;
+}
+
+
+static
+__attribute__((noinline))
ULong mc_LOADVn_slow ( Addr a, SizeT nBits, Bool bigendian )
{
PROF_EVENT(30, "mc_LOADVn_slow");
@@ -4060,35 +4175,93 @@
On a 64-bit machine, it's more complex, since we're testing
simultaneously for misalignment and for the address being at or
- above 32G:
+ above 64G:
- N_PRIMARY_BITS == 19, so
- N_PRIMARY_MAP == 0x80000, so
- N_PRIMARY_MAP-1 == 0x7FFFF, so
- (N_PRIMARY_MAP-1) << 16 == 0x7FFFF'0000, and so
+ N_PRIMARY_BITS == 20, so
+ N_PRIMARY_MAP == 0x100000, so
+ N_PRIMARY_MAP-1 == 0xFFFFF, so
+ (N_PRIMARY_MAP-1) << 16 == 0xF'FFFF'0000, and so
- MASK(1) = ~ ( (0x10000 - 1) | 0x7FFFF'0000 )
- = ~ ( 0xFFFF | 0x7FFFF'0000 )
- = ~ 0x7FFFF'FFFF
- = 0xFFFF'FFF8'0000'0000
+ MASK(1) = ~ ( (0x10000 - 1) | 0xF'FFFF'0000 )
+ = ~ ( 0xFFFF | 0xF'FFFF'0000 )
+ = ~ 0xF'FFFF'FFFF
+ = 0xFFFF'FFF0'0000'0000
- MASK(2) = ~ ( (0x10000 - 2) | 0x7FFFF'0000 )
- = ~ ( 0xFFFE | 0x7FFFF'0000 )
- = ~ 0x7FFFF'FFFE
- = 0xFFFF'FFF8'0000'0001
+ MASK(2) = ~ ( (0x10000 - 2) | 0xF'FFFF'0000 )
+ = ~ ( 0xFFFE | 0xF'FFFF'0000 )
+ = ~ 0xF'FFFF'FFFE
+ = 0xFFFF'FFF0'0000'0001
- MASK(4) = ~ ( (0x10000 - 4) | 0x7FFFF'0000 )
- = ~ ( 0xFFFC | 0x7FFFF'0000 )
- = ~ 0x7FFFF'FFFC
- = 0xFFFF'FFF8'0000'0003
+ MASK(4) = ~ ( (0x10000 - 4) | 0xF'FFFF'0000 )
+ = ~ ( 0xFFFC | 0xF'FFFF'0000 )
+ = ~ 0xF'FFFF'FFFC
+ = 0xFFFF'FFF0'0000'0003
- MASK(8) = ~ ( (0x10000 - 8) | 0x7FFFF'0000 )
- = ~ ( 0xFFF8 | 0x7FFFF'0000 )
- = ~ 0x7FFFF'FFF8
- = 0xFFFF'FFF8'0000'0007
+ MASK(8) = ~ ( (0x10000 - 8) | 0xF'FFFF'0000 )
+ = ~ ( 0xFFF8 | 0xF'FFFF'0000 )
+ = ~ 0xF'FFFF'FFF8
+ = 0xFFFF'FFF0'0000'0007
*/
+/* ------------------------ Size = 16 ------------------------ */
+
+static INLINE
+void mc_LOADV128 ( /*OUT*/V128* res, Addr a, Bool isBigEndian )
+{
+ PROF_EVENT(200, "mc_LOADV128");
+
+#ifndef PERF_FAST_LOADV
+ mc_LOADV128_slow( res, a, isBigEndian );
+ return;
+#else
+ {
+ UWord sm_off16, vabits16;
+ SecMap* sm;
+ int j;
+
+ if (UNLIKELY( UNALIGNED_OR_HIGH(a,128) )) {
+ PROF_EVENT(201, "mc_LOADV128-slow1");
+ mc_LOADV128_slow( res, a, isBigEndian );
+ return;
+ }
+
+ // Handle common cases quickly: a (and a+8) is suitably aligned,
+ // is mapped, and addressible.
+ for (j=0 ; j<2 ; ++j) {
+ sm = get_secmap_for_reading_low(a + 8*j);
+ sm_off16 = SM_OFF_16(a + 8*j);
+ vabits16 = ((UShort*)(sm->vabits8))[sm_off16];
+
+ // Convert V bits from compact memory form to expanded
+ // register form.
+ if (LIKELY(vabits16 == VA_BITS16_DEFINED)) {
+ res->w64[j] = V_BITS64_DEFINED;
+ } else if (LIKELY(vabits16 == VA_BITS16_UNDEFINED)) {
+ res->w64[j] = V_BITS64_UNDEFINED;
+ } else {
+ /* Slow case: some block of 8 bytes are not all-defined or
+ all-undefined. */
+ PROF_EVENT(202, "mc_LOADV128-slow2");
+ mc_LOADV128_slow( res, a, isBigEndian );
+ return;
+ }
+ }
+ return;
+ }
+#endif
+}
+
+VG_REGPARM(2) void MC_(helperc_LOADV128be) ( /*OUT*/V128* res, Addr a )
+{
+ mc_LOADV128(res, a, True);
+}
+VG_REGPARM(2) void MC_(helperc_LOADV128le) ( /*OUT*/V128* res, Addr a )
+{
+ mc_LOADV128(res, a, False);
+}
+
+
/* ------------------------ Size = 8 ------------------------ */
static INLINE
Modified: trunk/memcheck/mc_translate.c (+76 -59)
===================================================================
--- trunk/memcheck/mc_translate.c 2013-08-08 10:05:37 +01:00 (rev 13487)
+++ trunk/memcheck/mc_translate.c 2013-08-08 11:41:46 +01:00 (rev 13488)
@@ -4186,12 +4186,6 @@
IREndness end, IRType ty,
IRAtom* addr, UInt bias, IRAtom* guard )
{
- void* helper;
- const HChar* hname;
- IRDirty* di;
- IRTemp datavbits;
- IRAtom* addrAct;
-
tl_assert(isOriginalAtom(mce,addr));
tl_assert(end == Iend_LE || end == Iend_BE);
@@ -4203,43 +4197,59 @@
data V bits from shadow memory. */
ty = shadowTypeV(ty);
+ void* helper = NULL;
+ const HChar* hname = NULL;
+ Bool ret_via_outparam = False;
+
if (end == Iend_LE) {
switch (ty) {
- case Ity_I64: helper = &MC_(helperc_LOADV64le);
- hname = "MC_(helperc_LOADV64le)";
- break;
- case Ity_I32: helper = &MC_(helperc_LOADV32le);
- hname = "MC_(helperc_LOADV32le)";
- break;
- case Ity_I16: helper = &MC_(helperc_LOADV16le);
- hname = "MC_(helperc_LOADV16le)";
- break;
- case Ity_I8: helper = &MC_(helperc_LOADV8);
- hname = "MC_(helperc_LOADV8)";
- break;
- default: ppIRType(ty);
- VG_(tool_panic)("memcheck:expr2vbits_Load_WRK(LE)");
+ case Ity_V128: helper = &MC_(helperc_LOADV128le);
+ hname = "MC_(helperc_LOADV128le)";
+ ret_via_outparam = True;
+ break;
+ case Ity_I64: helper = &MC_(helperc_LOADV64le);
+ hname = "MC_(helperc_LOADV64le)";
+ break;
+ case Ity_I32: helper = &MC_(helperc_LOADV32le);
+ hname = "MC_(helperc_LOADV32le)";
+ break;
+ case Ity_I16: helper = &MC_(helperc_LOADV16le);
+ hname = "MC_(helperc_LOADV16le)";
+ break;
+ case Ity_I8: helper = &MC_(helperc_LOADV8);
+ hname = "MC_(helperc_LOADV8)";
+ break;
+ default: ppIRType(ty);
+ VG_(tool_panic)("memcheck:expr2vbits_Load_WRK(LE)");
}
} else {
switch (ty) {
- case Ity_I64: helper = &MC_(helperc_LOADV64be);
- hname = "MC_(helperc_LOADV64be)";
- break;
- case Ity_I32: helper = &MC_(helperc_LOADV32be);
- hname = "MC_(helperc_LOADV32be)";
- break;
- case Ity_I16: helper = &MC_(helperc_LOADV16be);
- hname = "MC_(helperc_LOADV16be)";
- break;
- case Ity_I8: helper = &MC_(helperc_LOADV8);
- hname = "MC_(helperc_LOADV8)";
- break;
- default: ppIRType(ty);
- VG_(tool_panic)("memcheck:expr2vbits_Load_WRK(BE)");
+ case Ity_V128: helper = &MC_(helperc_LOADV128be);
+ hname = "MC_(helperc_LOADV128be)";
+ ret_via_outparam = True;
+ break;
+ case Ity_I64: helper = &MC_(helperc_LOADV64be);
+ hname = "MC_(helperc_LOADV64be)";
+ break;
+ case Ity_I32: helper = &MC_(helperc_LOADV32be);
+ hname = "MC_(helperc_LOADV32be)";
+ break;
+ case Ity_I16: helper = &MC_(helperc_LOADV16be);
+ hname = "MC_(helperc_LOADV16be)";
+ break;
+ case Ity_I8: helper = &MC_(helperc_LOADV8);
+ hname = "MC_(helperc_LOADV8)";
+ break;
+ default: ppIRType(ty);
+ VG_(tool_panic)("memcheck:expr2vbits_Load_WRK(BE)");
}
}
+ tl_assert(helper);
+ tl_assert(hname);
+
/* Generate the actual address into addrAct. */
+ IRAtom* addrAct;
if (bias == 0) {
addrAct = addr;
} else {
@@ -4254,11 +4264,22 @@
/* We need to have a place to park the V bits we're just about to
read. */
- datavbits = newTemp(mce, ty, VSh);
- di = unsafeIRDirty_1_N( datavbits,
- 1/*regparms*/,
- hname, VG_(fnptr_to_fnentry)( helper ),
- mkIRExprVec_1( addrAct ));
+ IRTemp datavbits = newTemp(mce, ty, VSh);
+
+ /* Here's the call. */
+ IRDirty* di;
+ if (ret_via_outparam) {
+ di = unsafeIRDirty_1_N( datavbits,
+ 2/*regparms*/,
+ hname, VG_(fnptr_to_fnentry)( helper ),
+ mkIRExprVec_2( IRExprP__VECRET, addrAct ) );
+ } else {
+ di = unsafeIRDirty_1_N( datavbits,
+ 1/*regparms*/,
+ hname, VG_(fnptr_to_fnentry)( helper ),
+ mkIRExprVec_1( addrAct ) );
+ }
+
setHelperAnns( mce, di );
if (guard) {
di->guard = guard;
@@ -4298,20 +4319,8 @@
case Ity_I16:
case Ity_I32:
case Ity_I64:
+ case Ity_V128:
return expr2vbits_Load_WRK(mce, end, ty, addr, bias, guard);
- case Ity_V128: {
- IRAtom *v64hi, *v64lo;
- if (end == Iend_LE) {
- v64lo = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias+0, guard);
- v64hi = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias+8, guard);
- } else {
- v64hi = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias+0, guard);
- v64lo = expr2vbits_Load_WRK(mce, end, Ity_I64, addr, bias+8, guard);
- }
- return assignNew( 'V', mce,
- Ity_V128,
- binop(Iop_64HLtoV128, v64hi, v64lo));
- }
case Ity_V256: {
/* V256-bit case -- phrased in terms of 64 bit units (Qs),
with Q3 being the most significant lane. */
@@ -4868,10 +4877,12 @@
/* Inputs: unmasked args
Note: arguments are evaluated REGARDLESS of the guard expression */
for (i = 0; d->args[i]; i++) {
- if (d->cee->mcx_mask & (1<<i)) {
+ IRAtom* arg = d->args[i];
+ if ( (d->cee->mcx_mask & (1<<i))
+ || UNLIKELY(is_IRExprP__VECRET_or_BBPTR(arg)) ) {
/* ignore this arg */
} else {
- here = mkPCastTo( mce, Ity_I32, expr2vbits(mce, d->args[i]) );
+ here = mkPCastTo( mce, Ity_I32, expr2vbits(mce, arg) );
curr = mkUifU32(mce, here, curr);
}
}
@@ -5741,9 +5752,13 @@
}
case Ist_Dirty:
d = st->Ist.Dirty.details;
- for (i = 0; d->args[i]; i++)
- if (isBogusAtom(d->args[i]))
- return True;
+ for (i = 0; d->args[i]; i++) {
+ IRAtom* atom = d->args[i];
+ if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(atom))) {
+ if (isBogusAtom(atom))
+ return True;
+ }
+ }
if (isBogusAtom(d->guard))
return True;
if (d->mAddr && isBogusAtom(d->mAddr))
@@ -6629,10 +6644,12 @@
/* Inputs: unmasked args
Note: arguments are evaluated REGARDLESS of the guard expression */
for (i = 0; d->args[i]; i++) {
- if (d->cee->mcx_mask & (1<<i)) {
+ IRAtom* arg = d->args[i];
+ if ( (d->cee->mcx_mask & (1<<i))
+ || UNLIKELY(is_IRExprP__VECRET_or_BBPTR(arg)) ) {
/* ignore this arg */
} else {
- here = schemeE( mce, d->args[i] );
+ here = schemeE( mce, arg );
curr = gen_maxU32( mce, curr, here );
}
}
Modified: trunk/memcheck/mc_include.h (+10 -8)
===================================================================
--- trunk/memcheck/mc_include.h 2013-08-08 10:05:37 +01:00 (rev 13487)
+++ trunk/memcheck/mc_include.h 2013-08-08 11:41:46 +01:00 (rev 13488)
@@ -578,15 +578,17 @@
VG_REGPARM(2) void MC_(helperc_STOREV32le) ( Addr, UWord );
VG_REGPARM(2) void MC_(helperc_STOREV16be) ( Addr, UWord );
VG_REGPARM(2) void MC_(helperc_STOREV16le) ( Addr, UWord );
-VG_REGPARM(2) void MC_(helperc_STOREV8) ( Addr, UWord );
+VG_REGPARM(2) void MC_(helperc_STOREV8) ( Addr, UWord );
-VG_REGPARM(1) ULong MC_(helperc_LOADV64be) ( Addr );
-VG_REGPARM(1) ULong MC_(helperc_LOADV64le) ( Addr );
-VG_REGPARM(1) UWord MC_(helperc_LOADV32be) ( Addr );
-VG_REGPARM(1) UWord MC_(helperc_LOADV32le) ( Addr );
-VG_REGPARM(1) UWord MC_(helperc_LOADV16be) ( Addr );
-VG_REGPARM(1) UWord MC_(helperc_LOADV16le) ( Addr );
-VG_REGPARM(1) UWord MC_(helperc_LOADV8) ( Addr );
+VG_REGPARM(2) void MC_(helperc_LOADV128be) ( /*OUT*/V128*, Addr );
+VG_REGPARM(2) void MC_(helperc_LOADV128le) ( /*OUT*/V128*, Addr );
+VG_REGPARM(1) ULong MC_(helperc_LOADV64be) ( Addr );
+VG_REGPARM(1) ULong MC_(helperc_LOADV64le) ( Addr );
+VG_REGPARM(1) UWord MC_(helperc_LOADV32be) ( Addr );
+VG_REGPARM(1) UWord MC_(helperc_LOADV32le) ( Addr );
+VG_REGPARM(1) UWord MC_(helperc_LOADV16be) ( Addr );
+VG_REGPARM(1) UWord MC_(helperc_LOADV16le) ( Addr );
+VG_REGPARM(1) UWord MC_(helperc_LOADV8) ( Addr );
void MC_(helperc_MAKE_STACK_UNINIT) ( Addr base, UWord len,
Addr nia );
|
|
From: <sv...@va...> - 2013-08-08 10:29:20
|
sewardj 2013-08-08 11:28:59 +0100 (Thu, 08 Aug 2013)
New Revision: 2739
Log:
Add infrastructural support (IR, VEX) to allow returns of 128-
and 256-bit values from dirty helper functions, in a way which is
independent of the target ABIs and of compilers generating
correct struct return code.
Is a prereq for bug #294285.
MIPS fixes: Petar Jovanovic, mip...@gm...
S390 fixes: Maran, ma...@li...
Modified files:
trunk/priv/guest_amd64_toIR.c
trunk/priv/guest_mips_defs.h
trunk/priv/guest_mips_helpers.c
trunk/priv/guest_mips_toIR.c
trunk/priv/guest_ppc_toIR.c
trunk/priv/guest_s390_toIR.c
trunk/priv/guest_x86_toIR.c
trunk/priv/host_amd64_defs.c
trunk/priv/host_amd64_isel.c
trunk/priv/host_arm_defs.c
trunk/priv/host_arm_isel.c
trunk/priv/host_generic_regs.c
trunk/priv/host_generic_regs.h
trunk/priv/host_mips_defs.c
trunk/priv/host_mips_isel.c
trunk/priv/host_ppc_defs.c
trunk/priv/host_ppc_isel.c
trunk/priv/host_s390_defs.c
trunk/priv/host_s390_defs.h
trunk/priv/host_s390_isel.c
trunk/priv/host_x86_defs.c
trunk/priv/host_x86_isel.c
trunk/priv/ir_defs.c
trunk/priv/ir_opt.c
trunk/priv/main_main.c
trunk/pub/libvex_ir.h
Modified: trunk/pub/libvex_ir.h (+43 -7)
===================================================================
--- trunk/pub/libvex_ir.h 2013-08-07 10:45:08 +01:00 (rev 2738)
+++ trunk/pub/libvex_ir.h 2013-08-08 11:28:59 +01:00 (rev 2739)
@@ -1853,6 +1853,12 @@
Ist_Dirty inhibits various IR optimisations and so can cause
quite poor code to be generated. Try to avoid it.
+ In principle it would be allowable to have the arg vector
+ contain the special value IRExprP__VECRET, although not
+ IRExprP__BBPTR. However, at the moment there is no
+ requirement for clean helper calls to be able to return V128
+ or V256 values. Hence this is not allowed.
+
ppIRExpr output: <cee>(<args>):<retty>
eg. foo{0x80489304}(t1, t2):I32
*/
@@ -1894,6 +1900,34 @@
IRExpr* arg4; /* operand 4 */
};
+
+/* Two special constants of type IRExpr*, which can ONLY be used in
+ argument lists for dirty helper calls (IRDirty.args) and in NO
+ OTHER PLACES. And then only in very limited ways. These constants
+ are not pointer-aligned and hence can't be confused with real
+ IRExpr*s nor with NULL. */
+
+/* Denotes an argument which (in the helper) takes a pointer to a
+ (naturally aligned) V128 or V256, into which the helper is expected
+ to write its result. Use of IRExprP__VECRET is strictly
+ controlled. If the helper returns a V128 or V256 value then
+ IRExprP__VECRET must appear exactly once in the arg list, although
+ it can appear anywhere, and the helper must have a C 'void' return
+ type. If the helper returns any other type, IRExprP__VECRET may
+ not appear in the argument list. */
+#define IRExprP__VECRET ((IRExpr*)9)
+
+/* Denotes an void* argument which is passed to the helper, which at
+ run time will point to the thread's guest state area. This can
+ only appear at most once in an argument list, and it may not appear
+ at all in argument lists for clean helper calls. */
+#define IRExprP__BBPTR ((IRExpr*)17)
+
+static inline Bool is_IRExprP__VECRET_or_BBPTR ( IRExpr* e ) {
+ return e == IRExprP__VECRET || e == IRExprP__BBPTR;
+}
+
+
/* Expression constructors. */
extern IRExpr* IRExpr_Binder ( Int binder );
extern IRExpr* IRExpr_Get ( Int off, IRType ty );
@@ -2053,11 +2087,12 @@
number of times at a fixed interval, if required.
Normally, code is generated to pass just the args to the helper.
- However, if .needsBBP is set, then an extra first argument is
- passed, which is the baseblock pointer, so that the callee can
- access the guest state. It is invalid for .nFxState to be zero
- but .needsBBP to be True, since .nFxState==0 is a claim that the
- call does not access guest state.
+ However, if IRExprP__BBPTR is present in the argument list (at most
+ one instance is allowed), then the baseblock pointer is passed for
+ that arg, so that the callee can access the guest state. It is
+ invalid for .nFxState to be zero but IRExprP__BBPTR to be present,
+ since .nFxState==0 is a claim that the call does not access guest
+ state.
IMPORTANT NOTE re GUARDS: Dirty calls are strict, very strict. The
arguments and 'mFx' are evaluated REGARDLESS of the guard value.
@@ -2092,7 +2127,9 @@
allowed. */
IRCallee* cee; /* where to call */
IRExpr* guard; /* :: Ity_Bit. Controls whether call happens */
- IRExpr** args; /* arg list, ends in NULL */
+ /* The args vector may contain IRExprP__BBPTR and/or
+ IRExprP__VECRET, in both cases, at most once. */
+ IRExpr** args; /* arg vector, ends in NULL. */
IRTemp tmp; /* to assign result to, or IRTemp_INVALID if none */
/* Mem effects; we allow only one R/W/M region to be stated */
@@ -2101,7 +2138,6 @@
Int mSize; /* of access, or zero if mFx==Ifx_None */
/* Guest state effects; up to N allowed */
- Bool needsBBP; /* True => also pass guest state ptr to callee */
Int nFxState; /* must be 0 .. VEX_N_FXSTATE */
struct {
IREffect fx:16; /* read, write or modify? Ifx_None is invalid. */
Modified: trunk/priv/host_x86_isel.c (+224 -90)
===================================================================
--- trunk/priv/host_x86_isel.c 2013-08-07 10:45:08 +01:00 (rev 2738)
+++ trunk/priv/host_x86_isel.c 2013-08-08 11:28:59 +01:00 (rev 2739)
@@ -340,10 +340,23 @@
/* Push an arg onto the host stack, in preparation for a call to a
helper function of some kind. Returns the number of 32-bit words
- pushed. */
-
-static Int pushArg ( ISelEnv* env, IRExpr* arg )
+ pushed. If we encounter an IRExprP__VECRET then we expect that
+ r_vecRetAddr will be a valid register, that holds the relevant
+ address.
+*/
+static Int pushArg ( ISelEnv* env, IRExpr* arg, HReg r_vecRetAddr )
{
+ if (UNLIKELY(arg == IRExprP__VECRET)) {
+ vassert(0); //ATC
+ vassert(!hregIsInvalid(r_vecRetAddr));
+ addInstr(env, X86Instr_Push(X86RMI_Reg(r_vecRetAddr)));
+ return 1;
+ }
+ if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ addInstr(env, X86Instr_Push(X86RMI_Reg(hregX86_EBP())));
+ return 1;
+ }
+ /* Else it's a "normal" expression. */
IRType arg_ty = typeOfIRExpr(env->type_env, arg);
if (arg_ty == Ity_I32) {
addInstr(env, X86Instr_Push(iselIntExpr_RMI(env, arg)));
@@ -389,6 +402,12 @@
static
Bool mightRequireFixedRegs ( IRExpr* e )
{
+ if (UNLIKELY(is_IRExprP__VECRET_or_BBPTR(e))) {
+ // These are always "safe" -- either a copy of %esp in some
+ // arbitrary vreg, or a copy of %ebp, respectively.
+ return False;
+ }
+ /* Else it's a "normal" expression. */
switch (e->tag) {
case Iex_RdTmp: case Iex_Const: case Iex_Get:
return False;
@@ -398,15 +417,19 @@
}
-/* Do a complete function call. guard is a Ity_Bit expression
+/* Do a complete function call. |guard| is a Ity_Bit expression
indicating whether or not the call happens. If guard==NULL, the
- call is unconditional. */
+ call is unconditional. |retloc| is set to indicate where the
+ return value is after the call. The caller (of this fn) must
+ generate code to add |stackAdjustAfterCall| to the stack pointer
+ after the call is done. */
static
-void doHelperCall ( ISelEnv* env,
- Bool passBBP,
- IRExpr* guard, IRCallee* cee, IRExpr** args,
- RetLoc rloc )
+void doHelperCall ( /*OUT*/UInt* stackAdjustAfterCall,
+ /*OUT*/RetLoc* retloc,
+ ISelEnv* env,
+ IRExpr* guard,
+ IRCallee* cee, IRType retTy, IRExpr** args )
{
X86CondCode cc;
HReg argregs[3];
@@ -415,12 +438,29 @@
Int not_done_yet, n_args, n_arg_ws, stack_limit,
i, argreg, argregX;
+ /* Set default returns. We'll update them later if needed. */
+ *stackAdjustAfterCall = 0;
+ *retloc = mk_RetLoc_INVALID();
+
+ /* These are used for cross-checking that IR-level constraints on
+ the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ UInt nVECRETs = 0;
+ UInt nBBPTRs = 0;
+
/* Marshal args for a call, do the call, and clear the stack.
Complexities to consider:
- * if passBBP is True, %ebp (the baseblock pointer) is to be
- passed as the first arg.
+ * The return type can be I{64,32,16,8} or V128. In the V128
+ case, it is expected that |args| will contain the special
+ value IRExprP__VECRET, in which case this routine generates
+ code to allocate space on the stack for the vector return
+ value. Since we are not passing any scalars on the stack, it
+ is enough to preallocate the return space before marshalling
+ any arguments, in this case.
+ |args| may also contain IRExprP__BBPTR, in which case the
+ value in %ebp is passed as the corresponding argument.
+
* If the callee claims regparmness of 1, 2 or 3, we must pass the
first 1, 2 or 3 args in registers (EAX, EDX, and ECX
respectively). To keep things relatively simple, only args of
@@ -463,21 +503,45 @@
*/
vassert(cee->regparms >= 0 && cee->regparms <= 3);
+ /* Count the number of args and also the VECRETs */
n_args = n_arg_ws = 0;
- while (args[n_args]) n_args++;
+ while (args[n_args]) {
+ IRExpr* arg = args[n_args];
+ n_args++;
+ if (UNLIKELY(arg == IRExprP__VECRET)) {
+ nVECRETs++;
+ } else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ nBBPTRs++;
+ }
+ }
+ /* If this fails, the IR is ill-formed */
+ vassert(nBBPTRs == 0 || nBBPTRs == 1);
+
+ /* If we have a VECRET, allocate space on the stack for the return
+ value, and record the stack pointer after that. */
+ HReg r_vecRetAddr = INVALID_HREG;
+ if (nVECRETs == 1) {
+ vassert(retTy == Ity_V128 || retTy == Ity_V256);
+ vassert(retTy != Ity_V256); // we don't handle that yet (if ever)
+ r_vecRetAddr = newVRegI(env);
+ sub_from_esp(env, 16);
+ addInstr(env, mk_iMOVsd_RR( hregX86_ESP(), r_vecRetAddr ));
+ } else {
+ // If either of these fail, the IR is ill-formed
+ vassert(retTy != Ity_V128 && retTy != Ity_V256);
+ vassert(nVECRETs == 0);
+ }
+
not_done_yet = n_args;
- if (passBBP)
- not_done_yet++;
stack_limit = cee->regparms;
- if (cee->regparms > 0 && passBBP) stack_limit--;
/* ------ BEGIN marshall all arguments ------ */
/* Push (R to L) the stack-passed args, [n_args-1 .. stack_limit] */
for (i = n_args-1; i >= stack_limit; i--) {
- n_arg_ws += pushArg(env, args[i]);
+ n_arg_ws += pushArg(env, args[i], r_vecRetAddr);
not_done_yet--;
}
@@ -518,10 +582,18 @@
vex_printf("\n");
}
+ IRExpr* arg = args[i];
argreg--;
vassert(argreg >= 0);
- vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32);
- tmpregs[argreg] = iselIntExpr_R(env, args[i]);
+ if (UNLIKELY(arg == IRExprP__VECRET)) {
+ vassert(0); //ATC
+ }
+ else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ vassert(0); //ATC
+ } else {
+ vassert(typeOfIRExpr(env->type_env, arg) == Ity_I32);
+ tmpregs[argreg] = iselIntExpr_R(env, arg);
+ }
not_done_yet--;
}
for (i = stack_limit-1; i >= 0; i--) {
@@ -534,35 +606,30 @@
/* It's safe to compute all regparm args directly into their
target registers. */
for (i = stack_limit-1; i >= 0; i--) {
+ IRExpr* arg = args[i];
argreg--;
vassert(argreg >= 0);
- vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32);
- addInstr(env, X86Instr_Alu32R(Xalu_MOV,
- iselIntExpr_RMI(env, args[i]),
- argregs[argreg]));
+ if (UNLIKELY(arg == IRExprP__VECRET)) {
+ vassert(!hregIsInvalid(r_vecRetAddr));
+ addInstr(env, X86Instr_Alu32R(Xalu_MOV,
+ X86RMI_Reg(r_vecRetAddr),
+ argregs[argreg]));
+ }
+ else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ vassert(0); //ATC
+ } else {
+ vassert(typeOfIRExpr(env->type_env, arg) == Ity_I32);
+ addInstr(env, X86Instr_Alu32R(Xalu_MOV,
+ iselIntExpr_RMI(env, arg),
+ argregs[argreg]));
+ }
not_done_yet--;
}
}
- /* Not forgetting %ebp if needed. */
- if (passBBP) {
- vassert(argreg == 1);
- addInstr(env, mk_iMOVsd_RR( hregX86_EBP(), argregs[0]));
- not_done_yet--;
- }
-
/* ------ END deal with regparms ------ */
- } else {
-
- /* No regparms. Heave %ebp on the stack if needed. */
- if (passBBP) {
- addInstr(env, X86Instr_Push(X86RMI_Reg(hregX86_EBP())));
- n_arg_ws++;
- not_done_yet--;
- }
-
}
vassert(not_done_yet == 0);
@@ -584,8 +651,39 @@
}
}
- /* call the helper, and get the args off the stack afterwards. */
- callHelperAndClearArgs( env, cc, cee, n_arg_ws, rloc );
+ /* Do final checks, set the return values, and generate the call
+ instruction proper. */
+ vassert(*stackAdjustAfterCall == 0);
+ vassert(is_RetLoc_INVALID(*retloc));
+ switch (retTy) {
+ case Ity_INVALID:
+ /* Function doesn't return a value. */
+ *retloc = mk_RetLoc_simple(RLPri_None);
+ break;
+ case Ity_I64:
+ *retloc = mk_RetLoc_simple(RLPri_2Int);
+ break;
+ case Ity_I32: case Ity_I16: case Ity_I8:
+ *retloc = mk_RetLoc_simple(RLPri_Int);
+ break;
+ case Ity_V128:
+ *retloc = mk_RetLoc_spRel(RLPri_V128SpRel, 0);
+ *stackAdjustAfterCall = 16;
+ break;
+ case Ity_V256:
+ vassert(0); // ATC
+ *retloc = mk_RetLoc_spRel(RLPri_V256SpRel, 0);
+ *stackAdjustAfterCall = 32;
+ break;
+ default:
+ /* IR can denote other possible return types, but we don't
+ handle those here. */
+ vassert(0);
+ }
+
+ /* Finally, generate the call itself. This needs the *retloc value
+ set in the switch above, which is why it's at the end. */
+ callHelperAndClearArgs( env, cc, cee, n_arg_ws, *retloc );
}
@@ -1307,7 +1405,7 @@
addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn,
- 0, RetLocInt ));
+ 0, mk_RetLoc_simple(RLPri_Int) ));
add_to_esp(env, 2*4);
addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
return dst;
@@ -1371,8 +1469,13 @@
goto irreducible;
/* Marshal args, do the call, clear stack. */
- doHelperCall( env, False, NULL, e->Iex.CCall.cee,
- e->Iex.CCall.args, RetLocInt );
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ e->Iex.CCall.cee, e->Iex.CCall.retty, e->Iex.CCall.args );
+ vassert(is_sane_RetLoc(rloc));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
return dst;
@@ -1890,8 +1993,15 @@
vassert(cal->Iex.CCall.retty == Ity_I32); /* else ill-typed IR */
vassert(con->Iex.Const.con->tag == Ico_U32);
/* Marshal args, do the call. */
- doHelperCall( env, False, NULL, cal->Iex.CCall.cee,
- cal->Iex.CCall.args, RetLocInt );
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ cal->Iex.CCall.cee,
+ cal->Iex.CCall.retty, cal->Iex.CCall.args );
+ vassert(is_sane_RetLoc(rloc));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
+ /* */
addInstr(env, X86Instr_Alu32R(Xalu_CMP,
X86RMI_Imm(con->Iex.Const.con->Ico.U32),
hregX86_EAX()));
@@ -2432,7 +2542,7 @@
addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn,
- 0, RetLoc2Int ));
+ 0, mk_RetLoc_simple(RLPri_2Int) ));
add_to_esp(env, 4*4);
addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
@@ -2472,7 +2582,7 @@
addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn,
- 0, RetLoc2Int ));
+ 0, mk_RetLoc_simple(RLPri_2Int) ));
add_to_esp(env, 3*4);
addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
@@ -2711,7 +2821,7 @@
addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn,
- 0, RetLoc2Int ));
+ 0, mk_RetLoc_simple(RLPri_2Int) ));
add_to_esp(env, 2*4);
addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
@@ -2732,8 +2842,15 @@
HReg tHi = newVRegI(env);
/* Marshal args, do the call, clear stack. */
- doHelperCall( env, False, NULL, e->Iex.CCall.cee,
- e->Iex.CCall.args, RetLoc2Int );
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ e->Iex.CCall.cee,
+ e->Iex.CCall.retty, e->Iex.CCall.args );
+ vassert(is_sane_RetLoc(rloc));
+ vassert(rloc.pri == RLPri_2Int);
+ vassert(addToSp == 0);
+ /* */
addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
@@ -3657,7 +3774,7 @@
X86AMode_IR(0, hregX86_ECX())));
/* call the helper */
addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn,
- 3, RetLocNone ));
+ 3, mk_RetLoc_simple(RLPri_None) ));
/* fetch the result from memory, using %r_argp, which the
register allocator will keep alive across the call. */
addInstr(env, X86Instr_SseLdSt(True/*isLoad*/, dst,
@@ -3925,61 +4042,78 @@
/* --------- Call to DIRTY helper --------- */
case Ist_Dirty: {
IRDirty* d = stmt->Ist.Dirty.details;
- Bool passBBP = False;
- if (d->nFxState == 0)
- vassert(!d->needsBBP);
-
- passBBP = toBool(d->nFxState > 0 && d->needsBBP);
-
/* Figure out the return type, if any. */
IRType retty = Ity_INVALID;
if (d->tmp != IRTemp_INVALID)
retty = typeOfIRTemp(env->type_env, d->tmp);
- /* Marshal args, do the call, clear stack, set the return value
- to 0x555..555 if this is a conditional call that returns a
- value and the call is skipped. We need to set the ret-loc
- correctly in order to implement the IRDirty semantics that
- the return value is 0x555..555 if the call doesn't happen. */
- RetLoc rloc = RetLocINVALID;
+ Bool retty_ok = False;
switch (retty) {
case Ity_INVALID: /* function doesn't return anything */
- rloc = RetLocNone; break;
- case Ity_I64:
- rloc = RetLoc2Int; break;
- case Ity_I32: case Ity_I16: case Ity_I8:
- rloc = RetLocInt; break;
+ case Ity_I64: case Ity_I32: case Ity_I16: case Ity_I8:
+ case Ity_V128:
+ retty_ok = True; break;
default:
break;
}
- if (rloc == RetLocINVALID)
+ if (!retty_ok)
break; /* will go to stmt_fail: */
- /* Marshal args, do the call, clear stack. */
- doHelperCall( env, passBBP, d->guard, d->cee, d->args, rloc );
+ /* Marshal args, do the call, and set the return value to
+ 0x555..555 if this is a conditional call that returns a value
+ and the call is skipped. */
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, d->guard, d->cee, retty, d->args );
+ vassert(is_sane_RetLoc(rloc));
/* Now figure out what to do with the returned value, if any. */
- if (d->tmp == IRTemp_INVALID)
- /* No return value. Nothing to do. */
- return;
-
- if (retty == Ity_I64) {
- HReg dstHi, dstLo;
- /* The returned value is in %edx:%eax. Park it in the
- register-pair associated with tmp. */
- lookupIRTemp64( &dstHi, &dstLo, env, d->tmp);
- addInstr(env, mk_iMOVsd_RR(hregX86_EDX(),dstHi) );
- addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dstLo) );
- return;
+ switch (retty) {
+ case Ity_INVALID: {
+ /* No return value. Nothing to do. */
+ vassert(d->tmp == IRTemp_INVALID);
+ vassert(rloc.pri == RLPri_None);
+ vassert(addToSp == 0);
+ return;
+ }
+ case Ity_I32: case Ity_I16: case Ity_I8: {
+ /* The returned value is in %eax. Park it in the register
+ associated with tmp. */
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
+ HReg dst = lookupIRTemp(env, d->tmp);
+ addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dst) );
+ return;
+ }
+ case Ity_I64: {
+ /* The returned value is in %edx:%eax. Park it in the
+ register-pair associated with tmp. */
+ vassert(rloc.pri == RLPri_2Int);
+ vassert(addToSp == 0);
+ HReg dstHi, dstLo;
+ lookupIRTemp64( &dstHi, &dstLo, env, d->tmp);
+ addInstr(env, mk_iMOVsd_RR(hregX86_EDX(),dstHi) );
+ addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dstLo) );
+ return;
+ }
+ case Ity_V128: {
+ /* The returned value is on the stack, and *retloc tells
+ us where. Fish it off the stack and then move the
+ stack pointer upwards to clear it, as directed by
+ doHelperCall. */
+ vassert(rloc.pri == RLPri_V128SpRel);
+ vassert(addToSp >= 16);
+ HReg dst = lookupIRTemp(env, d->tmp);
+ X86AMode* am = X86AMode_IR(rloc.spOff, hregX86_ESP());
+ addInstr(env, X86Instr_SseLdSt( True/*load*/, dst, am ));
+ add_to_esp(env, addToSp);
+ return;
+ }
+ default:
+ /*NOTREACHED*/
+ vassert(0);
}
- if (retty == Ity_I32 || retty == Ity_I16 || retty == Ity_I8) {
- /* The returned value is in %eax. Park it in the register
- associated with tmp. */
- HReg dst = lookupIRTemp(env, d->tmp);
- addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dst) );
- return;
- }
break;
}
Modified: trunk/priv/host_mips_isel.c (+221 -108)
===================================================================
--- trunk/priv/host_mips_isel.c 2013-08-07 10:45:08 +01:00 (rev 2738)
+++ trunk/priv/host_mips_isel.c 2013-08-08 11:28:59 +01:00 (rev 2739)
@@ -379,12 +379,18 @@
return fr_dst;
}
-/* Do a complete function call. guard is a Ity_Bit expression
+/* Do a complete function call. |guard| is a Ity_Bit expression
indicating whether or not the call happens. If guard==NULL, the
- call is unconditional. */
+ call is unconditional. |retloc| is set to indicate where the
+ return value is after the call. The caller (of this fn) must
+ generate code to add |stackAdjustAfterCall| to the stack pointer
+ after the call is done. */
-static void doHelperCall(ISelEnv * env, Bool passBBP, IRExpr * guard,
- IRCallee * cee, IRExpr ** args, RetLoc rloc)
+static void doHelperCall(/*OUT*/UInt* stackAdjustAfterCall,
+ /*OUT*/RetLoc* retloc,
+ ISelEnv* env,
+ IRExpr* guard,
+ IRCallee* cee, IRType retTy, IRExpr** args )
{
MIPSCondCode cc;
HReg argregs[MIPS_N_REGPARMS];
@@ -392,9 +398,17 @@
Bool go_fast;
Int n_args, i, argreg;
UInt argiregs;
- ULong target;
HReg src = INVALID_HREG;
+ /* Set default returns. We'll update them later if needed. */
+ *stackAdjustAfterCall = 0;
+ *retloc = mk_RetLoc_INVALID();
+
+ /* These are used for cross-checking that IR-level constraints on
+ the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ UInt nVECRETs = 0;
+ UInt nBBPTRs = 0;
+
/* MIPS O32 calling convention: up to four registers ($a0 ... $a3)
are allowed to be used for passing integer arguments. They correspond
to regs GPR4 ... GPR7. Note that the cee->regparms field is meaningless
@@ -406,11 +420,31 @@
to regs GPR4 ... GPR11. Note that the cee->regparms field is meaningless
on MIPS host (since we only implement one calling convention) and so we
always ignore it. */
+
+ /* The return type can be I{64,32,16,8} or V{128,256}. In the
+ latter two cases, it is expected that |args| will contain the
+ special value IRExprP__VECRET, in which case this routine
+ generates code to allocate space on the stack for the vector
+ return value. Since we are not passing any scalars on the
+ stack, it is enough to preallocate the return space before
+ marshalling any arguments, in this case.
+
+ |args| may also contain IRExprP__BBPTR, in which case the value
+ in the guest state pointer register is passed as the
+ corresponding argument. */
+
n_args = 0;
- for (i = 0; args[i]; i++)
+ for (i = 0; args[i]; i++) {
+ IRExpr* arg = args[i];
+ if (UNLIKELY(arg == IRExprP__VECRET)) {
+ nVECRETs++;
+ } else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ nBBPTRs++;
+ }
n_args++;
+ }
- if (MIPS_N_REGPARMS < n_args + (passBBP ? 1 : 0)) {
+ if (n_args > MIPS_N_REGPARMS) {
vpanic("doHelperCall(MIPS): cannot currently handle > 4 or 8 args");
}
if (mode64) {
@@ -423,6 +457,9 @@
argregs[6] = hregMIPS_GPR10(mode64);
argregs[7] = hregMIPS_GPR11(mode64);
argiregs = 0;
+ tmpregs[0] = tmpregs[1] = tmpregs[2] =
+ tmpregs[3] = tmpregs[4] = tmpregs[5] =
+ tmpregs[6] = tmpregs[7] = INVALID_HREG;
} else {
argregs[0] = hregMIPS_GPR4(mode64);
argregs[1] = hregMIPS_GPR5(mode64);
@@ -429,16 +466,21 @@
argregs[2] = hregMIPS_GPR6(mode64);
argregs[3] = hregMIPS_GPR7(mode64);
argiregs = 0;
+ tmpregs[0] = tmpregs[1] = tmpregs[2] = tmpregs[3] = INVALID_HREG;
}
- tmpregs[0] = tmpregs[1] = tmpregs[2] = tmpregs[3] = INVALID_HREG;
-
/* First decide which scheme (slow or fast) is to be used. First assume the
fast scheme, and select slow if any contraindications (wow) appear. */
go_fast = True;
- if (guard) {
+ /* We'll need space on the stack for the return value. Avoid
+ possible complications with nested calls by using the slow
+ scheme. */
+ if (retTy == Ity_V128 || retTy == Ity_V256)
+ go_fast = False;
+
+ if (go_fast && guard) {
if (guard->tag == Iex_Const && guard->Iex.Const.con->tag == Ico_U1
&& guard->Iex.Const.con->Ico.U1 == True) {
/* unconditional */
@@ -462,34 +504,41 @@
if (go_fast) {
/* FAST SCHEME */
argreg = 0;
- if (passBBP) {
- argiregs |= (1 << (argreg + 4));
- addInstr(env, mk_iMOVds_RR(argregs[argreg],
- GuestStatePointer(mode64)));
- argreg++;
- }
for (i = 0; i < n_args; i++) {
+ IRExpr* arg = args[i];
vassert(argreg < MIPS_N_REGPARMS);
- vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32
- || typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
- if (typeOfIRExpr(env->type_env, args[i]) == Ity_I32 || mode64) {
+
+ IRType aTy = Ity_INVALID;
+ if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ aTy = typeOfIRExpr(env->type_env, arg);
+
+ if (aTy == Ity_I32 || mode64) {
argiregs |= (1 << (argreg + 4));
- addInstr(env, mk_iMOVds_RR(argregs[argreg], iselWordExpr_R(env,
- args[i])));
- } else { /* Ity_I64 */
+ addInstr(env, mk_iMOVds_RR(argregs[argreg],
+ iselWordExpr_R(env, arg)));
+ argreg++;
+ } else if (aTy == Ity_I64) { /* Ity_I64 */
if (argreg & 1) {
argreg++;
argiregs |= (1 << (argreg + 4));
}
HReg rHi, rLo;
- iselInt64Expr(&rHi, &rLo, env, args[i]);
+ iselInt64Expr(&rHi, &rLo, env, arg);
argiregs |= (1 << (argreg + 4));
addInstr(env, mk_iMOVds_RR( argregs[argreg++], rHi ));
argiregs |= (1 << (argreg + 4));
addInstr(env, mk_iMOVds_RR( argregs[argreg], rLo));
+ argreg++;
+ } else if (arg == IRExprP__BBPTR) {
+ vassert(0); // ATC
+ addInstr(env, mk_iMOVds_RR(argregs[argreg],
+ GuestStatePointer(mode64)));
+ argreg++;
+ } else if (arg == IRExprP__VECRET) {
+ // If this happens, it denotes ill-formed IR.
+ vassert(0);
}
- argreg++;
}
/* Fast scheme only applies for unconditional calls. Hence: */
cc = MIPScc_AL;
@@ -496,32 +545,38 @@
} else {
/* SLOW SCHEME; move via temporaries */
argreg = 0;
- if (passBBP) {
- /* This is pretty stupid; better to move directly to r3
- after the rest of the args are done. */
- tmpregs[argreg] = newVRegI(env);
- addInstr(env, mk_iMOVds_RR(tmpregs[argreg],
- GuestStatePointer(mode64)));
- argreg++;
- }
+
for (i = 0; i < n_args; i++) {
vassert(argreg < MIPS_N_REGPARMS);
- vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32
- || typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
- if (typeOfIRExpr(env->type_env, args[i]) == Ity_I32 || mode64) {
- tmpregs[argreg] = iselWordExpr_R(env, args[i]);
- } else { /* Ity_I64 */
+ IRExpr* arg = args[i];
+
+ IRType aTy = Ity_INVALID;
+ if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ aTy = typeOfIRExpr(env->type_env, arg);
+
+ if (aTy == Ity_I32 || mode64) {
+ tmpregs[argreg] = iselWordExpr_R(env, arg);
+ argreg++;
+ } else if (aTy == Ity_I64) { /* Ity_I64 */
if (argreg & 1)
argreg++;
if (argreg + 1 >= MIPS_N_REGPARMS)
vassert(0); /* out of argregs */
HReg raHi, raLo;
- iselInt64Expr(&raHi, &raLo, env, args[i]);
+ iselInt64Expr(&raHi, &raLo, env, arg);
tmpregs[argreg] = raLo;
argreg++;
tmpregs[argreg] = raHi;
+ argreg++;
+ } else if (arg == IRExprP__BBPTR) {
+ vassert(0); // ATC
+ tmpregs[argreg] = GuestStatePointer(mode64);
+ argreg++;
}
- argreg++;
+ else if (arg == IRExprP__VECRET) {
+ // If this happens, it denotes ill-formed IR
+ vassert(0);
+ }
}
/* Now we can compute the condition. We can't do it earlier
@@ -549,14 +604,49 @@
}
}
- target = mode64 ? Ptr_to_ULong(cee->addr) :
- toUInt(Ptr_to_ULong(cee->addr));
+ /* Do final checks, set the return values, and generate the call
+ instruction proper. */
+ vassert(nBBPTRs == 0 || nBBPTRs == 1);
+ vassert(nVECRETs == (retTy == Ity_V128 || retTy == Ity_V256) ? 1 : 0);
+ vassert(*stackAdjustAfterCall == 0);
+ vassert(is_RetLoc_INVALID(*retloc));
+ switch (retTy) {
+ case Ity_INVALID:
+ /* Function doesn't return a value. */
+ *retloc = mk_RetLoc_simple(RLPri_None);
+ break;
+ case Ity_I64:
+ *retloc = mk_RetLoc_simple(mode64 ? RLPri_Int : RLPri_2Int);
+ break;
+ case Ity_I32: case Ity_I16: case Ity_I8:
+ *retloc = mk_RetLoc_simple(RLPri_Int);
+ break;
+ case Ity_V128:
+ vassert(0); // ATC
+ *retloc = mk_RetLoc_spRel(RLPri_V128SpRel, 0);
+ *stackAdjustAfterCall = 16;
+ break;
+ case Ity_V256:
+ vassert(0); // ATC
+ *retloc = mk_RetLoc_spRel(RLPri_V256SpRel, 0);
+ *stackAdjustAfterCall = 32;
+ break;
+ default:
+ /* IR can denote other possible return types, but we don't
+ handle those here. */
+ vassert(0);
+ }
- /* Finally, the call itself. */
+ ULong target = mode64 ? Ptr_to_ULong(cee->addr) :
+ toUInt(Ptr_to_ULong(cee->addr));
+
+ /* Finally, generate the call itself. This needs the *retloc value
+ set in the switch above, which is why it's at the end. */
if (cc == MIPScc_AL)
- addInstr(env, MIPSInstr_CallAlways(cc, (Addr64)target, argiregs, rloc));
+ addInstr(env, MIPSInstr_CallAlways(cc, (Addr64)target, argiregs,
+ *retloc));
else
- addInstr(env, MIPSInstr_Call(cc, (Addr64)target, argiregs, src, rloc));
+ addInstr(env, MIPSInstr_Call(cc, (Addr64)target, argiregs, src, *retloc));
}
/*---------------------------------------------------------*/
@@ -1244,12 +1334,13 @@
}
/* What's the retloc? */
- RetLoc rloc = RetLocINVALID;
+ RetLoc rloc = mk_RetLoc_INVALID();
if (ty == Ity_I32) {
- rloc = RetLocInt;
+ rloc = mk_RetLoc_simple(RLPri_Int);
}
else if (ty == Ity_I64) {
- rloc = mode64 ? RetLocInt : RetLoc2Int;
+ rloc = mode64 ? mk_RetLoc_simple(RLPri_Int) :
+ mk_RetLoc_simple(RLPri_2Int);
}
else {
goto irreducible;
@@ -1681,12 +1772,13 @@
break;
}
- RetLoc rloc = RetLocINVALID;
+ RetLoc rloc = mk_RetLoc_INVALID();
if (ty == Ity_I32) {
- rloc = RetLocInt;
+ rloc = mk_RetLoc_simple(RLPri_Int);
}
else if (ty == Ity_I64) {
- rloc = mode64 ? RetLocInt : RetLoc2Int;
+ rloc = mode64 ? mk_RetLoc_simple(RLPri_Int) :
+ mk_RetLoc_simple(RLPri_2Int);
}
else {
goto irreducible;
@@ -1796,23 +1888,18 @@
/* be very restrictive for now. Only 32/64-bit ints allowed for
args, and 32 bits for return type. Don't forget to change
the RetLoc if more return types are allowed in future. */
- if (e->Iex.CCall.retty != Ity_I32 && !mode64)
+ if (e->Iex.CCall.retty != Ity_I32)
goto irreducible;
- /* What's the retloc? */
- RetLoc rloc = RetLocINVALID;
- if (ty == Ity_I32) {
- rloc = RetLocInt;
- }
- else if (ty == Ity_I64) {
- rloc = mode64 ? RetLocInt : RetLoc2Int;
- }
- else {
- goto irreducible;
- }
+ /* Marshal args, do the call, clear stack. */
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall(&addToSp, &rloc, env, NULL/*guard*/, e->Iex.CCall.cee,
+ e->Iex.CCall.retty, e->Iex.CCall.args );
- /* Marshal args, do the call, clear stack. */
- doHelperCall(env, False, NULL, e->Iex.CCall.cee, e->Iex.CCall.args, rloc);
+ vassert(is_sane_RetLoc(rloc));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
return r_dst;
}
@@ -3704,66 +3791,92 @@
/* --------- Call to DIRTY helper --------- */
case Ist_Dirty: {
IRDirty *d = stmt->Ist.Dirty.details;
- Bool passBBP = False;
- if (d->nFxState == 0)
- vassert(!d->needsBBP);
-
- passBBP = toBool(d->nFxState > 0 && d->needsBBP);
-
/* Figure out the return type, if any. */
IRType retty = Ity_INVALID;
if (d->tmp != IRTemp_INVALID)
retty = typeOfIRTemp(env->type_env, d->tmp);
- /* Marshal args, do the call, clear stack, set the return
- value to 0x555..555 if this is a conditional call that
- returns a value and the call is skipped. We need to set
- the ret-loc correctly in order to implement the IRDirty
- semantics that the return value is 0x555..555 if the call
- doesn't happen. */
- RetLoc rloc = RetLocINVALID;
+ /* Throw out any return types we don't know about. */
+ Bool retty_ok = False;
switch (retty) {
- case Ity_INVALID: /* function doesn't return anything */
- rloc = RetLocNone; break;
- case Ity_I64:
- rloc = mode64 ? RetLocInt : RetLoc2Int; break;
- case Ity_I32: case Ity_I16: case Ity_I8:
- rloc = RetLocInt; break;
+ case Ity_INVALID: /* Function doesn't return anything. */
+ case Ity_V128:
+ case Ity_I64: case Ity_I32: case Ity_I16: case Ity_I8:
+ retty_ok = True; break;
default:
break;
}
- if (rloc == RetLocINVALID)
+
+ if (!retty_ok)
break; /* will go to stmt_fail: */
- /* Marshal args, do the call, clear stack. */
- doHelperCall(env, passBBP, d->guard, d->cee, d->args, rloc);
+ /* Marshal args, do the call, clear stack, set the return value
+ to 0x555..555 if this is a conditional call that returns a
+ value and the call is skipped. */
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, d->guard, d->cee, retty, d->args );
+ vassert(is_sane_RetLoc(rloc));
/* Now figure out what to do with the returned value, if any. */
- if (d->tmp == IRTemp_INVALID)
- /* No return value. Nothing to do. */
- return;
+ switch (retty) {
+ case Ity_INVALID: {
+ /* No return value. Nothing to do. */
+ vassert(d->tmp == IRTemp_INVALID);
+ vassert(rloc.pri == RLPri_None);
+ vassert(addToSp == 0);
+ return;
+ }
+ case Ity_I32: case Ity_I16: case Ity_I8: {
+ /* The returned value is in $v0. Park it in the register
+ associated with tmp. */
+ HReg r_dst = lookupIRTemp(env, d->tmp);
+ addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
+ return;
+ }
+ case Ity_I64: {
+ if (mode64) {
+ /* The returned value is in $v0. Park it in the register
+ associated with tmp. */
+ HReg r_dst = lookupIRTemp(env, d->tmp);
+ addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
+ return;
+ } else {
+ HReg rHi = newVRegI(env);
+ HReg rLo = newVRegI(env);
+ HReg dstHi, dstLo;
+ addInstr(env, mk_iMOVds_RR(rLo, hregMIPS_GPR2(mode64)));
+ addInstr(env, mk_iMOVds_RR(rHi, hregMIPS_GPR3(mode64)));
+ lookupIRTemp64(&dstHi, &dstLo, env, d->tmp);
+ addInstr(env, mk_iMOVds_RR(dstHi, rHi));
+ addInstr(env, mk_iMOVds_RR(dstLo, rLo));
+ return;
+ }
+ }
+ case Ity_V128: {
+ /* ATC. The code that this produces really
+ needs to be looked at, to verify correctness.
+ I don't think this can ever happen though, since the
+ MIPS front end never produces 128-bit loads/stores. */
+ vassert(0);
+ vassert(rloc.pri == RLPri_V128SpRel);
+ vassert(addToSp >= 16);
+ HReg dst = lookupIRTemp(env, d->tmp);
+ MIPSAMode* am = MIPSAMode_IR(rloc.spOff, StackPointer(mode64));
+ addInstr(env, MIPSInstr_Load(mode64 ? 8 : 4, dst, am, mode64));
+ add_to_sp(env, addToSp);
+ return;
- if (retty == Ity_I64 && !mode64) {
- HReg rHi = newVRegI(env);
- HReg rLo = newVRegI(env);
- HReg dstHi, dstLo;
- addInstr(env, mk_iMOVds_RR(rLo, hregMIPS_GPR2(mode64)));
- addInstr(env, mk_iMOVds_RR(rHi, hregMIPS_GPR3(mode64)));
- lookupIRTemp64(&dstHi, &dstLo, env, d->tmp);
- addInstr(env, mk_iMOVds_RR(dstHi, rHi));
- addInstr(env, mk_iMOVds_RR(dstLo, rLo));
- return;
+ }
+ default:
+ /*NOTREACHED*/
+ vassert(0);
}
- if (retty == Ity_I8 || retty == Ity_I16 || retty == Ity_I32
- || (retty == Ity_I64 && mode64)) {
- /* The returned value is in %r2. Park it in the register
- associated with tmp. */
- HReg r_dst = lookupIRTemp(env, d->tmp);
- addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
- return;
- }
- break;
}
/* --------- Load Linked or Store Conditional --------- */
Modified: trunk/priv/host_amd64_isel.c (+219 -93)
===================================================================
--- trunk/priv/host_amd64_isel.c 2013-08-07 10:45:08 +01:00 (rev 2738)
+++ trunk/priv/host_amd64_isel.c 2013-08-08 11:28:59 +01:00 (rev 2739)
@@ -366,6 +366,15 @@
HReg dst,
IRExpr* e )
{
+ /* Per comments in doHelperCall below, appearance of
+ IRExprP__VECRET implies ill-formed IR. */
+ vassert(e != IRExprP__VECRET);
+
+ /* In this case we give out a copy of the BaseBlock pointer. */
+ if (UNLIKELY(e == IRExprP__BBPTR)) {
+ return mk_iMOVsd_RR( hregAMD64_RBP(), dst );
+ }
+
vassert(typeOfIRExpr(env->type_env, e) == Ity_I64);
if (e->tag == Iex_Const) {
@@ -409,27 +418,37 @@
}
-/* Do a complete function call. guard is a Ity_Bit expression
+/* Do a complete function call. |guard| is a Ity_Bit expression
indicating whether or not the call happens. If guard==NULL, the
- call is unconditional. */
+ call is unconditional. |retloc| is set to indicate where the
+ return value is after the call. The caller (of this fn) must
+ generate code to add |stackAdjustAfterCall| to the stack pointer
+ after the call is done. */
static
-void doHelperCall ( ISelEnv* env,
- Bool passBBP,
- IRExpr* guard, IRCallee* cee, IRExpr** args,
- RetLoc rloc )
+void doHelperCall ( /*OUT*/UInt* stackAdjustAfterCall,
+ /*OUT*/RetLoc* retloc,
+ ISelEnv* env,
+ IRExpr* guard,
+ IRCallee* cee, IRType retTy, IRExpr** args )
{
AMD64CondCode cc;
HReg argregs[6];
HReg tmpregs[6];
AMD64Instr* fastinstrs[6];
- Int n_args, i, argreg;
+ UInt n_args, i;
+ /* Set default returns. We'll update them later if needed. */
+ *stackAdjustAfterCall = 0;
+ *retloc = mk_RetLoc_INVALID();
+
+ /* These are used for cross-checking that IR-level constraints on
+ the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ UInt nVECRETs = 0;
+ UInt nBBPTRs = 0;
+
/* Marshal args for a call and do the call.
- If passBBP is True, %rbp (the baseblock pointer) is to be passed
- as the first arg.
-
This function only deals with a tiny set of possibilities, which
cover all helpers in practice. The restrictions are that only
arguments in registers are supported, hence only 6x64 integer
@@ -436,6 +455,17 @@
bits in total can be passed. In fact the only supported arg
type is I64.
+ The return type can be I{64,32,16,8} or V{128,256}. In the
+ latter two cases, it is expected that |args| will contain the
+ special value IRExprP__VECRET, in which case this routine
+ generates code to allocate space on the stack for the vector
+ return value. Since we are not passing any scalars on the
+ stack, it is enough to preallocate the return space before
+ marshalling any arguments, in this case.
+
+ |args| may also contain IRExprP__BBPTR, in which case the
+ value in %rbp is passed as the corresponding argument.
+
Generating code which is both efficient and correct when
parameters are to be passed in registers is difficult, for the
reasons elaborated in detail in comments attached to
@@ -461,7 +491,10 @@
fast scheme, else use the slow scheme. Note also that only
unconditional calls may use the fast scheme, since having to
compute a condition expression could itself trash real
- registers.
+ registers. Note that for simplicity, in the case where
+ IRExprP__VECRET is present, we use the slow scheme. This is
+ motivated by the desire to avoid any possible complexity
+ w.r.t. nested calls.
Note this requires being able to examine an expression and
determine whether or not evaluation of it might use a fixed
@@ -474,12 +507,11 @@
/* Note that the cee->regparms field is meaningless on AMD64 host
(since there is only one calling convention) and so we always
ignore it. */
-
n_args = 0;
for (i = 0; args[i]; i++)
n_args++;
- if (6 < n_args + (passBBP ? 1 : 0))
+ if (n_args > 6)
vpanic("doHelperCall(AMD64): cannot currently handle > 6 args");
argregs[0] = hregAMD64_RDI();
@@ -499,6 +531,12 @@
assume the fast scheme, and select slow if any contraindications
(wow) appear. */
+ /* We'll need space on the stack for the return value. Avoid
+ possible complications with nested calls by using the slow
+ scheme. */
+ if (retTy == Ity_V128 || retTy == Ity_V256)
+ goto slowscheme;
+
if (guard) {
if (guard->tag == Iex_Const
&& guard->Iex.Const.con->tag == Ico_U1
@@ -517,26 +555,28 @@
in a buffer and emit that if we're successful. */
/* FAST SCHEME */
- argreg = 0;
- if (passBBP) {
- fastinstrs[argreg] = mk_iMOVsd_RR( hregAMD64_RBP(), argregs[argreg]);
- argreg++;
- }
-
+ /* In this loop, we process args that can be computed into the
+ destination (real) register with a single instruction, without
+ using any fixed regs. That also includes IRExprP__BBPTR, but
+ not IRExprP__VECRET. Indeed, if the IR is well-formed, we can
+ never see IRExprP__VECRET at this point, since the return-type
+ check above should ensure all those cases use the slow scheme
+ instead. */
+ vassert(n_args >= 0 && n_args <= 6);
for (i = 0; i < n_args; i++) {
- vassert(argreg < 6);
- vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
- fastinstrs[argreg]
- = iselIntExpr_single_instruction( env, argregs[argreg], args[i] );
- if (fastinstrs[argreg] == NULL)
+ IRExpr* arg = args[i];
+ if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg))) {
+ vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
+ }
+ fastinstrs[i]
+ = iselIntExpr_single_instruction( env, argregs[i], args[i] );
+ if (fastinstrs[i] == NULL)
goto slowscheme;
- argreg++;
}
/* Looks like we're in luck. Emit the accumulated instructions and
move on to doing the call itself. */
- vassert(argreg <= 6);
- for (i = 0; i < argreg; i++)
+ for (i = 0; i < n_args; i++)
addInstr(env, fastinstrs[i]);
/* Fast scheme only applies for unconditional calls. Hence: */
@@ -547,26 +587,47 @@
/* SLOW SCHEME; move via temporaries */
slowscheme:
+ {}
# if 0 /* debug only */
if (n_args > 0) {for (i = 0; args[i]; i++) {
ppIRExpr(args[i]); vex_printf(" "); }
vex_printf("\n");}
# endif
- argreg = 0;
- if (passBBP) {
- /* This is pretty stupid; better to move directly to rdi
- after the rest of the args are done. */
- tmpregs[argreg] = newVRegI(env);
- addInstr(env, mk_iMOVsd_RR( hregAMD64_RBP(), tmpregs[argreg]));
- argreg++;
+ /* If we have a vector return type, allocate a place for it on the
+ stack and record its address. */
+ HReg r_vecRetAddr = INVALID_HREG;
+ if (retTy == Ity_V128) {
+ r_vecRetAddr = newVRegI(env);
+ sub_from_rsp(env, 16);
+ addInstr(env, mk_iMOVsd_RR( hregAMD64_RSP(), r_vecRetAddr ));
}
+ else if (retTy == Ity_V256) {
+ vassert(0); //ATC
+ r_vecRetAddr = newVRegI(env);
+ sub_from_rsp(env, 32);
+ addInstr(env, mk_iMOVsd_RR( hregAMD64_RSP(), r_vecRetAddr ));
+ }
+ vassert(n_args >= 0 && n_args <= 6);
for (i = 0; i < n_args; i++) {
- vassert(argreg < 6);
- vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
- tmpregs[argreg] = iselIntExpr_R(env, args[i]);
- argreg++;
+ IRExpr* arg = args[i];
+ if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ tmpregs[i] = newVRegI(env);
+ addInstr(env, mk_iMOVsd_RR( hregAMD64_RBP(), tmpregs[i]));
+ nBBPTRs++;
+ }
+ else if (UNLIKELY(arg == IRExprP__VECRET)) {
+ /* We stashed the address of the return slot earlier, so just
+ retrieve it now. */
+ vassert(!hregIsInvalid(r_vecRetAddr));
+ tmpregs[i] = r_vecRetAddr;
+ nVECRETs++;
+ }
+ else {
+ vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
+ tmpregs[i] = iselIntExpr_R(env, args[i]);
+ }
}
/* Now we can compute the condition. We can't do it earlier
@@ -585,7 +646,7 @@
}
/* Move the args to their final destinations. */
- for (i = 0; i < argreg; i++) {
+ for (i = 0; i < n_args; i++) {
/* None of these insns, including any spill code that might
be generated, may alter the condition codes. */
addInstr( env, mk_iMOVsd_RR( tmpregs[i], argregs[i] ) );
@@ -592,14 +653,47 @@
}
- /* Finally, the call itself. */
+ /* Do final checks, set the return values, and generate the call
+ instruction proper. */
handle_call:
- addInstr(env, AMD64Instr_Call(
- cc,
- Ptr_to_ULong(cee->addr),
- n_args + (passBBP ? 1 : 0), rloc
- )
- );
+
+ if (retTy == Ity_V128 || retTy == Ity_V256) {
+ vassert(nVECRETs == 1);
+ } else {
+ vassert(nVECRETs == 0);
+ }
+
+ vassert(nBBPTRs == 0 || nBBPTRs == 1);
+
+ vassert(*stackAdjustAfterCall == 0);
+ vassert(is_RetLoc_INVALID(*retloc));
+ switch (retTy) {
+ case Ity_INVALID:
+ /* Function doesn't return a value. */
+ *retloc = mk_RetLoc_simple(RLPri_None);
+ break;
+ case Ity_I64: case Ity_I32: case Ity_I16: case Ity_I8:
+ *retloc = mk_RetLoc_simple(RLPri_Int);
+ break;
+ case Ity_V128:
+ *retloc = mk_RetLoc_spRel(RLPri_V128SpRel, 0);
+ *stackAdjustAfterCall = 16;
+ break;
+ case Ity_V256:
+ vassert(0); // ATC
+ *retloc = mk_RetLoc_spRel(RLPri_V256SpRel, 0);
+ *stackAdjustAfterCall = 32;
+ break;
+ default:
+ /* IR can denote other possible return types, but we don't
+ handle those here. */
+ vassert(0);
+ }
+
+ /* Finally, generate the call itself. This needs the *retloc value
+ set in the switch above, which is why it's at the end. */
+ addInstr(env,
+ AMD64Instr_Call(cc, Ptr_to_ULong(cee->addr), n_args, *retloc));
}
@@ -1136,7 +1230,8 @@
addInstr(env, AMD64Instr_MovxLQ(False, argR, argR));
addInstr(env, mk_iMOVsd_RR(argL, hregAMD64_RDI()) );
addInstr(env, mk_iMOVsd_RR(argR, hregAMD64_RSI()) );
- addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 2, RetLocInt ));
+ addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 2,
+ mk_RetLoc_simple(RLPri_Int) ));
addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), dst));
return dst;
}
@@ -1606,7 +1701,7 @@
fn = (HWord)h_generic_calc_GetMSBs8x8;
addInstr(env, mk_iMOVsd_RR(arg, hregAMD64_RDI()) );
addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn,
- 1, RetLocInt ));
+ 1, mk_RetLoc_simple(RLPri_Int) ));
/* MovxLQ is not exactly the right thing here. We just
need to get the bottom 8 bits of RAX into dst, and zero
out everything else. Assuming that the helper returns
@@ -1637,7 +1732,7 @@
AMD64RMI_Mem(m16_rsp),
hregAMD64_RSI() )); /* 2nd arg */
addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn,
- 2, RetLocInt ));
+ 2, mk_RetLoc_simple(RLPri_Int) ));
/* MovxLQ is not exactly the right thing here. We just
need to get the bottom 16 bits of RAX into dst, and zero
out everything else. Assuming that the helper returns
@@ -1671,7 +1766,8 @@
HReg dst = newVRegI(env);
HReg arg = iselIntExpr_R(env, e->Iex.Unop.arg);
addInstr(env, mk_iMOVsd_RR(arg, hregAMD64_RDI()) );
- addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 1, RetLocInt ));
+ addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 1,
+ mk_RetLoc_simple(RLPri_Int) ));
addInstr(env, mk_iMOVsd_RR(hregAMD64_RAX(), dst));
return dst;
}
@@ -1726,14 +1822,18 @@
vassert(ty == e->Iex.CCall.retty);
/* be very restrictive for now. Only 64-bit ints allowed for
- args, and 64 or 32 bits for return type. Don't forget to
- change the RetLoc if more types are allowed in future. */
+ args, and 64 or 32 bits for return type. */
if (e->Iex.CCall.retty != Ity_I64 && e->Iex.CCall.retty != Ity_I32)
goto irreducible;
/* Marshal args, do the call. */
- doHelperCall( env, False, NULL, e->Iex.CCall.cee, e->Iex.CCall.args,
- RetLocInt );
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ e->Iex.CCall.cee, e->Iex.CCall.retty, e->Iex.CCall.args );
+ vassert(is_sane_RetLoc(rloc));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
/* Move to dst, and zero out the top 32 bits if the result type is
Ity_I32. Probably overkill, but still .. */
@@ -2278,8 +2378,15 @@
vassert(cal->Iex.CCall.retty == Ity_I64); /* else ill-typed IR */
vassert(con->Iex.Const.con->tag == Ico_U64);
/* Marshal args, do the call. */
- doHelperCall( env, False, NULL, cal->Iex.CCall.cee, cal->Iex.CCall.args,
- RetLocInt );
+ UInt addToSp = 0;
+ RetLoc rloc = mk_RetLoc_INVALID();
+ doHelperCall( &addToSp, &rloc, env, NULL/*guard*/,
+ cal->Iex.CCall.cee,
+ cal->Iex.CCall.retty, cal->Iex.CCall.args );
+ vassert(is_sane_RetLoc(rloc));
+ vassert(rloc.pri == RLPri_Int);
+ vassert(addToSp == 0);
+ /* */
addInstr(env, AMD64Instr_Imm64(con->Iex.Const.con->Ico.U64, tmp));
addInstr(env, AMD64Instr_Alu64R(Aalu_CMP,
AMD64RMI_Reg(hregAMD64_RAX()), tmp));
@@ -2590,7 +2697,7 @@
/* call the helper */
addInstr(env, AMD64Instr_Call( Acc_ALWAYS,
(ULong)(HWord)h_generic_calc_MAddF32,
- 4, RetLocNone ));
+ 4, mk_RetLoc_simple(RLPri_None) ));
/* fetch the result from memory, using %r_argp, which the
register allocator will keep alive across the call. */
addInstr(env, AMD64Instr_SseLdSt(True/*isLoad*/, 4, dst,
@@ -2769,7 +2876,7 @@
/* call the helper */
addInstr(env, AMD64Instr_Call( Acc_ALWAYS,
(ULong)(HWord)h_generic_calc_MAddF64,
- 4, RetLocNone ));
+ 4, mk_RetLoc_simple(RLPri_None) ));
/* fetch the result from memory, using %r_argp, which the
register allocator will keep alive across the call. */
addInstr(env, AMD64Instr_SseLdSt(True/*isLoad*/, 8, dst,
@@ -3491,7 +3598,7 @@
AMD64AMode_IR(0, hregAMD64_RDX())));
/* call the helper */
addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn,
- 3, RetLocNone ));
+ 3, mk_RetLoc_simple(RLPri_None) ));
/* fetch the result from memory, using %r_argp, which the
register allocator will keep alive across the call. */
addInstr(env, AMD64Instr_SseLdSt(True/*isLoad*/, 16, dst,
@@ -3540,7 +3647,7 @@
/* call the helper */
addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn,
- 3, RetLocNone ));
+ 3, mk_RetLoc_simple(RLPri_None) ));
/* fetch the result from memory, using %r_argp, which the
register allocator will keep alive across the call. */
addInstr(env, AMD64Instr_SseLdSt(True/*isLoad*/, 16, dst,
@@ -3944,7 +4051,8 @@
addInstr(env, AMD64Instr_SseLdSt(False/*!isLoad*/, 16, argRlo,
AMD64AMode_IR(48, hregAMD64_RDX())));
/* call the helper */
- addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 3, RetLocNone ));
+ addInstr(env, AMD64Instr_Call( Acc_ALWAYS, (ULong)fn, 3,
+ mk_RetLoc_simple(RLPri_None) ));
/* Prepare 3 arg regs:
leaq 48(%r_argp), %rdi
leaq 64(%r_argp), %rsi
@@ -3957,7 +4065,8 @@
addInstr(env, AMD64Instr_Lea64(AMD64AMode_IR(80, argp),
...
[truncated message content] |
|
From: <sv...@va...> - 2013-08-08 09:05:48
|
sewardj 2013-08-08 10:05:37 +0100 (Thu, 08 Aug 2013)
New Revision: 13487
Log:
Fix fallout from r13486: "virtual" is a C++ reserved word and so this
header causes breakage in the C++ tests in the tree. Rename it.
Modified files:
trunk/include/vki/vki-linux-drm.h
Modified: trunk/include/vki/vki-linux-drm.h (+1 -1)
===================================================================
--- trunk/include/vki/vki-linux-drm.h 2013-08-08 09:09:29 +01:00 (rev 13486)
+++ trunk/include/vki/vki-linux-drm.h 2013-08-08 10:05:37 +01:00 (rev 13487)
@@ -209,7 +209,7 @@
};
struct vki_drm_buf_map {
int count; /**< Length of the buffer list */
- void __user *virtual; /**< Mmap'd area in user-virtual */
+ void __user *virtuaL; /**< Mmap'd area in user-virtual */
struct vki_drm_buf_pub __user *list; /**< Buffer information */
};
struct vki_drm_dma {
|
|
From: <sv...@va...> - 2013-08-08 08:09:44
|
sewardj 2013-08-08 09:09:29 +0100 (Thu, 08 Aug 2013)
New Revision: 13486
Log:
Add support for a bunch of DRM Ioctls. Fixes #207815.
(Robert Bragg, bo...@o-...)
Added files:
trunk/include/vki/vki-linux-drm.h
Modified files:
trunk/NEWS
trunk/coregrind/m_syswrap/syswrap-linux.c
trunk/include/Makefile.am
trunk/include/pub_tool_vki.h
Added: trunk/include/vki/vki-linux-drm.h (+810 -0)
===================================================================
--- trunk/include/vki/vki-linux-drm.h 2013-08-06 21:45:20 +01:00 (rev 13485)
+++ trunk/include/vki/vki-linux-drm.h 2013-08-08 09:09:29 +01:00 (rev 13486)
@@ -0,0 +1,810 @@
+/*
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * Copyright (c) 2003-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
+ * Copyright (c) 2007 Dave Airlie <ai...@li...>
+ * Copyright (c) 2007 Jakob Bornecrantz <wal...@gm...>
+ * Copyright (c) 2007-2008 Intel Corporation
+ * Copyright (c) 2008 Red Hat Inc.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __VKI_LINUX_DRM_H
+#define __VKI_LINUX_DRM_H
+
+//----------------------------------------------------------------------
+// From include/drm/drm.h
+//----------------------------------------------------------------------
+
+typedef unsigned int vki_drm_context_t;
+typedef unsigned int vki_drm_drawable_t;
+typedef unsigned int vki_drm_magic_t;
+
+struct vki_drm_clip_rect {
+ unsigned short x1;
+ unsigned short y1;
+ unsigned short x2;
+ unsigned short y2;
+};
+struct vki_drm_version {
+ int version_major; /**< Major version */
+ int version_minor; /**< Minor version */
+ int version_patchlevel; /**< Patch level */
+ vki_size_t name_len; /**< Length of name buffer */
+ char __user *name; /**< Name of driver */
+ vki_size_t date_len; /**< Length of date buffer */
+ char __user *date; /**< User-space buffer to hold date */
+ vki_size_t desc_len; /**< Length of desc buffer */
+ char __user *desc; /**< User-space buffer to hold desc */
+};
+struct vki_drm_unique {
+ vki_size_t unique_len; /**< Length of unique */
+ char __user *unique; /**< Unique name for driver instantiation */
+};
+struct vki_drm_block {
+ int unused;
+};
+struct vki_drm_control {
+ enum {
+ VKI_DRM_ADD_COMMAND,
+ VKI_DRM_RM_COMMAND,
+ VKI_DRM_INST_HANDLER,
+ VKI_DRM_UNINST_HANDLER
+ } func;
+ int irq;
+};
+
+enum vki_drm_map_type {
+ _VKI_DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
+ _VKI_DRM_REGISTERS = 1, /**< no caching, no core dump */
+ _VKI_DRM_SHM = 2, /**< shared, cached */
+ _VKI_DRM_AGP = 3, /**< AGP/GART */
+ _VKI_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
+ _VKI_DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
+ _VKI_DRM_GEM = 6, /**< GEM object */
+};
+enum vki_drm_map_flags {
+ _VKI_DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
+ _VKI_DRM_READ_ONLY = 0x02,
+ _VKI_DRM_LOCKED = 0x04, /**< shared, cached, locked */
+ _VKI_DRM_KERNEL = 0x08, /**< kernel requires access */
+ _VKI_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
+ _VKI_DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
+ _VKI_DRM_REMOVABLE = 0x40, /**< Removable mapping */
+ _VKI_DRM_DRIVER = 0x80 /**< Managed by driver */
+};
+struct vki_drm_ctx_priv_map {
+ unsigned int ctx_id; /**< Context requesting private mapping */
+ void *handle; /**< Handle of map */
+};
+struct vki_drm_map {
+ unsigned long offset; /**< Requested physical address (0 for SAREA)*/
+ unsigned long size; /**< Requested physical size (bytes) */
+ enum vki_drm_map_type type; /**< Type of memory to map */
+ enum vki_drm_map_flags flags; /**< Flags */
+ void *handle; /**< User-space: "Handle" to pass to mmap() */
+ /**< Kernel-space: kernel-virtual address */
+ int mtrr; /**< MTRR slot used */
+ /* Private data */
+};
+struct vki_drm_client {
+ int idx; /**< Which client desired? */
+ int auth; /**< Is client authenticated? */
+ unsigned long pid; /**< Process ID */
+ unsigned long uid; /**< User ID */
+ unsigned long magic; /**< Magic */
+ unsigned long iocs; /**< Ioctl count */
+};
+enum vki_drm_stat_type {
+ _VKI_DRM_STAT_LOCK,
+ _VKI_DRM_STAT_OPENS,
+ _VKI_DRM_STAT_CLOSES,
+ _VKI_DRM_STAT_IOCTLS,
+ _VKI_DRM_STAT_LOCKS,
+ _VKI_DRM_STAT_UNLOCKS,
+ _VKI_DRM_STAT_VALUE, /**< Generic value */
+ _VKI_DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
+ _VKI_DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
+
+ _VKI_DRM_STAT_IRQ, /**< IRQ */
+ _VKI_DRM_STAT_PRIMARY, /**< Primary DMA bytes */
+ _VKI_DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
+ _VKI_DRM_STAT_DMA, /**< DMA */
+ _VKI_DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
+ _VKI_DRM_STAT_MISSED /**< Missed DMA opportunity */
+ /* Add to the *END* of the list */
+};
+struct vki_drm_stats {
+ unsigned long count;
+ struct {
+ unsigned long value;
+ enum vki_drm_stat_type type;
+ } data[15];
+};
+enum vki_drm_lock_flags {
+ _VKI_DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
+ _VKI_DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
+ _VKI_DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
+ _VKI_DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
+ /* These *HALT* flags aren't supported yet
+ -- they will be used to support the
+ full-screen DGA-like mode. */
+ _VKI_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
+ _VKI_DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
+};
+struct vki_drm_lock {
+ int context;
+ enum vki_drm_lock_flags flags;
+};
+enum vki_drm_dma_flags {
+ /* Flags for DMA buffer dispatch */
+ _VKI_DRM_DMA_BLOCK = 0x01, /**<
+ * Block until buffer dispatched.
+ *
+ * \note The buffer may not yet have
+ * been processed by the hardware --
+ * getting a hardware lock with the
+ * hardware quiescent will ensure
+ * that the buffer has been
+ * processed.
+ */
+ _VKI_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
+ _VKI_DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
+
+ /* Flags for DMA buffer request */
+ _VKI_DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
+ _VKI_DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
+ _VKI_DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
+};
+struct vki_drm_buf_desc {
+ int count; /**< Number of buffers of this size */
+ int size; /**< Size in bytes */
+ int low_mark; /**< Low water mark */
+ int high_mark; /**< High water mark */
+ enum {
+ _VKI_DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
+ _VKI_DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
+ _VKI_DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
+ _VKI_DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
+ _VKI_DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
+ } flags;
+ unsigned long agp_start; /**<
+ * Start address of where the AGP buffers are
+ * in the AGP aperture
+ */
+};
+struct vki_drm_buf_info {
+ int count; /**< Entries in list */
+ struct vki_drm_buf_desc __user *list;
+};
+struct vki_drm_buf_free {
+ int count;
+ int __user *list;
+};
+
+struct vki_drm_buf_pub {
+ int idx; /**< Index into the master buffer list */
+ int total; /**< Buffer size */
+ int used; /**< Amount of buffer in use (for DMA) */
+ void __user *address; /**< Address of buffer */
+};
+struct vki_drm_buf_map {
+ int count; /**< Length of the buffer list */
+ void __user *virtual; /**< Mmap'd area in user-virtual */
+ struct vki_drm_buf_pub __user *list; /**< Buffer information */
+};
+struct vki_drm_dma {
+ int context; /**< Context handle */
+ int send_count; /**< Number of buffers to send */
+ int __user *send_indices; /**< List of handles to buffers */
+ int __user *send_sizes; /**< Lengths of data to send */
+ enum vki_drm_dma_flags flags; /**< Flags */
+ int request_count; /**< Number of buffers requested */
+ int request_size; /**< Desired size for buffers */
+ int __user *request_indices; /**< Buffer information */
+ int __user *request_sizes;
+ int granted_count; /**< Number of buffers granted */
+};
+
+enum vki_drm_ctx_flags {
+ _VKI_DRM_CONTEXT_PRESERVED = 0x01,
+ _VKI_DRM_CONTEXT_2DONLY = 0x02
+};
+struct vki_drm_ctx {
+ vki_drm_context_t handle;
+ enum vki_drm_ctx_flags flags;
+};
+struct vki_drm_ctx_res {
+ int count;
+ struct vki_drm_ctx __user *contexts;
+};
+struct vki_drm_draw {
+ vki_drm_drawable_t handle;
+};
+typedef enum {
+ VKI_DRM_DRAWABLE_CLIPRECTS,
+} vki_drm_drawable_info_type_t;
+struct vki_drm_update_draw {
+ vki_drm_drawable_t handle;
+ unsigned int type;
+ unsigned int num;
+ unsigned long long data;
+};
+struct vki_drm_auth {
+ vki_drm_magic_t magic;
+};
+struct vki_drm_irq_busid {
+ int irq; /**< IRQ number */
+ int busnum; /**< bus number */
+ int devnum; /**< device number */
+ int funcnum; /**< function number */
+};
+enum vki_drm_vblank_seq_type {
+ _VKI_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
+ _VKI_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
+ _VKI_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
+ _VKI_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
+ _VKI_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
+ _VKI_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
+ _VKI_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
+ _VKI_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
+};
+struct vki_drm_wait_vblank_request {
+ enum vki_drm_vblank_seq_type type;
+ unsigned int sequence;
+ unsigned long signal;
+};
+struct vki_drm_wait_vblank_reply {
+ enum vki_drm_vblank_seq_type type;
+ unsigned int sequence;
+ long tval_sec;
+ long tval_usec;
+};
+union vki_drm_wait_vblank {
+ struct vki_drm_wait_vblank_request request;
+ struct vki_drm_wait_vblank_reply reply;
+};
+struct vki_drm_modeset_ctl {
+ __vki_u32 crtc;
+ __vki_u32 cmd;
+};
+struct vki_drm_agp_mode {
+ unsigned long mode; /**< AGP mode */
+};
+struct vki_drm_agp_buffer {
+ unsigned long size; /**< In bytes -- will round to page boundary */
+ unsigned long handle; /**< Used for binding / unbinding */
+ unsigned long type; /**< Type of memory to allocate */
+ unsigned long physical; /**< Physical used by i810 */
+};
+struct vki_drm_agp_binding {
+ unsigned long handle; /**< From drm_agp_buffer */
+ unsigned long offset; /**< In bytes -- will round to page boundary */
+};
+struct vki_drm_agp_info {
+ int agp_version_major;
+ int agp_version_minor;
+ unsigned long mode;
+ unsigned long aperture_base; /* physical address */
+ unsigned long aperture_size; /* bytes */
+ unsigned long memory_allowed; /* bytes */
+ unsigned long memory_used;
+ unsigned short id_vendor;
+ unsigned short id_device;
+};
+struct vki_drm_scatter_gather {
+ unsigned long size; /**< In bytes -- will round to page boundary */
+ unsigned long handle; /**< Used for mapping / unmapping */
+};
+
+struct vki_drm_set_version {
+ int drm_di_major;
+ int drm_di_minor;
+ int drm_dd_major;
+ int drm_dd_minor;
+};
+struct vki_drm_gem_close {
+ __vki_u32 handle;
+ __vki_u32 pad;
+};
+struct vki_drm_gem_flink {
+ __vki_u32 handle;
+ __vki_u32 name;
+};
+struct vki_drm_gem_open {
+ __vki_u32 name;
+ __vki_u32 handle;
+ __vki_u64 size;
+};
+
+//----------------------------------------------------------------------
+// From include/drm/drm_mode.h
+//----------------------------------------------------------------------
+
+#define VKI_DRM_DISPLAY_MODE_LEN 32
+#define VKI_DRM_PROP_NAME_LEN 32
+struct vki_drm_mode_modeinfo {
+ __vki_u32 clock;
+ __vki_u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
+ __vki_u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
+
+ __vki_u32 vrefresh; /* vertical refresh * 1000 */
+
+ __vki_u32 flags;
+ __vki_u32 type;
+ char name[VKI_DRM_DISPLAY_MODE_LEN];
+};
+struct vki_drm_mode_card_res {
+ __vki_u64 fb_id_ptr;
+ __vki_u64 crtc_id_ptr;
+ __vki_u64 connector_id_ptr;
+ __vki_u64 encoder_id_ptr;
+ __vki_u32 count_fbs;
+ __vki_u32 count_crtcs;
+ __vki_u32 count_connectors;
+ __vki_u32 count_encoders;
+ __vki_u32 min_width, max_width;
+ __vki_u32 min_height, max_height;
+};
+struct vki_drm_mode_crtc {
+ __vki_u64 set_connectors_ptr;
+ __vki_u32 count_connectors;
+
+ __vki_u32 crtc_id; /**< Id */
+ __vki_u32 fb_id; /**< Id of framebuffer */
+
+ __vki_u32 x, y; /**< Position on the frameuffer */
+
+ __vki_u32 gamma_size;
+ __vki_u32 mode_valid;
+ struct vki_drm_mode_modeinfo mode;
+};
+struct vki_drm_mode_get_encoder {
+ __vki_u32 encoder_id;
+ __vki_u32 encoder_type;
+
+ __vki_u32 crtc_id; /**< Id of crtc */
+
+ __vki_u32 possible_crtcs;
+ __vki_u32 possible_clones;
+};
+struct vki_drm_mode_get_property {
+ __vki_u64 values_ptr; /* values and blob lengths */
+ __vki_u64 enum_blob_ptr; /* enum and blob id ptrs */
+
+ __vki_u32 prop_id;
+ __vki_u32 flags;
+ char name[VKI_DRM_PROP_NAME_LEN];
+
+ __vki_u32 count_values;
+ __vki_u32 count_enum_blobs;
+};
+struct vki_drm_mode_connector_set_property {
+ __vki_u64 value;
+ __vki_u32 prop_id;
+ __vki_u32 connector_id;
+};
+struct vki_drm_mode_get_blob {
+ __vki_u32 blob_id;
+ __vki_u32 length;
+ __vki_u64 data;
+};
+struct vki_drm_mode_fb_cmd {
+ __vki_u32 fb_id;
+ __vki_u32 width, height;
+ __vki_u32 pitch;
+ __vki_u32 bpp;
+ __vki_u32 depth;
+ /* driver specific handle */
+ __vki_u32 handle;
+};
+struct vki_drm_mode_mode_cmd {
+ __vki_u32 connector_id;
+ struct vki_drm_mode_modeinfo mode;
+};
+struct vki_drm_mode_cursor {
+ __vki_u32 flags;
+ __vki_u32 crtc_id;
+ __vki_s32 x;
+ __vki_s32 y;
+ __vki_u32 width;
+ __vki_u32 height;
+ /* driver specific handle */
+ __vki_u32 handle;
+};
+struct vki_drm_mode_crtc_lut {
+ __vki_u32 crtc_id;
+ __vki_u32 gamma_size;
+
+ /* pointers to arrays */
+ __vki_u64 red;
+ __vki_u64 green;
+ __vki_u64 blue;
+};
+
+//----------------------------------------------------------------------
+// From include/drm/drm.h
+//----------------------------------------------------------------------
+
+#define VKI_DRM_IOCTL_BASE 'd'
+
+#define VKI_DRM_IO(nr) _VKI_IO(VKI_DRM_IOCTL_BASE,nr)
+#define VKI_DRM_IOR(nr,type) _VKI_IOR(VKI_DRM_IOCTL_BASE,nr,type)
+#define VKI_DRM_IOW(nr,type) _VKI_IOW(VKI_DRM_IOCTL_BASE,nr,type)
+#define VKI_DRM_IOWR(nr,type) _VKI_IOWR(VKI_DRM_IOCTL_BASE,nr,type)
+
+
+#define VKI_DRM_IOCTL_VERSION VKI_DRM_IOWR(0x00, struct vki_drm_version)
+#define VKI_DRM_IOCTL_GET_UNIQUE VKI_DRM_IOWR(0x01, struct vki_drm_unique)
+#define VKI_DRM_IOCTL_GET_MAGIC VKI_DRM_IOR( 0x02, struct vki_drm_auth)
+#define VKI_DRM_IOCTL_IRQ_BUSID VKI_DRM_IOWR(0x03, struct vki_drm_irq_busid)
+#define VKI_DRM_IOCTL_GET_MAP VKI_DRM_IOWR(0x04, struct vki_drm_map)
+#define VKI_DRM_IOCTL_GET_CLIENT VKI_DRM_IOWR(0x05, struct vki_drm_client)
+#define VKI_DRM_IOCTL_GET_STATS VKI_DRM_IOR( 0x06, struct vki_drm_stats)
+#define VKI_DRM_IOCTL_SET_VERSION VKI_DRM_IOWR(0x07, struct vki_drm_set_version)
+#define VKI_DRM_IOCTL_MODESET_CTL VKI_DRM_IOW(0x08, struct vki_drm_modeset_ctl)
+#define VKI_DRM_IOCTL_GEM_CLOSE VKI_DRM_IOW (0x09, struct vki_drm_gem_close)
+#define VKI_DRM_IOCTL_GEM_FLINK VKI_DRM_IOWR(0x0a, struct vki_drm_gem_flink)
+#define VKI_DRM_IOCTL_GEM_OPEN VKI_DRM_IOWR(0x0b, struct vki_drm_gem_open)
+
+#define VKI_DRM_IOCTL_SET_UNIQUE VKI_DRM_IOW( 0x10, struct vki_drm_unique)
+#define VKI_DRM_IOCTL_AUTH_MAGIC VKI_DRM_IOW( 0x11, struct vki_drm_auth)
+#define VKI_DRM_IOCTL_BLOCK VKI_DRM_IOWR(0x12, struct vki_drm_block)
+#define VKI_DRM_IOCTL_UNBLOCK VKI_DRM_IOWR(0x13, struct vki_drm_block)
+#define VKI_DRM_IOCTL_CONTROL VKI_DRM_IOW( 0x14, struct vki_drm_control)
+#define VKI_DRM_IOCTL_ADD_MAP VKI_DRM_IOWR(0x15, struct vki_drm_map)
+#define VKI_DRM_IOCTL_ADD_BUFS VKI_DRM_IOWR(0x16, struct vki_drm_buf_desc)
+#define VKI_DRM_IOCTL_MARK_BUFS VKI_DRM_IOW( 0x17, struct vki_drm_buf_desc)
+#define VKI_DRM_IOCTL_INFO_BUFS VKI_DRM_IOWR(0x18, struct vki_drm_buf_info)
+#define VKI_DRM_IOCTL_MAP_BUFS VKI_DRM_IOWR(0x19, struct vki_drm_buf_map)
+#define VKI_DRM_IOCTL_FREE_BUFS VKI_DRM_IOW( 0x1a, struct vki_drm_buf_free)
+
+#define VKI_DRM_IOCTL_RM_MAP VKI_DRM_IOW( 0x1b, struct vki_drm_map)
+
+#define VKI_DRM_IOCTL_SET_SAREA_CTX VKI_DRM_IOW( 0x1c, struct vki_drm_ctx_priv_map)
+#define VKI_DRM_IOCTL_GET_SAREA_CTX VKI_DRM_IOWR(0x1d, struct vki_drm_ctx_priv_map)
+
+#define VKI_DRM_IOCTL_SET_MASTER VKI_DRM_IO(0x1e)
+#define VKI_DRM_IOCTL_DROP_MASTER VKI_DRM_IO(0x1f)
+
+#define VKI_DRM_IOCTL_ADD_CTX VKI_DRM_IOWR(0x20, struct vki_drm_ctx)
+#define VKI_DRM_IOCTL_RM_CTX VKI_DRM_IOWR(0x21, struct vki_drm_ctx)
+#define VKI_DRM_IOCTL_MOD_CTX VKI_DRM_IOW( 0x22, struct vki_drm_ctx)
+#define VKI_DRM_IOCTL_GET_CTX VKI_DRM_IOWR(0x23, struct vki_drm_ctx)
+#define VKI_DRM_IOCTL_SWITCH_CTX VKI_DRM_IOW( 0x24, struct vki_drm_ctx)
+#define VKI_DRM_IOCTL_NEW_CTX VKI_DRM_IOW( 0x25, struct vki_drm_ctx)
+#define VKI_DRM_IOCTL_RES_CTX VKI_DRM_IOWR(0x26, struct vki_drm_ctx_res)
+#define VKI_DRM_IOCTL_ADD_DRAW VKI_DRM_IOWR(0x27, struct vki_drm_draw)
+#define VKI_DRM_IOCTL_RM_DRAW VKI_DRM_IOWR(0x28, struct vki_drm_draw)
+#define VKI_DRM_IOCTL_DMA VKI_DRM_IOWR(0x29, struct vki_drm_dma)
+#define VKI_DRM_IOCTL_LOCK VKI_DRM_IOW( 0x2a, struct vki_drm_lock)
+#define VKI_DRM_IOCTL_UNLOCK VKI_DRM_IOW( 0x2b, struct vki_drm_lock)
+#define VKI_DRM_IOCTL_FINISH VKI_DRM_IOW( 0x2c, struct vki_drm_lock)
+
+#define VKI_DRM_IOCTL_AGP_ACQUIRE VKI_DRM_IO( 0x30)
+#define VKI_DRM_IOCTL_AGP_RELEASE VKI_DRM_IO( 0x31)
+#define VKI_DRM_IOCTL_AGP_ENABLE VKI_DRM_IOW( 0x32, struct vki_drm_agp_mode)
+#define VKI_DRM_IOCTL_AGP_INFO VKI_DRM_IOR( 0x33, struct vki_drm_agp_info)
+#define VKI_DRM_IOCTL_AGP_ALLOC VKI_DRM_IOWR(0x34, struct vki_drm_agp_buffer)
+#define VKI_DRM_IOCTL_AGP_FREE VKI_DRM_IOW( 0x35, struct vki_drm_agp_buffer)
+#define VKI_DRM_IOCTL_AGP_BIND VKI_DRM_IOW( 0x36, struct vki_drm_agp_binding)
+#define VKI_DRM_IOCTL_AGP_UNBIND VKI_DRM_IOW( 0x37, struct vki_drm_agp_binding)
+
+#define VKI_DRM_IOCTL_SG_ALLOC VKI_DRM_IOWR(0x38, struct vki_drm_scatter_gather)
+#define VKI_DRM_IOCTL_SG_FREE VKI_DRM_IOW( 0x39, struct vki_drm_scatter_gather)
+
+#define VKI_DRM_IOCTL_WAIT_VBLANK VKI_DRM_IOWR(0x3a, union vki_drm_wait_vblank)
+
+#define VKI_DRM_IOCTL_UPDATE_DRAW VKI_DRM_IOW(0x3f, struct vki_drm_update_draw)
+
+#define VKI_DRM_IOCTL_MODE_GETRESOURCES VKI_DRM_IOWR(0xA0, struct vki_drm_mode_card_res)
+#define VKI_DRM_IOCTL_MODE_GETCRTC VKI_DRM_IOWR(0xA1, struct vki_drm_mode_crtc)
+#define VKI_DRM_IOCTL_MODE_SETCRTC VKI_DRM_IOWR(0xA2, struct vki_drm_mode_crtc)
+#define VKI_DRM_IOCTL_MODE_CURSOR VKI_DRM_IOWR(0xA3, struct vki_drm_mode_cursor)
+#define VKI_DRM_IOCTL_MODE_GETGAMMA VKI_DRM_IOWR(0xA4, struct vki_drm_mode_crtc_lut)
+#define VKI_DRM_IOCTL_MODE_SETGAMMA VKI_DRM_IOWR(0xA5, struct vki_drm_mode_crtc_lut)
+#define VKI_DRM_IOCTL_MODE_GETENCODER VKI_DRM_IOWR(0xA6, struct vki_drm_mode_get_encoder)
+#define VKI_DRM_IOCTL_MODE_GETCONNECTOR VKI_DRM_IOWR(0xA7, struct vki_drm_mode_get_connector)
+#define VKI_DRM_IOCTL_MODE_ATTACHMODE VKI_DRM_IOWR(0xA8, struct vki_drm_mode_mode_cmd)
+#define VKI_DRM_IOCTL_MODE_DETACHMODE VKI_DRM_IOWR(0xA9, struct vki_drm_mode_mode_cmd)
+
+#define VKI_DRM_IOCTL_MODE_GETPROPERTY VKI_DRM_IOWR(0xAA, struct vki_drm_mode_get_property)
+#define VKI_DRM_IOCTL_MODE_SETPROPERTY VKI_DRM_IOWR(0xAB, struct vki_drm_mode_connector_set_property)
+#define VKI_DRM_IOCTL_MODE_GETPROPBLOB VKI_DRM_IOWR(0xAC, struct vki_drm_mode_get_blob)
+#define VKI_DRM_IOCTL_MODE_GETFB VKI_DRM_IOWR(0xAD, struct vki_drm_mode_fb_cmd)
+#define VKI_DRM_IOCTL_MODE_ADDFB VKI_DRM_IOWR(0xAE, struct vki_drm_mode_fb_cmd)
+#define VKI_DRM_IOCTL_MODE_RMFB VKI_DRM_IOWR(0xAF, unsigned int)
+
+#define VKI_DRM_COMMAND_BASE 0x40
+#define VKI_DRM_COMMAND_END 0xA0
+
+//----------------------------------------------------------------------
+// From include/drm/i915_drm.h
+//----------------------------------------------------------------------
+
+typedef struct _vki_drm_i915_init {
+ enum {
+ VKI_I915_INIT_DMA = 0x01,
+ VKI_I915_CLEANUP_DMA = 0x02,
+ VKI_I915_RESUME_DMA = 0x03
+ } func;
+ unsigned int mmio_offset;
+ int sarea_priv_offset;
+ unsigned int ring_start;
+ unsigned int ring_end;
+ unsigned int ring_size;
+ unsigned int front_offset;
+ unsigned int back_offset;
+ unsigned int depth_offset;
+ unsigned int w;
+ unsigned int h;
+ unsigned int pitch;
+ unsigned int pitch_bits;
+ unsigned int back_pitch;
+ unsigned int depth_pitch;
+ unsigned int cpp;
+ unsigned int chipset;
+} vki_drm_i915_init_t;
+
+#define VKI_DRM_I915_INIT 0x00
+#define VKI_DRM_I915_FLUSH 0x01
+#define VKI_DRM_I915_FLIP 0x02
+#define VKI_DRM_I915_BATCHBUFFER 0x03
+#define VKI_DRM_I915_IRQ_EMIT 0x04
+#define VKI_DRM_I915_IRQ_WAIT 0x05
+#define VKI_DRM_I915_GETPARAM 0x06
+#define VKI_DRM_I915_SETPARAM 0x07
+#define VKI_DRM_I915_ALLOC 0x08
+#define VKI_DRM_I915_FREE 0x09
+#define VKI_DRM_I915_INIT_HEAP 0x0a
+#define VKI_DRM_I915_CMDBUFFER 0x0b
+#define VKI_DRM_I915_DESTROY_HEAP 0x0c
+#define VKI_DRM_I915_SET_VBLANK_PIPE 0x0d
+#define VKI_DRM_I915_GET_VBLANK_PIPE 0x0e
+#define VKI_DRM_I915_VBLANK_SWAP 0x0f
+#define VKI_DRM_I915_HWS_ADDR 0x11
+#define VKI_DRM_I915_GEM_INIT 0x13
+#define VKI_DRM_I915_GEM_EXECBUFFER 0x14
+#define VKI_DRM_I915_GEM_PIN 0x15
+#define VKI_DRM_I915_GEM_UNPIN 0x16
+#define VKI_DRM_I915_GEM_BUSY 0x17
+#define VKI_DRM_I915_GEM_THROTTLE 0x18
+#define VKI_DRM_I915_GEM_ENTERVT 0x19
+#define VKI_DRM_I915_GEM_LEAVEVT 0x1a
+#define VKI_DRM_I915_GEM_CREATE 0x1b
+#define VKI_DRM_I915_GEM_PREAD 0x1c
+#define VKI_DRM_I915_GEM_PWRITE 0x1d
+#define VKI_DRM_I915_GEM_MMAP 0x1e
+#define VKI_DRM_I915_GEM_SET_DOMAIN 0x1f
+#define VKI_DRM_I915_GEM_SW_FINISH 0x20
+#define VKI_DRM_I915_GEM_SET_TILING 0x21
+#define VKI_DRM_I915_GEM_GET_TILING 0x22
+#define VKI_DRM_I915_GEM_GET_APERTURE 0x23
+#define VKI_DRM_I915_GEM_MMAP_GTT 0x24
+#define VKI_DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25
+#define VKI_DRM_I915_GEM_MADVISE 0x26
+#define VKI_DRM_I915_OVERLAY_PUT_IMAGE 0x27
+#define VKI_DRM_I915_OVERLAY_ATTRS 0x28
+#define VKI_DRM_I915_GEM_EXECBUFFER2 0x29
+
+#define VKI_DRM_IOCTL_I915_INIT VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_INIT, vki_drm_i915_init_t)
+#define VKI_DRM_IOCTL_I915_FLUSH VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FLUSH)
+#define VKI_DRM_IOCTL_I915_FLIP VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FLIP)
+#define VKI_DRM_IOCTL_I915_BATCHBUFFER VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_BATCHBUFFER, vki_drm_i915_batchbuffer_t)
+#define VKI_DRM_IOCTL_I915_IRQ_EMIT VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_IRQ_EMIT, vki_drm_i915_irq_emit_t)
+#define VKI_DRM_IOCTL_I915_IRQ_WAIT VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_IRQ_WAIT, vki_drm_i915_irq_wait_t)
+#define VKI_DRM_IOCTL_I915_GETPARAM VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GETPARAM, vki_drm_i915_getparam_t)
+#define VKI_DRM_IOCTL_I915_SETPARAM VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_SETPARAM, vki_drm_i915_setparam_t)
+#define VKI_DRM_IOCTL_I915_ALLOC VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_ALLOC, vki_drm_i915_mem_alloc_t)
+#define VKI_DRM_IOCTL_I915_FREE VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FREE, vki_drm_i915_mem_free_t)
+#define VKI_DRM_IOCTL_I915_INIT_HEAP VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_INIT_HEAP, vki_drm_i915_mem_init_heap_t)
+#define VKI_DRM_IOCTL_I915_CMDBUFFER VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_CMDBUFFER, vki_drm_i915_cmdbuffer_t)
+#define VKI_DRM_IOCTL_I915_DESTROY_HEAP VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_DESTROY_HEAP, vki_drm_i915_mem_destroy_heap_t)
+#define VKI_DRM_IOCTL_I915_SET_VBLANK_PIPE VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_SET_VBLANK_PIPE, vki_drm_i915_vblank_pipe_t)
+#define VKI_DRM_IOCTL_I915_GET_VBLANK_PIPE VKI_DRM_IOR( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GET_VBLANK_PIPE, vki_drm_i915_vblank_pipe_t)
+#define VKI_DRM_IOCTL_I915_VBLANK_SWAP VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_VBLANK_SWAP, vki_drm_i915_vblank_swap_t)
+#define VKI_DRM_IOCTL_I915_GEM_INIT VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_INIT, struct vki_drm_i915_gem_init)
+#define VKI_DRM_IOCTL_I915_GEM_EXECBUFFER VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_EXECBUFFER, struct vki_drm_i915_gem_execbuffer)
+#define VKI_DRM_IOCTL_I915_GEM_PIN VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PIN, struct vki_drm_i915_gem_pin)
+#define VKI_DRM_IOCTL_I915_GEM_UNPIN VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_UNPIN, struct vki_drm_i915_gem_unpin)
+#define VKI_DRM_IOCTL_I915_GEM_BUSY VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_BUSY, struct vki_drm_i915_gem_busy)
+#define VKI_DRM_IOCTL_I915_GEM_THROTTLE VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_THROTTLE)
+#define VKI_DRM_IOCTL_I915_GEM_ENTERVT VKI_DRM_IO(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_ENTERVT)
+#define VKI_DRM_IOCTL_I915_GEM_LEAVEVT VKI_DRM_IO(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_LEAVEVT)
+#define VKI_DRM_IOCTL_I915_GEM_CREATE VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_CREATE, struct vki_drm_i915_gem_create)
+#define VKI_DRM_IOCTL_I915_GEM_PREAD VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PREAD, struct vki_drm_i915_gem_pread)
+#define VKI_DRM_IOCTL_I915_GEM_PWRITE VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PWRITE, struct vki_drm_i915_gem_pwrite)
+#define VKI_DRM_IOCTL_I915_GEM_MMAP VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP, struct vki_drm_i915_gem_mmap)
+#define VKI_DRM_IOCTL_I915_GEM_MMAP_GTT VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP_GTT, struct vki_drm_i915_gem_mmap_gtt)
+#define VKI_DRM_IOCTL_I915_GEM_SET_DOMAIN VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SET_DOMAIN, struct vki_drm_i915_gem_set_domain)
+#define VKI_DRM_IOCTL_I915_GEM_SW_FINISH VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SW_FINISH, struct vki_drm_i915_gem_sw_finish)
+#define VKI_DRM_IOCTL_I915_GEM_SET_TILING VKI_DRM_IOWR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SET_TILING, struct vki_drm_i915_gem_set_tiling)
+#define VKI_DRM_IOCTL_I915_GEM_GET_TILING VKI_DRM_IOWR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_GET_TILING, struct vki_drm_i915_gem_get_tiling)
+#define VKI_DRM_IOCTL_I915_GEM_GET_APERTURE VKI_DRM_IOR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_GET_APERTURE, struct vki_drm_i915_gem_get_aperture)
+#define VKI_DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GET_PIPE_FROM_CRTC_ID, struct vki_drm_intel_get_pipe_from_crtc_id)
+
+typedef struct vki_drm_i915_batchbuffer {
+ int start; /* agp offset */
+ int used; /* nr bytes in use */
+ int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
+ int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */
+ int num_cliprects; /* mulitpass with multiple cliprects? */
+ struct vki_drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
+} vki_drm_i915_batchbuffer_t;
+typedef struct _vki_drm_i915_cmdbuffer {
+ char __user *buf; /* pointer to userspace command buffer */
+ int sz; /* nr bytes in buf */
+ int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
+ int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */
+ int num_cliprects; /* mulitpass with multiple cliprects? */
+ struct vki_drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
+} vki_drm_i915_cmdbuffer_t;
+typedef struct vki_drm_i915_irq_emit {
+ int __user *irq_seq;
+} vki_drm_i915_irq_emit_t;
+typedef struct vki_drm_i915_irq_wait {
+ int irq_seq;
+} vki_drm_i915_irq_wait_t;
+typedef struct vki_drm_i915_getparam {
+ int param;
+ int __user *value;
+} vki_drm_i915_getparam_t;
+typedef struct vki_drm_i915_setparam {
+ int param;
+ int value;
+} vki_drm_i915_setparam_t;
+typedef struct vki_drm_i915_mem_alloc {
+ int region;
+ int alignment;
+ int size;
+ int __user *region_offset; /* offset from start of fb or agp */
+} vki_drm_i915_mem_alloc_t;
+typedef struct vki_drm_i915_mem_free {
+ int region;
+ int region_offset;
+} vki_drm_i915_mem_free_t;
+typedef struct vki_drm_i915_mem_init_heap {
+ int region;
+ int size;
+ int start;
+} vki_drm_i915_mem_init_heap_t;
+typedef struct vki_drm_i915_mem_destroy_heap {
+ int region;
+} vki_drm_i915_mem_destroy_heap_t;
+typedef struct vki_drm_i915_vblank_pipe {
+ int pipe;
+} vki_drm_i915_vblank_pipe_t;
+typedef struct vki_drm_i915_vblank_swap {
+ vki_drm_drawable_t drawable;
+ enum vki_drm_vblank_seq_type seqtype;
+ unsigned int sequence;
+} vki_drm_i915_vblank_swap_t;
+typedef struct vki_drm_i915_hws_addr {
+ __vki_u64 addr;
+} vki_drm_i915_hws_addr_t;
+struct vki_drm_i915_gem_init {
+ __vki_u64 gtt_start;
+ __vki_u64 gtt_end;
+};
+struct vki_drm_i915_gem_create {
+ __vki_u64 size;
+ __vki_u32 handle;
+ __vki_u32 pad;
+};
+struct vki_drm_i915_gem_pread {
+ __vki_u32 handle;
+ __vki_u32 pad;
+ __vki_u64 offset;
+ __vki_u64 size;
+ __vki_u64 data_ptr;
+};
+struct vki_drm_i915_gem_pwrite {
+ __vki_u32 handle;
+ __vki_u32 pad;
+ __vki_u64 offset;
+ __vki_u64 size;
+ __vki_u64 data_ptr;
+};
+struct vki_drm_i915_gem_mmap {
+ __vki_u32 handle;
+ __vki_u32 pad;
+ __vki_u64 offset;
+ __vki_u64 size;
+ __vki_u64 addr_ptr;
+};
+struct vki_drm_i915_gem_mmap_gtt {
+ __vki_u32 handle;
+ __vki_u32 pad;
+ __vki_u64 offset;
+};
+struct vki_drm_i915_gem_set_domain {
+ __vki_u32 handle;
+ __vki_u32 read_domains;
+ __vki_u32 write_domain;
+};
+struct vki_drm_i915_gem_sw_finish {
+ __vki_u32 handle;
+};
+struct vki_drm_i915_gem_relocation_entry {
+ __vki_u32 target_handle;
+ __vki_u32 delta;
+ __vki_u64 offset;
+ __vki_u64 presumed_offset;
+ __vki_u32 read_domains;
+ __vki_u32 write_domain;
+};
+struct vki_drm_i915_gem_exec_object {
+ __vki_u32 handle;
+ __vki_u32 relocation_count;
+ __vki_u64 relocs_ptr;
+ __vki_u64 alignment;
+ __vki_u64 offset;
+};
+struct vki_drm_i915_gem_execbuffer {
+ __vki_u64 buffers_ptr;
+ __vki_u32 buffer_count;
+ __vki_u32 batch_start_offset;
+ __vki_u32 batch_len;
+ __vki_u32 DR1;
+ __vki_u32 DR4;
+ __vki_u32 num_cliprects;
+ __vki_u64 cliprects_ptr;
+};
+struct vki_drm_i915_gem_pin {
+ __vki_u32 handle;
+ __vki_u32 pad;
+ __vki_u64 alignment;
+ __vki_u64 offset;
+};
+struct vki_drm_i915_gem_unpin {
+ __vki_u32 handle;
+ __vki_u32 pad;
+};
+struct vki_drm_i915_gem_busy {
+ __vki_u32 handle;
+ __vki_u32 busy;
+};
+struct vki_drm_i915_gem_set_tiling {
+ __vki_u32 handle;
+ __vki_u32 tiling_mode;
+ __vki_u32 stride;
+ __vki_u32 swizzle_mode;
+};
+struct vki_drm_i915_gem_get_tiling {
+ __vki_u32 handle;
+ __vki_u32 tiling_mode;
+ __vki_u32 swizzle_mode;
+};
+struct vki_drm_i915_gem_get_aperture {
+ __vki_u64 aper_size;
+ __vki_u64 aper_available_size;
+};
+struct vki_drm_i915_get_pipe_from_crtc_id {
+ __vki_u32 crtc_id;
+ __vki_u32 pipe;
+};
+
+#endif //__VKI_LINUX_DRM_H
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Modified: trunk/coregrind/m_syswrap/syswrap-linux.c (+243 -0)
===================================================================
--- trunk/coregrind/m_syswrap/syswrap-linux.c 2013-08-06 21:45:20 +01:00 (rev 13485)
+++ trunk/coregrind/m_syswrap/syswrap-linux.c 2013-08-08 09:09:29 +01:00 (rev 13486)
@@ -5118,6 +5118,151 @@
PRE_MEM_WRITE("fcntl(F_GETOWN_EX)", ARG3, sizeof(struct vki_f_owner_ex));
break;
+ case VKI_DRM_IOCTL_VERSION:
+ if (ARG3) {
+ struct vki_drm_version *data = (struct vki_drm_version *)ARG3;
+ PRE_MEM_WRITE("ioctl(DRM_VERSION).version_major", (Addr)&data->version_major, sizeof(data->version_major));
+ PRE_MEM_WRITE("ioctl(DRM_VERSION).version_minor", (Addr)&data->version_minor, sizeof(data->version_minor));
+ PRE_MEM_WRITE("ioctl(DRM_VERSION).version_patchlevel", (Addr)&data->version_patchlevel, sizeof(data->version_patchlevel));
+ PRE_MEM_READ("ioctl(DRM_VERSION).name_len", (Addr)&data->name_len, sizeof(data->name_len));
+ PRE_MEM_READ("ioctl(DRM_VERSION).name", (Addr)&data->name, sizeof(data->name));
+ PRE_MEM_WRITE("ioctl(DRM_VERSION).name", (Addr)data->name, data->name_len);
+ PRE_MEM_READ("ioctl(DRM_VERSION).date_len", (Addr)&data->date_len, sizeof(data->date_len));
+ PRE_MEM_READ("ioctl(DRM_VERSION).date", (Addr)&data->date, sizeof(data->date));
+ PRE_MEM_WRITE("ioctl(DRM_VERSION).date", (Addr)data->date, data->date_len);
+ PRE_MEM_READ("ioctl(DRM_VERSION).desc_len", (Addr)&data->desc_len, sizeof(data->desc_len));
+ PRE_MEM_READ("ioctl(DRM_VERSION).desc", (Addr)&data->desc, sizeof(data->desc));
+ PRE_MEM_WRITE("ioctl(DRM_VERSION).desc", (Addr)data->desc, data->desc_len);
+ }
+ break;
+ case VKI_DRM_IOCTL_GET_UNIQUE:
+ if (ARG3) {
+ struct vki_drm_unique *data = (struct vki_drm_unique *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_GET_UNIQUE).unique_len", (Addr)&data->unique_len, sizeof(data->unique_len));
+ PRE_MEM_READ("ioctl(DRM_GET_UNIQUE).unique", (Addr)&data->unique, sizeof(data->unique));
+ PRE_MEM_WRITE("ioctl(DRM_GET_UNIQUE).unique", (Addr)data->unique, data->unique_len);
+ }
+ break;
+ case VKI_DRM_IOCTL_GET_MAGIC:
+ if (ARG3) {
+ struct vki_drm_auth *data = (struct vki_drm_auth *)ARG3;
+ PRE_MEM_WRITE("ioctl(DRM_GET_MAGIC).magic", (Addr)&data->magic, sizeof(data->magic));
+ }
+ break;
+ case VKI_DRM_IOCTL_WAIT_VBLANK:
+ if (ARG3) {
+ union vki_drm_wait_vblank *data = (union vki_drm_wait_vblank *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_WAIT_VBLANK).request.type", (Addr)&data->request.type, sizeof(data->request.type));
+ PRE_MEM_READ("ioctl(DRM_WAIT_VBLANK).request.sequence", (Addr)&data->request.sequence, sizeof(data->request.sequence));
+ /* XXX: It seems request.signal isn't used */
+ PRE_MEM_WRITE("ioctl(DRM_WAIT_VBLANK).reply", (Addr)&data->reply, sizeof(data->reply));
+ }
+ break;
+ case VKI_DRM_IOCTL_GEM_CLOSE:
+ if (ARG3) {
+ struct vki_drm_gem_close *data = (struct vki_drm_gem_close *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_GEM_CLOSE).handle", (Addr)&data->handle, sizeof(data->handle));
+ }
+ break;
+ case VKI_DRM_IOCTL_GEM_FLINK:
+ if (ARG3) {
+ struct vki_drm_gem_flink *data = (struct vki_drm_gem_flink *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_GEM_FLINK).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_WRITE("ioctl(DRM_GEM_FLINK).name", (Addr)&data->name, sizeof(data->name));
+ }
+ break;
+ case VKI_DRM_IOCTL_GEM_OPEN:
+ if (ARG3) {
+ struct vki_drm_gem_open *data = (struct vki_drm_gem_open *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_GEM_OPEN).name", (Addr)&data->name, sizeof(data->name));
+ PRE_MEM_WRITE("ioctl(DRM_GEM_OPEN).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_WRITE("ioctl(DRM_GEM_OPEN).size", (Addr)&data->size, sizeof(data->size));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GETPARAM:
+ if (ARG3) {
+ vki_drm_i915_getparam_t *data = (vki_drm_i915_getparam_t *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GETPARAM).param", (Addr)&data->param, sizeof(data->param));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GETPARAM).value", (Addr)data->value, sizeof(int));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_BUSY:
+ if (ARG3) {
+ struct vki_drm_i915_gem_busy *data = (struct vki_drm_i915_gem_busy *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_BUSY).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_BUSY).busy", (Addr)&data->busy, sizeof(data->busy));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_CREATE:
+ if (ARG3) {
+ struct vki_drm_i915_gem_create *data = (struct vki_drm_i915_gem_create *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_CREATE).size", (Addr)&data->size, sizeof(data->size));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_CREATE).handle", (Addr)&data->handle, sizeof(data->handle));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_PREAD:
+ if (ARG3) {
+ struct vki_drm_i915_gem_pread *data = (struct vki_drm_i915_gem_pread *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PREAD).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PREAD).offset", (Addr)&data->offset, sizeof(data->offset));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PREAD).size", (Addr)&data->size, sizeof(data->size));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PREAD).data_ptr", (Addr)&data->data_ptr, sizeof(data->data_ptr));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_PREAD).data_ptr", (Addr)data->data_ptr, data->size);
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_PWRITE:
+ if (ARG3) {
+ struct vki_drm_i915_gem_pwrite *data = (struct vki_drm_i915_gem_pwrite *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PWRITE).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PWRITE).offset", (Addr)&data->offset, sizeof(data->offset));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PWRITE).size", (Addr)&data->size, sizeof(data->size));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_PWRITE).data_ptr", (Addr)&data->data_ptr, sizeof(data->data_ptr));
+ /* PRE_MEM_READ("ioctl(DRM_I915_GEM_PWRITE).data_ptr", (Addr)data->data_ptr, data->size);
+ * NB: the buffer is allowed to contain any amount of uninitialized data (e.g.
+ * interleaved vertex attributes may have a wide stride with uninitialized data between
+ * consecutive vertices) */
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_MMAP_GTT:
+ if (ARG3) {
+ struct vki_drm_i915_gem_mmap_gtt *data = (struct vki_drm_i915_gem_mmap_gtt *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_MMAP_GTT).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_MMAP_GTT).offset", (Addr)&data->offset, sizeof(data->offset));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_SET_DOMAIN:
+ if (ARG3) {
+ struct vki_drm_i915_gem_set_domain *data = (struct vki_drm_i915_gem_set_domain *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_DOMAIN).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_DOMAIN).read_domains", (Addr)&data->read_domains, sizeof(data->read_domains));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_DOMAIN).write_domain", (Addr)&data->write_domain, sizeof(data->write_domain));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_SET_TILING:
+ if (ARG3) {
+ struct vki_drm_i915_gem_set_tiling *data = (struct vki_drm_i915_gem_set_tiling *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_TILING).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_TILING).tiling_mode", (Addr)&data->tiling_mode, sizeof(data->tiling_mode));
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_TILING).stride", (Addr)&data->stride, sizeof(data->stride));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_SET_TILING).swizzle_mode", (Addr)&data->swizzle_mode, sizeof(data->swizzle_mode));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_GET_TILING:
+ if (ARG3) {
+ struct vki_drm_i915_gem_get_tiling *data = (struct vki_drm_i915_gem_get_tiling *)ARG3;
+ PRE_MEM_READ("ioctl(DRM_I915_GEM_GET_TILING).handle", (Addr)&data->handle, sizeof(data->handle));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_GET_TILING).tiling_mode", (Addr)&data->tiling_mode, sizeof(data->tiling_mode));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_GET_TILING).swizzle_mode", (Addr)&data->swizzle_mode, sizeof(data->swizzle_mode));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_GET_APERTURE:
+ if (ARG3) {
+ struct vki_drm_i915_gem_get_aperture *data = (struct vki_drm_i915_gem_get_aperture *)ARG3;
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_GET_APERTURE).aper_size", (Addr)&data->aper_size, sizeof(data->aper_size));
+ PRE_MEM_WRITE("ioctl(DRM_I915_GEM_GET_APERTURE).aper_available_size", (Addr)&data->aper_available_size, sizeof(data->aper_available_size));
+ }
+ break;
+
default:
PRINT("sys_fcntl[UNKNOWN] ( %ld, %ld, %ld )", ARG1,ARG2,ARG3);
I_die_here;
@@ -5305,6 +5450,104 @@
unsigned int, fd, unsigned int, request);
return;
+ case VKI_DRM_IOCTL_VERSION:
+ if (ARG3) {
+ struct vki_drm_version *data = (struct vki_drm_version *)ARG3;
+ POST_MEM_WRITE((Addr)&data->version_major, sizeof(data->version_major));
+ POST_MEM_WRITE((Addr)&data->version_minor, sizeof(data->version_minor));
+ POST_MEM_WRITE((Addr)&data->version_patchlevel, sizeof(data->version_patchlevel));
+ POST_MEM_WRITE((Addr)&data->name_len, sizeof(data->name_len));
+ POST_MEM_WRITE((Addr)data->name, data->name_len);
+ POST_MEM_WRITE((Addr)&data->date_len, sizeof(data->date_len));
+ POST_MEM_WRITE((Addr)data->date, data->date_len);
+ POST_MEM_WRITE((Addr)&data->desc_len, sizeof(data->desc_len));
+ POST_MEM_WRITE((Addr)data->desc, data->desc_len);
+ }
+ break;
+ case VKI_DRM_IOCTL_GET_UNIQUE:
+ if (ARG3) {
+ struct vki_drm_unique *data = (struct vki_drm_unique *)ARG3;
+ POST_MEM_WRITE((Addr)data->unique, sizeof(data->unique_len));
+ }
+ break;
+ case VKI_DRM_IOCTL_GET_MAGIC:
+ if (ARG3) {
+ struct vki_drm_auth *data = (struct vki_drm_auth *)ARG3;
+ POST_MEM_WRITE((Addr)&data->magic, sizeof(data->magic));
+ }
+ break;
+ case VKI_DRM_IOCTL_WAIT_VBLANK:
+ if (ARG3) {
+ union vki_drm_wait_vblank *data = (union vki_drm_wait_vblank *)ARG3;
+ POST_MEM_WRITE((Addr)&data->reply, sizeof(data->reply));
+ }
+ break;
+ case VKI_DRM_IOCTL_GEM_FLINK:
+ if (ARG3) {
+ struct vki_drm_gem_flink *data = (struct vki_drm_gem_flink *)ARG3;
+ POST_MEM_WRITE((Addr)&data->name, sizeof(data->name));
+ }
+ break;
+ case VKI_DRM_IOCTL_GEM_OPEN:
+ if (ARG3) {
+ struct vki_drm_gem_open *data = (struct vki_drm_gem_open *)ARG3;
+ POST_MEM_WRITE((Addr)&data->handle, sizeof(data->handle));
+ POST_MEM_WRITE((Addr)&data->size, sizeof(data->size));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GETPARAM:
+ if (ARG3) {
+ vki_drm_i915_getparam_t *data = (vki_drm_i915_getparam_t *)ARG3;
+ POST_MEM_WRITE((Addr)data->value, sizeof(int));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_BUSY:
+ if (ARG3) {
+ struct vki_drm_i915_gem_busy *data = (struct vki_drm_i915_gem_busy *)ARG3;
+ POST_MEM_WRITE((Addr)&data->busy, sizeof(data->busy));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_CREATE:
+ if (ARG3) {
+ struct vki_drm_i915_gem_create *data = (struct vki_drm_i915_gem_create *)ARG3;
+ POST_MEM_WRITE((Addr)&data->handle, sizeof(data->handle));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_PREAD:
+ if (ARG3) {
+ struct vki_drm_i915_gem_pread *data = (struct vki_drm_i915_gem_pread *)ARG3;
+ POST_MEM_WRITE((Addr)data->data_ptr, data->size);
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_MMAP_GTT:
+ if (ARG3) {
+ struct vki_drm_i915_gem_mmap_gtt *data = (struct vki_drm_i915_gem_mmap_gtt *)ARG3;
+ POST_MEM_WRITE((Addr)&data->offset, sizeof(data->offset));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_SET_TILING:
+ if (ARG3) {
+ struct vki_drm_i915_gem_set_tiling *data = (struct vki_drm_i915_gem_set_tiling *)ARG3;
+ POST_MEM_WRITE((Addr)&data->tiling_mode, sizeof(data->tiling_mode));
+ POST_MEM_WRITE((Addr)&data->stride, sizeof(data->stride));
+ POST_MEM_WRITE((Addr)&data->swizzle_mode, sizeof(data->swizzle_mode));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_GET_TILING:
+ if (ARG3) {
+ struct vki_drm_i915_gem_get_tiling *data = (struct vki_drm_i915_gem_get_tiling *)ARG3;
+ POST_MEM_WRITE((Addr)&data->tiling_mode, sizeof(data->tiling_mode));
+ POST_MEM_WRITE((Addr)&data->swizzle_mode, sizeof(data->swizzle_mode));
+ }
+ break;
+ case VKI_DRM_IOCTL_I915_GEM_GET_APERTURE:
+ if (ARG3) {
+ struct vki_drm_i915_gem_get_aperture *data = (struct vki_drm_i915_gem_get_aperture *)ARG3;
+ POST_MEM_WRITE((Addr)&data->aper_size, sizeof(data->aper_size));
+ POST_MEM_WRITE((Addr)&data->aper_available_size, sizeof(data->aper_available_size));
+ }
+ break;
+
default:
PRINT("sys_ioctl ( %ld, 0x%lx, 0x%lx )",ARG1,ARG2,ARG3);
PRE_REG_READ3(long, "ioctl",
Modified: trunk/NEWS (+4 -0)
===================================================================
--- trunk/NEWS 2013-08-06 21:45:20 +01:00 (rev 13485)
+++ trunk/NEWS 2013-08-08 09:09:29 +01:00 (rev 13486)
@@ -444,8 +444,12 @@
FIXED 13467
322851 0bXXX binary literal syntax is not standard
+ FIXED 2736
+207815 Adds some of the drm ioctls to syswrap-linux.c
+ FIXED 13486
+
Release 3.8.1 (19 September 2012)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3.8.1 is a bug fix release. It fixes some assertion failures in 3.8.0
Modified: trunk/include/pub_tool_vki.h (+1 -0)
===================================================================
--- trunk/include/pub_tool_vki.h 2013-08-06 21:45:20 +01:00 (rev 13485)
+++ trunk/include/pub_tool_vki.h 2013-08-08 09:09:29 +01:00 (rev 13486)
@@ -47,6 +47,7 @@
#if defined(VGO_linux)
# include "vki/vki-linux.h"
+# include "vki/vki-linux-drm.h"
#elif defined(VGO_darwin)
# include "vki/vki-darwin.h"
#else
Modified: trunk/include/Makefile.am (+3 -2)
===================================================================
--- trunk/include/Makefile.am 2013-08-06 21:45:20 +01:00 (rev 13485)
+++ trunk/include/Makefile.am 2013-08-08 09:09:29 +01:00 (rev 13486)
@@ -66,5 +66,6 @@
vki/vki-scnums-s390x-linux.h \
vki/vki-scnums-mips32-linux.h \
vki/vki-scnums-mips64-linux.h \
- vki/vki-scnums-darwin.h \
- vki/vki-xen.h
+ vki/vki-scnums-darwin.h \
+ vki/vki-xen.h \
+ vki/vki-linux-drm.h
|
|
From: Philippe W. <phi...@sk...> - 2013-08-08 03:48:42
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora (7.5.1-37.fc18) Assembler: GNU assembler version 2.23.51.0.1-7.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.7.2-204.fc18.ppc64 ppc64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on gcc110 ( Fedora release 18 (Spherical Cow), ppc64 ) Started at 2013-08-07 20:00:39 PDT Ended at 2013-08-07 20:48:10 PDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 558 tests, 31 stderr failures, 3 stdout failures, 0 stderrB failures, 0 stdoutB failures, 2 post failures == memcheck/tests/linux/getregset (stdout) memcheck/tests/linux/getregset (stderr) memcheck/tests/ppc64/power_ISA2_05 (stdout) memcheck/tests/supp_unknown (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) helgrind/tests/annotate_rwlock (stderr) helgrind/tests/free_is_write (stderr) helgrind/tests/hg02_deadlock (stderr) helgrind/tests/hg03_inherit (stderr) helgrind/tests/hg04_race (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/locked_vs_unlocked1_fwd (stderr) helgrind/tests/locked_vs_unlocked1_rev (stderr) helgrind/tests/locked_vs_unlocked2 (stderr) helgrind/tests/locked_vs_unlocked3 (stderr) helgrind/tests/pth_barrier1 (stderr) helgrind/tests/pth_barrier2 (stderr) helgrind/tests/pth_barrier3 (stderr) helgrind/tests/pth_destroy_cond (stderr) helgrind/tests/rwlock_race (stderr) helgrind/tests/tc01_simple_race (stderr) helgrind/tests/tc05_simple_race (stderr) helgrind/tests/tc06_two_races (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) helgrind/tests/tc14_laog_dinphils (stderr) helgrind/tests/tc16_byterace (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc19_shadowmem (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) |
|
From: Tom H. <to...@co...> - 2013-08-08 03:27:26
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) GDB: Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2013-08-08 03:53:10 BST Ended at 2013-08-08 04:27:08 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 633 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/amd64/insn-pcmpistri (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Tom H. <to...@co...> - 2013-08-08 03:25:38
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.4.1 20090725 (Red Hat 4.4.1-2) GDB: Assembler: GNU assembler version 2.19.51.0.14-3.fc11 20090722 C library: GNU C Library stable release version 2.10.2 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 11 (Leonidas) Nightly build on bristol ( x86_64, Fedora 11 ) Started at 2013-08-08 03:42:47 BST Ended at 2013-08-08 04:25:21 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 635 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/long_namespace_xml (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Tom H. <to...@co...> - 2013-08-08 03:19:18
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.4.5 20101112 (Red Hat 4.4.5-2) GDB: Assembler: GNU assembler version 2.20.51.0.2-20.fc13 20091009 C library: GNU C Library stable release version 2.12.2 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 13 (Goddard) Nightly build on bristol ( x86_64, Fedora 13 ) Started at 2013-08-08 03:32:14 BST Ended at 2013-08-08 04:19:00 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 635 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/pth_barrier3 (stderr) |
|
From: Tom H. <to...@co...> - 2013-08-08 03:13:18
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.5.1 20100924 (Red Hat 4.5.1-4) GDB: GNU gdb (GDB) Fedora (7.2-52.fc14) Assembler: GNU assembler version 2.20.51.0.7-8.fc14 20100318 C library: GNU C Library stable release version 2.13 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 14 (Laughlin) Nightly build on bristol ( x86_64, Fedora 14 ) Started at 2013-08-08 03:23:42 BST Ended at 2013-08-08 04:13:03 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 654 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) |
|
From: Tom H. <to...@co...> - 2013-08-08 03:06:55
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2013-08-08 03:13:07 BST Ended at 2013-08-08 04:06:37 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 656 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) |
|
From: Tom H. <to...@co...> - 2013-08-08 02:32:42
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2013-08-08 02:51:49 BST Ended at 2013-08-08 03:32:25 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 656 tests, 5 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
|
From: Maran P. <ma...@li...> - 2013-08-08 02:27:50
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.3-0.6.1) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.21.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.80-0.7-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP2 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP1 gcc 4.3.4 on z196 (s390x) ) Started at 2013-08-08 03:45:01 CEST Ended at 2013-08-08 04:27:37 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 636 tests, 0 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == |
|
From: Maran P. <ma...@li...> - 2013-08-08 02:18:06
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.7.0 20120604 (Red Hat 4.7.0-7) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-42.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: unknown uname -mrs: Linux 3.3.4-5.fc17.s390x s390x Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on fedoras390 ( Fedora 17 with gcc 4.7.0 on z196 (s390x) ) Started at 2013-08-08 03:45:26 CEST Ended at 2013-08-08 04:18:17 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 636 tests, 3 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == none/tests/s390x/test_clone (stdout) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) drd/tests/tc04_free_lock (stderr) |
|
From: Tom H. <to...@co...> - 2013-08-08 02:17:20
|
valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora (7.5.1-38.fc18) Assembler: GNU assembler version 2.23.51.0.1-6.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2013-08-08 02:42:41 BST Ended at 2013-08-08 03:17:05 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 656 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
|
From: Tom H. <to...@co...> - 2013-08-08 02:07:37
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valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.8.1 20130603 (Red Hat 4.8.1-1) GDB: GNU gdb (GDB) Fedora (7.6-32.fc19) Assembler: GNU assembler version 2.23.52.0.1-9.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2013-08-08 02:32:21 BST Ended at 2013-08-08 03:07:23 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 656 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/dw4 (stderr) memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) |
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From: Maran P. <ma...@li...> - 2013-08-08 02:05:59
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valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.4.7 20120313 (Red Hat 4.4.7-3) GDB: GNU gdb (GDB) Red Hat Enterprise Linux (7.2-60.el6) Assembler: GNU assembler version 2.20.51.0.2-5.36.el6 20100205 C library: GNU C Library stable release version 2.12 uname -mrs: Linux 2.6.32-358.el6.s390x s390x Vendor version: Red Hat Enterprise Linux Server release 6.4 (Santiago) Nightly build on rhels390 ( RHEL 6.4 with gcc 4.4.7 on zEC12 (s390x) ) Started at 2013-08-08 03:45:26 CEST Ended at 2013-08-08 04:06:10 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 633 tests, 0 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == |
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From: Tom H. <to...@co...> - 2013-08-08 01:52:36
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valgrind revision: 13485 VEX revision: 2738 C compiler: gcc (GCC) 4.8.1 20130717 (Red Hat 4.8.1-5) GDB: GNU gdb (GDB) Fedora (7.6.50.20130731-2.fc20) Assembler: GNU assembler version 2.23.2 C library: GNU C Library (GNU libc) development release version 2.17.90 uname -mrs: Linux 3.9.5-301.fc19.x86_64 x86_64 Vendor version: Fedora release 20 (Rawhide) Nightly build on bristol ( x86_64, Fedora 20 ) Started at 2013-08-08 02:23:55 BST Ended at 2013-08-08 02:52:20 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 656 tests, 6 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/amd64/insn_basic (stderr) memcheck/tests/dw4 (stderr) memcheck/tests/origin5-bz2 (stderr) none/tests/amd64/insn_basic (stdout) none/tests/amd64/insn_basic (stderr) drd/tests/pth_mutex_reinit (stderr) exp-sgcheck/tests/hackedbz2 (stderr) |