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From: <sv...@va...> - 2013-08-15 21:18:29
|
sewardj 2013-08-15 22:18:21 +0100 (Thu, 15 Aug 2013)
New Revision: 13499
Log:
Avoid a compiler warning.
Modified files:
trunk/none/tests/arm/ldrt.c
Modified: trunk/none/tests/arm/ldrt.c (+2 -2)
===================================================================
--- trunk/none/tests/arm/ldrt.c 2013-08-15 21:55:42 +01:00 (rev 13498)
+++ trunk/none/tests/arm/ldrt.c 2013-08-15 22:18:21 +01:00 (rev 13499)
@@ -101,8 +101,8 @@
do_ldrbt_imm_2((unsigned char*)&val_ldrbt), 137);
UInt val_ldrsbt = (200 << 0) | (150 << 8) | (254 << 16) | (10 << 24);
- printf("result is %u (should be %u)\n",
- do_ldrsbt_imm_2((unsigned char*)&val_ldrsbt), 4294967294);
+ printf("result is %u (should be %llu)\n",
+ do_ldrsbt_imm_2((unsigned char*)&val_ldrsbt), 4294967294ULL);
return 0;
}
|
|
From: <sv...@va...> - 2013-08-15 20:55:49
|
florian 2013-08-15 21:55:42 +0100 (Thu, 15 Aug 2013)
New Revision: 13498
Log:
Followup to VEX r2742 which eliminates IRExprP__VECRET and IRExprP__BBPTR
and adds Iex_VECRET and Iex_BBPTR.
Modified files:
trunk/memcheck/mc_translate.c
Modified: trunk/memcheck/mc_translate.c (+4 -4)
===================================================================
--- trunk/memcheck/mc_translate.c 2013-08-15 14:48:28 +01:00 (rev 13497)
+++ trunk/memcheck/mc_translate.c 2013-08-15 21:55:42 +01:00 (rev 13498)
@@ -4273,7 +4273,7 @@
di = unsafeIRDirty_1_N( datavbits,
2/*regparms*/,
hname, VG_(fnptr_to_fnentry)( helper ),
- mkIRExprVec_2( IRExprP__VECRET, addrAct ) );
+ mkIRExprVec_2( IRExpr_VECRET(), addrAct ) );
} else {
di = unsafeIRDirty_1_N( datavbits,
1/*regparms*/,
@@ -4880,7 +4880,7 @@
for (i = 0; d->args[i]; i++) {
IRAtom* arg = d->args[i];
if ( (d->cee->mcx_mask & (1<<i))
- || UNLIKELY(is_IRExprP__VECRET_or_BBPTR(arg)) ) {
+ || UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg)) ) {
/* ignore this arg */
} else {
here = mkPCastTo( mce, Ity_I32, expr2vbits(mce, arg) );
@@ -5755,7 +5755,7 @@
d = st->Ist.Dirty.details;
for (i = 0; d->args[i]; i++) {
IRAtom* atom = d->args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(atom))) {
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(atom))) {
if (isBogusAtom(atom))
return True;
}
@@ -6647,7 +6647,7 @@
for (i = 0; d->args[i]; i++) {
IRAtom* arg = d->args[i];
if ( (d->cee->mcx_mask & (1<<i))
- || UNLIKELY(is_IRExprP__VECRET_or_BBPTR(arg)) ) {
+ || UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg)) ) {
/* ignore this arg */
} else {
here = schemeE( mce, arg );
|
|
From: <sv...@va...> - 2013-08-15 20:55:03
|
florian 2013-08-15 21:54:52 +0100 (Thu, 15 Aug 2013)
New Revision: 2742
Log:
Eliminate IRExprP__VECRET and IRExprP__BBPTR and introduce two new
IRExpr kinds instead: Iex_VECRET and Iex_BBPTR. Add constructor
functions and adjust ppIRExpr, typeOfIRxpr and deepCopyExpr. The
rest is mechanics.
Modified files:
trunk/priv/guest_amd64_toIR.c
trunk/priv/guest_mips_toIR.c
trunk/priv/guest_ppc_toIR.c
trunk/priv/guest_s390_toIR.c
trunk/priv/guest_x86_toIR.c
trunk/priv/host_amd64_isel.c
trunk/priv/host_arm_isel.c
trunk/priv/host_mips_isel.c
trunk/priv/host_ppc_isel.c
trunk/priv/host_s390_isel.c
trunk/priv/host_x86_isel.c
trunk/priv/ir_defs.c
trunk/priv/ir_opt.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/host_s390_isel.c (+7 -7)
===================================================================
--- trunk/priv/host_s390_isel.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/host_s390_isel.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -486,18 +486,18 @@
/* The return type can be I{64,32,16,8} or V{128,256}. In the
latter two cases, it is expected that |args| will contain the
- special value IRExprP__VECRET, in which case this routine
+ special node IRExpr_VECRET(), in which case this routine
generates code to allocate space on the stack for the vector
return value. Since we are not passing any scalars on the
stack, it is enough to preallocate the return space before
marshalling any arguments, in this case.
- |args| may also contain IRExprP__BBPTR, in which case the value
+ |args| may also contain IRExpr_BBPTR(), in which case the value
in the guest state pointer register is passed as the
corresponding argument.
These are used for cross-checking that IR-level constraints on
- the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ the use of IRExpr_VECRET() and IRExpr_BBPTR() are observed. */
UInt nVECRETs = 0;
UInt nBBPTRs = 0;
@@ -516,9 +516,9 @@
*/
Int arg_errors = 0;
for (i = 0; i < n_args; ++i) {
- if (UNLIKELY(args[i] == IRExprP__VECRET)) {
+ if (UNLIKELY(args[i]->tag == Iex_VECRET)) {
nVECRETs++;
- } else if (UNLIKELY(args[i] == IRExprP__BBPTR)) {
+ } else if (UNLIKELY(args[i]->tag == Iex_BBPTR)) {
nBBPTRs++;
} else {
IRType type = typeOfIRExpr(env->type_env, args[i]);
@@ -561,12 +561,12 @@
/* Compute the function arguments into a temporary register each */
for (i = 0; i < n_args; i++) {
IRExpr *arg = args[i];
- if(UNLIKELY(arg == IRExprP__VECRET)) {
+ if(UNLIKELY(arg->tag == Iex_VECRET)) {
/* we do not handle vector types yet */
vassert(0);
addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg],
r_vecRetAddr));
- } else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ } else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
/* If we need the guest state pointer put it in a temporary arg reg */
tmpregs[argreg] = newVRegI(env);
addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg],
Modified: trunk/priv/host_x86_isel.c (+13 -13)
===================================================================
--- trunk/priv/host_x86_isel.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/host_x86_isel.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -340,19 +340,19 @@
/* Push an arg onto the host stack, in preparation for a call to a
helper function of some kind. Returns the number of 32-bit words
- pushed. If we encounter an IRExprP__VECRET then we expect that
+ pushed. If we encounter an IRExpr_VECRET() then we expect that
r_vecRetAddr will be a valid register, that holds the relevant
address.
*/
static Int pushArg ( ISelEnv* env, IRExpr* arg, HReg r_vecRetAddr )
{
- if (UNLIKELY(arg == IRExprP__VECRET)) {
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
vassert(0); //ATC
vassert(!hregIsInvalid(r_vecRetAddr));
addInstr(env, X86Instr_Push(X86RMI_Reg(r_vecRetAddr)));
return 1;
}
- if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ if (UNLIKELY(arg->tag == Iex_BBPTR)) {
addInstr(env, X86Instr_Push(X86RMI_Reg(hregX86_EBP())));
return 1;
}
@@ -402,7 +402,7 @@
static
Bool mightRequireFixedRegs ( IRExpr* e )
{
- if (UNLIKELY(is_IRExprP__VECRET_or_BBPTR(e))) {
+ if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(e))) {
// These are always "safe" -- either a copy of %esp in some
// arbitrary vreg, or a copy of %ebp, respectively.
return False;
@@ -443,7 +443,7 @@
*retloc = mk_RetLoc_INVALID();
/* These are used for cross-checking that IR-level constraints on
- the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ the use of Iex_VECRET and Iex_BBPTR are observed. */
UInt nVECRETs = 0;
UInt nBBPTRs = 0;
@@ -452,13 +452,13 @@
* The return type can be I{64,32,16,8} or V128. In the V128
case, it is expected that |args| will contain the special
- value IRExprP__VECRET, in which case this routine generates
+ node IRExpr_VECRET(), in which case this routine generates
code to allocate space on the stack for the vector return
value. Since we are not passing any scalars on the stack, it
is enough to preallocate the return space before marshalling
any arguments, in this case.
- |args| may also contain IRExprP__BBPTR, in which case the
+ |args| may also contain IRExpr_BBPTR(), in which case the
value in %ebp is passed as the corresponding argument.
* If the callee claims regparmness of 1, 2 or 3, we must pass the
@@ -508,9 +508,9 @@
while (args[n_args]) {
IRExpr* arg = args[n_args];
n_args++;
- if (UNLIKELY(arg == IRExprP__VECRET)) {
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
nVECRETs++;
- } else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ } else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
nBBPTRs++;
}
}
@@ -585,10 +585,10 @@
IRExpr* arg = args[i];
argreg--;
vassert(argreg >= 0);
- if (UNLIKELY(arg == IRExprP__VECRET)) {
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
vassert(0); //ATC
}
- else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
vassert(0); //ATC
} else {
vassert(typeOfIRExpr(env->type_env, arg) == Ity_I32);
@@ -609,13 +609,13 @@
IRExpr* arg = args[i];
argreg--;
vassert(argreg >= 0);
- if (UNLIKELY(arg == IRExprP__VECRET)) {
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
vassert(!hregIsInvalid(r_vecRetAddr));
addInstr(env, X86Instr_Alu32R(Xalu_MOV,
X86RMI_Reg(r_vecRetAddr),
argregs[argreg]));
}
- else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
vassert(0); //ATC
} else {
vassert(typeOfIRExpr(env->type_env, arg) == Ity_I32);
Modified: trunk/priv/host_ppc_isel.c (+9 -9)
===================================================================
--- trunk/priv/host_ppc_isel.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/host_ppc_isel.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -700,7 +700,7 @@
*retloc = mk_RetLoc_INVALID();
/* These are used for cross-checking that IR-level constraints on
- the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ the use of IRExpr_VECRET() and IRExpr_BBPTR() are observed. */
UInt nVECRETs = 0;
UInt nBBPTRs = 0;
@@ -720,13 +720,13 @@
The return type can be I{64,32,16,8} or V{128,256}. In the
latter two cases, it is expected that |args| will contain the
- special value IRExprP__VECRET, in which case this routine
+ special node IRExpr_VECRET(), in which case this routine
generates code to allocate space on the stack for the vector
return value. Since we are not passing any scalars on the
stack, it is enough to preallocate the return space before
marshalling any arguments, in this case.
- |args| may also contain IRExprP__BBPTR, in which case the value
+ |args| may also contain IRExpr_BBPTR(), in which case the value
in the guest state pointer register is passed as the
corresponding argument.
@@ -822,10 +822,10 @@
if (go_fast) {
for (i = 0; i < n_args; i++) {
IRExpr* arg = args[i];
- if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ if (UNLIKELY(arg->tag == Iex_BBPTR)) {
/* that's OK */
}
- else if (UNLIKELY(arg == IRExprP__VECRET)) {
+ else if (UNLIKELY(arg->tag == Iex_VECRET)) {
/* This implies ill-formed IR, since if the IR was
well-formed, the return-type test above would have
filtered it out. */
@@ -850,13 +850,13 @@
IRExpr* arg = args[i];
vassert(argreg < PPC_N_REGPARMS);
- if (arg == IRExprP__BBPTR) {
+ if (arg->tag == Iex_BBPTR) {
argiregs |= (1 << (argreg+3));
addInstr(env, mk_iMOVds_RR( argregs[argreg],
GuestStatePtr(mode64) ));
argreg++;
} else {
- vassert(arg != IRExprP__VECRET);
+ vassert(arg->tag != Iex_VECRET);
IRType ty = typeOfIRExpr(env->type_env, arg);
vassert(ty == Ity_I32 || ty == Ity_I64);
if (!mode64) {
@@ -922,13 +922,13 @@
for (i = 0; i < n_args; i++) {
IRExpr* arg = args[i];
vassert(argreg < PPC_N_REGPARMS);
- if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ if (UNLIKELY(arg->tag == Iex_BBPTR)) {
tmpregs[argreg] = newVRegI(env);
addInstr(env, mk_iMOVds_RR( tmpregs[argreg],
GuestStatePtr(mode64) ));
nBBPTRs++;
}
- else if (UNLIKELY(arg == IRExprP__VECRET)) {
+ else if (UNLIKELY(arg->tag == Iex_VECRET)) {
/* We stashed the address of the return slot earlier, so just
retrieve it now. */
vassert(!hregIsInvalid(r_vecRetAddr));
Modified: trunk/priv/guest_x86_toIR.c (+8 -8)
===================================================================
--- trunk/priv/guest_x86_toIR.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/guest_x86_toIR.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -3953,7 +3953,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FLDENV",
&x86g_dirtyhelper_FLDENV,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
d->tmp = ew;
/* declare we're reading memory */
@@ -4049,7 +4049,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FSTENV",
&x86g_dirtyhelper_FSTENV,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're writing memory */
d->mFx = Ifx_Write;
@@ -4734,7 +4734,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FINIT",
&x86g_dirtyhelper_FINIT,
- mkIRExprVec_1(IRExprP__BBPTR)
+ mkIRExprVec_1(IRExpr_BBPTR())
);
/* declare we're writing guest state */
@@ -4933,7 +4933,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FRSTOR",
&x86g_dirtyhelper_FRSTOR,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
d->tmp = ew;
/* declare we're reading memory */
@@ -4992,7 +4992,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FSAVE",
&x86g_dirtyhelper_FSAVE,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're writing memory */
d->mFx = Ifx_Write;
@@ -8187,7 +8187,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FXSAVE",
&x86g_dirtyhelper_FXSAVE,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're writing memory */
@@ -8261,7 +8261,7 @@
0/*regparms*/,
"x86g_dirtyhelper_FXRSTOR",
&x86g_dirtyhelper_FXRSTOR,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're reading memory */
@@ -14682,7 +14682,7 @@
vassert(fName); vassert(fAddr);
d = unsafeIRDirty_0_N ( 0/*regparms*/,
- fName, fAddr, mkIRExprVec_1(IRExprP__BBPTR) );
+ fName, fAddr, mkIRExprVec_1(IRExpr_BBPTR()) );
/* declare guest state effects */
d->nFxState = 4;
vex_bzero(&d->fxState, sizeof(d->fxState));
Modified: trunk/priv/guest_mips_toIR.c (+3 -3)
===================================================================
--- trunk/priv/guest_mips_toIR.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/guest_mips_toIR.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -12488,7 +12488,7 @@
if (rs == 0) { /* MFC0 */
DIP("mfc0 r%d, r%d, %d", rt, rd, sel);
IRTemp val = newTemp(Ity_I32);
- IRExpr** args = mkIRExprVec_3 (IRExprP__BBPTR, mkU32(rd), mkU32(sel));
+ IRExpr** args = mkIRExprVec_3 (IRExpr_BBPTR(), mkU32(rd), mkU32(sel));
IRDirty *d = unsafeIRDirty_1_N(val,
0,
"mips32_dirtyhelper_mfc0",
@@ -12500,7 +12500,7 @@
/* Doubleword Move from Coprocessor 0 - DMFC0; MIPS64 */
DIP("dmfc0 r%d, r%d, %d", rt, rd, sel);
IRTemp val = newTemp(Ity_I64);
- IRExpr** args = mkIRExprVec_3 (IRExprP__BBPTR, mkU64(rd), mkU64(sel));
+ IRExpr** args = mkIRExprVec_3 (IRExpr_BBPTR(), mkU64(rd), mkU64(sel));
IRDirty *d = unsafeIRDirty_1_N(val,
0,
"mips64_dirtyhelper_dmfc0",
@@ -14166,7 +14166,7 @@
#if defined(__mips__) && ((defined(__mips_isa_rev) && __mips_isa_rev >= 2))
} else if (rd == 1) {
IRTemp val = newTemp(Ity_I64);
- IRExpr** args = mkIRExprVec_3 (IRExprP__BBPTR,
+ IRExpr** args = mkIRExprVec_3 (IRExpr_BBPTR(),
mkU64(rt), mkU64(rd));
IRDirty *d = unsafeIRDirty_1_N(val,
0,
Modified: trunk/priv/host_mips_isel.c (+11 -11)
===================================================================
--- trunk/priv/host_mips_isel.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/host_mips_isel.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -405,7 +405,7 @@
*retloc = mk_RetLoc_INVALID();
/* These are used for cross-checking that IR-level constraints on
- the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ the use of IRExpr_VECRET() and IRExpr_BBPTR() are observed. */
UInt nVECRETs = 0;
UInt nBBPTRs = 0;
@@ -423,13 +423,13 @@
/* The return type can be I{64,32,16,8} or V{128,256}. In the
latter two cases, it is expected that |args| will contain the
- special value IRExprP__VECRET, in which case this routine
+ special node IRExpr_VECRET(), in which case this routine
generates code to allocate space on the stack for the vector
return value. Since we are not passing any scalars on the
stack, it is enough to preallocate the return space before
marshalling any arguments, in this case.
- |args| may also contain IRExprP__BBPTR, in which case the value
+ |args| may also contain IRExpr_BBPTR(), in which case the value
in the guest state pointer register is passed as the
corresponding argument. */
@@ -436,9 +436,9 @@
n_args = 0;
for (i = 0; args[i]; i++) {
IRExpr* arg = args[i];
- if (UNLIKELY(arg == IRExprP__VECRET)) {
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
nVECRETs++;
- } else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ } else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
nBBPTRs++;
}
n_args++;
@@ -510,7 +510,7 @@
vassert(argreg < MIPS_N_REGPARMS);
IRType aTy = Ity_INVALID;
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
aTy = typeOfIRExpr(env->type_env, arg);
if (aTy == Ity_I32 || mode64) {
@@ -530,12 +530,12 @@
argiregs |= (1 << (argreg + 4));
addInstr(env, mk_iMOVds_RR( argregs[argreg], rLo));
argreg++;
- } else if (arg == IRExprP__BBPTR) {
+ } else if (arg->tag == Iex_BBPTR) {
vassert(0); // ATC
addInstr(env, mk_iMOVds_RR(argregs[argreg],
GuestStatePointer(mode64)));
argreg++;
- } else if (arg == IRExprP__VECRET) {
+ } else if (arg->tag == Iex_VECRET) {
// If this happens, it denotes ill-formed IR.
vassert(0);
}
@@ -551,7 +551,7 @@
IRExpr* arg = args[i];
IRType aTy = Ity_INVALID;
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
aTy = typeOfIRExpr(env->type_env, arg);
if (aTy == Ity_I32 || mode64) {
@@ -568,12 +568,12 @@
argreg++;
tmpregs[argreg] = raHi;
argreg++;
- } else if (arg == IRExprP__BBPTR) {
+ } else if (arg->tag == Iex_BBPTR) {
vassert(0); // ATC
tmpregs[argreg] = GuestStatePointer(mode64);
argreg++;
}
- else if (arg == IRExprP__VECRET) {
+ else if (arg->tag == Iex_VECRET) {
// If this happens, it denotes ill-formed IR
vassert(0);
}
Modified: trunk/priv/guest_amd64_toIR.c (+12 -12)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/guest_amd64_toIR.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -5356,7 +5356,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FLDENV",
&amd64g_dirtyhelper_FLDENV,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
d->tmp = w64;
/* declare we're reading memory */
@@ -5453,7 +5453,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FSTENV",
&amd64g_dirtyhelper_FSTENV,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're writing memory */
d->mFx = Ifx_Write;
@@ -6106,7 +6106,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FINIT",
&amd64g_dirtyhelper_FINIT,
- mkIRExprVec_1( IRExprP__BBPTR )
+ mkIRExprVec_1( IRExpr_BBPTR() )
);
/* declare we're writing guest state */
@@ -6321,7 +6321,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FRSTOR",
&amd64g_dirtyhelper_FRSTOR,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
d->mSize = 108;
}
@@ -6402,7 +6402,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FNSAVE",
&amd64g_dirtyhelper_FNSAVE,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
d->mSize = 108;
}
@@ -13292,7 +13292,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FXSAVE",
&amd64g_dirtyhelper_FXSAVE,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're writing memory */
@@ -13370,7 +13370,7 @@
0/*regparms*/,
"amd64g_dirtyhelper_FXRSTOR",
&amd64g_dirtyhelper_FXRSTOR,
- mkIRExprVec_2( IRExprP__BBPTR, mkexpr(addr) )
+ mkIRExprVec_2( IRExpr_BBPTR(), mkexpr(addr) )
);
/* declare we're reading memory */
@@ -16917,7 +16917,7 @@
IRExpr* gstOffLe = mkU64(gstOffL);
IRExpr* gstOffRe = mkU64(gstOffR);
IRExpr** args
- = mkIRExprVec_5( IRExprP__BBPTR, opc4, gstOffDe, gstOffLe, gstOffRe );
+ = mkIRExprVec_5( IRExpr_BBPTR(), opc4, gstOffDe, gstOffLe, gstOffRe );
IRDirty* d = unsafeIRDirty_0_N( 0/*regparms*/, nm, fn, args );
/* It's not really a dirty call, but we can't use the clean helper
@@ -17007,7 +17007,7 @@
IRExpr* gstOffLe = mkU64(gstOffL);
IRExpr* gstOffRe = mkU64(gstOffR);
IRExpr** args
- = mkIRExprVec_4( IRExprP__BBPTR, imme, gstOffLe, gstOffRe );
+ = mkIRExprVec_4( IRExpr_BBPTR(), imme, gstOffLe, gstOffRe );
IRDirty* d = unsafeIRDirty_0_N( 0/*regparms*/, nm, fn, args );
/* It's not really a dirty call, but we can't use the clean helper
@@ -17936,7 +17936,7 @@
IRExpr* edxIN = isISTRx ? mkU64(0) : getIRegRDX(8);
IRExpr* eaxIN = isISTRx ? mkU64(0) : getIRegRAX(8);
IRExpr** args
- = mkIRExprVec_6( IRExprP__BBPTR,
+ = mkIRExprVec_6( IRExpr_BBPTR(),
opc4_and_imm, gstOffLe, gstOffRe, edxIN, eaxIN );
IRTemp resT = newTemp(Ity_I64);
@@ -20711,7 +20711,7 @@
void* fAddr = &amd64g_dirtyhelper_RDTSCP;
IRDirty* d
= unsafeIRDirty_0_N ( 0/*regparms*/,
- fName, fAddr, mkIRExprVec_1(IRExprP__BBPTR) );
+ fName, fAddr, mkIRExprVec_1(IRExpr_BBPTR()) );
/* declare guest state effects */
d->nFxState = 3;
vex_bzero(&d->fxState, sizeof(d->fxState));
@@ -20959,7 +20959,7 @@
vassert(fName); vassert(fAddr);
d = unsafeIRDirty_0_N ( 0/*regparms*/,
- fName, fAddr, mkIRExprVec_1(IRExprP__BBPTR) );
+ fName, fAddr, mkIRExprVec_1(IRExpr_BBPTR()) );
/* declare guest state effects */
d->nFxState = 4;
vex_bzero(&d->fxState, sizeof(d->fxState));
Modified: trunk/pub/libvex_ir.h (+19 -20)
===================================================================
--- trunk/pub/libvex_ir.h 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/pub/libvex_ir.h 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -1680,7 +1680,9 @@
Iex_Load,
Iex_Const,
Iex_ITE,
- Iex_CCall
+ Iex_CCall,
+ Iex_VECRET,
+ Iex_BBPTR
}
IRExprTag;
@@ -1855,10 +1857,9 @@
quite poor code to be generated. Try to avoid it.
In principle it would be allowable to have the arg vector
- contain the special value IRExprP__VECRET, although not
- IRExprP__BBPTR. However, at the moment there is no
- requirement for clean helper calls to be able to return V128
- or V256 values. Hence this is not allowed.
+ contain an IRExpr_VECRET(), although not IRExpr_BBPTR(). However,
+ at the moment there is no requirement for clean helper calls to
+ be able to return V128 or V256 values. Hence this is not allowed.
ppIRExpr output: <cee>(<args>):<retty>
eg. foo{0x80489304}(t1, t2):I32
@@ -1902,30 +1903,26 @@
};
-/* Two special constants of type IRExpr*, which can ONLY be used in
+/* Two special kinds of IRExpr, which can ONLY be used in
argument lists for dirty helper calls (IRDirty.args) and in NO
- OTHER PLACES. And then only in very limited ways. These constants
- are not pointer-aligned and hence can't be confused with real
- IRExpr*s nor with NULL. */
+ OTHER PLACES. And then only in very limited ways. */
/* Denotes an argument which (in the helper) takes a pointer to a
(naturally aligned) V128 or V256, into which the helper is expected
- to write its result. Use of IRExprP__VECRET is strictly
+ to write its result. Use of IRExpr_VECRET() is strictly
controlled. If the helper returns a V128 or V256 value then
- IRExprP__VECRET must appear exactly once in the arg list, although
+ IRExpr_VECRET() must appear exactly once in the arg list, although
it can appear anywhere, and the helper must have a C 'void' return
- type. If the helper returns any other type, IRExprP__VECRET may
+ type. If the helper returns any other type, IRExpr_VECRET() may
not appear in the argument list. */
-#define IRExprP__VECRET ((IRExpr*)9)
/* Denotes an void* argument which is passed to the helper, which at
run time will point to the thread's guest state area. This can
only appear at most once in an argument list, and it may not appear
at all in argument lists for clean helper calls. */
-#define IRExprP__BBPTR ((IRExpr*)17)
-static inline Bool is_IRExprP__VECRET_or_BBPTR ( IRExpr* e ) {
- return e == IRExprP__VECRET || e == IRExprP__BBPTR;
+static inline Bool is_IRExpr_VECRET_or_BBPTR ( IRExpr* e ) {
+ return e->tag == Iex_VECRET || e->tag == Iex_BBPTR;
}
@@ -1944,6 +1941,8 @@
extern IRExpr* IRExpr_Const ( IRConst* con );
extern IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args );
extern IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse );
+extern IRExpr* IRExpr_VECRET ( void );
+extern IRExpr* IRExpr_BBPTR ( void );
/* Deep-copy an IRExpr. */
extern IRExpr* deepCopyIRExpr ( IRExpr* );
@@ -2088,10 +2087,10 @@
number of times at a fixed interval, if required.
Normally, code is generated to pass just the args to the helper.
- However, if IRExprP__BBPTR is present in the argument list (at most
+ However, if IRExpr_BBPTR() is present in the argument list (at most
one instance is allowed), then the baseblock pointer is passed for
that arg, so that the callee can access the guest state. It is
- invalid for .nFxState to be zero but IRExprP__BBPTR to be present,
+ invalid for .nFxState to be zero but IRExpr_BBPTR() to be present,
since .nFxState==0 is a claim that the call does not access guest
state.
@@ -2128,8 +2127,8 @@
allowed. */
IRCallee* cee; /* where to call */
IRExpr* guard; /* :: Ity_Bit. Controls whether call happens */
- /* The args vector may contain IRExprP__BBPTR and/or
- IRExprP__VECRET, in both cases, at most once. */
+ /* The args vector may contain IRExpr_BBPTR() and/or
+ IRExpr_VECRET(), in both cases, at most once. */
IRExpr** args; /* arg vector, ends in NULL. */
IRTemp tmp; /* to assign result to, or IRTemp_INVALID if none */
Modified: trunk/priv/ir_opt.c (+7 -7)
===================================================================
--- trunk/priv/ir_opt.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/ir_opt.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -488,7 +488,7 @@
d2->guard = flatten_Expr(bb, d2->guard);
for (i = 0; d2->args[i]; i++) {
IRExpr* arg = d2->args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
d2->args[i] = flatten_Expr(bb, arg);
}
addStmtToIRSB(bb, IRStmt_Dirty(d2));
@@ -2564,7 +2564,7 @@
d2->guard = fold_Expr(env, subst_Expr(env, d2->guard));
for (i = 0; d2->args[i]; i++) {
IRExpr* arg = d2->args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg))) {
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg))) {
vassert(isIRAtom(arg));
d2->args[i] = fold_Expr(env, subst_Expr(env, arg));
}
@@ -2905,7 +2905,7 @@
addUses_Expr(set, d->guard);
for (i = 0; d->args[i] != NULL; i++) {
IRExpr* arg = d->args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
addUses_Expr(set, arg);
}
return;
@@ -4952,7 +4952,7 @@
aoccCount_Expr(uses, d->guard);
for (i = 0; d->args[i]; i++) {
IRExpr* arg = d->args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
aoccCount_Expr(uses, arg);
}
return;
@@ -5324,7 +5324,7 @@
d2->guard = atbSubst_Expr(env, d2->guard);
for (i = 0; d2->args[i]; i++) {
IRExpr* arg = d2->args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
d2->args[i] = atbSubst_Expr(env, arg);
}
return IRStmt_Dirty(d2);
@@ -5351,7 +5351,7 @@
guest state under the covers. It's not allowed, but let's be
extra conservative and assume the worst. */
for (i = 0; d->args[i]; i++) {
- if (UNLIKELY(d->args[i] == IRExprP__BBPTR)) {
+ if (UNLIKELY(d->args[i]->tag == Iex_BBPTR)) {
*requiresPreciseMemExns = True;
return True;
}
@@ -5799,7 +5799,7 @@
vassert(isIRAtom(d->guard));
for (j = 0; d->args[j]; j++) {
IRExpr* arg = d->args[j];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
vassert(isIRAtom(arg));
}
if (d->mFx != Ifx_None)
Modified: trunk/priv/guest_s390_toIR.c (+2 -2)
===================================================================
--- trunk/priv/guest_s390_toIR.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/guest_s390_toIR.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -12874,10 +12874,10 @@
IRDirty *d;
IRTemp cc = newTemp(Ity_I64);
- /* IRExprP__BBPTR => Need to pass pointer to guest state to helper */
+ /* IRExpr_BBPTR() => Need to pass pointer to guest state to helper */
d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
&s390x_dirtyhelper_STFLE,
- mkIRExprVec_2(IRExprP__BBPTR, mkexpr(op2addr)));
+ mkIRExprVec_2(IRExpr_BBPTR(), mkexpr(op2addr)));
d->nFxState = 1;
vex_bzero(&d->fxState, sizeof(d->fxState));
Modified: trunk/priv/ir_defs.c (+43 -41)
===================================================================
--- trunk/priv/ir_defs.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/ir_defs.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -1207,17 +1207,8 @@
vex_printf("(");
for (i = 0; e->Iex.CCall.args[i] != NULL; i++) {
IRExpr* arg = e->Iex.CCall.args[i];
- /* We don't actually expect VECRET or BBPTR here -- BBPTR is
- never allowable; VECRET is in principle allowable but at
- present isn't supported. But they are handled for
- completeness anyway. */
- if (arg == IRExprP__VECRET) {
- vex_printf("VECRET");
- } else if (arg == IRExprP__BBPTR) {
- vex_printf("BBPTR");
- } else {
- ppIRExpr(arg);
- }
+ ppIRExpr(arg);
+
if (e->Iex.CCall.args[i+1] != NULL) {
vex_printf(",");
}
@@ -1234,6 +1225,12 @@
ppIRExpr(e->Iex.ITE.iffalse);
vex_printf(")");
break;
+ case Iex_VECRET:
+ vex_printf("VECRET");
+ break;
+ case Iex_BBPTR:
+ vex_printf("BBPTR");
+ break;
default:
vpanic("ppIRExpr");
}
@@ -1282,13 +1279,8 @@
vex_printf("(");
for (i = 0; d->args[i] != NULL; i++) {
IRExpr* arg = d->args[i];
- if (arg == IRExprP__VECRET) {
- vex_printf("VECRET");
- } else if (arg == IRExprP__BBPTR) {
- vex_printf("BBPTR");
- } else {
- ppIRExpr(arg);
- }
+ ppIRExpr(arg);
+
if (d->args[i+1] != NULL) {
vex_printf(",");
}
@@ -1750,6 +1742,16 @@
e->Iex.ITE.iffalse = iffalse;
return e;
}
+IRExpr* IRExpr_VECRET ( void ) {
+ IRExpr* e = LibVEX_Alloc(sizeof(IRExpr));
+ e->tag = Iex_VECRET;
+ return e;
+}
+IRExpr* IRExpr_BBPTR ( void ) {
+ IRExpr* e = LibVEX_Alloc(sizeof(IRExpr));
+ e->tag = Iex_BBPTR;
+ return e;
+}
/* Constructors for NULL-terminated IRExpr expression vectors,
@@ -2175,6 +2177,12 @@
return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond),
deepCopyIRExpr(e->Iex.ITE.iftrue),
deepCopyIRExpr(e->Iex.ITE.iffalse));
+ case Iex_VECRET:
+ return IRExpr_VECRET();
+
+ case Iex_BBPTR:
+ return IRExpr_BBPTR();
+
default:
vpanic("deepCopyIRExpr");
}
@@ -3341,6 +3349,10 @@
/* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */
case Iex_Binder:
vpanic("typeOfIRExpr: Binder is not a valid expression");
+ case Iex_VECRET:
+ vpanic("typeOfIRExpr: VECRET is not a valid expression");
+ case Iex_BBPTR:
+ vpanic("typeOfIRExpr: BBPTR is not a valid expression");
default:
ppIRExpr(e);
vpanic("typeOfIRExpr");
@@ -3379,14 +3391,11 @@
*/
static inline Bool isIRAtom_or_VECRET_or_BBPTR ( IRExpr* e ) {
- /* Use this rather roundabout scheme so as to try and have the
- number of additional conditional branches be 1 in the common
- (non-VECRET, non-BBPTR) case, rather than 2. */
- if (UNLIKELY(((HWord)e) & 1)) {
- return e == IRExprP__VECRET || e == IRExprP__BBPTR;
- } else {
- return isIRAtom(e);
- }
+ if (isIRAtom(e)) {
+ return True;
+ }
+
+ return UNLIKELY(is_IRExpr_VECRET_or_BBPTR(e));
}
Bool isFlatIRStmt ( IRStmt* st )
@@ -3619,7 +3628,7 @@
case Iex_CCall:
for (i = 0; expr->Iex.CCall.args[i]; i++) {
IRExpr* arg = expr->Iex.CCall.args[i];
- if (UNLIKELY(((HWord)arg) & 1)) {
+ if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) {
/* These aren't allowed in CCall lists. Let's detect
and throw them out here, though, rather than
segfaulting a bit later on. */
@@ -3701,9 +3710,9 @@
d = stmt->Ist.Dirty.details;
for (i = 0; d->args[i] != NULL; i++) {
IRExpr* arg = d->args[i];
- if (UNLIKELY(((HWord)arg) & 1)) {
+ if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg))) {
/* This is ensured by isFlatIRStmt */
- vassert(arg == IRExprP__VECRET || arg == IRExprP__BBPTR);
+ ;
} else {
useBeforeDef_Expr(bb,stmt,arg,def_counts);
}
@@ -3900,7 +3909,7 @@
if (i >= 32)
sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args");
IRExpr* arg = expr->Iex.CCall.args[i];
- if (UNLIKELY(is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(arg)))
sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/BBPTR");
tcExpr(bb,stmt, arg, gWordTy);
}
@@ -4146,17 +4155,10 @@
if (i >= 32)
sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args");
IRExpr* arg = d->args[i];
- if (UNLIKELY(((HWord)arg) & 1)) {
- if (arg == IRExprP__VECRET) {
- nVECRETs++;
- } else
- if (arg == IRExprP__BBPTR) {
- nBBPTRs++;
- } else {
- /* The impossibility of failure is ensured by
- isFlatIRStmt */
- vassert(0);
- }
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
+ nVECRETs++;
+ } else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
+ nBBPTRs++;
} else {
if (typeOfIRExpr(tyenv, arg) == Ity_I1)
sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1");
Modified: trunk/priv/host_arm_isel.c (+13 -13)
===================================================================
--- trunk/priv/host_arm_isel.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/host_arm_isel.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -361,7 +361,7 @@
static
Bool mightRequireFixedRegs ( IRExpr* e )
{
- if (UNLIKELY(is_IRExprP__VECRET_or_BBPTR(e))) {
+ if (UNLIKELY(is_IRExpr_VECRET_or_BBPTR(e))) {
// These are always "safe" -- either a copy of r13(sp) in some
// arbitrary vreg, or a copy of r8, respectively.
return False;
@@ -405,7 +405,7 @@
*retloc = mk_RetLoc_INVALID();
/* These are used for cross-checking that IR-level constraints on
- the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ the use of IRExpr_VECRET() and IRExpr_BBPTR() are observed. */
UInt nVECRETs = 0;
UInt nBBPTRs = 0;
@@ -418,14 +418,14 @@
supported arg types are I32 and I64.
The return type can be I{64,32} or V128. In the V128 case, it
- is expected that |args| will contain the special value
- IRExprP__VECRET, in which case this routine generates code to
+ is expected that |args| will contain the special node
+ IRExpr_VECRET(), in which case this routine generates code to
allocate space on the stack for the vector return value. Since
we are not passing any scalars on the stack, it is enough to
preallocate the return space before marshalling any arguments,
in this case.
- |args| may also contain IRExprP__BBPTR, in which case the
+ |args| may also contain IRExpr_BBPTR(), in which case the
value in r8 is passed as the corresponding argument.
Generating code which is both efficient and correct when
@@ -470,9 +470,9 @@
n_args = 0;
for (i = 0; args[i]; i++) {
IRExpr* arg = args[i];
- if (UNLIKELY(arg == IRExprP__VECRET)) {
+ if (UNLIKELY(arg->tag == Iex_VECRET)) {
nVECRETs++;
- } else if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ } else if (UNLIKELY(arg->tag == Iex_BBPTR)) {
nBBPTRs++;
}
n_args++;
@@ -530,7 +530,7 @@
IRExpr* arg = args[i];
IRType aTy = Ity_INVALID;
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
aTy = typeOfIRExpr(env->type_env, arg);
if (nextArgReg >= ARM_N_ARGREGS)
@@ -561,13 +561,13 @@
addInstr(env, mk_iMOVds_RR( argregs[nextArgReg], raHi ));
nextArgReg++;
}
- else if (arg == IRExprP__BBPTR) {
+ else if (arg->tag == Iex_BBPTR) {
vassert(0); //ATC
addInstr(env, mk_iMOVds_RR( argregs[nextArgReg],
hregARM_R8() ));
nextArgReg++;
}
- else if (arg == IRExprP__VECRET) {
+ else if (arg->tag == Iex_VECRET) {
// If this happens, it denotes ill-formed IR
vassert(0);
}
@@ -587,7 +587,7 @@
IRExpr* arg = args[i];
IRType aTy = Ity_INVALID;
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg)))
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg)))
aTy = typeOfIRExpr(env->type_env, arg);
if (nextArgReg >= ARM_N_ARGREGS)
@@ -610,12 +610,12 @@
tmpregs[nextArgReg] = raHi;
nextArgReg++;
}
- else if (arg == IRExprP__BBPTR) {
+ else if (arg->tag == Iex_BBPTR) {
vassert(0); //ATC
tmpregs[nextArgReg] = hregARM_R8();
nextArgReg++;
}
- else if (arg == IRExprP__VECRET) {
+ else if (arg->tag == Iex_VECRET) {
// If this happens, it denotes ill-formed IR
vassert(0);
}
Modified: trunk/priv/host_amd64_isel.c (+13 -13)
===================================================================
--- trunk/priv/host_amd64_isel.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/host_amd64_isel.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -367,11 +367,11 @@
IRExpr* e )
{
/* Per comments in doHelperCall below, appearance of
- IRExprP__VECRET implies ill-formed IR. */
- vassert(e != IRExprP__VECRET);
+ Iex_VECRET implies ill-formed IR. */
+ vassert(e->tag != Iex_VECRET);
/* In this case we give out a copy of the BaseBlock pointer. */
- if (UNLIKELY(e == IRExprP__BBPTR)) {
+ if (UNLIKELY(e->tag == Iex_BBPTR)) {
return mk_iMOVsd_RR( hregAMD64_RBP(), dst );
}
@@ -443,7 +443,7 @@
*retloc = mk_RetLoc_INVALID();
/* These are used for cross-checking that IR-level constraints on
- the use of IRExprP__VECRET and IRExprP__BBPTR are observed. */
+ the use of IRExpr_VECRET() and IRExpr_BBPTR() are observed. */
UInt nVECRETs = 0;
UInt nBBPTRs = 0;
@@ -457,13 +457,13 @@
The return type can be I{64,32,16,8} or V{128,256}. In the
latter two cases, it is expected that |args| will contain the
- special value IRExprP__VECRET, in which case this routine
+ special node IRExpr_VECRET(), in which case this routine
generates code to allocate space on the stack for the vector
return value. Since we are not passing any scalars on the
stack, it is enough to preallocate the return space before
marshalling any arguments, in this case.
- |args| may also contain IRExprP__BBPTR, in which case the
+ |args| may also contain IRExpr_BBPTR(), in which case the
value in %rbp is passed as the corresponding argument.
Generating code which is both efficient and correct when
@@ -492,7 +492,7 @@
unconditional calls may use the fast scheme, since having to
compute a condition expression could itself trash real
registers. Note that for simplicity, in the case where
- IRExprP__VECRET is present, we use the slow scheme. This is
+ IRExpr_VECRET() is present, we use the slow scheme. This is
motivated by the desire to avoid any possible complexity
w.r.t. nested calls.
@@ -557,15 +557,15 @@
/* FAST SCHEME */
/* In this loop, we process args that can be computed into the
destination (real) register with a single instruction, without
- using any fixed regs. That also includes IRExprP__BBPTR, but
- not IRExprP__VECRET. Indeed, if the IR is well-formed, we can
- never see IRExprP__VECRET at this point, since the return-type
+ using any fixed regs. That also includes IRExpr_BBPTR(), but
+ not IRExpr_VECRET(). Indeed, if the IR is well-formed, we can
+ never see IRExpr_VECRET() at this point, since the return-type
check above should ensure all those cases use the slow scheme
instead. */
vassert(n_args >= 0 && n_args <= 6);
for (i = 0; i < n_args; i++) {
IRExpr* arg = args[i];
- if (LIKELY(!is_IRExprP__VECRET_or_BBPTR(arg))) {
+ if (LIKELY(!is_IRExpr_VECRET_or_BBPTR(arg))) {
vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
}
fastinstrs[i]
@@ -612,12 +612,12 @@
vassert(n_args >= 0 && n_args <= 6);
for (i = 0; i < n_args; i++) {
IRExpr* arg = args[i];
- if (UNLIKELY(arg == IRExprP__BBPTR)) {
+ if (UNLIKELY(arg->tag == Iex_BBPTR)) {
tmpregs[i] = newVRegI(env);
addInstr(env, mk_iMOVsd_RR( hregAMD64_RBP(), tmpregs[i]));
nBBPTRs++;
}
- else if (UNLIKELY(arg == IRExprP__VECRET)) {
+ else if (UNLIKELY(arg->tag == Iex_VECRET)) {
/* We stashed the address of the return slot earlier, so just
retrieve it now. */
vassert(!hregIsInvalid(r_vecRetAddr));
Modified: trunk/priv/guest_ppc_toIR.c (+2 -2)
===================================================================
--- trunk/priv/guest_ppc_toIR.c 2013-08-15 14:38:26 +01:00 (rev 2741)
+++ trunk/priv/guest_ppc_toIR.c 2013-08-15 21:54:52 +01:00 (rev 2742)
@@ -14482,7 +14482,7 @@
IRDirty* d;
UInt vD_off = vectorGuestRegOffset(vD_addr);
IRExpr** args = mkIRExprVec_4(
- IRExprP__BBPTR,
+ IRExpr_BBPTR(),
mkU32(vD_off),
binop(Iop_And32, mkNarrowTo32(ty, mkexpr(EA)),
mkU32(0xF)),
@@ -14516,7 +14516,7 @@
IRDirty* d;
UInt vD_off = vectorGuestRegOffset(vD_addr);
IRExpr** args = mkIRExprVec_4(
- IRExprP__BBPTR,
+ IRExpr_BBPTR(),
mkU32(vD_off),
binop(Iop_And32, mkNarrowTo32(ty, mkexpr(EA)),
mkU32(0xF)),
|
|
From: Florian K. <fl...@ei...> - 2013-08-15 17:34:49
|
Hej, attached patch introduces two new IRExpr kinds: Iex_VECRET and Iex_BBPTR and eliminates IRExprP__VECRET and IRExprP__BBPTR. The rationale is that we want to avoid unexpected segfaults caused by passing IRExprP__(VECRET|BBPTR) to functions that cannot handle them. As we already have a special kind of IRExpr which is only valid in a specific context, namely Iex_Binder, it seems easiest to handle new special IRExprs the same way and piggy-back on it. The patch should fix the problem reported by Maynard Johnson in "Current upstream Valgrind gets SIGSEGV running java". Regtested on x86-64 with no new failures. Florian |
|
From: <sv...@va...> - 2013-08-15 13:48:39
|
dejanj 2013-08-15 14:48:28 +0100 (Thu, 15 Aug 2013)
New Revision: 13497
Log:
mips32: Delete unnecessary exp files.
Removed files:
trunk/none/tests/mips32/MIPS32int.stdout.exp
trunk/none/tests/mips32/MIPS32int.stdout.exp-BE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32
trunk/none/tests/mips32/vfp.stdout.exp
trunk/none/tests/mips32/vfp.stdout.exp-BE
trunk/none/tests/mips32/vfp.stdout.exp-mips32
Deleted: trunk/none/tests/mips32/vfp.stdout.exp-mips32 (+0 -0)
===================================================================
Deleted: trunk/none/tests/mips32/vfp.stdout.exp-BE (+0 -0)
===================================================================
Deleted: trunk/none/tests/mips32/MIPS32int.stdout.exp-BE (+0 -0)
===================================================================
Deleted: trunk/none/tests/mips32/vfp.stdout.exp (+0 -0)
===================================================================
Deleted: trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32 (+0 -0)
===================================================================
Deleted: trunk/none/tests/mips32/MIPS32int.stdout.exp (+0 -0)
===================================================================
|
|
From: <sv...@va...> - 2013-08-15 13:38:33
|
dejanj 2013-08-15 14:38:26 +0100 (Thu, 15 Aug 2013)
New Revision: 2741
Log:
mips32/mips64: Fix compiler warnings.
Fix some compiler warnings when compiling Valgrind for no mips arch.
Modified files:
trunk/priv/host_mips_defs.h
Modified: trunk/priv/host_mips_defs.h (+4 -4)
===================================================================
--- trunk/priv/host_mips_defs.h 2013-08-12 19:01:40 +01:00 (rev 2740)
+++ trunk/priv/host_mips_defs.h 2013-08-15 14:38:26 +01:00 (rev 2741)
@@ -36,12 +36,12 @@
#include "host_generic_regs.h" /* HReg */
/* Num registers used for function calls */
-#if defined(VGP_mips64_linux)
+#if defined(VGP_mips32_linux)
+/* a0, a1, a2, a3 */
+#define MIPS_N_REGPARMS 4
+#else
/* a0, a1, a2, a3, a4, a5, a6, a7 */
#define MIPS_N_REGPARMS 8
-#else
-/* a0, a1, a2, a3 */
-#define MIPS_N_REGPARMS 4
#endif
/* --------- Registers. --------- */
|
|
From: <sv...@va...> - 2013-08-15 13:37:48
|
dejanj 2013-08-15 14:37:29 +0100 (Thu, 15 Aug 2013)
New Revision: 13496
Log:
mips32/mips64: Fix compiler warnings.
Fix some compiler warnings when compiling Valgrind for mips32/mips64.
Clean up exp files for mips32 BE and LE.
Added files:
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-BE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32-LE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-LE
trunk/none/tests/mips32/mips32_dsp.stdout.exp-mips32
trunk/none/tests/mips32/mips32_dspr2.stdout.exp-mips32
trunk/none/tests/mips32/vfp.stdout.exp-mips32-BE
trunk/none/tests/mips32/vfp.stdout.exp-mips32-LE
trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-BE
trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-LE
Modified files:
trunk/coregrind/m_libcsetjmp.c
trunk/coregrind/m_syswrap/syswrap-main.c
trunk/helgrind/tests/annotate_hbefore.c
trunk/none/tests/mips32/LoadStore.c
trunk/none/tests/mips32/LoadStore1.c
trunk/none/tests/mips32/MIPS32int.stdout.exp
trunk/none/tests/mips32/MIPS32int.stdout.exp-BE
trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32
trunk/none/tests/mips32/Makefile.am
trunk/none/tests/mips32/MemCpyTest.c
trunk/none/tests/mips32/mips32_dsp.c
trunk/none/tests/mips32/mips32_dspr2.c
trunk/none/tests/mips32/vfp.c
trunk/none/tests/mips32/vfp.stdout.exp
trunk/none/tests/mips32/vfp.stdout.exp-BE
trunk/none/tests/mips32/vfp.stdout.exp-mips32
Added: trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-BE (+182 -0)
===================================================================
--- trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-BE 2013-08-12 23:17:47 +01:00 (rev 13495)
+++ trunk/none/tests/mips32/vfp.stdout.exp-mips32r2-BE 2013-08-15 14:37:29 +01:00 (rev 13496)
@@ -0,0 +1,182 @@
+LDC1
+ldc1 $f0, 0($t1) :: ft 0x666666664095a266
+ldc1 $f0, 8($t1) :: ft 0x0bff00000
+ldc1 $f0, 16($t1) :: ft 0x03ff00000
+ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b
+ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
+ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580
+ldc1 $f0, 48($t1) :: ft 0xb750e38842026580
+ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e
+ldc1 $f0, 64($t1) :: ft 0x3746f65f3fbf9add
+ldc1 $f0, 0($t1) :: ft 0x666666664095a266
+ldc1 $f0, 8($t1) :: ft 0x0bff00000
+ldc1 $f0, 16($t1) :: ft 0x03ff00000
+ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b
+ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
+ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580
+ldc1 $f0, 48($t1) :: ft 0xb750e38842026580
+ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e
+ldc1 $f0, 0($t1) :: ft 0x666666664095a266
+ldc1 $f0, 8($t1) :: ft 0x0bff00000
+ldc1 $f0, 16($t1) :: ft 0x03ff00000
+ldc1 $f0, 24($t1) :: ft 0x262d2d2a252a2e2b
+ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
+ldc1 $f0, 40($t1) :: ft 0xb487e5c941d26580
+ldc1 $f0, 48($t1) :: ft 0xb750e38842026580
+ldc1 $f0, 56($t1) :: ft 0xe2308c3a3e45798e
+ldc1 $f0, 64($t1) :: ft 0x3746f65f3fbf9add
+ldc1 $f0, 0($t1) :: ft 0x666666664095a266
+LWC1
+lwc1 $f0, 0($t1) :: ft 0x4095a266
+lwc1 $f0, 4($t1) :: ft 0x66666666
+lwc1 $f0, 8($t1) :: ft 0xbff00000
+lwc1 $f0, 12($t1) :: ft 0x0
+lwc1 $f0, 16($t1) :: ft 0x3ff00000
+lwc1 $f0, 20($t1) :: ft 0x0
+lwc1 $f0, 24($t1) :: ft 0x252a2e2b
+lwc1 $f0, 28($t1) :: ft 0x262d2d2a
+lwc1 $f0, 32($t1) :: ft 0xffffffff
+lwc1 $f0, 36($t1) :: ft 0xffffffff
+lwc1 $f0, 40($t1) :: ft 0x41d26580
+lwc1 $f0, 44($t1) :: ft 0xb487e5c9
+lwc1 $f0, 48($t1) :: ft 0x42026580
+lwc1 $f0, 52($t1) :: ft 0xb750e388
+lwc1 $f0, 56($t1) :: ft 0x3e45798e
+lwc1 $f0, 60($t1) :: ft 0xe2308c3a
+lwc1 $f0, 64($t1) :: ft 0x3fbf9add
+lwc1 $f0, 0($t1) :: ft 0x4095a266
+lwc1 $f0, 8($t1) :: ft 0xbff00000
+lwc1 $f0, 16($t1) :: ft 0x3ff00000
+lwc1 $f0, 24($t1) :: ft 0x252a2e2b
+lwc1 $f0, 32($t1) :: ft 0xffffffff
+lwc1 $f0, 40($t1) :: ft 0x41d26580
+lwc1 $f0, 48($t1) :: ft 0x42026580
+lwc1 $f0, 56($t1) :: ft 0x3e45798e
+lwc1 $f0, 64($t1) :: ft 0x3fbf9add
+lwc1 $f0, 0($t1) :: ft 0x4095a266
+LWXC1
+lwxc1 $f0, $a3($v0) :: ft 0x4095a266
+lwxc1 $f0, $a3($v0) :: ft 0x66666666
+lwxc1 $f0, $a3($v0) :: ft 0xbff00000
+lwxc1 $f0, $a3($v0) :: ft 0x0
+lwxc1 $f0, $a3($v0) :: ft 0x3ff00000
+lwxc1 $f0, $a3($v0) :: ft 0x0
+lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b
+lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a
+lwxc1 $f0, $a3($v0) :: ft 0xffffffff
+lwxc1 $f0, $a3($v0) :: ft 0xffffffff
+lwxc1 $f0, $a3($v0) :: ft 0x41d26580
+lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9
+lwxc1 $f0, $a3($v0) :: ft 0x42026580
+lwxc1 $f0, $a3($v0) :: ft 0xb750e388
+lwxc1 $f0, $a3($v0) :: ft 0x3e45798e
+lwxc1 $f0, $a3($v0) :: ft 0xe2308c3a
+lwxc1 $f0, $a3($v0) :: ft 0x3fbf9add
+lwxc1 $f0, $a3($v0) :: ft 0x4095a266
+lwxc1 $f0, $a3($v0) :: ft 0x66666666
+lwxc1 $f0, $a3($v0) :: ft 0xbff00000
+lwxc1 $f0, $a3($v0) :: ft 0x0
+lwxc1 $f0, $a3($v0) :: ft 0x3ff00000
+lwxc1 $f0, $a3($v0) :: ft 0x0
+lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b
+lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a
+lwxc1 $f0, $a3($v0) :: ft 0xffffffff
+lwxc1 $f0, $a3($v0) :: ft 0xffffffff
+lwxc1 $f0, $a3($v0) :: ft 0x41d26580
+lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9
+lwxc1 $f0, $a3($v0) :: ft 0x42026580
+lwxc1 $f0, $a3($v0) :: ft 0xb750e388
+lwxc1 $f0, $a3($v0) :: ft 0x3e45798e
+LDXC1
+ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b
+ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff
+ldxc1 $f0, $a3($v0) :: ft lo: 0xb487e5c9, ft hi: 0x41d26580
+ldxc1 $f0, $a3($v0) :: ft lo: 0xb750e388, ft hi: 0x42026580
+ldxc1 $f0, $a3($v0) :: ft lo: 0xe2308c3a, ft hi: 0x3e45798e
+ldxc1 $f0, $a3($v0) :: ft lo: 0x3746f65f, ft hi: 0x3fbf9add
+ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b
+ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff
+ldxc1 $f0, $a3($v0) :: ft lo: 0xb487e5c9, ft hi: 0x41d26580
+ldxc1 $f0, $a3($v0) :: ft lo: 0xb750e388, ft hi: 0x42026580
+ldxc1 $f0, $a3($v0) :: ft lo: 0xe2308c3a, ft hi: 0x3e45798e
+ldxc1 $f0, $a3($v0) :: ft lo: 0x3746f65f, ft hi: 0x3fbf9add
+ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b
+ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff
+ldxc1 $f0, $a3($v0) :: ft lo: 0xb487e5c9, ft hi: 0x41d26580
+ldxc1 $f0, $a3($v0) :: ft lo: 0xb750e388, ft hi: 0x42026580
+ldxc1 $f0, $a3($v0) :: ft lo: 0xe2308c3a, ft hi: 0x3e45798e
+ldxc1 $f0, $a3($v0) :: ft lo: 0x3746f65f, ft hi: 0x3fbf9add
+ldxc1 $f0, $a3($v0) :: ft lo: 0x66666666, ft hi: 0x4095a266
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0xbff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x0, ft hi: 0x3ff00000
+ldxc1 $f0, $a3($v0) :: ft lo: 0x262d2d2a, ft hi: 0x252a2e2b
+ldxc1 $f0, $a3($v0) :: ft lo: 0xffffffff, ft hi: 0xffffffff
+SDC1
+sdc1 $f0, 0($t0) :: out: 0x0
+sdc1 $f0, 0($t0) :: out: 0x407c83fb
+sdc1 $f0, 0($t0) :: out: 0x40080000
+sdc1 $f0, 0($t0) :: out: 0xbff00000
+sdc1 $f0, 0($t0) :: out: 0x4095a266
+sdc1 $f0, 0($t0) :: out: 0xc01d2da3
+sdc1 $f0, 0($t0) :: out: 0x41cdcd65
+sdc1 $f0, 0($t0) :: out: 0xc0b69a78
+sdc1 $f0, 0($t0) :: out: 0x409b6000
+MEM1:
+0.000000, 456.248956, 3.000000, -1.000000
+1384.600000, -7.294568, 1000000000.000000, -5786.470000
+1752.000000, 0.000000, 0.000000, 0.000000
+0.000000, 0.000000, 0.000000, 0.000000
+SDXC1
+sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0
+sdc1 $f0, #t2($t0) :: out: 0x407c83fb : out1: 0xb97f122f
+sdc1 $f0, #t2($t0) :: out: 0x40080000 : out1: 0x0
+sdc1 $f0, #t2($t0) :: out: 0xbff00000 : out1: 0x0
+sdc1 $f0, #t2($t0) :: out: 0x4095a266 : out1: 0x66666666
+sdc1 $f0, #t2($t0) :: out: 0xc01d2da3 : out1: 0x2101d847
+sdc1 $f0, #t2($t0) :: out: 0x41cdcd65 : out1: 0x0
+sdc1 $f0, #t2($t0) :: out: 0xc0b69a78 : out1: 0x51eb851f
+sdc1 $f0, #t2($t0) :: out: 0x409b6000 : out1: 0x0
+MEM1:
+0.000000, 456.248956, 3.000000, -1.000000
+1384.600000, -7.294568, 1000000000.000000, -5786.470000
+1752.000000, 0.000000, 0.000000, 0.000000
+0.000000, 0.000000, 0.000000, 0.000000
+SWC1
+swc1 $f0, 0($t0) :: out: 0x0
+swc1 $f0, 0($t0) :: out: 0x40400000
+swc1 $f0, 0($t0) :: out: 0x44ad1333
+swc1 $f0, 0($t0) :: out: 0x4e6e6b28
+swc1 $f0, 0($t0) :: out: 0x44db0000
+swc1 $f0, 0($t0) :: out: 0x322bcc77
+swc1 $f0, 0($t0) :: out: 0xc732da7a
+swc1 $f0, 0($t0) :: out: 0x42080079
+swc1 $f0, 0($t0) :: out: 0x49d5e008
+MEM1:
+0.000000, 0.000000, 3.000000, 0.000000
+1384.599976, 0.000000, 1000000000.000000, 0.000000
+1752.000000, 0.000000, 0.000000, 0.000000
+-45786.476562, 0.000000, 34.000462, 0.000000
+SWXC1
+swxc1 $f0, 0($t0) :: out: 0x0
+swxc1 $f0, 0($t0) :: out: 0x40400000
+swxc1 $f0, 0($t0) :: out: 0x44ad1333
+swxc1 $f0, 0($t0) :: out: 0x4e6e6b28
+swxc1 $f0, 0($t0) :: out: 0x44db0000
+swxc1 $f0, 0($t0) :: out: 0x322bcc77
+swxc1 $f0, 0($t0) :: out: 0xc732da7a
+swxc1 $f0, 0($t0) :: out: 0x42080079
+swxc1 $f0, 0($t0) :: out: 0x49d5e008
+MEM1:
+0.000000, 0.000000, 3.000000, 0.000000
+1384.599976, 0.000000, 1000000000.000000, 0.000000
+1752.000000, 0.000000, 0.000000, 0.000000
+-45786.476562, 0.000000, 34.000462, 0.000000
Modified: trunk/none/tests/mips32/vfp.stdout.exp (+0 -182)
===================================================================
--- trunk/none/tests/mips32/vfp.stdout.exp 2013-08-12 23:17:47 +01:00 (rev 13495)
+++ trunk/none/tests/mips32/vfp.stdout.exp 2013-08-15 14:37:29 +01:00 (rev 13496)
@@ -1,182 +0,0 @@
-LDC1
-ldc1 $f0, 0($t1) :: ft 0x4095a26666666666
-ldc1 $f0, 8($t1) :: ft 0xbff000000
-ldc1 $f0, 16($t1) :: ft 0x3ff000000
-ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a
-ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
-ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9
-ldc1 $f0, 48($t1) :: ft 0x42026580b750e388
-ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a
-ldc1 $f0, 64($t1) :: ft 0x3fbf9add3746f65f
-ldc1 $f0, 0($t1) :: ft 0x4095a26666666666
-ldc1 $f0, 8($t1) :: ft 0xbff000000
-ldc1 $f0, 16($t1) :: ft 0x3ff000000
-ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a
-ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
-ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9
-ldc1 $f0, 48($t1) :: ft 0x42026580b750e388
-ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a
-ldc1 $f0, 0($t1) :: ft 0x4095a26666666666
-ldc1 $f0, 8($t1) :: ft 0xbff000000
-ldc1 $f0, 16($t1) :: ft 0x3ff000000
-ldc1 $f0, 24($t1) :: ft 0x252a2e2b262d2d2a
-ldc1 $f0, 32($t1) :: ft 0xffffffffffffffff
-ldc1 $f0, 40($t1) :: ft 0x41d26580b487e5c9
-ldc1 $f0, 48($t1) :: ft 0x42026580b750e388
-ldc1 $f0, 56($t1) :: ft 0x3e45798ee2308c3a
-ldc1 $f0, 64($t1) :: ft 0x3fbf9add3746f65f
-ldc1 $f0, 0($t1) :: ft 0x4095a26666666666
-LWC1
-lwc1 $f0, 0($t1) :: ft 0x4095a266
-lwc1 $f0, 4($t1) :: ft 0x66666666
-lwc1 $f0, 8($t1) :: ft 0xbff00000
-lwc1 $f0, 12($t1) :: ft 0x0
-lwc1 $f0, 16($t1) :: ft 0x3ff00000
-lwc1 $f0, 20($t1) :: ft 0x0
-lwc1 $f0, 24($t1) :: ft 0x252a2e2b
-lwc1 $f0, 28($t1) :: ft 0x262d2d2a
-lwc1 $f0, 32($t1) :: ft 0xffffffff
-lwc1 $f0, 36($t1) :: ft 0xffffffff
-lwc1 $f0, 40($t1) :: ft 0x41d26580
-lwc1 $f0, 44($t1) :: ft 0xb487e5c9
-lwc1 $f0, 48($t1) :: ft 0x42026580
-lwc1 $f0, 52($t1) :: ft 0xb750e388
-lwc1 $f0, 56($t1) :: ft 0x3e45798e
-lwc1 $f0, 60($t1) :: ft 0xe2308c3a
-lwc1 $f0, 64($t1) :: ft 0x3fbf9add
-lwc1 $f0, 0($t1) :: ft 0x4095a266
-lwc1 $f0, 8($t1) :: ft 0xbff00000
-lwc1 $f0, 16($t1) :: ft 0x3ff00000
-lwc1 $f0, 24($t1) :: ft 0x252a2e2b
-lwc1 $f0, 32($t1) :: ft 0xffffffff
-lwc1 $f0, 40($t1) :: ft 0x41d26580
-lwc1 $f0, 48($t1) :: ft 0x42026580
-lwc1 $f0, 56($t1) :: ft 0x3e45798e
-lwc1 $f0, 64($t1) :: ft 0x3fbf9add
-lwc1 $f0, 0($t1) :: ft 0x4095a266
-LWXC1
-lwxc1 $f0, $a3($v0) :: ft 0x4095a266
-lwxc1 $f0, $a3($v0) :: ft 0x66666666
-lwxc1 $f0, $a3($v0) :: ft 0xbff00000
-lwxc1 $f0, $a3($v0) :: ft 0x0
-lwxc1 $f0, $a3($v0) :: ft 0x3ff00000
-lwxc1 $f0, $a3($v0) :: ft 0x0
-lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b
-lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a
-lwxc1 $f0, $a3($v0) :: ft 0xffffffff
-lwxc1 $f0, $a3($v0) :: ft 0xffffffff
-lwxc1 $f0, $a3($v0) :: ft 0x41d26580
-lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9
-lwxc1 $f0, $a3($v0) :: ft 0x42026580
-lwxc1 $f0, $a3($v0) :: ft 0xb750e388
-lwxc1 $f0, $a3($v0) :: ft 0x3e45798e
-lwxc1 $f0, $a3($v0) :: ft 0xe2308c3a
-lwxc1 $f0, $a3($v0) :: ft 0x3fbf9add
-lwxc1 $f0, $a3($v0) :: ft 0x4095a266
-lwxc1 $f0, $a3($v0) :: ft 0x66666666
-lwxc1 $f0, $a3($v0) :: ft 0xbff00000
-lwxc1 $f0, $a3($v0) :: ft 0x0
-lwxc1 $f0, $a3($v0) :: ft 0x3ff00000
-lwxc1 $f0, $a3($v0) :: ft 0x0
-lwxc1 $f0, $a3($v0) :: ft 0x252a2e2b
-lwxc1 $f0, $a3($v0) :: ft 0x262d2d2a
-lwxc1 $f0, $a3($v0) :: ft 0xffffffff
-lwxc1 $f0, $a3($v0) :: ft 0xffffffff
-lwxc1 $f0, $a3($v0) :: ft 0x41d26580
-lwxc1 $f0, $a3($v0) :: ft 0xb487e5c9
-lwxc1 $f0, $a3($v0) :: ft 0x42026580
-lwxc1 $f0, $a3($v0) :: ft 0xb750e388
-lwxc1 $f0, $a3($v0) :: ft 0x3e45798e
-LDXC1
-ldxc1 $f0, $a3($v0) :: ft 0x4095a266
-ldxc1 $f0, $a3($v0) :: ft 0xbff00000
-ldxc1 $f0, $a3($v0) :: ft 0x3ff00000
-ldxc1 $f0, $a3($v0) :: ft 0x252a2e2b
-ldxc1 $f0, $a3($v0) :: ft 0xffffffff
-ldxc1 $f0, $a3($v0) :: ft 0x41d26580
-ldxc1 $f0, $a3($v0) :: ft 0x42026580
-ldxc1 $f0, $a3($v0) :: ft 0x3e45798e
-ldxc1 $f0, $a3($v0) :: ft 0x3fbf9add
-ldxc1 $f0, $a3($v0) :: ft 0x4095a266
-ldxc1 $f0, $a3($v0) :: ft 0xbff00000
-ldxc1 $f0, $a3($v0) :: ft 0x3ff00000
-ldxc1 $f0, $a3($v0) :: ft 0x252a2e2b
-ldxc1 $f0, $a3($v0) :: ft 0xffffffff
-ldxc1 $f0, $a3($v0) :: ft 0x41d26580
-ldxc1 $f0, $a3($v0) :: ft 0x42026580
-ldxc1 $f0, $a3($v0) :: ft 0x3e45798e
-ldxc1 $f0, $a3($v0) :: ft 0x3fbf9add
-ldxc1 $f0, $a3($v0) :: ft 0x4095a266
-ldxc1 $f0, $a3($v0) :: ft 0xbff00000
-ldxc1 $f0, $a3($v0) :: ft 0x3ff00000
-ldxc1 $f0, $a3($v0) :: ft 0x252a2e2b
-ldxc1 $f0, $a3($v0) :: ft 0xffffffff
-ldxc1 $f0, $a3($v0) :: ft 0x41d26580
-ldxc1 $f0, $a3($v0) :: ft 0x42026580
-ldxc1 $f0, $a3($v0) :: ft 0x3e45798e
-ldxc1 $f0, $a3($v0) :: ft 0x3fbf9add
-ldxc1 $f0, $a3($v0) :: ft 0x4095a266
-ldxc1 $f0, $a3($v0) :: ft 0xbff00000
-ldxc1 $f0, $a3($v0) :: ft 0x3ff00000
-ldxc1 $f0, $a3($v0) :: ft 0x252a2e2b
-ldxc1 $f0, $a3($v0) :: ft 0xffffffff
-SDC1
-sdc1 $f0, 0($t0) :: out: 0x0
-sdc1 $f0, 0($t0) :: out: 0xb97f122f
-sdc1 $f0, 0($t0) :: out: 0x0
-sdc1 $f0, 0($t0) :: out: 0x0
-sdc1 $f0, 0($t0) :: out: 0x66666666
-sdc1 $f0, 0($t0) :: out: 0x2101d847
-sdc1 $f0, 0($t0) :: out: 0x0
-sdc1 $f0, 0($t0) :: out: 0x51eb851f
-sdc1 $f0, 0($t0) :: out: 0x0
-MEM1:
-0.000000, 456.248956, 3.000000, -1.000000
-1384.600000, -7.294568, 1000000000.000000, -5786.470000
-1752.000000, 0.000000, 0.000000, 0.000000
-0.000000, 0.000000, 0.000000, 0.000000
-SDXC1
-sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x0
-sdc1 $f0, #t2($t0) :: out: 0xb97f122f : out1: 0x407c83fb
-sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x40080000
-sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0xbff00000
-sdc1 $f0, #t2($t0) :: out: 0x66666666 : out1: 0x4095a266
-sdc1 $f0, #t2($t0) :: out: 0x2101d847 : out1: 0xc01d2da3
-sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x41cdcd65
-sdc1 $f0, #t2($t0) :: out: 0x51eb851f : out1: 0xc0b69a78
-sdc1 $f0, #t2($t0) :: out: 0x0 : out1: 0x409b6000
-MEM1:
-0.000000, 456.248956, 3.000000, -1.000000
-1384.600000, -7.294568, 1000000000.000000, -5786.470000
-1752.000000, 0.000000, 0.000000, 0.000000
-0.000000, 0.000000, 0.000000, 0.000000
-SWC1
-swc1 $f0, 0($t0) :: out: 0x0
-swc1 $f0, 0($t0) :: out: 0x40400000
-swc1 $f0, 0($t0) :: out: 0x44ad1333
-swc1 $f0, 0($t0) :: out: 0x4e6e6b28
-swc1 $f0, 0($t0) :: out: 0x44db0000
-swc1 $f0, 0($t0) :: out: 0x322bcc77
-swc1 $f0, 0($t0) :: out: 0xc732da7a
-swc1 $f0, 0($t0) :: out: 0x42080079
-swc1 $f0, 0($t0) :: out: 0x49d5e008
-MEM1:
-0.000000, 0.000000, 3.000000, 0.000000
-1384.599976, 0.000000, 1000000000.000000, 0.000000
-1752.000000, 0.000000, 0.000000, 0.000000
--45786.476562, 0.000000, 34.000462, 0.000000
-SWXC1
-swxc1 $f0, 0($t0) :: out: 0x0
-swxc1 $f0, 0($t0) :: out: 0x40400000
-swxc1 $f0, 0($t0) :: out: 0x44ad1333
-swxc1 $f0, 0($t0) :: out: 0x4e6e6b28
-swxc1 $f0, 0($t0) :: out: 0x44db0000
-swxc1 $f0, 0($t0) :: out: 0x322bcc77
-swxc1 $f0, 0($t0) :: out: 0xc732da7a
-swxc1 $f0, 0($t0) :: out: 0x42080079
-swxc1 $f0, 0($t0) :: out: 0x49d5e008
-MEM1:
-0.000000, 0.000000, 3.000000, 0.000000
-1384.599976, 0.000000, 1000000000.000000, 0.000000
-1752.000000, 0.000000, 0.000000, 0.000000
--45786.476562, 0.000000, 34.000462, 0.000000
Modified: trunk/coregrind/m_syswrap/syswrap-main.c (+2 -2)
===================================================================
--- trunk/coregrind/m_syswrap/syswrap-main.c 2013-08-12 23:17:47 +01:00 (rev 13495)
+++ trunk/coregrind/m_syswrap/syswrap-main.c 2013-08-15 14:37:29 +01:00 (rev 13496)
@@ -2045,7 +2045,7 @@
if (p[0] != 0x0c || p[1] != 0x00 || p[2] != 0x00 || p[3] != 0x00)
VG_(message)(Vg_DebugMsg,
"?! restarting over syscall at %#llx %02x %02x %02x %02x\n",
- arch->vex.guest_PC, p[0], p[1], p[2], p[3]);
+ (ULong)arch->vex.guest_PC, p[0], p[1], p[2], p[3]);
vg_assert(p[0] == 0x0c && p[1] == 0x00 && p[2] == 0x00 && p[3] == 0x00);
# elif defined (VG_BIGENDIAN)
@@ -2052,7 +2052,7 @@
if (p[0] != 0x00 || p[1] != 0x00 || p[2] != 0x00 || p[3] != 0x0c)
VG_(message)(Vg_DebugMsg,
"?! restarting over syscall at %#llx %02x %02x %02x %02x\n",
- arch->vex.guest_PC, p[0], p[1], p[2], p[3]);
+ (ULong)arch->vex.guest_PC, p[0], p[1], p[2], p[3]);
vg_assert(p[0] == 0x00 && p[1] == 0x00 && p[2] == 0x00 && p[3] == 0x0c);
# else
Added: trunk/none/tests/mips32/mips32_dspr2.stdout.exp-mips32 (+0 -0)
===================================================================
Added: trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE (+1593 -0)
===================================================================
--- trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE 2013-08-12 23:17:47 +01:00 (rev 13495)
+++ trunk/none/tests/mips32/MIPS32int.stdout.exp-mips32r2-BE 2013-08-15 14:37:29 +01:00 (rev 13496)
@@ -0,0 +1,1593 @@
+ADD
+add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
+add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
+add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
+add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
+add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
+add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
+add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
+add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
+add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
+add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
+add $t0, $t1, $t2 :: rd 0x80000000 rs 0x00000000, rt 0x80000000
+add $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
+ADDI
+addi $t0, $t1, 0 :: rt 0x00000000 rs 0x00000000, imm 0x00000000
+addi $t0, $t1, 1 :: rt 0x00000001 rs 0x00000000, imm 0x00000001
+addi $t0, $t1, 1 :: rt 0x00000002 rs 0x00000001, imm 0x00000000
+addi $t0, $t1, 1 :: rt 0x00000002 rs 0x00000001, imm 0x00000001
+addi $t0, $t1, -1 :: rt 0xffffffff rs 0x00000000, imm 0xffffffff
+addi $t0, $t1, -1 :: rt 0x00000000 rs 0x00000001, imm 0xffffffff
+addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
+addi $t0, $t1, 0 :: rt 0xffffffff rs 0xffffffff, imm 0x00000000
+addi $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
+ADDIU
+addiu $t0, $t1, 0 :: rt 0x00000000 rs 0x00000000, imm 0x00000000
+addiu $t0, $t1, 1 :: rt 0x00000001 rs 0x00000000, imm 0x00000001
+addiu $t0, $t1, 1 :: rt 0x00000002 rs 0x00000001, imm 0x00000000
+addiu $t0, $t1, 1 :: rt 0x00000002 rs 0x00000001, imm 0x00000001
+addiu $t0, $t1, -1 :: rt 0xffffffff rs 0x00000000, imm 0xffffffff
+addiu $t0, $t1, -1 :: rt 0x00000000 rs 0x00000001, imm 0xffffffff
+addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
+addiu $t0, $t1, 0 :: rt 0xffffffff rs 0xffffffff, imm 0x00000000
+addiu $t0, $t1, 0 :: rt 0x80000000 rs 0x80000000, imm 0x00000000
+ADDU
+addu $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
+addu $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
+addu $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
+addu $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
+addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
+addu $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
+addu $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
+addu $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
+addu $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
+addu $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
+addu $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
+addu $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
+addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
+addu $t0, $t1, $t2 :: rd 0x80000000 rs 0x00000000, rt 0x80000000
+addu $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
+addu $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0x80000000
+addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x7fffffff, rt 0x80000000
+addu $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0x7fffffff
+addu $t0, $t1, $t2 :: rd 0xfffffffe rs 0x7fffffff, rt 0x7fffffff
+AND
+and $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xffffffff
+and $t0, $t1, $t2 :: rd 0x20004800 rs 0x31415927, rt 0xee00ee00
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0xffffffff, rt 0x00000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
+and $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xffffffff
+and $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x00000000
+and $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x80000000
+and $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xff000000
+and $t0, $t1, $t2 :: rd 0x0dd00000 rs 0x7fffffff, rt 0x0dd00000
+and $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xffffffff
+and $t0, $t1, $t2 :: rd 0x20004800 rs 0x31415927, rt 0xee00ee00
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0x00000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0xffffffff, rt 0x00000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0xffffffff
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x80000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0x00000000
+and $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
+and $t0, $t1, $t2 :: rd 0x00000000 rs 0x7fffffff, rt 0x80000000
+and $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xff000000
+and $t0, $t1, $t2 :: rd 0x0dd00000 rs 0x7fffffff, rt 0x0dd00000
+ANDI
+andi $t0, $t1, 1 :: rt 0x00000000 rs 0x00000000, imm 0x00000001
+andi $t0, $t1, 0 :: rt 0x00000000 rs 0x00000001, imm 0x00000000
+andi $t0, $t1, 1 :: rt 0x00000001 rs 0x00000001, imm 0x00000001
+andi $t0, $t1, 1 :: rt 0x00000001 rs 0x7fffffff, imm 0x00000000
+andi $t0, $t1, 0 :: rt 0x00000000 rs 0x80000000, imm 0x00000000
+andi $t0, $t1, 0x3145 :: rt 0x00003145 rs 0xffffffff, imm 0x00003145
+CLO
+clo $t0, $t1 :: rd 0x00000000 rs 0x00000000
+clo $t0, $t1 :: rd 0x00000000 rs 0x00000001
+clo $t0, $t1 :: rd 0x00000000 rs 0x00000010
+clo $t0, $t1 :: rd 0x00000020 rs 0xffffffff
+CLZ
+clz $t0, $t1 :: rd 0x00000020 rs 0x00000000
+clz $t0, $t1 :: rd 0x0000001f rs 0x00000001
+clz $t0, $t1 :: rd 0x0000001b rs 0x00000010
+clz $t0, $t1 :: rd 0x00000000 rs 0xffffffff
+DIV
+div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
+div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
+div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
+div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff
+div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
+DIVU
+divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
+divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
+divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
+divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
+divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
+divu $t0, $t1 :: rs 0x00000000 rt 0x00000002 HI 0x00000000 LO 0x00000000
+EXT
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000001
+ext $t0, $t1, 0, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000002 rs 0x98765432, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000002 rs 0x98765432, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000002 rs 0x98765432, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000002 rs 0x98765432, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 4 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000004
+ext $t0, $t1, 0, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 16 :: rt 0x00005421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ext $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0x98765432, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0x98765432, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0x98765432, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000001 rs 0x98765432, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000004, size 0x00000001
+ext $t0, $t1, 4, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000003 rs 0x98765432, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000002 rs 0xff865421, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000003 rs 0x98765432, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000002 rs 0xff865421, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000003 rs 0x98765432, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000002 rs 0xff865421, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000003 rs 0x98765432, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 4 :: rt 0x00000002 rs 0xff865421, pos 0x00000004, size 0x00000004
+ext $t0, $t1, 4, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006543 rs 0x98765432, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006542 rs 0xff865421, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006543 rs 0x98765432, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006542 rs 0xff865421, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006543 rs 0x98765432, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006542 rs 0xff865421, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006543 rs 0x98765432, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 16 :: rt 0x00006542 rs 0xff865421, pos 0x00000004, size 0x00000010
+ext $t0, $t1, 4, 28 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0fffffff rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x09876543 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0ff86542 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0fffffff rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x09876543 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0ff86542 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0fffffff rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x09876543 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0ff86542 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0fffffff rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x09876543 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 4, 28 :: rt 0x0ff86542 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 1 :: rt 0x00000000 rs 0xff865421, pos 0x00000001, size 0x00000010
+ext $t0, $t1, 16, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0x98765432, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0xff865421, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0x98765432, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0xff865421, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0x98765432, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0xff865421, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0x98765432, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 4 :: rt 0x00000006 rs 0xff865421, pos 0x00000010, size 0x00000004
+ext $t0, $t1, 16, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00009876 rs 0x98765432, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ff86 rs 0xff865421, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00009876 rs 0x98765432, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ff86 rs 0xff865421, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00009876 rs 0x98765432, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ff86 rs 0xff865421, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x00009876 rs 0x98765432, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 16, 16 :: rt 0x0000ff86 rs 0xff865421, pos 0x00000010, size 0x00000010
+ext $t0, $t1, 31, 1 :: rt 0x00000000 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xff865421, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000000 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xff865421, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000000 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xff865421, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000000 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ext $t0, $t1, 31, 1 :: rt 0x00000001 rs 0xff865421, pos 0x0000001f, size 0x00000001
+INS
+ins $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xfffffffe rs 0x00000000, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xfffffffe rs 0x98765432, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xffffffff rs 0xff865421, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x98765432 rs 0x00000000, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x98765433 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0x98765433 rs 0xff865421, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xff865420 rs 0x00000000, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xff865421 rs 0xffffffff, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xff865420 rs 0x98765432, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 1 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000001
+ins $t0, $t1, 0, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x0000000f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x00000002 rs 0x98765432, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x00000001 rs 0xff865421, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xfffffff0 rs 0x00000000, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xfffffff2 rs 0x98765432, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xfffffff1 rs 0xff865421, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x98765430 rs 0x00000000, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x9876543f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0x98765431 rs 0xff865421, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xff865420 rs 0x00000000, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xff86542f rs 0xffffffff, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xff865422 rs 0x98765432, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 4 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000004
+ins $t0, $t1, 0, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x0000ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x00005432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x00005421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xffff0000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xffff5432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xffff5421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x98760000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x9876ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0x98765421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xff860000 rs 0x00000000, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xff86ffff rs 0xffffffff, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xff865432 rs 0x98765432, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 16 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000010
+ins $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x00000000 rs 0x00000000, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xffffffff rs 0xffffffff, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0x98765432 rs 0x98765432, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 0, 32 :: rt 0xff865421 rs 0xff865421, pos 0x00000000, size 0x00000020
+ins $t0, $t1, 4, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x00000010 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x00000010 rs 0xff865421, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xffffffef rs 0x00000000, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xffffffff rs 0xffffffff, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xffffffef rs 0x98765432, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xffffffff rs 0xff865421, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x98765422 rs 0x00000000, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x98765432 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x98765422 rs 0x98765432, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0x98765432 rs 0xff865421, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xff865421 rs 0x00000000, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xff865431 rs 0xffffffff, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xff865421 rs 0x98765432, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 1 :: rt 0xff865431 rs 0xff865421, pos 0x00000004, size 0x00000001
+ins $t0, $t1, 4, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x000000f0 rs 0xffffffff, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x00000020 rs 0x98765432, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x00000010 rs 0xff865421, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xffffff0f rs 0x00000000, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xffffffff rs 0xffffffff, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xffffff2f rs 0x98765432, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xffffff1f rs 0xff865421, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x98765402 rs 0x00000000, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x987654f2 rs 0xffffffff, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x98765422 rs 0x98765432, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0x98765412 rs 0xff865421, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xff865401 rs 0x00000000, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xff8654f1 rs 0xffffffff, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xff865421 rs 0x98765432, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 4 :: rt 0xff865411 rs 0xff865421, pos 0x00000004, size 0x00000004
+ins $t0, $t1, 4, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x000ffff0 rs 0xffffffff, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x00054320 rs 0x98765432, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x00054210 rs 0xff865421, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xfff0000f rs 0x00000000, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xffffffff rs 0xffffffff, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xfff5432f rs 0x98765432, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xfff5421f rs 0xff865421, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x98700002 rs 0x00000000, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x987ffff2 rs 0xffffffff, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x98754322 rs 0x98765432, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0x98754212 rs 0xff865421, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xff800001 rs 0x00000000, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xff8ffff1 rs 0xffffffff, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xff854321 rs 0x98765432, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 16 :: rt 0xff854211 rs 0xff865421, pos 0x00000004, size 0x00000010
+ins $t0, $t1, 4, 28 :: rt 0x00000000 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xfffffff0 rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x87654320 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xf8654210 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x0000000f rs 0x00000000, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xffffffff rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x8765432f rs 0x98765432, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xf865421f rs 0xff865421, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x00000002 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xfffffff2 rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x87654322 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xf8654212 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x00000001 rs 0x00000000, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xfffffff1 rs 0xffffffff, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0x87654321 rs 0x98765432, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 4, 28 :: rt 0xf8654211 rs 0xff865421, pos 0x00000004, size 0x0000001c
+ins $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x00000000, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x00010000 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x00000000 rs 0x98765432, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x00010000 rs 0xff865421, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xfffeffff rs 0x00000000, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xffffffff rs 0xffffffff, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xfffeffff rs 0x98765432, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xffffffff rs 0xff865421, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x98765432 rs 0x00000000, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x98775432 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x98765432 rs 0x98765432, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0x98775432 rs 0xff865421, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xff865421 rs 0x00000000, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xff875421 rs 0xffffffff, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xff865421 rs 0x98765432, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 1 :: rt 0xff875421 rs 0xff865421, pos 0x00000001, size 0x00000010
+ins $t0, $t1, 16, 4 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x000f0000 rs 0xffffffff, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x00020000 rs 0x98765432, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x00010000 rs 0xff865421, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xfff0ffff rs 0x00000000, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xffffffff rs 0xffffffff, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xfff2ffff rs 0x98765432, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xfff1ffff rs 0xff865421, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x98705432 rs 0x00000000, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x987f5432 rs 0xffffffff, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x98725432 rs 0x98765432, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0x98715432 rs 0xff865421, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xff805421 rs 0x00000000, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xff8f5421 rs 0xffffffff, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xff825421 rs 0x98765432, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 4 :: rt 0xff815421 rs 0xff865421, pos 0x00000010, size 0x00000004
+ins $t0, $t1, 16, 16 :: rt 0x00000000 rs 0x00000000, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0xffff0000 rs 0xffffffff, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x54320000 rs 0x98765432, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x54210000 rs 0xff865421, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x0000ffff rs 0x00000000, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0xffffffff rs 0xffffffff, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x5432ffff rs 0x98765432, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x5421ffff rs 0xff865421, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x00005432 rs 0x00000000, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0xffff5432 rs 0xffffffff, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x54325432 rs 0x98765432, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x54215432 rs 0xff865421, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x00005421 rs 0x00000000, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0xffff5421 rs 0xffffffff, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x54325421 rs 0x98765432, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 16, 16 :: rt 0x54215421 rs 0xff865421, pos 0x00000010, size 0x00000010
+ins $t0, $t1, 31, 1 :: rt 0x00000000 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x80000000 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x00000000 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x80000000 rs 0xff865421, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x7fffffff rs 0x00000000, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0xffffffff rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x7fffffff rs 0x98765432, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0xffffffff rs 0xff865421, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x18765432 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x98765432 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x18765432 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x98765432 rs 0xff865421, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x7f865421 rs 0x00000000, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0xff865421 rs 0xffffffff, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0x7f865421 rs 0x98765432, pos 0x0000001f, size 0x00000001
+ins $t0, $t1, 31, 1 :: rt 0xff865421 rs 0xff865421, pos 0x0000001f, size 0x00000001
+LB
+lb $t0, 0($t1) :: rt 0x00000012
+lb $t0, 4($t1) :: rt 0x00000000
+lb $t0, 8($t1) :: rt 0x00000000
+lb $t0, 12($t1) :: rt 0xffffffff
+lb $t0, 16($t1) :: rt 0x00000023
+lb $t0, 20($t1) :: rt 0x00000024
+lb $t0, 24($t1) :: rt 0x00000025
+lb $t0, 28($t1) :: rt 0x00000026
+lb $t0, 32($t1) :: rt 0x0000003f
+lb $t0, 36($t1) :: rt 0x0000003e
+lb $t0, 40($t1) :: rt 0x00000036
+lb $t0, 44($t1) :: rt 0x0000003b
+lb $t0, 48($t1) :: rt 0x00000045
+lb $t0, 52($t1) :: rt 0x0000004e
+lb $t0, 56($t1) :: rt 0x00000047
+lb $t0, 60($t1) :: rt 0x0000004a
+lb $t0, 64($t1) :: rt 0x00000041
+lb $t0, 2($t1) :: rt 0x0000001e
+lb $t0, 6($t1) :: rt 0x00000000
+lb $t0, 10($t1) :: rt 0x00000000
+lb $t0, 14($t1) :: rt 0xffffffff
+lb $t0, 18($t1) :: rt 0x0000002e
+lb $t0, 22($t1) :: rt 0x0000002b
+lb $t0, 26($t1) :: rt 0x0000002e
+lb $t0, 30($t1) :: rt 0x0000002d
+lb $t0, 34($t1) :: rt 0x0000003f
+lb $t0, 38($t1) :: rt 0x0000003d
+LBU
+lbu $t0, 0($t1) :: rt 0x00000012
+lbu $t0, 4($t1) :: rt 0x00000000
+lbu $t0, 8($t1) :: rt 0x00000000
+lbu $t0, 12($t1) :: rt 0x000000ff
+lbu $t0, 16($t1) :: rt 0x00000023
+lbu $t0, 20($t1) :: rt 0x00000024
+lbu $t0, 24($t1) :: rt 0x00000025
+lbu $t0, 28($t1) :: rt 0x00000026
+lbu $t0, 32($t1) :: rt 0x0000003f
+lbu $t0, 36($t1) :: rt 0x0000003e
+lbu $t0, 40($t1) :: rt 0x00000036
+lbu $t0, 44($t1) :: rt 0x0000003b
+lbu $t0, 48($t1) :: rt 0x00000045
+lbu $t0, 52($t1) :: rt 0x0000004e
+lbu $t0, 56($t1) :: rt 0x00000047
+lbu $t0, 60($t1) :: rt 0x0000004a
+lbu $t0, 64($t1) :: rt 0x00000041
+lbu $t0, 2($t1) :: rt 0x0000001e
+lbu $t0, 6($t1) :: rt 0x00000000
+lbu $t0, 10($t1) :: rt 0x00000000
+lbu $t0, 14($t1) :: rt 0x000000ff
+lbu $t0, 18($t1) :: rt 0x0000002e
+lbu $t0, 22($t1) :: rt 0x0000002b
+lbu $t0, 26($t1) :: rt 0x0000002e
+lbu $t0, 30($t1) :: rt 0x0000002d
+lbu $t0, 34($t1) :: rt 0x0000003f
+lbu $t0, 38($t1) :: rt 0x0000003d
+LH
+lh $t0, 0($t1) :: rt 0x0000121f
+lh $t0, 4($t1) :: rt 0x00000000
+lh $t0, 8($t1) :: rt 0x00000000
+lh $t0, 12($t1) :: rt 0xffffffff
+lh $t0, 16($t1) :: rt 0x0000232f
+lh $t0, 20($t1) :: rt 0x0000242c
+lh $t0, 24($t1) :: rt 0x0000252a
+lh $t0, 28($t1) :: rt 0x0000262d
+lh $t0, 32($t1) :: rt 0x00003f34
+lh $t0, 36($t1) :: rt 0x00003e35
+lh $t0, 40($t1) :: rt 0x0000363a
+lh $t0, 44($t1) :: rt 0x00003b37
+lh $t0, 48($t1) :: rt 0x0000454f
+lh $t0, 52($t1) :: rt 0x00004e46
+lh $t0, 56($t1) :: rt 0x0000474d
+lh $t0, 60($t1) :: rt 0x00004a48
+lh $t0, 64($t1) :: rt 0x00004144
+lh $t0, 2($t1) :: rt 0x00001e1f
+lh $t0, 6($t1) :: rt 0x00000000
+lh $t0, 10($t1) :: rt 0x00000003
+lh $t0, 14($t1) :: rt 0xffffffff
+lh $t0, 18($t1) :: rt 0x00002e2f
+lh $t0, 22($t1) :: rt 0x00002b2b
+lh $t0, 26($t1) :: rt 0x00002e2b
+lh $t0, 30($t1) :: rt 0x00002d2a
+lh $t0, 34($t1) :: rt 0x00003f3e
+lh $t0, 38($t1) :: rt 0x00003d3c
+LHU
+lhu $t0, 0($t1) :: rt 0x0000121f
+lhu $t0, 4($t1) :: rt 0x00000000
+lhu $t0, 8($t1) :: rt 0x00000000
+lhu $t0, 12($t1) :: rt 0x0000ffff
+lhu $t0, 16($t1) :: rt 0x0000232f
+lhu $t0, 20($t1) :: rt 0x0000242c
+lhu $t0, 24($t1) :: rt 0x0000252a
+lhu $t0, 28($t1) :: rt 0x0000262d
+lhu $t0, 32($t1) :: rt 0x00003f34
+lhu $t0, 36($t1) :: rt 0x00003e35
+lhu $t0, 40($t1) :: rt 0x0000363a
+lhu $t0, 44($t1) :: rt 0x00003b37
+lhu $t0, 48($t1) :: rt 0x0000454f
+lhu $t0, 52($t1) :: rt 0x00004e46
+lhu $t0, 56($t1) :: rt 0x0000474d
+lhu $t0, 60($t1) :: rt 0x00004a48
+lhu $t0, 64($t1) :: rt 0x00004144
+lhu $t0, 2($t1) :: rt 0x00001e1f
+lhu $t0, 6($t1) :: rt 0x00000000
+lhu $t0, 10($t1) :: rt 0x000...
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