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From: Philippe W. <phi...@sk...> - 2013-06-04 19:33:50
|
On Tue, 2013-06-04 at 19:12 +0000, Niall Douglas wrote: > Generally when a behavior is an intentional, deliberate part of a code base > it's better to add valgrind macros so later developers can see what you're > doing and understand why. They then don't try things like fixing memory leaks > which are deliberate and intentional due to cross-platform portability > requirements. It looks to me that a suppression file entry can clearly describe which leak(s) to suppress and can contain a comment that explain why you are suppressing it. (of course, you can also add a comment in the code, telling that the intentional leak at that line is suppressed in a valgrind suppression file). Note that I think the macro you suggested would not be very difficult to implement, but it is not clear to me that they bring something which cannot be done with suppression files. Philippe |
|
From: Niall D. <ndo...@bl...> - 2013-06-04 19:12:14
|
> > If even there were some way of abusing some other valgrind macro > > instrumentation to achieve the same effect, I'm good. This is the only > > problem case in the entire code base. It's quite literally five lines > > of code, so is very tightly contained. > Is there a reason why suppression entries cannot be used to suppress this > leak > report ? Generally when a behavior is an intentional, deliberate part of a code base it's better to add valgrind macros so later developers can see what you're doing and understand why. They then don't try things like fixing memory leaks which are deliberate and intentional due to cross-platform portability requirements. I think for now the best course is if running under valgrind, do an ELF-specific cleanup to make valgrind clean. Thanks for the help. Niall --- Opinions expressed here are my own and do not necessarily represent those of BlackBerry Inc. |
|
From: Philippe W. <phi...@sk...> - 2013-06-04 18:44:01
|
On Tue, 2013-06-04 at 18:22 +0000, Niall Douglas wrote: > Is there some sort of magic macro e.g. VALGRIND_IGNORE_LEAKED_BLOCK(ptr) or > even better: > > VALGRIND_BEGIN_IGNORE_MEM_LEAKS(); > ... > VALGRIND_END_IGNORE_MEM_LEAKS(); No there is no such macros. > > I say this is better because my C++ fire and forgets a > std::unordered_map<size_t, std::map<std::string, void *>> which obviously > implies more than one malloc by the STL. > > If even there were some way of abusing some other valgrind macro > instrumentation to achieve the same effect, I'm good. This is the only > problem case in the entire code base. It's quite literally five lines of > code, so is very tightly contained. Is there a reason why suppression entries cannot be used to suppress this leak report ? Philippe |
|
From: Niall D. <ndo...@bl...> - 2013-06-04 18:22:39
|
Dear valgrind devs, I have some C++ implementing a static type registry where you really, really must fire and forget some memory allocations because it's potentially segfault causing if you try cleaning up. This happens because until we get C++ Modules, we can't know the order of deinit of statically allocated objects. Also, on ELF newly loaded shared objects may overwrite what storage an extern variable refers to, and a fire and forget can be used to work around the problem. Is there some sort of magic macro e.g. VALGRIND_IGNORE_LEAKED_BLOCK(ptr) or even better: VALGRIND_BEGIN_IGNORE_MEM_LEAKS(); ... VALGRIND_END_IGNORE_MEM_LEAKS(); I say this is better because my C++ fire and forgets a std::unordered_map<size_t, std::map<std::string, void *>> which obviously implies more than one malloc by the STL. If even there were some way of abusing some other valgrind macro instrumentation to achieve the same effect, I'm good. This is the only problem case in the entire code base. It's quite literally five lines of code, so is very tightly contained. Thanks, Niall --- Opinions expressed here are my own and do not necessarily represent those of BlackBerry Inc. |
|
From: Philippe W. <phi...@sk...> - 2013-06-04 18:08:32
|
On Tue, 2013-06-04 at 18:55 +0400, Alexander Potapenko wrote: > I'm also curious about other potential consequences of this issue. > Looks like arbitrary mmap() calls in Valgrind may unexpectedly fail on > 32-bit Darwin if they overlap with the reserved ranges. It looks like there is already a bunch of tricks which are bypassing or ignoring differences between Valgrind aspacemgr view of the mappings and the real kernel mappings. Search for several VGO_darwin conditional compilations in aspacemgr-linux.c. Your specific problem might be a special case of a maybe more general problem which is handled in VG_(am_mmap_anon_float_valgrind) but not in VG_(am_mmap_file_float_valgrind_flags). It might maybe be better to have a single place that calls "advise" then "mmap", and that would do recovery on Darwin by retrying without MAP_FIXED when failing (this would also be useful for an "outer valgrind" running an "inner valgrind", as the inner valgrind encounters similar differences as it cannot observe the mmap syscalls done by the outer valgrind). Philippe |
|
From: Alexander P. <gl...@go...> - 2013-06-04 14:55:17
|
Hi all, I've been debugging an error in Valgrind due to which the symbol table for a large 32-bit binary (content_unittests from the Chromium project, see https://code.google.com/p/chromium/issues/detail?id=245745 for more details) wasn't loaded on OS X 10.6. The following error was printed for --trace-symbols=yes: --1448-- WARNING: Serious error when reading debug info --1448-- When reading debug info from src/xcodebuild/Release/content_unittests: --1448-- Can't mmap image to read symbols?! I've added some printfs and address space dumping and figured out that for a mapping of 259089676 bytes (247.1M) VG_(am_get_advisory) was returning the range "00f077c000-00fffebfff" of 248M, which it thought was free. However a further call to mmap(00f077c000, 259089676, ...) failed with ENOMEM. I suppose that the problem here is that the address space manager is unaware about some portions of the address space that are reserved by the kernel. For example, according to Amit Singh's "Mac OS X Internals", page 910 (http://goo.gl/AeD2o), the memory above 0xfe000000 is reserved for various system services. I've replaced the current value of aspacem_maxAddr (0xffffffff) with 0xfdffffffff, effectively disallowing the address space manager to use the reserved memory. This worked in my case, and I think the patch (attached) needs to be upstreamed. However I couldn't find any actual documentation on the address space layout of the recent OSX versions (Singh's book refers to 10.4), so I'm not sure if this is portable. Is anyone aware of any information about the reserved page ranges in the recent OSX kernels? Is my approach to fix the problem correct at all? I'm also curious about other potential consequences of this issue. Looks like arbitrary mmap() calls in Valgrind may unexpectedly fail on 32-bit Darwin if they overlap with the reserved ranges. Thanks, Alexander Potapenko Software Engineer Google Moscow |
|
From: Sergey G. <Ser...@as...> - 2013-06-04 07:41:57
|
diff -upNr ../valgrind-3.8.1.orig/VEX/priv/guest_ppc_toIR.c ./VEX/priv/guest_ppc_toIR.c
--- ../valgrind-3.8.1.orig/VEX/priv/guest_ppc_toIR.c 2013-04-26 09:21:03.375809664 +0200
+++ ./VEX/priv/guest_ppc_toIR.c 2013-04-26 09:49:17.833852413 +0200
@@ -6563,7 +6563,7 @@ static Bool dis_proc_ctl ( VexAbiInfo* v
putIReg( rD_addr, mkWidenFrom32(ty, getGST( PPC_GST_XER ),
/* Signed */False) );
break;
- case 0x8:
+ case 0x8: case 0x200:
DIP("mflr r%u\n", rD_addr);
putIReg( rD_addr, getGST( PPC_GST_LR ) );
break;
@@ -6729,7 +6729,7 @@ static Bool dis_proc_ctl ( VexAbiInfo* v
DIP("mtlr r%u\n", rS_addr);
putGST( PPC_GST_LR, mkexpr(rS) );
break;
- case 0x9:
+ case 0x9: case 0x200:
DIP("mtctr r%u\n", rS_addr);
putGST( PPC_GST_CTR, mkexpr(rS) );
break;
@@ -8118,14 +8118,14 @@ static Bool dis_fp_cmp ( UInt theInstr )
UChar frB_addr = ifieldRegB(theInstr);
UInt opc2 = ifieldOPClo10(theInstr);
UChar b0 = ifieldBIT0(theInstr);
-
+ UInt opc2_ = IFIELD( theInstr, 0, 11 );
IRTemp ccIR = newTemp(Ity_I32);
IRTemp ccPPC32 = newTemp(Ity_I32);
IRTemp frA = newTemp(Ity_F64);
IRTemp frB = newTemp(Ity_F64);
- if (opc1 != 0x3F || b21to22 != 0 || b0 != 0) {
+ if ((opc1 != 0x3F || b21to22 != 0 || b0 != 0) && opc1 != 0x4) {
vex_printf("dis_fp_cmp(ppc)(instr)\n");
return False;
}
@@ -8179,6 +8179,17 @@ static Bool dis_fp_cmp ( UInt theInstr )
);
putGST_field( PPC_GST_CR, mkexpr(ccPPC32), crfD );
+
+ if (opc1 == 0x4){
+ switch (opc2_){
+ case 0x2EE:
+ DIP("efdcmpeq crf%d,r%u,r%u\n", crfD, frA_addr, frB_addr);
+ return True;
+ default:
+ return False;
+ }
+ }
+
/* CAB: TODO?: Support writing cc to FPSCR->FPCC ?
putGST_field( PPC_GST_FPSCR, mkexpr(ccPPC32), 4 );
@@ -8214,6 +8225,7 @@ static Bool dis_fp_round ( UInt theInstr
UChar b16to20 = ifieldRegA(theInstr);
UChar frD_addr = ifieldRegDS(theInstr);
UChar frB_addr = ifieldRegB(theInstr);
+ UInt opc2_ = IFIELD( theInstr, 0, 11 );
UInt opc2 = ifieldOPClo10(theInstr);
UChar flag_rC = ifieldBIT0(theInstr);
@@ -8233,7 +8245,7 @@ static Bool dis_fp_round ( UInt theInstr
simulating exceptions, the exception status will appear to be
zero. Hence cr1 should be cleared if this is a . form insn. */
Bool clear_CR1 = True;
- if ((!(opc1 == 0x3F || opc1 == 0x3B)) || b16to20 != 0) {
+ if ((!(opc1 == 0x3F || opc1 == 0x3B || opc1==0x4)) || b16to20 != 0) {
vex_printf("dis_fp_round(ppc)(instr)\n");
return False;
}
@@ -8260,6 +8272,18 @@ static Bool dis_fp_round ( UInt theInstr
}
}
+ if (opc1 == 0x4) {
+ switch (opc2_) {
+ case 0x2CF:
+ vex_printf("\n0x2CF\n");
+ DIP("efscfd r%u r%u\n", frD_addr, frB_addr);
+ assign(frD, binop(Iop_RoundF64toF32, rm, mkexpr(frB)));
+ goto putFR;
+ default:
+ break;
+ }
+ }
+
switch (opc2) {
case 0x00C: // frsp (Float Round to Single, PPC32 p423)
@@ -8394,8 +8418,9 @@ static Bool dis_fp_round ( UInt theInstr
return False;
}
putFR:
+ vex_printf("fP_pre_put\n");
putFReg( frD_addr, mkexpr(frD) );
-
+ vex_printf("fp_post_put\n");
if (set_FPRF) {
// XXX XXX XXX FIXME
// set FPRF from frD
@@ -8409,6 +8434,70 @@ putFR:
return True;
}
+Bool dis_fp_conv2 ( UInt theInstr )
+{
+ UChar opc1 = ifieldOPC(theInstr);
+ IRType ty = mode64 ? Ity_I64 : Ity_I32;
+ UChar b16to20 = ifieldRegA(theInstr);
+ UChar frD_addr = ifieldRegDS(theInstr);
+ UChar frB_addr = ifieldRegB(theInstr);
+ UInt opc2_ = IFIELD( theInstr, 0, 11 );
+ UChar flag_rC = ifieldBIT0(theInstr);
+
+ IRTemp frD = newTemp(Ity_F64);
+ IRTemp frB = newTemp(Ity_I32);
+ IRTemp r_tmp32 = newTemp(Ity_I32);
+ IRTemp r_tmp64 = newTemp(Ity_I32);
+ IRTemp f_tmp32 = newTemp(Ity_F32);
+ IRTemp f_tmp32_1;
+ IRTemp f_tmp64 = newTemp(Ity_F64);
+ IRExpr* rm = get_IR_roundingmode();
+
+ /* By default, we will examine the results of the operation and set
+ fpscr[FPRF] accordingly. */
+ vex_printf("fp1_\n");
+ Bool set_FPRF = True;
+
+ /* By default, if flag_RC is set, we will clear cr1 after the
+ operation. In reality we should set cr1 to indicate the
+ exception status of the operation, but since we're not
+ simulating exceptions, the exception status will appear to be
+ zero. Hence cr1 should be cleared if this is a . form insn. */
+ Bool clear_CR1 = True;
+ if ((!(opc1==0x4)) || b16to20 != 0) {
+ vex_printf("dis_fp_round(ppc)(instr)\n");
+ return False;
+ }
+
+ assign( frB, getIReg(frB_addr));
+
+ switch (opc2_) {
+ case 0x2F1:
+ DIP("efdcfsi r%u r%u\n", frD_addr, frB_addr);
+ assign(frD, unop (Iop_I32StoF64, mkexpr(frB)));
+
+ break;
+ break;
+ case 0x2F0:
+
+ DIP("efdcfsi r%u r%u\n", frD_addr, frB_addr);
+ assign(frD, unop (Iop_I32UtoF64, mkexpr(frB)));
+
+ break;
+ default:
+ vex_printf("dis_fp_round(ppc)(opc2)\n");
+ return False;
+ }
+ putFReg( frD_addr, mkexpr(frD) );
+
+
+// if (flag_rC && clear_CR1) {
+// putCR321( 1, mkU8(0) );
+// putCR0( 1, mkU8(0) );
+//}
+ return True;
+}
+
/*
Floating Point Pair Instructions
*/
@@ -15067,6 +15156,8 @@ static Bool dis_av_arith ( UInt theInstr
return True;
}
+
+
/*
AltiVec Logic Instructions
*/
@@ -15110,7 +15201,6 @@ static Bool dis_av_logic ( UInt theInstr
DIP("vxor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
putVReg( vD_addr, binop(Iop_XorV128, mkexpr(vA), mkexpr(vB)) );
break;
-
case 0x504: // vnor (Nor, AV p216)
DIP("vnor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
putVReg( vD_addr,
@@ -15124,6 +15214,39 @@ static Bool dis_av_logic ( UInt theInstr
return True;
}
+static Bool dis_evect_logic ( UInt theInstr )
+{
+ UChar opc1 = ifieldOPC(theInstr);
+ UChar vD_addr = ifieldRegDS(theInstr);
+ UChar vA_addr = ifieldRegA(theInstr);
+ UChar vB_addr = ifieldRegB(theInstr);
+ UInt opc2 = IFIELD( theInstr, 0, 11 );
+
+ IRTemp vA = newTemp(Ity_V128);
+ IRTemp vB = newTemp(Ity_V128);
+ assign( vA, getVReg(vA_addr));
+ assign( vB, getVReg(vB_addr));
+
+ if (opc1 != 0x4) {
+ vex_printf("dis_av_logic(ppc)(opc1 != 0x4)\n");
+ return False;
+ }
+
+ switch (opc2){
+ case 0x216: //evxor
+ DIP("evxor r%d, r%d, r%d", vD_addr, vA_addr, vB_addr);
+ putVReg(vD_addr, binop(Iop_XorV128, mkexpr(vA), mkexpr(vB)));
+ break;
+ default:
+ vex_printf("dis_evect_logic(ppc)(opc2=0x%x)\n", opc2);
+ return False;
+
+ }
+ return True;
+
+}
+
+
/*
AltiVec Compare Instructions
*/
@@ -16509,11 +16632,23 @@ static Bool dis_sp_fp ( UInt theInstr )
assign( frD, triop( Iop_SubF64r32,
rm, mkexpr(frA), mkexpr(frB) ));
break;
+ case 0x2E8:
+ DIP("efddiv r%u,r%u,r%u\n", rD_addr, rA_addr, rB_addr);
+ assign( frD, triop( Iop_DivF64,
+ rm, mkexpr(frA), mkexpr(frB) ));
+ break;
+ case 0x2E0:
+ DIP("efdadd r%u,r%u,r%u\n", rD_addr, rA_addr, rB_addr);
+ assign( frD, triop( Iop_AddF64, rm,
+ mkexpr(frA), mkexpr(frB) ));
+
+ break;
default:
vex_printf("dis_sp_fp(ppc)(opc2)\n");
return False;
}
putSPReg(rD_addr, unop(Iop_TruncF64asF32, mkexpr(frD)) );
+
return True;
}
@@ -16579,6 +16714,37 @@ static Bool dis_sp_cvt ( UInt theInstr )
return True;
}
+static Bool dis_sp_logic ( UInt theInstr )
+{
+ UChar opc1 = ifieldOPC(theInstr);
+ UChar vD_addr = ifieldRegDS(theInstr);
+ UChar vA_addr = ifieldRegA(theInstr);
+ UChar vB_addr = ifieldRegB(theInstr);
+ UInt opc2 = IFIELD( theInstr, 0, 11 );
+
+ IRTemp vA = newTemp(Ity_I32);
+ IRTemp vB = newTemp(Ity_I32);
+ assign( vA, getIReg(vA_addr));
+ assign( vB, getIReg(vB_addr));
+
+ if (opc1 != 0x4) {
+ vex_printf("dis_sp_logic(ppc)(opc1 != 0x4)\n");
+ return False;
+ }
+
+ switch (opc2) {
+ case 0x216: // evxor
+ DIP("evxor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
+ putIReg( vD_addr, binop(Iop_Xor32, mkexpr(vA), mkexpr(vB)) );
+ break;
+ default:
+ vex_printf("dis_sp_logic(ppc)(opc2=0x%x)\n", opc2);
+ return False;
+
+ }
+
+ return True;
+}
/* The 0x3C primary opcode (VSX category) uses several different forms of
* extended opcodes:
@@ -17856,10 +18021,11 @@ DisResult disInstr_PPC_WRK (
/* SPE Arith */
case 0x2C0: case 0x2C1: // efsadd, efssub
- case 0x2C8: case 0x2C9: // efsmul, efsdiv
+ case 0x2C8: case 0x2C9: case 0x2E8: case 0x2E0: // efsmul, efsdiv, eddiv, efdadd
if (dis_sp_fp( theInstr )) goto decode_success;
goto decode_failure;
+
/* SPE Convert */
case 0x2D4: case 0x2D5: // efsctui, efsctsi
case 0x2D6: case 0x2D7: // efsctuf, efsctsf
@@ -17867,6 +18033,23 @@ DisResult disInstr_PPC_WRK (
if (dis_sp_cvt( theInstr )) goto decode_success;
goto decode_failure;
+ //0x216
+ case 0x216:
+ if (dis_sp_logic( theInstr )) goto decode_success;
+ goto decode_failure;
+ case 0x2CF:
+ if ( dis_fp_round( theInstr )) goto decode_success;
+ goto decode_failure;
+ case 0x2F1:
+ if (dis_fp_conv2( theInstr )) goto decode_success;
+ goto decode_failure;
+ case 0x2F0:
+ if (dis_fp_conv2( theInstr )) goto decode_success;
+ goto decode_failure;
+ case 0x2EE:
+ if (dis_fp_cmp( theInstr )) goto decode_success;
+ goto decode_failure;
+
default:
vex_printf("disInstr(ppc): "
"declined to decode a SignalProcessing-Optional insn.\n");
@@ -17942,7 +18125,7 @@ DisResult disInstr_PPC_WRK (
/* AV Logic */
case 0x404: case 0x444: case 0x484: // vand, vandc, vor
- case 0x4C4: case 0x504: // vxor, vnor
+ case 0x4C4: case 0x504: // vxor, vnor
if (!allow_V) goto decode_noV;
if (dis_av_logic( theInstr )) goto decode_success;
goto decode_failure;
diff -upNr ../valgrind-3.8.1.orig/VEX/priv/host_ppc_defs.c ./VEX/priv/host_ppc_defs.c
--- ../valgrind-3.8.1.orig/VEX/priv/host_ppc_defs.c 2013-04-26 09:21:03.313813327 +0200
+++ ./VEX/priv/host_ppc_defs.c 2013-04-26 09:52:35.892954399 +0200
@@ -1238,7 +1238,7 @@ PPCInstr* PPCInstr_FpCftI ( Bool fromI,
switch (conversion) {
// Supported conversion operations
case 1: case 3: case 5: case 7:
- case 8: case 9: case 11:
+ case 8: case 9: case 11: case 15: case 13:
break;
default:
vpanic("PPCInstr_FpCftI(ppc_host)");
@@ -1780,6 +1780,10 @@ void ppPPCInstr ( PPCInstr* i, Bool mode
str = "fcfidus";
}
}
+ if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == True && i->Pin.FpCftI.syned == True && i->Pin.FpCftI.flt64 == True)
+ str = "efdcfsi";
+ if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == True && i->Pin.FpCftI.syned == False && i->Pin.FpCftI.flt64 == True)
+ str = "efdcfui";
vex_printf("%s ", str);
ppHRegPPC(i->Pin.FpCftI.dst);
vex_printf(",");
@@ -3033,6 +3037,7 @@ static UChar* mkFormX ( UChar* p, UInt o
theInstr = ((opc1<<26) | (r1<<21) | (r2<<16) |
(r3<<11) | (opc2<<1) | (b0));
return emit32(p, theInstr);
+
}
static UChar* mkFormXO ( UChar* p, UInt opc1, UInt r1, UInt r2,
@@ -4515,7 +4520,19 @@ Int emit_PPCInstr ( /*MB_MOD*/Bool* is_p
p = mkFormX(p, 59, fr_dst, 0, fr_src, 974, 0);
goto done;
}
+
+ }
+ if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == True && i->Pin.FpCftI.syned == True && i->Pin.FpCftI.flt64 == True){
+ p = mkFormVX(p, 4, fr_dst, 0 , fr_src, 753);
+
+ goto done;
}
+ if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == True && i->Pin.FpCftI.syned == False && i->Pin.FpCftI.flt64 == True){
+ p = mkFormVX(p, 4, fr_dst, 0 , fr_src, 752);
+
+ goto done;
+ }
+
goto bad;
}
diff -upNr ../valgrind-3.8.1.orig/VEX/priv/host_ppc_isel.c ./VEX/priv/host_ppc_isel.c
--- ../valgrind-3.8.1.orig/VEX/priv/host_ppc_isel.c 2013-04-26 09:21:03.400808187 +0200
+++ ./VEX/priv/host_ppc_isel.c 2013-04-26 09:26:03.866704097 +0200
@@ -1998,7 +1998,7 @@ static HReg iselWordExpr_R_wrk ( ISelEnv
/* ReinterpF32asI32(e) */
/* Given an IEEE754 float, produce an I32 with the same bit
pattern. */
- case Iop_ReinterpF32asI32: {
+ case Iop_ReinterpF32asI32: case Iop_ReinterpF64asI32: {
/* I believe this generates correct code for both 32- and
64-bit hosts. */
PPCAMode *am_addr;
@@ -3547,7 +3547,7 @@ static HReg iselDblExpr_wrk ( ISelEnv* e
Bool mode64 = env->mode64;
IRType ty = typeOfIRExpr(env->type_env,e);
vassert(e);
- vassert(ty == Ity_F64);
+// vassert(ty == Ity_F64);
if (e->tag == Iex_RdTmp) {
return lookupIRTemp(env, e->Iex.RdTmp.tmp);
@@ -3715,6 +3715,7 @@ static HReg iselDblExpr_wrk ( ISelEnv* e
///* Restore default FPU rounding. */
//set_FPU_rounding_default( env );
return fdst;
+
} else {
/* 32-bit mode */
HReg fdst = newVRegF(env);
@@ -3746,6 +3747,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* e
}
}
+
+
}
if (e->tag == Iex_Unop) {
@@ -3815,6 +3818,29 @@ static HReg iselDblExpr_wrk ( ISelEnv* e
default:
break;
}
+ if (e->Iex.Unop.op == Iop_I32StoF64 || e->Iex.Unop.op == Iop_I32UtoF64) {
+ HReg fdst = newVRegF(env);
+ vex_printf("arg2 %d", e->Iex.Unop.arg->tag);
+ HReg isrc = iselWordExpr_R(env, e->Iex.Unop.arg);
+ HReg r1 = StackFramePtr(env->mode64);
+ HReg is1, is2;
+ PPCAMode* four_r1 = PPCAMode_IR( 4, r1 );
+
+ /* Set host rounding mode */
+ // set_FPU_rounding_mode( env, get_IR_roundingmode() );
+
+ sub_from_sp( env, 16 );
+ addInstr(env, PPCInstr_Store(4, four_r1, isrc, mode64/*mode64*/));
+ addInstr(env, PPCInstr_FpLdSt(True/*load*/, 4, fdst, four_r1));
+ addInstr(env, PPCInstr_FpCftI(True/*I->F*/, True/*int64*/,
+ e->Iex.Unop.op == Iop_I32StoF64,
+ True/*fdst is 64 bit*/,
+ fdst, fdst));
+
+ add_to_sp( env, 16 );
+ return fdst;
+
+ }
}
/* --------- MULTIPLEX --------- */
@@ -4809,7 +4835,7 @@ static void iselStmt ( ISelEnv* env, IRS
PPCInstr_AvLdSt(False/*store*/, 16, v_src, am_addr));
return;
}
- if (ty == Ity_F64) {
+ if (ty == Ity_F64 || ty == Ity_F32) {
HReg fr_src = iselDblExpr(env, stmt->Ist.Put.data);
PPCAMode* am_addr = PPCAMode_IR( stmt->Ist.Put.offset,
GuestStatePtr(mode64) );
@@ -5134,6 +5160,8 @@ static void iselStmt ( ISelEnv* env, IRS
}
stmt_fail:
ppIRStmt(stmt);
+IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
+ vex_printf("tyy - %d\n", ty);
vpanic("iselStmt(ppc)");
}
Binary files ../valgrind-3.8.1.orig/VEX/priv/.host_ppc_isel.c.swp and ./VEX/priv/.host_ppc_isel.c.swp differ
diff -upNr ../valgrind-3.8.1.orig/VEX/priv/ir_defs.c ./VEX/priv/ir_defs.c
--- ../valgrind-3.8.1.orig/VEX/priv/ir_defs.c 2013-04-26 09:21:03.437806003 +0200
+++ ./VEX/priv/ir_defs.c 2013-04-26 09:26:03.986696967 +0200
@@ -165,7 +165,7 @@ void ppIROp ( IROp op )
case Iop_8Sto64: vex_printf("8Sto64"); return;
case Iop_64to16: vex_printf("64to16"); return;
case Iop_64to8: vex_printf("64to8"); return;
-
+ case Iop_XorF32: vex_printf("evxor"); return;
case Iop_Not1: vex_printf("Not1"); return;
case Iop_32to1: vex_printf("32to1"); return;
case Iop_64to1: vex_printf("64to1"); return;
@@ -389,6 +389,7 @@ void ppIROp ( IROp op )
case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
+ case Iop_ReinterpF64asI32: vex_printf("Iop_ReinterpF64asI32"); return;
case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
@@ -2160,6 +2161,9 @@ void typeOfPrimop ( IROp op,
case Iop_Sad8Ux4:
BINARY(Ity_I32,Ity_I32, Ity_I32);
+ case Iop_XorF32:
+ BINARY(Ity_F32, Ity_F32, Ity_F32);
+
case Iop_Add64: case Iop_Sub64: case Iop_Mul64:
case Iop_Or64: case Iop_And64: case Iop_Xor64:
case Iop_CmpORD64U:
@@ -2440,6 +2444,7 @@ void typeOfPrimop ( IROp op,
case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64);
case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
+ case Iop_ReinterpF64asI32: UNARY(Ity_F64, Ity_I32);
case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
diff -upNr ../valgrind-3.8.1.orig/VEX/pub/libvex_ir.h ./VEX/pub/libvex_ir.h
--- ../valgrind-3.8.1.orig/VEX/pub/libvex_ir.h 2013-04-26 09:21:03.513801514 +0200
+++ ./VEX/pub/libvex_ir.h 2013-04-26 09:26:05.642598556 +0200
@@ -1469,7 +1469,8 @@ typedef
Iop_Recip32Fx8,
Iop_Max32Fx8, Iop_Min32Fx8,
- Iop_Max64Fx4, Iop_Min64Fx4
+ Iop_Max64Fx4, Iop_Min64Fx4,
+ Iop_XorF32, Iop_ReinterpF64asI32
}
IROp;
|
|
From: Sergey G. <Ser...@as...> - 2013-06-04 07:38:41
|
>From 0bf4b0ac18d1ea41b32ad781d214b295ca1998f3 Mon Sep 17 00:00:00 2001
From: Aneesh Bansal <ane...@fr...>
Date: Mon, 21 Nov 2011 17:31:39 +0530
Subject: [PATCH] Added support for PPC instructions mfatbu, mfatbl.
Upstream-Status: Submitted
Signed-off-by: Aneesh Bansal <ane...@fr...>
---
Currently Valgrind 3.7.0 does not have support for PPC instructions mfatbu and mfatbl. When we run a USDPAA application with VALGRIND, the following error is given by valgrind :
dis_proc_ctl(ppc)(mfspr,SPR)(0x20F)
disInstr(ppc): unhandled instruction: 0x7C0F82A6
VEX/priv/guest_ppc_defs.h | 2 ++
VEX/priv/guest_ppc_helpers.c | 18 ++++++++++++++++++
VEX/priv/guest_ppc_toIR.c | 22 ++++++++++++++++++++++
3 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/VEX/priv/guest_ppc_defs.h b/VEX/priv/guest_ppc_defs.h
index dd3c62e..11a34aa 100644
--- a/VEX/priv/guest_ppc_defs.h
+++ b/VEX/priv/guest_ppc_defs.h
@@ -146,6 +146,8 @@ extern UInt ppc32g_dirtyhelper_MFSPR_268_269 ( UInt );
extern UInt ppc32g_dirtyhelper_MFSPR_287 ( void );
+extern UInt ppc32g_dirtyhelper_MFSPR_526_527 ( UInt );
+
extern void ppc32g_dirtyhelper_LVS ( VexGuestPPC32State* gst,
UInt vD_idx, UInt sh,
UInt shift_right );
diff --git a/VEX/priv/guest_ppc_helpers.c b/VEX/priv/guest_ppc_helpers.c
index 11aa428..b49ea3f 100644
--- a/VEX/priv/guest_ppc_helpers.c
+++ b/VEX/priv/guest_ppc_helpers.c
@@ -119,6 +119,24 @@ UInt ppc32g_dirtyhelper_MFSPR_287 ( void )
# endif
}
+/* CALLED FROM GENERATED CODE */
+/* DIRTY HELPER (non-referentially transparent) */
+UInt ppc32g_dirtyhelper_MFSPR_526_527 ( UInt r527 )
+{
+# if defined(__powerpc__) || defined(_AIX)
+ UInt spr;
+ if (r527) {
+ __asm__ __volatile__("mfspr %0,527" : "=b"(spr));
+ } else {
+ __asm__ __volatile__("mfspr %0,526" : "=b"(spr));
+ }
+ return spr;
+# else
+ return 0;
+# endif
+}
+
+
/* CALLED FROM GENERATED CODE */
/* DIRTY HELPER (reads guest state, writes guest mem) */
diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
index f8d220d..37c8974 100644
--- a/VEX/priv/guest_ppc_toIR.c
+++ b/VEX/priv/guest_ppc_toIR.c
@@ -5657,6 +5657,28 @@ static Bool dis_proc_ctl ( VexAbiInfo* vbi, UInt theInstr )
break;
}
+
+ case 526 /* 0x20E */:
+ case 527 /* 0x20F */: {
+ UInt arg = SPR==526 ? 0 : 1;
+ IRTemp val = newTemp(Ity_I32);
+ IRExpr** args = mkIRExprVec_1( mkU32(arg) );
+ IRDirty* d = unsafeIRDirty_1_N(
+ val,
+ 0/*regparms*/,
+ "ppc32g_dirtyhelper_MFSPR_526_527",
+ fnptr_to_fnentry
+ (vbi, &ppc32g_dirtyhelper_MFSPR_526_527),
+ args
+ );
+ /* execute the dirty call, dumping the result in val. */
+ stmt( IRStmt_Dirty(d) );
+ putIReg( rD_addr,
+ mkWidenFrom32(ty, mkexpr(val), False/*unsigned*/) );
+ DIP("mfspr r%u,%u", rD_addr, (UInt)SPR);
+ break;
+ }
+
default:
vex_printf("dis_proc_ctl(ppc)(mfspr,SPR)(0x%x)\n", SPR);
return False;
--
1.7.0.4
|
|
From: Philippe W. <phi...@sk...> - 2013-06-04 03:33:05
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora (7.5.1-37.fc18) Assembler: GNU assembler version 2.23.51.0.1-7.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.7.2-204.fc18.ppc64 ppc64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on gcc110 ( Fedora release 18 (Spherical Cow), ppc64 ) Started at 2013-06-03 20:00:10 PDT Ended at 2013-06-03 20:32:45 PDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 557 tests, 31 stderr failures, 3 stdout failures, 0 stderrB failures, 0 stdoutB failures, 2 post failures == memcheck/tests/linux/getregset (stdout) memcheck/tests/linux/getregset (stderr) memcheck/tests/ppc64/power_ISA2_05 (stdout) memcheck/tests/supp_unknown (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) helgrind/tests/annotate_rwlock (stderr) helgrind/tests/free_is_write (stderr) helgrind/tests/hg02_deadlock (stderr) helgrind/tests/hg03_inherit (stderr) helgrind/tests/hg04_race (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/locked_vs_unlocked1_fwd (stderr) helgrind/tests/locked_vs_unlocked1_rev (stderr) helgrind/tests/locked_vs_unlocked2 (stderr) helgrind/tests/locked_vs_unlocked3 (stderr) helgrind/tests/pth_barrier1 (stderr) helgrind/tests/pth_barrier2 (stderr) helgrind/tests/pth_barrier3 (stderr) helgrind/tests/pth_destroy_cond (stderr) helgrind/tests/rwlock_race (stderr) helgrind/tests/tc01_simple_race (stderr) helgrind/tests/tc05_simple_race (stderr) helgrind/tests/tc06_two_races (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) helgrind/tests/tc14_laog_dinphils (stderr) helgrind/tests/tc16_byterace (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc19_shadowmem (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) |
|
From: Tom H. <to...@co...> - 2013-06-04 03:18:23
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) GDB: Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2013-06-04 03:51:36 BST Ended at 2013-06-04 04:18:07 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 632 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/amd64/insn-pcmpistri (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Tom H. <to...@co...> - 2013-06-04 03:08:31
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.4.1 20090725 (Red Hat 4.4.1-2) GDB: Assembler: GNU assembler version 2.19.51.0.14-3.fc11 20090722 C library: GNU C Library stable release version 2.10.2 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 11 (Leonidas) Nightly build on bristol ( x86_64, Fedora 11 ) Started at 2013-06-04 03:41:19 BST Ended at 2013-06-04 04:08:13 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 634 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/long_namespace_xml (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Tom H. <to...@co...> - 2013-06-04 03:03:38
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.4.5 20101112 (Red Hat 4.4.5-2) GDB: Assembler: GNU assembler version 2.20.51.0.2-20.fc13 20091009 C library: GNU C Library stable release version 2.12.2 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 13 (Goddard) Nightly build on bristol ( x86_64, Fedora 13 ) Started at 2013-06-04 03:33:25 BST Ended at 2013-06-04 04:03:22 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 634 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/pth_barrier3 (stderr) |
|
From: Tom H. <to...@co...> - 2013-06-04 02:55:13
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.5.1 20100924 (Red Hat 4.5.1-4) GDB: GNU gdb (GDB) Fedora (7.2-52.fc14) Assembler: GNU assembler version 2.20.51.0.7-8.fc14 20100318 C library: GNU C Library stable release version 2.13 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 14 (Laughlin) Nightly build on bristol ( x86_64, Fedora 14 ) Started at 2013-06-04 03:22:18 BST Ended at 2013-06-04 03:54:59 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 653 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) |
|
From: Tom H. <to...@co...> - 2013-06-04 02:47:14
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.1-48.fc15) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2013-06-04 03:13:25 BST Ended at 2013-06-04 03:46:57 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 655 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) |
|
From: Tom H. <to...@co...> - 2013-06-04 02:35:35
|
valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) GDB: GNU gdb (GDB) Fedora (7.3.50.20110722-16.fc16) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2013-06-04 03:02:31 BST Ended at 2013-06-04 03:35:19 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 655 tests, 1 stderr failure, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) |
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From: Tom H. <to...@co...> - 2013-06-04 02:26:07
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valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.7.2 20120921 (Red Hat 4.7.2-2) GDB: GNU gdb (GDB) Fedora (7.4.50.20120120-54.fc17) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2013-06-04 02:52:35 BST Ended at 2013-06-04 03:25:53 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 655 tests, 5 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcmain_pic (stderr) memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
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From: Christian B. <bor...@de...> - 2013-06-04 02:15:03
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valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] GDB: GNU gdb (GDB) SUSE (7.3-0.6.1) Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.21.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.58-0.6.6-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP2 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP1 gcc 4.3.4 on z196 (s390x) ) Started at 2013-06-04 03:45:01 CEST Ended at 2013-06-04 04:14:51 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 635 tests, 0 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == |
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From: Tom H. <to...@co...> - 2013-06-04 02:14:15
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valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.7.2 20121109 (Red Hat 4.7.2-8) GDB: GNU gdb (GDB) Fedora (7.5.1-38.fc18) Assembler: GNU assembler version 2.23.51.0.1-6.fc18 20120806 C library: GNU C Library stable release version 2.16 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 18 (Spherical Cow) Nightly build on bristol ( x86_64, Fedora 18 (Spherical Cow) ) Started at 2013-06-04 02:43:02 BST Ended at 2013-06-04 03:14:00 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 655 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
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From: Tom H. <to...@co...> - 2013-06-04 02:04:58
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valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.8.0 20130526 (Red Hat 4.8.0-8) GDB: GNU gdb (GDB) Fedora (7.6-30.fc19) Assembler: GNU assembler version 2.23.52.0.1-8.fc19 20130226 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 19 (Schrödingerâs Cat) Nightly build on bristol ( x86_64, Fedora 19 (Schrödingerâs Cat) ) Started at 2013-06-04 02:33:23 BST Ended at 2013-06-04 03:04:46 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 655 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/dw4 (stderr) memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) |
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From: Tom H. <to...@co...> - 2013-06-04 01:49:34
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valgrind revision: 13418 VEX revision: 2724 C compiler: gcc (GCC) 4.8.0 20130526 (Red Hat 4.8.0-8) GDB: GNU gdb (GDB) Fedora (7.6-31.fc20) Assembler: GNU assembler version 2.23.2 C library: GNU C Library (GNU libc) stable release version 2.17 uname -mrs: Linux 3.9.4-200.fc18.x86_64 x86_64 Vendor version: Fedora release 20 (Rawhide) Nightly build on bristol ( x86_64, Fedora 20 ) Started at 2013-06-04 02:23:16 BST Ended at 2013-06-04 02:49:18 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 655 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/dw4 (stderr) memcheck/tests/origin5-bz2 (stderr) exp-sgcheck/tests/hackedbz2 (stderr) |