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From: Kevin F. <kfi...@gm...> - 2012-12-21 23:18:18
|
Bug 79362 ( https://bugs.kde.org/show_bug.cgi?id=79362 ) has had a working patch for a while now, in fact I refreshed the patch recently. As far as I can tell, it is ready to be applied/committed to trunk. If there is more work to be done before it can be applied I would be more than willing to put in some time, I just need to know what to do. Kevin |
|
From: <sv...@va...> - 2012-12-21 21:43:14
|
florian 2012-12-21 21:43:00 +0000 (Fri, 21 Dec 2012)
New Revision: 2609
Log:
s390: Rename s390_conv_t to s390_bfp_conv_t. Purely mechanical.
Modified files:
trunk/priv/host_s390_defs.c
trunk/priv/host_s390_defs.h
trunk/priv/host_s390_isel.c
Modified: trunk/priv/host_s390_defs.h (+5 -5)
===================================================================
--- trunk/priv/host_s390_defs.h 2012-12-21 21:05:17 +00:00 (rev 2608)
+++ trunk/priv/host_s390_defs.h 2012-12-21 21:43:00 +00:00 (rev 2609)
@@ -233,7 +233,7 @@
S390_BFP_F128_TO_U64,
S390_BFP_F128_TO_F32,
S390_BFP_F128_TO_F64
-} s390_conv_t;
+} s390_bfp_conv_t;
/* Type conversion operations: to and/or from decimal floating point */
typedef enum {
@@ -492,7 +492,7 @@
HReg op_lo; /* 128-bit operand low part */
} bfp_unop;
struct {
- s390_conv_t tag;
+ s390_bfp_conv_t tag;
s390_bfp_round_t rounding_mode;
HReg dst_hi; /* 128-bit result high part; 32/64-bit result */
HReg dst_lo; /* 128-bit result low part */
@@ -623,7 +623,7 @@
s390_insn *s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst,
HReg op);
s390_insn *s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2);
-s390_insn *s390_insn_bfp_convert(UChar size, s390_conv_t tag, HReg dst,
+s390_insn *s390_insn_bfp_convert(UChar size, s390_bfp_conv_t tag, HReg dst,
HReg op, s390_bfp_round_t);
s390_insn *s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t, HReg dst_hi,
HReg dst_lo, HReg op2_hi, HReg op2_lo);
@@ -631,9 +631,9 @@
HReg dst_lo, HReg op_hi, HReg op_lo);
s390_insn *s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi,
HReg op1_lo, HReg op2_hi, HReg op2_lo);
-s390_insn *s390_insn_bfp128_convert_to(UChar size, s390_conv_t,
+s390_insn *s390_insn_bfp128_convert_to(UChar size, s390_bfp_conv_t,
HReg dst_hi, HReg dst_lo, HReg op);
-s390_insn *s390_insn_bfp128_convert_from(UChar size, s390_conv_t,
+s390_insn *s390_insn_bfp128_convert_from(UChar size, s390_bfp_conv_t,
HReg dst, HReg op_hi, HReg op_lo,
s390_bfp_round_t);
s390_insn *s390_insn_dfp_binop(UChar size, s390_dfp_binop_t, HReg dst,
Modified: trunk/priv/host_s390_defs.c (+4 -4)
===================================================================
--- trunk/priv/host_s390_defs.c 2012-12-21 21:05:17 +00:00 (rev 2608)
+++ trunk/priv/host_s390_defs.c 2012-12-21 21:43:00 +00:00 (rev 2609)
@@ -5094,7 +5094,7 @@
s390_insn *
-s390_insn_bfp_convert(UChar size, s390_conv_t tag, HReg dst, HReg op,
+s390_insn_bfp_convert(UChar size, s390_bfp_conv_t tag, HReg dst, HReg op,
s390_bfp_round_t rounding_mode)
{
s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
@@ -5196,7 +5196,7 @@
static s390_insn *
-s390_insn_bfp128_convert(UChar size, s390_conv_t tag, HReg dst_hi,
+s390_insn_bfp128_convert(UChar size, s390_bfp_conv_t tag, HReg dst_hi,
HReg dst_lo, HReg op_hi, HReg op_lo,
s390_bfp_round_t rounding_mode)
{
@@ -5226,7 +5226,7 @@
s390_insn *
-s390_insn_bfp128_convert_to(UChar size, s390_conv_t tag, HReg dst_hi,
+s390_insn_bfp128_convert_to(UChar size, s390_bfp_conv_t tag, HReg dst_hi,
HReg dst_lo, HReg op)
{
/* Conversion to bfp128 never requires a rounding mode. Provide default
@@ -5239,7 +5239,7 @@
s390_insn *
-s390_insn_bfp128_convert_from(UChar size, s390_conv_t tag, HReg dst,
+s390_insn_bfp128_convert_from(UChar size, s390_bfp_conv_t tag, HReg dst,
HReg op_hi, HReg op_lo,
s390_bfp_round_t rounding_mode)
{
Modified: trunk/priv/host_s390_isel.c (+4 -4)
===================================================================
--- trunk/priv/host_s390_isel.c 2012-12-21 21:05:17 +00:00 (rev 2608)
+++ trunk/priv/host_s390_isel.c 2012-12-21 21:43:00 +00:00 (rev 2609)
@@ -975,7 +975,7 @@
{
IRType ty = typeOfIRExpr(env->type_env, expr);
UChar size;
- s390_conv_t conv;
+ s390_bfp_conv_t conv;
vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64);
@@ -1891,7 +1891,7 @@
case Iex_Unop: {
IRExpr *left = expr->Iex.Unop.arg;
s390_bfp_unop_t bfpop;
- s390_conv_t conv;
+ s390_bfp_conv_t conv;
HReg op_hi, op_lo, op, f12, f13, f14, f15;
/* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
@@ -2104,7 +2104,7 @@
IRExpr *irrm = expr->Iex.Binop.arg1;
IRExpr *left = expr->Iex.Binop.arg2;
HReg h1, dst;
- s390_conv_t conv;
+ s390_bfp_conv_t conv;
switch (op) {
case Iop_SqrtF32:
@@ -2189,7 +2189,7 @@
IROp op = expr->Iex.Unop.op;
IRExpr *left = expr->Iex.Unop.arg;
s390_bfp_unop_t bfpop;
- s390_conv_t conv;
+ s390_bfp_conv_t conv;
HReg h1, dst;
if (op == Iop_F128HItoF64 || op == Iop_F128LOtoF64) {
|
|
From: <sv...@va...> - 2012-12-21 21:05:30
|
florian 2012-12-21 21:05:17 +0000 (Fri, 21 Dec 2012)
New Revision: 2608
Log:
s390: Distinguish between conversion to/from IRCmpFxxResult and
IRCmpDxxResult, even though the encodings are currently the same.
Rename convert_s390_fpcc_to_vex to convert_s390_to_vex_bfpcc.
Add convert_s390_to_vex_dfpcc and convert_vex_dfpcc_to_s390.
Modified files:
trunk/priv/guest_s390_toIR.c
trunk/priv/host_s390_isel.c
Modified: trunk/priv/guest_s390_toIR.c (+71 -53)
===================================================================
--- trunk/priv/guest_s390_toIR.c 2012-12-21 20:24:24 +00:00 (rev 2607)
+++ trunk/priv/guest_s390_toIR.c 2012-12-21 21:05:17 +00:00 (rev 2608)
@@ -50,7 +50,6 @@
static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp);
static void s390_irgen_CLC_EX(IRTemp, IRTemp, IRTemp);
-static IRExpr *convert_vex_fpcc_to_s390(IRTemp);
/*------------------------------------------------------------*/
@@ -1619,6 +1618,70 @@
/*------------------------------------------------------------*/
+/*--- Condition code helpers ---*/
+/*------------------------------------------------------------*/
+
+/* The result of a Iop_CmpFxx operation is a condition code. It is
+ encoded using the values defined in type IRCmpFxxResult.
+ Before we can store the condition code into the guest state (or do
+ anything else with it for that matter) we need to convert it to
+ the encoding that s390 uses. This is what this function does.
+
+ s390 VEX b6 b2 b0 cc.1 cc.0
+ 0 0x40 EQ 1 0 0 0 0
+ 1 0x01 LT 0 0 1 0 1
+ 2 0x00 GT 0 0 0 1 0
+ 3 0x45 Unordered 1 1 1 1 1
+
+ The following bits from the VEX encoding are interesting:
+ b0, b2, b6 with b0 being the LSB. We observe:
+
+ cc.0 = b0;
+ cc.1 = b2 | (~b0 & ~b6)
+
+ with cc being the s390 condition code.
+*/
+static IRExpr *
+convert_vex_bfpcc_to_s390(IRTemp vex_cc)
+{
+ IRTemp cc0 = newTemp(Ity_I32);
+ IRTemp cc1 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b6 = newTemp(Ity_I32);
+
+ assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
+ assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
+ mkU32(1)));
+ assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
+ mkU32(1)));
+
+ assign(cc0, mkexpr(b0));
+ assign(cc1, binop(Iop_Or32, mkexpr(b2),
+ binop(Iop_And32,
+ binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
+ binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
+ )));
+
+ return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
+}
+
+
+/* The result of a Iop_CmpDxx operation is a condition code. It is
+ encoded using the values defined in type IRCmpDxxResult.
+ Before we can store the condition code into the guest state (or do
+ anything else with it for that matter) we need to convert it to
+ the encoding that s390 uses. This is what this function does. */
+static IRExpr *
+convert_vex_dfpcc_to_s390(IRTemp vex_cc)
+{
+ /* The VEX encodings for IRCmpDxxResult and IRCmpFxxResult are the
+ same. currently. */
+ return convert_vex_dfpcc_to_s390(vex_cc);
+}
+
+
+/*------------------------------------------------------------*/
/*--- Build IR for formats ---*/
/*------------------------------------------------------------*/
static void
@@ -9194,7 +9257,7 @@
assign(op2, get_dpr_dw0(r2));
assign(cc_vex, binop(Iop_CmpD64, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_dfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "cdtr";
@@ -9212,7 +9275,7 @@
assign(op2, get_dpr_pair(r2));
assign(cc_vex, binop(Iop_CmpD128, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_dfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "cxtr";
@@ -10849,51 +10912,6 @@
return "axbr";
}
-/* The result of a Iop_CmdFxx operation is a condition code. It is
- encoded using the values defined in type IRCmpFxxResult.
- Before we can store the condition code into the guest state (or do
- anything else with it for that matter) we need to convert it to
- the encoding that s390 uses. This is what this function does.
-
- s390 VEX b6 b2 b0 cc.1 cc.0
- 0 0x40 EQ 1 0 0 0 0
- 1 0x01 LT 0 0 1 0 1
- 2 0x00 GT 0 0 0 1 0
- 3 0x45 Unordered 1 1 1 1 1
-
- The following bits from the VEX encoding are interesting:
- b0, b2, b6 with b0 being the LSB. We observe:
-
- cc.0 = b0;
- cc.1 = b2 | (~b0 & ~b6)
-
- with cc being the s390 condition code.
-*/
-static IRExpr *
-convert_vex_fpcc_to_s390(IRTemp vex_cc)
-{
- IRTemp cc0 = newTemp(Ity_I32);
- IRTemp cc1 = newTemp(Ity_I32);
- IRTemp b0 = newTemp(Ity_I32);
- IRTemp b2 = newTemp(Ity_I32);
- IRTemp b6 = newTemp(Ity_I32);
-
- assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
- assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
- mkU32(1)));
- assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
- mkU32(1)));
-
- assign(cc0, mkexpr(b0));
- assign(cc1, binop(Iop_Or32, mkexpr(b2),
- binop(Iop_And32,
- binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
- binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
- )));
-
- return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
-}
-
static const HChar *
s390_irgen_CEBR(UChar r1, UChar r2)
{
@@ -10906,7 +10924,7 @@
assign(op2, get_fpr_w0(r2));
assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_bfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "cebr";
@@ -10924,7 +10942,7 @@
assign(op2, get_fpr_dw0(r2));
assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_bfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "cdbr";
@@ -10942,7 +10960,7 @@
assign(op2, get_fpr_pair(r2));
assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_bfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "cxbr";
@@ -10960,7 +10978,7 @@
assign(op2, load(Ity_F32, mkexpr(op2addr)));
assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_bfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "ceb";
@@ -10978,7 +10996,7 @@
assign(op2, load(Ity_F64, mkexpr(op2addr)));
assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
- assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ assign(cc_s390, convert_vex_bfpcc_to_s390(cc_vex));
s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
return "cdb";
Modified: trunk/priv/host_s390_isel.c (+20 -6)
===================================================================
--- trunk/priv/host_s390_isel.c 2012-12-21 20:24:24 +00:00 (rev 2607)
+++ trunk/priv/host_s390_isel.c 2012-12-21 21:05:17 +00:00 (rev 2608)
@@ -727,8 +727,13 @@
return S390_DFP_ROUND_PER_FPC_0;
}
+
+/*---------------------------------------------------------*/
+/*--- Condition code helper functions ---*/
+/*---------------------------------------------------------*/
+
/* CC_S390 holds the condition code in s390 encoding. Convert it to
- VEX encoding
+ VEX encoding (IRCmpFResult)
s390 VEX b6 b2 b0 cc.1 cc.0
0 0x40 EQ 1 0 0 0 0
@@ -743,7 +748,7 @@
VEX = b0 | (b2 << 2) | (b6 << 6);
*/
static HReg
-convert_s390_fpcc_to_vex(ISelEnv *env, HReg cc_s390)
+convert_s390_to_vex_bfpcc(ISelEnv *env, HReg cc_s390)
{
HReg cc0, cc1, b2, b6, cc_vex;
@@ -775,7 +780,16 @@
return cc_vex;
}
+/* CC_S390 holds the condition code in s390 encoding. Convert it to
+ VEX encoding (IRCmpDResult) */
+static HReg
+convert_s390_to_vex_dfpcc(ISelEnv *env, HReg cc_s390)
+{
+ /* The encodings for IRCmpFResult and IRCmpDResult are the same/ */
+ return convert_s390_to_vex_bfpcc(env, cc_s390);
+}
+
/*---------------------------------------------------------*/
/*--- ISEL: Integer expressions (128 bit) ---*/
/*---------------------------------------------------------*/
@@ -1177,7 +1191,7 @@
addInstr(env, s390_insn_bfp_compare(size, cc_s390, h1, h2));
- return convert_s390_fpcc_to_vex(env, cc_s390);
+ return convert_s390_to_vex_bfpcc(env, cc_s390);
}
case Iop_CmpF128: {
@@ -1204,7 +1218,7 @@
res = newVRegI(env);
addInstr(env, s390_insn_bfp128_compare(16, cc_s390, f12, f14, f13, f15));
- return convert_s390_fpcc_to_vex(env, cc_s390);
+ return convert_s390_to_vex_bfpcc(env, cc_s390);
}
case Iop_CmpD64: {
@@ -1217,7 +1231,7 @@
addInstr(env, s390_insn_dfp_compare(size, cc_s390, h1, h2));
- return convert_s390_fpcc_to_vex(env, cc_s390);
+ return convert_s390_to_vex_dfpcc(env, cc_s390);
}
case Iop_CmpD128: {
@@ -1244,7 +1258,7 @@
res = newVRegI(env);
addInstr(env, s390_insn_dfp128_compare(16, cc_s390, f12, f14, f13, f15));
- return convert_s390_fpcc_to_vex(env, cc_s390);
+ return convert_s390_to_vex_dfpcc(env, cc_s390);
}
case Iop_Add8:
|
|
From: <sv...@va...> - 2012-12-21 20:24:37
|
florian 2012-12-21 20:24:24 +0000 (Fri, 21 Dec 2012)
New Revision: 2607
Log:
Define IRCmpD64Result and IRCmpD128Result.
Modified files:
trunk/pub/libvex_ir.h
Modified: trunk/pub/libvex_ir.h (+11 -5)
===================================================================
--- trunk/pub/libvex_ir.h 2012-12-21 18:55:03 +00:00 (rev 2606)
+++ trunk/pub/libvex_ir.h 2012-12-21 20:24:24 +00:00 (rev 2607)
@@ -1070,7 +1070,7 @@
* D64 x D64 -> IRCmpD64Result(I32) */
Iop_CmpD64,
- /* D128 x D128 -> IRCmpD64Result(I32) */
+ /* D128 x D128 -> IRCmpD128Result(I32) */
Iop_CmpD128,
/* QUANTIZE AND ROUND INSTRUCTIONS
@@ -1522,7 +1522,7 @@
}
IRRoundingModeDFP;
-/* Floating point comparison result values, as created by Iop_CmpF64.
+/* Binary floating point comparison result values.
This is also derived from what IA32 does. */
typedef
enum {
@@ -1531,11 +1531,17 @@
Ircr_GT = 0x00,
Ircr_EQ = 0x40
}
- IRCmpF64Result;
+ IRCmpFResult;
-typedef IRCmpF64Result IRCmpF32Result;
-typedef IRCmpF64Result IRCmpF128Result;
+typedef IRCmpFResult IRCmpF32Result;
+typedef IRCmpFResult IRCmpF64Result;
+typedef IRCmpFResult IRCmpF128Result;
+/* Decimal floating point result values. */
+typedef IRCmpFResult IRCmpDResult;
+typedef IRCmpDResult IRCmpD64Result;
+typedef IRCmpDResult IRCmpD128Result;
+
/* ------------------ Expressions ------------------ */
typedef struct _IRQop IRQop; /* forward declaration */
|
|
From: <sv...@va...> - 2012-12-21 18:55:12
|
florian 2012-12-21 18:55:03 +0000 (Fri, 21 Dec 2012)
New Revision: 2606
Log:
s390: Add support for storing DFP values (32/64 bit).
Modified files:
trunk/priv/host_s390_isel.c
Modified: trunk/priv/host_s390_isel.c (+5 -0)
===================================================================
--- trunk/priv/host_s390_isel.c 2012-12-21 17:32:12 +00:00 (rev 2605)
+++ trunk/priv/host_s390_isel.c 2012-12-21 18:55:03 +00:00 (rev 2606)
@@ -2911,6 +2911,11 @@
src = s390_isel_float_expr(env, stmt->Ist.Store.data);
break;
+ case Ity_D32:
+ case Ity_D64:
+ src = s390_isel_dfp_expr(env, stmt->Ist.Store.data);
+ break;
+
case Ity_F128:
case Ity_D128:
/* Cannot occur. No such instruction */
|
|
From: <sv...@va...> - 2012-12-21 18:35:01
|
florian 2012-12-21 18:34:48 +0000 (Fri, 21 Dec 2012)
New Revision: 13195
Log:
Companion patch to VEX r2605. Adds a few testcases and adapts the vbit
tester. This is part of fixing BZ #307113.
Patch by Maran Pakkirisamy (ma...@li...).
Added files:
trunk/none/tests/s390x/dfp-2.c
trunk/none/tests/s390x/dfp-2.stderr.exp
trunk/none/tests/s390x/dfp-2.stdout.exp
trunk/none/tests/s390x/dfp-2.vgtest
trunk/none/tests/s390x/dfp_utils.h
Modified directories:
trunk/none/tests/s390x/
Modified files:
trunk/memcheck/tests/vbit-test/irops.c
trunk/none/tests/s390x/Makefile.am
trunk/none/tests/s390x/dfp-1.c
trunk/none/tests/s390x/dfp-1.stdout.exp
trunk/none/tests/s390x/opcodes.h
Modified: trunk/none/tests/s390x/
Modified: trunk/none/tests/s390x/dfp-1.stdout.exp (+33 -9)
===================================================================
--- trunk/none/tests/s390x/dfp-1.stdout.exp 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp-1.stdout.exp 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -1,9 +1,33 @@
-Decimal floating point 64-bit arithmetic
-dfp64_add: 2220ff3fcff3fcff
-dfp64_add: 6e24ff3fcff3fcff
-dfp64_sub: ee20ff3fcff3fcff
-dfp64_sub: ee24ff3fcff3fcff
-dfp64_mul: 6e208c0000000000
-dfp64_mul: 6e248c0000000000
-dfp64_div: 6a206ec7ff7fab55
-dfp64_div: 2a3dec7b1ec7b1ed
+Decimal floating point arithmetic
+64-bit ADD
+2230000000000194 + 222c000000000005 = 222c000000000cc5 cc = 2
+a230000000000194 + 222c000000000005 = a22c000000000cb5 cc = 1
+2230000000000194 + a230000000000194 = 2230000000000000 cc = 0
+64-bit SUBTRACT
+2230000000000194 - 222c000000000005 = 222c000000000cb5 cc = 2
+a230000000000194 - 222c000000000005 = a22c000000000cc5 cc = 1
+2230000000000194 - 2230000000000194 = 2230000000000000 cc = 0
+64-bit MULTIPLY
+2230000000000194 * 2238000000000007 = 22300000000008de cc = 0
+a230000000000194 * 2238000000000007 = a2300000000008de cc = 0
+a230000000000194 * 2238000000000000 = a230000000000000 cc = 0
+64-bit DIVIDE
+2238000000000022 / 2238000000000007 = 2dfcc2d74c2d74c3 cc = 0
+a238000000000022 / 2238000000000007 = adfcc2d74c2d74c3 cc = 0
+2238000000000000 / 2238000000000007 = 2238000000000000 cc = 0
+128-bit ADD
+220780000000000000000194 + 220740000000000000000005 = 220740000000000000000cc5 cc = 2
+a20780000000000000000194 + 220740000000000000000005 = a20740000000000000000cb5 cc = 1
+220780000000000000000194 + a20780000000000000000194 = 220780000000000000000000 cc = 0
+128-bit SUBTRACT
+220780000000000000000194 - 220740000000000000000005 = 220740000000000000000cb5 cc = 2
+a20780000000000000000194 - 220740000000000000000005 = a20740000000000000000cc5 cc = 1
+220780000000000000000194 - 220780000000000000000194 = 220780000000000000000000 cc = 0
+128-bit MULTIPLY
+220780000000000000000194 * 220800000000000000000007 = 2207800000000000000008de cc = 0
+a20780000000000000000194 * 220800000000000000000007 = a207800000000000000008de cc = 0
+220780000000000000000194 * 220800000000000000000000 = 220780000000000000000000 cc = 0
+128-bit DIVIDE
+220800000000000000000022 / 220800000000000000000007 = 2dffcc2d74c2d74c2d74c2d74c2d74c3 cc = 0
+a20800000000000000000022 / 220800000000000000000007 = adffcc2d74c2d74c2d74c2d74c2d74c3 cc = 0
+220800000000000000000000 / 220800000000000000000007 = 220800000000000000000000 cc = 0
Modified: trunk/memcheck/tests/vbit-test/irops.c (+19 -19)
===================================================================
--- trunk/memcheck/tests/vbit-test/irops.c 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/memcheck/tests/vbit-test/irops.c 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -477,30 +477,30 @@
{ DEFOP(Iop_Recip32x2, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Rsqrte32x2, UNDEF_UNKNOWN), },
/* ------------------ Decimal Floating Point ------------------ */
- { DEFOP(Iop_AddD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_SubD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_MulD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_DivD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_AddD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_SubD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_MulD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_DivD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_AddD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_SubD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MulD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_DivD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_AddD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_SubD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_MulD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_DivD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_ShlD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_ShrD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_ShlD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_ShrD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D32toD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D64toD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D32toD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D64toD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_I64StoD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D64toD32, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D128toD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D64toD32, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D128toD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_I64StoD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_D64toI64S, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_D128toI64S, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_RoundD64toInt, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_RoundD128toInt, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_CmpD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_CmpD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_CmpD64, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_CmpD128, UNDEF_ALL), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_QuantizeD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_QuantizeD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_SignificanceRoundD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
@@ -509,13 +509,13 @@
{ DEFOP(Iop_ExtractExpD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_InsertExpD64, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_InsertExpD128, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D64HLtoD128, UNDEF_CONCAT), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D128HItoD64, UNDEF_UPPER), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_D128LOtoD64, UNDEF_TRUNC), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D64HLtoD128, UNDEF_CONCAT), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D128HItoD64, UNDEF_UPPER), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_D128LOtoD64, UNDEF_TRUNC), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_DPBtoBCD, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
{ DEFOP(Iop_BCDtoDPB, UNDEF_ALL), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_ReinterpI64asD64, UNDEF_SAME), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
- { DEFOP(Iop_ReinterpD64asI64, UNDEF_SAME), .s390x = 0, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_ReinterpI64asD64, UNDEF_SAME), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
+ { DEFOP(Iop_ReinterpD64asI64, UNDEF_SAME), .s390x = 1, .ppc64 = 1, .ppc32 = 1 },
/* ------------------ 128-bit SIMD FP. ------------------ */
{ DEFOP(Iop_Add32Fx4, UNDEF_UNKNOWN), },
{ DEFOP(Iop_Sub32Fx4, UNDEF_UNKNOWN), },
Added: trunk/none/tests/s390x/dfp-2.c (+79 -0)
===================================================================
--- trunk/none/tests/s390x/dfp-2.c 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp-2.c 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -0,0 +1,79 @@
+#include <stdio.h>
+#include "dfp_utils.h"
+
+/* Test various DFP ops:
+ - extract significance 64/128 bit
+ - load and test 64/128 bit
+*/
+
+#if 0 //fixs390: enable it when Iop_ExtractSigD64/D128 is available
+void esdtr(_Decimal64 in)
+{
+ long out;
+ asm volatile(".insn rre, 0xb3e70000, %[out], %[in]\n\t"
+ :[out] "=d" (out) :[in] "f" (in));
+ printf("ESDTR ");
+ DFP_VAL_PRINT(in, _Decimal64);
+ printf(" -> %ld\n", out);
+}
+
+void esxtr(_Decimal128 in)
+{
+ long out;
+ asm volatile(".insn rre, 0xb3ef0000, %[out], %[in]\n\t"
+ :[out] "=d" (out) :[in] "f" (in));
+ printf("ESXTR ");
+ DFP_VAL_PRINT(in, _Decimal128);
+ printf(" -> %ld\n", out);
+}
+#endif
+
+void ltdtr(_Decimal64 in)
+{
+ _Decimal64 out;
+ int cc;
+ asm volatile(".insn rre, 0xb3d60000, %[out], %[in]\n\t"
+ "ipm %1\n\t"
+ "srl %1,28\n\t"
+ :[out] "=d" (out), "=d" (cc)
+ :[in] "f" (in));
+ printf("LTDTR ");
+ DFP_VAL_PRINT(in, _Decimal64);
+ printf(" -> %d\n", cc);
+}
+
+void ltxtr(_Decimal128 in)
+{
+ _Decimal128 out;
+ int cc;
+ asm volatile(".insn rre, 0xb3de0000, %[out], %[in]\n\t"
+ "ipm %1\n\t"
+ "srl %1,28\n\t"
+ :[out] "=f" (out), "=d" (cc)
+ :[in] "f" (in));
+ printf("LTXTR ");
+ DFP_VAL_PRINT(in, _Decimal128);
+ printf(" -> %d\n", cc);
+}
+
+int main() {
+ _Decimal64 d64 = 50.0005DD;
+ _Decimal128 d128 = 50.0005DL;
+
+#if 0 //fixs390: enable it when Iop_ExtractSigD64/D128 is available
+ esdtr(d64);
+ esdtr(-d64);
+ esdtr(0.DD);
+ esxtr(d128);
+ esxtr(-d128);
+ esxtr(0.DL);
+#endif
+ ltdtr(d64);
+ ltdtr(-d64);
+ ltdtr(0.0DD);
+ ltxtr(d128);
+ ltxtr(-d128);
+ ltxtr(0.0DL);
+
+ return 0;
+}
Modified: trunk/none/tests/s390x/dfp-1.c (+156 -57)
===================================================================
--- trunk/none/tests/s390x/dfp-1.c 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp-1.c 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -1,74 +1,173 @@
#include <stdio.h>
#include "opcodes.h"
+#include "dfp_utils.h"
-volatile _Decimal64 d64_1, d64_2;
+volatile _Decimal64 d64_1, d64_2, result_64;
+volatile _Decimal128 d128_1, d128_2, result_128;
-#define DFP64_BINOP(insn, op1, op2, type, round, cc) \
-({ \
- register type f1 asm("f1") = op1; \
- register type f2 asm("f2") = op2; \
- /* f1 = f1 (op) f2 */ \
- asm volatile(insn(2,round,1,1) \
- "ipm %1\n\t" \
- "srl %1,28\n\t" \
- :"+f" (f1), "=d" (cc) \
- :"f"(f2) \
- ); \
- f1; \
-})
+#define DFP_BINOP(insn, op1, op2, type, round, cc) \
+ ({ \
+ register type d1 asm("f0") = op1; \
+ register type d2 asm("f1") = op2; \
+ /* d1 = d1 (op) d2 */ \
+ asm volatile(insn(1,round,0,0) \
+ "ipm %1\n\t" \
+ "srl %1,28\n\t" \
+ :"+f" (d1), "=d" (cc) \
+ :"f"(d2) \
+ ); \
+ d1; \
+ })
int main() {
- _Decimal64 result;
int cc;
- printf("Decimal floating point 64-bit arithmetic\n");
- // fixs390: print result in DFP format once required insns are supported.
+ printf("Decimal floating point arithmetic\n");
/* 64-bit ADD */
- /* case 1: result has maximum significand digits */
- d64_1 = 999999999.0DD;
- d64_2 = 0.999999DD;
- result = DFP64_BINOP(ADTRA, d64_1, d64_2, _Decimal64, 1, cc);
- printf("dfp64_add: %lx\n", *((unsigned long *) &result));
- /* case 2: result is rounded */
- d64_1 = 99999999999.0DD;
- d64_2 = 0.999999DD;
- result = DFP64_BINOP(ADTRA, d64_1, d64_2, _Decimal64, 3, cc);
- printf("dfp64_add: %lx\n", *((unsigned long *) &result));
+ printf("64-bit ADD\n");
+ /* case 1: cc = 2 */
+ d64_1 = 3.14DD;
+ d64_2 = 0.005DD;
+ result_64 = DFP_BINOP(ADTRA, d64_1, d64_2, _Decimal64, 1, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "+", cc);
+ /* case 2: cc = 1 */
+ d64_1 = -3.14DD;
+ d64_2 = 0.005DD;
+ result_64 = DFP_BINOP(ADTRA, d64_1, d64_2, _Decimal64, 1, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "+", cc);
+ /* case 2: cc = 0 */
+ d64_1 = 3.14DD;
+ d64_2 = -d64_1;
+ result_64 = DFP_BINOP(ADTRA, d64_1, d64_2, _Decimal64, 3, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "+", cc);
+
/* 64-bit SUBTRACT */
- /* case 1: result has maximum significand digits */
- d64_1 = 0.000001DD;
- d64_2 = 10000000000.0DD;
- result = DFP64_BINOP(SDTRA, d64_1, d64_2, _Decimal64, 4, cc);
- printf("dfp64_sub: %lx\n", *((unsigned long *) &result));
- /* case 2: result is rounded */
- d64_1 = 0.000001DD;
- d64_2 = 100000000000.0DD;
- result = DFP64_BINOP(SDTRA, d64_1, d64_2, _Decimal64, 5, cc);
- printf("dfp64_sub: %lx\n", *((unsigned long *) &result));
+ printf("64-bit SUBTRACT\n");
+ /* case 1: cc = 2 */
+ d64_1 = 3.14DD;
+ d64_2 = 0.005DD;
+ result_64 = DFP_BINOP(SDTRA, d64_1, d64_2, _Decimal64, 4, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "-", cc);
+ /* case 2: cc = 1 */
+ d64_1 = -3.14DD;
+ d64_2 = 0.005DD;
+ result_64 = DFP_BINOP(SDTRA, d64_1, d64_2, _Decimal64, 5, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "-", cc);
+ /* case 3: cc = 0 */
+ d64_1 = 3.14DD;
+ d64_2 = d64_1;
+ result_64 = DFP_BINOP(SDTRA, d64_1, d64_2, _Decimal64, 5, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "-", cc);
/* 64-bit MULTIPLY */
- /* case 1: result has maximum significand digits */
- d64_1 = 9999999999.999999DD;
- d64_2 = .99DD;
- result = DFP64_BINOP(MDTRA, d64_1, d64_2, _Decimal64, 6, cc);
- printf("dfp64_mul: %lx\n", *((unsigned long *) &result));
- /* case 2: result is rounded */
- d64_1 = 99999999999.999999DD;
- d64_2 = .99DD;
- result = DFP64_BINOP(MDTRA, d64_1, d64_2, _Decimal64, 7, cc);
- printf("dfp64_mul: %lx\n", *((unsigned long *) &result));
+ printf("64-bit MULTIPLY\n");
+ /* case 1: cc = 2 */
+ d64_1 = 3.14DD;
+ d64_2 = 7.DD;
+ result_64 = DFP_BINOP(MDTRA, d64_1, d64_2, _Decimal64, 6, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "*", cc);
+ /* case 2: cc = 1 */
+ d64_1 = -3.14DD;
+ d64_2 = 7.DD;
+ result_64 = DFP_BINOP(MDTRA, d64_1, d64_2, _Decimal64, 7, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "*", cc);
+ /* case 3: cc = 0 */
+ d64_1 = -3.14DD;
+ d64_2 = 0.DD;
+ result_64 = DFP_BINOP(MDTRA, d64_1, d64_2, _Decimal64, 7, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "*", cc);
/* 64-bit DIVIDE */
- /* case 1: result has maximum significand digits */
- d64_1 = 8888888888.888877DD;
- d64_2 = 0.999999DD;
- result = DFP64_BINOP(DDTRA, d64_1, d64_2, _Decimal64, d, cc);
- printf("dfp64_div: %lx\n", *((unsigned long *) &result));
- /* case 2: result is rounded */
- d64_1 = 88888888888.888877DD;
- d64_2 = 0.000003DD;
- result = DFP64_BINOP(DDTRA, d64_1, d64_2, _Decimal64, e, cc);
- printf("dfp64_div: %lx\n", *((unsigned long *) &result));
+ printf("64-bit DIVIDE\n");
+ /* case 1: cc = 2 */
+ d64_1 = 22.DD;
+ d64_2 = 7.DD;
+ result_64 = DFP_BINOP(DDTRA, d64_1, d64_2, _Decimal64, d, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "/", cc);
+ /* case 2: cc = 1 */
+ d64_1 = -22.DD;
+ d64_2 = 7.DD;
+ result_64 = DFP_BINOP(DDTRA, d64_1, d64_2, _Decimal64, e, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "/", cc);
+ /* case 3: cc = 0 */
+ d64_1 = 0.DD;
+ d64_2 = 7.DD;
+ result_64 = DFP_BINOP(DDTRA, d64_1, d64_2, _Decimal64, e, cc);
+ DFP_BINOP_PRINT(d64_1, d64_2, result_64, _Decimal64, "/", cc);
+
+ /* 128-bit ADD */
+ printf("128-bit ADD\n");
+ /* case 1: cc = 2 */
+ d128_1 = 3.14DL;
+ d128_2 = 0.005DL;
+ result_128 = DFP_BINOP(AXTRA, d128_1, d128_2, _Decimal128, 1, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "+", cc);
+ /* case 2: cc = 1 */
+ d128_1 = -3.14DL;
+ d128_2 = 0.005DL;
+ result_128 = DFP_BINOP(AXTRA, d128_1, d128_2, _Decimal128, 1, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "+", cc);
+ /* case 3: cc = 0 */
+ d128_1 = 3.14DL;
+ d128_2 = -d128_1;
+ result_128 = DFP_BINOP(AXTRA, d128_1, d128_2, _Decimal128, 3, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "+", cc);
+
+ /* 128-bit SUBTRACT */
+ printf("128-bit SUBTRACT\n");
+ /* case 1: cc = 2 */
+ d128_1 = 3.14DL;
+ d128_2 = 0.005DL;
+ result_128 = DFP_BINOP(SXTRA, d128_1, d128_2, _Decimal128, 4, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "-", cc);
+ /* case 2: cc = 1 */
+ d128_1 = -3.14DL;
+ d128_2 = 0.005DL;
+ result_128 = DFP_BINOP(SXTRA, d128_1, d128_2, _Decimal128, 5, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "-", cc);
+ /* case 3: cc = 0 */
+ d128_1 = 3.14DL;
+ d128_2 = d128_1;
+ result_128 = DFP_BINOP(SXTRA, d128_1, d128_2, _Decimal128, 5, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "-", cc);
+
+ /* 128-bit MULTIPLY */
+ printf("128-bit MULTIPLY\n");
+ /* case 1: cc = 2 */
+ d128_1 = 3.14DL;
+ d128_2 = 7.DL;
+ result_128 = DFP_BINOP(MXTRA, d128_1, d128_2, _Decimal128, 6, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "*", cc);
+ /* case 2: cc = 1 */
+ d128_1 = -3.14DL;
+ d128_2 = 7.DL;
+ result_128 = DFP_BINOP(MXTRA, d128_1, d128_2, _Decimal128, 7, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "*", cc);
+ /* case 3: cc = 0 */
+ d128_1 = 3.14DL;
+ d128_2 = 0.DL;
+ result_128 = DFP_BINOP(MXTRA, d128_1, d128_2, _Decimal128, 7, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "*", cc);
+
+ /* 128-bit DIVIDE */
+ printf("128-bit DIVIDE\n");
+ /* case 1: cc = 2 */
+ d128_1 = 22.DL;
+ d128_2 = 7.DL;
+ result_128 = DFP_BINOP(DXTRA, d128_1, d128_2, _Decimal128, d, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "/", cc);
+ /* case 2: cc = 1 */
+ d128_1 = -22.DL;
+ d128_2 = 7.DL;
+ result_128 = DFP_BINOP(DXTRA, d128_1, d128_2, _Decimal128, e, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "/", cc);
+ /* case 3: cc = 0 */
+ d128_1 = 0.DL;
+ d128_2 = 7.DL;
+ result_128 = DFP_BINOP(DXTRA, d128_1, d128_2, _Decimal128, e, cc);
+ DFP_BINOP_PRINT(d128_1, d128_2, result_128, _Decimal128, "/", cc);
+
+ return 0;
}
Modified: trunk/none/tests/s390x/opcodes.h (+8 -0)
===================================================================
--- trunk/none/tests/s390x/opcodes.h 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/opcodes.h 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -127,15 +127,19 @@
#define ALY(r1,x2,b2,dl2,dh2) RXY_RRRD(e3,r1,x2,b2,dl2,dh2,5e)
#define ARK(r3,r1,r2) RRF_R0RR2(b9f8,r3,0,r1,r2)
#define ASI(i2,b1,dl1,dh1) SIY_IRD(eb,i2,b1,dl1,dh1,6a)
+#define AXTRA(r3,m4,r1,r2) RRF_FUFF2(b3da,r3,m4,r1,r2)
#define AY(r1,x2,b2,dl2,dh2) RXY_RRRD(e3,r1,x2,b2,dl2,dh2,5a)
#define CDFBRA(m3,m4,r1,r2) RRF_UUFR(b395,m3,m4,r1,r2)
#define CDGBRA(m3,m4,r1,r2) RRF_UUFR(b3a5,m3,m4,r1,r2)
#define CDLFBR(m3,m4,r1,r2) RRF_UUFR(b391,m3,m4,r1,r2)
#define CDLGBR(m3,m4,r1,r2) RRF_UUFR(b3a1,m3,m4,r1,r2)
+#define CDTR(r1,r2) RRE_RERE(b3e4,r1,r2)
+#define CEDTR(r1,r2) RRE_RERE(b3f4,r1,r2)
#define CEFBRA(m3,m4,r1,r2) RRF_UUFR(b394,m3,m4,r1,r2)
#define CEGBRA(m3,m4,r1,r2) RRF_UUFR(b3a4,m3,m4,r1,r2)
#define CELFBR(m3,m4,r1,r2) RRF_UUFR(b390,m3,m4,r1,r2)
#define CELGBR(m3,m4,r1,r2) RRF_UUFR(b3a0,m3,m4,r1,r2)
+#define CEXTR(r1,r2) RRE_RERE(b3fc,r1,r2)
#define CFEBRA(m3,m4,r1,r2) RRF_UURF(b398,m3,m4,r1,r2)
#define CFDBRA(m3,m4,r1,r2) RRF_UURF(b399,m3,m4,r1,r2)
#define CFI(r1,i2) RIL_RI(c2,r1,d,i2)
@@ -211,8 +215,10 @@
#define CXGBRA(m3,m4,r1,r2) RRF_UUFR(b3a6,m3,m4,r1,r2)
#define CXLFBR(m3,m4,r1,r2) RRF_UUFR(b392,m3,m4,r1,r2)
#define CXLGBR(m3,m4,r1,r2) RRF_UUFR(b3a2,m3,m4,r1,r2)
+#define CXTR(r1,r2) RRE_RERE(b3ec,r1,r2)
#define CY(r1,x2,b2,dl2,dh2) RXY_RRRD(e3,r1,x2,b2,dl2,dh2,59)
#define DDTRA(r3,m4,r1,r2) RRF_FUFF2(b3d1,r3,m4,r1,r2)
+#define DXTRA(r3,m4,r1,r2) RRF_FUFF2(b3d9,r3,m4,r1,r2)
#define EXRL(r1,i2) RIL_RP(c6,r1,0,i2)
#define FLOGR(r1,r2) RRE_RR(b983,00,r1,r2)
#define ICMY(r1,r3,b2,dl2,dh2) RSY_RURD(eb,r1,r3,b2,dl2,dh2,81)
@@ -287,6 +293,7 @@
#define MVHHI(b1,d1,i2) SIL_RDI(e544,b1,d1,i2)
#define MVHI(b1,d1,i2) SIL_RDI(e54c,b1,d1,i2)
#define MVIY(i2,b1,dl1,dh1) SIY_URD(eb,i2,b1,dl1,dh1,52)
+#define MXTRA(r3,m4,r1,r2) RRF_FUFF2(b3d8,r3,m4,r1,r2)
#define NGRK(r3,r1,r2) RRF_R0RR2(b9e4,r3,0,r1,r2)
#define NIHF(r1,i2) RIL_RU(c0,r1,a,i2)
#define NILF(r1,i2) RIL_RU(c0,r1,b,i2)
@@ -341,6 +348,7 @@
#define STOCG(r1,r3,b2,dl2,dh2) RSY_RDRM(eb,r1,r3,b2,dl2,dh2,e3)
#define STRL(r1,i2) RIL_RP(c4,r1,f,i2)
#define STY(r1,x2,b2,dl2,dh2) RXY_RRRD(e3,r1,x2,b2,dl2,dh2,50)
+#define SXTRA(r3,m4,r1,r2) RRF_FUFF2(b3db,r3,m4,r1,r2)
#define SY(r1,x2,b2,dl2,dh2) RXY_RRRD(e3,r1,x2,b2,dl2,dh2,5b)
#define TMY(i2,b1,dl1,dh1) SIY_URD(eb,i2,b1,dl1,dh1,51)
#define XGRK(r3,r1,r2) RRF_R0RR2(b9e7,r3,0,r1,r2)
Added: trunk/none/tests/s390x/dfp-2.vgtest (+2 -0)
===================================================================
--- trunk/none/tests/s390x/dfp-2.vgtest 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp-2.vgtest 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -0,0 +1,2 @@
+prog: dfp-2
+prereq: test -e dfp-2 && ../../../tests/s390x_features s390x-dfp
Modified: trunk/none/tests/s390x/Makefile.am (+3 -2)
===================================================================
--- trunk/none/tests/s390x/Makefile.am 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/Makefile.am 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -19,7 +19,7 @@
spechelper-icm-1 spechelper-icm-2 spechelper-tmll \
spechelper-tm laa
if BUILD_DFP_TESTS
- INSN_TESTS += dfp-1
+ INSN_TESTS += dfp-1 dfp-2
endif
check_PROGRAMS = $(INSN_TESTS) \
@@ -35,7 +35,8 @@
fpext_fail.vgtest fpext_fail.stderr.exp fpext_fail.stdout.exp \
test.h opcodes.h add.h and.h div.h insert.h \
mul.h or.h sub.h xor.h table.h svc.h rounding.h \
- dfp-1.stderr.exp dfp-1.stdout.exp dfp-1.vgtest
+ dfp-1.stderr.exp dfp-1.stdout.exp dfp-1.vgtest \
+ dfp-2.stderr.exp dfp-2.stdout.exp dfp-2.vgtest
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
Property changed: trunk/none/tests/s390x (+0 -0)
___________________________________________________________________
Name: svn:ignore
- .deps
add
add_EI
add_GE
allexec
and
and_EI
clc
clcle
cvb
cvd
div
ex_clone
ex_sig
flogr
icm
insert
insert_EI
lam_stam
lpr
Makefile
Makefile.in
mul
mul_GE
mvst
or
or_EI
srst
sub
sub_EI
tcxb
xc
xor
xor_EI
stck
stcke
stckf
op_exception
fgx
condloadstore
fold_And16
stfle
op00
cksm
clcl
mvcl
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trot
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tr
tre
clrj
clgrj
crj
cgrj
clij
clgij
cij
cgij
cs
csg
cds
cdsg
cu21
cu21_1
cu24
cu24_1
cu42
cu12
cu12_1
cu14
cu14_1
cu41
ecag
fpext
fpext_warn
fpconv
rounding-1
rounding-2
rounding-3
rounding-4
rounding-5
bfp-1
bfp-2
bfp-3
bfp-4
srnm
srnmb
comp-1
comp-2
ex
exrl
tm
tmll
stmg
test_sig
test_clone
test_fork
clst
mvc
spechelper-algr
spechelper-tmll
spechelper-icm-1
spechelper-icm-2
spechelper-cr
spechelper-ltr
spechelper-alr
spechelper-clr
spechelper-slr
spechelper-slgr
spechelper-or
spechelper-tm
rounding-6
laa
+ .deps
add
add_EI
add_GE
allexec
and
and_EI
clc
clcle
cvb
cvd
div
ex_clone
ex_sig
flogr
icm
insert
insert_EI
lam_stam
lpr
Makefile
Makefile.in
mul
mul_GE
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or
or_EI
srst
sub
sub_EI
tcxb
xc
xor
xor_EI
stck
stcke
stckf
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condloadstore
fold_And16
stfle
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tre
clrj
clgrj
crj
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cs
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cu21
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cu24
cu24_1
cu42
cu12
cu12_1
cu14
cu14_1
cu41
ecag
fpext
fpext_warn
fpconv
rounding-1
rounding-2
rounding-3
rounding-4
rounding-5
bfp-1
bfp-2
bfp-3
bfp-4
srnm
srnmb
comp-1
comp-2
ex
exrl
tm
tmll
stmg
test_sig
test_clone
test_fork
clst
mvc
spechelper-algr
spechelper-tmll
spechelper-icm-1
spechelper-icm-2
spechelper-cr
spechelper-ltr
spechelper-alr
spechelper-clr
spechelper-slr
spechelper-slgr
spechelper-or
spechelper-tm
rounding-6
laa
dfp-1
dfp-2
Added: trunk/none/tests/s390x/dfp_utils.h (+27 -0)
===================================================================
--- trunk/none/tests/s390x/dfp_utils.h 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp_utils.h 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -0,0 +1,27 @@
+#ifndef DFP_UTILS_H
+#define DFP_UTILS_H
+
+/* convinience macros to print DFP values to avoid linking libdfp to
+ DFP testcases */
+
+#define DFP_VAL_PRINT(op, type) \
+ { \
+ size_t n = sizeof(type); \
+ if (n == 8) \
+ printf("%lx", *((unsigned long *) &op)); \
+ else \
+ printf("%lx%08lx", *((unsigned long *) &op), \
+ *(((unsigned long *) &op) + 1)); \
+ }
+
+#define DFP_BINOP_PRINT(op1, op2, result, type, op, cc) \
+ { \
+ DFP_VAL_PRINT(op1, type); \
+ printf(" "op" "); \
+ DFP_VAL_PRINT(op2, type); \
+ printf(" = "); \
+ DFP_VAL_PRINT(result, type); \
+ printf(" cc = %d\n", cc); \
+ }
+
+#endif /* DFP_UTILS_H */
Added: trunk/none/tests/s390x/dfp-2.stdout.exp (+6 -0)
===================================================================
--- trunk/none/tests/s390x/dfp-2.stdout.exp 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp-2.stdout.exp 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -0,0 +1,6 @@
+LTDTR 22280000000a0005 -> 2
+LTDTR a2280000000a0005 -> 1
+LTDTR 2234000000000000 -> 0
+LTXTR 2207000000000000000a0005 -> 2
+LTXTR a207000000000000000a0005 -> 1
+LTXTR 2207c0000000000000000000 -> 0
Added: trunk/none/tests/s390x/dfp-2.stderr.exp (+2 -0)
===================================================================
--- trunk/none/tests/s390x/dfp-2.stderr.exp 2012-12-21 10:34:08 +00:00 (rev 13194)
+++ trunk/none/tests/s390x/dfp-2.stderr.exp 2012-12-21 18:34:48 +00:00 (rev 13195)
@@ -0,0 +1,2 @@
+
+
|
|
From: <sv...@va...> - 2012-12-21 17:32:35
|
florian 2012-12-21 17:32:12 +0000 (Fri, 21 Dec 2012)
New Revision: 2605
Log:
Add support for these DFP insns:
AXTRA, CDTR, CXTR, DXTRA, LDETR, LXDTR, LDXTR, LEDTR, LTXTR, MXTRA, SXTRA
This is part of fixing BZ #307113.
Patch by Maran Pakkirisamy (ma...@li...) with some minor
mods.
Modified files:
trunk/priv/guest_s390_defs.h
trunk/priv/guest_s390_helpers.c
trunk/priv/guest_s390_toIR.c
trunk/priv/host_s390_defs.c
trunk/priv/host_s390_defs.h
trunk/priv/host_s390_isel.c
Modified: trunk/priv/guest_s390_defs.h (+3 -1)
===================================================================
--- trunk/priv/guest_s390_defs.h 2012-12-21 04:40:28 +00:00 (rev 2604)
+++ trunk/priv/guest_s390_defs.h 2012-12-21 17:32:12 +00:00 (rev 2605)
@@ -137,7 +137,8 @@
S390_CC_OP_BFP_32_TO_UINT_64 = 39,
S390_CC_OP_BFP_64_TO_UINT_64 = 40,
S390_CC_OP_BFP_128_TO_UINT_64 = 41,
- S390_CC_OP_DFP_RESULT_64 = 42
+ S390_CC_OP_DFP_RESULT_64 = 42,
+ S390_CC_OP_DFP_RESULT_128 = 43
};
/*------------------------------------------------------------*/
@@ -196,6 +197,7 @@
| S390_CC_OP_BFP_64_TO_UINT_64 | F source | Z rounding mode | |
| S390_CC_OP_BFP_128_TO_UINT_64 | F source hi 64 bits | F source low 64 bits | Z rounding mode |
| S390_CC_OP_DFP_RESULT_64 | D result | | |
+ | S390_CC_OP_DFP_RESULT_128 | D result hi 64 bits | D result low 64 bits | |
+--------------------------------+-----------------------+----------------------+-----------------+
*/
Modified: trunk/priv/host_s390_defs.h (+39 -1)
===================================================================
--- trunk/priv/host_s390_defs.h 2012-12-21 04:40:28 +00:00 (rev 2604)
+++ trunk/priv/host_s390_defs.h 2012-12-21 17:32:12 +00:00 (rev 2605)
@@ -138,6 +138,8 @@
S390_INSN_BFP_COMPARE,
S390_INSN_BFP_CONVERT,
S390_INSN_DFP_BINOP, /* Decimal floating point */
+ S390_INSN_DFP_COMPARE,
+ S390_INSN_DFP_CONVERT,
S390_INSN_MFENCE,
S390_INSN_MZERO, /* Assign zero to a memory location */
S390_INSN_GADD, /* Add a value to a guest register */
@@ -199,7 +201,7 @@
S390_BFP_SQRT
} s390_bfp_unop_t;
-/* Type conversion operations: to and/or from floating point */
+/* Type conversion operations: to and/or from binary floating point */
typedef enum {
S390_BFP_I32_TO_F32,
S390_BFP_I32_TO_F64,
@@ -233,6 +235,13 @@
S390_BFP_F128_TO_F64
} s390_conv_t;
+/* Type conversion operations: to and/or from decimal floating point */
+typedef enum {
+ S390_DFP_D32_TO_D64,
+ S390_DFP_D64_TO_D32,
+ S390_DFP_D64_TO_D128,
+ S390_DFP_D128_TO_D64
+} s390_dfp_conv_t;
/* The kind of binary DFP operations */
typedef enum {
@@ -507,6 +516,21 @@
HReg op3_lo; /* 128-bit operand low part */
s390_dfp_round_t rounding_mode;
} dfp_binop;
+ struct {
+ s390_dfp_conv_t tag;
+ s390_dfp_round_t rounding_mode;
+ HReg dst_hi; /* 128-bit result high part; 64-bit result */
+ HReg dst_lo; /* 128-bit result low part */
+ HReg op_hi; /* 128-bit operand high part; 64-bit opnd */
+ HReg op_lo; /* 128-bit operand low part */
+ } dfp_convert;
+ struct {
+ HReg dst; /* condition code in s390 encoding */
+ HReg op1_hi; /* 128-bit operand high part; 64-bit opnd 1 */
+ HReg op1_lo; /* 128-bit operand low part */
+ HReg op2_hi; /* 128-bit operand high part; 64-bit opnd 2 */
+ HReg op2_lo; /* 128-bit operand low part */
+ } dfp_compare;
/* Miscellaneous */
struct {
@@ -615,6 +639,20 @@
s390_insn *s390_insn_dfp_binop(UChar size, s390_dfp_binop_t, HReg dst,
HReg op2, HReg op3,
s390_dfp_round_t rounding_mode);
+s390_insn *s390_insn_dfp_compare(UChar size, HReg dst, HReg op1, HReg op2);
+s390_insn *s390_insn_dfp_convert(UChar size, s390_dfp_conv_t tag, HReg dst,
+ HReg op, s390_dfp_round_t);
+s390_insn *s390_insn_dfp128_binop(UChar size, s390_dfp_binop_t, HReg dst_hi,
+ HReg dst_lo, HReg op2_hi, HReg op2_lo,
+ HReg op3_hi, HReg op3_lo,
+ s390_dfp_round_t rounding_mode);
+s390_insn *s390_insn_dfp128_compare(UChar size, HReg dst, HReg op1_hi,
+ HReg op1_lo, HReg op2_hi, HReg op2_lo);
+s390_insn *s390_insn_dfp128_convert_to(UChar size, s390_dfp_conv_t,
+ HReg dst_hi, HReg dst_lo, HReg op);
+s390_insn *s390_insn_dfp128_convert_from(UChar size, s390_dfp_conv_t,
+ HReg dst, HReg op_hi, HReg op_lo,
+ s390_dfp_round_t);
s390_insn *s390_insn_mfence(void);
s390_insn *s390_insn_mzero(UChar size, s390_amode *dst);
s390_insn *s390_insn_gadd(UChar size, UInt offset, UChar delta, ULong value);
Modified: trunk/priv/host_s390_defs.c (+448 -10)
===================================================================
--- trunk/priv/host_s390_defs.c 2012-12-21 04:40:28 +00:00 (rev 2604)
+++ trunk/priv/host_s390_defs.c 2012-12-21 17:32:12 +00:00 (rev 2605)
@@ -714,6 +714,25 @@
}
break;
+ case S390_INSN_DFP_COMPARE:
+ addHRegUse(u, HRmWrite, insn->variant.dfp_compare.dst);
+ addHRegUse(u, HRmRead, insn->variant.dfp_compare.op1_hi); /* left */
+ addHRegUse(u, HRmRead, insn->variant.dfp_compare.op2_hi); /* right */
+ if (insn->size == 16) {
+ addHRegUse(u, HRmRead, insn->variant.dfp_compare.op1_lo); /* left */
+ addHRegUse(u, HRmRead, insn->variant.dfp_compare.op2_lo); /* right */
+ }
+ break;
+
+ case S390_INSN_DFP_CONVERT:
+ addHRegUse(u, HRmWrite, insn->variant.dfp_convert.dst_hi);
+ if (insn->variant.dfp_convert.dst_lo != INVALID_HREG)
+ addHRegUse(u, HRmWrite, insn->variant.dfp_convert.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.dfp_convert.op_hi); /* operand */
+ if (insn->variant.dfp_convert.op_lo != INVALID_HREG)
+ addHRegUse(u, HRmRead, insn->variant.dfp_convert.op_lo); /* operand */
+ break;
+
case S390_INSN_MZERO:
s390_amode_get_reg_usage(u, insn->variant.mzero.dst);
break;
@@ -966,6 +985,34 @@
}
break;
+ case S390_INSN_DFP_COMPARE:
+ insn->variant.dfp_compare.dst =
+ lookupHRegRemap(m, insn->variant.dfp_compare.dst);
+ insn->variant.dfp_compare.op1_hi =
+ lookupHRegRemap(m, insn->variant.dfp_compare.op1_hi);
+ insn->variant.dfp_compare.op2_hi =
+ lookupHRegRemap(m, insn->variant.dfp_compare.op2_hi);
+ if (insn->size == 16) {
+ insn->variant.dfp_compare.op1_lo =
+ lookupHRegRemap(m, insn->variant.dfp_compare.op1_lo);
+ insn->variant.dfp_compare.op2_lo =
+ lookupHRegRemap(m, insn->variant.dfp_compare.op2_lo);
+ }
+ break;
+
+ case S390_INSN_DFP_CONVERT:
+ insn->variant.dfp_convert.dst_hi =
+ lookupHRegRemap(m, insn->variant.dfp_convert.dst_hi);
+ if (insn->variant.dfp_convert.dst_lo != INVALID_HREG)
+ insn->variant.dfp_convert.dst_lo =
+ lookupHRegRemap(m, insn->variant.dfp_convert.dst_lo);
+ insn->variant.dfp_convert.op_hi =
+ lookupHRegRemap(m, insn->variant.dfp_convert.op_hi);
+ if (insn->variant.dfp_convert.op_lo != INVALID_HREG)
+ insn->variant.dfp_convert.op_lo =
+ lookupHRegRemap(m, insn->variant.dfp_convert.op_lo);
+ break;
+
case S390_INSN_MZERO:
s390_amode_map_regs(m, insn->variant.mzero.dst);
break;
@@ -1164,6 +1211,19 @@
static UChar *
+emit_RRF5(UChar *p, UInt op, UChar m4, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)m4) << 8;
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
emit_RS(UChar *p, UInt op, UChar r1, UChar r3, UChar b2, UShort d2)
{
ULong the_insn = op;
@@ -3895,6 +3955,44 @@
static UChar *
+s390_emit_AXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
+ if (m4 == 0)
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "axtr", r1, r2, r3);
+ else
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "axtra", r1, r2, r3, m4);
+ }
+
+ return emit_RRF4(p, 0xb3da0000, r3, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CDTR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cdtr", r1, r2);
+
+ return emit_RRE(p, 0xb3e40000, r1, r2);
+}
+
+
+static UChar *
+s390_emit_CXTR(UChar *p, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cxtr", r1, r2);
+
+ return emit_RRE(p, 0xb3ec0000, r1, r2);
+}
+
+
+static UChar *
s390_emit_DDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
{
vassert(s390_host_has_dfp);
@@ -3911,6 +4009,76 @@
static UChar *
+s390_emit_DXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
+ if (m4 == 0)
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "dxtr", r1, r2, r3);
+ else
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "dxtra", r1, r2, r3, m4);
+ }
+
+ return emit_RRF4(p, 0xb3d90000, r3, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LDETR(UChar *p, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, UINT), "ldetr", r1, r2, m4);
+
+ return emit_RRF5(p, 0xb3d40000, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LXDTR(UChar *p, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, UINT), "lxdtr", r1, r2, m4);
+
+ return emit_RRF5(p, 0xb3dc0000, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LEDTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0);
+ vassert(m3 == 0 || s390_host_has_fpext);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
+ s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
+ "ledtr", r1, m3, r2, m4);
+ }
+
+ return emit_RRF2(p, 0xb3d50000, m3, m4, r1, r2);
+}
+
+
+static UChar *
+s390_emit_LDXTR(UChar *p, UChar m3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0);
+ vassert(m3 == 0 || s390_host_has_fpext);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
+ s390_disasm(ENC5(MNM, FPR, UINT, FPR, UINT),
+ "ldxtr", r1, m3, r2, m4);
+ }
+
+ return emit_RRF2(p, 0xb3dd0000, m3, m4, r1, r2);
+}
+
+
+static UChar *
s390_emit_MDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
{
vassert(s390_host_has_dfp);
@@ -3927,6 +4095,22 @@
static UChar *
+s390_emit_MXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
+ if (m4 == 0)
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "mxtr", r1, r2, r3);
+ else
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "mxtra", r1, r2, r3, m4);
+ }
+
+ return emit_RRF4(p, 0xb3d80000, r3, m4, r1, r2);
+}
+
+
+static UChar *
s390_emit_SDTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
{
vassert(s390_host_has_dfp);
@@ -3943,6 +4127,22 @@
static UChar *
+s390_emit_SXTRA(UChar *p, UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) {
+ if (m4 == 0)
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "sxtr", r1, r2, r3);
+ else
+ s390_disasm(ENC5(MNM, FPR, FPR, FPR, UINT), "sxtra", r1, r2, r3, m4);
+ }
+
+ return emit_RRF4(p, 0xb3db0000, r3, m4, r1, r2);
+}
+
+
+static UChar *
s390_emit_LOCGR(UChar *p, UChar m3, UChar r1, UChar r2)
{
vassert(s390_host_has_lsc);
@@ -4914,11 +5114,11 @@
}
-/* Check validity of a register pair for 128-bit BFP. Valid register
+/* Check validity of a register pair for 128-bit FP. Valid register
pairs are (0,2), (1,3), (4, 6), (5, 7), (8, 10), (9, 11), (12, 14),
and (13, 15). */
static Bool
-is_valid_bfp128_regpair(HReg hi, HReg lo)
+is_valid_fp128_regpair(HReg hi, HReg lo)
{
UInt hi_regno = hregNumber(hi);
UInt lo_regno = hregNumber(lo);
@@ -4936,8 +5136,8 @@
s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
vassert(size == 16);
- vassert(is_valid_bfp128_regpair(dst_hi, dst_lo));
- vassert(is_valid_bfp128_regpair(op2_hi, op2_lo));
+ vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
+ vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
insn->tag = S390_INSN_BFP_BINOP;
insn->size = size;
@@ -4958,8 +5158,8 @@
s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
vassert(size == 16);
- vassert(is_valid_bfp128_regpair(dst_hi, dst_lo));
- vassert(is_valid_bfp128_regpair(op_hi, op_lo));
+ vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
+ vassert(is_valid_fp128_regpair(op_hi, op_lo));
insn->tag = S390_INSN_BFP_UNOP;
insn->size = size;
@@ -4980,8 +5180,8 @@
s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
vassert(size == 16);
- vassert(is_valid_bfp128_regpair(op1_hi, op1_lo));
- vassert(is_valid_bfp128_regpair(op2_hi, op2_lo));
+ vassert(is_valid_fp128_regpair(op1_hi, op1_lo));
+ vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
insn->tag = S390_INSN_BFP_COMPARE;
insn->size = size;
@@ -5004,11 +5204,11 @@
if (size == 16) {
/* From smaller size to 16 bytes */
- vassert(is_valid_bfp128_regpair(dst_hi, dst_lo));
+ vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
vassert(op_lo == INVALID_HREG);
} else {
/* From 16 bytes to smaller size */
- vassert(is_valid_bfp128_regpair(op_hi, op_lo));
+ vassert(is_valid_fp128_regpair(op_hi, op_lo));
vassert(dst_lo == INVALID_HREG);
}
@@ -5072,6 +5272,149 @@
s390_insn *
+s390_insn_dfp_compare(UChar size, HReg dst, HReg op1, HReg op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+
+ insn->tag = S390_INSN_DFP_COMPARE;
+ insn->size = size;
+ insn->variant.dfp_compare.dst = dst;
+ insn->variant.dfp_compare.op1_hi = op1;
+ insn->variant.dfp_compare.op2_hi = op2;
+ insn->variant.dfp_compare.op1_lo = INVALID_HREG;
+ insn->variant.dfp_compare.op2_lo = INVALID_HREG;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_dfp_convert(UChar size, s390_dfp_conv_t tag, HReg dst, HReg op,
+ s390_dfp_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+
+ insn->tag = S390_INSN_DFP_CONVERT;
+ insn->size = size;
+ insn->variant.dfp_convert.tag = tag;
+ insn->variant.dfp_convert.dst_hi = dst;
+ insn->variant.dfp_convert.op_hi = op;
+ insn->variant.dfp_convert.dst_lo = INVALID_HREG;
+ insn->variant.dfp_convert.op_lo = INVALID_HREG;
+ insn->variant.dfp_convert.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_dfp128_binop(UChar size, s390_dfp_binop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op2_hi, HReg op2_lo, HReg op3_hi,
+ HReg op3_lo, s390_dfp_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 16);
+ vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
+ vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
+ vassert(is_valid_fp128_regpair(op3_hi, op3_lo));
+
+
+ insn->tag = S390_INSN_DFP_BINOP;
+ insn->size = size;
+ insn->variant.dfp_binop.tag = tag;
+ insn->variant.dfp_binop.dst_hi = dst_hi;
+ insn->variant.dfp_binop.dst_lo = dst_lo;
+ insn->variant.dfp_binop.op2_hi = op2_hi;
+ insn->variant.dfp_binop.op2_lo = op2_lo;
+ insn->variant.dfp_binop.op3_hi = op3_hi;
+ insn->variant.dfp_binop.op3_lo = op3_lo;
+ insn->variant.dfp_binop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_dfp128_compare(UChar size, HReg dst, HReg op1_hi, HReg op1_lo,
+ HReg op2_hi, HReg op2_lo)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 16);
+ vassert(is_valid_fp128_regpair(op1_hi, op1_lo));
+ vassert(is_valid_fp128_regpair(op2_hi, op2_lo));
+
+ insn->tag = S390_INSN_DFP_COMPARE;
+ insn->size = size;
+ insn->variant.dfp_compare.dst = dst;
+ insn->variant.dfp_compare.op1_hi = op1_hi;
+ insn->variant.dfp_compare.op1_lo = op1_lo;
+ insn->variant.dfp_compare.op2_hi = op2_hi;
+ insn->variant.dfp_compare.op2_lo = op2_lo;
+
+ return insn;
+}
+
+
+static s390_insn *
+s390_insn_dfp128_convert(UChar size, s390_dfp_conv_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op_hi, HReg op_lo,
+ s390_dfp_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ if (size == 16) {
+ /* From smaller size to 16 bytes */
+ vassert(is_valid_fp128_regpair(dst_hi, dst_lo));
+ vassert(op_lo == INVALID_HREG);
+ } else {
+ /* From 16 bytes to smaller size */
+ vassert(is_valid_fp128_regpair(op_hi, op_lo));
+ vassert(dst_lo == INVALID_HREG);
+ }
+
+ insn->tag = S390_INSN_DFP_CONVERT;
+ insn->size = size;
+ insn->variant.dfp_convert.tag = tag;
+ insn->variant.dfp_convert.dst_hi = dst_hi;
+ insn->variant.dfp_convert.dst_lo = dst_lo;
+ insn->variant.dfp_convert.op_hi = op_hi;
+ insn->variant.dfp_convert.op_lo = op_lo;
+ insn->variant.dfp_convert.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_dfp128_convert_to(UChar size, s390_dfp_conv_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op)
+{
+ /* Conversion to dfp128 never requires a rounding mode. Provide default
+ rounding mode. It will not be used when emitting insns. */
+ s390_dfp_round_t rounding_mode = S390_DFP_ROUND_NEAREST_EVEN_4;
+
+ return s390_insn_dfp128_convert(size, tag, dst_hi, dst_lo, op,
+ INVALID_HREG, rounding_mode);
+}
+
+
+s390_insn *
+s390_insn_dfp128_convert_from(UChar size, s390_dfp_conv_t tag, HReg dst,
+ HReg op_hi, HReg op_lo,
+ s390_dfp_round_t rounding_mode)
+{
+ return s390_insn_dfp128_convert(size, tag, dst, INVALID_HREG, op_hi, op_lo,
+ rounding_mode);
+}
+
+
+s390_insn *
s390_insn_mfence(void)
{
s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
@@ -5649,6 +5992,24 @@
insn->variant.dfp_binop.op3_hi);
break;
+ case S390_INSN_DFP_COMPARE:
+ s390_sprintf(buf, "%M %R,%R,%R", "v-dcmp", insn->variant.dfp_compare.dst,
+ insn->variant.dfp_compare.op1_hi,
+ insn->variant.dfp_compare.op2_hi);
+ break;
+
+ case S390_INSN_DFP_CONVERT:
+ switch (insn->variant.dfp_convert.tag) {
+ case S390_DFP_D32_TO_D64:
+ case S390_DFP_D64_TO_D32:
+ case S390_DFP_D64_TO_D128:
+ case S390_DFP_D128_TO_D64: op = "v-d2d"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.dfp_convert.dst_hi,
+ insn->variant.dfp_convert.op_hi);
+ break;
+
case S390_INSN_MFENCE:
s390_sprintf(buf, "%M", "v-mfence");
return buf; /* avoid printing "size = ..." which is meaningless */
@@ -5778,6 +6139,16 @@
goto common;
}
+ case S390_INSN_DFP_CONVERT:
+ switch (insn->variant.dfp_convert.tag) {
+ case S390_DFP_D32_TO_D64: p += vex_sprintf(p, "4 -> "); goto common;
+ case S390_DFP_D64_TO_D32:
+ case S390_DFP_D64_TO_D128:p += vex_sprintf(p, "8 -> "); goto common;
+ case S390_DFP_D128_TO_D64:p += vex_sprintf(p, "16 -> "); goto common;
+ default:
+ goto common;
+ }
+
default:
goto common;
}
@@ -7782,6 +8153,17 @@
default: goto fail;
}
break;
+
+ case 16:
+ switch (insn->variant.dfp_binop.tag) {
+ case S390_DFP_ADD: return s390_emit_AXTRA(buf, r3, m4, r1, r2);
+ case S390_DFP_SUB: return s390_emit_SXTRA(buf, r3, m4, r1, r2);
+ case S390_DFP_MUL: return s390_emit_MXTRA(buf, r3, m4, r1, r2);
+ case S390_DFP_DIV: return s390_emit_DXTRA(buf, r3, m4, r1, r2);
+ default: goto fail;
+ }
+ break;
+
default: goto fail;
}
@@ -7791,6 +8173,54 @@
static UChar *
+s390_insn_dfp_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst = hregNumber(insn->variant.dfp_compare.dst);
+ UInt r1 = hregNumber(insn->variant.dfp_compare.op1_hi);
+ UInt r2 = hregNumber(insn->variant.dfp_compare.op2_hi);
+
+ switch (insn->size) {
+ case 8: buf = s390_emit_CDTR(buf, r1, r2); break;
+ case 16: buf = s390_emit_CXTR(buf, r1, r2); break;
+ default: goto fail;
+ }
+
+ return s390_emit_load_cc(buf, dst); /* Load condition code into DST */
+
+ fail:
+ vpanic("s390_insn_dfp_compare_emit");
+}
+
+
+static UChar *
+s390_insn_dfp_convert_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.dfp_convert.dst_hi);
+ UInt r2 = hregNumber(insn->variant.dfp_convert.op_hi);
+ s390_dfp_round_t m3 = insn->variant.dfp_convert.rounding_mode;
+ /* The IEEE-inexact-exception control is not modelled. So the
+ m4 field is 0 (which is what GCC does, too) */
+ const UInt m4 = 0;
+
+ switch (insn->variant.dfp_convert.tag) {
+
+ /* Load lengthened */
+ case S390_DFP_D32_TO_D64: return s390_emit_LDETR(buf, m4, r1, r2);
+ case S390_DFP_D64_TO_D128: return s390_emit_LXDTR(buf, m4, r1, r2);
+
+ /* Load rounded */
+ case S390_DFP_D64_TO_D32: return s390_emit_LEDTR(buf, m3, m4, r1, r2);
+ case S390_DFP_D128_TO_D64: return s390_emit_LDXTR(buf, m3, m4, r1, r2);
+
+ default: goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_dfp_convert_emit");
+}
+
+
+static UChar *
s390_insn_mfence_emit(UChar *buf, const s390_insn *insn)
{
return s390_emit_BCR(buf, 0xF, 0x0);
@@ -8383,6 +8813,14 @@
end = s390_insn_dfp_binop_emit(buf, insn);
break;
+ case S390_INSN_DFP_COMPARE:
+ end = s390_insn_dfp_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_DFP_CONVERT:
+ end = s390_insn_dfp_convert_emit(buf, insn);
+ break;
+
case S390_INSN_MFENCE:
end = s390_insn_mfence_emit(buf, insn);
break;
Modified: trunk/priv/host_s390_isel.c (+361 -4)
===================================================================
--- trunk/priv/host_s390_isel.c 2012-12-21 04:40:28 +00:00 (rev 2604)
+++ trunk/priv/host_s390_isel.c 2012-12-21 17:32:12 +00:00 (rev 2605)
@@ -136,6 +136,7 @@
static HReg s390_isel_float_expr(ISelEnv *, IRExpr *);
static void s390_isel_float128_expr(HReg *, HReg *, ISelEnv *, IRExpr *);
static HReg s390_isel_dfp_expr(ISelEnv *, IRExpr *);
+static void s390_isel_dfp128_expr(HReg *, HReg *, ISelEnv *, IRExpr *);
static Int
@@ -1206,6 +1207,46 @@
return convert_s390_fpcc_to_vex(env, cc_s390);
}
+ case Iop_CmpD64: {
+ HReg cc_s390, h2;
+
+ h1 = s390_isel_dfp_expr(env, arg1);
+ h2 = s390_isel_dfp_expr(env, arg2);
+ cc_s390 = newVRegI(env);
+ size = 8;
+
+ addInstr(env, s390_insn_dfp_compare(size, cc_s390, h1, h2));
+
+ return convert_s390_fpcc_to_vex(env, cc_s390);
+ }
+
+ case Iop_CmpD128: {
+ HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15, cc_s390;
+
+ s390_isel_dfp128_expr(&op1_hi, &op1_lo, env, arg1); /* 1st operand */
+ s390_isel_dfp128_expr(&op2_hi, &op2_lo, env, arg2); /* 2nd operand */
+ cc_s390 = newVRegI(env);
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ /* 1st operand --> (f12, f14) */
+ addInstr(env, s390_insn_move(8, f12, op1_hi));
+ addInstr(env, s390_insn_move(8, f14, op1_lo));
+
+ /* 2nd operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op2_hi));
+ addInstr(env, s390_insn_move(8, f15, op2_lo));
+
+ res = newVRegI(env);
+ addInstr(env, s390_insn_dfp128_compare(16, cc_s390, f12, f14, f13, f15));
+
+ return convert_s390_fpcc_to_vex(env, cc_s390);
+ }
+
case Iop_Add8:
case Iop_Add16:
case Iop_Add32:
@@ -1357,6 +1398,14 @@
return dst;
}
+ if (unop == Iop_ReinterpD64asI64) {
+ dst = newVRegI(env);
+ h1 = s390_isel_dfp_expr(env, arg); /* Process the operand */
+ addInstr(env, s390_insn_move(size, dst, h1));
+
+ return dst;
+ }
+
/* Expressions whose argument is 1-bit wide */
if (typeOfIRExpr(env->type_env, arg) == Ity_I1) {
s390_cc_t cond = s390_isel_cc(env, arg);
@@ -2216,6 +2265,189 @@
/*---------------------------------------------------------*/
+/*--- ISEL: Decimal point expressions (128 bit) ---*/
+/*---------------------------------------------------------*/
+static void
+s390_isel_dfp128_expr_wrk(HReg *dst_hi, HReg *dst_lo, ISelEnv *env,
+ IRExpr *expr)
+{
+ IRType ty = typeOfIRExpr(env->type_env, expr);
+
+ vassert(ty == Ity_D128);
+
+ switch (expr->tag) {
+ case Iex_RdTmp:
+ /* Return the virtual registers that hold the temporary. */
+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp);
+ return;
+
+ /* --------- LOAD --------- */
+ case Iex_Load: {
+ IRExpr *addr_hi, *addr_lo;
+ s390_amode *am_hi, *am_lo;
+
+ if (expr->Iex.Load.end != Iend_BE)
+ goto irreducible;
+
+ addr_hi = expr->Iex.Load.addr;
+ addr_lo = IRExpr_Binop(Iop_Add64, addr_hi, mkU64(8));
+
+ am_hi = s390_isel_amode(env, addr_hi);
+ am_lo = s390_isel_amode(env, addr_lo);
+
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_load(8, *dst_hi, am_hi));
+ addInstr(env, s390_insn_load(8, *dst_hi, am_lo));
+ return;
+ }
+
+ /* --------- GET --------- */
+ case Iex_Get:
+ /* This is not supported because loading 128-bit from the guest
+ state is almost certainly wrong. Use get_dpr_pair instead. */
+ vpanic("Iex_Get with D128 data");
+
+ /* --------- 4-ary OP --------- */
+ case Iex_Qop:
+ vpanic("Iex_Qop with D128 data");
+
+ /* --------- TERNARY OP --------- */
+ case Iex_Triop: {
+ IRTriop *triop = expr->Iex.Triop.details;
+ IROp op = triop->op;
+ IRExpr *irrm = triop->arg1;
+ IRExpr *left = triop->arg2;
+ IRExpr *right = triop->arg3;
+ s390_dfp_round_t rounding_mode;
+ s390_dfp_binop_t dfpop;
+ HReg op1_hi, op1_lo, op2_hi, op2_lo, f9, f11, f12, f13, f14, f15;
+
+ s390_isel_dfp128_expr(&op1_hi, &op1_lo, env, left); /* 1st operand */
+ s390_isel_dfp128_expr(&op2_hi, &op2_lo, env, right); /* 2nd operand */
+
+ /* We use non-virtual registers as pairs with (f9, f11) as op1,
+ (f12, f14) as op2 and (f13, f15) as destination) */
+ f9 = make_fpr(9);
+ f11 = make_fpr(11);
+ f12 = make_fpr(12);
+ f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ f15 = make_fpr(15);
+
+ /* 1st operand --> (f9, f11) */
+ addInstr(env, s390_insn_move(8, f9, op1_hi));
+ addInstr(env, s390_insn_move(8, f11, op1_lo));
+
+ /* 2nd operand --> (f12, f14) */
+ addInstr(env, s390_insn_move(8, f12, op2_hi));
+ addInstr(env, s390_insn_move(8, f14, op2_lo));
+
+ switch (op) {
+ case Iop_AddD128: dfpop = S390_DFP_ADD; break;
+ case Iop_SubD128: dfpop = S390_DFP_SUB; break;
+ case Iop_MulD128: dfpop = S390_DFP_MUL; break;
+ case Iop_DivD128: dfpop = S390_DFP_DIV; break;
+ default:
+ goto irreducible;
+ }
+
+ /* DFP binary ops have insns with rounding mode field
+ when the floating point extension facility is installed. */
+ if (s390_host_has_fpext) {
+ rounding_mode = get_dfp_rounding_mode(env, irrm);
+ } else {
+ set_dfp_rounding_mode_in_fpc(env, irrm);
+ rounding_mode = S390_DFP_ROUND_PER_FPC_0;
+ }
+
+ addInstr(env, s390_insn_dfp128_binop(16, dfpop, f13, f15, f9, f11,
+ f12, f14, rounding_mode));
+
+ /* Move result to virtual destination register */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f13));
+ addInstr(env, s390_insn_move(8, *dst_lo, f15));
+
+ return;
+ }
+
+ /* --------- BINARY OP --------- */
+ case Iex_Binop: {
+ switch (expr->Iex.Binop.op) {
+ case Iop_D64HLtoD128:
+ *dst_hi = s390_isel_dfp_expr(env, expr->Iex.Binop.arg1);
+ *dst_lo = s390_isel_dfp_expr(env, expr->Iex.Binop.arg2);
+ return;
+
+ default:
+ goto irreducible;
+ }
+ }
+
+ /* --------- UNARY OP --------- */
+ case Iex_Unop: {
+ IRExpr *left = expr->Iex.Unop.arg;
+ s390_dfp_conv_t conv;
+ // HReg op, f12, f13, f14, f15;
+ HReg op, f12, f14;
+
+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */
+ f12 = make_fpr(12);
+ // f13 = make_fpr(13);
+ f14 = make_fpr(14);
+ // f15 = make_fpr(15);
+
+ switch (expr->Iex.Unop.op) {
+ case Iop_D64toD128: conv = S390_DFP_D64_TO_D128; goto convert_dfp;
+ default:
+ goto irreducible;
+ }
+
+ convert_dfp:
+ op = s390_isel_dfp_expr(env, left);
+ addInstr(env, s390_insn_dfp128_convert_to(16, conv, f12, f14, op));
+ goto move_dst;
+
+ move_dst:
+ /* Move result to virtual destination registers */
+ *dst_hi = newVRegF(env);
+ *dst_lo = newVRegF(env);
+ addInstr(env, s390_insn_move(8, *dst_hi, f12));
+ addInstr(env, s390_insn_move(8, *dst_lo, f14));
+ return;
+ }
+
+ default:
+ goto irreducible;
+ }
+
+ /* We get here if no pattern matched. */
+ irreducible:
+ ppIRExpr(expr);
+ vpanic("s390_isel_dfp128_expr_wrk: cannot reduce tree");
+
+}
+
+
+/* Compute a 128-bit value into two 64-bit registers. These may be either
+ real or virtual regs; in any case they must not be changed by subsequent
+ code emitted by the caller. */
+static void
+s390_isel_dfp128_expr(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, IRExpr *expr)
+{
+ s390_isel_dfp128_expr_wrk(dst_hi, dst_lo, env, expr);
+
+ /* Sanity checks ... */
+ vassert(hregIsVirtual(*dst_hi));
+ vassert(hregIsVirtual(*dst_lo));
+ vassert(hregClass(*dst_hi) == HRcFlt64);
+ vassert(hregClass(*dst_lo) == HRcFlt64);
+}
+
+
+/*---------------------------------------------------------*/
/*--- ISEL: Decimal point expressions (64 bit) ---*/
/*---------------------------------------------------------*/
@@ -2225,7 +2457,7 @@
IRType ty = typeOfIRExpr(env->type_env, expr);
UChar size;
- vassert(ty == Ity_D64);
+ vassert(ty == Ity_D64 || ty == Ity_D32);
size = sizeofIRType(ty);
@@ -2257,6 +2489,114 @@
return dst;
}
+ /* --------- BINARY OP --------- */
+ case Iex_Binop: {
+ IROp op = expr->Iex.Binop.op;
+ IRExpr *irrm = expr->Iex.Binop.arg1;
+ IRExpr *left = expr->Iex.Binop.arg2;
+ HReg h1, dst;
+ s390_dfp_conv_t conv;
+
+ switch (op) {
+ case Iop_D64toD32: conv = S390_DFP_D64_TO_D32; goto convert_dfp;
+
+ convert_dfp:
+ h1 = s390_isel_dfp_expr(env, left);
+ goto convert;
+
+ convert: {
+ s390_dfp_round_t rounding_mode;
+ /* convert-from-fixed and load-rounded have a rounding mode field
+ when the floating point extension facility is installed. */
+ dst = newVRegF(env);
+ if (s390_host_has_fpext) {
+ rounding_mode = get_dfp_rounding_mode(env, irrm);
+ } else {
+ set_dfp_rounding_mode_in_fpc(env, irrm);
+ rounding_mode = S390_DFP_ROUND_PER_FPC_0;
+ }
+ addInstr(env, s390_insn_dfp_convert(size, conv, dst, h1,
+ rounding_mode));
+ return dst;
+ }
+ default:
+ goto irreducible;
+
+ case Iop_D128toD64: {
+ HReg op_hi, op_lo, f13, f15;
+ s390_dfp_round_t rounding_mode;
+
+ conv = S390_DFP_D128_TO_D64;
+
+ s390_isel_dfp128_expr(&op_hi, &op_lo, env, left);
+
+ /* We use non-virtual registers as pairs (f13, f15) */
+ f13 = make_fpr(13);
+ f15 = make_fpr(15);
+
+ /* operand --> (f13, f15) */
+ addInstr(env, s390_insn_move(8, f13, op_hi));
+ addInstr(env, s390_insn_move(8, f15, op_lo));
+
+ dst = newVRegF(env);
+ /* load-rounded has a rounding mode field when the floating point
+ extension facility is installed. */
+ if (s390_host_has_fpext) {
+ rounding_mode = get_dfp_rounding_mode(env, irrm);
+ } else {
+ set_dfp_rounding_mode_in_fpc(env, irrm);
+ rounding_mode = S390_DFP_ROUND_PER_FPC_0;
+ }
+ addInstr(env, s390_insn_dfp128_convert_from(size, conv, dst, f13, f15,
+ rounding_mode));
+ return dst;
+ }
+
+ }
+ }
+
+ /* --------- UNARY OP --------- */
+ case Iex_Unop: {
+ IROp op = expr->Iex.Unop.op;
+ IRExpr *left = expr->Iex.Unop.arg;
+ s390_dfp_conv_t conv;
+ HReg h1, dst;
+
+ if (op == Iop_D128HItoD64 || op == Iop_D128LOtoD64) {
+ HReg dst_hi, dst_lo;
+
+ s390_isel_dfp128_expr(&dst_hi, &dst_lo, env, left);
+ return op == Iop_D128LOtoD64 ? dst_lo : dst_hi;
+ }
+
+ if (op == Iop_ReinterpI64asD64) {
+ dst = newVRegF(env);
+ h1 = s390_isel_int_expr(env, left); /* Process the operand */
+ addInstr(env, s390_insn_move(size, dst, h1));
+
+ return dst;
+ }
+
+ switch (op) {
+ case Iop_D32toD64: conv = S390_DFP_D32_TO_D64; goto convert_dfp1;
+
+ convert_dfp1:
+ h1 = s390_isel_dfp_expr(env, left);
+ goto convert1;
+
+ convert1:
+ dst = newVRegF(env);
+ /* No rounding mode is needed for these conversions. Just stick
+ one in. It won't be used later on. */
+ addInstr(env, s390_insn_dfp_convert(size, conv, dst, h1,
+ S390_DFP_ROUND_NEAREST_EVEN_4));
+ return dst;
+
+ default:
+ goto irreducible;
+ }
+ }
+
/* --------- TERNARY OP --------- */
case Iex_Triop: {
IRTriop *triop = expr->Iex.Triop.details;
@@ -2572,8 +2912,9 @@
break;
case Ity_F128:
+ case Ity_D128:
/* Cannot occur. No such instruction */
- vpanic("Ist_Store with F128 data");
+ vpanic("Ist_Store with 128-bit floating point data");
default:
goto stmt_fail;
@@ -2703,9 +3044,11 @@
break;
case Ity_F128:
- /* Does not occur. See function put_fpr_pair. */
- vpanic("Ist_Put with F128 data");
+ case Ity_D128:
+ /* Does not occur. See function put_(f|d)pr_pair. */
+ vpanic("Ist_Put with 128-bit floating point data");
+ case Ity_D32:
case Ity_D64:
src = s390_isel_dfp_expr(env, stmt->Ist.Put.data);
break;
@@ -2768,11 +3111,23 @@
return;
}
+ case Ity_D32:
case Ity_D64:
src = s390_isel_dfp_expr(env, stmt->Ist.WrTmp.data);
dst = lookupIRTemp(env, tmp);
break;
+ case Ity_D128: {
+ HReg dst_hi, dst_lo, res_hi, res_lo;
+
+ s390_isel_dfp128_expr(&res_hi, &res_lo, env, stmt->Ist.WrTmp.data);
+ lookupIRTemp128(&dst_hi, &dst_lo, env, tmp);
+
+ addInstr(env, s390_insn_move(8, dst_hi, res_hi));
+ addInstr(env, s390_insn_move(8, dst_lo, res_lo));
+ return;
+ }
+
default:
goto stmt_fail;
}
@@ -3138,11 +3493,13 @@
case Ity_F32:
case Ity_F64:
+ case Ity_D32:
case Ity_D64:
hreg = mkHReg(j++, HRcFlt64, True);
break;
case Ity_F128:
+ case Ity_D128:
hreg = mkHReg(j++, HRcFlt64, True);
hregHI = mkHReg(j++, HRcFlt64, True);
break;
Modified: trunk/priv/guest_s390_toIR.c (+312 -23)
===================================================================
--- trunk/priv/guest_s390_toIR.c 2012-12-21 04:40:28 +00:00 (rev 2604)
+++ trunk/priv/guest_s390_toIR.c 2012-12-21 17:32:12 +00:00 (rev 2605)
@@ -50,6 +50,7 @@
static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp);
static void s390_irgen_CLC_EX(IRTemp, IRTemp, IRTemp);
+static IRExpr *convert_vex_fpcc_to_s390(IRTemp);
/*------------------------------------------------------------*/
@@ -455,6 +456,29 @@
put_fpr_dw0(archreg + 2, low);
}
+/* Read a floating point register pair cointaining DFP value
+ and combine their contents into a 128-bit value */
+
+static IRExpr *
+get_dpr_pair(UInt archreg)
+{
+ IRExpr *high = get_dpr_dw0(archreg);
+ IRExpr *low = get_dpr_dw0(archreg + 2);
+
+ return binop(Iop_D64HLtoD128, high, low);
+}
+
+/* Write a 128-bit decimal floating point value into a register pair. */
+static void
+put_dpr_pair(UInt archreg, IRExpr *expr)
+{
+ IRExpr *high = unop(Iop_D128HItoD64, expr);
+ IRExpr *low = unop(Iop_D128LOtoD64, expr);
+
+ put_dpr_dw0(archreg, high);
+ put_dpr_dw0(archreg + 2, low);
+}
+
/* Terminate the current IRSB with an emulation failure. */
static void
emulation_failure(VexEmNote fail_kind)
@@ -667,7 +691,23 @@
}
+/* Write a 128-bit decimal floating point value into the flags thunk.
+ This is done by splitting the value into two 64-bits values. */
static void
+s390_cc_thunk_put1d128(UInt opc, IRTemp d1)
+{
+ IRExpr *op, *hi, *lo, *ndep;
+
+ op = mkU64(opc);
+ hi = unop(Iop_D128HItoD64, mkexpr(d1));
+ lo = unop(Iop_D128LOtoD64, mkexpr(d1));
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, hi, lo, ndep);
+}
+
+
+static void
s390_cc_set(UInt val)
{
s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
@@ -912,6 +952,22 @@
return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
}
+/* Write word #0 of a dpr to the guest state. */
+static __inline__ void
+put_dpr_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_D32);
+
+ stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a dpr register. */
+static __inline__ IRExpr *
+get_dpr_w0(UInt archreg)
+{
+ return IRExpr_Get(fpr_w0_offset(archreg), Ity_D32);
+}
+
/* Write double word #0 of a fpr containg DFP value to the guest state. */
static __inline__ void
put_dpr_dw0(UInt archreg, IRExpr *expr)
@@ -1889,6 +1945,16 @@
}
static void
+s390_format_RRF_0UFF(const HChar *(*irgen)(UChar m4, UChar r1, UChar r2),
+ UChar m4, UChar r1, UChar r2)
+{
+ const HChar *mnm = irgen(m4, r1, r2);
+
+ if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, UINT), mnm, r1, r2, m4);
+}
+
+static void
s390_format_RRF_UUFR(const HChar *(*irgen)(UChar m3, UChar m4, UChar r1,
UChar r2),
UChar m3, UChar m4, UChar r1, UChar r2)
@@ -8929,18 +8995,6 @@
}
static const HChar *
-s390_irgen_LTDTR(UChar r1, UChar r2)
-{
- IRTemp result = newTemp(Ity_D64);
-
- assign(result, get_dpr_dw0(r2));
- put_dpr_dw0(r1, mkexpr(result));
- s390_cc_thunk_putF(S390_CC_OP_DFP_RESULT_64, result);
-
- return "ltdtr";
-}
-
-static const HChar *
s390_irgen_MEEBR(UChar r1, UChar r2)
{
IRTemp op1 = newTemp(Ity_F32);
@@ -9105,6 +9159,66 @@
}
static const HChar *
+s390_irgen_AXTRA(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D128);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ /* when m4 = 0, S390_DFP_ROUND_PER_FPC_0 should be set.
+ since S390_DFP_ROUND_PER_FPC_0 is also 0, passing m4 is sufficient */
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_dpr_pair(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, triop(Iop_AddD128, mkexpr(rounding_mode), mkexpr(op1),
+ mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ s390_cc_thunk_put1d128(S390_CC_OP_DFP_RESULT_128, result);
+
+ return (m4 == 0) ? "axtr" : "axtra";
+}
+
+static const HChar *
+s390_irgen_CDTR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D64);
+ IRTemp op2 = newTemp(Ity_D64);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_dpr_dw0(r1));
+ assign(op2, get_dpr_dw0(r2));
+ assign(cc_vex, binop(Iop_CmpD64, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cdtr";
+}
+
+static const HChar *
+s390_irgen_CXTR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D128);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_dpr_pair(r1));
+ assign(op2, get_dpr_pair(r2));
+ assign(cc_vex, binop(Iop_CmpD128, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cxtr";
+}
+
+static const HChar *
s390_irgen_DDTRA(UChar r3, UChar m4, UChar r1, UChar r2)
{
IRTemp op1 = newTemp(Ity_D64);
@@ -9127,6 +9241,112 @@
}
static const HChar *
+s390_irgen_DXTRA(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D128);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ /* when m4 = 0, S390_DFP_ROUND_PER_FPC_0 should be set.
+ since S390_DFP_ROUND_PER_FPC_0 is also 0, passing m4 is sufficient */
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_dpr_pair(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, triop(Iop_DivD128, mkexpr(rounding_mode), mkexpr(op1),
+ mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ return (m4 == 0) ? "dxtr" : "dxtra";
+}
+
+static const HChar *
+s390_irgen_LDETR(UChar m4 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_D32);
+
+ vassert(s390_host_has_dfp);
+
+ assign(op, get_dpr_w0(r2));
+ put_dpr_dw0(r1, unop(Iop_D32toD64, mkexpr(op)));
+
+ return "ldetr";
+}
+
+static const HChar *
+s390_irgen_LXDTR(UChar m4 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_D64);
+
+ assign(op, get_dpr_dw0(r2));
+ put_dpr_pair(r1, unop(Iop_D64toD128, mkexpr(op)));
+
+ return "lxdtr";
+}
+
+static const HChar *
+s390_irgen_LDXTR(UChar m3, UChar m4 __attribute__((unused)),
+ UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (! s390_host_has_fpext && m3 != S390_DFP_ROUND_PER_FPC_0) {
+ emulation_warning(EmWarn_S390X_fpext_rounding);
+ m3 = S390_DFP_ROUND_PER_FPC_0;
+ }
+ IRTemp result = newTemp(Ity_D64);
+
+ assign(result, binop(Iop_D128toD64, mkexpr(encode_dfp_rounding_mode(m3)),
+ get_dpr_pair(r2)));
+ put_dpr_dw0(r1, mkexpr(result));
+
+ return "ldxtr";
+}
+
+static const HChar *
+s390_irgen_LEDTR(UChar m3, UChar m4 __attribute__((unused)),
+ UChar r1, UChar r2)
+{
+ vassert(s390_host_has_dfp);
+ if (! s390_host_has_fpext && m3 != S390_DFP_ROUND_PER_FPC_0) {
+ emulation_warning(EmWarn_S390X_fpext_rounding);
+ m3 = S390_DFP_ROUND_PER_FPC_0;
+ }
+ IRTemp op = newTemp(Ity_D64);
+
+ assign(op, get_dpr_dw0(r2));
+ put_dpr_w0(r1, binop(Iop_D64toD32, mkexpr(encode_dfp_rounding_mode(m3)),
+ mkexpr(op)));
+
+ return "ledtr";
+}
+
+static const HChar *
+s390_irgen_LTDTR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_D64);
+
+ assign(result, get_dpr_dw0(r2));
+ put_dpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_DFP_RESULT_64, result);
+
+ return "ltdtr";
+}
+
+static const HChar *
+s390_irgen_LTXTR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_D128);
+
+ assign(result, get_dpr_pair(r2));
+ put_dpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1d128(S390_CC_OP_DFP_RESULT_128, result);
+
+ return "ltxtr";
+}
+
+static const HChar *
s390_irgen_MDTRA(UChar r3, UChar m4, UChar r1, UChar r2)
{
IRTemp op1 = newTemp(Ity_D64);
@@ -9149,6 +9369,28 @@
}
static const HChar *
+s390_irgen_MXTRA(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D128);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+ IRTemp rounding_mode;
+
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ /* when m4 = 0, S390_DFP_ROUND_PER_FPC_0 should be set.
+ since S390_DFP_ROUND_PER_FPC_0 is also 0, passing m4 is sufficient */
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_dpr_pair(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, triop(Iop_MulD128, mkexpr(rounding_mode), mkexpr(op1),
+ mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ return (m4 == 0) ? "mxtr" : "mxtra";
+}
+
+static const HChar *
s390_irgen_SDTRA(UChar r3, UChar m4, UChar r1, UChar r2)
{
IRTemp op1 = newTemp(Ity_D64);
@@ -9171,7 +9413,30 @@
return (m4 == 0) ? "sdtr" : "sdtra";
}
+static const HChar *
+s390_irgen_SXTRA(UChar r3, UChar m4, UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_D128);
+ IRTemp op2 = newTemp(Ity_D128);
+ IRTemp result = newTemp(Ity_D128);
+ IRTemp rounding_mode;
+ vassert(s390_host_has_dfp);
+ vassert(m4 == 0 || s390_host_has_fpext);
+ /* when m4 = 0, S390_DFP_ROUND_PER_FPC_0 should be set.
+ since S390_DFP_ROUND_PER_FPC_0 is also 0, passing m4 is sufficient */
+ rounding_mode = encode_dfp_rounding_mode(m4);
+ assign(op1, get_dpr_pair(r2));
+ assign(op2, get_dpr_pair(r3));
+ assign(result, triop(Iop_SubD128, mkexpr(rounding_mode), mkexpr(op1),
+ mkexpr(op2)));
+ put_dpr_pair(r1, mkexpr(result));
+
+ s390_cc_thunk_put1d128(S390_CC_OP_DFP_RESULT_128, result);
+
+ return (m4 == 0) ? "sxtr" : "sxtra";
+}
+
static const HChar *
s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
{
@@ -12721,6 +12986,13 @@
unsigned int r2 : 4;
} RRF4;
struct {
+ unsigned int op : 16;
+ unsigned int : 4;
+ unsigned int m4 : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF5;
+ struct {
unsigned int op : 8;
unsigned int r1 : 4;
unsigned int r3 : 4;
@@ -13196,31 +13468,48 @@
case 0xb3d3: s390_format_RRF_FUFF2(s390_irgen_SDTRA, ovl.fmt.RRF4.r3,
ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
ovl.fmt.RRF4.r2); goto ok;
- case 0xb3d4: /* LDETR */ goto unimplemented;
- case 0xb3d5: /* LEDTR */ goto unimplemented;
+ case 0xb3d4: s390_format_RRF_0UFF(s390_irgen_LDETR, ovl.fmt.RRF5.m4,
+ ovl.fmt.RRF5.r1, ovl.fmt.RRF5.r2); goto ok;
+ case 0xb3d5: s390_format_RRF_UUFF(s390_irgen_LEDTR, ovl.fmt.RRF2.m3,
+ ovl.fmt.RRF2.m4, ovl.fmt.RRF2.r1,
+ ovl.fmt.RRF2.r2); goto ok;
case 0xb3d6: s390_format_RRE_FF(s390_irgen_LTDTR, ovl.fmt.RRE.r1,
ovl.fmt.RRE.r2); goto ok;
case 0xb3d7: /* FIDTR */ goto unimplemented;
- case 0xb3d8: /* MXTR */ goto unimplemented;
- case 0xb3d9: /* DXTR */ goto unimplemented;
- case 0xb3da: /* AXTR */ goto unimplemented;
- case 0xb3db: /* SXTR */ goto unimplemented;
- case 0xb3dc: /* LXDTR */ goto unimplemented;
- case 0xb3dd: /* LDXTR */ goto unimplemented;
- case 0xb3de: /* LTXTR */ goto unimplemented;
+ case 0xb3d8: s390_format_RRF_FUFF2(s390_irgen_MXTRA, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
+ case 0xb3d9: s390_format_RRF_FUFF2(s390_irgen_DXTRA, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
+ case 0xb3da: s390_format_RRF_FUFF2(s390_irgen_AXTRA, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
+ case 0xb3db: s390_format_RRF_FUFF2(s390_irgen_SXTRA, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.m4, ovl.fmt.RRF4.r1,
+ ovl.fmt.RRF4.r2); goto ok;
+ case 0xb3dc: s390_format_RRF_0UFF(s390_irgen_LXDTR, ovl.fmt.RRF5.m4,
+ ovl.fmt.RRF5.r1, ovl.fmt.RRF5.r2); goto ok;
+ case 0xb3dd: s390_format_RRF_UUFF(s390_irgen_LDXTR, ovl.fmt.RRF2.m3,
+ ovl.fmt.RRF2.m4, ovl.fmt.RRF2.r1,
+ ovl.fmt.RRF2.r2); goto ok;
+ case 0xb3de: s390_format_RRE_FF(s390_irgen_LTXTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
case 0xb3df: /* FIXTR */ goto unimplemented;
case 0xb3e0: /* KDTR */ goto unimplemented;
case 0xb3e1: /* CGDTR */ goto unimplemented;
case 0xb3e2: /* CUDTR */ goto unimplemented;
case 0xb3e3: /* CSDTR */ goto unimplemented;
- case 0xb3e4: /* CDTR */ goto unimplemented;
+ case 0xb3e4: s390_format_RRE_FF(s390_irgen_CDTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
case 0xb3e5: /* EEDTR */ goto unimplemented;
case 0xb3e7: /* ESDTR */ goto unimplemented;
case 0xb3e8: /* KXTR */ goto unimplemented;
case 0xb3e9: /* CGXTR */ goto unimplemented;
case 0xb3ea: /* CUXTR */ goto unimplemented;
case 0xb3eb: /* CSXTR */ goto unimplemented;
- case 0xb3ec: /* CXTR */ goto unimplemented;
+ case 0xb3ec: s390_format_RRE_FF(s390_irgen_CXTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
case 0xb3ed: /* EEXTR */ goto unimplemented;
case 0xb3ef: /* ESXTR */ goto unimplemented;
case 0xb3f1: /* CDGTR */ goto unimplemented;
Modified: trunk/priv/guest_s390_helpers.c (+15 -0)
===================================================================
--- trunk/priv/guest_s390_helpers.c 2012-12-21 04:40:28 +00:00 (rev 2604)
+++ trunk/priv/guest_s390_helpers.c 2012-12-21 17:32:12 +00:00 (rev 2605)
@@ -1165,7 +1165,19 @@
psw >> 28; /* cc */ \
})
+#define S390_CC_FOR_DFP128_RESULT(hi,lo) \
+({ \
+ __asm__ volatile ( \
+ "ldr 4,%[high]\n\t" \
+ "ldr 6,%[low]\n\t" \
+ ".insn rre, 0xb3de0000,0,4\n\t" /* LTXTR */ \
+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \
+ : [high] "f"(hi), [low] "f"(lo) \
+ : "cc", "f0", "f2", "f4", "f6"); \
+ psw >> 28; /* cc */ \
+})
+
/* Return the value of the condition code from the supplied thunk parameters.
This is not the value of the PSW. It is the value of the 2 CC bits within
the PSW. The returned value is thusly in the interval [0:3]. */
@@ -1384,6 +1396,9 @@
case S390_CC_OP_DFP_RESULT_64:
return S390_CC_FOR_DFP_RESULT(cc_dep1);
+ case S390_CC_OP_DFP_RESULT_128:
+ return S390_CC_FOR_DFP128_RESULT(cc_dep1, cc_dep2);
+
default:
break;
}
|
|
From: Florian K. <br...@ac...> - 2012-12-21 15:22:58
|
On 12/19/2012 11:26 AM, John Reiser wrote:
>> New Revision: 2598
>>
>> Log:
>> Constant folder: enable Sub32(x,0) ==> x.
>
> Beware. Processor status (flag bits) might change, and in "unexpected" ways.
>
> PowerPC implements SUB(x, y) as ADDwithCarry(x, ~y, 1),
Interesting. s390 does this, too.
> and does not invert the Carry bit when the original opcode was SUB.
> So, subtracting zero always sets Carry (if status is being recorded.)
>
> On x86 SUB records a Borrow in the C status bit, so subtracting zero
> always clears the C bit.
>
True, but I think this optimisation does not break break anything.
For these reasons:
(1) Performing the optimisation is completely safe when the flags bits
for this subtraction are not examined, as in (x - 0) + y.
For arithmetic operations that are generated during IR generation
(e.g. for address computation) the flag bits are not examined.
(2) From #1 it follows that this optimisation could only make a
difference if
(a) it was written in the source code
(b) it was preserved through the compiler optimisation
(c) the carry bit is tested on the result
While not impossible that looks like a scenario that is quite
unlikely to occur. Probably requires some handwritten assembly.
(3) Even if IR optimisation replaces SUB(x,0) -> x that does not mean
that the flags are computed improperly. Condition code computation
in VEX is performed by putting the operands of an operation into the
flags thunk (guest state) together with a tag that describes the
operation that is to be performed on them. Here, something like:
[SUB32, x, 0]
If it turns out that flags bits are needed, the thunk will be
evaluated. So, if there is a problem here at all, it would imply
that the code that evaluates the flags thunk is incorrect.
If you're interested take a look at function s390_calculate_cc
in guest_s390_helpers.c that does exactly this.
No reason for concern.
Florian
|
|
From: Josef W. <Jos...@gm...> - 2012-12-21 10:57:34
|
Am 21.12.2012 11:34, schrieb sv...@va...: > + /* Adding guarded memory actions and merging them with the existing > + queue is too complex. Simply flush the queue and add this > + action immediately. Since guarded loads and stores are pretty > + rare, this is not thought likely to cause any noticeable > + performance loss as a result of the loss of event-merging > + opportunities. */ On x86, for sure they are rare. I am not so sure for ARM. Apart from merging events, another benefit of the queue is to do the dirty helper calls in chunks, reducing register save/restore overhead. I really need to check out Valgrind on my recently bought Nexus 7 ;-) The changes for Callgrind should be exactly the same. Thanks, Josef |
|
From: <sv...@va...> - 2012-12-21 10:34:20
|
sewardj 2012-12-21 10:34:08 +0000 (Fri, 21 Dec 2012)
New Revision: 13194
Log:
Teach Cachegrind about IRLoadG and IRStoreG.
Modified files:
branches/COMEM/cachegrind/cg_main.c
Modified: branches/COMEM/cachegrind/cg_main.c (+80 -4)
===================================================================
--- branches/COMEM/cachegrind/cg_main.c 2012-12-21 04:25:10 +00:00 (rev 13193)
+++ branches/COMEM/cachegrind/cg_main.c 2012-12-21 10:34:08 +00:00 (rev 13194)
@@ -419,6 +419,9 @@
n->parent->Dw.a++;
}
+/* Note that addEvent_D_guarded assumes that log_0Ir_1Dr_cache_access
+ and log_0Ir_1Dw_cache_access have exactly the same prototype. If
+ you change them, you must change addEvent_D_guarded too. */
static VG_REGPARM(3)
void log_0Ir_1Dr_cache_access(InstrInfo* n, Addr data_addr, Word data_size)
{
@@ -429,6 +432,7 @@
n->parent->Dr.a++;
}
+/* See comment on log_0Ir_1Dr_cache_access. */
static VG_REGPARM(3)
void log_0Ir_1Dw_cache_access(InstrInfo* n, Addr data_addr, Word data_size)
{
@@ -930,10 +934,10 @@
/* Is it possible to merge this write with the preceding read? */
lastEvt = &cgs->events[cgs->events_used-1];
if (cgs->events_used > 0
- && lastEvt->tag == Ev_Dr
- && lastEvt->Ev.Dr.szB == datasize
- && lastEvt->inode == inode
- && eqIRAtom(lastEvt->Ev.Dr.ea, ea))
+ && lastEvt->tag == Ev_Dr
+ && lastEvt->Ev.Dr.szB == datasize
+ && lastEvt->inode == inode
+ && eqIRAtom(lastEvt->Ev.Dr.ea, ea))
{
lastEvt->tag = Ev_Dm;
return;
@@ -953,6 +957,52 @@
}
static
+void addEvent_D_guarded ( CgState* cgs, InstrInfo* inode,
+ Int datasize, IRAtom* ea, IRAtom* guard,
+ Bool isWrite )
+{
+ tl_assert(isIRAtom(ea));
+ tl_assert(guard);
+ tl_assert(isIRAtom(guard));
+ tl_assert(datasize >= 1 && datasize <= min_line_size);
+
+ if (!clo_cache_sim)
+ return;
+
+ /* Adding guarded memory actions and merging them with the existing
+ queue is too complex. Simply flush the queue and add this
+ action immediately. Since guarded loads and stores are pretty
+ rare, this is not thought likely to cause any noticeable
+ performance loss as a result of the loss of event-merging
+ opportunities. */
+ tl_assert(cgs->events_used >= 0);
+ flushEvents(cgs);
+ tl_assert(cgs->events_used == 0);
+ /* Same as case Ev_Dw / case Ev_Dr in flushEvents, except with guard */
+ IRExpr* i_node_expr;
+ const HChar* helperName;
+ void* helperAddr;
+ IRExpr** argv;
+ Int regparms;
+ IRDirty* di;
+ i_node_expr = mkIRExpr_HWord( (HWord)inode );
+ helperName = isWrite ? "log_0Ir_1Dw_cache_access"
+ : "log_0Ir_1Dr_cache_access";
+ helperAddr = isWrite ? &log_0Ir_1Dw_cache_access
+ : &log_0Ir_1Dr_cache_access;
+ argv = mkIRExprVec_3( i_node_expr,
+ ea, mkIRExpr_HWord( datasize ) );
+ regparms = 3;
+ di = unsafeIRDirty_0_N(
+ regparms,
+ helperName, VG_(fnptr_to_fnentry)( helperAddr ),
+ argv );
+ di->guard = guard;
+ addStmtToIRSB( cgs->sbOut, IRStmt_Dirty(di) );
+}
+
+
+static
void addEvent_Bc ( CgState* cgs, InstrInfo* inode, IRAtom* guard )
{
Event* evt;
@@ -1101,6 +1151,31 @@
break;
}
+ case Ist_StoreG: {
+ IRStoreG* sg = st->Ist.StoreG.details;
+ IRExpr* data = sg->data;
+ IRExpr* addr = sg->addr;
+ IRType type = typeOfIRExpr(tyenv, data);
+ tl_assert(type != Ity_INVALID);
+ addEvent_D_guarded( &cgs, curr_inode,
+ sizeofIRType(type), addr, sg->guard,
+ True/*isWrite*/ );
+ break;
+ }
+
+ case Ist_LoadG: {
+ IRLoadG* lg = st->Ist.LoadG.details;
+ IRType type = Ity_INVALID; /* loaded type */
+ IRType typeWide = Ity_INVALID; /* after implicit widening */
+ IRExpr* addr = lg->addr;
+ typeOfIRLoadGOp(lg->cvt, &typeWide, &type);
+ tl_assert(type != Ity_INVALID);
+ addEvent_D_guarded( &cgs, curr_inode,
+ sizeofIRType(type), addr, lg->guard,
+ False/*!isWrite*/ );
+ break;
+ }
+
case Ist_Dirty: {
Int dataSize;
IRDirty* d = st->Ist.Dirty.details;
@@ -1231,6 +1306,7 @@
}
default:
+ ppIRStmt(st);
tl_assert(0);
break;
}
|
|
From: Julian S. <js...@ac...> - 2012-12-21 09:24:37
|
On Wednesday, December 19, 2012, John Reiser wrote: > > Constant folder: enable Sub32(x,0) ==> x. > > Beware. Processor status (flag bits) might change, and in "unexpected" > ways. The constant folder operates on the IR, which makes all architected state changes explicit -- there are no "under the table" semantics. If a ppc sub insn sets flag bits then that will have been translated into its own fragment of IR independent of the actual SUB. Hence IR expressions are denote pure values and we can transform them as such. J |
|
From: Philippe W. <phi...@sk...> - 2012-12-21 04:48:32
|
valgrind revision: 13192 VEX revision: 2603 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.3.1-3.fc16.ppc64 ppc64 Vendor version: Fedora release 16 (Verne) Nightly build on gcc110 ( Fedora release 16 (Verne), ppc64 ) Started at 2012-12-20 20:00:13 PST Ended at 2012-12-20 20:46:44 PST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 542 tests, 10 stderr failures, 5 stdout failures, 1 stderrB failure, 1 stdoutB failure, 2 post failures == gdbserver_tests/mcmain_pic (stdout) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/mcmain_pic (stdoutB) gdbserver_tests/mcmain_pic (stderrB) memcheck/tests/linux/getregset (stdout) memcheck/tests/linux/getregset (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/vbit-test/vbit-test (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) none/tests/ppc32/test_dfp2 (stdout) none/tests/ppc32/test_dfp2 (stderr) none/tests/ppc64/test_dfp2 (stdout) none/tests/ppc64/test_dfp2 (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) |
|
From: <sv...@va...> - 2012-12-21 04:40:44
|
florian 2012-12-21 04:40:28 +0000 (Fri, 21 Dec 2012)
New Revision: 2604
Log:
Remove redundant code snippet.
Modified files:
trunk/priv/host_s390_isel.c
Modified: trunk/priv/host_s390_isel.c (+0 -6)
===================================================================
--- trunk/priv/host_s390_isel.c 2012-12-20 19:44:18 +00:00 (rev 2603)
+++ trunk/priv/host_s390_isel.c 2012-12-21 04:40:28 +00:00 (rev 2604)
@@ -1700,12 +1700,6 @@
vassert(ty == Ity_F128);
- /* Read 128-bit IRTemp */
- if (expr->tag == Iex_RdTmp) {
- lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp);
- return;
- }
-
switch (expr->tag) {
case Iex_RdTmp:
/* Return the virtual registers that hold the temporary. */
|
|
From: <sv...@va...> - 2012-12-21 04:25:31
|
florian 2012-12-21 04:25:10 +0000 (Fri, 21 Dec 2012)
New Revision: 13193
Log:
Fix mc_translate for Iop_D64toD32.
Spotted and fixed by Maran Pakkirisamy (ma...@li...).
Modified files:
trunk/memcheck/mc_translate.c
Modified: trunk/memcheck/mc_translate.c (+3 -3)
===================================================================
--- trunk/memcheck/mc_translate.c 2012-12-21 02:15:23 +00:00 (rev 13192)
+++ trunk/memcheck/mc_translate.c 2012-12-21 04:25:10 +00:00 (rev 13193)
@@ -3306,7 +3306,7 @@
case Iop_D64toI64S:
case Iop_I64StoD64:
- /* I64(DFP rm) x I64 -> D64 */
+ /* I32(DFP rm) x I64 -> D64 */
return mkLazy2(mce, Ity_I64, vatom1, vatom2);
case Iop_RoundF32toInt:
@@ -3350,8 +3350,8 @@
return mkLazy2(mce, Ity_I32, vatom1, vatom2);
case Iop_D64toD32:
- /* First arg is I64 (DFProunding mode), second is D64 (data). */
- return mkLazy2(mce, Ity_I64, vatom1, vatom2);
+ /* First arg is I32 (DFP rounding mode), second is D64 (data). */
+ return mkLazy2(mce, Ity_I32, vatom1, vatom2);
case Iop_F64toI16S:
/* First arg is I32 (rounding mode), second is F64 (data). */
|
|
From: Rich C. <rc...@wi...> - 2012-12-21 04:01:03
|
valgrind revision: 13192
VEX revision: 2603
C compiler: gcc (SUSE Linux) 4.7.1 20120723 [gcc-4_7-branch revision 189773]
Assembler: GNU assembler (GNU Binutils; openSUSE 12.2) 2.22
C library: GNU C Library stable release version 2.15 (20120628)
uname -mrs: Linux 3.4.11-2.16-desktop x86_64
Vendor version: Welcome to openSUSE 12.2 "Mantis" - Kernel %r (%t).
Nightly build on ultra ( gcc 4.5.1 Linux 3.4.11-2.16-desktop x86_64 )
Started at 2012-12-20 21:30:01 CST
Ended at 2012-12-20 22:00:51 CST
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 634 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
gdbserver_tests/mcinfcallRU (stderr)
gdbserver_tests/mcinfcallWSRU (stderr)
memcheck/tests/origin5-bz2 (stderr)
=================================================
./valgrind-new/gdbserver_tests/mcinfcallRU.stderr.diff
=================================================
--- mcinfcallRU.stderr.exp 2012-12-20 21:47:29.660249840 -0600
+++ mcinfcallRU.stderr.out 2012-12-20 21:52:00.577706703 -0600
@@ -1,4 +1,12 @@
loops/sleep_ms/burn/threads_spec: 1 0 2000000000 ------B-
main ready to sleep and/or burn
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
pid .... Thread .... inferior call pushed from gdb in mcinfcallRU.stdinB.gdb
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
Reset valgrind output to log (orderly_finish)
=================================================
./valgrind-new/gdbserver_tests/mcinfcallWSRU.stderr.diff
=================================================
--- mcinfcallWSRU.stderr.exp 2012-12-20 21:47:29.663249755 -0600
+++ mcinfcallWSRU.stderr.out 2012-12-20 21:52:03.055637719 -0600
@@ -3,5 +3,13 @@
London ready to sleep and/or burn
Petaouchnok ready to sleep and/or burn
main ready to sleep and/or burn
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
pid .... Thread .... thread 1 inferior call pushed from gdb in mcinfcallWSRU.stdinB.gdb
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
Reset valgrind output to log (orderly_finish)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc212-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc212-s390x 2012-12-20 21:47:37.961018694 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:53:52.637587145 -0600
@@ -75,17 +75,6 @@
at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
- at 0x........: mainSort (origin5-bz2.c:2859)
- by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
- by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
- by 0x........: handle_compress (origin5-bz2.c:4753)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -131,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc234-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc234-s390x 2012-12-20 21:47:37.648027410 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:53:52.637587145 -0600
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc25-amd64
=================================================
--- origin5-bz2.stderr.exp-glibc25-amd64 2012-12-20 21:47:30.474227180 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:53:52.637587145 -0600
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc25-x86
=================================================
--- origin5-bz2.stderr.exp-glibc25-x86 2012-12-20 21:47:37.090042949 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:53:52.637587145 -0600
@@ -12,7 +12,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -21,7 +21,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -30,7 +30,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -41,7 +41,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -52,7 +52,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -63,7 +63,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -74,7 +74,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -85,7 +85,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -96,7 +96,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -107,7 +107,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2275)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
<truncated beyond 100 lines>
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc27-ppc64
=================================================
--- origin5-bz2.stderr.exp-glibc27-ppc64 2012-12-20 21:47:37.375035011 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:53:52.637587145 -0600
@@ -1,7 +1,7 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6481)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Conditional jump or move depends on uninitialised value(s)
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -10,7 +10,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -19,7 +19,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -28,7 +28,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
@@ -39,7 +39,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
@@ -50,7 +50,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
@@ -61,7 +61,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
@@ -72,7 +72,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
@@ -83,7 +83,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
@@ -94,7 +94,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
@@ -105,7 +105,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
<truncated beyond 100 lines>
=================================================
./valgrind-old/gdbserver_tests/mcinfcallRU.stderr.diff
=================================================
--- mcinfcallRU.stderr.exp 2012-12-20 21:32:35.801219139 -0600
+++ mcinfcallRU.stderr.out 2012-12-20 21:37:29.973987205 -0600
@@ -1,4 +1,12 @@
loops/sleep_ms/burn/threads_spec: 1 0 2000000000 ------B-
main ready to sleep and/or burn
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
pid .... Thread .... inferior call pushed from gdb in mcinfcallRU.stdinB.gdb
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
Reset valgrind output to log (orderly_finish)
=================================================
./valgrind-old/gdbserver_tests/mcinfcallWSRU.stderr.diff
=================================================
--- mcinfcallWSRU.stderr.exp 2012-12-20 21:32:35.804219055 -0600
+++ mcinfcallWSRU.stderr.out 2012-12-20 21:37:32.463917550 -0600
@@ -3,5 +3,13 @@
London ready to sleep and/or burn
Petaouchnok ready to sleep and/or burn
main ready to sleep and/or burn
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
pid .... Thread .... thread 1 inferior call pushed from gdb in mcinfcallWSRU.stdinB.gdb
+vex amd64->IR: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........ 0x........
+vex amd64->IR: REX=0 REX.W=0 REX.R=0 REX.X=0 REX.B=0
+vex amd64->IR: VEX=0 VEX.L=0 VEX.nVVVV=0x........ ESC=NONE
+vex amd64->IR: PFX.66=0 PFX.F2=0 PFX.F3=0
Reset valgrind output to log (orderly_finish)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc212-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc212-s390x 2012-12-20 21:32:57.782603848 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:39:22.275845950 -0600
@@ -75,17 +75,6 @@
at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
- at 0x........: mainSort (origin5-bz2.c:2859)
- by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
- by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
- by 0x........: handle_compress (origin5-bz2.c:4753)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -131,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc234-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc234-s390x 2012-12-20 21:32:53.496723813 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:39:22.275845950 -0600
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc25-amd64
=================================================
--- origin5-bz2.stderr.exp-glibc25-amd64 2012-12-20 21:32:52.806743127 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:39:22.275845950 -0600
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc25-x86
=================================================
--- origin5-bz2.stderr.exp-glibc25-x86 2012-12-20 21:32:53.262730363 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:39:22.275845950 -0600
@@ -12,7 +12,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -21,7 +21,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -30,7 +30,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -41,7 +41,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -52,7 +52,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -63,7 +63,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -74,7 +74,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -85,7 +85,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -96,7 +96,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -107,7 +107,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2275)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
<truncated beyond 100 lines>
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc27-ppc64
=================================================
--- origin5-bz2.stderr.exp-glibc27-ppc64 2012-12-20 21:32:53.360727621 -0600
+++ origin5-bz2.stderr.out 2012-12-20 21:39:22.275845950 -0600
@@ -1,7 +1,7 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6481)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Conditional jump or move depends on uninitialised value(s)
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -10,7 +10,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -19,7 +19,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -28,7 +28,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
@@ -39,7 +39,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
@@ -50,7 +50,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
@@ -61,7 +61,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
@@ -72,7 +72,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
@@ -83,7 +83,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
@@ -94,7 +94,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
@@ -105,7 +105,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
<truncated beyond 100 lines>
|
|
From: Christian B. <bor...@de...> - 2012-12-21 03:13:34
|
valgrind revision: 13192 VEX revision: 2603 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.21.1 C library: GNU C Library stable release version 2.11.3 (20110527) uname -mrs: Linux 3.0.42-0.7-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP2 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP1 gcc 4.3.4 on z196 (s390x) ) Started at 2012-12-21 03:45:01 CET Ended at 2012-12-21 04:13:20 CET Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 615 tests, 0 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == |
|
From: Christian B. <bor...@de...> - 2012-12-21 03:08:39
|
valgrind revision: 13192 VEX revision: 2603 C compiler: gcc (GCC) 4.6.1 20110908 (Red Hat 4.6.1-9bb4) Assembler: GNU assembler version 2.21.51.0.6-6bb6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.6.8-57.x.20121204-s390xperformance s390x Vendor version: unknown Nightly build on fedora390 ( Fedora 15 with devel libc/toolchain on z196 (s390x) ) Started at 2012-12-21 03:45:01 CET Ended at 2012-12-21 04:08:42 CET Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 616 tests, 2 stderr failures, 0 stdout failures, 6 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcbreak (stderrB) gdbserver_tests/mcclean_after_fork (stderrB) gdbserver_tests/mcleak (stderrB) gdbserver_tests/mcmain_pic (stderrB) gdbserver_tests/mcvabits (stderrB) gdbserver_tests/mssnapshot (stderrB) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) |
|
From: <sv...@va...> - 2012-12-21 02:15:37
|
petarj 2012-12-21 02:15:23 +0000 (Fri, 21 Dec 2012)
New Revision: 13192
Log:
Minor style improvement over r13190.
Prerequisite should be non existence of a #define (rather than existence of
#undef in the comments).
Modified files:
trunk/drd/tests/pth_spinlock.vgtest
Modified: trunk/drd/tests/pth_spinlock.vgtest (+1 -1)
===================================================================
--- trunk/drd/tests/pth_spinlock.vgtest 2012-12-20 19:02:17 +00:00 (rev 13191)
+++ trunk/drd/tests/pth_spinlock.vgtest 2012-12-21 02:15:23 +00:00 (rev 13192)
@@ -1,3 +1,3 @@
-prereq: test -e pth_spinlock && ./supported_libpthread && grep '#undef DISABLE_PTHREAD_SPINLOCK_INTERCEPT' ../../config.h > /dev/null
+prereq: test -e pth_spinlock && ./supported_libpthread && ! grep '#define DISABLE_PTHREAD_SPINLOCK_INTERCEPT 1' ../../config.h > /dev/null
vgopts: --read-var-info=yes --check-stack-var=yes
prog: pth_spinlock
|