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From: <sv...@va...> - 2012-06-02 23:48:15
|
sewardj 2012-06-03 00:48:06 +0100 (Sun, 03 Jun 2012)
New Revision: 12603
Log:
POWER Processor decimal FP support, part 5. (Valgrind side). Bug #299694.
(Carl Love, ca...@us... and Maynard Johnson, may...@us...)
This patch adds support for Power Decimal Floating Point (DFP) . This
is the fifth patch set in the series of five to add the DFP
instruction support to Valgrind. Adds support for the ddedpd,
ddedpdq, denbcd, denbcdq, dtstsf, and dtstsfq instructions.
Added files:
trunk/none/tests/ppc32/test_dfp5.c
trunk/none/tests/ppc32/test_dfp5.stderr.exp
trunk/none/tests/ppc32/test_dfp5.stdout.exp
trunk/none/tests/ppc32/test_dfp5.vgtest
trunk/none/tests/ppc64/test_dfp5.c
trunk/none/tests/ppc64/test_dfp5.stderr.exp
trunk/none/tests/ppc64/test_dfp5.stdout.exp
trunk/none/tests/ppc64/test_dfp5.vgtest
Modified files:
trunk/memcheck/mc_translate.c
trunk/none/tests/ppc32/Makefile.am
trunk/none/tests/ppc64/Makefile.am
Property changed: trunk/none/tests/ppc64/test_dfp5.stdout.exp (+0 -0)
___________________________________________________________________
Name: svn:special
+ *
Added: trunk/none/tests/ppc64/test_dfp5.stdout.exp (+1 -0)
===================================================================
--- trunk/none/tests/ppc64/test_dfp5.stdout.exp 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc64/test_dfp5.stdout.exp 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -0,0 +1 @@
+link ../../../none/tests/ppc32/test_dfp5.stdout.exp
\ No newline at end of file
Modified: trunk/none/tests/ppc64/Makefile.am (+7 -2)
===================================================================
--- trunk/none/tests/ppc64/Makefile.am 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc64/Makefile.am 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -22,12 +22,13 @@
test_dfp2.stderr.exp test_dfp2.stdout.exp test_dfp2.vgtest \
test_dfp2.stdout.exp_Without_dcffix \
test_dfp3.stderr.exp test_dfp3.stdout.exp test_dfp3.vgtest \
- test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest
+ test_dfp4.stderr.exp test_dfp4.stdout.exp test_dfp4.vgtest \
+ test_dfp5.stderr.exp test_dfp5.stdout.exp test_dfp5.vgtest
check_PROGRAMS = \
allexec \
jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp power6_mf_gpr test_isa_2_06_part1 \
- test_isa_2_06_part2 test_isa_2_06_part3 test_dfp1 test_dfp2 test_dfp3 test_dfp4
+ test_isa_2_06_part2 test_isa_2_06_part3 test_dfp1 test_dfp2 test_dfp3 test_dfp4 test_dfp5
AM_CFLAGS += @FLAG_M64@
AM_CXXFLAGS += @FLAG_M64@
@@ -79,3 +80,7 @@
test_dfp4_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \
@FLAG_M64@ $(BUILD_FLAGS_DFP)
+
+test_dfp5_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -lm -g -mregnames $(DFP_FLAG) \
+ @FLAG_M64@ $(BUILD_FLAGS_DFP)
+
Added: trunk/none/tests/ppc32/test_dfp5.c (+595 -0)
===================================================================
--- trunk/none/tests/ppc32/test_dfp5.c 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc32/test_dfp5.c 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -0,0 +1,595 @@
+/* Copyright (C) 2012 IBM
+
+ Author: Maynard Johnson <may...@us...>
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+
+#if defined(HAS_DFP)
+
+typedef union stuff {
+ _Decimal64 dec_val;
+ _Decimal128 dec_val128;
+ unsigned long long u64_val;
+ struct {
+ unsigned long long valu;
+ unsigned long long vall;
+ } u128;
+} dfp_val_t;
+
+
+typedef unsigned char Bool;
+#define True 1
+#define False 0
+
+
+#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7"
+
+#define SET_CR(_arg) \
+ __asm__ __volatile__ ("mtcr %0" : : "b"(_arg) : ALLCR );
+
+#define SET_XER(_arg) \
+ __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" );
+
+#define GET_CR(_lval) \
+ __asm__ __volatile__ ("mfcr %0" : "=b"(_lval) )
+
+#define GET_XER(_lval) \
+ __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) )
+
+#define GET_CR_XER(_lval_cr,_lval_xer) \
+ do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0)
+
+#define SET_CR_ZERO \
+ SET_CR(0)
+
+#define SET_XER_ZERO \
+ SET_XER(0)
+
+#define SET_CR_XER_ZERO \
+ do { SET_CR_ZERO; SET_XER_ZERO; } while (0)
+
+#define SET_FPSCR_ZERO \
+ do { double _d = 0.0; \
+ __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \
+ } while (0)
+
+#define GET_FPSCR(_arg) \
+ __asm__ __volatile__ ("mffs %0" : "=f"(_arg) )
+
+#define SET_FPSCR_DRN \
+ __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) )
+
+#ifndef __powerpc64__
+typedef uint32_t HWord_t;
+#else
+typedef uint64_t HWord_t;
+#endif /* __powerpc64__ */
+
+enum BF_vals { BF_val1 = 0, BF_val2 = 1, BF_val3 =6};
+
+// The assembly-level instructions being tested
+static void _test_dtstsf(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
+{
+ _Decimal64 f16 = valB.dec_val;
+ register HWord_t r14 __asm__ ("r14");
+ double f14;
+ r14 = (HWord_t)&ref_sig;
+
+ __asm __volatile__ ("lfiwax %0, 0, %1" : "=f" (f14): "r" (r14));
+ switch (BF) {
+ case BF_val1:
+ __asm__ __volatile__ ("dtstsf %0, %1, %2" : : "i" (BF_val1), "f" (f14), "f" (f16));
+ break;
+ case BF_val2:
+ __asm__ __volatile__ ("dtstsf %0, %1, %2" : : "i" (BF_val2), "f" (f14), "f" (f16));
+ break;
+ case BF_val3:
+ __asm__ __volatile__ ("dtstsf %0, %1, %2" : : "i" (BF_val3), "f" (f14), "f" (f16));
+ break;
+ default:
+ fprintf(stderr, "Invalid value %d for BF\n", BF);
+ break;
+ }
+}
+
+static void _test_dtstsfq(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
+{
+ _Decimal128 f16 = valB.dec_val128;
+ register HWord_t r14 __asm__ ("r14");
+ double f14;
+ r14 = (HWord_t)&ref_sig;
+
+ __asm __volatile__ ("lfiwax %0, 0, %1" : "=f" (f14): "r" (r14));
+ switch (BF) {
+ case BF_val1:
+ __asm__ __volatile__ ("dtstsfq %0, %1, %2" : : "i" (BF_val1), "f" (f14), "f" (f16));
+ break;
+ case BF_val2:
+ __asm__ __volatile__ ("dtstsfq %0, %1, %2" : : "i" (BF_val2), "f" (f14), "f" (f16));
+ break;
+ case BF_val3:
+ __asm__ __volatile__ ("dtstsfq %0, %1, %2" : : "i" (BF_val3), "f" (f14), "f" (f16));
+ break;
+ default:
+ fprintf(stderr, "Invalid value %d for BF\n", BF);
+ break;
+ }
+}
+
+static dfp_val_t _test_ddedpd(unsigned int SP, dfp_val_t valB)
+{
+ _Decimal64 ret;
+ dfp_val_t result;
+ _Decimal64 f16 = valB.dec_val;
+ switch (SP) {
+ case 0:
+ __asm__ __volatile__ ("ddedpd. 0, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 1:
+ __asm__ __volatile__ ("ddedpd. 1, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 2:
+ __asm__ __volatile__ ("ddedpd. 2, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 3:
+ __asm__ __volatile__ ("ddedpd. 3, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ default:
+ fprintf(stderr, "Invalid value %d for SP\n", SP);
+ break;
+ }
+ result.dec_val = ret;
+ return result;
+}
+
+
+static dfp_val_t _test_ddedpdq(unsigned int SP, dfp_val_t valB)
+{
+ _Decimal128 ret;
+ dfp_val_t result;
+ _Decimal128 f16 = valB.dec_val128;
+ switch (SP) {
+ case 0:
+ __asm__ __volatile__ ("ddedpdq 0, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 1:
+ __asm__ __volatile__ ("ddedpdq 1, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 2:
+ __asm__ __volatile__ ("ddedpdq 2, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 3:
+ __asm__ __volatile__ ("ddedpdq 3, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ default:
+ fprintf(stderr, "Invalid value %d for SP\n", SP);
+ break;
+ }
+ result.dec_val128 = ret;
+ return result;
+}
+
+static dfp_val_t _test_denbcd(unsigned int S, dfp_val_t valB)
+{
+ _Decimal64 ret;
+ dfp_val_t result;
+ _Decimal64 f16 = valB.dec_val;
+ switch (S) {
+ case 0:
+ __asm__ __volatile__ ("denbcd. 0, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 1:
+ __asm__ __volatile__ ("denbcd. 1, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ default:
+ fprintf(stderr, "Invalid value %d for S\n", S);
+ break;
+ }
+ result.dec_val = ret;
+ return result;
+}
+
+
+static dfp_val_t _test_denbcdq(unsigned int S, dfp_val_t valB)
+{
+ _Decimal128 ret;
+ dfp_val_t result;
+ _Decimal128 f16 = valB.dec_val128;
+ switch (S) {
+ case 0:
+ __asm__ __volatile__ ("denbcdq 0, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ case 1:
+ __asm__ __volatile__ ("denbcdq 1, %0, %1" : "=f" (ret) : "f" (f16));
+ break;
+ default:
+ fprintf(stderr, "Invalid value %d for S\n", S);
+ break;
+ }
+ result.dec_val128 = ret;
+ return result;
+}
+
+
+typedef void (*test_func_t)(unsigned int imm, unsigned int imm2, dfp_val_t valB);
+typedef dfp_val_t (*test_func_bcd_t)(unsigned int imm, dfp_val_t valB);
+typedef void (*test_driver_func_t)(void);
+typedef struct test_table
+{
+ test_driver_func_t test_category;
+ char * name;
+} test_table_t;
+
+/*
+ * 345.0DD (0x2207c00000000000 0xe50)
+ * 1.2300e+5DD (0x2207c00000000000 0x14c000)
+ * -16.0DD (0xa207c00000000000 0xe0)
+ * 0.00189DD (0x2206c00000000000 0xcf)
+ * -4.1235DD (0xa205c00000000000 0x10a395bcf)
+ * 9.8399e+20DD (0x2209400000000000 0x253f1f534acdd4)
+ * 0DD (0x2208000000000000 0x0)
+ * 0DD (0x2208000000000000 0x0)
+ * infDD (0x7800000000000000 0x0)
+ * nanDD (0x7c00000000000000 0x0
+ */
+static unsigned long long dfp128_vals[] = {
+ // Some finite numbers
+ 0x2207c00000000000ULL, 0x0000000000000e50ULL,
+ 0x2207c00000000000ULL, 0x000000000014c000ULL,
+ 0xa207c00000000000ULL, 0x00000000000000e0ULL,
+ 0x2206c00000000000ULL, 0x00000000000000cfULL,
+ 0xa205c00000000000ULL, 0x000000010a395bcfULL,
+ 0x6209400000fd0000ULL, 0x00253f1f534acdd4ULL, // huge number
+ 0x000400000089b000ULL, 0x0a6000d000000049ULL, // very small number
+ // flavors of zero
+ 0x2208000000000000ULL, 0x0000000000000000ULL,
+ 0xa208000000000000ULL, 0x0000000000000000ULL, // negative
+ 0xa248000000000000ULL, 0x0000000000000000ULL,
+ // flavors of NAN
+ 0x7c00000000000000ULL, 0x0000000000000000ULL, // quiet
+ 0xfc00000000000000ULL, 0xc00100035b007700ULL,
+ 0x7e00000000000000ULL, 0xfe000000d0e0a0d0ULL, // signaling
+ // flavors of Infinity
+ 0x7800000000000000ULL, 0x0000000000000000ULL,
+ 0xf800000000000000ULL, 0x0000000000000000ULL, // negative
+ 0xf900000000000000ULL, 0x0000000000000000ULL
+};
+
+static unsigned long long dfp64_vals[] = {
+ // various finite numbers
+ 0x2234000000000e50ULL,
+ 0x223400000014c000ULL,
+ 0xa2340000000000e0ULL,// negative
+ 0x22240000000000cfULL,
+ 0xa21400010a395bcfULL,// negative
+ 0x6e4d3f1f534acdd4ULL,// huge number
+ 0x000400000089b000ULL,// very small number
+ // flavors of zero
+ 0x2238000000000000ULL,
+ 0xa238000000000000ULL,
+ 0x4248000000000000ULL,
+ // flavors of NAN
+ 0x7e34000000000111ULL,
+ 0xfe000000d0e0a0d0ULL,//signaling
+ 0xfc00000000000000ULL,//quiet
+ // flavors of Infinity
+ 0x7800000000000000ULL,
+ 0xf800000000000000ULL,//negative
+ 0x7a34000000000000ULL,
+};
+
+/* The bcd64_vals and bdc128_vals hold the unique results of executing
+ * the ddedpd instruction on the basic dfp64 and dfp128 array values.
+ * Executing the inverse operation (denbcd) on these values with the
+ * appropriate S (signed) value should yield values approximating the
+ * original dfp values (except being 2^4 in magnitude since the decoding
+ * operation shifted the value one hex digit to the left to make room
+ * for signedness info).
+ */
+static unsigned long long bcd64_vals[] = {
+ 0x0000000000003450ULL,
+ 0x000000000003450cULL,
+ 0x000000000003450fULL,
+ 0x0000000001230000ULL,
+ 0x000000001230000cULL,
+ 0x000000001230000fULL,
+ 0x0000000000000160ULL,
+ 0x000000000000160dULL,
+ 0x0000000000000189ULL,
+ 0x000000000000189cULL,
+ 0x000000000000189fULL,
+ 0x0000004123456789ULL,
+ 0x000004123456789dULL,
+ 0x9839871234533354ULL,
+ 0x839871234533354cULL,
+ 0x839871234533354fULL,
+ 0x0000000008864000ULL,
+ 0x000000008864000cULL,
+ 0x000000008864000fULL,
+ 0x0000000000000000ULL,
+ 0x000000000000000cULL,
+ 0x000000000000000fULL,
+ 0x000000000000000dULL,
+ 0x0000000000000211ULL,
+ 0x000000000000211cULL,
+ 0x000000000000211fULL,
+ 0x0000003882028150ULL,
+ 0x000003882028150dULL
+ };
+
+static unsigned long long bcd128_vals[] = {
+ 0x0000000000000000ULL, 0x0000000000003450ULL,
+ 0x0000000000000000ULL, 0x000000000003450cULL,
+ 0x0000000000000000ULL, 0x000000000003450fULL,
+ 0x0000000000000000ULL, 0x0000000001230000ULL,
+ 0x0000000000000000ULL, 0x000000001230000cULL,
+ 0x0000000000000000ULL, 0x000000001230000fULL,
+ 0x0000000000000000ULL, 0x0000000000000160ULL,
+ 0x0000000000000000ULL, 0x000000000000160dULL,
+ 0x0000000000000000ULL, 0x0000000000000189ULL,
+ 0x0000000000000000ULL, 0x000000000000189cULL,
+ 0x0000000000000000ULL, 0x000000000000189fULL,
+ 0x0000000000000000ULL, 0x0000004123456789ULL,
+ 0x0000000000000000ULL, 0x000004123456789dULL,
+ 0x0000097100000000ULL, 0x9839871234533354ULL,
+ 0x0000971000000009ULL, 0x839871234533354cULL,
+ 0x0000971000000009ULL, 0x839871234533354fULL,
+ 0x0000010954000051ULL, 0x8000640000000049ULL,
+ 0x0000109540000518ULL, 0x000640000000049cULL,
+ 0x0000109540000518ULL, 0x000640000000049fULL,
+ 0x0000000000000000ULL, 0x0000000000000000ULL,
+ 0x0000000000000000ULL, 0x000000000000000cULL,
+ 0x0000000000000000ULL, 0x000000000000000fULL,
+ 0x0000000000000000ULL, 0x000000000000000dULL,
+ 0x0000000000080000ULL, 0x0200801330811600ULL,
+ 0x0000000000800000ULL, 0x200801330811600dULL,
+ 0x0000000000088170ULL, 0x0000003882028150ULL,
+ 0x0000000000881700ULL, 0x000003882028150cULL,
+ 0x0000000000881700ULL, 0x000003882028150fULL
+};
+
+// Both Long and Quad arrays of DFP values should have the same length, so it
+// doesn't matter which array I use for calculating the following #define.
+#define NUM_DFP_VALS (sizeof(dfp64_vals)/8)
+
+typedef enum {
+ LONG_TEST,
+ QUAD_TEST
+} precision_type_t;
+
+typedef struct dfp_one_arg_test
+{
+ test_func_t test_func;
+ const char * name;
+ precision_type_t precision;
+ const char * op;
+} dfp_one_arg_test_t;
+
+typedef struct dfp_one_arg_bcd_test
+{
+ test_func_bcd_t test_func;
+ const char * name;
+ precision_type_t precision;
+ const char * op;
+} dfp_one_arg_bcd_test_t;
+
+static dfp_one_arg_bcd_test_t
+dfp_test_dfp_ddedpd_tests[] = {
+ { &_test_ddedpd, "ddedpd", LONG_TEST, "[D->B]"},
+ { &_test_ddedpdq, "ddedpdq", QUAD_TEST, "[D->B]"},
+ { NULL, NULL, 0, NULL}
+};
+
+static void test_dfp_ddedpd_ops(void)
+{
+ test_func_bcd_t func;
+ dfp_val_t test_val;
+
+ int k = 0;
+
+ while ((func = dfp_test_dfp_ddedpd_tests[k].test_func)) {
+ int i, j;
+ dfp_one_arg_bcd_test_t test_def = dfp_test_dfp_ddedpd_tests[k];
+
+ for (i = 0; i < NUM_DFP_VALS; i++) {
+ unsigned int SP;
+
+ if (test_def.precision == LONG_TEST) {
+ test_val.u64_val = dfp64_vals[i];
+ } else {
+ test_val.u128.valu = dfp128_vals[i * 2];
+ test_val.u64_val = test_val.u128.valu;
+ test_val.u128.vall = dfp128_vals[(i * 2) + 1];
+ }
+
+ for (SP = 0; SP < 4; SP++) {
+ dfp_val_t result;
+ result = (*func)(SP, test_val);
+ printf("%s (SP=%d) %s%016llx", test_def.name, SP,
+ test_def.op, test_val.u64_val);
+ if (test_def.precision == QUAD_TEST) {
+ printf(" %016llx", test_val.u128.vall);
+ }
+ if (test_def.precision == LONG_TEST)
+ printf(" ==> %016llx\n", result.u64_val);
+ else
+ printf(" ==> %016llx %016llx\n", result.u128.valu, result.u128.vall);
+ }
+ }
+ k++;
+ printf( "\n" );
+ }
+}
+
+static dfp_one_arg_bcd_test_t
+dfp_test_dfp_denbcd_tests[] = {
+ { &_test_denbcd, "denbcd", LONG_TEST, "[B->D]"},
+ { &_test_denbcdq, "denbcdq", QUAD_TEST, "[B->D]"},
+ { NULL, NULL, 0, NULL}
+};
+
+static void test_dfp_denbcd_ops(void)
+{
+ test_func_bcd_t func;
+ dfp_val_t test_val;
+ int num_test_vals;
+
+ int k = 0;
+
+ while ((func = dfp_test_dfp_denbcd_tests[k].test_func)) {
+ int i, j;
+ dfp_one_arg_bcd_test_t test_def = dfp_test_dfp_denbcd_tests[k];
+ if (test_def.precision == LONG_TEST)
+ num_test_vals = sizeof(bcd64_vals)/sizeof(unsigned long long);
+ else
+ num_test_vals = sizeof(bcd128_vals)/(2 * sizeof(unsigned long long));
+
+ for (i = 0; i < num_test_vals; i++) {
+ unsigned int S;
+ dfp_val_t result;
+ /* The DPD-to-BCD decodings may contain up to 3 decodings for each normal DFP
+ * value: the first is an unsigned decoding, and the other two are
+ * signed decodings, with SP[1] set to '0' and '1' respectively at decode
+ * time. But some of the results of decodings were duplicates, so they were
+ * not included in the bcd64_vals and bcd128_vals arrays.
+ *
+ * When doing the encoding operation (denbcd), we'll attempt both S=0 and
+ * S=1; one or the other should encode the BCD value to something close to
+ * its original DFP value (except being 2^4 in magnitude since the decoding
+ * operation shifted the value one hex digit to the left to make room
+ * for signedness info).
+ */
+ for (S = 0; S < 2; S++) {
+ if (test_def.precision == LONG_TEST) {
+ test_val.u64_val = bcd64_vals[i];
+ } else {
+ test_val.u128.valu = bcd128_vals[i * 2];
+ test_val.u64_val = test_val.u128.valu;
+ test_val.u128.vall = bcd128_vals[(i * 2) + 1];
+ }
+
+ result = (*func)(S, test_val);
+ printf("%s (S=%d) %s%016llx", test_def.name, S,
+ test_def.op, test_val.u64_val);
+ if (test_def.precision == QUAD_TEST) {
+ printf(" %016llx", test_val.u128.vall);
+ }
+ if (test_def.precision == LONG_TEST)
+ printf(" ==> %016llx\n", result.u64_val);
+ else
+ printf(" ==> %016llx %016llx\n", result.u128.valu, result.u128.vall);
+ }
+ }
+ k++;
+ printf( "\n" );
+ }
+}
+
+
+static dfp_one_arg_test_t
+dfp_test_significance_tests[] = {
+ { &_test_dtstsf, "dtstsf", LONG_TEST, "[tSig]"},
+ { &_test_dtstsfq, "dtstsfq", QUAD_TEST, "[tSig]"},
+ { NULL, NULL, 0, NULL}
+};
+
+static void test_dfp_test_significance_ops(void)
+{
+ test_func_t func;
+ dfp_val_t test_valB;
+ int k = 0;
+ unsigned int BF_vals[] = {BF_val1, BF_val2, BF_val3};
+ unsigned int reference_sig, reference_sig_vals[] = {0U, 1U, 2U, 4U, 6U, 63U};
+ int num_reference_sig_vals = sizeof(reference_sig_vals)/sizeof(unsigned int);
+
+ while ((func = dfp_test_significance_tests[k].test_func)) {
+ int i;
+ dfp_one_arg_test_t test_def = dfp_test_significance_tests[k];
+
+ for (i = 0; i < NUM_DFP_VALS; i++) {
+ int j;
+ if (test_def.precision == LONG_TEST) {
+ test_valB.u64_val = dfp64_vals[i];
+ } else {
+ test_valB.u128.valu = dfp128_vals[i * 2];
+ test_valB.u64_val = test_valB.u128.valu;
+ test_valB.u128.vall = dfp128_vals[(i * 2) + 1];
+ }
+
+ for (j = 0; j < num_reference_sig_vals; j++) {
+ int bf_idx, BF;
+ reference_sig = reference_sig_vals[j];
+ for (bf_idx = 0; bf_idx < sizeof(BF_vals)/sizeof(unsigned int); bf_idx++) {
+ unsigned int condreg;
+ unsigned int flags;
+ BF = BF_vals[bf_idx];
+ SET_FPSCR_ZERO;
+ SET_CR_XER_ZERO;
+ (*func)(BF, reference_sig, test_valB);
+ GET_CR(flags);
+
+ condreg = ((flags >> (4 * (7-BF)))) & 0xf;
+ printf("%s (ref_sig=%d) %s%016llx", test_def.name, reference_sig,
+ test_def.op, test_valB.u64_val);
+ if (test_def.precision == QUAD_TEST) {
+ printf(" %016llx", test_valB.u128.vall);
+ }
+ printf(" => %x (BF=%d)\n", condreg, BF);
+ }
+ }
+ printf( "\n" );
+ }
+ k++;
+ }
+}
+
+static test_table_t
+ all_tests[] =
+{
+ { &test_dfp_test_significance_ops,
+ "Test DFP test significance instructions"},
+ { &test_dfp_ddedpd_ops,
+ "Test DFP DPD-to-BCD instructions"},
+ { &test_dfp_denbcd_ops,
+ "Test DFP BCD-to-DPD instructions"},
+ { NULL, NULL }
+};
+#endif // HAS_DFP
+
+int main() {
+#if defined(HAS_DFP)
+
+ test_table_t aTest;
+ test_driver_func_t func;
+ int i = 0;
+
+ while ((func = all_tests[i].test_category)) {
+ aTest = all_tests[i];
+ printf( "%s\n", aTest.name );
+ (*func)();
+ i++;
+ }
+
+#endif // HAS_DFP
+ return 0;
+}
Modified: trunk/memcheck/mc_translate.c (+2 -0)
===================================================================
--- trunk/memcheck/mc_translate.c 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/memcheck/mc_translate.c 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -3528,6 +3528,8 @@
case Iop_ReinterpF32asI32:
case Iop_ReinterpI64asD64:
case Iop_ReinterpD64asI64:
+ case Iop_DPBtoBCD:
+ case Iop_BCDtoDPB:
case Iop_NotV128:
case Iop_Not64:
case Iop_Not32:
Added: trunk/none/tests/ppc64/test_dfp5.vgtest (+2 -0)
===================================================================
--- trunk/none/tests/ppc64/test_dfp5.vgtest 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc64/test_dfp5.vgtest 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -0,0 +1,2 @@
+prereq: ../../../tests/check_dfp_cap
+prog: test_dfp5
Property changed: trunk/none/tests/ppc64/test_dfp5.c (+0 -0)
___________________________________________________________________
Name: svn:special
+ *
Added: trunk/none/tests/ppc64/test_dfp5.c (+1 -0)
===================================================================
--- trunk/none/tests/ppc64/test_dfp5.c 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc64/test_dfp5.c 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -0,0 +1 @@
+link ../../../none/tests/ppc32/test_dfp5.c
\ No newline at end of file
Added: trunk/none/tests/ppc64/test_dfp5.stderr.exp (+2 -0)
===================================================================
--- trunk/none/tests/ppc64/test_dfp5.stderr.exp 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc64/test_dfp5.stderr.exp 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -0,0 +1,2 @@
+
+
Added: trunk/none/tests/ppc32/test_dfp5.stdout.exp (+855 -0)
===================================================================
--- trunk/none/tests/ppc32/test_dfp5.stdout.exp 2012-06-02 21:30:41 +01:00 (rev 12602)
+++ trunk/none/tests/ppc32/test_dfp5.stdout.exp 2012-06-03 00:48:06 -23:00 (rev 12603)
@@ -0,0 +1,855 @@
+Test DFP test significance instructions
+dtstsf (ref_sig=0) [tSig]2234000000000e50 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]2234000000000e50 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]2234000000000e50 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]2234000000000e50 => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]2234000000000e50 => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]2234000000000e50 => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]2234000000000e50 => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]2234000000000e50 => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]2234000000000e50 => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]2234000000000e50 => 2 (BF=0)
+dtstsf (ref_sig=4) [tSig]2234000000000e50 => 2 (BF=1)
+dtstsf (ref_sig=4) [tSig]2234000000000e50 => 2 (BF=6)
+dtstsf (ref_sig=6) [tSig]2234000000000e50 => 4 (BF=0)
+dtstsf (ref_sig=6) [tSig]2234000000000e50 => 4 (BF=1)
+dtstsf (ref_sig=6) [tSig]2234000000000e50 => 4 (BF=6)
+dtstsf (ref_sig=63) [tSig]2234000000000e50 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]2234000000000e50 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]2234000000000e50 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]223400000014c000 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]223400000014c000 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]223400000014c000 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]223400000014c000 => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]223400000014c000 => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]223400000014c000 => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]223400000014c000 => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]223400000014c000 => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]223400000014c000 => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]223400000014c000 => 8 (BF=0)
+dtstsf (ref_sig=4) [tSig]223400000014c000 => 8 (BF=1)
+dtstsf (ref_sig=4) [tSig]223400000014c000 => 8 (BF=6)
+dtstsf (ref_sig=6) [tSig]223400000014c000 => 8 (BF=0)
+dtstsf (ref_sig=6) [tSig]223400000014c000 => 8 (BF=1)
+dtstsf (ref_sig=6) [tSig]223400000014c000 => 8 (BF=6)
+dtstsf (ref_sig=63) [tSig]223400000014c000 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]223400000014c000 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]223400000014c000 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]a2340000000000e0 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]a2340000000000e0 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]a2340000000000e0 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]a2340000000000e0 => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]a2340000000000e0 => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]a2340000000000e0 => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]a2340000000000e0 => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]a2340000000000e0 => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]a2340000000000e0 => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]a2340000000000e0 => 4 (BF=0)
+dtstsf (ref_sig=4) [tSig]a2340000000000e0 => 4 (BF=1)
+dtstsf (ref_sig=4) [tSig]a2340000000000e0 => 4 (BF=6)
+dtstsf (ref_sig=6) [tSig]a2340000000000e0 => 4 (BF=0)
+dtstsf (ref_sig=6) [tSig]a2340000000000e0 => 4 (BF=1)
+dtstsf (ref_sig=6) [tSig]a2340000000000e0 => 4 (BF=6)
+dtstsf (ref_sig=63) [tSig]a2340000000000e0 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]a2340000000000e0 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]a2340000000000e0 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]22240000000000cf => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]22240000000000cf => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]22240000000000cf => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]22240000000000cf => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]22240000000000cf => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]22240000000000cf => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]22240000000000cf => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]22240000000000cf => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]22240000000000cf => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]22240000000000cf => 4 (BF=0)
+dtstsf (ref_sig=4) [tSig]22240000000000cf => 4 (BF=1)
+dtstsf (ref_sig=4) [tSig]22240000000000cf => 4 (BF=6)
+dtstsf (ref_sig=6) [tSig]22240000000000cf => 4 (BF=0)
+dtstsf (ref_sig=6) [tSig]22240000000000cf => 4 (BF=1)
+dtstsf (ref_sig=6) [tSig]22240000000000cf => 4 (BF=6)
+dtstsf (ref_sig=63) [tSig]22240000000000cf => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]22240000000000cf => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]22240000000000cf => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]a21400010a395bcf => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]a21400010a395bcf => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]a21400010a395bcf => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]a21400010a395bcf => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]a21400010a395bcf => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]a21400010a395bcf => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]a21400010a395bcf => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]a21400010a395bcf => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]a21400010a395bcf => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]a21400010a395bcf => 8 (BF=0)
+dtstsf (ref_sig=4) [tSig]a21400010a395bcf => 8 (BF=1)
+dtstsf (ref_sig=4) [tSig]a21400010a395bcf => 8 (BF=6)
+dtstsf (ref_sig=6) [tSig]a21400010a395bcf => 8 (BF=0)
+dtstsf (ref_sig=6) [tSig]a21400010a395bcf => 8 (BF=1)
+dtstsf (ref_sig=6) [tSig]a21400010a395bcf => 8 (BF=6)
+dtstsf (ref_sig=63) [tSig]a21400010a395bcf => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]a21400010a395bcf => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]a21400010a395bcf => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]6e4d3f1f534acdd4 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]6e4d3f1f534acdd4 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]6e4d3f1f534acdd4 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]6e4d3f1f534acdd4 => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]6e4d3f1f534acdd4 => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]6e4d3f1f534acdd4 => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]6e4d3f1f534acdd4 => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]6e4d3f1f534acdd4 => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]6e4d3f1f534acdd4 => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]6e4d3f1f534acdd4 => 8 (BF=0)
+dtstsf (ref_sig=4) [tSig]6e4d3f1f534acdd4 => 8 (BF=1)
+dtstsf (ref_sig=4) [tSig]6e4d3f1f534acdd4 => 8 (BF=6)
+dtstsf (ref_sig=6) [tSig]6e4d3f1f534acdd4 => 8 (BF=0)
+dtstsf (ref_sig=6) [tSig]6e4d3f1f534acdd4 => 8 (BF=1)
+dtstsf (ref_sig=6) [tSig]6e4d3f1f534acdd4 => 8 (BF=6)
+dtstsf (ref_sig=63) [tSig]6e4d3f1f534acdd4 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]6e4d3f1f534acdd4 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]6e4d3f1f534acdd4 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]000400000089b000 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]000400000089b000 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]000400000089b000 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]000400000089b000 => 8 (BF=0)
+dtstsf (ref_sig=1) [tSig]000400000089b000 => 8 (BF=1)
+dtstsf (ref_sig=1) [tSig]000400000089b000 => 8 (BF=6)
+dtstsf (ref_sig=2) [tSig]000400000089b000 => 8 (BF=0)
+dtstsf (ref_sig=2) [tSig]000400000089b000 => 8 (BF=1)
+dtstsf (ref_sig=2) [tSig]000400000089b000 => 8 (BF=6)
+dtstsf (ref_sig=4) [tSig]000400000089b000 => 8 (BF=0)
+dtstsf (ref_sig=4) [tSig]000400000089b000 => 8 (BF=1)
+dtstsf (ref_sig=4) [tSig]000400000089b000 => 8 (BF=6)
+dtstsf (ref_sig=6) [tSig]000400000089b000 => 8 (BF=0)
+dtstsf (ref_sig=6) [tSig]000400000089b000 => 8 (BF=1)
+dtstsf (ref_sig=6) [tSig]000400000089b000 => 8 (BF=6)
+dtstsf (ref_sig=63) [tSig]000400000089b000 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]000400000089b000 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]000400000089b000 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]2238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]2238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]2238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]2238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=1) [tSig]2238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=1) [tSig]2238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=2) [tSig]2238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=2) [tSig]2238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=2) [tSig]2238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=4) [tSig]2238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=4) [tSig]2238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=4) [tSig]2238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=6) [tSig]2238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=6) [tSig]2238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=6) [tSig]2238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=63) [tSig]2238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]2238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]2238000000000000 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]a238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]a238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]a238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]a238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=1) [tSig]a238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=1) [tSig]a238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=2) [tSig]a238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=2) [tSig]a238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=2) [tSig]a238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=4) [tSig]a238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=4) [tSig]a238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=4) [tSig]a238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=6) [tSig]a238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=6) [tSig]a238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=6) [tSig]a238000000000000 => 4 (BF=6)
+dtstsf (ref_sig=63) [tSig]a238000000000000 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]a238000000000000 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]a238000000000000 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]4248000000000000 => 4 (BF=0)
+dtstsf (ref_sig=0) [tSig]4248000000000000 => 4 (BF=1)
+dtstsf (ref_sig=0) [tSig]4248000000000000 => 4 (BF=6)
+dtstsf (ref_sig=1) [tSig]4248000000000000 => 4 (BF=0)
+dtstsf (ref_sig=1) [tSig]4248000000000000 => 4 (BF=1)
+dtstsf (ref_sig=1) [tSig]4248000000000000 => 4 (BF=6)
+dtstsf (ref_sig=2) [tSig]4248000000000000 => 4 (BF=0)
+dtstsf (ref_sig=2) [tSig]4248000000000000 => 4 (BF=1)
+dtstsf (ref_sig=2) [tSig]4248000000000000 => 4 (BF=6)
+dtstsf (ref_sig=4) [tSig]4248000000000000 => 4 (BF=0)
+dtstsf (ref_sig=4) [tSig]4248000000000000 => 4 (BF=1)
+dtstsf (ref_sig=4) [tSig]4248000000000000 => 4 (BF=6)
+dtstsf (ref_sig=6) [tSig]4248000000000000 => 4 (BF=0)
+dtstsf (ref_sig=6) [tSig]4248000000000000 => 4 (BF=1)
+dtstsf (ref_sig=6) [tSig]4248000000000000 => 4 (BF=6)
+dtstsf (ref_sig=63) [tSig]4248000000000000 => 4 (BF=0)
+dtstsf (ref_sig=63) [tSig]4248000000000000 => 4 (BF=1)
+dtstsf (ref_sig=63) [tSig]4248000000000000 => 4 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]7e34000000000111 => 1 (BF=0)
+dtstsf (ref_sig=0) [tSig]7e34000000000111 => 1 (BF=1)
+dtstsf (ref_sig=0) [tSig]7e34000000000111 => 1 (BF=6)
+dtstsf (ref_sig=1) [tSig]7e34000000000111 => 1 (BF=0)
+dtstsf (ref_sig=1) [tSig]7e34000000000111 => 1 (BF=1)
+dtstsf (ref_sig=1) [tSig]7e34000000000111 => 1 (BF=6)
+dtstsf (ref_sig=2) [tSig]7e34000000000111 => 1 (BF=0)
+dtstsf (ref_sig=2) [tSig]7e34000000000111 => 1 (BF=1)
+dtstsf (ref_sig=2) [tSig]7e34000000000111 => 1 (BF=6)
+dtstsf (ref_sig=4) [tSig]7e34000000000111 => 1 (BF=0)
+dtstsf (ref_sig=4) [tSig]7e34000000000111 => 1 (BF=1)
+dtstsf (ref_sig=4) [tSig]7e34000000000111 => 1 (BF=6)
+dtstsf (ref_sig=6) [tSig]7e34000000000111 => 1 (BF=0)
+dtstsf (ref_sig=6) [tSig]7e34000000000111 => 1 (BF=1)
+dtstsf (ref_sig=6) [tSig]7e34000000000111 => 1 (BF=6)
+dtstsf (ref_sig=63) [tSig]7e34000000000111 => 1 (BF=0)
+dtstsf (ref_sig=63) [tSig]7e34000000000111 => 1 (BF=1)
+dtstsf (ref_sig=63) [tSig]7e34000000000111 => 1 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]fe000000d0e0a0d0 => 1 (BF=0)
+dtstsf (ref_sig=0) [tSig]fe000000d0e0a0d0 => 1 (BF=1)
+dtstsf (ref_sig=0) [tSig]fe000000d0e0a0d0 => 1 (BF=6)
+dtstsf (ref_sig=1) [tSig]fe000000d0e0a0d0 => 1 (BF=0)
+dtstsf (ref_sig=1) [tSig]fe000000d0e0a0d0 => 1 (BF=1)
+dtstsf (ref_sig=1) [tSig]fe000000d0e0a0d0 => 1 (BF=6)
+dtstsf (ref_sig=2) [tSig]fe000000d0e0a0d0 => 1 (BF=0)
+dtstsf (ref_sig=2) [tSig]fe000000d0e0a0d0 => 1 (BF=1)
+dtstsf (ref_sig=2) [tSig]fe000000d0e0a0d0 => 1 (BF=6)
+dtstsf (ref_sig=4) [tSig]fe000000d0e0a0d0 => 1 (BF=0)
+dtstsf (ref_sig=4) [tSig]fe000000d0e0a0d0 => 1 (BF=1)
+dtstsf (ref_sig=4) [tSig]fe000000d0e0a0d0 => 1 (BF=6)
+dtstsf (ref_sig=6) [tSig]fe000000d0e0a0d0 => 1 (BF=0)
+dtstsf (ref_sig=6) [tSig]fe000000d0e0a0d0 => 1 (BF=1)
+dtstsf (ref_sig=6) [tSig]fe000000d0e0a0d0 => 1 (BF=6)
+dtstsf (ref_sig=63) [tSig]fe000000d0e0a0d0 => 1 (BF=0)
+dtstsf (ref_sig=63) [tSig]fe000000d0e0a0d0 => 1 (BF=1)
+dtstsf (ref_sig=63) [tSig]fe000000d0e0a0d0 => 1 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]fc00000000000000 => 1 (BF=0)
+dtstsf (ref_sig=0) [tSig]fc00000000000000 => 1 (BF=1)
+dtstsf (ref_sig=0) [tSig]fc00000000000000 => 1 (BF=6)
+dtstsf (ref_sig=1) [tSig]fc00000000000000 => 1 (BF=0)
+dtstsf (ref_sig=1) [tSig]fc00000000000000 => 1 (BF=1)
+dtstsf (ref_sig=1) [tSig]fc00000000000000 => 1 (BF=6)
+dtstsf (ref_sig=2) [tSig]fc00000000000000 => 1 (BF=0)
+dtstsf (ref_sig=2) [tSig]fc00000000000000 => 1 (BF=1)
+dtstsf (ref_sig=2) [tSig]fc00000000000000 => 1 (BF=6)
+dtstsf (ref_sig=4) [tSig]fc00000000000000 => 1 (BF=0)
+dtstsf (ref_sig=4) [tSig]fc00000000000000 => 1 (BF=1)
+dtstsf (ref_sig=4) [tSig]fc00000000000000 => 1 (BF=6)
+dtstsf (ref_sig=6) [tSig]fc00000000000000 => 1 (BF=0)
+dtstsf (ref_sig=6) [tSig]fc00000000000000 => 1 (BF=1)
+dtstsf (ref_sig=6) [tSig]fc00000000000000 => 1 (BF=6)
+dtstsf (ref_sig=63) [tSig]fc00000000000000 => 1 (BF=0)
+dtstsf (ref_sig=63) [tSig]fc00000000000000 => 1 (BF=1)
+dtstsf (ref_sig=63) [tSig]fc00000000000000 => 1 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]7800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=0) [tSig]7800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=0) [tSig]7800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=1) [tSig]7800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=1) [tSig]7800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=1) [tSig]7800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=2) [tSig]7800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=2) [tSig]7800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=2) [tSig]7800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=4) [tSig]7800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=4) [tSig]7800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=4) [tSig]7800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=6) [tSig]7800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=6) [tSig]7800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=6) [tSig]7800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=63) [tSig]7800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=63) [tSig]7800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=63) [tSig]7800000000000000 => 1 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]f800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=0) [tSig]f800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=0) [tSig]f800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=1) [tSig]f800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=1) [tSig]f800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=1) [tSig]f800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=2) [tSig]f800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=2) [tSig]f800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=2) [tSig]f800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=4) [tSig]f800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=4) [tSig]f800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=4) [tSig]f800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=6) [tSig]f800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=6) [tSig]f800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=6) [tSig]f800000000000000 => 1 (BF=6)
+dtstsf (ref_sig=63) [tSig]f800000000000000 => 1 (BF=0)
+dtstsf (ref_sig=63) [tSig]f800000000000000 => 1 (BF=1)
+dtstsf (ref_sig=63) [tSig]f800000000000000 => 1 (BF=6)
+
+dtstsf (ref_sig=0) [tSig]7a34000000000000 => 1 (BF=0)
+dtstsf (ref_sig=0) [tSig]7a34000000000000 => 1 (BF=1)
+dtstsf (ref_sig=0) [tSig]7a34000000000000 => 1 (BF=6)
+dtstsf (ref_sig=1) [tSig]7a34000000000000 => 1 (BF=0)
+dtstsf (ref_sig=1) [tSig]7a34000000000000 => 1 (BF=1)
+dtstsf (ref_sig=1) [tSig]7a34000000000000 => 1 (BF=6)
+dtstsf (ref_sig=2) [tSig]7a34000000000000 => 1 (BF=0)
+dtstsf (ref_sig=2) [tSig]7a34000000000000 => 1 (BF=1)
+dtstsf (ref_sig=2) [tSig]7a34000000000000 => 1 (BF=6)
+dtstsf (ref_sig=4) [tSig]7a34000000000000 => 1 (BF=0)
+dtstsf (ref_sig=4) [tSig]7a34000000000000 => 1 (BF=1)
+dtstsf (ref_sig=4) [tSig]7a34000000000000 => 1 (BF=6)
+dtstsf (ref_sig=6) [tSig]7a34000000000000 => 1 (BF=0)
+dtstsf (ref_sig=6) [tSig]7a34000000000000 => 1 (BF=1)
+dtstsf (ref_sig=6) [tSig]7a34000000000000 => 1 (BF=6)
+dtstsf (ref_sig=63) [tSig]7a34000000000000 => 1 (BF=0)
+dtstsf (ref_sig=63) [tSig]7a34000000000000 => 1 (BF=1)
+dtstsf (ref_sig=63) [tSig]7a34000000000000 => 1 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]2207c00000000000 0000000000000e50 => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]2207c00000000000 0000000000000e50 => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]2207c00000000000 0000000000000e50 => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]2207c00000000000 0000000000000e50 => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]2207c00000000000 0000000000000e50 => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]2207c00000000000 0000000000000e50 => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]2207c00000000000 0000000000000e50 => 2 (BF=0)
+dtstsfq (ref_sig=4) [tSig]2207c00000000000 0000000000000e50 => 2 (BF=1)
+dtstsfq (ref_sig=4) [tSig]2207c00000000000 0000000000000e50 => 2 (BF=6)
+dtstsfq (ref_sig=6) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=0)
+dtstsfq (ref_sig=6) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=1)
+dtstsfq (ref_sig=6) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=6)
+dtstsfq (ref_sig=63) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]2207c00000000000 0000000000000e50 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]2207c00000000000 000000000014c000 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]2207c00000000000 000000000014c000 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]2207c00000000000 000000000014c000 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]2207c00000000000 000000000014c000 => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]2207c00000000000 000000000014c000 => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]2207c00000000000 000000000014c000 => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]2207c00000000000 000000000014c000 => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]2207c00000000000 000000000014c000 => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]2207c00000000000 000000000014c000 => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]2207c00000000000 000000000014c000 => 8 (BF=0)
+dtstsfq (ref_sig=4) [tSig]2207c00000000000 000000000014c000 => 8 (BF=1)
+dtstsfq (ref_sig=4) [tSig]2207c00000000000 000000000014c000 => 8 (BF=6)
+dtstsfq (ref_sig=6) [tSig]2207c00000000000 000000000014c000 => 8 (BF=0)
+dtstsfq (ref_sig=6) [tSig]2207c00000000000 000000000014c000 => 8 (BF=1)
+dtstsfq (ref_sig=6) [tSig]2207c00000000000 000000000014c000 => 8 (BF=6)
+dtstsfq (ref_sig=63) [tSig]2207c00000000000 000000000014c000 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]2207c00000000000 000000000014c000 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]2207c00000000000 000000000014c000 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]a207c00000000000 00000000000000e0 => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]a207c00000000000 00000000000000e0 => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]a207c00000000000 00000000000000e0 => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]a207c00000000000 00000000000000e0 => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]a207c00000000000 00000000000000e0 => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]a207c00000000000 00000000000000e0 => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=0)
+dtstsfq (ref_sig=4) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=1)
+dtstsfq (ref_sig=4) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=6)
+dtstsfq (ref_sig=6) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=0)
+dtstsfq (ref_sig=6) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=1)
+dtstsfq (ref_sig=6) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=6)
+dtstsfq (ref_sig=63) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]a207c00000000000 00000000000000e0 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]2206c00000000000 00000000000000cf => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]2206c00000000000 00000000000000cf => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]2206c00000000000 00000000000000cf => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]2206c00000000000 00000000000000cf => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]2206c00000000000 00000000000000cf => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]2206c00000000000 00000000000000cf => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]2206c00000000000 00000000000000cf => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]2206c00000000000 00000000000000cf => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]2206c00000000000 00000000000000cf => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]2206c00000000000 00000000000000cf => 4 (BF=0)
+dtstsfq (ref_sig=4) [tSig]2206c00000000000 00000000000000cf => 4 (BF=1)
+dtstsfq (ref_sig=4) [tSig]2206c00000000000 00000000000000cf => 4 (BF=6)
+dtstsfq (ref_sig=6) [tSig]2206c00000000000 00000000000000cf => 4 (BF=0)
+dtstsfq (ref_sig=6) [tSig]2206c00000000000 00000000000000cf => 4 (BF=1)
+dtstsfq (ref_sig=6) [tSig]2206c00000000000 00000000000000cf => 4 (BF=6)
+dtstsfq (ref_sig=63) [tSig]2206c00000000000 00000000000000cf => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]2206c00000000000 00000000000000cf => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]2206c00000000000 00000000000000cf => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]a205c00000000000 000000010a395bcf => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]a205c00000000000 000000010a395bcf => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]a205c00000000000 000000010a395bcf => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=0)
+dtstsfq (ref_sig=4) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=1)
+dtstsfq (ref_sig=4) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=6)
+dtstsfq (ref_sig=6) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=0)
+dtstsfq (ref_sig=6) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=1)
+dtstsfq (ref_sig=6) [tSig]a205c00000000000 000000010a395bcf => 8 (BF=6)
+dtstsfq (ref_sig=63) [tSig]a205c00000000000 000000010a395bcf => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]a205c00000000000 000000010a395bcf => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]a205c00000000000 000000010a395bcf => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]6209400000fd0000 00253f1f534acdd4 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]6209400000fd0000 00253f1f534acdd4 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]6209400000fd0000 00253f1f534acdd4 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=0)
+dtstsfq (ref_sig=4) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=1)
+dtstsfq (ref_sig=4) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=6)
+dtstsfq (ref_sig=6) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=0)
+dtstsfq (ref_sig=6) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=1)
+dtstsfq (ref_sig=6) [tSig]6209400000fd0000 00253f1f534acdd4 => 8 (BF=6)
+dtstsfq (ref_sig=63) [tSig]6209400000fd0000 00253f1f534acdd4 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]6209400000fd0000 00253f1f534acdd4 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]6209400000fd0000 00253f1f534acdd4 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]000400000089b000 0a6000d000000049 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]000400000089b000 0a6000d000000049 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]000400000089b000 0a6000d000000049 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=0)
+dtstsfq (ref_sig=1) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=1)
+dtstsfq (ref_sig=1) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=6)
+dtstsfq (ref_sig=2) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=0)
+dtstsfq (ref_sig=2) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=1)
+dtstsfq (ref_sig=2) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=6)
+dtstsfq (ref_sig=4) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=0)
+dtstsfq (ref_sig=4) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=1)
+dtstsfq (ref_sig=4) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=6)
+dtstsfq (ref_sig=6) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=0)
+dtstsfq (ref_sig=6) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=1)
+dtstsfq (ref_sig=6) [tSig]000400000089b000 0a6000d000000049 => 8 (BF=6)
+dtstsfq (ref_sig=63) [tSig]000400000089b000 0a6000d000000049 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]000400000089b000 0a6000d000000049 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]000400000089b000 0a6000d000000049 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]2208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]2208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]2208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]2208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=1) [tSig]2208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=1) [tSig]2208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=2) [tSig]2208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=2) [tSig]2208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=2) [tSig]2208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=4) [tSig]2208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=4) [tSig]2208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=4) [tSig]2208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=6) [tSig]2208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=6) [tSig]2208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=6) [tSig]2208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=63) [tSig]2208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]2208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]2208000000000000 0000000000000000 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]a208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]a208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]a208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]a208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=1) [tSig]a208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=1) [tSig]a208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=2) [tSig]a208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=2) [tSig]a208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=2) [tSig]a208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=4) [tSig]a208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=4) [tSig]a208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=4) [tSig]a208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=6) [tSig]a208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=6) [tSig]a208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=6) [tSig]a208000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=63) [tSig]a208000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]a208000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]a208000000000000 0000000000000000 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]a248000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=0) [tSig]a248000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=0) [tSig]a248000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=1) [tSig]a248000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=1) [tSig]a248000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=1) [tSig]a248000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=2) [tSig]a248000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=2) [tSig]a248000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=2) [tSig]a248000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=4) [tSig]a248000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=4) [tSig]a248000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=4) [tSig]a248000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=6) [tSig]a248000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=6) [tSig]a248000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=6) [tSig]a248000000000000 0000000000000000 => 4 (BF=6)
+dtstsfq (ref_sig=63) [tSig]a248000000000000 0000000000000000 => 4 (BF=0)
+dtstsfq (ref_sig=63) [tSig]a248000000000000 0000000000000000 => 4 (BF=1)
+dtstsfq (ref_sig=63) [tSig]a248000000000000 0000000000000000 => 4 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]7c00000000000000 0000000000000000 => 1 (BF=0)
+dtstsfq (ref_sig=0) [tSig]7c00000000000000 0000000000000000 => 1 (BF=1)
+dtstsfq (ref_sig=0) [tSig]7c00000000000000 0000000000000000 => 1 (BF=6)
+dtstsfq (ref_sig=1) [tSig]7c00000000000000 0000000000000000 => 1 (BF=0)
+dtstsfq (ref_sig=1) [tSig]7c00000000000000 0000000000000000 => 1 (BF=1)
+dtstsfq (ref_sig=1) [tSig]7c00000000000000 0000000000000000 => 1 (BF=6)
+dtstsfq (ref_sig=2) [tSig]7c00000000000000 0000000000000000 => 1 (BF=0)
+dtstsfq (ref_sig=2) [tSig]7c00000000000000 0000000000000000 => 1 (BF=1)
+dtstsfq (ref_sig=2) [tSig]7c00000000000000 0000000000000000 => 1 (BF=6)
+dtstsfq (ref_sig=4) [tSig]7c00000000000000 0000000000000000 => 1 (BF=0)
+dtstsfq (ref_sig=4) [tSig]7c00000000000000 0000000000000000 => 1 (BF=1)
+dtstsfq (ref_sig=4) [tSig]7c00000000000000 0000000000000000 => 1 (BF=6)
+dtstsfq (ref_sig=6) [tSig]7c00000000000000 0000000000000000 => 1 (BF=0)
+dtstsfq (ref_sig=6) [tSig]7c00000000000000 0000000000000000 => 1 (BF=1)
+dtstsfq (ref_sig=6) [tSig]7c00000000000000 0000000000000000 => 1 (BF=6)
+dtstsfq (ref_sig=63) [tSig]7c00000000000000 0000000000000000 => 1 (BF=0)
+dtstsfq (ref_sig=63) [tSig]7c00000000000000 0000000000000000 => 1 (BF=1)
+dtstsfq (ref_sig=63) [tSig]7c00000000000000 0000000000000000 => 1 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=0)
+dtstsfq (ref_sig=0) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=1)
+dtstsfq (ref_sig=0) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=6)
+dtstsfq (ref_sig=1) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=0)
+dtstsfq (ref_sig=1) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=1)
+dtstsfq (ref_sig=1) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=6)
+dtstsfq (ref_sig=2) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=0)
+dtstsfq (ref_sig=2) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=1)
+dtstsfq (ref_sig=2) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=6)
+dtstsfq (ref_sig=4) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=0)
+dtstsfq (ref_sig=4) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=1)
+dtstsfq (ref_sig=4) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=6)
+dtstsfq (ref_sig=6) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=0)
+dtstsfq (ref_sig=6) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=1)
+dtstsfq (ref_sig=6) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=6)
+dtstsfq (ref_sig=63) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=0)
+dtstsfq (ref_sig=63) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=1)
+dtstsfq (ref_sig=63) [tSig]fc00000000000000 c00100035b007700 => 1 (BF=6)
+
+dtstsfq (ref_sig=0) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=0)
+dtstsfq (ref_sig=0) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=1)
+dtstsfq (ref_sig=0) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=6)
+dtstsfq (ref_sig=1) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=0)
+dtstsfq (ref_sig=1) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=1)
+dtstsfq (ref_sig=1) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=6)
+dtstsfq (ref_sig=2) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=0)
+dtstsfq (ref_sig=2) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=1)
+dtstsfq (ref_sig=2) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=6)
+dtstsfq (ref_sig=4) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=0)
+dtstsfq (ref_sig=4) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=1)
+dtstsfq (ref_sig=4) [tSig]7e00000000000000 fe000000d0e0a0d0 => 1 (BF=6)
+dtstsfq ...
[truncated message content] |
|
From: <sv...@va...> - 2012-06-02 23:47:14
|
sewardj 2012-06-03 00:47:02 +0100 (Sun, 03 Jun 2012)
New Revision: 2367
Log:
POWER Processor decimal FP support, part 5 (VEX side). Bug #299694.
(Carl Love, ca...@us... and Maynard Johnson, may...@us...)
This patch adds support for Power Decimal Floating Point (DFP) . This
is the fifth patch set in the series of five to add the DFP
instruction support to Valgrind. Adds support for the ddedpd,
ddedpdq, denbcd, denbcdq, dtstsf, and dtstsfq instructions.
Modified files:
trunk/priv/guest_ppc_toIR.c
trunk/priv/host_generic_simd64.c
trunk/priv/host_generic_simd64.h
trunk/priv/host_ppc_isel.c
trunk/priv/ir_defs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/host_ppc_isel.c (+135 -8)
===================================================================
--- trunk/priv/host_ppc_isel.c 2012-06-02 21:29:22 +01:00 (rev 2366)
+++ trunk/priv/host_ppc_isel.c 2012-06-03 00:47:02 -23:00 (rev 2367)
@@ -42,6 +42,7 @@
#include "main_util.h"
#include "main_globals.h"
#include "host_generic_regs.h"
+#include "host_generic_simd64.h"
#include "host_ppc_defs.h"
/* GPR register class for ppc32/64 */
@@ -2002,9 +2003,58 @@
add_to_sp( env, 16 ); // Reset SP
return r_dst;
}
-
break;
+ case Iop_BCDtoDPB: {
+ PPCCondCode cc;
+ UInt argiregs;
+ HReg argregs[1];
+ HReg r_dst = newVRegI(env);
+ Int argreg;
+ HWord* fdescr;
+
+ argiregs = 0;
+ argreg = 0;
+ argregs[0] = hregPPC_GPR3(mode64);
+
+ argiregs |= (1 << (argreg+3));
+ addInstr(env, mk_iMOVds_RR( argregs[argreg++],
+ iselWordExpr_R(env, e->Iex.Unop.arg) ) );
+
+ cc = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
+
+ fdescr = (HWord*)h_BCDtoDPB;
+ addInstr(env, PPCInstr_Call( cc, (Addr64)(fdescr[0]), argiregs ) );
+
+ addInstr(env, mk_iMOVds_RR(r_dst, argregs[0]));
+ return r_dst;
+ }
+
+ case Iop_DPBtoBCD: {
+ PPCCondCode cc;
+ UInt argiregs;
+ HReg argregs[1];
+ HReg r_dst = newVRegI(env);
+ Int argreg;
+ HWord* fdescr;
+
+ argiregs = 0;
+ argreg = 0;
+ argregs[0] = hregPPC_GPR3(mode64);
+
+ argiregs |= (1 << (argreg+3));
+ addInstr(env, mk_iMOVds_RR( argregs[argreg++],
+ iselWordExpr_R(env, e->Iex.Unop.arg) ) );
+
+ cc = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
+
+ fdescr = (HWord*)h_DPBtoBCD;
+ addInstr(env, PPCInstr_Call( cc, (Addr64)(fdescr[0]), argiregs ) );
+
+ addInstr(env, mk_iMOVds_RR(r_dst, argregs[0]));
+ return r_dst;
+ }
+
default:
break;
}
@@ -3154,10 +3204,10 @@
}
case Iop_ReinterpD64asI64: {
- HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
- PPCAMode *am_addr0, *am_addr1;
- HReg r_dstLo = newVRegI(env);
- HReg r_dstHi = newVRegI(env);
+ HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
+ PPCAMode *am_addr0, *am_addr1;
+ HReg r_dstLo = newVRegI(env);
+ HReg r_dstHi = newVRegI(env);
sub_from_sp( env, 16 ); // Move SP down 16 bytes
@@ -3167,7 +3217,7 @@
// store as D64
addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
fr_src, am_addr0 ));
-
+
// load hi,lo as Ity_I32's
addInstr(env, PPCInstr_Load( 4, r_dstHi,
am_addr0, False/*mode32*/ ));
@@ -3175,12 +3225,89 @@
am_addr1, False/*mode32*/ ));
*rHi = r_dstHi;
*rLo = r_dstLo;
-
+
add_to_sp( env, 16 ); // Reset SP
return;
}
+ case Iop_BCDtoDPB: {
+ PPCCondCode cc;
+ UInt argiregs;
+ HReg argregs[2];
+ Int argreg;
+ HReg tLo = newVRegI(env);
+ HReg tHi = newVRegI(env);
+ HReg tmpHi;
+ HReg tmpLo;
+ ULong target;
+ Bool mode64 = env->mode64;
+
+ argregs[0] = hregPPC_GPR3(mode64);
+ argregs[1] = hregPPC_GPR4(mode64);
+
+ argiregs = 0;
+ argreg = 0;
+
+ iselInt64Expr( &tmpHi, &tmpLo, env, e->Iex.Unop.arg );
+
+ argiregs |= ( 1 << (argreg+3 ) );
+ addInstr( env, mk_iMOVds_RR( argregs[argreg++], tmpHi ) );
+
+ argiregs |= ( 1 << (argreg+3 ) );
+ addInstr( env, mk_iMOVds_RR( argregs[argreg], tmpLo ) );
+
+ cc = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
+ target = toUInt( Ptr_to_ULong(h_BCDtoDPB ) );
+
+ addInstr( env, PPCInstr_Call( cc, (Addr64)target, argiregs ) );
+ addInstr( env, mk_iMOVds_RR( tHi, argregs[argreg-1] ) );
+ addInstr( env, mk_iMOVds_RR( tLo, argregs[argreg] ) );
+
+ *rHi = tHi;
+ *rLo = tLo;
+ return;
+ }
+
+ case Iop_DPBtoBCD: {
+ PPCCondCode cc;
+ UInt argiregs;
+ HReg argregs[2];
+ Int argreg;
+ HReg tLo = newVRegI(env);
+ HReg tHi = newVRegI(env);
+ HReg tmpHi;
+ HReg tmpLo;
+ ULong target;
+ Bool mode64 = env->mode64;
+
+ argregs[0] = hregPPC_GPR3(mode64);
+ argregs[1] = hregPPC_GPR4(mode64);
+
+ argiregs = 0;
+ argreg = 0;
+
+ iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Unop.arg);
+
+ argiregs |= (1 << (argreg+3));
+ addInstr(env, mk_iMOVds_RR( argregs[argreg++], tmpHi ));
+
+ argiregs |= (1 << (argreg+3));
+ addInstr(env, mk_iMOVds_RR( argregs[argreg], tmpLo));
+
+ cc = mk_PPCCondCode( Pct_ALWAYS, Pcf_NONE );
+
+ target = toUInt( Ptr_to_ULong( h_DPBtoBCD ) );
+
+ addInstr(env, PPCInstr_Call( cc, (Addr64)target, argiregs ) );
+ addInstr(env, mk_iMOVds_RR(tHi, argregs[argreg-1]));
+ addInstr(env, mk_iMOVds_RR(tLo, argregs[argreg]));
+
+ *rHi = tHi;
+ *rLo = tLo;
+ return;
+ }
+
default:
break;
}
@@ -4089,7 +4216,7 @@
HReg r_dstLo = newVRegF(env);
HReg r_srcHi = newVRegF(env);
HReg r_srcLo = newVRegF(env);
- PPCRI* rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1);
+ PPCRI* rmc = iselWordExpr_RI(env, triop->arg1);
/* dst will be used to pass in the left operand and get the result */
iselDfp128Expr(&r_dstHi, &r_dstLo, env, triop->arg2);
Modified: trunk/pub/libvex_ir.h (+10 -0)
===================================================================
--- trunk/pub/libvex_ir.h 2012-06-02 21:29:22 +01:00 (rev 2366)
+++ trunk/pub/libvex_ir.h 2012-06-03 00:47:02 -23:00 (rev 2367)
@@ -1105,6 +1105,16 @@
/* Support for 128-bit DFP type */
Iop_D64HLtoD128, Iop_D128HItoD64, Iop_D128LOtoD64,
+ /* I64 -> I64
+ * Convert 50-bit densely packed BCD string to 60 bit BCD string
+ */
+ Iop_DPBtoBCD,
+
+ /* I64 -> I64
+ * Convert 60 bit BCD string to 50-bit densely packed BCD string
+ */
+ Iop_BCDtoDPB,
+
/* Conversion I64 -> D64 */
Iop_ReinterpI64asD64,
Modified: trunk/priv/ir_defs.c (+6 -0)
===================================================================
--- trunk/priv/ir_defs.c 2012-06-02 21:29:22 +01:00 (rev 2366)
+++ trunk/priv/ir_defs.c 2012-06-03 00:47:02 -23:00 (rev 2367)
@@ -982,6 +982,8 @@
case Iop_V256to64_2: vex_printf("V256to64_2"); return;
case Iop_V256to64_3: vex_printf("V256to64_3"); return;
case Iop_64x4toV256: vex_printf("64x4toV256"); return;
+ case Iop_DPBtoBCD: vex_printf("Iop_DPBtoBCD"); return;
+ case Iop_BCDtoDPB: vex_printf("Iop_BCDtoDPB"); return;
default: vpanic("ppIROp(1)");
}
@@ -2716,6 +2718,10 @@
case Iop_I64StoD128: /* I64 bit pattern stored in Float register */
UNARY(Ity_D64, Ity_D128);
+ case Iop_DPBtoBCD:
+ case Iop_BCDtoDPB:
+ UNARY(Ity_I64, Ity_I64);
+
case Iop_D128HItoD64:
case Iop_D128LOtoD64:
UNARY(Ity_D128, Ity_D64);
Modified: trunk/priv/host_generic_simd64.h (+6 -0)
===================================================================
--- trunk/priv/host_generic_simd64.h 2012-06-02 21:29:22 +01:00 (rev 2366)
+++ trunk/priv/host_generic_simd64.h 2012-06-03 00:47:02 -23:00 (rev 2367)
@@ -156,6 +156,12 @@
extern UInt h_generic_calc_CmpNEZ16x2 ( UInt );
extern UInt h_generic_calc_CmpNEZ8x4 ( UInt );
+extern ULong h_DPBtoBCD( ULong dpb );
+extern ULong h_BCDtoDPB( ULong bcd );
+
+ULong dpb_to_bcd(ULong chunk); // helper for h_DPBtoBCD
+ULong bcd_to_dpb(ULong chunk); // helper for h_BCDtoDPB
+
#endif /* ndef __VEX_HOST_GENERIC_SIMD64_H */
/*---------------------------------------------------------------*/
Modified: trunk/priv/host_generic_simd64.c (+125 -0)
===================================================================
--- trunk/priv/host_generic_simd64.c 2012-06-02 21:29:22 +01:00 (rev 2366)
+++ trunk/priv/host_generic_simd64.c 2012-06-03 00:47:02 -23:00 (rev 2367)
@@ -1379,7 +1379,132 @@
+ absdiff8U( sel8x4_0(xx), sel8x4_0(yy) );
}
+/*------------------------------------------------------------------*/
+/* Decimal Floating Point (DFP) externally visible helper functions */
+/* that implement Iop_BCDtoDPB and Iop_DPBtoBCD */
+/*------------------------------------------------------------------*/
+#define NOT( x ) ( ( ( x ) == 0) ? 1 : 0)
+#define GET( x, y ) ( ( ( x ) & ( 0x1UL << ( y ) ) ) >> ( y ) )
+#define PUT( x, y ) ( ( x )<< ( y ) )
+
+ULong dpb_to_bcd( ULong chunk )
+{
+ Short a, b, c, d, e, f, g, h, i, j, k, m;
+ Short p, q, r, s, t, u, v, w, x, y;
+ ULong value;
+
+ /* convert 10 bit densely packed BCD to BCD */
+ p = GET( chunk, 9 );
+ q = GET( chunk, 8 );
+ r = GET( chunk, 7 );
+ s = GET( chunk, 6 );
+ t = GET( chunk, 5 );
+ u = GET( chunk, 4 );
+ v = GET( chunk, 3 );
+ w = GET( chunk, 2 );
+ x = GET( chunk, 1 );
+ y = GET( chunk, 0 );
+
+ /* The BCD bit values are given by the following boolean equations.*/
+ a = ( NOT(s) & v & w ) | ( t & v & w & s ) | ( v & w & NOT(x) );
+ b = ( p & s & x & NOT(t) ) | ( p & NOT(w) ) | ( p & NOT(v) );
+ c = ( q & s & x & NOT(t) ) | ( q & NOT(w) ) | ( q & NOT(v) );
+ d = r;
+ e = ( v & NOT(w) & x ) | ( s & v & w & x ) | ( NOT(t) & v & x & w );
+ f = ( p & t & v & w & x & NOT(s) ) | ( s & NOT(x) & v ) | ( s & NOT(v) );
+ g = ( q & t & w & v & x & NOT(s) ) | ( t & NOT(x) & v ) | ( t & NOT(v) );
+ h = u;
+ i = ( t & v & w & x ) | ( s & v & w & x ) | ( v & NOT(w) & NOT(x) );
+ j = ( p & NOT(s) & NOT(t) & w & v ) | ( s & v & NOT(w) & x )
+ | ( p & w & NOT(x) & v ) | ( w & NOT(v) );
+ k = ( q & NOT(s) & NOT(t) & v & w ) | ( t & v & NOT(w) & x )
+ | ( q & v & w & NOT(x) ) | ( x & NOT(v) );
+ m = y;
+
+ value = PUT(a, 11) | PUT(b, 10) | PUT(c, 9) | PUT(d, 8) | PUT(e, 7)
+ | PUT(f, 6) | PUT(g, 5) | PUT(h, 4) | PUT(i, 3) | PUT(j, 2)
+ | PUT(k, 1) | PUT(m, 0);
+ return value;
+}
+
+ULong bcd_to_dpb( ULong chunk )
+{
+ Short a, b, c, d, e, f, g, h, i, j, k, m;
+ Short p, q, r, s, t, u, v, w, x, y;
+ ULong value;
+ /* Convert a 3 digit BCD value to a 10 bit Densely Packed Binary (DPD) value
+ The boolean equations to calculate the value of each of the DPD bit
+ is given in Appendix B of Book 1: Power ISA User Instruction set. The
+ bits for the DPD number are [abcdefghijkm]. The bits for the BCD value
+ are [pqrstuvwxy]. The boolean logic equations in psuedo C code are:
+ */
+ a = GET( chunk, 11 );
+ b = GET( chunk, 10 );
+ c = GET( chunk, 9 );
+ d = GET( chunk, 8 );
+ e = GET( chunk, 7 );
+ f = GET( chunk, 6 );
+ g = GET( chunk, 5 );
+ h = GET( chunk, 4 );
+ i = GET( chunk, 3 );
+ j = GET( chunk, 2 );
+ k = GET( chunk, 1 );
+ m = GET( chunk, 0 );
+
+ p = ( f & a & i & NOT(e) ) | ( j & a & NOT(i) ) | ( b & NOT(a) );
+ q = ( g & a & i & NOT(e) ) | ( k & a & NOT(i) ) | ( c & NOT(a) );
+ r = d;
+ s = ( j & NOT(a) & e & NOT(i) ) | ( f & NOT(i) & NOT(e) )
+ | ( f & NOT(a) & NOT(e) ) | ( e & i );
+ t = ( k & NOT(a) & e & NOT(i) ) | ( g & NOT(i) & NOT(e) )
+ | ( g & NOT(a) & NOT(e) ) | ( a & i );
+ u = h;
+ v = a | e | i;
+ w = ( NOT(e) & j & NOT(i) ) | ( e & i ) | a;
+ x = ( NOT(a) & k & NOT(i) ) | ( a & i ) | e;
+ y = m;
+
+ value = PUT(p, 9) | PUT(q, 8) | PUT(r, 7) | PUT(s, 6) | PUT(t, 5)
+ | PUT(u, 4) | PUT(v, 3) | PUT(w, 2) | PUT(x, 1) | y;
+
+ return value;
+}
+
+ULong h_DPBtoBCD( ULong dpb )
+{
+ ULong result, chunk;
+ Int i;
+
+ result = 0;
+
+ for (i = 0; i < 5; i++) {
+ chunk = dpb >> ( 4 - i ) * 10;
+ result = result << 12;
+ result |= dpb_to_bcd( chunk & 0x3FF );
+ }
+ return result;
+}
+
+ULong h_BCDtoDPB( ULong bcd )
+{
+ ULong result, chunk;
+ Int i;
+
+ result = 0;
+
+ for (i = 0; i < 5; i++) {
+ chunk = bcd >> ( 4 - i ) * 12;
+ result = result << 10;
+ result |= bcd_to_dpb( chunk & 0xFFF );
+ }
+ return result;
+}
+#undef NOT
+#undef GET
+#undef PUT
+
/*---------------------------------------------------------------*/
/*--- end host_generic_simd64.c ---*/
/*---------------------------------------------------------------*/
+
Modified: trunk/priv/guest_ppc_toIR.c (+1419 -6)
===================================================================
--- trunk/priv/guest_ppc_toIR.c 2012-06-02 21:29:22 +01:00 (rev 2366)
+++ trunk/priv/guest_ppc_toIR.c 2012-06-03 00:47:02 -23:00 (rev 2367)
@@ -8513,7 +8513,9 @@
/*------------------------------------------------------------*/
#define DFP_LONG 1
#define DFP_EXTND 2
+#define DFP_LONG_BIAS 398
#define DFP_LONG_ENCODED_FIELD_MASK 0x1F00
+#define DFP_EXTND_BIAS 6176
#define DFP_EXTND_ENCODED_FIELD_MASK 0x1F000
#define DFP_LONG_EXP_MSK 0XFF
#define DFP_EXTND_EXP_MSK 0XFFF
@@ -8522,28 +8524,111 @@
#define DFP_LONG_GFIELD_RT_SHIFT (63 - 13 - 32) // adj for upper 32-bits
#define DFP_G_FIELD_EXTND_MASK 0x7FFFC000 // upper 32-bits only
#define DFP_EXTND_GFIELD_RT_SHIFT (63 - 17 - 32) //adj for upper 32 bits
-
#define DFP_T_FIELD_LONG_MASK 0x3FFFF // mask for upper 32-bits
#define DFP_T_FIELD_EXTND_MASK 0x03FFFF // mask for upper 32-bits
-
#define DFP_LONG_EXP_MAX 369 // biased max
#define DFP_LONG_EXP_MIN 0 // biased min
#define DFP_EXTND_EXP_MAX 6111 // biased max
#define DFP_EXTND_EXP_MIN 0 // biased min
+#define DFP_LONG_MAX_SIG_DIGITS 16
+#define DFP_EXTND_MAX_SIG_DIGITS 34
+#define MAX_DIGITS_IN_STRING 8
+
#define AND(x, y) binop( Iop_And32, x, y )
+#define AND4(w, x, y, z) AND( AND( w, x ), AND( y, z ) )
#define OR(x, y) binop( Iop_Or32, x, y )
-#define AND4(w, x, y, z) AND( AND( w, x ), AND( y, z ) )
#define OR3(x, y, z) OR( x, OR( y, z ) )
#define OR4(w, x, y, z) OR( OR( w, x ), OR( y, z ) )
+#define NOT(x) unop( Iop_1Uto32, unop( Iop_Not1, unop( Iop_32to1, mkexpr( x ) ) ) )
+
#define SHL(value, by) binop( Iop_Shl32, value, mkU8( by ) )
+#define SHR(value, by) binop( Iop_Shr32, value, mkU8( by ) )
+
#define BITS5(_b4,_b3,_b2,_b1,_b0) \
(((_b4) << 4) | ((_b3) << 3) | ((_b2) << 2) | \
((_b1) << 1) | ((_b0) << 0))
-static void Get_lmd(IRTemp * lmd, IRExpr * gfield_0_4 )
+static IRExpr * Gfield_encoding( IRExpr * lmexp, IRExpr * lmd32 )
{
+ IRTemp lmd_07_mask = newTemp( Ity_I32 );
+ IRTemp lmd_8_mask = newTemp( Ity_I32 );
+ IRTemp lmd_9_mask = newTemp( Ity_I32 );
+ IRTemp lmexp_00_mask = newTemp( Ity_I32 );
+ IRTemp lmexp_01_mask = newTemp( Ity_I32 );
+ IRTemp lmexp_10_mask = newTemp( Ity_I32 );
+ IRTemp lmd_07_val = newTemp( Ity_I32 );
+ IRTemp lmd_8_val = newTemp( Ity_I32 );
+ IRTemp lmd_9_val = newTemp( Ity_I32 );
+ /* The encodig is as follows:
+ * lmd - left most digit
+ * lme - left most 2-bits of the exponent
+ *
+ * lmd
+ * 0 - 7 (lmexp << 3) | lmd
+ * 8 0b11000 (24 decimal) if lme=0b00;
+ * 0b11010 (26 decimal) if lme=0b01;
+ * 0b11100 (28 decimal) if lme=0b10;
+ * 9 0b11001 (25 decimal) if lme=0b00;
+ * 0b11011 (27 decimal) if lme=0b01;
+ * 0b11101 (29 decimal) if lme=0b10;
+ */
+
+ /* Generate the masks for each condition */
+ assign( lmd_07_mask,
+ unop( Iop_1Sto32, binop( Iop_CmpLE32U, lmd32, mkU32( 7 ) ) ) );
+ assign( lmd_8_mask,
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, lmd32, mkU32( 8 ) ) ) );
+ assign( lmd_9_mask,
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, lmd32, mkU32( 9 ) ) ) );
+ assign( lmexp_00_mask,
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, lmexp, mkU32( 0 ) ) ) );
+ assign( lmexp_01_mask,
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, lmexp, mkU32( 1 ) ) ) );
+ assign( lmexp_10_mask,
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, lmexp, mkU32( 2 ) ) ) );
+
+ /* Generate the values for each LMD condition, assuming the condition
+ * is TRUE.
+ */
+ assign( lmd_07_val,
+ binop( Iop_Or32, binop( Iop_Shl32, lmexp, mkU8( 3 ) ), lmd32 ) );
+ assign( lmd_8_val,
+ binop( Iop_Or32,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ mkexpr( lmexp_00_mask ),
+ mkU32( 24 ) ),
+ binop( Iop_And32,
+ mkexpr( lmexp_01_mask ),
+ mkU32( 26 ) ) ),
+ binop( Iop_And32, mkexpr( lmexp_10_mask ), mkU32( 28 ) ) ) );
+ assign( lmd_9_val,
+ binop( Iop_Or32,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ mkexpr( lmexp_00_mask ),
+ mkU32( 25 ) ),
+ binop( Iop_And32,
+ mkexpr( lmexp_01_mask ),
+ mkU32( 27 ) ) ),
+ binop( Iop_And32, mkexpr( lmexp_10_mask ), mkU32( 29 ) ) ) );
+
+ /* generate the result from the possible LMD values */
+ return binop( Iop_Or32,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ mkexpr( lmd_07_mask ),
+ mkexpr( lmd_07_val ) ),
+ binop( Iop_And32,
+ mkexpr( lmd_8_mask ),
+ mkexpr( lmd_8_val ) ) ),
+ binop( Iop_And32, mkexpr( lmd_9_mask ), mkexpr( lmd_9_val ) ) );
+}
+
+static void Get_lmd( IRTemp * lmd, IRExpr * gfield_0_4 )
+{
/* Extract the exponent and the left most digit of the mantissa
* from the G field bits [0:4].
*/
@@ -8618,11 +8703,450 @@
) ) );
}
+#define DIGIT1_SHR 4 // shift digit 1 to bottom 4 bits
+#define DIGIT2_SHR 8 // shift digit 2 to bottom 4 bits
+#define DIGIT3_SHR 12
+#define DIGIT4_SHR 16
+#define DIGIT5_SHR 20
+#define DIGIT6_SHR 24
+#define DIGIT7_SHR 28
+
+static IRExpr * bcd_digit_inval( IRExpr * bcd_u, IRExpr * bcd_l )
+{
+ /* 60-bit BCD string stored in two 32-bit values. Check that each,
+ * digit is a valid BCD number, i.e. less then 9.
+ */
+ IRTemp valid = newTemp( Ity_I32 );
+
+ assign( valid,
+ AND4( AND4 ( unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ bcd_l,
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT1_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT2_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT3_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ) ),
+ AND4 ( unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT4_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT5_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT6_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_l,
+ mkU8 ( DIGIT7_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ) ),
+ AND4( unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ bcd_u,
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT1_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT2_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT3_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ) ),
+ AND4( unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT4_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT5_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT6_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpLE32U,
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ bcd_u,
+ mkU8 ( DIGIT7_SHR ) ),
+ mkU32 ( 0xF ) ),
+ mkU32( 0x9 ) ) ) ) ) );
+
+ return unop( Iop_Not32, mkexpr( valid ) );
+}
+#undef DIGIT1_SHR
+#undef DIGIT2_SHR
+#undef DIGIT3_SHR
+#undef DIGIT4_SHR
+#undef DIGIT5_SHR
+#undef DIGIT6_SHR
+#undef DIGIT7_SHR
+
+static IRExpr * Generate_neg_sign_mask( IRExpr * sign )
+{
+ return binop( Iop_Or32,
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, sign, mkU32( 0xB ) ) ),
+ unop( Iop_1Sto32, binop( Iop_CmpEQ32, sign, mkU32( 0xD ) ) )
+ );
+}
+
+static IRExpr * Generate_pos_sign_mask( IRExpr * sign )
+{
+ return binop( Iop_Or32,
+ binop( Iop_Or32,
+ unop( Iop_1Sto32,
+ binop( Iop_CmpEQ32, sign, mkU32( 0xA ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpEQ32, sign, mkU32( 0xC ) ) ) ),
+ binop( Iop_Or32,
+ unop( Iop_1Sto32,
+ binop( Iop_CmpEQ32, sign, mkU32( 0xE ) ) ),
+ unop( Iop_1Sto32,
+ binop( Iop_CmpEQ32, sign, mkU32( 0xF ) ) ) ) );
+}
+
+static IRExpr * Generate_sign_bit( IRExpr * pos_sign_mask,
+ IRExpr * neg_sign_mask )
+{
+ return binop( Iop_Or32,
+ binop( Iop_And32, neg_sign_mask, mkU32( 0x80000000 ) ),
+ binop( Iop_And32, pos_sign_mask, mkU32( 0x00000000 ) ) );
+}
+
+static IRExpr * Generate_inv_mask( IRExpr * invalid_bcd_mask,
+ IRExpr * pos_sign_mask,
+ IRExpr * neg_sign_mask )
+/* first argument is all 1's if the BCD string had an invalid digit in it. */
+{
+ return binop( Iop_Or32,
+ invalid_bcd_mask,
+ unop( Iop_1Sto32,
+ binop( Iop_CmpEQ32,
+ binop( Iop_Or32, pos_sign_mask, neg_sign_mask ),
+ mkU32( 0x0 ) ) ) );
+}
+
+static void Generate_132_bit_bcd_string( IRExpr * frBI64_hi, IRExpr * frBI64_lo,
+ IRTemp * top_12_l, IRTemp * mid_60_u,
+ IRTemp * mid_60_l, IRTemp * low_60_u,
+ IRTemp * low_60_l)
+{
+ IRTemp tmplow60 = newTemp( Ity_I64 );
+ IRTemp tmpmid60 = newTemp( Ity_I64 );
+ IRTemp tmptop12 = newTemp( Ity_I64 );
+ IRTemp low_50 = newTemp( Ity_I64 );
+ IRTemp mid_50 = newTemp( Ity_I64 );
+ IRTemp top_10 = newTemp( Ity_I64 );
+ IRTemp top_12_u = newTemp( Ity_I32 ); // only needed for a dummy arg
+
+ /* Convert the 110-bit densely packed BCD string to a 128-bit BCD string */
+
+ /* low_50[49:0] = ((frBI64_lo[49:32] << 14) | frBI64_lo[31:0]) */
+ assign( low_50,
+ binop( Iop_32HLto64,
+ binop( Iop_And32,
+ unop( Iop_64HIto32, frBI64_lo ),
+ mkU32( 0x3FFFF ) ),
+ unop( Iop_64to32, frBI64_lo ) ) );
+
+ /* Convert the 50 bit densely packed BCD string to a 60 bit
+ * BCD string.
+ */
+ assign( tmplow60, unop( Iop_DPBtoBCD, mkexpr( low_50 ) ) );
+ assign( *low_60_u, unop( Iop_64HIto32, mkexpr( tmplow60 ) ) );
+ assign( *low_60_l, unop( Iop_64to32, mkexpr( tmplow60 ) ) );
+
+ /* mid_50[49:0] = ((frBI64_hi[35:32] << 14) | frBI64_hi[31:18]) |
+ * ((frBI64_hi[17:0] << 14) | frBI64_lo[63:50])
+ */
+ assign( mid_50,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ binop( Iop_And32,
+ unop( Iop_64HIto32, frBI64_hi ),
+ mkU32( 0xF ) ),
+ mkU8( 14 ) ),
+ binop( Iop_Shr32,
+ unop( Iop_64to32, frBI64_hi ),
+ mkU8( 18 ) ) ),
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ unop( Iop_64to32, frBI64_hi ),
+ mkU8( 14 ) ),
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, frBI64_lo ),
+ mkU8( 18 ) ) ) ) );
+
+ /* Convert the 50 bit densely packed BCD string to a 60 bit
+ * BCD string.
+ */
+ assign( tmpmid60, unop( Iop_DPBtoBCD, mkexpr( mid_50 ) ) );
+ assign( *mid_60_u, unop( Iop_64HIto32, mkexpr( tmpmid60 ) ) );
+ assign( *mid_60_l, unop( Iop_64to32, mkexpr( tmpmid60 ) ) );
+
+ /* top_10[49:0] = frBI64_hi[45:36]) | */
+ assign( top_10,
+ binop( Iop_32HLto64,
+ mkU32( 0 ),
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, frBI64_hi ),
+ mkU8( 4 ) ),
+ mkU32( 0x3FF ) ) ) );
+
+ /* Convert the 10 bit densely packed BCD string to a 12 bit
+ * BCD string.
+ */
+ assign( tmptop12, unop( Iop_DPBtoBCD, mkexpr( top_10 ) ) );
+ assign( top_12_u, unop( Iop_64HIto32, mkexpr( tmptop12 ) ) );
+ assign( *top_12_l, unop( Iop_64to32, mkexpr( tmptop12 ) ) );
+}
+
+static void Count_zeros( int start, IRExpr * init_cnt, IRExpr * init_flag,
+ IRTemp * final_cnt, IRTemp * final_flag,
+ IRExpr * string )
+{
+ IRTemp cnt[MAX_DIGITS_IN_STRING + 1];IRTemp flag[MAX_DIGITS_IN_STRING+1];
+ int digits = MAX_DIGITS_IN_STRING;
+ int i;
+
+ cnt[start-1] = newTemp( Ity_I8 );
+ flag[start-1] = newTemp( Ity_I8 );
+ assign( cnt[start-1], init_cnt);
+ assign( flag[start-1], init_flag);
+
+ for ( i = start; i <= digits; i++) {
+ cnt[i] = newTemp( Ity_I8 );
+ flag[i] = newTemp( Ity_I8 );
+ assign( cnt[i],
+ binop( Iop_Add8,
+ mkexpr( cnt[i-1] ),
+ binop(Iop_And8,
+ unop( Iop_1Uto8,
+ binop(Iop_CmpEQ32,
+ binop(Iop_And32,
+ string,
+ mkU32( 0xF <<
+ ( ( digits - i ) * 4) ) ),
+ mkU32( 0 ) ) ),
+ binop( Iop_Xor8, /* complement flag */
+ mkexpr( flag[i - 1] ),
+ mkU8( 0xFF ) ) ) ) );
+
+ /* set flag to 1 if digit was not a zero */
+ assign( flag[i],
+ binop(Iop_Or8,
+ unop( Iop_1Sto8,
+ binop(Iop_CmpNE32,
+ binop(Iop_And32,
+ string,
+ mkU32( 0xF <<
+ ( (digits - i) * 4) ) ),
+ mkU32( 0 ) ) ),
+ mkexpr( flag[i - 1] ) ) );
+ }
+
+ *final_cnt = cnt[digits];
+ *final_flag = flag[digits];
+}
+
+static IRExpr * Count_leading_zeros_60( IRExpr * lmd, IRExpr * upper_28,
+ IRExpr * low_32 )
+{
+ IRTemp num_lmd = newTemp( Ity_I8 );
+ IRTemp num_upper = newTemp( Ity_I8 );
+ IRTemp num_low = newTemp( Ity_I8 );
+ IRTemp lmd_flag = newTemp( Ity_I8 );
+ IRTemp upper_flag = newTemp( Ity_I8 );
+ IRTemp low_flag = newTemp( Ity_I8 );
+
+ assign( num_lmd, unop( Iop_1Uto8, binop( Iop_CmpEQ32, lmd, mkU32( 0 ) ) ) );
+ assign( lmd_flag, unop( Iop_Not8, mkexpr( num_lmd ) ) );
+
+ Count_zeros( 2,
+ mkexpr( num_lmd ),
+ mkexpr( lmd_flag ),
+ &num_upper,
+ &upper_flag,
+ upper_28 );
+
+ Count_zeros( 1,
+ mkexpr( num_upper ),
+ mkexpr( upper_flag ),
+ &num_low,
+ &low_flag,
+ low_32 );
+
+ return mkexpr( num_low );
+}
+
+static IRExpr * Count_leading_zeros_128( IRExpr * lmd, IRExpr * top_12_l,
+ IRExpr * mid_60_u, IRExpr * mid_60_l,
+ IRExpr * low_60_u, IRExpr * low_60_l)
+{
+ IRTemp num_lmd = newTemp( Ity_I8 );
+ IRTemp num_top = newTemp( Ity_I8 );
+ IRTemp num_mid_u = newTemp( Ity_I8 );
+ IRTemp num_mid_l = newTemp( Ity_I8 );
+ IRTemp num_low_u = newTemp( Ity_I8 );
+ IRTemp num_low_l = newTemp( Ity_I8 );
+
+ IRTemp lmd_flag = newTemp( Ity_I8 );
+ IRTemp top_flag = newTemp( Ity_I8 );
+ IRTemp mid_u_flag = newTemp( Ity_I8 );
+ IRTemp mid_l_flag = newTemp( Ity_I8 );
+ IRTemp low_u_flag = newTemp( Ity_I8 );
+ IRTemp low_l_flag = newTemp( Ity_I8 );
+
+ /* Check the LMD, digit 16, to see if it is zero. */
+ assign( num_lmd, unop( Iop_1Uto8, binop( Iop_CmpEQ32, lmd, mkU32( 0 ) ) ) );
+
+ assign( lmd_flag, unop( Iop_Not8, mkexpr( num_lmd ) ) );
+
+ Count_zeros( 6,
+ mkexpr( num_lmd ),
+ mkexpr( lmd_flag ),
+ &num_top,
+ &top_flag,
+ top_12_l );
+
+ Count_zeros( 1,
+ mkexpr( num_top ),
+ mkexpr( top_flag ),
+ &num_mid_u,
+ &mid_u_flag,
+ binop( Iop_Or32,
+ binop( Iop_Shl32, mid_60_u, mkU8( 2 ) ),
+ binop( Iop_Shr32, mid_60_l, mkU8( 30 ) ) ) );
+
+ Count_zeros( 2,
+ mkexpr( num_mid_u ),
+ mkexpr( mid_u_flag ),
+ &num_mid_l,
+ &mid_l_flag,
+ mid_60_l );
+
+ Count_zeros( 1,
+ mkexpr( num_mid_l ),
+ mkexpr( mid_l_flag ),
+ &num_low_u,
+ &low_u_flag,
+ binop( Iop_Or32,
+ binop( Iop_Shl32, low_60_u, mkU8( 2 ) ),
+ binop( Iop_Shr32, low_60_l, mkU8( 30 ) ) ) );
+
+ Count_zeros( 2,
+ mkexpr( num_low_u ),
+ mkexpr( low_u_flag ),
+ &num_low_l,
+ &low_l_flag,
+ low_60_l );
+
+ return mkexpr( num_low_l );
+}
+
+static IRExpr * Check_unordered(IRExpr * val)
+{
+ IRTemp gfield0to5 = newTemp( Ity_I32 );
+
+ /* Extract G[0:4] */
+ assign( gfield0to5,
+ binop( Iop_And32,
+ binop( Iop_Shr32, unop( Iop_64HIto32, val ), mkU8( 26 ) ),
+ mkU32( 0x1F ) ) );
+
+ /* Check for unordered, return all 1'x if true */
+ return binop( Iop_Or32, /* QNaN check */
+ unop( Iop_1Sto32,
+ binop( Iop_CmpEQ32,
+ mkexpr( gfield0to5 ),
+ mkU32( 0x1E ) ) ),
+ unop( Iop_1Sto32, /* SNaN check */
+ binop( Iop_CmpEQ32,
+ mkexpr( gfield0to5 ),
+ mkU32( 0x1F ) ) ) );
+}
+
#undef AND
+#undef AND4
#undef OR
-#undef AND4
#undef OR3
#undef OR4
+#undef NOT
+#undef SHR
#undef SHL
#undef BITS5
@@ -9925,7 +10449,7 @@
unop( Iop_1Sto32,
binop( Iop_CmpNE32,
mkexpr( lmd ),
- mkU32( 0 ) ) ) ),
+ mkU32( 0 ) ) ) ),
mkU32( 0x1 ) ),
mkU8( 1 ) ) );
@@ -9991,7 +10515,868 @@
return True;
}
+static Bool dis_dfp_bcd(UInt theInstr) {
+ UInt opc2 = ifieldOPClo10( theInstr );
+ ULong sp = IFIELD(theInstr, 19, 2);
+ ULong s = IFIELD(theInstr, 20, 1);
+ UChar frT_addr = ifieldRegDS( theInstr );
+ UChar frB_addr = ifieldRegB( theInstr );
+ IRTemp frB = newTemp( Ity_D64 );
+ IRTemp frBI64 = newTemp( Ity_I64 );
+ IRTemp result = newTemp( Ity_I64 );
+ IRTemp resultD64 = newTemp( Ity_D64 );
+ IRTemp bcd64 = newTemp( Ity_I64 );
+ IRTemp bcd_u = newTemp( Ity_I32 );
+ IRTemp bcd_l = newTemp( Ity_I32 );
+ IRTemp dbcd_u = newTemp( Ity_I32 );
+ IRTemp dbcd_l = newTemp( Ity_I32 );
+ IRTemp lmd = newTemp( Ity_I32 );
+ assign( frB, getDReg( frB_addr ) );
+ assign( frBI64, unop( Iop_ReinterpD64asI64, mkexpr( frB ) ) );
+
+ switch ( opc2 ) {
+ case 0x142: // ddedpd DFP Decode DPD to BCD
+ DIP( "ddedpd %llu,r%u,r%u\n", sp, frT_addr, frB_addr );
+
+ assign( bcd64, unop( Iop_DPBtoBCD, mkexpr( frBI64 ) ) );
+ assign( bcd_u, unop( Iop_64HIto32, mkexpr( bcd64 ) ) );
+ assign( bcd_l, unop( Iop_64to32, mkexpr( bcd64 ) ) );
+
+ if ( ( sp == 0 ) || ( sp == 1 ) ) {
+ /* Unsigned BCD string */
+ Get_lmd( &lmd,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, mkexpr( frBI64 ) ),
+ mkU8( 31 - 5 ) ) ); // G-field[0:4]
+
+ assign( result,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shl32, mkexpr( lmd ), mkU8( 28 ) ),
+ mkexpr( bcd_u ) ),
+ mkexpr( bcd_l ) ) );
+
+ } else {
+ /* Signed BCD string, the cases for sp 2 and 3 only differ in how
+ * the positive and negative values are encoded in the least
+ * significant bits.
+ */
+ IRTemp sign = newTemp( Ity_I32 );
+
+ if (sp == 2) {
+ /* Positive sign = 0xC, negative sign = 0xD */
+
+ assign( sign,
+ binop( Iop_Or32,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, mkexpr( frBI64 ) ),
+ mkU8( 31 ) ),
+ mkU32( 0xC ) ) );
+
+ } else if ( sp == 3 ) {
+ /* Positive sign = 0xF, negative sign = 0xD */
+ IRTemp tmp32 = newTemp( Ity_I32 );
+
+ /* Complement sign bit then OR into bit position 1 */
+ assign( tmp32,
+ binop( Iop_Xor32,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, mkexpr( frBI64 ) ),
+ mkU8( 30 ) ),
+ mkU32( 0x2 ) ) );
+
+ assign( sign, binop( Iop_Or32, mkexpr( tmp32 ), mkU32( 0xD ) ) );
+
+ } else {
+ vpanic( "The impossible happened: dis_dfp_bcd(ppc), undefined SP field" );
+ }
+
+ /* Put sign in bottom 4 bits, move most significant 4-bits from
+ * bcd_l to bcd_u.
+ */
+ assign( result,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shr32,
+ mkexpr( bcd_l ),
+ mkU8( 28 ) ),
+ binop( Iop_Shl32,
+ mkexpr( bcd_u ),
+ mkU8( 4 ) ) ),
+ binop( Iop_Or32,
+ mkexpr( sign ),
+ binop( Iop_Shl32,
+ mkexpr( bcd_l ),
+ mkU8( 4 ) ) ) ) );
+ }
+
+ putDReg( frT_addr, unop( Iop_ReinterpI64asD64, mkexpr( result ) ) );
+ break;
+
+ case 0x342: // denbcd DFP Encode BCD to DPD
+ {
+ IRTemp valid_mask = newTemp( Ity_I32 );
+ IRTemp invalid_mask = newTemp( Ity_I32 );
+ IRTemp without_lmd = newTemp( Ity_I64 );
+ IRTemp tmp64 = newTemp( Ity_I64 );
+ IRTemp dbcd64 = newTemp( Ity_I64 );
+ IRTemp left_exp = newTemp( Ity_I32 );
+ IRTemp g0_4 = newTemp( Ity_I32 );
+
+ DIP( "denbcd %llu,r%u,r%u\n", s, frT_addr, frB_addr );
+
+ if ( s == 0 ) {
+ /* Unsigned BCD string */
+ assign( dbcd64, unop( Iop_BCDtoDPB, mkexpr(frBI64 ) ) );
+ assign( dbcd_u, unop( Iop_64HIto32, mkexpr( dbcd64 ) ) );
+ assign( dbcd_l, unop( Iop_64to32, mkexpr( dbcd64 ) ) );
+
+ assign( lmd,
+ binop( Iop_Shr32,
+ binop( Iop_And32,
+ unop( Iop_64HIto32, mkexpr( frBI64 ) ),
+ mkU32( 0xF0000000 ) ),
+ mkU8( 28 ) ) );
+
+ assign( invalid_mask,
+ bcd_digit_inval( unop( Iop_64HIto32, mkexpr( frBI64 ) ),
+ unop( Iop_64to32, mkexpr( frBI64 ) ) ) );
+ assign( valid_mask, unop( Iop_Not32, mkexpr( invalid_mask ) ) );
+
+ assign( without_lmd,
+ unop( Iop_ReinterpD64asI64,
+ binop( Iop_InsertExpD64,
+ unop( Iop_ReinterpI64asD64,
+ mkU64( DFP_LONG_BIAS ) ),
+ unop( Iop_ReinterpI64asD64,
+ binop( Iop_32HLto64,
+ mkexpr( dbcd_u ),
+ mkexpr( dbcd_l ) ) ) ) ) );
+ assign( left_exp,
+ binop( Iop_Shr32,
+ binop( Iop_And32,
+ unop( Iop_64HIto32, mkexpr( without_lmd ) ),
+ mkU32( 0x60000000 ) ),
+ mkU8( 29 ) ) );
+
+ assign( g0_4,
+ binop( Iop_Shl32,
+ Gfield_encoding( mkexpr( left_exp ), mkexpr( lmd ) ),
+ mkU8( 26 ) ) );
+
+ assign( tmp64,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ unop( Iop_64HIto32,
+ mkexpr( without_lmd ) ),
+ mkU32( 0x83FFFFFF ) ),
+ mkexpr( g0_4 ) ),
+ unop( Iop_64to32, mkexpr( without_lmd ) ) ) );
+
+ } else if ( s == 1 ) {
+ IRTemp sign = newTemp( Ity_I32 );
+ IRTemp sign_bit = newTemp( Ity_I32 );
+ IRTemp pos_sign_mask = newTemp( Ity_I32 );
+ IRTemp neg_sign_mask = newTemp( Ity_I32 );
+ IRTemp tmp = newTemp( Ity_I64 );
+
+ /* Signed BCD string, least significant 4 bits are sign bits
+ * positive sign = 0xC, negative sign = 0xD
+ */
+ assign( tmp, unop( Iop_BCDtoDPB,
+ binop( Iop_32HLto64,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32,
+ mkexpr( frBI64 ) ),
+ mkU8( 4 ) ),
+ binop( Iop_Or32,
+ binop( Iop_Shr32,
+ unop( Iop_64to32,
+ mkexpr( frBI64 ) ),
+ mkU8( 4 ) ),
+ binop( Iop_Shl32,
+ unop( Iop_64HIto32,
+ mkexpr( frBI64 ) ),
+ mkU8( 28 ) ) ) ) ) );
+
+ assign( dbcd_u, unop( Iop_64HIto32, mkexpr( tmp ) ) );
+ assign( dbcd_l, unop( Iop_64to32, mkexpr( tmp ) ) );
+
+ /* Get the sign of the BCD string. */
+ assign( sign,
+ binop( Iop_And32,
+ unop( Iop_64to32, mkexpr( frBI64 ) ),
+ mkU32( 0xF ) ) );
+
+ assign( neg_sign_mask, Generate_neg_sign_mask( mkexpr( sign ) ) );
+ assign( pos_sign_mask, Generate_pos_sign_mask( mkexpr( sign ) ) );
+ assign( sign_bit,
+ Generate_sign_bit( mkexpr( pos_sign_mask ),
+ mkexpr( neg_sign_mask ) ) );
+
+ /* Check for invalid sign and BCD digit. Don't check the bottom
+ * four bits of bcd_l as that is the sign value.
+ */
+ assign( invalid_mask,
+ Generate_inv_mask(
+ bcd_digit_inval( unop( Iop_64HIto32,
+ mkexpr( frBI64 ) ),
+ binop( Iop_Shr32,
+ unop( Iop_64to32,
+ mkexpr( frBI64 ) ),
+ mkU8( 4 ) ) ),
+ mkexpr( pos_sign_mask ),
+ mkexpr( neg_sign_mask ) ) );
+
+ assign( valid_mask, unop( Iop_Not32, mkexpr( invalid_mask ) ) );
+
+ /* Generate the result assuming the sign value was valid. */
+ assign( tmp64,
+ unop( Iop_ReinterpD64asI64,
+ binop( Iop_InsertExpD64,
+ unop( Iop_ReinterpI64asD64,
+ mkU64( DFP_LONG_BIAS ) ),
+ unop( Iop_ReinterpI64asD64,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ mkexpr( dbcd_u ),
+ mkexpr( sign_bit ) ),
+ mkexpr( dbcd_l ) ) ) ) ) );
+ }
+
+ /* Generate the value to store depending on the validity of the
+ * sign value and the validity of the BCD digits.
+ */
+ assign( resultD64,
+ unop( Iop_ReinterpI64asD64,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ mkexpr( valid_mask ),
+ unop( Iop_64HIto32,
+ mkexpr( tmp64 ) ) ),
+ binop( Iop_And32,
+ mkU32( 0x7C000000 ),
+ mkexpr( invalid_mask ) ) ),
+ binop( Iop_Or32,
+ binop( Iop_And32,
+ mkexpr( valid_mask ),
+ unop( Iop_64to32, mkexpr( tmp64 ) ) ),
+ binop( Iop_And32,
+ mkU32( 0x0 ),
+ mkexpr( invalid_mask ) ) ) ) ) );
+ putDReg( frT_addr, mkexpr( resultD64 ) );
+ }
+ break;
+ default:
+ vpanic( "ERROR: dis_dfp_bcd(ppc), undefined opc2 case " );
+ return False;
+ }
+ return True;
+}
+
+static Bool dis_dfp_bcdq( UInt theInstr )
+{
+ UInt opc2 = ifieldOPClo10( theInstr );
+ ULong sp = IFIELD(theInstr, 19, 2);
+ ULong s = IFIELD(theInstr, 20, 1);
+ IRTemp frB_hi = newTemp( Ity_D64 );
+ IRTemp frB_lo = newTemp( Ity_D64 );
+ IRTemp frBI64_hi = newTemp( Ity_I64 );
+ IRTemp frBI64_lo = newTemp( Ity_I64 );
+ UChar frT_addr = ifieldRegDS( theInstr );
+ UChar frB_addr = ifieldRegB( theInstr );
+
+ IRTemp lmd = newTemp( Ity_I32 );
+ IRTemp result_hi = newTemp( Ity_I64 );
+ IRTemp result_lo = newTemp( Ity_I64 );
+
+ assign( frB_hi, getDReg( frB_addr ) );
+ assign( frB_lo, getDReg( frB_addr + 1 ) );
+ assign( frBI64_hi, unop( Iop_ReinterpD64asI64, mkexpr( frB_hi ) ) );
+ assign( frBI64_lo, unop( Iop_ReinterpD64asI64, mkexpr( frB_lo ) ) );
+
+ switch ( opc2 ) {
+ case 0x142: // ddedpdq DFP Decode DPD to BCD
+ {
+ IRTemp low_60_u = newTemp( Ity_I32 );
+ IRTemp low_60_l = newTemp( Ity_I32 );
+ IRTemp mid_60_u = newTemp( Ity_I32 );
+ IRTemp mid_60_l = newTemp( Ity_I32 );
+ IRTemp top_12_l = newTemp( Ity_I32 );
+
+ DIP( "ddedpdq %llu,r%u,r%u\n", sp, frT_addr, frB_addr );
+
+ /* Note, instruction only stores the lower 32 BCD digits in
+ * the result
+ */
+ Generate_132_bit_bcd_string( mkexpr( frBI64_hi ),
+ mkexpr( frBI64_lo ),
+ &top_12_l,
+ &mid_60_u,
+ &mid_60_l,
+ &low_60_u,
+ &low_60_l );
+
+ if ( ( sp == 0 ) || ( sp == 1 ) ) {
+ /* Unsigned BCD string */
+ assign( result_hi,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ mkexpr( top_12_l ),
+ mkU8( 24 ) ),
+ binop( Iop_Shr32,
+ mkexpr( mid_60_u ),
+ mkU8( 4 ) ) ),
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ mkexpr( mid_60_u ),
+ mkU8( 28 ) ),
+ binop( Iop_Shr32,
+ mkexpr( mid_60_l ),
+ mkU8( 4 ) ) ) ) );
+
+ assign( result_lo,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ mkexpr( mid_60_l ),
+ mkU8( 28 ) ),
+ mkexpr( low_60_u ) ),
+ mkexpr( low_60_l ) ) );
+
+ } else {
+ /* Signed BCD string, the cases for sp 2 and 3 only differ in how
+ * the positive and negative values are encoded in the least
+ * significant bits.
+ */
+ IRTemp sign = newTemp( Ity_I32 );
+
+ if ( sp == 2 ) {
+ /* Positive sign = 0xC, negative sign = 0xD */
+ assign( sign,
+ binop( Iop_Or32,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, mkexpr( frBI64_hi ) ),
+ mkU8( 31 ) ),
+ mkU32( 0xC ) ) );
+
+ } else if ( sp == 3 ) {
+ IRTemp tmp32 = newTemp( Ity_I32 );
+
+ /* Positive sign = 0xF, negative sign = 0xD.
+ * Need to complement sign bit then OR into bit position 1.
+ */
+ assign( tmp32,
+ binop( Iop_Xor32,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32, mkexpr( frBI64_hi ) ),
+ mkU8( 30 ) ),
+ mkU32( 0x2 ) ) );
+
+ assign( sign, binop( Iop_Or32, mkexpr( tmp32 ), mkU32( 0xD ) ) );
+
+ } else {
+ vpanic( "The impossible happened: dis_dfp_bcd(ppc), undefined SP field" );
+ }
+
+ assign( result_hi,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ mkexpr( top_12_l ),
+ mkU8( 28 ) ),
+ mkexpr( mid_60_u ) ),
+ mkexpr( mid_60_l ) ) );
+
+ assign( result_lo,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ mkexpr( low_60_u ),
+ mkU8( 4 ) ),
+ binop( Iop_Shr32,
+ mkexpr( low_60_l ),
+ mkU8( 28 ) ) ),
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ mkexpr( low_60_l ),
+ mkU8( 4 ) ),
+ mkexpr( sign ) ) ) );
+ }
+
+ putDReg( frT_addr, unop( Iop_ReinterpI64asD64, mkexpr( result_hi ) ) );
+ putDReg( frT_addr + 1,
+ unop( Iop_ReinterpI64asD64, mkexpr( result_lo ) ) );
+ }
+ break;
+ case 0x342: // denbcdq DFP Encode BCD to DPD
+ {
+ IRTemp valid_mask = newTemp( Ity_I32 );
+ IRTemp invalid_mask = newTemp( Ity_I32 );
+ IRTemp result128 = newTemp( Ity_D128 );
+ IRTemp dfp_significand = newTemp( Ity_D128 );
+ IRTemp tmp_hi = newTemp( Ity_I64 );
+ IRTemp tmp_lo = newTemp( Ity_I64 );
+ IRTemp dbcd_top_l = newTemp( Ity_I32 );
+ IRTemp dbcd_mid_u = newTemp( Ity_I32 );
+ IRTemp dbcd_mid_l = newTemp( Ity_I32 );
+ IRTemp dbcd_low_u = newTemp( Ity_I32 );
+ IRTemp dbcd_low_l = newTemp( Ity_I32 );
+ IRTemp bcd_top_8 = newTemp( Ity_I64 );
+ IRTemp bcd_mid_60 = newTemp( Ity_I64 );
+ IRTemp bcd_low_60 = newTemp( Ity_I64 );
+ IRTemp sign_bit = newTemp( Ity_I32 );
+ IRTemp tmptop10 = newTemp( Ity_I64 );
+ IRTemp tmpmid50 = newTemp( Ity_I64 );
+ IRTemp tmplow50 = newTemp( Ity_I64 );
+ IRTemp inval_bcd_digit_mask = newTemp( Ity_I32 );
+
+ DIP( "denbcd %llu,r%u,r%u\n", s, frT_addr, frB_addr );
+
+ if ( s == 0 ) {
+ /* Unsigned BCD string */
+ assign( sign_bit, mkU32( 0 ) ); // set to zero for unsigned string
+
+ assign( bcd_top_8,
+ binop( Iop_32HLto64,
+ mkU32( 0 ),
+ binop( Iop_And32,
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32,
+ mkexpr( frBI64_hi ) ),
+ mkU8( 24 ) ),
+ mkU32( 0xFF ) ) ) );
+ assign( bcd_mid_60,
+ binop( Iop_32HLto64,
+ binop( Iop_Or32,
+ binop( Iop_Shr32,
+ unop( Iop_64to32,
+ mkexpr( frBI64_hi ) ),
+ mkU8( 28 ) ),
+ binop( Iop_Shl32,
+ unop( Iop_64HIto32,
+ mkexpr( frBI64_hi ) ),
+ mkU8( 4 ) ) ),
+ binop( Iop_Or32,
+ binop( Iop_Shl32,
+ unop( Iop_64to32,
+ mkexpr( frBI64_hi ) ),
+ mkU8( 4 ) ),
+ binop( Iop_Shr32,
+ unop( Iop_64HIto32,
+ mkexpr( frBI64_lo ) ),
+ mkU8( 28 ) ) ) ) );
+
+ /* Note, the various helper functions ignores top 4-bits */
+ assign( bcd_low_60, mkexpr( frBI64_lo ) );
+
+ assign( tmptop10, unop( Iop_BCDtoDPB, mkexpr( bcd_top_8 ) ) );
+ assign( dbcd_top_l, unop( Iop_64to32, mkexpr( tmptop10 ) ) );
+
+ assign( tmpmid50, unop( Iop_BCDtoDPB, mkexpr( bcd_mid_60 ) ) );
+ assign( dbcd_mid_u, unop( Iop_64HIto32, mkexpr( tmpmid50 ) ) );
+ assign( dbcd_mid_l, unop( Iop_64to32, mkexpr( tmpmid50 ) ) );
+
+ assign( tmplow50, unop( Iop_BCDtoDPB, mkexpr( bcd_low_60 ) ) );
+ assign( dbcd_low_u, unop( Iop_64HIto32, mkexpr( tmplow50 ) ) );
+ assign( dbcd_low_l, unop( Iop_64to32, mkexpr( tmplow50 ) ) );
+
+ /* The entire BCD string fits in lower 110-bits. The LMD = 0,
+ * value is not part of the final result. Only the right most
+ * BCD digits are stored.
+ */
+ assign( lmd, mkU32( 0 ) );
+
+ assign( invalid_mask,
+ binop( Iop_Or32,
+ bcd_digit_inval( mkU32( 0 ),
+ unop( Iop_64to32,
+ mkexpr( bcd_top_8 ) ) ),
+ binop( Iop_Or32,
+ bcd_digit_inval( unop( Iop_64HIto32,
+ mkexpr( bcd_mid_60 ) ),
+ unop( Iop_64to32,
+ mkexpr( bcd_mid_60 ) ) ),
+ bcd_digit_inval( unop( Iop_64HIto32,
+ mkexpr( bcd_low_60 ) ),
+ unop( Iop_64to32,
+ mkexpr( bcd_low_60 ) )
+ ) ) ) );
+
+ } else if ( s == 1 ) {
+ IRTemp sign = newTemp( Ity_I32 );
+ IRTemp zero = newTemp( Ity_I32 );
+ IRTemp pos_sign_mask = newTemp( Ity_I32 );
+ IRTemp neg_sign_mask = newTemp( Ity_I32 );
+
+ /* The si...
[truncated message content] |
|
From: <sv...@va...> - 2012-06-02 20:30:53
|
florian 2012-06-02 21:30:41 +0100 (Sat, 02 Jun 2012)
New Revision: 12602
Log:
Rippled from VEX r2366. Part of reducing size of IRExpr.
These are the valgrind bits.
Modified files:
trunk/memcheck/mc_translate.c
Modified: trunk/memcheck/mc_translate.c (+9 -8)
===================================================================
--- trunk/memcheck/mc_translate.c 2012-06-02 12:55:52 +01:00 (rev 12601)
+++ trunk/memcheck/mc_translate.c 2012-06-02 21:30:41 +01:00 (rev 12602)
@@ -3832,8 +3832,9 @@
case Iex_Triop:
return expr2vbits_Triop(
mce,
- e->Iex.Triop.op,
- e->Iex.Triop.arg1, e->Iex.Triop.arg2, e->Iex.Triop.arg3
+ e->Iex.Triop.details->op,
+ e->Iex.Triop.details->arg1, e->Iex.Triop.details->arg2,
+ e->Iex.Triop.details->arg3
);
case Iex_Binop:
@@ -4981,9 +4982,9 @@
return isBogusAtom(e->Iex.Binop.arg1)
|| isBogusAtom(e->Iex.Binop.arg2);
case Iex_Triop:
- return isBogusAtom(e->Iex.Triop.arg1)
- || isBogusAtom(e->Iex.Triop.arg2)
- || isBogusAtom(e->Iex.Triop.arg3);
+ return isBogusAtom(e->Iex.Triop.details->arg1)
+ || isBogusAtom(e->Iex.Triop.details->arg2)
+ || isBogusAtom(e->Iex.Triop.details->arg3);
case Iex_Qop:
return isBogusAtom(e->Iex.Qop.details->arg1)
|| isBogusAtom(e->Iex.Qop.details->arg2)
@@ -5741,9 +5742,9 @@
gen_maxU32( mce, b3, b4 ) );
}
case Iex_Triop: {
- IRAtom* b1 = schemeE( mce, e->Iex.Triop.arg1 );
- IRAtom* b2 = schemeE( mce, e->Iex.Triop.arg2 );
- IRAtom* b3 = schemeE( mce, e->Iex.Triop.arg3 );
+ IRAtom* b1 = schemeE( mce, e->Iex.Triop.details->arg1 );
+ IRAtom* b2 = schemeE( mce, e->Iex.Triop.details->arg2 );
+ IRAtom* b3 = schemeE( mce, e->Iex.Triop.details->arg3 );
return gen_maxU32( mce, b1, gen_maxU32( mce, b2, b3 ) );
}
case Iex_Binop: {
|
|
From: <sv...@va...> - 2012-06-02 20:29:33
|
florian 2012-06-02 21:29:22 +0100 (Sat, 02 Jun 2012)
New Revision: 2366
Log:
Put the Triop member into a separate struct (IRTriop) and link to that
from IRExpr. Reduces size of IRExpr from 40 bytes to 32 bytes on LP64
and from 20 bytes to 16 bytes on ILP32.
Modified files:
trunk/priv/host_amd64_isel.c
trunk/priv/host_arm_isel.c
trunk/priv/host_ppc_isel.c
trunk/priv/host_s390_isel.c
trunk/priv/host_x86_isel.c
trunk/priv/ir_defs.c
trunk/priv/ir_opt.c
trunk/priv/main_main.c
trunk/pub/libvex_ir.h
Modified: trunk/pub/libvex_ir.h (+10 -4)
===================================================================
--- trunk/pub/libvex_ir.h 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/pub/libvex_ir.h 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -1478,6 +1478,7 @@
/* ------------------ Expressions ------------------ */
typedef struct _IRQop IRQop; /* forward declaration */
+typedef struct _IRQop IRTriop; /* forward declaration */
/* The different kinds of expressions. Their meaning is explained below
@@ -1591,10 +1592,7 @@
eg. MulF64(1, 2.0, 3.0)
*/
struct {
- IROp op; /* op-code */
- IRExpr* arg1; /* operand 1 */
- IRExpr* arg2; /* operand 2 */
- IRExpr* arg3; /* operand 3 */
+ IRTriop* details;
} Triop;
/* A binary operation.
@@ -1696,6 +1694,14 @@
} Iex;
};
+/* ------------------ A ternary expression ---------------------- */
+struct _IRTriop {
+ IROp op; /* op-code */
+ IRExpr* arg1; /* operand 1 */
+ IRExpr* arg2; /* operand 2 */
+ IRExpr* arg3; /* operand 3 */
+};
+
/* ------------------ A quarternary expression ------------------ */
struct _IRQop {
IROp op; /* op-code */
Modified: trunk/priv/ir_defs.c (+45 -33)
===================================================================
--- trunk/priv/ir_defs.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/ir_defs.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -1031,16 +1031,18 @@
vex_printf( ")" );
break;
}
- case Iex_Triop:
- ppIROp(e->Iex.Triop.op);
+ case Iex_Triop: {
+ IRTriop *triop = e->Iex.Triop.details;
+ ppIROp(triop->op);
vex_printf( "(" );
- ppIRExpr(e->Iex.Triop.arg1);
+ ppIRExpr(triop->arg1);
vex_printf( "," );
- ppIRExpr(e->Iex.Triop.arg2);
+ ppIRExpr(triop->arg2);
vex_printf( "," );
- ppIRExpr(e->Iex.Triop.arg3);
+ ppIRExpr(triop->arg3);
vex_printf( ")" );
break;
+ }
case Iex_Binop:
ppIROp(e->Iex.Binop.op);
vex_printf( "(" );
@@ -1489,12 +1491,14 @@
}
IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1,
IRExpr* arg2, IRExpr* arg3 ) {
- IRExpr* e = LibVEX_Alloc(sizeof(IRExpr));
+ IRExpr* e = LibVEX_Alloc(sizeof(IRExpr));
+ IRTriop* triop = LibVEX_Alloc(sizeof(IRTriop));
+ triop->op = op;
+ triop->arg1 = arg1;
+ triop->arg2 = arg2;
+ triop->arg3 = arg3;
e->tag = Iex_Triop;
- e->Iex.Triop.op = op;
- e->Iex.Triop.arg1 = arg1;
- e->Iex.Triop.arg2 = arg2;
- e->Iex.Triop.arg3 = arg3;
+ e->Iex.Triop.details = triop;
return e;
}
IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) {
@@ -1897,11 +1901,14 @@
deepCopyIRExpr(qop->arg3),
deepCopyIRExpr(qop->arg4));
}
- case Iex_Triop:
- return IRExpr_Triop(e->Iex.Triop.op,
- deepCopyIRExpr(e->Iex.Triop.arg1),
- deepCopyIRExpr(e->Iex.Triop.arg2),
- deepCopyIRExpr(e->Iex.Triop.arg3));
+ case Iex_Triop: {
+ IRTriop *triop = e->Iex.Triop.details;
+
+ return IRExpr_Triop(triop->op,
+ deepCopyIRExpr(triop->arg1),
+ deepCopyIRExpr(triop->arg2),
+ deepCopyIRExpr(triop->arg3));
+ }
case Iex_Binop:
return IRExpr_Binop(e->Iex.Binop.op,
deepCopyIRExpr(e->Iex.Binop.arg1),
@@ -2881,7 +2888,7 @@
&t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
return t_dst;
case Iex_Triop:
- typeOfPrimop(e->Iex.Triop.op,
+ typeOfPrimop(e->Iex.Triop.details->op,
&t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
return t_dst;
case Iex_Binop:
@@ -2945,6 +2952,7 @@
IRCAS* cas;
IRPutI* puti;
IRQop* qop;
+ IRTriop* triop;
switch (st->tag) {
case Ist_AbiHint:
@@ -2972,10 +2980,11 @@
&& isIRAtom(qop->arg2)
&& isIRAtom(qop->arg3)
&& isIRAtom(qop->arg4));
- case Iex_Triop: return toBool(
- isIRAtom(e->Iex.Triop.arg1)
- && isIRAtom(e->Iex.Triop.arg2)
- && isIRAtom(e->Iex.Triop.arg3));
+ case Iex_Triop: triop = e->Iex.Triop.details;
+ return toBool(
+ isIRAtom(triop->arg1)
+ && isIRAtom(triop->arg2)
+ && isIRAtom(triop->arg3));
case Iex_Binop: return toBool(
isIRAtom(e->Iex.Binop.arg1)
&& isIRAtom(e->Iex.Binop.arg2));
@@ -3133,11 +3142,13 @@
useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts);
break;
}
- case Iex_Triop:
- useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg1,def_counts);
- useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg2,def_counts);
- useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg3,def_counts);
+ case Iex_Triop: {
+ IRTriop* triop = expr->Iex.Triop.details;
+ useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts);
+ useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts);
+ useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts);
break;
+ }
case Iex_Binop:
useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts);
useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts);
@@ -3297,26 +3308,27 @@
}
case Iex_Triop: {
IRType ttarg1, ttarg2, ttarg3;
- tcExpr(bb,stmt, expr->Iex.Triop.arg1, gWordTy );
- tcExpr(bb,stmt, expr->Iex.Triop.arg2, gWordTy );
- tcExpr(bb,stmt, expr->Iex.Triop.arg3, gWordTy );
- typeOfPrimop(expr->Iex.Triop.op,
+ IRTriop *triop = expr->Iex.Triop.details;
+ tcExpr(bb,stmt, triop->arg1, gWordTy );
+ tcExpr(bb,stmt, triop->arg2, gWordTy );
+ tcExpr(bb,stmt, triop->arg3, gWordTy );
+ typeOfPrimop(triop->op,
&t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
|| t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) {
vex_printf(" op name: " );
- ppIROp(expr->Iex.Triop.op);
+ ppIROp(triop->op);
vex_printf("\n");
sanityCheckFail(bb,stmt,
"Iex.Triop: wrong arity op\n"
"... name of op precedes BB printout\n");
}
- ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg1);
- ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg2);
- ttarg3 = typeOfIRExpr(tyenv, expr->Iex.Triop.arg3);
+ ttarg1 = typeOfIRExpr(tyenv, triop->arg1);
+ ttarg2 = typeOfIRExpr(tyenv, triop->arg2);
+ ttarg3 = typeOfIRExpr(tyenv, triop->arg3);
if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) {
vex_printf(" op name: ");
- ppIROp(expr->Iex.Triop.op);
+ ppIROp(triop->op);
vex_printf("\n");
vex_printf(" op type is (");
ppIRType(t_arg1);
Modified: trunk/priv/host_amd64_isel.c (+23 -20)
===================================================================
--- trunk/priv/host_amd64_isel.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/host_amd64_isel.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -1715,13 +1715,14 @@
/* --------- TERNARY OP --------- */
case Iex_Triop: {
+ IRTriop *triop = e->Iex.Triop.details;
/* C3210 flags following FPU partial remainder (fprem), both
IEEE compliant (PREM1) and non-IEEE compliant (PREM). */
- if (e->Iex.Triop.op == Iop_PRemC3210F64
- || e->Iex.Triop.op == Iop_PRem1C3210F64) {
+ if (triop->op == Iop_PRemC3210F64
+ || triop->op == Iop_PRem1C3210F64) {
AMD64AMode* m8_rsp = AMD64AMode_IR(-8, hregAMD64_RSP());
- HReg arg1 = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg arg2 = iselDblExpr(env, e->Iex.Triop.arg3);
+ HReg arg1 = iselDblExpr(env, triop->arg2);
+ HReg arg2 = iselDblExpr(env, triop->arg3);
HReg dst = newVRegI(env);
addInstr(env, AMD64Instr_A87Free(2));
@@ -1733,7 +1734,7 @@
addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 8, arg1, m8_rsp));
addInstr(env, AMD64Instr_A87PushPop(m8_rsp, True/*push*/, 8));
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_PRemC3210F64:
addInstr(env, AMD64Instr_A87FpOp(Afp_PREM));
break;
@@ -2557,8 +2558,9 @@
}
if (e->tag == Iex_Triop) {
+ IRTriop *triop = e->Iex.Triop.details;
AMD64SseOp op = Asse_INVALID;
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_AddF64: op = Asse_ADDF; break;
case Iop_SubF64: op = Asse_SUBF; break;
case Iop_MulF64: op = Asse_MULF; break;
@@ -2567,8 +2569,8 @@
}
if (op != Asse_INVALID) {
HReg dst = newVRegV(env);
- HReg argL = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg argR = iselDblExpr(env, e->Iex.Triop.arg3);
+ HReg argL = iselDblExpr(env, triop->arg2);
+ HReg argR = iselDblExpr(env, triop->arg3);
addInstr(env, mk_vMOVsd_RR(argL, dst));
/* XXXROUNDINGFIXME */
/* set roundingmode here */
@@ -2601,21 +2603,22 @@
return dst;
}
+ IRTriop *triop = e->Iex.Triop.details;
if (e->tag == Iex_Triop
- && (e->Iex.Triop.op == Iop_ScaleF64
- || e->Iex.Triop.op == Iop_AtanF64
- || e->Iex.Triop.op == Iop_Yl2xF64
- || e->Iex.Triop.op == Iop_Yl2xp1F64
- || e->Iex.Triop.op == Iop_PRemF64
- || e->Iex.Triop.op == Iop_PRem1F64)
+ && (triop->op == Iop_ScaleF64
+ || triop->op == Iop_AtanF64
+ || triop->op == Iop_Yl2xF64
+ || triop->op == Iop_Yl2xp1F64
+ || triop->op == Iop_PRemF64
+ || triop->op == Iop_PRem1F64)
) {
AMD64AMode* m8_rsp = AMD64AMode_IR(-8, hregAMD64_RSP());
- HReg arg1 = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg arg2 = iselDblExpr(env, e->Iex.Triop.arg3);
+ HReg arg1 = iselDblExpr(env, triop->arg2);
+ HReg arg2 = iselDblExpr(env, triop->arg3);
HReg dst = newVRegV(env);
- Bool arg2first = toBool(e->Iex.Triop.op == Iop_ScaleF64
- || e->Iex.Triop.op == Iop_PRemF64
- || e->Iex.Triop.op == Iop_PRem1F64);
+ Bool arg2first = toBool(triop->op == Iop_ScaleF64
+ || triop->op == Iop_PRemF64
+ || triop->op == Iop_PRem1F64);
addInstr(env, AMD64Instr_A87Free(2));
/* one arg -> top of x87 stack */
@@ -2631,7 +2634,7 @@
/* do it */
/* XXXROUNDINGFIXME */
/* set roundingmode here */
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_ScaleF64:
addInstr(env, AMD64Instr_A87FpOp(Afp_SCALE));
break;
Modified: trunk/priv/host_s390_isel.c (+10 -8)
===================================================================
--- trunk/priv/host_s390_isel.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/host_s390_isel.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -1517,9 +1517,10 @@
/* --------- TERNARY OP --------- */
case Iex_Triop: {
- IROp op = expr->Iex.Triop.op;
- IRExpr *left = expr->Iex.Triop.arg2;
- IRExpr *right = expr->Iex.Triop.arg3;
+ IRTriop *triop = expr->Iex.Triop.details;
+ IROp op = triop->op;
+ IRExpr *left = triop->arg2;
+ IRExpr *right = triop->arg3;
s390_bfp_binop_t bfpop;
s390_round_t rounding_mode;
HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15;
@@ -1550,7 +1551,7 @@
goto irreducible;
}
- rounding_mode = decode_rounding_mode(expr->Iex.Triop.arg1);
+ rounding_mode = decode_rounding_mode(triop->arg1);
addInstr(env, s390_insn_bfp128_binop(16, bfpop, f12, f14, f13,
f15, rounding_mode));
@@ -1784,9 +1785,10 @@
/* --------- TERNARY OP --------- */
case Iex_Triop: {
- IROp op = expr->Iex.Triop.op;
- IRExpr *left = expr->Iex.Triop.arg2;
- IRExpr *right = expr->Iex.Triop.arg3;
+ IRTriop *triop = expr->Iex.Triop.details;
+ IROp op = triop->op;
+ IRExpr *left = triop->arg2;
+ IRExpr *right = triop->arg3;
s390_bfp_binop_t bfpop;
s390_round_t rounding_mode;
HReg h1, op2, dst;
@@ -1809,7 +1811,7 @@
goto irreducible;
}
- rounding_mode = decode_rounding_mode(expr->Iex.Triop.arg1);
+ rounding_mode = decode_rounding_mode(triop->arg1);
addInstr(env, s390_insn_bfp_binop(size, bfpop, dst, op2, rounding_mode));
return dst;
}
Modified: trunk/priv/host_ppc_isel.c (+26 -23)
===================================================================
--- trunk/priv/host_ppc_isel.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/host_ppc_isel.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -3465,8 +3465,9 @@
}
if (e->tag == Iex_Triop) {
+ IRTriop *triop = e->Iex.Triop.details;
PPCFpOp fpop = Pfp_INVALID;
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_AddF64: fpop = Pfp_ADDD; break;
case Iop_SubF64: fpop = Pfp_SUBD; break;
case Iop_MulF64: fpop = Pfp_MULD; break;
@@ -3479,22 +3480,22 @@
}
if (fpop != Pfp_INVALID) {
HReg r_dst = newVRegF(env);
- HReg r_srcL = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg r_srcR = iselDblExpr(env, e->Iex.Triop.arg3);
- set_FPU_rounding_mode( env, e->Iex.Triop.arg1 );
+ HReg r_srcL = iselDblExpr(env, triop->arg2);
+ HReg r_srcR = iselDblExpr(env, triop->arg3);
+ set_FPU_rounding_mode( env, triop->arg1 );
addInstr(env, PPCInstr_FpBinary(fpop, r_dst, r_srcL, r_srcR));
return r_dst;
}
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_QuantizeD64: fpop = Pfp_DQUA; break;
case Iop_SignificanceRoundD64: fpop = Pfp_RRDTR; break;
default: break;
}
if (fpop != Pfp_INVALID) {
HReg r_dst = newVRegF(env);
- HReg r_srcL = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg r_srcR = iselDblExpr(env, e->Iex.Triop.arg3);
- PPCRI* rmc = iselWordExpr_RI(env, e->Iex.Triop.arg1);
+ HReg r_srcL = iselDblExpr(env, triop->arg2);
+ HReg r_srcR = iselDblExpr(env, triop->arg3);
+ PPCRI* rmc = iselWordExpr_RI(env, triop->arg1);
// will set TE and RMC when issuing instruction
addInstr(env, PPCInstr_DfpQuantize(fpop, r_dst, r_srcL, r_srcR, rmc));
@@ -3862,9 +3863,10 @@
}
if (e->tag == Iex_Triop) {
+ IRTriop *triop = e->Iex.Triop.details;
PPCFpOp fpop = Pfp_INVALID;
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_AddD64:
fpop = Pfp_DFPADD;
break;
@@ -3882,24 +3884,24 @@
}
if (fpop != Pfp_INVALID) {
HReg r_dst = newVRegF( env );
- HReg r_srcL = iselDfp64Expr( env, e->Iex.Triop.arg2 );
- HReg r_srcR = iselDfp64Expr( env, e->Iex.Triop.arg3 );
+ HReg r_srcL = iselDfp64Expr( env, triop->arg2 );
+ HReg r_srcR = iselDfp64Expr( env, triop->arg3 );
- set_FPU_DFP_rounding_mode( env, e->Iex.Triop.arg1 );
+ set_FPU_DFP_rounding_mode( env, triop->arg1 );
addInstr( env, PPCInstr_Dfp64Binary( fpop, r_dst, r_srcL, r_srcR ) );
return r_dst;
}
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_QuantizeD64: fpop = Pfp_DQUA; break;
case Iop_SignificanceRoundD64: fpop = Pfp_RRDTR; break;
default: break;
}
if (fpop != Pfp_INVALID) {
HReg r_dst = newVRegF(env);
- HReg r_srcL = iselDfp64Expr(env, e->Iex.Triop.arg2);
- HReg r_srcR = iselDfp64Expr(env, e->Iex.Triop.arg3);
- PPCRI* rmc = iselWordExpr_RI(env, e->Iex.Triop.arg1);
+ HReg r_srcL = iselDfp64Expr(env, triop->arg2);
+ HReg r_srcR = iselDfp64Expr(env, triop->arg3);
+ PPCRI* rmc = iselWordExpr_RI(env, triop->arg1);
addInstr(env, PPCInstr_DfpQuantize(fpop, r_dst, r_srcL, r_srcR,
rmc));
@@ -4041,8 +4043,9 @@
}
if (e->tag == Iex_Triop) {
+ IRTriop *triop = e->Iex.Triop.details;
PPCFpOp fpop = Pfp_INVALID;
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_AddD128:
fpop = Pfp_DFPADDQ;
break;
@@ -4066,9 +4069,9 @@
HReg r_srcRLo = newVRegV( env );
/* dst will be used to pass in the left operand and get the result. */
- iselDfp128Expr( &r_dstHi, &r_dstLo, env, e->Iex.Triop.arg2 );
- iselDfp128Expr( &r_srcRHi, &r_srcRLo, env, e->Iex.Triop.arg3 );
- set_FPU_rounding_mode( env, e->Iex.Triop.arg1 );
+ iselDfp128Expr( &r_dstHi, &r_dstLo, env, triop->arg2 );
+ iselDfp128Expr( &r_srcRHi, &r_srcRLo, env, triop->arg3 );
+ set_FPU_rounding_mode( env, triop->arg1 );
addInstr( env,
PPCInstr_Dfp128Binary( fpop, r_dstHi, r_dstLo,
r_srcRHi, r_srcRLo ) );
@@ -4076,7 +4079,7 @@
*rLo = r_dstLo;
return;
}
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_QuantizeD128: fpop = Pfp_DQUAQ; break;
case Iop_SignificanceRoundD128: fpop = Pfp_DRRNDQ; break;
default: break;
@@ -4089,8 +4092,8 @@
PPCRI* rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1);
/* dst will be used to pass in the left operand and get the result */
- iselDfp128Expr(&r_dstHi, &r_dstLo, env, e->Iex.Triop.arg2);
- iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Triop.arg3);
+ iselDfp128Expr(&r_dstHi, &r_dstLo, env, triop->arg2);
+ iselDfp128Expr(&r_srcHi, &r_srcLo, env, triop->arg3);
// will set RMC when issuing instruction
addInstr(env, PPCInstr_DfpQuantize128(fpop, r_dstHi, r_dstLo,
Modified: trunk/priv/main_main.c (+2 -2)
===================================================================
--- trunk/priv/main_main.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/main_main.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -159,11 +159,11 @@
/* These take a lot of space, so make sure we don't have
any unnoticed size regressions. */
if (VEX_HOST_WORDSIZE == 4) {
- vassert(sizeof(IRExpr) == 20);
+ vassert(sizeof(IRExpr) == 16);
vassert(sizeof(IRStmt) == 20 /* x86 */
|| sizeof(IRStmt) == 24 /* arm */);
} else {
- vassert(sizeof(IRExpr) == 40);
+ vassert(sizeof(IRExpr) == 32);
vassert(sizeof(IRStmt) == 32);
}
Modified: trunk/priv/ir_opt.c (+41 -34)
===================================================================
--- trunk/priv/ir_opt.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/ir_opt.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -302,14 +302,16 @@
return IRExpr_RdTmp(t1);
}
- case Iex_Triop:
+ case Iex_Triop: {
+ IRTriop* triop = ex->Iex.Triop.details;
t1 = newIRTemp(bb->tyenv, ty);
addStmtToIRSB(bb, IRStmt_WrTmp(t1,
- IRExpr_Triop(ex->Iex.Triop.op,
- flatten_Expr(bb, ex->Iex.Triop.arg1),
- flatten_Expr(bb, ex->Iex.Triop.arg2),
- flatten_Expr(bb, ex->Iex.Triop.arg3))));
+ IRExpr_Triop(triop->op,
+ flatten_Expr(bb, triop->arg1),
+ flatten_Expr(bb, triop->arg2),
+ flatten_Expr(bb, triop->arg3))));
return IRExpr_RdTmp(t1);
+ }
case Iex_Binop:
t1 = newIRTemp(bb->tyenv, ty);
@@ -1022,11 +1024,14 @@
return False;
}
- case Iex_Triop:
- return toBool( e1->Iex.Triop.op == e2->Iex.Triop.op
- && sameIRExprs_aux( env, e1->Iex.Triop.arg1, e2->Iex.Triop.arg1 )
- && sameIRExprs_aux( env, e1->Iex.Triop.arg2, e2->Iex.Triop.arg2 )
- && sameIRExprs_aux( env, e1->Iex.Triop.arg3, e2->Iex.Triop.arg3 ));
+ case Iex_Triop: {
+ IRTriop *tri1 = e1->Iex.Triop.details;
+ IRTriop *tri2 = e2->Iex.Triop.details;
+ return toBool( tri1->op == tri2->op
+ && sameIRExprs_aux( env, tri1->arg1, tri2->arg1 )
+ && sameIRExprs_aux( env, tri1->arg2, tri2->arg2 )
+ && sameIRExprs_aux( env, tri1->arg3, tri2->arg3 ));
+ }
case Iex_Mux0X:
return toBool( sameIRExprs_aux( env, e1->Iex.Mux0X.cond, e2->Iex.Mux0X.cond )
@@ -2055,16 +2060,18 @@
);
}
- case Iex_Triop:
- vassert(isIRAtom(ex->Iex.Triop.arg1));
- vassert(isIRAtom(ex->Iex.Triop.arg2));
- vassert(isIRAtom(ex->Iex.Triop.arg3));
+ case Iex_Triop: {
+ IRTriop* triop = ex->Iex.Triop.details;
+ vassert(isIRAtom(triop->arg1));
+ vassert(isIRAtom(triop->arg2));
+ vassert(isIRAtom(triop->arg3));
return IRExpr_Triop(
- ex->Iex.Triop.op,
- subst_Expr(env, ex->Iex.Triop.arg1),
- subst_Expr(env, ex->Iex.Triop.arg2),
- subst_Expr(env, ex->Iex.Triop.arg3)
+ triop->op,
+ subst_Expr(env, triop->arg1),
+ subst_Expr(env, triop->arg2),
+ subst_Expr(env, triop->arg3)
);
+ }
case Iex_Binop:
vassert(isIRAtom(ex->Iex.Binop.arg1));
@@ -2393,9 +2400,9 @@
addUses_Expr(set, e->Iex.Qop.details->arg4);
return;
case Iex_Triop:
- addUses_Expr(set, e->Iex.Triop.arg1);
- addUses_Expr(set, e->Iex.Triop.arg2);
- addUses_Expr(set, e->Iex.Triop.arg3);
+ addUses_Expr(set, e->Iex.Triop.details->arg1);
+ addUses_Expr(set, e->Iex.Triop.details->arg2);
+ addUses_Expr(set, e->Iex.Triop.details->arg3);
return;
case Iex_Binop:
addUses_Expr(set, e->Iex.Binop.arg1);
@@ -3823,9 +3830,9 @@
deltaIRExpr(e->Iex.Qop.details->arg4, delta);
break;
case Iex_Triop:
- deltaIRExpr(e->Iex.Triop.arg1, delta);
- deltaIRExpr(e->Iex.Triop.arg2, delta);
- deltaIRExpr(e->Iex.Triop.arg3, delta);
+ deltaIRExpr(e->Iex.Triop.details->arg1, delta);
+ deltaIRExpr(e->Iex.Triop.details->arg2, delta);
+ deltaIRExpr(e->Iex.Triop.details->arg3, delta);
break;
case Iex_Binop:
deltaIRExpr(e->Iex.Binop.arg1, delta);
@@ -4218,9 +4225,9 @@
setHints_Expr(doesLoad, doesGet, e->Iex.Qop.details->arg4);
return;
case Iex_Triop:
- setHints_Expr(doesLoad, doesGet, e->Iex.Triop.arg1);
- setHints_Expr(doesLoad, doesGet, e->Iex.Triop.arg2);
- setHints_Expr(doesLoad, doesGet, e->Iex.Triop.arg3);
+ setHints_Expr(doesLoad, doesGet, e->Iex.Triop.details->arg1);
+ setHints_Expr(doesLoad, doesGet, e->Iex.Triop.details->arg2);
+ setHints_Expr(doesLoad, doesGet, e->Iex.Triop.details->arg3);
return;
case Iex_Binop:
setHints_Expr(doesLoad, doesGet, e->Iex.Binop.arg1);
@@ -4292,9 +4299,9 @@
return;
case Iex_Triop:
- aoccCount_Expr(uses, e->Iex.Triop.arg1);
- aoccCount_Expr(uses, e->Iex.Triop.arg2);
- aoccCount_Expr(uses, e->Iex.Triop.arg3);
+ aoccCount_Expr(uses, e->Iex.Triop.details->arg1);
+ aoccCount_Expr(uses, e->Iex.Triop.details->arg2);
+ aoccCount_Expr(uses, e->Iex.Triop.details->arg3);
return;
case Iex_Binop:
@@ -4615,10 +4622,10 @@
);
case Iex_Triop:
return IRExpr_Triop(
- e->Iex.Triop.op,
- atbSubst_Expr(env, e->Iex.Triop.arg1),
- atbSubst_Expr(env, e->Iex.Triop.arg2),
- atbSubst_Expr(env, e->Iex.Triop.arg3)
+ e->Iex.Triop.details->op,
+ atbSubst_Expr(env, e->Iex.Triop.details->arg1),
+ atbSubst_Expr(env, e->Iex.Triop.details->arg2),
+ atbSubst_Expr(env, e->Iex.Triop.details->arg3)
);
case Iex_Binop:
return fold_IRExpr_Binop(
Modified: trunk/priv/host_x86_isel.c (+9 -7)
===================================================================
--- trunk/priv/host_x86_isel.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/host_x86_isel.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -789,14 +789,15 @@
/* --------- TERNARY OP --------- */
case Iex_Triop: {
+ IRTriop *triop = e->Iex.Triop.details;
/* C3210 flags following FPU partial remainder (fprem), both
IEEE compliant (PREM1) and non-IEEE compliant (PREM). */
- if (e->Iex.Triop.op == Iop_PRemC3210F64
- || e->Iex.Triop.op == Iop_PRem1C3210F64) {
+ if (triop->op == Iop_PRemC3210F64
+ || triop->op == Iop_PRem1C3210F64) {
HReg junk = newVRegF(env);
HReg dst = newVRegI(env);
- HReg srcL = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg srcR = iselDblExpr(env, e->Iex.Triop.arg3);
+ HReg srcL = iselDblExpr(env, triop->arg2);
+ HReg srcR = iselDblExpr(env, triop->arg3);
/* XXXROUNDINGFIXME */
/* set roundingmode here */
addInstr(env, X86Instr_FpBinary(
@@ -2958,7 +2959,8 @@
if (e->tag == Iex_Triop) {
X86FpOp fpop = Xfp_INVALID;
- switch (e->Iex.Triop.op) {
+ IRTriop *triop = e->Iex.Triop.details;
+ switch (triop->op) {
case Iop_AddF64: fpop = Xfp_ADD; break;
case Iop_SubF64: fpop = Xfp_SUB; break;
case Iop_MulF64: fpop = Xfp_MUL; break;
@@ -2973,8 +2975,8 @@
}
if (fpop != Xfp_INVALID) {
HReg res = newVRegF(env);
- HReg srcL = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg srcR = iselDblExpr(env, e->Iex.Triop.arg3);
+ HReg srcL = iselDblExpr(env, triop->arg2);
+ HReg srcR = iselDblExpr(env, triop->arg3);
/* XXXROUNDINGFIXME */
/* set roundingmode here */
addInstr(env, X86Instr_FpBinary(fpop,srcL,srcR,res));
Modified: trunk/priv/host_arm_isel.c (+39 -30)
===================================================================
--- trunk/priv/host_arm_isel.c 2012-06-02 12:55:25 +01:00 (rev 2365)
+++ trunk/priv/host_arm_isel.c 2012-06-02 21:29:22 +01:00 (rev 2366)
@@ -1133,14 +1133,15 @@
//zz /* --------- TERNARY OP --------- */
//zz case Iex_Triop: {
+//zz IRTriop *triop = e->Iex.Triop.details;
//zz /* C3210 flags following FPU partial remainder (fprem), both
//zz IEEE compliant (PREM1) and non-IEEE compliant (PREM). */
-//zz if (e->Iex.Triop.op == Iop_PRemC3210F64
-//zz || e->Iex.Triop.op == Iop_PRem1C3210F64) {
+//zz if (triop->op == Iop_PRemC3210F64
+//zz || triop->op == Iop_PRem1C3210F64) {
//zz HReg junk = newVRegF(env);
//zz HReg dst = newVRegI(env);
-//zz HReg srcL = iselDblExpr(env, e->Iex.Triop.arg2);
-//zz HReg srcR = iselDblExpr(env, e->Iex.Triop.arg3);
+//zz HReg srcL = iselDblExpr(env, triop->arg2);
+//zz HReg srcR = iselDblExpr(env, triop->arg3);
//zz /* XXXROUNDINGFIXME */
//zz /* set roundingmode here */
//zz addInstr(env, X86Instr_FpBinary(
@@ -3597,18 +3598,20 @@
} /* if (e->tag == Iex_Unop) */
if (e->tag == Iex_Triop) {
- switch (e->Iex.Triop.op) {
+ IRTriop *triop = e->Iex.Triop.details;
+
+ switch (triop->op) {
case Iop_Extract64: {
HReg res = newVRegD(env);
- HReg argL = iselNeon64Expr(env, e->Iex.Triop.arg1);
- HReg argR = iselNeon64Expr(env, e->Iex.Triop.arg2);
+ HReg argL = iselNeon64Expr(env, triop->arg1);
+ HReg argR = iselNeon64Expr(env, triop->arg2);
UInt imm4;
- if (e->Iex.Triop.arg3->tag != Iex_Const ||
- typeOfIRExpr(env->type_env, e->Iex.Triop.arg3) != Ity_I8) {
+ if (triop->arg3->tag != Iex_Const ||
+ typeOfIRExpr(env->type_env, triop->arg3) != Ity_I8) {
vpanic("ARM target supports Iop_Extract64 with constant "
"third argument less than 16 only\n");
}
- imm4 = e->Iex.Triop.arg3->Iex.Const.con->Ico.U8;
+ imm4 = triop->arg3->Iex.Const.con->Ico.U8;
if (imm4 >= 8) {
vpanic("ARM target supports Iop_Extract64 with constant "
"third argument less than 16 only\n");
@@ -3621,16 +3624,16 @@
case Iop_SetElem16x4:
case Iop_SetElem32x2: {
HReg res = newVRegD(env);
- HReg dreg = iselNeon64Expr(env, e->Iex.Triop.arg1);
- HReg arg = iselIntExpr_R(env, e->Iex.Triop.arg3);
+ HReg dreg = iselNeon64Expr(env, triop->arg1);
+ HReg arg = iselIntExpr_R(env, triop->arg3);
UInt index, size;
- if (e->Iex.Triop.arg2->tag != Iex_Const ||
- typeOfIRExpr(env->type_env, e->Iex.Triop.arg2) != Ity_I8) {
+ if (triop->arg2->tag != Iex_Const ||
+ typeOfIRExpr(env->type_env, triop->arg2) != Ity_I8) {
vpanic("ARM target supports SetElem with constant "
"second argument only\n");
}
- index = e->Iex.Triop.arg2->Iex.Const.con->Ico.U8;
- switch (e->Iex.Triop.op) {
+ index = triop->arg2->Iex.Const.con->Ico.U8;
+ switch (triop->op) {
case Iop_SetElem8x8: vassert(index < 8); size = 0; break;
case Iop_SetElem16x4: vassert(index < 4); size = 1; break;
case Iop_SetElem32x2: vassert(index < 2); size = 2; break;
@@ -5244,18 +5247,20 @@
}
if (e->tag == Iex_Triop) {
- switch (e->Iex.Triop.op) {
+ IRTriop *triop = e->Iex.Triop.details;
+
+ switch (triop->op) {
case Iop_ExtractV128: {
HReg res = newVRegV(env);
- HReg argL = iselNeonExpr(env, e->Iex.Triop.arg1);
- HReg argR = iselNeonExpr(env, e->Iex.Triop.arg2);
+ HReg argL = iselNeonExpr(env, triop->arg1);
+ HReg argR = iselNeonExpr(env, triop->arg2);
UInt imm4;
- if (e->Iex.Triop.arg3->tag != Iex_Const ||
- typeOfIRExpr(env->type_env, e->Iex.Triop.arg3) != Ity_I8) {
+ if (triop->arg3->tag != Iex_Const ||
+ typeOfIRExpr(env->type_env, triop->arg3) != Ity_I8) {
vpanic("ARM target supports Iop_ExtractV128 with constant "
"third argument less than 16 only\n");
}
- imm4 = e->Iex.Triop.arg3->Iex.Const.con->Ico.U8;
+ imm4 = triop->arg3->Iex.Const.con->Ico.U8;
if (imm4 >= 16) {
vpanic("ARM target supports Iop_ExtractV128 with constant "
"third argument less than 16 only\n");
@@ -5412,16 +5417,18 @@
}
if (e->tag == Iex_Triop) {
- switch (e->Iex.Triop.op) {
+ IRTriop *triop = e->Iex.Triop.details;
+
+ switch (triop->op) {
case Iop_DivF64:
case Iop_MulF64:
case Iop_AddF64:
case Iop_SubF64: {
ARMVfpOp op = 0; /*INVALID*/
- HReg argL = iselDblExpr(env, e->Iex.Triop.arg2);
- HReg argR = iselDblExpr(env, e->Iex.Triop.arg3);
+ HReg argL = iselDblExpr(env, triop->arg2);
+ HReg argR = iselDblExpr(env, triop->arg3);
HReg dst = newVRegD(env);
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_DivF64: op = ARMvfp_DIV; break;
case Iop_MulF64: op = ARMvfp_MUL; break;
case Iop_AddF64: op = ARMvfp_ADD; break;
@@ -5555,16 +5562,18 @@
}
if (e->tag == Iex_Triop) {
- switch (e->Iex.Triop.op) {
+ IRTriop *triop = e->Iex.Triop.details;
+
+ switch (triop->op) {
case Iop_DivF32:
case Iop_MulF32:
case Iop_AddF32:
case Iop_SubF32: {
ARMVfpOp op = 0; /*INVALID*/
- HReg argL = iselFltExpr(env, e->Iex.Triop.arg2);
- HReg argR = iselFltExpr(env, e->Iex.Triop.arg3);
+ HReg argL = iselFltExpr(env, triop->arg2);
+ HReg argR = iselFltExpr(env, triop->arg3);
HReg dst = newVRegF(env);
- switch (e->Iex.Triop.op) {
+ switch (triop->op) {
case Iop_DivF32: op = ARMvfp_DIV; break;
case Iop_MulF32: op = ARMvfp_MUL; break;
case Iop_AddF32: op = ARMvfp_ADD; break;
|
|
From: Florian K. <br...@ac...> - 2012-06-02 17:47:21
|
On 06/02/2012 11:22 AM, John Reiser wrote: > > While the reduction in size is welcome (especially to "nice" sizes > such as 32 and 16 bytes), the cost of the additional indirection > could be large due to memory latency, fragmentation of additional allocation, > cache pressure or direct cache misses. In general, yes. But probably not in our case. VEX memory allocation is banked, and the two memory blocks we allocate for, e.g. a quarternary IR op (one IRExpr and one IRQop) are next to each other in a contiguous piece of memory. So the extra memory access due to the additional indirection goes to memory very close by. I wouldn't expect any difference due to extra cache misses here. Also, keep in mind, that IRQops are extremely rare and only for those you incur the extra indirection, double allocation etc. Likewise, IRTriops are mostly used for floating point, which means we wouldn't see these much in typical applications. perf/f[f]bench are probably the best testcases we have at hand that would exercise this. Florian |
|
From: John R. <jr...@bi...> - 2012-06-02 15:21:41
|
On 06/02/2012 07:11 AM, Florian Krohm wrote: > On 06/02/2012 03:40 AM, Philippe Waroquiers wrote: >> On Sat, 2012-06-02 at 00:03 -0400, Florian Krohm wrote: >>> >From 40 bytes to 32 bytes on LP64. From 20 to 16 bytes on ILP32. >>> Same procedure as in previous patch for Qop. This time putting the Triop >>> bits into a separate structure IRTriop. >>> >>> Here are some numbers showing the memory allocated by VEX in bytes for >>> amd64/ppc64/s390x. The net is: it's always a win and the savings are >>> pretty consistent 4-5% across platforms. >> That is nice. >> What is the related performance improvement ? > > I did not measure. The perf bucket is not very good measuring the effect > of these micro improvements -- unfortunately. While the reduction in size is welcome (especially to "nice" sizes such as 32 and 16 bytes), the cost of the additional indirection could be large due to memory latency, fragmentation of additional allocation, cache pressure or direct cache misses. Such effects would be visible in the wall-clock time that is reported by the bash shell "time" function (or similar); "perf" is not needed. So, what does "time" say about the before+after wall-clock latency? -- |
|
From: Florian K. <br...@ac...> - 2012-06-02 14:11:53
|
On 06/02/2012 03:40 AM, Philippe Waroquiers wrote: > On Sat, 2012-06-02 at 00:03 -0400, Florian Krohm wrote: >> >From 40 bytes to 32 bytes on LP64. From 20 to 16 bytes on ILP32. >> Same procedure as in previous patch for Qop. This time putting the Triop >> bits into a separate structure IRTriop. >> >> Here are some numbers showing the memory allocated by VEX in bytes for >> amd64/ppc64/s390x. The net is: it's always a win and the savings are >> pretty consistent 4-5% across platforms. > That is nice. > What is the related performance improvement ? I did not measure. The perf bucket is not very good measuring the effect of these micro improvements -- unfortunately. > (I suppose this will improve more on smaller systems) Certainly. Florian |
|
From: <sv...@va...> - 2012-06-02 11:56:04
|
sewardj 2012-06-02 12:55:52 +0100 (Sat, 02 Jun 2012)
New Revision: 12601
Log:
Update.
Modified files:
trunk/none/tests/amd64/avx-1.c
Modified: trunk/none/tests/amd64/avx-1.c (+31 -6)
===================================================================
--- trunk/none/tests/amd64/avx-1.c 2012-06-02 03:39:54 +01:00 (rev 12600)
+++ trunk/none/tests/amd64/avx-1.c 2012-06-02 12:55:52 +01:00 (rev 12601)
@@ -1,12 +1,6 @@
/* The following tests appear not to be accepted by the assembler.
VCVTPD2PS_128 (memory form)
-
- The following tests currently fail and are disabled:
- VCMPSD_128_0xD
- VCMPSS_128_0xD
- VEXTRACTF128_0x0
- VEXTRACTF128_0x1
*/
#include <stdio.h>
@@ -466,10 +460,18 @@
"vmovaps %%xmm9, %%xmm6",
"vmovaps %%xmm7, (%%rax)")
+GEN_test_RandM(VMOVAPS_GtoE_256,
+ "vmovaps %%ymm9, %%ymm6",
+ "vmovaps %%ymm7, (%%rax)")
+
GEN_test_RandM(VMOVAPD_GtoE_128,
"vmovapd %%xmm9, %%xmm6",
"vmovapd %%xmm7, (%%rax)")
+GEN_test_RandM(VMOVAPD_GtoE_256,
+ "vmovapd %%ymm9, %%ymm6",
+ "vmovapd %%ymm7, (%%rax)")
+
GEN_test_RandM(VMOVDQU_EtoG_128,
"vmovdqu %%xmm6, %%xmm8",
"vmovdqu (%%rax), %%xmm9")
@@ -645,6 +647,23 @@
"vucomiss %%xmm6, %%xmm8; pushfq; popq %%r14; andq $0x8D5, %%r14",
"vucomiss (%%rax), %%xmm8; pushfq; popq %%r14; andq $0x8D5, %%r14")
+GEN_test_RandM(VPINSRQ_128,
+ "vpinsrq $0, %%r14, %%xmm8, %%xmm7",
+ "vpinsrq $1, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VPADDQ_128,
+ "vpaddq %%xmm6, %%xmm8, %%xmm7",
+ "vpaddq (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VPSUBQ_128,
+ "vpsubq %%xmm6, %%xmm8, %%xmm7",
+ "vpsubq (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VPSUBW_128,
+ "vpsubw %%xmm6, %%xmm8, %%xmm7",
+ "vpsubw (%%rax), %%xmm8, %%xmm7")
+
+
/* Comment duplicated above, for convenient reference:
Allowed operands in test insns:
Reg form: %ymm6, %ymm7, %ymm8, %ymm9 and %r14.
@@ -654,6 +673,10 @@
int main ( void )
{
+ test_VPSUBW_128();
+ test_VPSUBQ_128();
+ test_VPADDQ_128();
+ test_VPINSRQ_128();
test_VUCOMISS_128();
test_VUCOMISD_128();
test_VCVTPS2PD_128();
@@ -700,7 +723,9 @@
test_VMOVDQA_EtoG_128();
test_VMOVDQU_EtoG_128();
test_VMOVAPD_GtoE_128();
+ test_VMOVAPD_GtoE_256();
test_VMOVAPS_GtoE_128();
+ test_VMOVAPS_GtoE_256();
test_VMOVAPS_EtoG_128();
test_VMOVAPD_EtoG_256();
test_VMOVAPD_EtoG_128();
|
|
From: <sv...@va...> - 2012-06-02 11:55:36
|
sewardj 2012-06-02 12:55:25 +0100 (Sat, 02 Jun 2012)
New Revision: 2365
Log:
Implement
VMOVAPD ymm1, ymm2/m256 = VEX.256.66.0F.WIG 29 /r
VMOVAPS ymm1, ymm2/m256 = VEX.256.0F.WIG 29 /r
VPADDQ r/m, rV, r ::: r = rV + r/m
VPSUBW r/m, rV, r ::: r = rV - r/m
VPSUBQ = VEX.NDS.128.66.0F.WIG FB /r
VPINSRQ r64/m64, xmm2, xmm1 = VEX.NDS.128.66.0F3A.W1 22 /r ib
Modified files:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c (+145 -38)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2012-06-01 23:04:27 +01:00 (rev 2364)
+++ trunk/priv/guest_amd64_toIR.c 2012-06-02 12:55:25 +01:00 (rev 2365)
@@ -15743,6 +15743,29 @@
}
+static IRTemp math_PINSRQ_128 ( IRTemp v128, IRTemp u64, UInt imm8 )
+{
+ /* Surround u64 with zeroes as per imm, giving us something we can
+ OR into a suitably masked-out v128.*/
+ IRTemp withZs = newTemp(Ity_V128);
+ UShort mask = 0;
+ if (imm8 == 0) {
+ mask = 0xFF00;
+ assign(withZs, binop(Iop_64HLtoV128, mkU64(0), mkexpr(u64)));
+ } else {
+ vassert(imm8 == 1);
+ mask = 0x00FF;
+ assign( withZs, binop(Iop_64HLtoV128, mkexpr(u64), mkU64(0)));
+ }
+
+ IRTemp res = newTemp(Ity_V128);
+ assign( res, binop( Iop_OrV128,
+ mkexpr(withZs),
+ binop( Iop_AndV128, mkexpr(v128), mkV128(mask) ) ) );
+ return res;
+}
+
+
static IRTemp math_INSERTPS ( IRTemp dstV, IRTemp toInsertD, UInt imm8 )
{
const IRTemp inval = IRTemp_INVALID;
@@ -16455,46 +16478,31 @@
Extract Quadword int from gen.reg/mem64 and insert into xmm1 */
if (have66noF2noF3(pfx)
&& sz == 8 /* REX.W is present */) {
-
Int imm8_0;
- IRTemp src_elems = newTemp(Ity_I64);
- IRTemp src_vec = newTemp(Ity_V128);
-
+ IRTemp src_u64 = newTemp(Ity_I64);
modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
if ( epartIsReg( modrm ) ) {
+ UInt rE = eregOfRexRM(pfx,modrm);
imm8_0 = (Int)(getUChar(delta+1) & 1);
- assign( src_elems, getIReg64( eregOfRexRM(pfx,modrm) ) );
+ assign( src_u64, getIReg64( rE ) );
delta += 1+1;
- DIP( "pinsrq $%d, %s,%s\n", imm8_0,
- nameIReg64( eregOfRexRM(pfx, modrm) ),
- nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ DIP( "pinsrq $%d, %s,%s\n",
+ imm8_0, nameIReg64(rE), nameXMMReg(rG) );
} else {
addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
imm8_0 = (Int)(getUChar(delta+alen) & 1);
- assign( src_elems, loadLE( Ity_I64, mkexpr(addr) ) );
+ assign( src_u64, loadLE( Ity_I64, mkexpr(addr) ) );
delta += alen+1;
DIP( "pinsrq $%d, %s,%s\n",
- imm8_0, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ imm8_0, dis_buf, nameXMMReg(rG) );
}
- UShort mask = 0;
- if ( imm8_0 == 0 ) {
- mask = 0xFF00;
- assign( src_vec,
- binop( Iop_64HLtoV128, mkU64(0), mkexpr(src_elems) ) );
- } else {
- mask = 0x00FF;
- assign( src_vec,
- binop( Iop_64HLtoV128, mkexpr(src_elems), mkU64(0) ) );
- }
-
- putXMMReg( gregOfRexRM(pfx, modrm),
- binop( Iop_OrV128, mkexpr(src_vec),
- binop( Iop_AndV128,
- getXMMReg( gregOfRexRM(pfx, modrm) ),
- mkV128(mask) ) ) );
-
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg( rG ));
+ IRTemp res_vec = math_PINSRQ_128( src_vec, src_u64, imm8_0 );
+ putXMMReg( rG, mkexpr(res_vec) );
goto decode_success;
}
break;
@@ -20038,6 +20046,42 @@
break;
case 0x29:
+ /* VMOVAPD xmm1, xmm2/m128 = VEX.128.66.0F.WIG 29 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ putYMMRegLoAndZU( rE, getXMMReg(rG) );
+ DIP("vmovapd %s,%s\n", nameXMMReg(rG), nameXMMReg(rE));
+ delta += 1;
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ gen_SEGV_if_not_16_aligned( addr );
+ storeLE( mkexpr(addr), getXMMReg(rG) );
+ DIP("vmovapd %s,%s\n", nameXMMReg(rG), dis_buf );
+ delta += alen;
+ }
+ goto decode_success;
+ }
+ /* VMOVAPD ymm1, ymm2/m256 = VEX.256.66.0F.WIG 29 /r */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ putYMMReg( rE, getYMMReg(rG) );
+ DIP("vmovapd %s,%s\n", nameYMMReg(rG), nameYMMReg(rE));
+ delta += 1;
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ gen_SEGV_if_not_32_aligned( addr );
+ storeLE( mkexpr(addr), getYMMReg(rG) );
+ DIP("vmovapd %s,%s\n", nameYMMReg(rG), dis_buf );
+ delta += alen;
+ }
+ goto decode_success;
+ }
/* VMOVAPS xmm1, xmm2/m128 = VEX.128.0F.WIG 29 /r */
if (haveNo66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
UChar modrm = getUChar(delta);
@@ -20057,23 +20101,24 @@
goto decode_success;
}
}
- /* VMOVAPD xmm1, xmm2/m128 = VEX.128.66.0F.WIG 29 /r */
- if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ /* VMOVAPS ymm1, ymm2/m256 = VEX.256.0F.WIG 29 /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
UChar modrm = getUChar(delta);
UInt rG = gregOfRexRM(pfx,modrm);
if (epartIsReg(modrm)) {
UInt rE = eregOfRexRM(pfx,modrm);
- putYMMRegLoAndZU( rE, getXMMReg(rG) );
- DIP("vmovapd %s,%s\n", nameXMMReg(rG), nameXMMReg(rE));
+ putYMMReg( rE, getYMMReg(rG) );
+ DIP("vmovaps %s,%s\n", nameYMMReg(rG), nameYMMReg(rE));
delta += 1;
+ goto decode_success;
} else {
addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
- gen_SEGV_if_not_16_aligned( addr );
- storeLE( mkexpr(addr), getXMMReg(rG) );
- DIP("vmovapd %s,%s\n", nameXMMReg(rG), dis_buf );
+ gen_SEGV_if_not_32_aligned( addr );
+ storeLE( mkexpr(addr), getYMMReg(rG) );
+ DIP("vmovaps %s,%s\n", nameYMMReg(rG), dis_buf );
delta += alen;
+ goto decode_success;
}
- goto decode_success;
}
break;
@@ -20996,6 +21041,16 @@
}
break;
+ case 0xD4:
+ /* VPADDQ r/m, rV, r ::: r = rV + r/m */
+ /* VPADDQ = VEX.NDS.128.66.0F.WIG D4 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_VEX_NDS_128_AnySimdPfx_0F_WIG_simple(
+ uses_vvvv, vbi, pfx, delta, "vpaddq", Iop_Add64x2 );
+ goto decode_success;
+ }
+ break;
+
case 0xD5:
/* VPMULLW xmm3/m128, xmm2, xmm1 = VEX.NDS.128.66.0F.WIG D5 /r */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
@@ -21131,7 +21186,7 @@
case 0xF8:
/* VPSUBB r/m, rV, r ::: r = rV - r/m */
- /* VPSUBB = VEX.NDS.128.66.0F.WIG EF /r */
+ /* VPSUBB = VEX.NDS.128.66.0F.WIG F8 /r */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
delta = dis_VEX_NDS_128_AnySimdPfx_0F_WIG_simple(
uses_vvvv, vbi, pfx, delta, "vpsubb", Iop_Sub8x16 );
@@ -21139,9 +21194,19 @@
}
break;
+ case 0xF9:
+ /* VPSUBW r/m, rV, r ::: r = rV - r/m */
+ /* VPSUBW = VEX.NDS.128.66.0F.WIG F9 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_VEX_NDS_128_AnySimdPfx_0F_WIG_simple(
+ uses_vvvv, vbi, pfx, delta, "vpsubw", Iop_Sub16x8 );
+ goto decode_success;
+ }
+ break;
+
case 0xFA:
/* VPSUBD r/m, rV, r ::: r = rV - r/m */
- /* VPSUBD = VEX.NDS.128.66.0F.WIG FE /r */
+ /* VPSUBD = VEX.NDS.128.66.0F.WIG FA /r */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
delta = dis_VEX_NDS_128_AnySimdPfx_0F_WIG_simple(
uses_vvvv, vbi, pfx, delta, "vpsubd", Iop_Sub32x4 );
@@ -21149,6 +21214,16 @@
}
break;
+ case 0xFB:
+ /* VPSUBQ r/m, rV, r ::: r = rV - r/m */
+ /* VPSUBQ = VEX.NDS.128.66.0F.WIG FB /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_VEX_NDS_128_AnySimdPfx_0F_WIG_simple(
+ uses_vvvv, vbi, pfx, delta, "vpsubq", Iop_Sub64x2 );
+ goto decode_success;
+ }
+ break;
+
case 0xFD:
/* VPADDW r/m, rV, r ::: r = rV + r/m */
/* VPADDW = VEX.NDS.128.66.0F.WIG FD /r */
@@ -21451,7 +21526,7 @@
imm8_10 = (Int)(getUChar(delta+alen) & 3);
assign( src_u32, loadLE( Ity_I32, mkexpr(addr) ) );
delta += alen+1;
- DIP( "pinsrd $%d,%s,%s,%s\n",
+ DIP( "vpinsrd $%d,%s,%s,%s\n",
imm8_10, dis_buf, nameXMMReg(rV), nameXMMReg(rG) );
}
@@ -21462,6 +21537,38 @@
*uses_vvvv = True;
goto decode_success;
}
+ /* VPINSRQ r64/m64, xmm2, xmm1 = VEX.NDS.128.66.0F3A.W1 22 /r ib */
+ if (have66noF2noF3(pfx)
+ && 0==getVexL(pfx)/*128*/ && 1==getRexW(pfx)/*W1*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ Int imm8_0;
+ IRTemp src_u64 = newTemp(Ity_I64);
+
+ if ( epartIsReg( modrm ) ) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ imm8_0 = (Int)(getUChar(delta+1) & 1);
+ assign( src_u64, getIReg64( rE ) );
+ delta += 1+1;
+ DIP( "vpinsrq $%d,%s,%s,%s\n",
+ imm8_0, nameIReg64(rE), nameXMMReg(rV), nameXMMReg(rG) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ imm8_0 = (Int)(getUChar(delta+alen) & 1);
+ assign( src_u64, loadLE( Ity_I64, mkexpr(addr) ) );
+ delta += alen+1;
+ DIP( "vpinsrd $%d,%s,%s,%s\n",
+ imm8_0, dis_buf, nameXMMReg(rV), nameXMMReg(rG) );
+ }
+
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg( rV ));
+ IRTemp res_vec = math_PINSRQ_128( src_vec, src_u64, imm8_0 );
+ putYMMRegLoAndZU( rG, mkexpr(res_vec) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
break;
case 0x4C:
|
|
From: Philippe W. <phi...@sk...> - 2012-06-02 07:39:39
|
On Sat, 2012-06-02 at 00:03 -0400, Florian Krohm wrote: > >From 40 bytes to 32 bytes on LP64. From 20 to 16 bytes on ILP32. > Same procedure as in previous patch for Qop. This time putting the Triop > bits into a separate structure IRTriop. > > Here are some numbers showing the memory allocated by VEX in bytes for > amd64/ppc64/s390x. The net is: it's always a win and the savings are > pretty consistent 4-5% across platforms. That is nice. What is the related performance improvement ? (I suppose this will improve more on smaller systems) Philippe |
|
From: Florian K. <br...@ac...> - 2012-06-02 04:04:07
|
>From 40 bytes to 32 bytes on LP64. From 20 to 16 bytes on ILP32. Same procedure as in previous patch for Qop. This time putting the Triop bits into a separate structure IRTriop. Here are some numbers showing the memory allocated by VEX in bytes for amd64/ppc64/s390x. The net is: it's always a win and the savings are pretty consistent 4-5% across platforms. amd64 before after bigcode1 1172040488 1114079872 -5% bigcode2 4428964792 4207718136 bz2 221793528 212074448 -4% fbench 109699680 105168664 -4% ffbench 100487672 96331128 -4% heap 82027160 78687008 -4% heap_pdb4 83288176 79893360 many-loss 88157280 84560800 many-xpts 79706304 76467064 sarp 76674560 73546416 tinycc 248763568 238678808 -4% ppc before after bigcode1 109679144 104873888 -4% bigcode2 109886664 105045848 bz2 276959560 263978936 -4% fbench 136637008 130500232 -4% ffbench 126413128 120634448 -4% heap 104295184 99522984 -4% heap_pdb4 105518000 100948824 many-loss 111422944 106495912 many-xpts 100370888 95973728 sarp 96301576 91938296 tinycc 305117568 292018544 -5% s390x before after bigcode1 878161120 843154104 -4% bigcode2 3256335832 3126573824 bz2 212416744 203591736 -4% fbench 113401536 108842224 -4% ffbench 98848776 94917216 -4% heap 81754568 78484056 -4% heap_pdb4 83213640 79884368 many-loss 88412768 84879128 many-xpts 78987296 75834040 sarp 75336264 72318352 tinycc 261218408 250868952 -4% Florian |
|
From: Philippe W. <phi...@sk...> - 2012-06-02 03:49:39
|
valgrind revision: 12600 VEX revision: 2364 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.3.1-3.fc16.ppc64 ppc64 Vendor version: Fedora release 16 (Verne) Nightly build on gcc110 ( Fedora release 16 (Verne), ppc64 ) Started at 2012-06-01 20:00:16 PDT Ended at 2012-06-01 20:48:34 PDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 524 tests, 15 stderr failures, 8 stdout failures, 1 stderrB failure, 1 stdoutB failure, 2 post failures == gdbserver_tests/mcmain_pic (stdout) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/mcmain_pic (stdoutB) gdbserver_tests/mcmain_pic (stderrB) memcheck/tests/ppc32/power_ISA2_05 (stdout) memcheck/tests/ppc32/power_ISA2_05 (stderr) memcheck/tests/ppc64/power_ISA2_05 (stdout) memcheck/tests/ppc64/power_ISA2_05 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) none/tests/empty-exe (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-vmx (stdout) none/tests/ppc64/jm-fp (stdout) none/tests/ppc64/jm-vmx (stdout) none/tests/shell (stderr) none/tests/shell_valid1 (stderr) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) none/tests/shell_zerolength (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-02 03:11:19
|
valgrind revision: 12600 VEX revision: 2364 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2012-06-02 03:41:39 BST Ended at 2012-06-02 04:11:00 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 600 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Tom H. <to...@co...> - 2012-06-02 02:56:55
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.4.1 20090725 (Red Hat 4.4.1-2) Assembler: GNU assembler version 2.19.51.0.14-3.fc11 20090722 C library: GNU C Library stable release version 2.10.2 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 11 (Leonidas) Nightly build on bristol ( x86_64, Fedora 11 ) Started at 2012-06-02 03:31:03 BST Ended at 2012-06-02 03:56:33 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 602 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/long_namespace_xml (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Rich C. <rc...@wi...> - 2012-06-02 02:54:47
|
valgrind revision: 12599
VEX revision: 2364
C compiler: gcc (SUSE Linux) 4.5.1 20101208 [gcc-4_5-branch revision 167585]
Assembler: GNU assembler (GNU Binutils; openSUSE 11.4) 2.21
C library: GNU C Library stable release version 2.11.3 (20110203)
uname -mrs: Linux 2.6.37.6-0.7-desktop x86_64
Vendor version: Welcome to openSUSE 11.4 "Celadon" - Kernel %r (%t).
Nightly build on ultra ( gcc 4.5.1 Linux 2.6.37.6-0.7-desktop x86_64 )
Started at 2012-06-01 21:30:01 CDT
Ended at 2012-06-01 21:54:37 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 610 tests, 1 stderr failure, 0 stdout failures, 6 stderrB failures, 0 stdoutB failures, 0 post failures ==
gdbserver_tests/mcbreak (stderrB)
gdbserver_tests/mcclean_after_fork (stderrB)
gdbserver_tests/mcleak (stderrB)
gdbserver_tests/mcmain_pic (stderrB)
gdbserver_tests/mcvabits (stderrB)
gdbserver_tests/mssnapshot (stderrB)
memcheck/tests/origin5-bz2 (stderr)
=================================================
./valgrind-new/gdbserver_tests/mcbreak.stderrB.diff
=================================================
--- mcbreak.stderrB.exp 2012-06-01 21:42:36.724643551 -0500
+++ mcbreak.stderrB.out 2012-06-01 21:45:57.865504589 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
vgdb-error value changed from 999999 to 0
n_errs_found 1 n_errs_shown 1 (vgdb-error 0)
vgdb-error value changed from 0 to 0
=================================================
./valgrind-new/gdbserver_tests/mcclean_after_fork.stderrB.diff
=================================================
--- mcclean_after_fork.stderrB.exp 2012-06-01 21:42:36.724643551 -0500
+++ mcclean_after_fork.stderrB.out 2012-06-01 21:45:59.544261388 -0500
@@ -1,4 +1,6 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
monitor command request to kill this process
Remote connection closed
=================================================
./valgrind-new/gdbserver_tests/mcleak.stderrB.diff
=================================================
--- mcleak.stderrB.exp 2012-06-01 21:42:36.721643986 -0500
+++ mcleak.stderrB.out 2012-06-01 21:46:17.858608188 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
10 bytes in 1 blocks are still reachable in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: f (leak-delta.c:14)
=================================================
./valgrind-new/gdbserver_tests/mcmain_pic.stderrB.diff
=================================================
--- mcmain_pic.stderrB.exp 2012-06-01 21:42:36.727643116 -0500
+++ mcmain_pic.stderrB.out 2012-06-01 21:46:19.429380630 -0500
@@ -1,3 +1,5 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Remote connection closed
=================================================
./valgrind-new/gdbserver_tests/mcvabits.stderrB.diff
=================================================
--- mcvabits.stderrB.exp 2012-06-01 21:42:36.728642971 -0500
+++ mcvabits.stderrB.out 2012-06-01 21:46:24.319672171 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Address 0x........ len 10 addressable
Address 0x........ is 0 bytes inside data symbol "undefined"
Address 0x........ len 10 defined
=================================================
./valgrind-new/gdbserver_tests/mssnapshot.stderrB.diff
=================================================
--- mssnapshot.stderrB.exp 2012-06-01 21:42:36.727643116 -0500
+++ mssnapshot.stderrB.out 2012-06-01 21:46:27.456217778 -0500
@@ -1,5 +1,9 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=92ec8fe859846a62345f74696ab349721415587a"
general valgrind monitor commands:
help [debug] : monitor command help. With debug: + debugging commands
v.wait [<ms>] : sleep <ms> (default 0) then continue
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc212-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc212-s390x 2012-06-01 21:42:41.130005358 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:47:48.878422067 -0500
@@ -75,17 +75,6 @@
at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
- at 0x........: mainSort (origin5-bz2.c:2859)
- by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
- by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
- by 0x........: handle_compress (origin5-bz2.c:4753)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -131,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc234-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc234-s390x 2012-06-01 21:42:41.114007676 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:47:48.878422067 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc25-amd64
=================================================
--- origin5-bz2.stderr.exp-glibc25-amd64 2012-06-01 21:42:41.059015643 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:47:48.878422067 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc25-x86
=================================================
--- origin5-bz2.stderr.exp-glibc25-x86 2012-06-01 21:42:41.087011586 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:47:48.878422067 -0500
@@ -12,7 +12,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -21,7 +21,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -30,7 +30,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -41,7 +41,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -52,7 +52,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -63,7 +63,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -74,7 +74,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -85,7 +85,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -96,7 +96,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -107,7 +107,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2275)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
<truncated beyond 100 lines>
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc27-ppc64
=================================================
--- origin5-bz2.stderr.exp-glibc27-ppc64 2012-06-01 21:42:41.100009704 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:47:48.878422067 -0500
@@ -1,7 +1,7 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6481)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Conditional jump or move depends on uninitialised value(s)
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -10,7 +10,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -19,7 +19,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -28,7 +28,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
@@ -39,7 +39,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
@@ -50,7 +50,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
@@ -61,7 +61,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
@@ -72,7 +72,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
@@ -83,7 +83,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
@@ -94,7 +94,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
@@ -105,7 +105,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
<truncated beyond 100 lines>
=================================================
./valgrind-old/gdbserver_tests/mcbreak.stderrB.diff
=================================================
--- mcbreak.stderrB.exp 2012-06-01 21:30:16.036986612 -0500
+++ mcbreak.stderrB.out 2012-06-01 21:33:52.397616103 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
vgdb-error value changed from 999999 to 0
n_errs_found 1 n_errs_shown 1 (vgdb-error 0)
vgdb-error value changed from 0 to 0
=================================================
./valgrind-old/gdbserver_tests/mcclean_after_fork.stderrB.diff
=================================================
--- mcclean_after_fork.stderrB.exp 2012-06-01 21:30:16.036986612 -0500
+++ mcclean_after_fork.stderrB.out 2012-06-01 21:33:54.076372698 -0500
@@ -1,4 +1,6 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
monitor command request to kill this process
Remote connection closed
=================================================
./valgrind-old/gdbserver_tests/mcleak.stderrB.diff
=================================================
--- mcleak.stderrB.exp 2012-06-01 21:30:16.032987192 -0500
+++ mcleak.stderrB.out 2012-06-01 21:34:14.080472282 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
10 bytes in 1 blocks are still reachable in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: f (leak-delta.c:14)
=================================================
./valgrind-old/gdbserver_tests/mcmain_pic.stderrB.diff
=================================================
--- mcmain_pic.stderrB.exp 2012-06-01 21:30:16.039986177 -0500
+++ mcmain_pic.stderrB.out 2012-06-01 21:34:15.648244969 -0500
@@ -1,3 +1,5 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Remote connection closed
=================================================
./valgrind-old/gdbserver_tests/mcvabits.stderrB.diff
=================================================
--- mcvabits.stderrB.exp 2012-06-01 21:30:16.040986032 -0500
+++ mcvabits.stderrB.out 2012-06-01 21:34:20.527537517 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Address 0x........ len 10 addressable
Address 0x........ is 0 bytes inside data symbol "undefined"
Address 0x........ len 10 defined
=================================================
./valgrind-old/gdbserver_tests/mssnapshot.stderrB.diff
=================================================
--- mssnapshot.stderrB.exp 2012-06-01 21:30:16.039986177 -0500
+++ mssnapshot.stderrB.out 2012-06-01 21:34:23.665082601 -0500
@@ -1,5 +1,9 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=92ec8fe859846a62345f74696ab349721415587a"
general valgrind monitor commands:
help [debug] : monitor command help. With debug: + debugging commands
v.wait [<ms>] : sleep <ms> (default 0) then continue
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc212-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc212-s390x 2012-06-01 21:31:05.201858085 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:35:43.092566356 -0500
@@ -75,17 +75,6 @@
at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
- at 0x........: mainSort (origin5-bz2.c:2859)
- by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
- by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
- by 0x........: handle_compress (origin5-bz2.c:4753)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -131,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc234-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc234-s390x 2012-06-01 21:31:05.184860550 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:35:43.092566356 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc25-amd64
=================================================
--- origin5-bz2.stderr.exp-glibc25-amd64 2012-06-01 21:31:05.129868523 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:35:43.092566356 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc25-x86
=================================================
--- origin5-bz2.stderr.exp-glibc25-x86 2012-06-01 21:31:05.158864318 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:35:43.092566356 -0500
@@ -12,7 +12,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -21,7 +21,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -30,7 +30,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -41,7 +41,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -52,7 +52,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -63,7 +63,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -74,7 +74,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -85,7 +85,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -96,7 +96,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -107,7 +107,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2275)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
<truncated beyond 100 lines>
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc27-ppc64
=================================================
--- origin5-bz2.stderr.exp-glibc27-ppc64 2012-06-01 21:31:05.171862435 -0500
+++ origin5-bz2.stderr.out 2012-06-01 21:35:43.092566356 -0500
@@ -1,7 +1,7 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6481)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Conditional jump or move depends on uninitialised value(s)
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -10,7 +10,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -19,7 +19,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -28,7 +28,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
@@ -39,7 +39,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
@@ -50,7 +50,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
@@ -61,7 +61,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
@@ -72,7 +72,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
@@ -83,7 +83,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
@@ -94,7 +94,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
@@ -105,7 +105,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
<truncated beyond 100 lines>
|
|
From: <br...@ac...> - 2012-06-02 02:52:23
|
valgrind revision: 12599
VEX revision: 2364
C compiler: gcc (GCC) 3.4.6 20060404 (Red Hat 3.4.6-3)
Assembler: GNU assembler 2.15.92.0.2 20040927
C library: GNU C Library stable release version 2.3.4
uname -mrs: Linux 2.6.9-42.EL s390x
Vendor version: Red Hat Enterprise Linux AS release 4 (Nahant Update 4)
Nightly build on z10-ec ( s390x build on z10-EC )
Started at 2012-06-01 22:20:07 EDT
Ended at 2012-06-01 22:52:11 EDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 504 tests, 8 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/manuel3 (stderr)
memcheck/tests/partial_load_ok (stderr)
memcheck/tests/varinfo6 (stderr)
helgrind/tests/tc09_bad_unlock (stderr)
helgrind/tests/tc18_semabuse (stderr)
helgrind/tests/tc20_verifywrap (stderr)
drd/tests/tc04_free_lock (stderr)
drd/tests/tc09_bad_unlock (stderr)
=================================================
./valgrind-new/drd/tests/tc04_free_lock.stderr.diff-ppc
=================================================
--- tc04_free_lock.stderr.exp-ppc 2012-06-01 22:37:15.000000000 -0400
+++ tc04_free_lock.stderr.out 2012-06-01 22:51:29.000000000 -0400
@@ -7,28 +7,22 @@
by 0x........: main (tc04_free_lock.c:20)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:26)
+ at 0x........: bar (tc04_free_lock.c:40)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
by 0x........: bar (tc04_free_lock.c:38)
by 0x........: main (tc04_free_lock.c:26)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: foo (tc04_free_lock.c:47)
- by 0x........: main (tc04_free_lock.c:27)
+ at 0x........: foo (tc04_free_lock.c:49)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: foo (tc04_free_lock.c:46)
by 0x........: main (tc04_free_lock.c:27)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
- by 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-
-ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 3 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/drd/tests/tc04_free_lock.stderr.diff-x86
=================================================
--- tc04_free_lock.stderr.exp-x86 2012-06-01 22:37:15.000000000 -0400
+++ tc04_free_lock.stderr.out 2012-06-01 22:51:29.000000000 -0400
@@ -8,7 +8,8 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: bar (tc04_free_lock.c:40)
- by 0x........: main (tc04_free_lock.c:26)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
by 0x........: bar (tc04_free_lock.c:38)
@@ -16,19 +17,12 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: foo (tc04_free_lock.c:49)
- by 0x........: main (tc04_free_lock.c:27)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: foo (tc04_free_lock.c:46)
by 0x........: main (tc04_free_lock.c:27)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:40)
- by 0x........: main (tc04_free_lock.c:28)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
- by 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-
-ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 3 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/drd/tests/tc09_bad_unlock.stderr.diff-glibc2.8
=================================================
--- tc09_bad_unlock.stderr.exp-glibc2.8 2012-06-01 22:37:15.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:51:32.000000000 -0400
@@ -26,7 +26,7 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: (below main)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: (below main)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/drd/tests/tc09_bad_unlock.stderr.diff-ppc
=================================================
--- tc09_bad_unlock.stderr.exp-ppc 2012-06-01 22:37:14.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:51:32.000000000 -0400
@@ -25,8 +25,8 @@
by 0x........: main (tc09_bad_unlock.c:49)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
+ at 0x........: nearly_main (tc09_bad_unlock.c:45)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/drd/tests/tc09_bad_unlock.stderr.diff-x86
=================================================
--- tc09_bad_unlock.stderr.exp-x86 2012-06-01 22:37:14.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:51:32.000000000 -0400
@@ -26,7 +26,7 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: main (tc09_bad_unlock.c:49)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: main (tc09_bad_unlock.c:50)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/helgrind/tests/tc09_bad_unlock.stderr.diff
=================================================
--- tc09_bad_unlock.stderr.exp 2012-06-01 22:36:31.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:47:46.000000000 -0400
@@ -42,14 +42,6 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:49)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
-
---------------------
----------------------------------------------------------------
@@ -110,16 +102,8 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-----------------------------------------------------------------
-
Thread #x: Exiting thread still holds 1 lock
...
-ERROR SUMMARY: 11 errors from 11 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 9 errors from 9 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/helgrind/tests/tc18_semabuse.stderr.diff
=================================================
--- tc18_semabuse.stderr.exp 2012-06-01 22:36:31.000000000 -0400
+++ tc18_semabuse.stderr.out 2012-06-01 22:47:54.000000000 -0400
@@ -18,13 +18,5 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc18_semabuse.c:34)
-----------------------------------------------------------------
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc18_semabuse.c:37)
-
-
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 2 errors from 2 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/helgrind/tests/tc20_verifywrap.stderr.diff
=================================================
--- tc20_verifywrap.stderr.exp 2012-06-01 22:36:31.000000000 -0400
+++ tc20_verifywrap.stderr.out 2012-06-01 22:48:04.000000000 -0400
@@ -1,7 +1,7 @@
------- This is output for >= glibc 2.4 ------
+------ This is output for < glibc 2.4 ------
---------------- pthread_create/join ----------------
@@ -45,13 +45,6 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_init failed
- with error code 95 (EOPNOTSUPP: Operation not supported on transport endpoint)
- at 0x........: pthread_mutex_init (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:92)
-
-----------------------------------------------------------------
-
Thread #x: pthread_mutex_destroy of a locked mutex
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
@@ -63,26 +56,8 @@
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_lock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_lock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:108)
-
-----------------------------------------------------------------
-Thread #x's call to pthread_mutex_trylock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_trylock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:116)
-
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_timedlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_timedlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:121)
+make pthread_mutex_lock fail: skipped on glibc < 2.4
----------------------------------------------------------------
@@ -90,13 +65,6 @@
at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:125)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:125)
-
---------------- pthread_cond_wait et al ----------------
@@ -215,14 +183,6 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:242)
-----------------------------------------------------------------
-
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:245)
-
FIXME: can't figure out how to verify wrap of sem_post
@@ -235,4 +195,4 @@
...
-ERROR SUMMARY: 23 errors from 23 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 17 errors from 17 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/memcheck/tests/manuel3.stderr.diff
=================================================
--- manuel3.stderr.exp 2012-06-01 22:36:39.000000000 -0400
+++ manuel3.stderr.out 2012-06-01 22:42:50.000000000 -0400
@@ -1,4 +1,3 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: gcc_cant_inline_me (manuel3.c:22)
- by 0x........: main (manuel3.c:14)
+ at 0x........: main (manuel3.c:12)
=================================================
./valgrind-new/memcheck/tests/partial_load_ok.stderr.diff
=================================================
--- partial_load_ok.stderr.exp 2012-06-01 22:36:39.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-01 22:43:21.000000000 -0400
@@ -1,7 +1,13 @@
-Invalid read of size 4
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
+Invalid read of size 8
at 0x........: main (partial_load.c:23)
- Address 0x........ is 1 bytes inside a block of size 4 alloc'd
+ Address 0x........ is 1 bytes inside a block of size 8 alloc'd
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:20)
@@ -11,9 +17,9 @@
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:28)
-Invalid read of size 4
+Invalid read of size 8
at 0x........: main (partial_load.c:37)
- Address 0x........ is 0 bytes inside a block of size 4 free'd
+ Address 0x........ is 0 bytes inside a block of size 8 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:36)
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/memcheck/tests/partial_load_ok.stderr.diff64
=================================================
--- partial_load_ok.stderr.exp64 2012-06-01 22:36:39.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-01 22:43:21.000000000 -0400
@@ -1,4 +1,10 @@
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
Invalid read of size 8
at 0x........: main (partial_load.c:23)
Address 0x........ is 1 bytes inside a block of size 8 alloc'd
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/memcheck/tests/varinfo6.stderr.diff
=================================================
--- varinfo6.stderr.exp 2012-06-01 22:36:39.000000000 -0400
+++ varinfo6.stderr.out 2012-06-01 22:44:17.000000000 -0400
@@ -7,8 +7,7 @@
by 0x........: BZ2_bzCompress (varinfo6.c:4860)
by 0x........: BZ2_bzBuffToBuffCompress (varinfo6.c:5667)
by 0x........: main (varinfo6.c:6517)
- Location 0x........ is 2 bytes inside local var "budget"
- declared at varinfo6.c:3115, in frame #2 of thread 1
+ Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
at 0x........: croak (varinfo6.c:34)
=================================================
./valgrind-new/memcheck/tests/varinfo6.stderr.diff-ppc64
=================================================
--- varinfo6.stderr.exp-ppc64 2012-06-01 22:36:39.000000000 -0400
+++ varinfo6.stderr.out 2012-06-01 22:44:17.000000000 -0400
@@ -1,5 +1,5 @@
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: mainSort (varinfo6.c:2999)
by 0x........: BZ2_blockSort (varinfo6.c:3143)
by 0x........: BZ2_compressBlock (varinfo6.c:4072)
@@ -10,7 +10,7 @@
Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: BZ2_decompress (varinfo6.c:1699)
by 0x........: BZ2_bzDecompress (varinfo6.c:5230)
by 0x........: BZ2_bzBuffToBuffDecompress (varinfo6.c:5715)
=================================================
./valgrind-old/drd/tests/tc04_free_lock.stderr.diff-ppc
=================================================
--- tc04_free_lock.stderr.exp-ppc 2012-06-01 22:21:23.000000000 -0400
+++ tc04_free_lock.stderr.out 2012-06-01 22:35:40.000000000 -0400
@@ -7,28 +7,22 @@
by 0x........: main (tc04_free_lock.c:20)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:26)
+ at 0x........: bar (tc04_free_lock.c:40)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
by 0x........: bar (tc04_free_lock.c:38)
by 0x........: main (tc04_free_lock.c:26)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: foo (tc04_free_lock.c:47)
- by 0x........: main (tc04_free_lock.c:27)
+ at 0x........: foo (tc04_free_lock.c:49)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: foo (tc04_free_lock.c:46)
by 0x........: main (tc04_free_lock.c:27)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
- by 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-
-ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 3 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc04_free_lock.stderr.diff-x86
=================================================
--- tc04_free_lock.stderr.exp-x86 2012-06-01 22:21:23.000000000 -0400
+++ tc04_free_lock.stderr.out 2012-06-01 22:35:40.000000000 -0400
@@ -8,7 +8,8 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: bar (tc04_free_lock.c:40)
- by 0x........: main (tc04_free_lock.c:26)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
by 0x........: bar (tc04_free_lock.c:38)
@@ -16,19 +17,12 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: foo (tc04_free_lock.c:49)
- by 0x........: main (tc04_free_lock.c:27)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: foo (tc04_free_lock.c:46)
by 0x........: main (tc04_free_lock.c:27)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:40)
- by 0x........: main (tc04_free_lock.c:28)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
- by 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-
-ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 3 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc09_bad_unlock.stderr.diff-glibc2.8
=================================================
--- tc09_bad_unlock.stderr.exp-glibc2.8 2012-06-01 22:21:23.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:35:44.000000000 -0400
@@ -26,7 +26,7 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: (below main)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: (below main)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc09_bad_unlock.stderr.diff-ppc
=================================================
--- tc09_bad_unlock.stderr.exp-ppc 2012-06-01 22:21:23.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:35:44.000000000 -0400
@@ -25,8 +25,8 @@
by 0x........: main (tc09_bad_unlock.c:49)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
+ at 0x........: nearly_main (tc09_bad_unlock.c:45)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc09_bad_unlock.stderr.diff-x86
=================================================
--- tc09_bad_unlock.stderr.exp-x86 2012-06-01 22:21:23.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:35:44.000000000 -0400
@@ -26,7 +26,7 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: main (tc09_bad_unlock.c:49)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: main (tc09_bad_unlock.c:50)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/helgrind/tests/tc09_bad_unlock.stderr.diff
=================================================
--- tc09_bad_unlock.stderr.exp 2012-06-01 22:20:33.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-01 22:31:59.000000000 -0400
@@ -42,14 +42,6 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:49)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
-
---------------------
----------------------------------------------------------------
@@ -110,16 +102,8 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-----------------------------------------------------------------
-
Thread #x: Exiting thread still holds 1 lock
...
-ERROR SUMMARY: 11 errors from 11 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 9 errors from 9 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/helgrind/tests/tc18_semabuse.stderr.diff
=================================================
--- tc18_semabuse.stderr.exp 2012-06-01 22:20:33.000000000 -0400
+++ tc18_semabuse.stderr.out 2012-06-01 22:32:06.000000000 -0400
@@ -18,13 +18,5 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc18_semabuse.c:34)
-----------------------------------------------------------------
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc18_semabuse.c:37)
-
-
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 2 errors from 2 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/helgrind/tests/tc20_verifywrap.stderr.diff
=================================================
--- tc20_verifywrap.stderr.exp 2012-06-01 22:20:33.000000000 -0400
+++ tc20_verifywrap.stderr.out 2012-06-01 22:32:16.000000000 -0400
@@ -1,7 +1,7 @@
------- This is output for >= glibc 2.4 ------
+------ This is output for < glibc 2.4 ------
---------------- pthread_create/join ----------------
@@ -45,13 +45,6 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_init failed
- with error code 95 (EOPNOTSUPP: Operation not supported on transport endpoint)
- at 0x........: pthread_mutex_init (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:92)
-
-----------------------------------------------------------------
-
Thread #x: pthread_mutex_destroy of a locked mutex
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
@@ -63,26 +56,8 @@
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_lock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_lock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:108)
-
-----------------------------------------------------------------
-Thread #x's call to pthread_mutex_trylock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_trylock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:116)
-
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_timedlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_timedlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:121)
+make pthread_mutex_lock fail: skipped on glibc < 2.4
----------------------------------------------------------------
@@ -90,13 +65,6 @@
at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:125)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:125)
-
---------------- pthread_cond_wait et al ----------------
@@ -215,14 +183,6 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:242)
-----------------------------------------------------------------
-
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:245)
-
FIXME: can't figure out how to verify wrap of sem_post
@@ -235,4 +195,4 @@
...
-ERROR SUMMARY: 23 errors from 23 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 17 errors from 17 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/memcheck/tests/manuel3.stderr.diff
=================================================
--- manuel3.stderr.exp 2012-06-01 22:20:40.000000000 -0400
+++ manuel3.stderr.out 2012-06-01 22:27:03.000000000 -0400
@@ -1,4 +1,3 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: gcc_cant_inline_me (manuel3.c:22)
- by 0x........: main (manuel3.c:14)
+ at 0x........: main (manuel3.c:12)
=================================================
./valgrind-old/memcheck/tests/partial_load_ok.stderr.diff
=================================================
--- partial_load_ok.stderr.exp 2012-06-01 22:20:40.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-01 22:27:33.000000000 -0400
@@ -1,7 +1,13 @@
-Invalid read of size 4
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
+Invalid read of size 8
at 0x........: main (partial_load.c:23)
- Address 0x........ is 1 bytes inside a block of size 4 alloc'd
+ Address 0x........ is 1 bytes inside a block of size 8 alloc'd
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:20)
@@ -11,9 +17,9 @@
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:28)
-Invalid read of size 4
+Invalid read of size 8
at 0x........: main (partial_load.c:37)
- Address 0x........ is 0 bytes inside a block of size 4 free'd
+ Address 0x........ is 0 bytes inside a block of size 8 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:36)
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/memcheck/tests/partial_load_ok.stderr.diff64
=================================================
--- partial_load_ok.stderr.exp64 2012-06-01 22:20:40.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-01 22:27:33.000000000 -0400
@@ -1,4 +1,10 @@
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
Invalid read of size 8
at 0x........: main (partial_load.c:23)
Address 0x........ is 1 bytes inside a block of size 8 alloc'd
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/memcheck/tests/varinfo6.stderr.diff
=================================================
--- varinfo6.stderr.exp 2012-06-01 22:20:40.000000000 -0400
+++ varinfo6.stderr.out 2012-06-01 22:28:29.000000000 -0400
@@ -7,8 +7,7 @@
by 0x........: BZ2_bzCompress (varinfo6.c:4860)
by 0x........: BZ2_bzBuffToBuffCompress (varinfo6.c:5667)
by 0x........: main (varinfo6.c:6517)
- Location 0x........ is 2 bytes inside local var "budget"
- declared at varinfo6.c:3115, in frame #2 of thread 1
+ Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
at 0x........: croak (varinfo6.c:34)
=================================================
./valgrind-old/memcheck/tests/varinfo6.stderr.diff-ppc64
=================================================
--- varinfo6.stderr.exp-ppc64 2012-06-01 22:20:40.000000000 -0400
+++ varinfo6.stderr.out 2012-06-01 22:28:29.000000000 -0400
@@ -1,5 +1,5 @@
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: mainSort (varinfo6.c:2999)
by 0x........: BZ2_blockSort (varinfo6.c:3143)
by 0x........: BZ2_compressBlock (varinfo6.c:4072)
@@ -10,7 +10,7 @@
Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: BZ2_decompress (varinfo6.c:1699)
by 0x........: BZ2_bzDecompress (varinfo6.c:5230)
by 0x........: BZ2_bzBuffToBuffDecompress (varinfo6.c:5715)
|
|
From: Tom H. <to...@co...> - 2012-06-02 02:50:05
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.4.5 20101112 (Red Hat 4.4.5-2) Assembler: GNU assembler version 2.20.51.0.2-20.fc13 20091009 C library: GNU C Library stable release version 2.12.2 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 13 (Goddard) Nightly build on bristol ( x86_64, Fedora 13 ) Started at 2012-06-02 03:22:11 BST Ended at 2012-06-02 03:49:49 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 602 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) helgrind/tests/pth_barrier3 (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-02 02:45:34
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.5.1 20100924 (Red Hat 4.5.1-4) Assembler: GNU assembler version 2.20.51.0.7-8.fc14 20100318 C library: GNU C Library stable release version 2.13 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 14 (Laughlin) Nightly build on bristol ( x86_64, Fedora 14 ) Started at 2012-06-02 03:11:40 BST Ended at 2012-06-02 03:45:09 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 617 tests, 2 stderr failures, 0 stdout failures, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) |
|
From: <sv...@va...> - 2012-06-02 02:41:20
|
florian 2012-06-02 03:39:54 +0100 (Sat, 02 Jun 2012)
New Revision: 12600
Log:
Update ignored files.
Modified directories:
trunk/memcheck/tests/
Modified: trunk/memcheck/tests/
Property changed: trunk/memcheck/tests (+0 -0)
___________________________________________________________________
Name: svn:ignore
- *.dSYM
*.stderr.diff*
*.stderr.out
*.stdout.diff*
*.stdout.out
.deps
accounting
addressable
atomic_incs
badaddrvalue
badfree
badjump
badjump2
badloop
badpoll
badrw
big_blocks_freed_list
brk
brk2
buflen_check
bug287260
calloc-overflow
clientperm
clientstackperm
custom-overlap
custom_alloc
deep_templates
describe-block
dir
doublefree
erringfds
error_counts
errs1
err_disable1
err_disable2
err_disable3
err_disable4
execve1
execve2
exitprog
file_locking
filter_leak_check_size
filter_stderr
fprw
fwrite
hello
holey_buffer_too_small
inits
inline
leak-0
leak-cases
leak-cycle
leak-delta
leak-pool
leak-regroot
leak-tree
leakotron
linux-capget
linux-syscalls-2007
linux-syslog-syscall
linux-timerfd-syscall
long-supps
long_namespace_xml
lsframe1
lsframe2
Makefile
Makefile.in
mallinfo
malloc1
malloc2
malloc3
malloc_free_fill
malloc_usable
manuel1
manuel2
manuel3
match-overrun
memalign2
memalign_test
memcmptest
mempool
mempool2
metadata
mismatches
mmaptest
nanoleak
nanoleak2
nanoleak_supp
new_nothrow
new_override
noisy_child
null_socket
origin1-yes
origin2-not-quite
origin3-no
origin4-many
origin5-bz2
origin6-fp
oset_test
overlap
partiallydefinedeq
partial_load
pdb-realloc
pdb-realloc2
pipe
pointer-trace
post-syscall
realloc1
realloc2
realloc3
sbfragment
scalar
scalar_exit_group
scalar_fork
scalar_supp
scalar_vfork
sh-mem
sh-mem-random
sigaltstack
sigkill
signal2
sigprocmask
stack_changes
stack_switch
strchr
str_tester
supp1
supp2
suppfree
supp_unknown
test-plo
threadederrno
trivialleak
unit_libcbase
unit_oset
varinfo1
varinfo2
varinfo3
varinfo4
varinfo5
varinfo5so.so
varinfo6
vcpu_bz2
vcpu_fbench
vcpu_fnfns
vgtest_ume
weirdioctl
with space
wrap1
wrap2
wrap3
wrap4
wrap5
wrap6
wrap7
wrap7so.so
wrap8
writev1
xml1
zeropage
+ *.dSYM
*.stderr.diff*
*.stderr.out
*.stdout.diff*
*.stdout.out
.deps
accounting
addressable
atomic_incs
badaddrvalue
badfree
badjump
badjump2
badloop
badpoll
badrw
big_blocks_freed_list
brk
brk2
buflen_check
bug287260
calloc-overflow
clientperm
clientstackperm
clireq_nofill
custom-overlap
custom_alloc
deep_templates
describe-block
dir
doublefree
dw4
erringfds
error_counts
errs1
err_disable1
err_disable2
err_disable3
err_disable4
execve1
execve2
exitprog
file_locking
filter_leak_check_size
filter_stderr
fprw
fwrite
hello
holey_buffer_too_small
inits
inline
leak-0
leak-cases
leak-cycle
leak-delta
leak-pool
leak-regroot
leak-tree
leakotron
linux-capget
linux-syscalls-2007
linux-syslog-syscall
linux-timerfd-syscall
long-supps
long_namespace_xml
lsframe1
lsframe2
Makefile
Makefile.in
mallinfo
malloc1
malloc2
malloc3
malloc_free_fill
malloc_usable
manuel1
manuel2
manuel3
match-overrun
memalign2
memalign_test
memcmptest
mempool
mempool2
metadata
mismatches
mmaptest
nanoleak
nanoleak2
nanoleak_supp
new_nothrow
new_override
noisy_child
null_socket
origin1-yes
origin2-not-quite
origin3-no
origin4-many
origin5-bz2
origin6-fp
oset_test
overlap
partiallydefinedeq
partial_load
pdb-realloc
pdb-realloc2
pipe
pointer-trace
post-syscall
realloc1
realloc2
realloc3
sbfragment
scalar
scalar_exit_group
scalar_fork
scalar_supp
scalar_vfork
sh-mem
sh-mem-random
sigaltstack
sigkill
signal2
sigprocmask
stack_changes
stack_switch
static_malloc
strchr
str_tester
supp1
supp2
suppfree
supp_unknown
test-plo
threadederrno
trivialleak
unit_libcbase
unit_oset
varinfo1
varinfo2
varinfo3
varinfo4
varinfo5
varinfo5so.so
varinfo6
vcpu_bz2
vcpu_fbench
vcpu_fnfns
vgtest_ume
weirdioctl
with space
wrap1
wrap2
wrap3
wrap4
wrap5
wrap6
wrap7
wrap7so.so
wrap8
writev1
xml1
zeropage
|
|
From: Tom H. <to...@co...> - 2012-06-02 02:34:57
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2012-06-02 03:03:02 BST Ended at 2012-06-02 03:34:17 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 3 stderr failures, 0 stdout failures, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-02 02:27:59
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2012-06-02 02:52:01 BST Ended at 2012-06-02 03:27:43 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 4 stderr failures, 0 stdout failures, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) memcheck/tests/str_tester (stderr) |
|
From: Christian B. <bor...@de...> - 2012-06-02 02:12:06
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.20.0.20100122-0.7.9 C library: GNU C Library stable release version 2.11.1 (20100118) uname -mrs: Linux 2.6.32.54-0.3-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP1 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP1 gcc 4.3.4 on z196 (s390x) ) Started at 2012-06-02 03:45:01 CEST Ended at 2012-06-02 04:11:54 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 540 tests, 4 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-02 02:11:04
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.7.0 20120507 (Red Hat 4.7.0-5) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2012-06-02 02:41:13 BST Ended at 2012-06-02 03:10:36 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 10 stderr failures, 1 stdout failure, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) memcheck/tests/str_tester (stderr) drd/tests/bar_bad (stderr) drd/tests/bar_bad_xml (stderr) drd/tests/pth_cancel_locked (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) |
|
From: Christian B. <bor...@de...> - 2012-06-02 02:04:11
|
valgrind revision: 12599 VEX revision: 2364 C compiler: gcc (GCC) 4.5.3 20110121 (Red Hat 4.5.3-5) Assembler: GNU assembler version 2.20.51.0.7-4bb6.fc13 20100318 C library: GNU C Library stable release version 2.12.1 uname -mrs: Linux 3.3.4-53.x.20120504-s390xperformance s390x Vendor version: unknown Nightly build on fedora390 ( Fedora 13/14/15 mix with gcc 3.5.3 on z196 (s390x) ) Started at 2012-06-02 03:45:01 CEST Ended at 2012-06-02 04:04:01 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 539 tests, 8 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == gdbserver_tests/mcinvokeWS (stdoutB) gdbserver_tests/mcinvokeWS (stderrB) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) drd/tests/circular_buffer (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) drd/tests/tc21_pthonce (stderr) |