You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
(26) |
2
(24) |
|
3
(21) |
4
(23) |
5
(19) |
6
(24) |
7
(27) |
8
(28) |
9
(18) |
|
10
(15) |
11
(14) |
12
(17) |
13
(18) |
14
(24) |
15
(27) |
16
(17) |
|
17
(26) |
18
(22) |
19
(27) |
20
(25) |
21
(19) |
22
(22) |
23
(17) |
|
24
(30) |
25
(21) |
26
(14) |
27
(20) |
28
(25) |
29
(23) |
30
(22) |
|
From: <sv...@va...> - 2012-06-18 23:17:56
|
sewardj 2012-06-19 00:17:46 +0100 (Tue, 19 Jun 2012)
New Revision: 12654
Log:
Update.
Modified files:
trunk/none/tests/amd64/avx-1.c
Modified: trunk/none/tests/amd64/avx-1.c (+95 -0)
===================================================================
--- trunk/none/tests/amd64/avx-1.c 2012-06-18 23:10:03 +01:00 (rev 12653)
+++ trunk/none/tests/amd64/avx-1.c 2012-06-19 00:17:46 -23:00 (rev 12654)
@@ -1192,7 +1192,83 @@
"vpblendw $0x29, %%xmm6, %%xmm8, %%xmm7",
"vpblendw $0x92, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VMOVUPS_EtoG_256,
+ "vmovups %%ymm6, %%ymm9",
+ "vmovups (%%rax), %%ymm7")
+GEN_test_RandM(VSQRTSS_128,
+ "vsqrtss %%xmm6, %%xmm8, %%xmm7",
+ "vsqrtss (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VSQRTPS_128,
+ "vsqrtps %%xmm6, %%xmm8",
+ "vsqrtps (%%rax), %%xmm8")
+
+GEN_test_RandM(VSQRTPS_256,
+ "vsqrtps %%ymm6, %%ymm8",
+ "vsqrtps (%%rax), %%ymm8")
+
+GEN_test_RandM(VSQRTPD_128,
+ "vsqrtpd %%xmm6, %%xmm8",
+ "vsqrtpd (%%rax), %%xmm8")
+
+GEN_test_RandM(VSQRTPD_256,
+ "vsqrtpd %%ymm6, %%ymm8",
+ "vsqrtpd (%%rax), %%ymm8")
+
+GEN_test_RandM(VRSQRTSS_128,
+ "vrsqrtss %%xmm6, %%xmm8, %%xmm7",
+ "vrsqrtss (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VRSQRTPS_128,
+ "vrsqrtps %%xmm6, %%xmm8",
+ "vrsqrtps (%%rax), %%xmm8")
+
+GEN_test_RandM(VRSQRTPS_256,
+ "vrsqrtps %%ymm6, %%ymm8",
+ "vrsqrtps (%%rax), %%ymm8")
+
+GEN_test_RandM(VMOVDQU_GtoE_256,
+ "vmovdqu %%ymm9, %%ymm6",
+ "vmovdqu %%ymm7, (%%rax)")
+
+GEN_test_RandM(VCVTPS2PD_256,
+ "vcvtps2pd %%xmm9, %%ymm6",
+ "vcvtps2pd (%%rax), %%ymm7")
+
+GEN_test_RandM(VCVTTPS2DQ_128,
+ "vcvttps2dq %%xmm9, %%xmm6",
+ "vcvttps2dq (%%rax), %%xmm7")
+
+GEN_test_RandM(VCVTTPS2DQ_256,
+ "vcvttps2dq %%ymm9, %%ymm6",
+ "vcvttps2dq (%%rax), %%ymm7")
+
+GEN_test_RandM(VCVTDQ2PS_128,
+ "vcvtdq2ps %%xmm9, %%xmm6",
+ "vcvtdq2ps (%%rax), %%xmm7")
+
+GEN_test_RandM(VCVTDQ2PS_256,
+ "vcvtdq2ps %%ymm9, %%ymm6",
+ "vcvtdq2ps (%%rax), %%ymm7")
+
+GEN_test_RandM(VCVTTPD2DQ_128,
+ "vcvttpd2dqx %%xmm9, %%xmm6",
+ "vcvttpd2dqx (%%rax), %%xmm7")
+
+GEN_test_RandM(VCVTTPD2DQ_256,
+ "vcvttpd2dqy %%ymm9, %%xmm6",
+ "vcvttpd2dqy (%%rax), %%xmm7")
+
+GEN_test_RandM(VCVTPD2DQ_128,
+ "vcvtpd2dqx %%xmm9, %%xmm6",
+ "vcvtpd2dqx (%%rax), %%xmm7")
+
+GEN_test_RandM(VCVTPD2DQ_256,
+ "vcvtpd2dqy %%ymm9, %%xmm6",
+ "vcvtpd2dqy (%%rax), %%xmm7")
+
+
/* Comment duplicated above, for convenient reference:
Allowed operands in test insns:
Reg form: %ymm6, %ymm7, %ymm8, %ymm9 and %r14.
@@ -1493,5 +1569,24 @@
test_VPBLENDW_128_0xB5();
test_VPBLENDW_128_0x85();
test_VPBLENDW_128_0x29();
+ test_VMOVUPS_EtoG_256();
+ test_VSQRTSS_128();
+ test_VSQRTPS_128();
+ test_VSQRTPS_256();
+ test_VSQRTPD_128();
+ test_VSQRTPD_256();
+ test_VRSQRTSS_128();
+ test_VRSQRTPS_128();
+ test_VRSQRTPS_256();
+ test_VMOVDQU_GtoE_256();
+ test_VCVTPS2PD_256();
+ test_VCVTTPS2DQ_128();
+ test_VCVTTPS2DQ_256();
+ test_VCVTDQ2PS_128();
+ test_VCVTDQ2PS_256();
+ test_VCVTTPD2DQ_128();
+ test_VCVTTPD2DQ_256();
+ test_VCVTPD2DQ_128();
+ test_VCVTPD2DQ_256();
return 0;
}
|
|
From: <sv...@va...> - 2012-06-18 23:15:27
|
sewardj 2012-06-19 00:15:16 +0100 (Tue, 19 Jun 2012)
New Revision: 2390
Log:
More AVX insns:
VMOVUPS ymm2/m256, ymm1 = VEX.256.0F.WIG 10 /r
VSQRTSS xmm3/m64(E), xmm2(V), xmm1(G) = VEX.NDS.LIG.F3.0F.WIG 51 /r
VSQRTPS xmm2/m128(E), xmm1(G) = VEX.NDS.128.0F.WIG 51 /r
VSQRTPS ymm2/m256(E), ymm1(G) = VEX.NDS.256.0F.WIG 51 /r
VSQRTPD xmm2/m128(E), xmm1(G) = VEX.NDS.128.66.0F.WIG 51 /r
VSQRTPD ymm2/m256(E), ymm1(G) = VEX.NDS.256.66.0F.WIG 51 /r
VRSQRTSS xmm3/m64(E), xmm2(V), xmm1(G) = VEX.NDS.LIG.F3.0F.WIG 52 /r
VRSQRTPS xmm2/m128(E), xmm1(G) = VEX.NDS.128.0F.WIG 52 /r
VRSQRTPS ymm2/m256(E), ymm1(G) = VEX.NDS.256.0F.WIG 52 /r
VZEROALL = VEX.256.0F.WIG 77
VMOVDQU ymm1, ymm2/m256 = VEX.256.F3.0F.WIG 7F
VCVTPS2PD xmm2/m128, ymm1 = VEX.256.0F.WIG 5A /r
VCVTPS2DQ ymm2/m256, ymm1 = VEX.256.66.0F.WIG 5B /r
VCVTTPS2DQ xmm2/m128, xmm1 = VEX.128.F3.0F.WIG 5B /r
VCVTTPS2DQ ymm2/m256, ymm1 = VEX.256.F3.0F.WIG 5B /r
VCVTDQ2PS xmm2/m128, xmm1 = VEX.128.0F.WIG 5B /r
VCVTDQ2PS ymm2/m256, ymm1 = VEX.256.0F.WIG 5B /r
VCVTTPD2DQ xmm2/m128, xmm1 = VEX.128.66.0F.WIG E6 /r
VCVTTPD2DQ ymm2/m256, xmm1 = VEX.256.66.0F.WIG E6 /r
VCVTPD2DQ xmm2/m128, xmm1 = VEX.128.F2.0F.WIG E6 /r
VCVTPD2DQ ymm2/m256, xmm1 = VEX.256.F2.0F.WIG E6 /r
(Jakub Jelinek, ja...@re...). #273475 comments 115, 116.
Modified files:
trunk/priv/guest_amd64_toIR.c
trunk/priv/host_amd64_isel.c
trunk/priv/ir_defs.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/host_amd64_isel.c (+29 -0)
===================================================================
--- trunk/priv/host_amd64_isel.c 2012-06-18 23:09:33 +01:00 (rev 2389)
+++ trunk/priv/host_amd64_isel.c 2012-06-19 00:15:16 -23:00 (rev 2390)
@@ -3442,6 +3442,35 @@
return;
}
+ case Iop_Sqrt32Fx8: op = Asse_SQRTF; goto do_32Fx8_unary;
+ case Iop_RSqrt32Fx8: op = Asse_RSQRTF; goto do_32Fx8_unary;
+ do_32Fx8_unary:
+ {
+ HReg argHi, argLo;
+ iselDVecExpr(&argHi, &argLo, env, e->Iex.Unop.arg);
+ HReg dstHi = newVRegV(env);
+ HReg dstLo = newVRegV(env);
+ addInstr(env, AMD64Instr_Sse32Fx4(op, argHi, dstHi));
+ addInstr(env, AMD64Instr_Sse32Fx4(op, argLo, dstLo));
+ *rHi = dstHi;
+ *rLo = dstLo;
+ return;
+ }
+
+ case Iop_Sqrt64Fx4: op = Asse_SQRTF; goto do_64Fx4_unary;
+ do_64Fx4_unary:
+ {
+ HReg argHi, argLo;
+ iselDVecExpr(&argHi, &argLo, env, e->Iex.Unop.arg);
+ HReg dstHi = newVRegV(env);
+ HReg dstLo = newVRegV(env);
+ addInstr(env, AMD64Instr_Sse64Fx2(op, argHi, dstHi));
+ addInstr(env, AMD64Instr_Sse64Fx2(op, argLo, dstLo));
+ *rHi = dstHi;
+ *rLo = dstLo;
+ return;
+ }
+
default:
break;
} /* switch (e->Iex.Unop.op) */
Modified: trunk/pub/libvex_ir.h (+3 -0)
===================================================================
--- trunk/pub/libvex_ir.h 2012-06-18 23:09:33 +01:00 (rev 2389)
+++ trunk/pub/libvex_ir.h 2012-06-19 00:15:16 -23:00 (rev 2390)
@@ -1439,6 +1439,9 @@
Iop_OrV256,
Iop_XorV256,
Iop_NotV256,
+ Iop_Sqrt32Fx8,
+ Iop_Sqrt64Fx4,
+ Iop_RSqrt32Fx8,
/* ------------------ 256-bit SIMD FP. ------------------ */
Iop_Add64Fx4,
Modified: trunk/priv/guest_amd64_toIR.c (+614 -95)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2012-06-18 23:09:33 +01:00 (rev 2389)
+++ trunk/priv/guest_amd64_toIR.c 2012-06-19 00:15:16 -23:00 (rev 2390)
@@ -1407,6 +1407,22 @@
return ymmGuestRegOffset( ymmreg ) + 16 * laneno;
}
+static Int ymmGuestRegLane64offset ( UInt ymmreg, Int laneno )
+{
+ /* Correct for little-endian host only. */
+ vassert(!host_is_bigendian);
+ vassert(laneno >= 0 && laneno < 4);
+ return ymmGuestRegOffset( ymmreg ) + 8 * laneno;
+}
+
+static Int ymmGuestRegLane32offset ( UInt ymmreg, Int laneno )
+{
+ /* Correct for little-endian host only. */
+ vassert(!host_is_bigendian);
+ vassert(laneno >= 0 && laneno < 8);
+ return ymmGuestRegOffset( ymmreg ) + 4 * laneno;
+}
+
static IRExpr* getXMMReg ( UInt xmmreg )
{
return IRExpr_Get( xmmGuestRegOffset(xmmreg), Ity_V128 );
@@ -1489,6 +1505,24 @@
stmt( IRStmt_Put( ymmGuestRegLane128offset(ymmreg,laneno), e ) );
}
+static void putYMMRegLane64F ( UInt ymmreg, Int laneno, IRExpr* e )
+{
+ vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_F64);
+ stmt( IRStmt_Put( ymmGuestRegLane64offset(ymmreg,laneno), e ) );
+}
+
+static void putYMMRegLane32F ( UInt ymmreg, Int laneno, IRExpr* e )
+{
+ vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_F32);
+ stmt( IRStmt_Put( ymmGuestRegLane32offset(ymmreg,laneno), e ) );
+}
+
+static void putYMMRegLane32 ( UInt ymmreg, Int laneno, IRExpr* e )
+{
+ vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I32);
+ stmt( IRStmt_Put( ymmGuestRegLane32offset(ymmreg,laneno), e ) );
+}
+
static IRExpr* mkV128 ( UShort mask )
{
return IRExpr_Const(IRConst_V128(mask));
@@ -9682,8 +9716,8 @@
}
-static Long dis_CVTPS2PD ( VexAbiInfo* vbi, Prefix pfx,
- Long delta, Bool isAvx )
+static Long dis_CVTPS2PD_128 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool isAvx )
{
IRTemp addr = IRTemp_INVALID;
Int alen = 0;
@@ -9717,6 +9751,47 @@
}
+static Long dis_CVTPS2PD_256 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ IRTemp f32_0 = newTemp(Ity_F32);
+ IRTemp f32_1 = newTemp(Ity_F32);
+ IRTemp f32_2 = newTemp(Ity_F32);
+ IRTemp f32_3 = newTemp(Ity_F32);
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( f32_0, getXMMRegLane32F(rE, 0) );
+ assign( f32_1, getXMMRegLane32F(rE, 1) );
+ assign( f32_2, getXMMRegLane32F(rE, 2) );
+ assign( f32_3, getXMMRegLane32F(rE, 3) );
+ delta += 1;
+ DIP("vcvtps2pd %s,%s\n", nameXMMReg(rE), nameYMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( f32_0, loadLE(Ity_F32, mkexpr(addr)) );
+ assign( f32_1, loadLE(Ity_F32,
+ binop(Iop_Add64,mkexpr(addr),mkU64(4))) );
+ assign( f32_2, loadLE(Ity_F32,
+ binop(Iop_Add64,mkexpr(addr),mkU64(8))) );
+ assign( f32_3, loadLE(Ity_F32,
+ binop(Iop_Add64,mkexpr(addr),mkU64(12))) );
+ delta += alen;
+ DIP("vcvtps2pd %s,%s\n", dis_buf, nameYMMReg(rG));
+ }
+
+ putYMMRegLane64F( rG, 3, unop(Iop_F32toF64, mkexpr(f32_3)) );
+ putYMMRegLane64F( rG, 2, unop(Iop_F32toF64, mkexpr(f32_2)) );
+ putYMMRegLane64F( rG, 1, unop(Iop_F32toF64, mkexpr(f32_1)) );
+ putYMMRegLane64F( rG, 0, unop(Iop_F32toF64, mkexpr(f32_0)) );
+ return delta;
+}
+
+
static Long dis_CVTPD2PS_128 ( VexAbiInfo* vbi, Prefix pfx,
Long delta, Bool isAvx )
{
@@ -9762,8 +9837,8 @@
}
-static Long dis_CVTxPS2DQ ( VexAbiInfo* vbi, Prefix pfx,
- Long delta, Bool isAvx, Bool r2zero )
+static Long dis_CVTxPS2DQ_128 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool isAvx, Bool r2zero )
{
IRTemp addr = IRTemp_INVALID;
Int alen = 0;
@@ -9778,14 +9853,14 @@
UInt rE = eregOfRexRM(pfx,modrm);
assign( argV, getXMMReg(rE) );
delta += 1;
- DIP("%scvtps2dq %s,%s\n",
- isAvx ? "v" : "", nameXMMReg(rE), nameXMMReg(rG));
+ DIP("%scvt%sps2dq %s,%s\n",
+ isAvx ? "v" : "", r2zero ? "t" : "", nameXMMReg(rE), nameXMMReg(rG));
} else {
addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
delta += alen;
- DIP("%scvtps2dq %s,%s\n",
- isAvx ? "v" : "", dis_buf, nameXMMReg(rG) );
+ DIP("%scvt%sps2dq %s,%s\n",
+ isAvx ? "v" : "", r2zero ? "t" : "", dis_buf, nameXMMReg(rG) );
}
assign( rmode, r2zero ? mkU32((UInt)Irrm_ZERO)
@@ -9812,6 +9887,276 @@
}
+static Long dis_CVTxPS2DQ_256 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool r2zero )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ UChar modrm = getUChar(delta);
+ IRTemp argV = newTemp(Ity_V256);
+ IRTemp argVhi = IRTemp_INVALID;
+ IRTemp argVlo = IRTemp_INVALID;
+ IRTemp rmode = newTemp(Ity_I32);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ IRTemp t0, t1, t2, t3, t4, t5, t6, t7;
+
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( argV, getYMMReg(rE) );
+ delta += 1;
+ DIP("vcvt%sps2dq %s,%s\n",
+ r2zero ? "t" : "", nameYMMReg(rE), nameYMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( argV, loadLE(Ity_V256, mkexpr(addr)) );
+ delta += alen;
+ DIP("vcvt%sps2dq %s,%s\n",
+ r2zero ? "t" : "", dis_buf, nameYMMReg(rG) );
+ }
+
+ assign( rmode, r2zero ? mkU32((UInt)Irrm_ZERO)
+ : get_sse_roundingmode() );
+ t0 = t1 = t2 = t3 = t4 = t5 = t6 = t7 = IRTemp_INVALID;
+ breakupV256toV128s( argV, &argVhi, &argVlo );
+ breakupV128to32s( argVhi, &t7, &t6, &t5, &t4 );
+ breakupV128to32s( argVlo, &t3, &t2, &t1, &t0 );
+ /* This is less than ideal. If it turns out to be a performance
+ bottleneck it can be improved. */
+# define CVT(_t) \
+ binop( Iop_F64toI32S, \
+ mkexpr(rmode), \
+ unop( Iop_F32toF64, \
+ unop( Iop_ReinterpI32asF32, mkexpr(_t))) )
+
+ putYMMRegLane32( rG, 7, CVT(t7) );
+ putYMMRegLane32( rG, 6, CVT(t6) );
+ putYMMRegLane32( rG, 5, CVT(t5) );
+ putYMMRegLane32( rG, 4, CVT(t4) );
+ putYMMRegLane32( rG, 3, CVT(t3) );
+ putYMMRegLane32( rG, 2, CVT(t2) );
+ putYMMRegLane32( rG, 1, CVT(t1) );
+ putYMMRegLane32( rG, 0, CVT(t0) );
+# undef CVT
+
+ return delta;
+}
+
+
+static Long dis_CVTxPD2DQ_128 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool isAvx, Bool r2zero )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ UChar modrm = getUChar(delta);
+ IRTemp argV = newTemp(Ity_V128);
+ IRTemp rmode = newTemp(Ity_I32);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ IRTemp t0, t1;
+
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( argV, getXMMReg(rE) );
+ delta += 1;
+ DIP("%scvt%spd2dq %s,%s\n",
+ isAvx ? "v" : "", r2zero ? "t" : "", nameXMMReg(rE), nameXMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
+ delta += alen;
+ DIP("%scvt%spd2dqx %s,%s\n",
+ isAvx ? "v" : "", r2zero ? "t" : "", dis_buf, nameXMMReg(rG) );
+ }
+
+ if (r2zero) {
+ assign(rmode, mkU32((UInt)Irrm_ZERO) );
+ } else {
+ assign( rmode, get_sse_roundingmode() );
+ }
+
+ t0 = newTemp(Ity_F64);
+ t1 = newTemp(Ity_F64);
+ assign( t0, unop(Iop_ReinterpI64asF64,
+ unop(Iop_V128to64, mkexpr(argV))) );
+ assign( t1, unop(Iop_ReinterpI64asF64,
+ unop(Iop_V128HIto64, mkexpr(argV))) );
+
+# define CVT(_t) binop( Iop_F64toI32S, \
+ mkexpr(rmode), \
+ mkexpr(_t) )
+
+ putXMMRegLane32( rG, 3, mkU32(0) );
+ putXMMRegLane32( rG, 2, mkU32(0) );
+ putXMMRegLane32( rG, 1, CVT(t1) );
+ putXMMRegLane32( rG, 0, CVT(t0) );
+# undef CVT
+ if (isAvx)
+ putYMMRegLane128( rG, 1, mkV128(0) );
+
+ return delta;
+}
+
+
+static Long dis_CVTxPD2DQ_256 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool r2zero )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ UChar modrm = getUChar(delta);
+ IRTemp argV = newTemp(Ity_V256);
+ IRTemp rmode = newTemp(Ity_I32);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ IRTemp t0, t1, t2, t3;
+
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( argV, getYMMReg(rE) );
+ delta += 1;
+ DIP("vcvt%spd2dq %s,%s\n",
+ r2zero ? "t" : "", nameYMMReg(rE), nameXMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( argV, loadLE(Ity_V256, mkexpr(addr)) );
+ delta += alen;
+ DIP("vcvt%spd2dqy %s,%s\n",
+ r2zero ? "t" : "", dis_buf, nameXMMReg(rG) );
+ }
+
+ if (r2zero) {
+ assign(rmode, mkU32((UInt)Irrm_ZERO) );
+ } else {
+ assign( rmode, get_sse_roundingmode() );
+ }
+
+ t0 = IRTemp_INVALID;
+ t1 = IRTemp_INVALID;
+ t2 = IRTemp_INVALID;
+ t3 = IRTemp_INVALID;
+ breakupV256to64s( argV, &t3, &t2, &t1, &t0 );
+
+# define CVT(_t) binop( Iop_F64toI32S, \
+ mkexpr(rmode), \
+ unop( Iop_ReinterpI64asF64, \
+ mkexpr(_t) ) )
+
+ putXMMRegLane32( rG, 3, CVT(t3) );
+ putXMMRegLane32( rG, 2, CVT(t2) );
+ putXMMRegLane32( rG, 1, CVT(t1) );
+ putXMMRegLane32( rG, 0, CVT(t0) );
+# undef CVT
+ putYMMRegLane128( rG, 1, mkV128(0) );
+
+ return delta;
+}
+
+
+static Long dis_CVTDQ2PS_128 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool isAvx )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ UChar modrm = getUChar(delta);
+ IRTemp argV = newTemp(Ity_V128);
+ IRTemp rmode = newTemp(Ity_I32);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ IRTemp t0, t1, t2, t3;
+
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( argV, getXMMReg(rE) );
+ delta += 1;
+ DIP("%scvtdq2ps %s,%s\n",
+ isAvx ? "v" : "", nameXMMReg(rE), nameXMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
+ delta += alen;
+ DIP("%scvtdq2ps %s,%s\n",
+ isAvx ? "v" : "", dis_buf, nameXMMReg(rG) );
+ }
+
+ assign( rmode, get_sse_roundingmode() );
+ t0 = IRTemp_INVALID;
+ t1 = IRTemp_INVALID;
+ t2 = IRTemp_INVALID;
+ t3 = IRTemp_INVALID;
+ breakupV128to32s( argV, &t3, &t2, &t1, &t0 );
+
+# define CVT(_t) binop( Iop_F64toF32, \
+ mkexpr(rmode), \
+ unop(Iop_I32StoF64,mkexpr(_t)))
+
+ putXMMRegLane32F( rG, 3, CVT(t3) );
+ putXMMRegLane32F( rG, 2, CVT(t2) );
+ putXMMRegLane32F( rG, 1, CVT(t1) );
+ putXMMRegLane32F( rG, 0, CVT(t0) );
+# undef CVT
+ if (isAvx)
+ putYMMRegLane128( rG, 1, mkV128(0) );
+
+ return delta;
+}
+
+static Long dis_CVTDQ2PS_256 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ UChar modrm = getUChar(delta);
+ IRTemp argV = newTemp(Ity_V256);
+ IRTemp argVhi = IRTemp_INVALID;
+ IRTemp argVlo = IRTemp_INVALID;
+ IRTemp rmode = newTemp(Ity_I32);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ IRTemp t0, t1, t2, t3, t4, t5, t6, t7;
+
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( argV, getYMMReg(rE) );
+ delta += 1;
+ DIP("vcvtdq2ps %s,%s\n", nameYMMReg(rE), nameYMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( argV, loadLE(Ity_V256, mkexpr(addr)) );
+ delta += alen;
+ DIP("vcvtdq2ps %s,%s\n", dis_buf, nameYMMReg(rG) );
+ }
+
+ assign( rmode, get_sse_roundingmode() );
+ t0 = IRTemp_INVALID;
+ t1 = IRTemp_INVALID;
+ t2 = IRTemp_INVALID;
+ t3 = IRTemp_INVALID;
+ t4 = IRTemp_INVALID;
+ t5 = IRTemp_INVALID;
+ t6 = IRTemp_INVALID;
+ t7 = IRTemp_INVALID;
+ breakupV256toV128s( argV, &argVhi, &argVlo );
+ breakupV128to32s( argVhi, &t7, &t6, &t5, &t4 );
+ breakupV128to32s( argVlo, &t3, &t2, &t1, &t0 );
+
+# define CVT(_t) binop( Iop_F64toF32, \
+ mkexpr(rmode), \
+ unop(Iop_I32StoF64,mkexpr(_t)))
+
+ putYMMRegLane32F( rG, 7, CVT(t7) );
+ putYMMRegLane32F( rG, 6, CVT(t6) );
+ putYMMRegLane32F( rG, 5, CVT(t5) );
+ putYMMRegLane32F( rG, 4, CVT(t4) );
+ putYMMRegLane32F( rG, 3, CVT(t3) );
+ putYMMRegLane32F( rG, 2, CVT(t2) );
+ putYMMRegLane32F( rG, 1, CVT(t1) );
+ putYMMRegLane32F( rG, 0, CVT(t0) );
+# undef CVT
+
+ return delta;
+}
+
+
static Long dis_PMOVMSKB_128 ( VexAbiInfo* vbi, Prefix pfx,
Long delta, Bool isAvx )
{
@@ -11466,7 +11811,7 @@
/* 0F 5A = CVTPS2PD -- convert 2 x F32 in low half mem/xmm to 2 x
F64 in xmm(G). */
if (haveNo66noF2noF3(pfx) && sz == 4) {
- delta = dis_CVTPS2PD( vbi, pfx, delta, False/*!isAvx*/ );
+ delta = dis_CVTPS2PD_128( vbi, pfx, delta, False/*!isAvx*/ );
goto decode_success;
}
/* F3 0F 5A = CVTSS2SD -- convert F32 in mem/low 1/4 xmm to F64 in
@@ -11540,43 +11885,13 @@
if ( (have66noF2noF3(pfx) && sz == 2)
|| (haveF3no66noF2(pfx) && sz == 4) ) {
Bool r2zero = toBool(sz == 4); // FIXME -- unreliable (???)
- delta = dis_CVTxPS2DQ( vbi, pfx, delta, False/*!isAvx*/, r2zero );
+ delta = dis_CVTxPS2DQ_128( vbi, pfx, delta, False/*!isAvx*/, r2zero );
goto decode_success;
}
/* 0F 5B = CVTDQ2PS -- convert 4 x I32 in mem/xmm to 4 x F32 in
xmm(G) */
if (haveNo66noF2noF3(pfx) && sz == 4) {
- IRTemp argV = newTemp(Ity_V128);
- IRTemp rmode = newTemp(Ity_I32);
-
- modrm = getUChar(delta);
- if (epartIsReg(modrm)) {
- assign( argV, getXMMReg(eregOfRexRM(pfx,modrm)) );
- delta += 1;
- DIP("cvtdq2ps %s,%s\n", nameXMMReg(eregOfRexRM(pfx,modrm)),
- nameXMMReg(gregOfRexRM(pfx,modrm)));
- } else {
- addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
- assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
- delta += alen;
- DIP("cvtdq2ps %s,%s\n", dis_buf,
- nameXMMReg(gregOfRexRM(pfx,modrm)) );
- }
-
- assign( rmode, get_sse_roundingmode() );
- breakupV128to32s( argV, &t3, &t2, &t1, &t0 );
-
-# define CVT(_t) binop( Iop_F64toF32, \
- mkexpr(rmode), \
- unop(Iop_I32StoF64,mkexpr(_t)))
-
- putXMMRegLane32F( gregOfRexRM(pfx,modrm), 3, CVT(t3) );
- putXMMRegLane32F( gregOfRexRM(pfx,modrm), 2, CVT(t2) );
- putXMMRegLane32F( gregOfRexRM(pfx,modrm), 1, CVT(t1) );
- putXMMRegLane32F( gregOfRexRM(pfx,modrm), 0, CVT(t0) );
-
-# undef CVT
-
+ delta = dis_CVTDQ2PS_128( vbi, pfx, delta, False/*!isAvx*/ );
goto decode_success;
}
break;
@@ -12941,50 +13256,8 @@
upper half */
if ( (haveF2no66noF3(pfx) && sz == 4)
|| (have66noF2noF3(pfx) && sz == 2) ) {
- IRTemp argV = newTemp(Ity_V128);
- IRTemp rmode = newTemp(Ity_I32);
- Bool r2zero = toBool(sz == 2); // FIXME -- unreliable
-
- modrm = getUChar(delta);
- if (epartIsReg(modrm)) {
- assign( argV, getXMMReg(eregOfRexRM(pfx,modrm)) );
- delta += 1;
- DIP("cvt%spd2dq %s,%s\n", r2zero ? "t" : "",
- nameXMMReg(eregOfRexRM(pfx,modrm)),
- nameXMMReg(gregOfRexRM(pfx,modrm)));
- } else {
- addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
- assign( argV, loadLE(Ity_V128, mkexpr(addr)) );
- delta += alen;
- DIP("cvt%spd2dq %s,%s\n", r2zero ? "t" : "",
- dis_buf,
- nameXMMReg(gregOfRexRM(pfx,modrm)) );
- }
-
- if (r2zero) {
- assign(rmode, mkU32((UInt)Irrm_ZERO) );
- } else {
- assign( rmode, get_sse_roundingmode() );
- }
-
- t0 = newTemp(Ity_F64);
- t1 = newTemp(Ity_F64);
- assign( t0, unop(Iop_ReinterpI64asF64,
- unop(Iop_V128to64, mkexpr(argV))) );
- assign( t1, unop(Iop_ReinterpI64asF64,
- unop(Iop_V128HIto64, mkexpr(argV))) );
-
-# define CVT(_t) binop( Iop_F64toI32S, \
- mkexpr(rmode), \
- mkexpr(_t) )
-
- putXMMRegLane32( gregOfRexRM(pfx,modrm), 3, mkU32(0) );
- putXMMRegLane32( gregOfRexRM(pfx,modrm), 2, mkU32(0) );
- putXMMRegLane32( gregOfRexRM(pfx,modrm), 1, CVT(t1) );
- putXMMRegLane32( gregOfRexRM(pfx,modrm), 0, CVT(t0) );
-
-# undef CVT
-
+ delta = dis_CVTxPD2DQ_128( vbi, pfx, delta, False/*!isAvx*/,
+ toBool(sz == 2)/*r2zero*/);
goto decode_success;
}
/* F3 0F E6 = CVTDQ2PD -- convert 2 x I32 in mem/lo half xmm to 2 x
@@ -19809,6 +20082,53 @@
}
+/* Lower 32-bit lane only AVX128 unary operation:
+ G[31:0] = op(E[31:0])
+ G[127:32] = V[127:32]
+ G[255:128] = 0
+ The specified op must be of the 32F0x4 kind, so that it
+ copies the upper 3/4 of the operand to the result.
+*/
+static Long dis_AVX128_E_V_to_G_lo32_unary ( /*OUT*/Bool* uses_vvvv,
+ VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
+ HChar* opname, IROp op )
+{
+ HChar dis_buf[50];
+ Int alen;
+ IRTemp addr;
+ UChar rm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,rm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp e32 = newTemp(Ity_I32);
+
+ /* Fetch E[31:0] */
+ if (epartIsReg(rm)) {
+ UInt rE = eregOfRexRM(pfx,rm);
+ assign(e32, getXMMRegLane32(rE, 0));
+ DIP("%s %s,%s,%s\n", opname,
+ nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ delta += 1;
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign(e32, loadLE(Ity_I32, mkexpr(addr)));
+ DIP("%s %s,%s,%s\n", opname,
+ dis_buf, nameXMMReg(rV), nameXMMReg(rG));
+ delta += alen;
+ }
+
+ /* Create a value 'arg' as V[127:32]++E[31:0] */
+ IRTemp arg = newTemp(Ity_V128);
+ assign(arg,
+ binop(Iop_SetV128lo32,
+ getXMMReg(rV), mkexpr(e32)));
+ /* and apply op to it */
+ putYMMRegLoAndZU( rG, unop(op, mkexpr(arg)) );
+ *uses_vvvv = True;
+ return delta;
+}
+
+
/* Lower 32-bit lane only AVX128 binary operation:
G[31:0] = V[31:0] `op` E[31:0]
G[127:32] = V[127:32]
@@ -20011,6 +20331,36 @@
}
+/* Handles AVX128 unary E-to-G all-lanes operations. */
+static
+Long dis_AVX128_E_to_G_unary_all ( /*OUT*/Bool* uses_vvvv,
+ VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
+ HChar* opname, IROp op )
+{
+ HChar dis_buf[50];
+ Int alen;
+ IRTemp addr;
+ IRTemp arg = newTemp(Ity_V128);
+ UChar rm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, rm);
+ if (epartIsReg(rm)) {
+ UInt rE = eregOfRexRM(pfx,rm);
+ assign(arg, getXMMReg(rE));
+ delta += 1;
+ DIP("%s %s,%s\n", opname, nameXMMReg(rE), nameXMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign(arg, loadLE(Ity_V128, mkexpr(addr)));
+ delta += alen;
+ DIP("%s %s,%s\n", opname, dis_buf, nameXMMReg(rG));
+ }
+ putYMMRegLoAndZU( rG, unop(op, mkexpr(arg)) );
+ *uses_vvvv = False;
+ return delta;
+}
+
+
/* FIXME: common up with the _128_ version above? */
static
Long dis_VEX_NDS_256_AnySimdPfx_0F_WIG (
@@ -20083,6 +20433,36 @@
}
+/* Handles AVX256 unary E-to-G all-lanes operations. */
+static
+Long dis_AVX256_E_to_G_unary_all ( /*OUT*/Bool* uses_vvvv,
+ VexAbiInfo* vbi,
+ Prefix pfx, Long delta,
+ HChar* opname, IROp op )
+{
+ HChar dis_buf[50];
+ Int alen;
+ IRTemp addr;
+ IRTemp arg = newTemp(Ity_V256);
+ UChar rm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, rm);
+ if (epartIsReg(rm)) {
+ UInt rE = eregOfRexRM(pfx,rm);
+ assign(arg, getYMMReg(rE));
+ delta += 1;
+ DIP("%s %s,%s\n", opname, nameYMMReg(rE), nameYMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign(arg, loadLE(Ity_V256, mkexpr(addr)));
+ delta += alen;
+ DIP("%s %s,%s\n", opname, dis_buf, nameYMMReg(rG));
+ }
+ putYMMReg( rG, unop(op, mkexpr(arg)) );
+ *uses_vvvv = False;
+ return delta;
+}
+
+
/* The use of ReinterpF64asI64 is ugly. Surely could do better if we
had a variant of Iop_64x4toV256 that took F64s as args instead. */
static Long dis_CVTDQ2PD_256 ( VexAbiInfo* vbi, Prefix pfx,
@@ -20286,6 +20666,23 @@
}
goto decode_success;
}
+ /* VMOVUPS ymm2/m256, ymm1 = VEX.256.0F.WIG 10 /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ putYMMReg( rG, getYMMReg( rE ));
+ DIP("vmovups %s,%s\n", nameYMMReg(rE), nameYMMReg(rG));
+ delta += 1;
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ putYMMReg( rG, loadLE(Ity_V256, mkexpr(addr)) );
+ DIP("vmovups %s,%s\n", dis_buf, nameYMMReg(rG));
+ delta += alen;
+ }
+ goto decode_success;
+ }
break;
case 0x11:
@@ -20945,14 +21342,65 @@
break;
case 0x51:
+ /* VSQRTSS xmm3/m64(E), xmm2(V), xmm1(G) = VEX.NDS.LIG.F3.0F.WIG 51 /r */
+ if (haveF3no66noF2(pfx)) {
+ delta = dis_AVX128_E_V_to_G_lo32_unary(
+ uses_vvvv, vbi, pfx, delta, "vsqrtss", Iop_Sqrt32F0x4 );
+ goto decode_success;
+ }
+ /* VSQRTPS xmm2/m128(E), xmm1(G) = VEX.NDS.128.0F.WIG 51 /r */
+ if (haveNo66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_AVX128_E_to_G_unary_all(
+ uses_vvvv, vbi, pfx, delta, "vsqrtps", Iop_Sqrt32Fx4 );
+ goto decode_success;
+ }
+ /* VSQRTPS ymm2/m256(E), ymm1(G) = VEX.NDS.256.0F.WIG 51 /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_AVX256_E_to_G_unary_all(
+ uses_vvvv, vbi, pfx, delta, "vsqrtps", Iop_Sqrt32Fx8 );
+ goto decode_success;
+ }
/* VSQRTSD xmm3/m64(E), xmm2(V), xmm1(G) = VEX.NDS.LIG.F2.0F.WIG 51 /r */
if (haveF2no66noF3(pfx)) {
delta = dis_AVX128_E_V_to_G_lo64_unary(
uses_vvvv, vbi, pfx, delta, "vsqrtsd", Iop_Sqrt64F0x2 );
goto decode_success;
- }
- break;
+ }
+ /* VSQRTPD xmm2/m128(E), xmm1(G) = VEX.NDS.128.66.0F.WIG 51 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_AVX128_E_to_G_unary_all(
+ uses_vvvv, vbi, pfx, delta, "vsqrtpd", Iop_Sqrt64Fx2 );
+ goto decode_success;
+ }
+ /* VSQRTPD ymm2/m256(E), ymm1(G) = VEX.NDS.256.66.0F.WIG 51 /r */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_AVX256_E_to_G_unary_all(
+ uses_vvvv, vbi, pfx, delta, "vsqrtpd", Iop_Sqrt64Fx4 );
+ goto decode_success;
+ }
+ break;
+ case 0x52:
+ /* VRSQRTSS xmm3/m64(E), xmm2(V), xmm1(G) = VEX.NDS.LIG.F3.0F.WIG 52 /r */
+ if (haveF3no66noF2(pfx)) {
+ delta = dis_AVX128_E_V_to_G_lo32_unary(
+ uses_vvvv, vbi, pfx, delta, "vrsqrtss", Iop_RSqrt32F0x4 );
+ goto decode_success;
+ }
+ /* VRSQRTPS xmm2/m128(E), xmm1(G) = VEX.NDS.128.0F.WIG 52 /r */
+ if (haveNo66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_AVX128_E_to_G_unary_all(
+ uses_vvvv, vbi, pfx, delta, "vrsqrtps", Iop_RSqrt32Fx4 );
+ goto decode_success;
+ }
+ /* VRSQRTPS ymm2/m256(E), ymm1(G) = VEX.NDS.256.0F.WIG 52 /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_AVX256_E_to_G_unary_all(
+ uses_vvvv, vbi, pfx, delta, "vrsqrtps", Iop_RSqrt32Fx8 );
+ goto decode_success;
+ }
+ break;
+
case 0x54:
/* VANDPD r/m, rV, r ::: r = rV & r/m */
/* VANDPD = VEX.NDS.128.66.0F.WIG 54 /r */
@@ -21157,9 +21605,14 @@
case 0x5A:
/* VCVTPS2PD xmm2/m64, xmm1 = VEX.128.0F.WIG 5A /r */
if (haveNo66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
- delta = dis_CVTPS2PD( vbi, pfx, delta, True/*isAvx*/ );
+ delta = dis_CVTPS2PD_128( vbi, pfx, delta, True/*isAvx*/ );
goto decode_success;
}
+ /* VCVTPS2PD xmm2/m128, ymm1 = VEX.256.0F.WIG 5A /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_CVTPS2PD_256( vbi, pfx, delta );
+ goto decode_success;
+ }
/* VCVTPD2PS xmm2/m128, xmm1 = VEX.128.66.0F.WIG 5A /r */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
delta = dis_CVTPD2PS_128( vbi, pfx, delta, True/*isAvx*/ );
@@ -21231,10 +21684,38 @@
case 0x5B:
/* VCVTPS2DQ xmm2/m128, xmm1 = VEX.128.66.0F.WIG 5B /r */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
- delta = dis_CVTxPS2DQ( vbi, pfx, delta,
- True/*isAvx*/, False/*!r2zero*/ );
+ delta = dis_CVTxPS2DQ_128( vbi, pfx, delta,
+ True/*isAvx*/, False/*!r2zero*/ );
goto decode_success;
}
+ /* VCVTPS2DQ ymm2/m256, ymm1 = VEX.256.66.0F.WIG 5B /r */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_CVTxPS2DQ_256( vbi, pfx, delta,
+ False/*!r2zero*/ );
+ goto decode_success;
+ }
+ /* VCVTTPS2DQ xmm2/m128, xmm1 = VEX.128.F3.0F.WIG 5B /r */
+ if (haveF3no66noF2(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_CVTxPS2DQ_128( vbi, pfx, delta,
+ True/*isAvx*/, True/*r2zero*/ );
+ goto decode_success;
+ }
+ /* VCVTTPS2DQ ymm2/m256, ymm1 = VEX.256.F3.0F.WIG 5B /r */
+ if (haveF3no66noF2(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_CVTxPS2DQ_256( vbi, pfx, delta,
+ True/*r2zero*/ );
+ goto decode_success;
+ }
+ /* VCVTDQ2PS xmm2/m128, xmm1 = VEX.128.0F.WIG 5B /r */
+ if (haveNo66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_CVTDQ2PS_128 ( vbi, pfx, delta, True/*isAvx*/ );
+ goto decode_success;
+ }
+ /* VCVTDQ2PS ymm2/m256, ymm1 = VEX.256.0F.WIG 5B /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_CVTDQ2PS_256 ( vbi, pfx, delta );
+ goto decode_success;
+ }
break;
case 0x5C:
@@ -21543,7 +22024,7 @@
case 0x6F:
/* VMOVDQA ymm2/m256, ymm1 = VEX.256.66.0F.WIG 6F */
/* VMOVDQU ymm2/m256, ymm1 = VEX.256.F3.0F.WIG 6F */
- if ((have66noF2noF3(pfx) /* ATC || haveF3no66noF2(pfx)*/)
+ if ((have66noF2noF3(pfx) || haveF3no66noF2(pfx))
&& 1==getVexL(pfx)/*256*/) {
UChar modrm = getUChar(delta);
UInt rD = gregOfRexRM(pfx, modrm);
@@ -21743,6 +22224,17 @@
DIP("vzeroupper\n");
goto decode_success;
}
+ /* VZEROALL = VEX.256.0F.WIG 77 */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ Int i;
+ IRTemp zero128 = newTemp(Ity_V128);
+ assign(zero128, mkV128(0));
+ for (i = 0; i < 16; i++) {
+ putYMMRegLoAndZU(i, mkexpr(zero128));
+ }
+ DIP("vzeroall\n");
+ goto decode_success;
+ }
break;
case 0x7E:
@@ -21809,22 +22301,27 @@
case 0x7F:
/* VMOVDQA ymm1, ymm2/m256 = VEX.256.66.0F.WIG 7F */
- if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ /* VMOVDQU ymm1, ymm2/m256 = VEX.256.F3.0F.WIG 7F */
+ if ((have66noF2noF3(pfx) || haveF3no66noF2(pfx))
+ && 1==getVexL(pfx)/*256*/) {
UChar modrm = getUChar(delta);
UInt rS = gregOfRexRM(pfx, modrm);
IRTemp tS = newTemp(Ity_V256);
+ Bool isA = have66noF2noF3(pfx);
+ UChar ch = isA ? 'a' : 'u';
assign(tS, getYMMReg(rS));
if (epartIsReg(modrm)) {
UInt rD = eregOfRexRM(pfx, modrm);
delta += 1;
putYMMReg(rD, mkexpr(tS));
- DIP("vmovdqa %s,%s\n", nameYMMReg(rS), nameYMMReg(rD));
+ DIP("vmovdq%c %s,%s\n", ch, nameYMMReg(rS), nameYMMReg(rD));
} else {
addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 0 );
delta += alen;
- gen_SEGV_if_not_32_aligned(addr);
+ if (isA)
+ gen_SEGV_if_not_32_aligned(addr);
storeLE(mkexpr(addr), mkexpr(tS));
- DIP("vmovdqa %s,%s\n", nameYMMReg(rS), dis_buf);
+ DIP("vmovdq%c %s,%s\n", ch, nameYMMReg(rS), dis_buf);
}
goto decode_success;
}
@@ -22231,6 +22728,28 @@
delta = dis_CVTDQ2PD_256(vbi, pfx, delta);
goto decode_success;
}
+ /* VCVTTPD2DQ xmm2/m128, xmm1 = VEX.128.66.0F.WIG E6 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_CVTxPD2DQ_128(vbi, pfx, delta, True/*isAvx*/,
+ True/*r2zero*/);
+ goto decode_success;
+ }
+ /* VCVTTPD2DQ ymm2/m256, xmm1 = VEX.256.66.0F.WIG E6 /r */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_CVTxPD2DQ_256(vbi, pfx, delta, True/*r2zero*/);
+ goto decode_success;
+ }
+ /* VCVTPD2DQ xmm2/m128, xmm1 = VEX.128.F2.0F.WIG E6 /r */
+ if (haveF2no66noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_CVTxPD2DQ_128(vbi, pfx, delta, True/*isAvx*/,
+ False/*!r2zero*/);
+ goto decode_success;
+ }
+ /* VCVTPD2DQ ymm2/m256, xmm1 = VEX.256.F2.0F.WIG E6 /r */
+ if (haveF2no66noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ delta = dis_CVTxPD2DQ_256(vbi, pfx, delta, False/*!r2zero*/);
+ goto decode_success;
+ }
break;
case 0xE7:
Modified: trunk/priv/ir_defs.c (+7 -1)
===================================================================
--- trunk/priv/ir_defs.c 2012-06-18 23:09:33 +01:00 (rev 2389)
+++ trunk/priv/ir_defs.c 2012-06-19 00:15:16 -23:00 (rev 2390)
@@ -627,6 +627,7 @@
case Iop_RSqrt32Fx4: vex_printf("RSqrt32Fx4"); return;
case Iop_RSqrt32F0x4: vex_printf("RSqrt32F0x4"); return;
+ case Iop_RSqrt32Fx8: vex_printf("RSqrt32Fx8"); return;
case Iop_RSqrt64Fx2: vex_printf("RSqrt64Fx2"); return;
case Iop_RSqrt64F0x2: vex_printf("RSqrt64F0x2"); return;
@@ -634,7 +635,9 @@
case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return;
case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
-
+ case Iop_Sqrt32Fx8: vex_printf("Sqrt32Fx8"); return;
+ case Iop_Sqrt64Fx4: vex_printf("Sqrt64Fx4"); return;
+
case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return;
case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return;
case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
@@ -2813,6 +2816,9 @@
BINARY(Ity_V128,Ity_V128, Ity_V256);
case Iop_NotV256:
+ case Iop_RSqrt32Fx8:
+ case Iop_Sqrt32Fx8:
+ case Iop_Sqrt64Fx4:
UNARY(Ity_V256, Ity_V256);
default:
|
|
From: <sv...@va...> - 2012-06-18 22:10:10
|
sewardj 2012-06-18 23:10:03 +0100 (Mon, 18 Jun 2012)
New Revision: 12653
Log:
Update.
Modified files:
trunk/none/tests/amd64/avx-1.c
Modified: trunk/none/tests/amd64/avx-1.c (+102 -0)
===================================================================
--- trunk/none/tests/amd64/avx-1.c 2012-06-18 17:40:05 +01:00 (rev 12652)
+++ trunk/none/tests/amd64/avx-1.c 2012-06-18 23:10:03 +01:00 (rev 12653)
@@ -1115,6 +1115,84 @@
"vshufpd $0x5A, %%ymm9, %%ymm8, %%ymm7",
"vshufpd $0xA5, (%%rax), %%ymm8, %%ymm7")
+GEN_test_RandM(VPERMILPS_128_0x00,
+ "vpermilps $0x00, %%xmm6, %%xmm8",
+ "vpermilps $0x01, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0xFE,
+ "vpermilps $0xFE, %%xmm6, %%xmm8",
+ "vpermilps $0xFF, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0x30,
+ "vpermilps $0x30, %%xmm6, %%xmm8",
+ "vpermilps $0x03, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0x21,
+ "vpermilps $0x21, %%xmm6, %%xmm8",
+ "vpermilps $0x12, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0xD7,
+ "vpermilps $0xD7, %%xmm6, %%xmm8",
+ "vpermilps $0x6C, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0xB5,
+ "vpermilps $0xB5, %%xmm6, %%xmm8",
+ "vpermilps $0x4A, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0x85,
+ "vpermilps $0x85, %%xmm6, %%xmm8",
+ "vpermilps $0xDC, (%%rax), %%xmm8")
+GEN_test_RandM(VPERMILPS_128_0x29,
+ "vpermilps $0x29, %%xmm6, %%xmm8",
+ "vpermilps $0x92, (%%rax), %%xmm8")
+
+GEN_test_RandM(VBLENDPS_128_1of3,
+ "vblendps $0, %%xmm6, %%xmm8, %%xmm7",
+ "vblendps $3, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VBLENDPS_128_2of3,
+ "vblendps $6, %%xmm6, %%xmm8, %%xmm7",
+ "vblendps $9, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VBLENDPS_128_3of3,
+ "vblendps $12, %%xmm6, %%xmm8, %%xmm7",
+ "vblendps $15, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VBLENDPD_128_1of2,
+ "vblendpd $0, %%xmm6, %%xmm8, %%xmm7",
+ "vblendpd $1, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VBLENDPD_128_2of2,
+ "vblendpd $2, %%xmm6, %%xmm8, %%xmm7",
+ "vblendpd $3, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VBLENDPD_256_1of3,
+ "vblendpd $0, %%ymm6, %%ymm8, %%ymm7",
+ "vblendpd $3, (%%rax), %%ymm8, %%ymm7")
+GEN_test_RandM(VBLENDPD_256_2of3,
+ "vblendpd $6, %%ymm6, %%ymm8, %%ymm7",
+ "vblendpd $9, (%%rax), %%ymm8, %%ymm7")
+GEN_test_RandM(VBLENDPD_256_3of3,
+ "vblendpd $12, %%ymm6, %%ymm8, %%ymm7",
+ "vblendpd $15, (%%rax), %%ymm8, %%ymm7")
+
+GEN_test_RandM(VPBLENDW_128_0x00,
+ "vpblendw $0x00, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0x01, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0xFE,
+ "vpblendw $0xFE, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0xFF, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0x30,
+ "vpblendw $0x30, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0x03, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0x21,
+ "vpblendw $0x21, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0x12, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0xD7,
+ "vpblendw $0xD7, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0x6C, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0xB5,
+ "vpblendw $0xB5, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0x4A, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0x85,
+ "vpblendw $0x85, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0xDC, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPBLENDW_128_0x29,
+ "vpblendw $0x29, %%xmm6, %%xmm8, %%xmm7",
+ "vpblendw $0x92, (%%rax), %%xmm8, %%xmm7")
+
+
/* Comment duplicated above, for convenient reference:
Allowed operands in test insns:
Reg form: %ymm6, %ymm7, %ymm8, %ymm9 and %r14.
@@ -1391,5 +1469,29 @@
test_VSHUFPD_128_2of2();
test_VSHUFPD_256_1of2();
test_VSHUFPD_256_2of2();
+ test_VPERMILPS_128_0x00();
+ test_VPERMILPS_128_0xFE();
+ test_VPERMILPS_128_0x30();
+ test_VPERMILPS_128_0x21();
+ test_VPERMILPS_128_0xD7();
+ test_VPERMILPS_128_0xB5();
+ test_VPERMILPS_128_0x85();
+ test_VPERMILPS_128_0x29();
+ test_VBLENDPS_128_1of3();
+ test_VBLENDPS_128_2of3();
+ test_VBLENDPS_128_3of3();
+ test_VBLENDPD_128_1of2();
+ test_VBLENDPD_128_2of2();
+ test_VBLENDPD_256_1of3();
+ test_VBLENDPD_256_2of3();
+ test_VBLENDPD_256_3of3();
+ test_VPBLENDW_128_0x00();
+ test_VPBLENDW_128_0xFE();
+ test_VPBLENDW_128_0x30();
+ test_VPBLENDW_128_0x21();
+ test_VPBLENDW_128_0xD7();
+ test_VPBLENDW_128_0xB5();
+ test_VPBLENDW_128_0x85();
+ test_VPBLENDW_128_0x29();
return 0;
}
|
|
From: <sv...@va...> - 2012-06-18 22:09:44
|
sewardj 2012-06-18 23:09:33 +0100 (Mon, 18 Jun 2012)
New Revision: 2389
Log:
Remove incorrect masking of the imm8 in VSHUFPD.
Modified files:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c (+4 -4)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2012-06-18 16:01:30 +01:00 (rev 2388)
+++ trunk/priv/guest_amd64_toIR.c 2012-06-18 23:09:33 +01:00 (rev 2389)
@@ -22029,14 +22029,14 @@
if (epartIsReg(modrm)) {
UInt rE = eregOfRexRM(pfx,modrm);
assign( eV, getXMMReg(rE) );
- imm8 = (Int)getUChar(delta+1) & 7;
+ imm8 = (Int)getUChar(delta+1);
delta += 1+1;
DIP("vshufpd $%d,%s,%s,%s\n",
imm8, nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
} else {
addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 );
assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
- imm8 = (Int)getUChar(delta+alen) & 7;
+ imm8 = (Int)getUChar(delta+alen);
delta += 1+alen;
DIP("vshufpd $%d,%s,%s,%s\n",
imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG));
@@ -22059,14 +22059,14 @@
if (epartIsReg(modrm)) {
UInt rE = eregOfRexRM(pfx,modrm);
assign( eV, getYMMReg(rE) );
- imm8 = (Int)getUChar(delta+1) & 7;
+ imm8 = (Int)getUChar(delta+1);
delta += 1+1;
DIP("vshufpd $%d,%s,%s,%s\n",
imm8, nameYMMReg(rE), nameYMMReg(rV), nameYMMReg(rG));
} else {
addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 );
assign( eV, loadLE(Ity_V256, mkexpr(addr)) );
- imm8 = (Int)getUChar(delta+alen) & 7;
+ imm8 = (Int)getUChar(delta+alen);
delta += 1+alen;
DIP("vshufpd $%d,%s,%s,%s\n",
imm8, dis_buf, nameYMMReg(rV), nameYMMReg(rG));
|
|
From: <sv...@va...> - 2012-06-18 16:40:20
|
sewardj 2012-06-18 17:40:05 +0100 (Mon, 18 Jun 2012)
New Revision: 12652
Log:
Update.
Modified files:
trunk/none/tests/amd64/avx-1.c
Modified: trunk/none/tests/amd64/avx-1.c (+121 -0)
===================================================================
--- trunk/none/tests/amd64/avx-1.c 2012-06-17 09:46:32 +01:00 (rev 12651)
+++ trunk/none/tests/amd64/avx-1.c 2012-06-18 17:40:05 +01:00 (rev 12652)
@@ -1022,6 +1022,99 @@
GEN_test_Ronly(VPSRAW_0x05_128,
"vpsraw $0x5, %%xmm9, %%xmm7")
+GEN_test_RandM(VPCMPGTD_128,
+ "vpcmpgtd %%xmm6, %%xmm8, %%xmm7",
+ "vpcmpgtd (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VPMOVZXBD_128,
+ "vpmovzxbd %%xmm6, %%xmm8",
+ "vpmovzxbd (%%rax), %%xmm8")
+
+GEN_test_RandM(VPMOVSXBD_128,
+ "vpmovsxbd %%xmm6, %%xmm8",
+ "vpmovsxbd (%%rax), %%xmm8")
+
+GEN_test_RandM(VPINSRB_128_1of3,
+ "vpinsrb $0, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrb $3, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPINSRB_128_2of3,
+ "vpinsrb $6, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrb $9, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPINSRB_128_3of3,
+ "vpinsrb $12, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrb $15, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VPINSRW_128_1of4,
+ "vpinsrw $0, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrw $3, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPINSRW_128_2of4,
+ "vpinsrw $2, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrw $3, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPINSRW_128_3of4,
+ "vpinsrw $4, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrw $5, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPINSRW_128_4of4,
+ "vpinsrw $6, %%r14d, %%xmm8, %%xmm7",
+ "vpinsrw $7, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VCOMISD_128,
+ "vcomisd %%xmm6, %%xmm8; pushfq; popq %%r14; andq $0x8D5, %%r14",
+ "vcomisd (%%rax), %%xmm8; pushfq; popq %%r14; andq $0x8D5, %%r14")
+
+GEN_test_RandM(VCOMISS_128,
+ "vcomiss %%xmm6, %%xmm8; pushfq; popq %%r14; andq $0x8D5, %%r14",
+ "vcomiss (%%rax), %%xmm8; pushfq; popq %%r14; andq $0x8D5, %%r14")
+
+GEN_test_RandM(VMOVUPS_YMM_to_YMMorMEM,
+ "vmovups %%ymm8, %%ymm7",
+ "vmovups %%ymm9, (%%rax)")
+
+GEN_test_RandM(VDPPD_128_1of4,
+ "vdppd $0x00, %%xmm6, %%xmm8, %%xmm7",
+ "vdppd $0xA5, (%%rax), %%xmm9, %%xmm6")
+GEN_test_RandM(VDPPD_128_2of4,
+ "vdppd $0x5A, %%xmm6, %%xmm8, %%xmm7",
+ "vdppd $0xFF, (%%rax), %%xmm9, %%xmm6")
+GEN_test_RandM(VDPPD_128_3of4,
+ "vdppd $0x0F, %%xmm6, %%xmm8, %%xmm7",
+ "vdppd $0x37, (%%rax), %%xmm9, %%xmm6")
+GEN_test_RandM(VDPPD_128_4of4,
+ "vdppd $0xF0, %%xmm6, %%xmm8, %%xmm7",
+ "vdppd $0x73, (%%rax), %%xmm9, %%xmm6")
+
+GEN_test_Monly(VBROADCASTSS_256,
+ "vbroadcastss (%%rax), %%ymm8")
+
+GEN_test_RandM(VPALIGNR_128_1of3,
+ "vpalignr $0, %%xmm6, %%xmm8, %%xmm7",
+ "vpalignr $3, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPALIGNR_128_2of3,
+ "vpalignr $6, %%xmm6, %%xmm8, %%xmm7",
+ "vpalignr $9, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VPALIGNR_128_3of3,
+ "vpalignr $12, %%xmm6, %%xmm8, %%xmm7",
+ "vpalignr $15, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_Ronly(VMOVSD_REG_XMM, "vmovsd %%xmm9, %%xmm7, %%xmm8")
+
+GEN_test_Monly(VMOVLPD_128_M64_XMM_XMM, "vmovlpd (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_Monly(VMOVLPD_128_XMM_M64, "vmovlpd %%xmm7, (%%rax)")
+
+GEN_test_RandM(VSHUFPD_128_1of2,
+ "vshufpd $0, %%xmm9, %%xmm8, %%xmm7",
+ "vshufpd $1, (%%rax), %%xmm8, %%xmm7")
+GEN_test_RandM(VSHUFPD_128_2of2,
+ "vshufpd $2, %%xmm9, %%xmm8, %%xmm7",
+ "vshufpd $3, (%%rax), %%xmm8, %%xmm7")
+
+GEN_test_RandM(VSHUFPD_256_1of2,
+ "vshufpd $0x00, %%ymm9, %%ymm8, %%ymm7",
+ "vshufpd $0xFF, (%%rax), %%ymm8, %%ymm7")
+GEN_test_RandM(VSHUFPD_256_2of2,
+ "vshufpd $0x5A, %%ymm9, %%ymm8, %%ymm7",
+ "vshufpd $0xA5, (%%rax), %%ymm8, %%ymm7")
+
/* Comment duplicated above, for convenient reference:
Allowed operands in test insns:
Reg form: %ymm6, %ymm7, %ymm8, %ymm9 and %r14.
@@ -1270,5 +1363,33 @@
test_VPMULHW_128();
test_VPUNPCKHQDQ_128();
test_VPSRAW_0x05_128();
+ test_VPCMPGTD_128();
+ test_VPMOVZXBD_128();
+ test_VPMOVSXBD_128();
+ test_VPINSRB_128_1of3();
+ test_VPINSRB_128_2of3();
+ test_VPINSRB_128_3of3();
+ test_VCOMISD_128();
+ test_VCOMISS_128();
+ test_VMOVUPS_YMM_to_YMMorMEM();
+ test_VDPPD_128_1of4();
+ test_VDPPD_128_2of4();
+ test_VDPPD_128_3of4();
+ test_VDPPD_128_4of4();
+ test_VPINSRW_128_1of4();
+ test_VPINSRW_128_2of4();
+ test_VPINSRW_128_3of4();
+ test_VPINSRW_128_4of4();
+ test_VBROADCASTSS_256();
+ test_VPALIGNR_128_1of3();
+ test_VPALIGNR_128_2of3();
+ test_VPALIGNR_128_3of3();
+ test_VMOVSD_REG_XMM();
+ test_VMOVLPD_128_M64_XMM_XMM();
+ test_VMOVLPD_128_XMM_M64();
+ test_VSHUFPD_128_1of2();
+ test_VSHUFPD_128_2of2();
+ test_VSHUFPD_256_1of2();
+ test_VSHUFPD_256_2of2();
return 0;
}
|
|
From: <sv...@va...> - 2012-06-18 15:01:45
|
sewardj 2012-06-18 16:01:30 +0100 (Mon, 18 Jun 2012)
New Revision: 2388
Log:
More AVX insns:
VMOVUPD ymm1, ymm2/m256 = VEX.256.66.0F.WIG 11 /r
VMOVUPS ymm1, ymm2/m256 = VEX.256.0F.WIG 11 /r
VCOMISD xmm2/m64, xmm1 = VEX.LIG.66.0F.WIG 2F /r
VPCMPGTD r/m, rV, r ::: r = rV `>s-by-32s` r/m
VPMOVSXBD xmm2/m32, xmm1
VPMOVZXBD xmm2/m32, xmm1
VDPPD xmm3/m128,xmm2,xmm1 = VEX.NDS.128.66.0F3A.WIG 41 /r ib
and common up duplication in implementation of PINSRW/VPINSRW.
Modified files:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c (+256 -188)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2012-06-18 15:05:52 +01:00 (rev 2387)
+++ trunk/priv/guest_amd64_toIR.c 2012-06-18 16:01:30 +01:00 (rev 2388)
@@ -1467,12 +1467,6 @@
stmt( IRStmt_Put( xmmGuestRegLane32offset(xmmreg,laneno), e ) );
}
-static void putXMMRegLane16 ( UInt xmmreg, Int laneno, IRExpr* e )
-{
- vassert(typeOfIRExpr(irsb->tyenv,e) == Ity_I16);
- stmt( IRStmt_Put( xmmGuestRegLane16offset(xmmreg,laneno), e ) );
-}
-
static IRExpr* getYMMReg ( UInt xmmreg )
{
return IRExpr_Get( ymmGuestRegOffset(xmmreg), Ity_V256 );
@@ -10321,6 +10315,32 @@
}
+static IRTemp math_PINSRW_128 ( IRTemp v128, IRTemp u16, UInt imm8 )
+{
+ vassert(imm8 >= 0 && imm8 <= 7);
+
+ // Create a V128 value which has the selected word in the
+ // specified lane, and zeroes everywhere else.
+ IRTemp tmp128 = newTemp(Ity_V128);
+ IRTemp halfshift = newTemp(Ity_I64);
+ assign(halfshift, binop(Iop_Shl64,
+ unop(Iop_16Uto64, mkexpr(u16)),
+ mkU8(16 * (imm8 & 3))));
+ if (imm8 < 4) {
+ assign(tmp128, binop(Iop_64HLtoV128, mkU64(0), mkexpr(halfshift)));
+ } else {
+ assign(tmp128, binop(Iop_64HLtoV128, mkexpr(halfshift), mkU64(0)));
+ }
+
+ UShort mask = ~(3 << (imm8 * 2));
+ IRTemp res = newTemp(Ity_V128);
+ assign( res, binop(Iop_OrV128,
+ mkexpr(tmp128),
+ binop(Iop_AndV128, mkexpr(v128), mkV128(mask))) );
+ return res;
+}
+
+
/* Note, this also handles SSE(1) insns. */
__attribute__((noinline))
static
@@ -11180,14 +11200,14 @@
case 0x2E:
case 0x2F:
+ /* 66 0F 2E = UCOMISD -- 64F0x2 comparison G,E, and set ZCP */
/* 66 0F 2F = COMISD -- 64F0x2 comparison G,E, and set ZCP */
- /* 66 0F 2E = UCOMISD -- 64F0x2 comparison G,E, and set ZCP */
if (have66noF2noF3(pfx) && sz == 2) {
delta = dis_COMISD( vbi, pfx, delta, False/*!isAvx*/, opc );
goto decode_success;
}
+ /* 0F 2E = UCOMISS -- 32F0x4 comparison G,E, and set ZCP */
/* 0F 2F = COMISS -- 32F0x4 comparison G,E, and set ZCP */
- /* 0F 2E = UCOMISS -- 32F0x4 comparison G,E, and set ZCP */
if (haveNo66noF2noF3(pfx) && sz == 4) {
delta = dis_COMISS( vbi, pfx, delta, False/*!isAvx*/, opc );
goto decode_success;
@@ -12482,26 +12502,27 @@
Int lane;
t4 = newTemp(Ity_I16);
modrm = getUChar(delta);
-
+ UInt rG = gregOfRexRM(pfx,modrm);
if (epartIsReg(modrm)) {
- assign(t4, getIReg16(eregOfRexRM(pfx,modrm)));
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign(t4, getIReg16(rE));
delta += 1+1;
lane = getUChar(delta-1);
- DIP("pinsrw $%d,%s,%s\n", (Int)lane,
- nameIReg16(eregOfRexRM(pfx,modrm)),
- nameXMMReg(gregOfRexRM(pfx,modrm)));
+ DIP("pinsrw $%d,%s,%s\n",
+ (Int)lane, nameIReg16(rE), nameXMMReg(rG));
} else {
addr = disAMode ( &alen, vbi, pfx, delta, dis_buf,
1/*byte after the amode*/ );
delta += 1+alen;
lane = getUChar(delta-1);
assign(t4, loadLE(Ity_I16, mkexpr(addr)));
- DIP("pinsrw $%d,%s,%s\n", (Int)lane,
- dis_buf,
- nameXMMReg(gregOfRexRM(pfx,modrm)));
- }
-
- putXMMRegLane16( gregOfRexRM(pfx,modrm), lane & 7, mkexpr(t4) );
+ DIP("pinsrw $%d,%s,%s\n",
+ (Int)lane, dis_buf, nameXMMReg(rG));
+ }
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg(rG));
+ IRTemp res_vec = math_PINSRW_128( src_vec, t4, lane & 7);
+ putXMMReg(rG, mkexpr(res_vec));
goto decode_success;
}
break;
@@ -14862,6 +14883,49 @@
}
+/* Handles 128 bit versions of PMOVZXBD and PMOVSXBD. */
+static Long dis_PMOVxXBD_128 ( VexAbiInfo* vbi, Prefix pfx,
+ Long delta, Bool isAvx, Bool xIsZ )
+{
+ IRTemp addr = IRTemp_INVALID;
+ Int alen = 0;
+ HChar dis_buf[50];
+ IRTemp srcVec = newTemp(Ity_V128);
+ UChar modrm = getUChar(delta);
+ UChar* mbV = isAvx ? "v" : "";
+ UChar how = xIsZ ? 'z' : 's';
+ UInt rG = gregOfRexRM(pfx, modrm);
+ if ( epartIsReg(modrm) ) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ assign( srcVec, getXMMReg(rE) );
+ delta += 1;
+ DIP( "%spmov%cxbd %s,%s\n", mbV, how, nameXMMReg(rE), nameXMMReg(rG) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 0 );
+ assign( srcVec,
+ unop( Iop_32UtoV128, loadLE( Ity_I32, mkexpr(addr) ) ) );
+ delta += alen;
+ DIP( "%spmov%cxbd %s,%s\n", mbV, how, dis_buf, nameXMMReg(rG) );
+ }
+
+ IRTemp zeroVec = newTemp(Ity_V128);
+ assign( zeroVec, IRExpr_Const( IRConst_V128(0) ) );
+
+ IRExpr* res
+ = binop(Iop_InterleaveLO8x16,
+ mkexpr(zeroVec),
+ binop(Iop_InterleaveLO8x16,
+ mkexpr(zeroVec), mkexpr(srcVec)));
+ if (!xIsZ)
+ res = binop(Iop_SarN32x4,
+ binop(Iop_ShlN32x4, res, mkU8(24)), mkU8(24));
+
+ (isAvx ? putYMMRegLoAndZU : putXMMReg) ( rG, res );
+
+ return delta;
+}
+
+
static Long dis_PHMINPOSUW_128 ( VexAbiInfo* vbi, Prefix pfx,
Long delta, Bool isAvx )
{
@@ -15109,39 +15173,8 @@
/* 66 0F 38 21 /r = PMOVSXBD xmm1, xmm2/m32
Packed Move with Sign Extend from Byte to DWord (XMM) */
if (have66noF2noF3(pfx) && sz == 2) {
-
- modrm = getUChar(delta);
-
- IRTemp srcVec = newTemp(Ity_V128);
-
- if ( epartIsReg( modrm ) ) {
- assign( srcVec, getXMMReg( eregOfRexRM(pfx, modrm) ) );
- delta += 1;
- DIP( "pmovsxbd %s,%s\n",
- nameXMMReg( eregOfRexRM(pfx, modrm) ),
- nameXMMReg( gregOfRexRM(pfx, modrm) ) );
- } else {
- addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 0 );
- assign( srcVec,
- unop( Iop_32UtoV128, loadLE( Ity_I32, mkexpr(addr) ) ) );
- delta += alen;
- DIP( "pmovsxbd %s,%s\n",
- dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
- }
-
- IRTemp zeroVec = newTemp(Ity_V128);
- assign( zeroVec, IRExpr_Const( IRConst_V128(0) ) );
-
- putXMMReg( gregOfRexRM(pfx, modrm),
- binop( Iop_SarN32x4,
- binop( Iop_ShlN32x4,
- binop( Iop_InterleaveLO8x16,
- mkexpr(zeroVec),
- binop( Iop_InterleaveLO8x16,
- mkexpr(zeroVec),
- mkexpr(srcVec) ) ),
- mkU8(24) ), mkU8(24) ) );
-
+ delta = dis_PMOVxXBD_128( vbi, pfx, delta,
+ False/*!isAvx*/, False/*!xIsZ*/ );
goto decode_success;
}
break;
@@ -15336,35 +15369,8 @@
/* 66 0F 38 31 /r = PMOVZXBD xmm1, xmm2/m32
Packed Move with Zero Extend from Byte to DWord (XMM) */
if (have66noF2noF3(pfx) && sz == 2) {
-
- modrm = getUChar(delta);
-
- IRTemp srcVec = newTemp(Ity_V128);
-
- if ( epartIsReg(modrm) ) {
- assign( srcVec, getXMMReg( eregOfRexRM(pfx, modrm) ) );
- delta += 1;
- DIP( "pmovzxbd %s,%s\n",
- nameXMMReg( eregOfRexRM(pfx, modrm) ),
- nameXMMReg( gregOfRexRM(pfx, modrm) ) );
- } else {
- addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 0 );
- assign( srcVec,
- unop( Iop_32UtoV128, loadLE( Ity_I32, mkexpr(addr) ) ) );
- delta += alen;
- DIP( "pmovzxbd %s,%s\n",
- dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
- }
-
- IRTemp zeroVec = newTemp(Ity_V128);
- assign( zeroVec, IRExpr_Const( IRConst_V128(0) ) );
-
- putXMMReg( gregOfRexRM( pfx, modrm ),
- binop( Iop_InterleaveLO8x16,
- mkexpr(zeroVec),
- binop( Iop_InterleaveLO8x16,
- mkexpr(zeroVec), mkexpr(srcVec) ) ) );
-
+ delta = dis_PMOVxXBD_128( vbi, pfx, delta,
+ False/*!isAvx*/, True/*xIsZ*/ );
goto decode_success;
}
break;
@@ -16003,13 +16009,15 @@
static IRTemp math_PINSRB_128 ( IRTemp v128, IRTemp u8, UInt imm8 )
{
+ vassert(imm8 >= 0 && imm8 <= 15);
+
// Create a V128 value which has the selected byte in the
// specified lane, and zeroes everywhere else.
- IRTemp tmp128 = newTemp(Ity_V128);
+ IRTemp tmp128 = newTemp(Ity_V128);
IRTemp halfshift = newTemp(Ity_I64);
assign(halfshift, binop(Iop_Shl64,
- mkexpr(u8), mkU8(8 * (imm8 & 7))));
- vassert(imm8 >= 0 && imm8 <= 15);
+ unop(Iop_8Uto64, mkexpr(u8)),
+ mkU8(8 * (imm8 & 7))));
if (imm8 < 8) {
assign(tmp128, binop(Iop_64HLtoV128, mkU64(0), mkexpr(halfshift)));
} else {
@@ -16017,11 +16025,10 @@
}
UShort mask = ~(1 << imm8);
-
- IRTemp res = newTemp(Ity_V128);
- assign(res, binop( Iop_OrV128, mkexpr(tmp128),
- binop( Iop_AndV128,
- mkexpr(v128), mkV128(mask) ) ) );
+ IRTemp res = newTemp(Ity_V128);
+ assign( res, binop(Iop_OrV128,
+ mkexpr(tmp128),
+ binop(Iop_AndV128, mkexpr(v128), mkV128(mask))) );
return res;
}
@@ -16156,6 +16163,31 @@
}
+static IRTemp math_DPPD_128 ( IRTemp src_vec, IRTemp dst_vec, UInt imm8 )
+{
+ vassert(imm8 < 256);
+ UShort imm8_perms[4] = { 0x0000, 0x00FF, 0xFF00, 0xFFFF };
+ IRTemp and_vec = newTemp(Ity_V128);
+ IRTemp sum_vec = newTemp(Ity_V128);
+ assign( and_vec, binop( Iop_AndV128,
+ binop( Iop_Mul64Fx2,
+ mkexpr(dst_vec), mkexpr(src_vec) ),
+ mkV128( imm8_perms[ ((imm8 >> 4) & 3) ] ) ) );
+
+ assign( sum_vec, binop( Iop_Add64F0x2,
+ binop( Iop_InterleaveHI64x2,
+ mkexpr(and_vec), mkexpr(and_vec) ),
+ binop( Iop_InterleaveLO64x2,
+ mkexpr(and_vec), mkexpr(and_vec) ) ) );
+ IRTemp res = newTemp(Ity_V128);
+ assign(res, binop( Iop_AndV128,
+ binop( Iop_InterleaveLO64x2,
+ mkexpr(sum_vec), mkexpr(sum_vec) ),
+ mkV128( imm8_perms[ (imm8 & 3) ] ) ) );
+ return res;
+}
+
+
__attribute__((noinline))
static
Long dis_ESC_0F3A__SSE4 ( Bool* decode_OK,
@@ -16600,35 +16632,29 @@
/* 66 0F 3A 20 /r ib = PINSRB xmm1, r32/m8, imm8
Extract byte from r32/m8 and insert into xmm1 */
if (have66noF2noF3(pfx) && sz == 2) {
-
Int imm8;
- IRTemp new8 = newTemp(Ity_I64);
-
+ IRTemp new8 = newTemp(Ity_I8);
modrm = getUChar(delta);
UInt rG = gregOfRexRM(pfx, modrm);
-
if ( epartIsReg( modrm ) ) {
+ UInt rE = eregOfRexRM(pfx,modrm);
imm8 = (Int)(getUChar(delta+1) & 0xF);
- assign( new8, binop(Iop_And64,
- unop(Iop_32Uto64,
- getIReg32(eregOfRexRM(pfx,modrm))),
- mkU64(0xFF)));
+ assign( new8, unop(Iop_32to8, getIReg32(rE)) );
delta += 1+1;
DIP( "pinsrb $%d,%s,%s\n", imm8,
- nameIReg32( eregOfRexRM(pfx, modrm) ),
- nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ nameIReg32(rE), nameXMMReg(rG) );
} else {
addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
imm8 = (Int)(getUChar(delta+alen) & 0xF);
- assign( new8, unop(Iop_8Uto64, loadLE( Ity_I8, mkexpr(addr) )));
+ assign( new8, loadLE( Ity_I8, mkexpr(addr) ) );
delta += alen+1;
DIP( "pinsrb $%d,%s,%s\n",
- imm8, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ imm8, dis_buf, nameXMMReg(rG) );
}
-
IRTemp src_vec = newTemp(Ity_V128);
- assign(src_vec, getXMMReg( rG ));
- putXMMReg( rG, mkexpr(math_PINSRB_128( src_vec, new8, imm8 )) );
+ assign(src_vec, getXMMReg( gregOfRexRM(pfx, modrm) ));
+ IRTemp res = math_PINSRB_128( src_vec, new8, imm8 );
+ putXMMReg( rG, mkexpr(res) );
goto decode_success;
}
break;
@@ -16809,24 +16835,19 @@
/* 66 0F 3A 41 /r ib = DPPD xmm1, xmm2/m128, imm8
Dot Product of Packed Double Precision Floating-Point Values (XMM) */
if (have66noF2noF3(pfx) && sz == 2) {
-
- Int imm8;
+ modrm = getUChar(delta);
+ Int imm8;
IRTemp src_vec = newTemp(Ity_V128);
IRTemp dst_vec = newTemp(Ity_V128);
- IRTemp and_vec = newTemp(Ity_V128);
- IRTemp sum_vec = newTemp(Ity_V128);
-
- modrm = getUChar(delta);
-
- assign( dst_vec, getXMMReg( gregOfRexRM(pfx, modrm) ) );
-
+ UInt rG = gregOfRexRM(pfx, modrm);
+ assign( dst_vec, getXMMReg( rG ) );
if ( epartIsReg( modrm ) ) {
+ UInt rE = eregOfRexRM(pfx, modrm);
imm8 = (Int)getUChar(delta+1);
- assign( src_vec, getXMMReg( eregOfRexRM(pfx, modrm) ) );
+ assign( src_vec, getXMMReg(rE) );
delta += 1+1;
- DIP( "dppd $%d, %s,%s\n", imm8,
- nameXMMReg( eregOfRexRM(pfx, modrm) ),
- nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ DIP( "dppd $%d, %s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rG) );
} else {
addr = disAMode( &alen, vbi, pfx, delta, dis_buf,
1/* imm8 is 1 byte after the amode */ );
@@ -16835,28 +16856,10 @@
imm8 = (Int)getUChar(delta+alen);
delta += alen+1;
DIP( "dppd $%d, %s,%s\n",
- imm8, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
+ imm8, dis_buf, nameXMMReg(rG) );
}
-
- UShort imm8_perms[4] = { 0x0000, 0x00FF, 0xFF00, 0xFFFF };
-
- assign( and_vec, binop( Iop_AndV128,
- binop( Iop_Mul64Fx2,
- mkexpr(dst_vec), mkexpr(src_vec) ),
- mkV128( imm8_perms[ ((imm8 >> 4) & 3) ] ) ) );
-
- assign( sum_vec, binop( Iop_Add64F0x2,
- binop( Iop_InterleaveHI64x2,
- mkexpr(and_vec), mkexpr(and_vec) ),
- binop( Iop_InterleaveLO64x2,
- mkexpr(and_vec), mkexpr(and_vec) ) ) );
-
- putXMMReg( gregOfRexRM( pfx, modrm ),
- binop( Iop_AndV128,
- binop( Iop_InterleaveLO64x2,
- mkexpr(sum_vec), mkexpr(sum_vec) ),
- mkV128( imm8_perms[ (imm8 & 3) ] ) ) );
-
+ IRTemp res = math_DPPD_128( src_vec, dst_vec, imm8 );
+ putXMMReg( rG, mkexpr(res) );
goto decode_success;
}
break;
@@ -20345,6 +20348,23 @@
}
goto decode_success;
}
+ /* VMOVUPD ymm1, ymm2/m256 = VEX.256.66.0F.WIG 11 /r */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ putYMMReg( rE, getYMMReg(rG) );
+ DIP("vmovupd %s,%s\n", nameYMMReg(rG), nameYMMReg(rE));
+ delta += 1;
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ storeLE( mkexpr(addr), getYMMReg(rG) );
+ DIP("vmovupd %s,%s\n", nameYMMReg(rG), dis_buf);
+ delta += alen;
+ }
+ goto decode_success;
+ }
/* VMOVUPS xmm1, xmm2/m128 = VEX.128.0F.WIG 11 /r */
if (haveNo66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
UChar modrm = getUChar(delta);
@@ -20362,19 +20382,19 @@
}
goto decode_success;
}
- /* VMOVUPD ymm1, ymm2/m256 = VEX.256.66.0F.WIG 11 /r */
- if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ /* VMOVUPS ymm1, ymm2/m256 = VEX.256.0F.WIG 11 /r */
+ if (haveNo66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
UChar modrm = getUChar(delta);
UInt rG = gregOfRexRM(pfx,modrm);
if (epartIsReg(modrm)) {
UInt rE = eregOfRexRM(pfx,modrm);
putYMMReg( rE, getYMMReg(rG) );
- DIP("vmovupd %s,%s\n", nameYMMReg(rG), nameYMMReg(rE));
+ DIP("vmovups %s,%s\n", nameYMMReg(rG), nameYMMReg(rE));
delta += 1;
} else {
addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
storeLE( mkexpr(addr), getYMMReg(rG) );
- DIP("vmovupd %s,%s\n", nameYMMReg(rG), dis_buf);
+ DIP("vmovups %s,%s\n", nameYMMReg(rG), dis_buf);
delta += alen;
}
goto decode_success;
@@ -20909,12 +20929,15 @@
break;
case 0x2E:
+ case 0x2F:
/* VUCOMISD xmm2/m64, xmm1 = VEX.LIG.66.0F.WIG 2E /r */
+ /* VCOMISD xmm2/m64, xmm1 = VEX.LIG.66.0F.WIG 2F /r */
if (have66noF2noF3(pfx)) {
delta = dis_COMISD( vbi, pfx, delta, True/*isAvx*/, opc );
goto decode_success;
}
/* VUCOMISS xmm2/m32, xmm1 = VEX.LIG.0F.WIG 2E /r */
+ /* VCOMISS xmm2/m32, xmm1 = VEX.LIG.0F.WIG 2F /r */
if (haveNo66noF2noF3(pfx)) {
delta = dis_COMISS( vbi, pfx, delta, True/*isAvx*/, opc );
goto decode_success;
@@ -21370,6 +21393,16 @@
}
break;
+ case 0x66:
+ /* VPCMPGTD r/m, rV, r ::: r = rV `>s-by-32s` r/m */
+ /* VPCMPGTD = VEX.NDS.128.66.0F.WIG 66 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_VEX_NDS_128_AnySimdPfx_0F_WIG_simple(
+ uses_vvvv, vbi, pfx, delta, "vpcmpgtd", Iop_CmpGT32Sx4 );
+ goto decode_success;
+ }
+ break;
+
case 0x67:
/* VPACKUSWB r/m, rV, r ::: r = QNarrowBin16Sto8Ux16(rV, r/m) */
/* VPACKUSWB = VEX.NDS.128.66.0F.WIG 67 /r */
@@ -21883,49 +21916,32 @@
UInt rG = gregOfRexRM(pfx, modrm);
UInt rV = getVexNvvvv(pfx);
Int imm8;
- IRTemp new16 = newTemp(Ity_I64);
+ IRTemp new16 = newTemp(Ity_I16);
if ( epartIsReg( modrm ) ) {
imm8 = (Int)(getUChar(delta+1) & 7);
- assign( new16, binop(Iop_And64,
- unop(Iop_32Uto64,
- getIReg32(eregOfRexRM(pfx,modrm))),
- mkU64(0xFFFF)));
+ assign( new16, unop(Iop_32to16,
+ getIReg32(eregOfRexRM(pfx,modrm))) );
delta += 1+1;
DIP( "vpinsrw $%d,%s,%s\n", imm8,
nameIReg32( eregOfRexRM(pfx, modrm) ), nameXMMReg(rG) );
} else {
addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
imm8 = (Int)(getUChar(delta+alen) & 7);
- assign( new16, unop(Iop_16Uto64, loadLE( Ity_I16, mkexpr(addr) )));
+ assign( new16, loadLE( Ity_I16, mkexpr(addr) ));
delta += alen+1;
DIP( "vpinsrw $%d,%s,%s\n",
imm8, dis_buf, nameXMMReg(rG) );
}
- // Create a V128 value which has the selected word in the
- // specified lane, and zeroes everywhere else.
- IRTemp tmp128 = newTemp(Ity_V128);
- IRTemp halfshift = newTemp(Ity_I64);
- assign(halfshift, binop(Iop_Shl64,
- mkexpr(new16), mkU8(16 * (imm8 & 3))));
- if (imm8 < 4) {
- assign(tmp128, binop(Iop_64HLtoV128, mkU64(0), mkexpr(halfshift)));
- } else {
- assign(tmp128, binop(Iop_64HLtoV128, mkexpr(halfshift), mkU64(0)));
- }
-
- UShort mask = ~(3 << (imm8 * 2));
-
- putYMMRegLoAndZU( rG,
- binop( Iop_OrV128,
- mkexpr(tmp128),
- binop( Iop_AndV128,
- getXMMReg( rV ),
- mkV128(mask) ) ) );
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg( rV ));
+ IRTemp res_vec = math_PINSRW_128( src_vec, new16, imm8 );
+ putYMMRegLoAndZU( rG, mkexpr(res_vec) );
*uses_vvvv = True;
goto decode_success;
}
+ break;
case 0xC5:
/* VPEXTRW imm8, xmm1, reg32 = VEX.128.66.0F.W0 C5 /r ib */
@@ -22483,6 +22499,16 @@
}
break;
+ case 0x21:
+ /* VPMOVSXBD xmm2/m32, xmm1 */
+ /* VPMOVSXBD = VEX.128.66.0F38.WIG 21 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_PMOVxXBD_128( vbi, pfx, delta,
+ True/*isAvx*/, False/*!xIsZ*/ );
+ goto decode_success;
+ }
+ break;
+
case 0x23:
/* VPMOVSXWD xmm2/m64, xmm1 = VEX.128.66.0F38.WIG 23 /r */
if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
@@ -22521,6 +22547,16 @@
}
break;
+ case 0x31:
+ /* VPMOVZXBD xmm2/m32, xmm1 */
+ /* VPMOVZXBD = VEX.128.66.0F38.WIG 31 /r */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ delta = dis_PMOVxXBD_128( vbi, pfx, delta,
+ True/*isAvx*/, True/*xIsZ*/ );
+ goto decode_success;
+ }
+ break;
+
case 0x33:
/* VPMOVZXWD xmm2/m64, xmm1 */
/* VPMOVZXWD = VEX.128.66.0F38.WIG 33 /r */
@@ -23036,7 +23072,6 @@
}
break;
-
case 0x0F:
/* VPALIGNR imm8, xmm3/m128, xmm2, xmm1 */
/* VPALIGNR = VEX.NDS.128.66.0F3A.WIG 0F /r ib */
@@ -23168,39 +23203,39 @@
break;
case 0x20:
- /* VPINSRB r32/m8, xmm2, xmm1 = VEX.NDS.128.66.0F3A.WIG C4 /r ib */
- if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
- UChar modrm = getUChar(delta);
- UInt rG = gregOfRexRM(pfx, modrm);
- UInt rV = getVexNvvvv(pfx);
+ /* VPINSRB r32/m8, xmm2, xmm1 = VEX.NDS.128.66.0F3A.W0 20 /r ib */
+ if (have66noF2noF3(pfx)
+ && 0==getVexL(pfx)/*128*/ && 0==getRexW(pfx)/*W0*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
Int imm8;
- IRTemp new8 = newTemp(Ity_I64);
+ IRTemp src_u8 = newTemp(Ity_I8);
if ( epartIsReg( modrm ) ) {
- imm8 = (Int)(getUChar(delta+1) & 0xF);
- assign( new8, binop(Iop_And64,
- unop(Iop_32Uto64,
- getIReg32(eregOfRexRM(pfx,modrm))),
- mkU64(0xFF)));
+ UInt rE = eregOfRexRM(pfx,modrm);
+ imm8 = (Int)(getUChar(delta+1) & 15);
+ assign( src_u8, unop(Iop_32to8, getIReg32( rE )) );
delta += 1+1;
- DIP( "vpinsrb $%d,%s,%s\n", imm8,
- nameIReg32( eregOfRexRM(pfx, modrm) ), nameXMMReg(rG) );
+ DIP( "vpinsrb $%d,%s,%s,%s\n",
+ imm8, nameIReg32(rE), nameXMMReg(rV), nameXMMReg(rG) );
} else {
addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
- imm8 = (Int)(getUChar(delta+alen) & 0xF);
- assign( new8, unop(Iop_8Uto64, loadLE( Ity_I8, mkexpr(addr) )));
+ imm8 = (Int)(getUChar(delta+alen) & 15);
+ assign( src_u8, loadLE( Ity_I8, mkexpr(addr) ) );
delta += alen+1;
- DIP( "vpinsrb $%d,%s,%s\n",
- imm8, dis_buf, nameXMMReg(rG) );
+ DIP( "vpinsrb $%d,%s,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG) );
}
IRTemp src_vec = newTemp(Ity_V128);
assign(src_vec, getXMMReg( rV ));
- putYMMRegLoAndZU( rG,
- mkexpr(math_PINSRB_128( src_vec, new8, imm8 )) );
+ IRTemp res_vec = math_PINSRB_128( src_vec, src_u8, imm8 );
+ putYMMRegLoAndZU( rG, mkexpr(res_vec) );
*uses_vvvv = True;
goto decode_success;
}
+ break;
case 0x21:
/* VINSERTPS imm8, xmm3/m32, xmm2, xmm1
@@ -23309,6 +23344,39 @@
}
break;
+ case 0x41:
+ /* VDPPD xmm3/m128,xmm2,xmm1 = VEX.NDS.128.66.0F3A.WIG 41 /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp dst_vec = newTemp(Ity_V128);
+ Int imm8;
+ if (epartIsReg( modrm )) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ imm8 = (Int)getUChar(delta+1);
+ assign( dst_vec, getXMMReg( rE ) );
+ delta += 1+1;
+ DIP( "vdppd $%d,%s,%s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ imm8 = (Int)getUChar(delta+alen);
+ assign( dst_vec, loadLE( Ity_V128, mkexpr(addr) ) );
+ delta += alen+1;
+ DIP( "vdppd $%d,%s,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG) );
+ }
+
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg( rV ));
+ IRTemp res_vec = math_DPPD_128( src_vec, dst_vec, imm8 );
+ putYMMRegLoAndZU( rG, mkexpr(res_vec) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ break;
+
case 0x4C:
/* VPBLENDVB xmmG, xmmE/memE, xmmV, xmmIS4
::: xmmG:V128 = PBLEND(xmmE, xmmV, xmmIS4) (RMVR) */
|
|
From: <sv...@va...> - 2012-06-18 14:06:06
|
sewardj 2012-06-18 15:05:52 +0100 (Mon, 18 Jun 2012)
New Revision: 2387
Log:
More AVX insns:
VMOVSD xmm3, xmm2, xmm1 = VEX.LIG.F2.0F.WIG 10 /r
VMOVSD xmm3, xmm2, xmm1 = VEX.LIG.F2.0F.WIG 11 /r
VMOVLPD m64, xmm1, xmm2 = VEX.NDS.128.66.0F.WIG 12 /r
VMOVLPD xmm1, m64 = VEX.128.66.0F.WIG 13 /r
VPINSRW r32/m16, xmm2, xmm1 = VEX.NDS.128.66.0F.WIG C4 /r ib
VSHUFPD imm8, xmm3/m128, xmm2, xmm1, xmm2
VSHUFPD imm8, ymm3/m256, ymm2, ymm1, ymm2
VPERMILPS imm8, xmm2/m128, xmm1 = VEX.128.66.0F3A.WIG 04 /r ib
VBLENDPS imm8, ymm3/m256, ymm2, ymm1
VBLENDPS = VEX.NDS.128.66.0F3A.WIG 0C /r ib
VBLENDPD = VEX.NDS.256.66.0F3A.WIG 0D /r ib
VBLENDPD = VEX.NDS.128.66.0F3A.WIG 0D /r ib
VPBLENDW = VEX.NDS.128.66.0F3A.WIG 0E /r ib
VPINSRB r32/m8, xmm2, xmm1 = VEX.NDS.128.66.0F3A.WIG C4 /r ib
(Jakub Jelinek, ja...@re...). #273475 comment 110.
Modified files:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c (+579 -99)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2012-06-18 14:56:55 +01:00 (rev 2386)
+++ trunk/priv/guest_amd64_toIR.c 2012-06-18 15:05:52 +01:00 (rev 2387)
@@ -9956,6 +9956,139 @@
}
+static IRTemp math_SHUFPD_128 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ IRTemp s1 = newTemp(Ity_I64);
+ IRTemp s0 = newTemp(Ity_I64);
+ IRTemp d1 = newTemp(Ity_I64);
+ IRTemp d0 = newTemp(Ity_I64);
+
+ assign( d1, unop(Iop_V128HIto64, mkexpr(dV)) );
+ assign( d0, unop(Iop_V128to64, mkexpr(dV)) );
+ assign( s1, unop(Iop_V128HIto64, mkexpr(sV)) );
+ assign( s0, unop(Iop_V128to64, mkexpr(sV)) );
+
+# define SELD(n) mkexpr((n)==0 ? d0 : d1)
+# define SELS(n) mkexpr((n)==0 ? s0 : s1)
+
+ IRTemp res = newTemp(Ity_V128);
+ assign(res, binop( Iop_64HLtoV128,
+ SELS((imm8>>1)&1), SELD((imm8>>0)&1) ) );
+
+# undef SELD
+# undef SELS
+ return res;
+}
+
+
+static IRTemp math_SHUFPD_256 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ IRTemp sVhi = IRTemp_INVALID, sVlo = IRTemp_INVALID;
+ IRTemp dVhi = IRTemp_INVALID, dVlo = IRTemp_INVALID;
+ breakupV256toV128s( sV, &sVhi, &sVlo );
+ breakupV256toV128s( dV, &dVhi, &dVlo );
+ IRTemp rVhi = math_SHUFPD_128(sVhi, dVhi, (imm8 >> 2) & 3);
+ IRTemp rVlo = math_SHUFPD_128(sVlo, dVlo, imm8 & 3);
+ IRTemp rV = newTemp(Ity_V256);
+ assign(rV, binop(Iop_V128HLtoV256, mkexpr(rVhi), mkexpr(rVlo)));
+ return rV;
+}
+
+
+static IRTemp math_BLENDPD_128 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ UShort imm8_mask_16;
+ IRTemp imm8_mask = newTemp(Ity_V128);
+
+ switch( imm8 & 3 ) {
+ case 0: imm8_mask_16 = 0x0000; break;
+ case 1: imm8_mask_16 = 0x00FF; break;
+ case 2: imm8_mask_16 = 0xFF00; break;
+ case 3: imm8_mask_16 = 0xFFFF; break;
+ default: vassert(0); break;
+ }
+ assign( imm8_mask, mkV128( imm8_mask_16 ) );
+
+ IRTemp res = newTemp(Ity_V128);
+ assign ( res, binop( Iop_OrV128,
+ binop( Iop_AndV128, mkexpr(sV),
+ mkexpr(imm8_mask) ),
+ binop( Iop_AndV128, mkexpr(dV),
+ unop( Iop_NotV128, mkexpr(imm8_mask) ) ) ) );
+ return res;
+}
+
+
+static IRTemp math_BLENDPD_256 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ IRTemp sVhi = IRTemp_INVALID, sVlo = IRTemp_INVALID;
+ IRTemp dVhi = IRTemp_INVALID, dVlo = IRTemp_INVALID;
+ breakupV256toV128s( sV, &sVhi, &sVlo );
+ breakupV256toV128s( dV, &dVhi, &dVlo );
+ IRTemp rVhi = math_BLENDPD_128(sVhi, dVhi, (imm8 >> 2) & 3);
+ IRTemp rVlo = math_BLENDPD_128(sVlo, dVlo, imm8 & 3);
+ IRTemp rV = newTemp(Ity_V256);
+ assign(rV, binop(Iop_V128HLtoV256, mkexpr(rVhi), mkexpr(rVlo)));
+ return rV;
+}
+
+
+static IRTemp math_BLENDPS_128 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ UShort imm8_perms[16] = { 0x0000, 0x000F, 0x00F0, 0x00FF, 0x0F00,
+ 0x0F0F, 0x0FF0, 0x0FFF, 0xF000, 0xF00F,
+ 0xF0F0, 0xF0FF, 0xFF00, 0xFF0F, 0xFFF0,
+ 0xFFFF };
+ IRTemp imm8_mask = newTemp(Ity_V128);
+ assign( imm8_mask, mkV128( imm8_perms[ (imm8 & 15) ] ) );
+
+ IRTemp res = newTemp(Ity_V128);
+ assign ( res, binop( Iop_OrV128,
+ binop( Iop_AndV128, mkexpr(sV),
+ mkexpr(imm8_mask) ),
+ binop( Iop_AndV128, mkexpr(dV),
+ unop( Iop_NotV128, mkexpr(imm8_mask) ) ) ) );
+ return res;
+}
+
+
+static IRTemp math_BLENDPS_256 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ IRTemp sVhi = IRTemp_INVALID, sVlo = IRTemp_INVALID;
+ IRTemp dVhi = IRTemp_INVALID, dVlo = IRTemp_INVALID;
+ breakupV256toV128s( sV, &sVhi, &sVlo );
+ breakupV256toV128s( dV, &dVhi, &dVlo );
+ IRTemp rVhi = math_BLENDPS_128(sVhi, dVhi, (imm8 >> 4) & 15);
+ IRTemp rVlo = math_BLENDPS_128(sVlo, dVlo, imm8 & 15);
+ IRTemp rV = newTemp(Ity_V256);
+ assign(rV, binop(Iop_V128HLtoV256, mkexpr(rVhi), mkexpr(rVlo)));
+ return rV;
+}
+
+
+static IRTemp math_PBLENDW_128 ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ /* Make w be a 16-bit version of imm8, formed by duplicating each
+ bit in imm8. */
+ Int i;
+ UShort imm16 = 0;
+ for (i = 0; i < 8; i++) {
+ if (imm8 & (1 << i))
+ imm16 |= (3 << (2*i));
+ }
+ IRTemp imm16_mask = newTemp(Ity_V128);
+ assign( imm16_mask, mkV128( imm16 ));
+
+ IRTemp res = newTemp(Ity_V128);
+ assign ( res, binop( Iop_OrV128,
+ binop( Iop_AndV128, mkexpr(sV),
+ mkexpr(imm16_mask) ),
+ binop( Iop_AndV128, mkexpr(dV),
+ unop( Iop_NotV128, mkexpr(imm16_mask) ) ) ) );
+ return res;
+}
+
+
static IRTemp math_PMULUDQ_128 ( IRTemp sV, IRTemp dV )
{
/* This is a really poor translation -- could be improved if
@@ -12453,10 +12586,6 @@
Int select;
IRTemp sV = newTemp(Ity_V128);
IRTemp dV = newTemp(Ity_V128);
- IRTemp s1 = newTemp(Ity_I64);
- IRTemp s0 = newTemp(Ity_I64);
- IRTemp d1 = newTemp(Ity_I64);
- IRTemp d0 = newTemp(Ity_I64);
modrm = getUChar(delta);
assign( dV, getXMMReg(gregOfRexRM(pfx,modrm)) );
@@ -12478,22 +12607,8 @@
nameXMMReg(gregOfRexRM(pfx,modrm)));
}
- assign( d1, unop(Iop_V128HIto64, mkexpr(dV)) );
- assign( d0, unop(Iop_V128to64, mkexpr(dV)) );
- assign( s1, unop(Iop_V128HIto64, mkexpr(sV)) );
- assign( s0, unop(Iop_V128to64, mkexpr(sV)) );
-
-# define SELD(n) mkexpr((n)==0 ? d0 : d1)
-# define SELS(n) mkexpr((n)==0 ? s0 : s1)
-
- putXMMReg(
- gregOfRexRM(pfx,modrm),
- binop(Iop_64HLtoV128, SELS((select>>1)&1), SELD((select>>0)&1) )
- );
-
-# undef SELD
-# undef SELS
-
+ IRTemp res = math_SHUFPD_128( sV, dV, select );
+ putXMMReg( gregOfRexRM(pfx,modrm), mkexpr(res) );
goto decode_success;
}
break;
@@ -15886,6 +16001,31 @@
}
+static IRTemp math_PINSRB_128 ( IRTemp v128, IRTemp u8, UInt imm8 )
+{
+ // Create a V128 value which has the selected byte in the
+ // specified lane, and zeroes everywhere else.
+ IRTemp tmp128 = newTemp(Ity_V128);
+ IRTemp halfshift = newTemp(Ity_I64);
+ assign(halfshift, binop(Iop_Shl64,
+ mkexpr(u8), mkU8(8 * (imm8 & 7))));
+ vassert(imm8 >= 0 && imm8 <= 15);
+ if (imm8 < 8) {
+ assign(tmp128, binop(Iop_64HLtoV128, mkU64(0), mkexpr(halfshift)));
+ } else {
+ assign(tmp128, binop(Iop_64HLtoV128, mkexpr(halfshift), mkU64(0)));
+ }
+
+ UShort mask = ~(1 << imm8);
+
+ IRTemp res = newTemp(Ity_V128);
+ assign(res, binop( Iop_OrV128, mkexpr(tmp128),
+ binop( Iop_AndV128,
+ mkexpr(v128), mkV128(mask) ) ) );
+ return res;
+}
+
+
static IRTemp math_PINSRD_128 ( IRTemp v128, IRTemp u32, UInt imm8 )
{
IRTemp z32 = newTemp(Ity_I32);
@@ -16247,20 +16387,8 @@
imm8, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
}
- UShort imm8_perms[16] = { 0x0000, 0x000F, 0x00F0, 0x00FF, 0x0F00,
- 0x0F0F, 0x0FF0, 0x0FFF, 0xF000, 0xF00F,
- 0xF0F0, 0xF0FF, 0xFF00, 0xFF0F, 0xFFF0,
- 0xFFFF };
- IRTemp imm8_mask = newTemp(Ity_V128);
- assign( imm8_mask, mkV128( imm8_perms[ (imm8 & 15) ] ) );
-
putXMMReg( gregOfRexRM(pfx, modrm),
- binop( Iop_OrV128,
- binop( Iop_AndV128, mkexpr(src_vec),
- mkexpr(imm8_mask) ),
- binop( Iop_AndV128, mkexpr(dst_vec),
- unop( Iop_NotV128, mkexpr(imm8_mask) ) ) ) );
-
+ mkexpr( math_BLENDPS_128( src_vec, dst_vec, imm8) ) );
goto decode_success;
}
break;
@@ -16271,11 +16399,8 @@
if (have66noF2noF3(pfx) && sz == 2) {
Int imm8;
- UShort imm8_mask_16;
-
IRTemp dst_vec = newTemp(Ity_V128);
IRTemp src_vec = newTemp(Ity_V128);
- IRTemp imm8_mask = newTemp(Ity_V128);
modrm = getUChar(delta);
assign( dst_vec, getXMMReg( gregOfRexRM(pfx, modrm) ) );
@@ -16298,22 +16423,8 @@
imm8, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
}
- switch( imm8 & 3 ) {
- case 0: imm8_mask_16 = 0x0000; break;
- case 1: imm8_mask_16 = 0x00FF; break;
- case 2: imm8_mask_16 = 0xFF00; break;
- case 3: imm8_mask_16 = 0xFFFF; break;
- default: vassert(0); break;
- }
- assign( imm8_mask, mkV128( imm8_mask_16 ) );
-
putXMMReg( gregOfRexRM(pfx, modrm),
- binop( Iop_OrV128,
- binop( Iop_AndV128, mkexpr(src_vec),
- mkexpr(imm8_mask) ),
- binop( Iop_AndV128, mkexpr(dst_vec),
- unop( Iop_NotV128, mkexpr(imm8_mask) ) ) ) );
-
+ mkexpr( math_BLENDPD_128( src_vec, dst_vec, imm8) ) );
goto decode_success;
}
break;
@@ -16349,24 +16460,8 @@
imm8, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
}
- /* Make w be a 16-bit version of imm8, formed by duplicating each
- bit in imm8. */
- Int i;
- UShort imm16 = 0;
- for (i = 0; i < 8; i++) {
- if (imm8 & (1 << i))
- imm16 |= (3 << (2*i));
- }
- IRTemp imm16_mask = newTemp(Ity_V128);
- assign( imm16_mask, mkV128( imm16 ));
-
putXMMReg( gregOfRexRM(pfx, modrm),
- binop( Iop_OrV128,
- binop( Iop_AndV128, mkexpr(src_vec),
- mkexpr(imm16_mask) ),
- binop( Iop_AndV128, mkexpr(dst_vec),
- unop( Iop_NotV128, mkexpr(imm16_mask) ) ) ) );
-
+ mkexpr( math_PBLENDW_128( src_vec, dst_vec, imm8) ) );
goto decode_success;
}
break;
@@ -16510,6 +16605,7 @@
IRTemp new8 = newTemp(Ity_I64);
modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
if ( epartIsReg( modrm ) ) {
imm8 = (Int)(getUChar(delta+1) & 0xF);
@@ -16530,28 +16626,9 @@
imm8, dis_buf, nameXMMReg( gregOfRexRM(pfx, modrm) ) );
}
- // Create a V128 value which has the selected byte in the
- // specified lane, and zeroes everywhere else.
- IRTemp tmp128 = newTemp(Ity_V128);
- IRTemp halfshift = newTemp(Ity_I64);
- assign(halfshift, binop(Iop_Shl64,
- mkexpr(new8), mkU8(8 * (imm8 & 7))));
- vassert(imm8 >= 0 && imm8 <= 15);
- if (imm8 < 8) {
- assign(tmp128, binop(Iop_64HLtoV128, mkU64(0), mkexpr(halfshift)));
- } else {
- assign(tmp128, binop(Iop_64HLtoV128, mkexpr(halfshift), mkU64(0)));
- }
-
- UShort mask = ~(1 << imm8);
-
- putXMMReg( gregOfRexRM(pfx, modrm),
- binop( Iop_OrV128,
- mkexpr(tmp128),
- binop( Iop_AndV128,
- getXMMReg( gregOfRexRM(pfx, modrm) ),
- mkV128(mask) ) ) );
-
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg( rG ));
+ putXMMReg( rG, mkexpr(math_PINSRB_128( src_vec, new8, imm8 )) );
goto decode_success;
}
break;
@@ -20120,6 +20197,24 @@
delta += alen;
goto decode_success;
}
+ /* VMOVSD xmm3, xmm2, xmm1 = VEX.LIG.F2.0F.WIG 10 /r */
+ /* Reg form. */
+ if (haveF2no66noF3(pfx) && epartIsReg(getUChar(delta))) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rE = eregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ delta++;
+ DIP("vmovsd %s,%s,%s\n",
+ nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ IRTemp res = newTemp(Ity_V128);
+ assign(res, binop(Iop_64HLtoV128,
+ getXMMRegLane64(rV, 1),
+ getXMMRegLane64(rE, 0)));
+ putYMMRegLoAndZU(rG, mkexpr(res));
+ *uses_vvvv = True;
+ goto decode_success;
+ }
/* VMOVSS m32, xmm1 = VEX.LIG.F3.0F.WIG 10 /r */
/* Move 32 bits from E (mem only) to G (lo half xmm).
Bits 255-32 of the dest are zeroed out. */
@@ -20203,6 +20298,24 @@
delta += alen;
goto decode_success;
}
+ /* VMOVSD xmm3, xmm2, xmm1 = VEX.LIG.F2.0F.WIG 11 /r */
+ /* Reg form. */
+ if (haveF2no66noF3(pfx) && epartIsReg(getUChar(delta))) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rE = eregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ delta++;
+ DIP("vmovsd %s,%s,%s\n",
+ nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ IRTemp res = newTemp(Ity_V128);
+ assign(res, binop(Iop_64HLtoV128,
+ getXMMRegLane64(rV, 1),
+ getXMMRegLane64(rE, 0)));
+ putYMMRegLoAndZU(rG, mkexpr(res));
+ *uses_vvvv = True;
+ goto decode_success;
+ }
/* VMOVSS xmm1, m64 = VEX.LIG.F3.0F.WIG 11 /r */
/* Move 32 bits from G (low 1/4 xmm) to mem only. */
if (haveF3no66noF2(pfx) && !epartIsReg(getUChar(delta))) {
@@ -20293,8 +20406,42 @@
*uses_vvvv = True;
goto decode_success;
}
+ /* VMOVLPD m64, xmm1, xmm2 = VEX.NDS.128.66.0F.WIG 12 /r */
+ /* Insn exists only in mem form, it appears. */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/
+ && !epartIsReg(getUChar(delta))) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ delta += alen;
+ DIP("vmovlpd %s,%s,%s\n",
+ dis_buf, nameXMMReg(rV), nameXMMReg(rG));
+ IRTemp res = newTemp(Ity_V128);
+ assign(res, binop(Iop_64HLtoV128,
+ getXMMRegLane64(rV, 1),
+ loadLE(Ity_I64, mkexpr(addr))));
+ putYMMRegLoAndZU(rG, mkexpr(res));
+ *uses_vvvv = True;
+ goto decode_success;
+ }
break;
+ case 0x13:
+ /* VMOVLPD xmm1, m64 = VEX.128.66.0F.WIG 13 /r */
+ /* Insn exists only in mem form, it appears. */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/
+ && !epartIsReg(getUChar(delta))) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 0 );
+ delta += alen;
+ storeLE( mkexpr(addr), getXMMRegLane64( rG, 0));
+ DIP("vmovlpd %s,%s\n", nameXMMReg(rG), dis_buf);
+ goto decode_success;
+ }
+ break;
+
case 0x14:
case 0x15:
/* VUNPCKLPS xmm3/m128, xmm2, xmm1 = VEX.NDS.128.0F.WIG 14 /r */
@@ -21729,6 +21876,57 @@
}
break;
+ case 0xC4:
+ /* VPINSRW r32/m16, xmm2, xmm1 = VEX.NDS.128.66.0F.WIG C4 /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ Int imm8;
+ IRTemp new16 = newTemp(Ity_I64);
+
+ if ( epartIsReg( modrm ) ) {
+ imm8 = (Int)(getUChar(delta+1) & 7);
+ assign( new16, binop(Iop_And64,
+ unop(Iop_32Uto64,
+ getIReg32(eregOfRexRM(pfx,modrm))),
+ mkU64(0xFFFF)));
+ delta += 1+1;
+ DIP( "vpinsrw $%d,%s,%s\n", imm8,
+ nameIReg32( eregOfRexRM(pfx, modrm) ), nameXMMReg(rG) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ imm8 = (Int)(getUChar(delta+alen) & 7);
+ assign( new16, unop(Iop_16Uto64, loadLE( Ity_I16, mkexpr(addr) )));
+ delta += alen+1;
+ DIP( "vpinsrw $%d,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rG) );
+ }
+
+ // Create a V128 value which has the selected word in the
+ // specified lane, and zeroes everywhere else.
+ IRTemp tmp128 = newTemp(Ity_V128);
+ IRTemp halfshift = newTemp(Ity_I64);
+ assign(halfshift, binop(Iop_Shl64,
+ mkexpr(new16), mkU8(16 * (imm8 & 3))));
+ if (imm8 < 4) {
+ assign(tmp128, binop(Iop_64HLtoV128, mkU64(0), mkexpr(halfshift)));
+ } else {
+ assign(tmp128, binop(Iop_64HLtoV128, mkexpr(halfshift), mkU64(0)));
+ }
+
+ UShort mask = ~(3 << (imm8 * 2));
+
+ putYMMRegLoAndZU( rG,
+ binop( Iop_OrV128,
+ mkexpr(tmp128),
+ binop( Iop_AndV128,
+ getXMMReg( rV ),
+ mkV128(mask) ) ) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+
case 0xC5:
/* VPEXTRW imm8, xmm1, reg32 = VEX.128.66.0F.W0 C5 /r ib */
if (have66noF2noF3(pfx)
@@ -21802,6 +22000,66 @@
*uses_vvvv = True;
goto decode_success;
}
+ /* VSHUFPD imm8, xmm3/m128, xmm2, xmm1, xmm2 */
+ /* = VEX.NDS.128.66.0F.WIG C6 /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ Int imm8 = 0;
+ IRTemp eV = newTemp(Ity_V128);
+ IRTemp vV = newTemp(Ity_V128);
+ UInt modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ UInt rV = getVexNvvvv(pfx);
+ assign( vV, getXMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( eV, getXMMReg(rE) );
+ imm8 = (Int)getUChar(delta+1) & 7;
+ delta += 1+1;
+ DIP("vshufpd $%d,%s,%s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 );
+ assign( eV, loadLE(Ity_V128, mkexpr(addr)) );
+ imm8 = (Int)getUChar(delta+alen) & 7;
+ delta += 1+alen;
+ DIP("vshufpd $%d,%s,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG));
+ }
+ IRTemp res = math_SHUFPD_128( eV, vV, imm8 );
+ putYMMRegLoAndZU( rG, mkexpr(res) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ /* VSHUFPD imm8, ymm3/m256, ymm2, ymm1, ymm2 */
+ /* = VEX.NDS.256.66.0F.WIG C6 /r ib */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ Int imm8 = 0;
+ IRTemp eV = newTemp(Ity_V256);
+ IRTemp vV = newTemp(Ity_V256);
+ UInt modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx,modrm);
+ UInt rV = getVexNvvvv(pfx);
+ assign( vV, getYMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx,modrm);
+ assign( eV, getYMMReg(rE) );
+ imm8 = (Int)getUChar(delta+1) & 7;
+ delta += 1+1;
+ DIP("vshufpd $%d,%s,%s,%s\n",
+ imm8, nameYMMReg(rE), nameYMMReg(rV), nameYMMReg(rG));
+ } else {
+ addr = disAMode ( &alen, vbi, pfx, delta, dis_buf, 1 );
+ assign( eV, loadLE(Ity_V256, mkexpr(addr)) );
+ imm8 = (Int)getUChar(delta+alen) & 7;
+ delta += 1+alen;
+ DIP("vshufpd $%d,%s,%s,%s\n",
+ imm8, dis_buf, nameYMMReg(rV), nameYMMReg(rG));
+ }
+ IRTemp res = math_SHUFPD_256( eV, vV, imm8 );
+ putYMMReg( rG, mkexpr(res) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
break;
case 0xD4:
@@ -22441,9 +22699,8 @@
switch (opc) {
case 0x04:
- /* VPERMILPS imm8, ymm2/m256, ymm1 = VEX.256.66.0F3A.W0 04 /r ib */
- if (have66noF2noF3(pfx)
- && 1==getVexL(pfx)/*256*/ && 0==getRexW(pfx)/*W0*/) {
+ /* VPERMILPS imm8, ymm2/m256, ymm1 = VEX.256.66.0F3A.WIG 04 /r ib */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
UChar modrm = getUChar(delta);
UInt imm8 = 0;
UInt rG = gregOfRexRM(pfx, modrm);
@@ -22472,12 +22729,36 @@
putYMMReg(rG, res);
goto decode_success;
}
+ /* VPERMILPS imm8, xmm2/m128, xmm1 = VEX.128.66.0F3A.WIG 04 /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt imm8 = 0;
+ UInt rG = gregOfRexRM(pfx, modrm);
+ IRTemp sV = newTemp(Ity_V128);
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ delta += 1;
+ imm8 = getUChar(delta);
+ DIP("vpermilps $%u,%s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rG));
+ assign(sV, getXMMReg(rE));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ delta += alen;
+ imm8 = getUChar(delta);
+ DIP("vpermilps $%u,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rG));
+ assign(sV, loadLE(Ity_V128, mkexpr(addr)));
+ }
+ delta++;
+ putYMMRegLoAndZU(rG, mkexpr ( math_VPERMILPS_128 ( sV, imm8 ) ) );
+ goto decode_success;
+ }
break;
case 0x05:
- /* VPERMILPD imm8, xmm2/m128, xmm1 = VEX.128.66.0F3A.W0 05 /r ib */
- if (have66noF2noF3(pfx)
- && 0==getVexL(pfx)/*128*/ && 0==getRexW(pfx)/*W0*/) {
+ /* VPERMILPD imm8, xmm2/m128, xmm1 = VEX.128.66.0F3A.WIG 05 /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
UChar modrm = getUChar(delta);
UInt imm8 = 0;
UInt rG = gregOfRexRM(pfx, modrm);
@@ -22509,9 +22790,8 @@
putYMMRegLoAndZU(rG, mkexpr(dV));
goto decode_success;
}
- /* VPERMILPD imm8, ymm2/m256, ymm1 = VEX.256.66.0F3A.W0 05 /r ib */
- if (have66noF2noF3(pfx)
- && 1==getVexL(pfx)/*256*/ && 0==getRexW(pfx)/*W0*/) {
+ /* VPERMILPD imm8, ymm2/m256, ymm1 = VEX.256.66.0F3A.WIG 05 /r ib */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
UChar modrm = getUChar(delta);
UInt imm8 = 0;
UInt rG = gregOfRexRM(pfx, modrm);
@@ -22592,6 +22872,171 @@
}
break;
+ case 0x0C:
+ /* VBLENDPS imm8, ymm3/m256, ymm2, ymm1 */
+ /* VBLENDPS = VEX.NDS.256.66.0F3A.WIG 0C /r ib */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ UChar modrm = getUChar(delta);
+ UInt imm8;
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp sV = newTemp(Ity_V256);
+ IRTemp sE = newTemp(Ity_V256);
+ assign ( sV, getYMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ delta += 1;
+ imm8 = getUChar(delta);
+ DIP("vblendps $%u,%s,%s,%s\n",
+ imm8, nameYMMReg(rE), nameYMMReg(rV), nameYMMReg(rG));
+ assign(sE, getYMMReg(rE));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ delta += alen;
+ imm8 = getUChar(delta);
+ DIP("vblendps $%u,%s,%s,%s\n",
+ imm8, dis_buf, nameYMMReg(rV), nameYMMReg(rG));
+ assign(sE, loadLE(Ity_V256, mkexpr(addr)));
+ }
+ delta++;
+ putYMMReg( rG,
+ mkexpr( math_BLENDPS_256( sE, sV, imm8) ) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ /* VBLENDPS imm8, xmm3/m128, xmm2, xmm1 */
+ /* VBLENDPS = VEX.NDS.128.66.0F3A.WIG 0C /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt imm8;
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp sV = newTemp(Ity_V128);
+ IRTemp sE = newTemp(Ity_V128);
+ assign ( sV, getXMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ delta += 1;
+ imm8 = getUChar(delta);
+ DIP("vblendps $%u,%s,%s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ assign(sE, getXMMReg(rE));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ delta += alen;
+ imm8 = getUChar(delta);
+ DIP("vblendps $%u,%s,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG));
+ assign(sE, loadLE(Ity_V128, mkexpr(addr)));
+ }
+ delta++;
+ putYMMRegLoAndZU( rG,
+ mkexpr( math_BLENDPS_128( sE, sV, imm8) ) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ break;
+
+ case 0x0D:
+ /* VBLENDPD imm8, ymm3/m256, ymm2, ymm1 */
+ /* VBLENDPD = VEX.NDS.256.66.0F3A.WIG 0D /r ib */
+ if (have66noF2noF3(pfx) && 1==getVexL(pfx)/*256*/) {
+ UChar modrm = getUChar(delta);
+ UInt imm8;
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp sV = newTemp(Ity_V256);
+ IRTemp sE = newTemp(Ity_V256);
+ assign ( sV, getYMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ delta += 1;
+ imm8 = getUChar(delta);
+ DIP("vblendpd $%u,%s,%s,%s\n",
+ imm8, nameYMMReg(rE), nameYMMReg(rV), nameYMMReg(rG));
+ assign(sE, getYMMReg(rE));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ delta += alen;
+ imm8 = getUChar(delta);
+ DIP("vblendpd $%u,%s,%s,%s\n",
+ imm8, dis_buf, nameYMMReg(rV), nameYMMReg(rG));
+ assign(sE, loadLE(Ity_V256, mkexpr(addr)));
+ }
+ delta++;
+ putYMMReg( rG,
+ mkexpr( math_BLENDPD_256( sE, sV, imm8) ) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ /* VBLENDPD imm8, xmm3/m128, xmm2, xmm1 */
+ /* VBLENDPD = VEX.NDS.128.66.0F3A.WIG 0D /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt imm8;
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp sV = newTemp(Ity_V128);
+ IRTemp sE = newTemp(Ity_V128);
+ assign ( sV, getXMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ delta += 1;
+ imm8 = getUChar(delta);
+ DIP("vblendpd $%u,%s,%s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ assign(sE, getXMMReg(rE));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ delta += alen;
+ imm8 = getUChar(delta);
+ DIP("vblendpd $%u,%s,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rV), nameXMMReg(rG));
+ assign(sE, loadLE(Ity_V128, mkexpr(addr)));
+ }
+ delta++;
+ putYMMRegLoAndZU( rG,
+ mkexpr( math_BLENDPD_128( sE, sV, imm8) ) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ break;
+
+ case 0x0E:
+ /* VPBLENDW imm8, xmm3/m128, xmm2, xmm1 */
+ /* VPBLENDW = VEX.NDS.128.66.0F3A.WIG 0E /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt imm8;
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp sV = newTemp(Ity_V128);
+ IRTemp sE = newTemp(Ity_V128);
+ assign ( sV, getXMMReg(rV) );
+ if (epartIsReg(modrm)) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ delta += 1;
+ imm8 = getUChar(delta);
+ DIP("vpblendw $%u,%s,%s,%s\n",
+ imm8, nameXMMReg(rE), nameXMMReg(rV), nameXMMReg(rG));
+ assign(sE, getXMMReg(rE));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ delta += alen;
+ imm8 = getUChar(delta);
+ DIP("vpblendw $%u,%s,%s,%s\n",
+ imm8, dis_buf, nameYMMReg(rV), nameYMMReg(rG));
+ assign(sE, loadLE(Ity_V128, mkexpr(addr)));
+ }
+ delta++;
+ putYMMRegLoAndZU( rG,
+ mkexpr( math_PBLENDW_128( sE, sV, imm8) ) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ break;
+
+
case 0x0F:
/* VPALIGNR imm8, xmm3/m128, xmm2, xmm1 */
/* VPALIGNR = VEX.NDS.128.66.0F3A.WIG 0F /r ib */
@@ -22722,6 +23167,41 @@
}
break;
+ case 0x20:
+ /* VPINSRB r32/m8, xmm2, xmm1 = VEX.NDS.128.66.0F3A.WIG C4 /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ Int imm8;
+ IRTemp new8 = newTemp(Ity_I64);
+
+ if ( epartIsReg( modrm ) ) {
+ imm8 = (Int)(getUChar(delta+1) & 0xF);
+ assign( new8, binop(Iop_And64,
+ unop(Iop_32Uto64,
+ getIReg32(eregOfRexRM(pfx,modrm))),
+ mkU64(0xFF)));
+ delta += 1+1;
+ DIP( "vpinsrb $%d,%s,%s\n", imm8,
+ nameIReg32( eregOfRexRM(pfx, modrm) ), nameXMMReg(rG) );
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ imm8 = (Int)(getUChar(delta+alen) & 0xF);
+ assign( new8, unop(Iop_8Uto64, loadLE( Ity_I8, mkexpr(addr) )));
+ delta += alen+1;
+ DIP( "vpinsrb $%d,%s,%s\n",
+ imm8, dis_buf, nameXMMReg(rG) );
+ }
+
+ IRTemp src_vec = newTemp(Ity_V128);
+ assign(src_vec, getXMMReg( rV ));
+ putYMMRegLoAndZU( rG,
+ mkexpr(math_PINSRB_128( src_vec, new8, imm8 )) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+
case 0x21:
/* VINSERTPS imm8, xmm3/m32, xmm2, xmm1
= VEX.NDS.128.66.0F3A.WIG 21 /r ib */
|
|
From: <sv...@va...> - 2012-06-18 13:57:13
|
sewardj 2012-06-18 14:56:55 +0100 (Mon, 18 Jun 2012)
New Revision: 2386
Log:
More AVX insns:
VBROADCASTSS m32, ymm1 = VEX.256.66.0F38.WIG 18 /r
VPALIGNR imm8, xmm3/m128, xmm2, xmm1
(Jakub Jelinek, ja...@re...). #273475 comment 109.
Modified files:
trunk/priv/guest_amd64_toIR.c
Modified: trunk/priv/guest_amd64_toIR.c (+120 -58)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2012-06-15 21:55:43 +01:00 (rev 2385)
+++ trunk/priv/guest_amd64_toIR.c 2012-06-18 14:56:55 +01:00 (rev 2386)
@@ -9138,6 +9138,65 @@
);
}
+static IRTemp math_PALIGNR_XMM ( IRTemp sV, IRTemp dV, UInt imm8 )
+{
+ IRTemp res = newTemp(Ity_V128);
+ IRTemp sHi = newTemp(Ity_I64);
+ IRTemp sLo = newTemp(Ity_I64);
+ IRTemp dHi = newTemp(Ity_I64);
+ IRTemp dLo = newTemp(Ity_I64);
+ IRTemp rHi = newTemp(Ity_I64);
+ IRTemp rLo = newTemp(Ity_I64);
+
+ assign( dHi, unop(Iop_V128HIto64, mkexpr(dV)) );
+ assign( dLo, unop(Iop_V128to64, mkexpr(dV)) );
+ assign( sHi, unop(Iop_V128HIto64, mkexpr(sV)) );
+ assign( sLo, unop(Iop_V128to64, mkexpr(sV)) );
+
+ if (imm8 == 0) {
+ assign( rHi, mkexpr(sHi) );
+ assign( rLo, mkexpr(sLo) );
+ }
+ else if (imm8 >= 1 && imm8 <= 7) {
+ assign( rHi, dis_PALIGNR_XMM_helper(dLo, sHi, imm8) );
+ assign( rLo, dis_PALIGNR_XMM_helper(sHi, sLo, imm8) );
+ }
+ else if (imm8 == 8) {
+ assign( rHi, mkexpr(dLo) );
+ assign( rLo, mkexpr(sHi) );
+ }
+ else if (imm8 >= 9 && imm8 <= 15) {
+ assign( rHi, dis_PALIGNR_XMM_helper(dHi, dLo, imm8-8) );
+ assign( rLo, dis_PALIGNR_XMM_helper(dLo, sHi, imm8-8) );
+ }
+ else if (imm8 == 16) {
+ assign( rHi, mkexpr(dHi) );
+ assign( rLo, mkexpr(dLo) );
+ }
+ else if (imm8 >= 17 && imm8 <= 23) {
+ assign( rHi, binop(Iop_Shr64, mkexpr(dHi), mkU8(8*(imm8-16))) );
+ assign( rLo, dis_PALIGNR_XMM_helper(dHi, dLo, imm8-16) );
+ }
+ else if (imm8 == 24) {
+ assign( rHi, mkU64(0) );
+ assign( rLo, mkexpr(dHi) );
+ }
+ else if (imm8 >= 25 && imm8 <= 31) {
+ assign( rHi, mkU64(0) );
+ assign( rLo, binop(Iop_Shr64, mkexpr(dHi), mkU8(8*(imm8-24))) );
+ }
+ else if (imm8 >= 32 && imm8 <= 255) {
+ assign( rHi, mkU64(0) );
+ assign( rLo, mkU64(0) );
+ }
+ else
+ vassert(0);
+
+ assign( res, binop(Iop_64HLtoV128, mkexpr(rHi), mkexpr(rLo)));
+ return res;
+}
+
+
/* Generate a SIGSEGV followed by a restart of the current instruction
if effective_addr is not 16-aligned. This is required behaviour
for some SSE3 instructions and all 128-bit SSSE3 instructions.
@@ -14289,12 +14348,6 @@
&& (sz == 2 || /*redundant REX.W*/ sz == 8)) {
IRTemp sV = newTemp(Ity_V128);
IRTemp dV = newTemp(Ity_V128);
- IRTemp sHi = newTemp(Ity_I64);
- IRTemp sLo = newTemp(Ity_I64);
- IRTemp dHi = newTemp(Ity_I64);
- IRTemp dLo = newTemp(Ity_I64);
- IRTemp rHi = newTemp(Ity_I64);
- IRTemp rLo = newTemp(Ity_I64);
modrm = getUChar(delta);
assign( dV, getXMMReg(gregOfRexRM(pfx,modrm)) );
@@ -14317,54 +14370,8 @@
nameXMMReg(gregOfRexRM(pfx,modrm)));
}
- assign( dHi, unop(Iop_V128HIto64, mkexpr(dV)) );
- assign( dLo, unop(Iop_V128to64, mkexpr(dV)) );
- assign( sHi, unop(Iop_V128HIto64, mkexpr(sV)) );
- assign( sLo, unop(Iop_V128to64, mkexpr(sV)) );
-
- if (d64 == 0) {
- assign( rHi, mkexpr(sHi) );
- assign( rLo, mkexpr(sLo) );
- }
- else if (d64 >= 1 && d64 <= 7) {
- assign( rHi, dis_PALIGNR_XMM_helper(dLo, sHi, d64) );
- assign( rLo, dis_PALIGNR_XMM_helper(sHi, sLo, d64) );
- }
- else if (d64 == 8) {
- assign( rHi, mkexpr(dLo) );
- assign( rLo, mkexpr(sHi) );
- }
- else if (d64 >= 9 && d64 <= 15) {
- assign( rHi, dis_PALIGNR_XMM_helper(dHi, dLo, d64-8) );
- assign( rLo, dis_PALIGNR_XMM_helper(dLo, sHi, d64-8) );
- }
- else if (d64 == 16) {
- assign( rHi, mkexpr(dHi) );
- assign( rLo, mkexpr(dLo) );
- }
- else if (d64 >= 17 && d64 <= 23) {
- assign( rHi, binop(Iop_Shr64, mkexpr(dHi), mkU8(8*(d64-16))) );
- assign( rLo, dis_PALIGNR_XMM_helper(dHi, dLo, d64-16) );
- }
- else if (d64 == 24) {
- assign( rHi, mkU64(0) );
- assign( rLo, mkexpr(dHi) );
- }
- else if (d64 >= 25 && d64 <= 31) {
- assign( rHi, mkU64(0) );
- assign( rLo, binop(Iop_Shr64, mkexpr(dHi), mkU8(8*(d64-24))) );
- }
- else if (d64 >= 32 && d64 <= 255) {
- assign( rHi, mkU64(0) );
- assign( rLo, mkU64(0) );
- }
- else
- vassert(0);
-
- putXMMReg(
- gregOfRexRM(pfx,modrm),
- binop(Iop_64HLtoV128, mkexpr(rHi), mkexpr(rLo))
- );
+ IRTemp res = math_PALIGNR_XMM( sV, dV, d64 );
+ putXMMReg( gregOfRexRM(pfx,modrm), mkexpr(res) );
goto decode_success;
}
/* 0F 3A 0F = PALIGNR -- Packed Align Right (MMX) */
@@ -22142,9 +22149,9 @@
break;
case 0x18:
- /* VBROADCASTSS m32, xmm1 = VEX.128.66.0F38.W0 18 /r */
+ /* VBROADCASTSS m32, xmm1 = VEX.128.66.0F38.WIG 18 /r */
if (have66noF2noF3(pfx)
- && 0==getVexL(pfx)/*128*/ && 0==getRexW(pfx)/*W0*/
+ && 0==getVexL(pfx)/*128*/
&& !epartIsReg(getUChar(delta))) {
UChar modrm = getUChar(delta);
UInt rG = gregOfRexRM(pfx, modrm);
@@ -22159,12 +22166,30 @@
putYMMRegLoAndZU(rG, res);
goto decode_success;
}
+ /* VBROADCASTSS m32, ymm1 = VEX.256.66.0F38.WIG 18 /r */
+ if (have66noF2noF3(pfx)
+ && 1==getVexL(pfx)/*256*/
+ && !epartIsReg(getUChar(delta))) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 0 );
+ delta += alen;
+ DIP("vbroadcastss %s,%s\n", dis_buf, nameYMMReg(rG));
+ IRTemp t32 = newTemp(Ity_I32);
+ assign(t32, loadLE(Ity_I32, mkexpr(addr)));
+ IRTemp t64 = newTemp(Ity_I64);
+ assign(t64, binop(Iop_32HLto64, mkexpr(t32), mkexpr(t32)));
+ IRExpr* res = IRExpr_Qop(Iop_64x4toV256, mkexpr(t64), mkexpr(t64),
+ mkexpr(t64), mkexpr(t64));
+ putYMMReg(rG, res);
+ goto decode_success;
+ }
break;
case 0x19:
- /* VBROADCASTSD m64, ymm1 = VEX.256.66.0F38.W0 19 /r */
+ /* VBROADCASTSD m64, ymm1 = VEX.256.66.0F38.WIG 19 /r */
if (have66noF2noF3(pfx)
- && 1==getVexL(pfx)/*256*/ && 0==getRexW(pfx)/*W0*/
+ && 1==getVexL(pfx)/*256*/
&& !epartIsReg(getUChar(delta))) {
UChar modrm = getUChar(delta);
UInt rG = gregOfRexRM(pfx, modrm);
@@ -22567,6 +22592,43 @@
}
break;
+ case 0x0F:
+ /* VPALIGNR imm8, xmm3/m128, xmm2, xmm1 */
+ /* VPALIGNR = VEX.NDS.128.66.0F3A.WIG 0F /r ib */
+ if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
+ UChar modrm = getUChar(delta);
+ UInt rG = gregOfRexRM(pfx, modrm);
+ UInt rV = getVexNvvvv(pfx);
+ IRTemp sV = newTemp(Ity_V128);
+ IRTemp dV = newTemp(Ity_V128);
+ UInt imm8;
+
+ assign( dV, getXMMReg(rV) );
+
+ if ( epartIsReg( modrm ) ) {
+ UInt rE = eregOfRexRM(pfx, modrm);
+ assign( sV, getXMMReg(rE) );
+ imm8 = getUChar(delta+1);
+ delta += 1+1;
+ DIP("vpalignr $%d,%s,%s,%s\n", imm8, nameXMMReg(rE),
+ nameXMMReg(rV), nameXMMReg(rG));
+ } else {
+ addr = disAMode( &alen, vbi, pfx, delta, dis_buf, 1 );
+ gen_SEGV_if_not_16_aligned( addr );
+ assign( sV, loadLE(Ity_V128, mkexpr(addr)) );
+ imm8 = getUChar(delta+alen);
+ delta += alen+1;
+ DIP("vpalignr $%d,%s,%s,%s\n", imm8, dis_buf,
+ nameXMMReg(rV), nameXMMReg(rG));
+ }
+
+ IRTemp res = math_PALIGNR_XMM( sV, dV, imm8 );
+ putYMMRegLoAndZU( rG, mkexpr(res) );
+ *uses_vvvv = True;
+ goto decode_success;
+ }
+ break;
+
case 0x14:
/* VPEXTRB imm8, xmm2, reg/m8 = VEX.128.66.0F3A.W0 14 /r ib */
if (have66noF2noF3(pfx)
|
|
From: Philippe W. <phi...@sk...> - 2012-06-18 06:17:14
|
On Sun, 2012-06-17 at 15:30 +0200, Philippe Waroquiers wrote: > On Sun, 2012-06-17 at 13:08 +0200, Julian Seward wrote: > > > On the TT/TC, I think we have two remaining problems: > > > > > > 1. race condition on the tt_fast. For this, I hope the "xor" technique > > > can be shown (proved?) as correct. > > > > I should have commented on the xor thing before. Basically I didn't > > understand it. My problem is that (G xor H, H) contains neither less > > nor more information than (G, H) -- given any 2 of G, H, G xor H, we > > can compute the third one. So I don't see how it helps. Also, I didn't > > see any mention of memory barriers/fences in the description, so it > > must be incomplete (?) since we can't specify lockless algorithms > > without also saying where the fences must be. Looking more in depth in that, I think this xor technique does not work (it just decreases the probability to have an undetected race condition or I missed something in the paper describing this technique). So, for tt_fast, back to square 1. Philippe looks like my brain is not made to think parallel and race conditions :(. |
|
From: Rich C. <rc...@wi...> - 2012-06-18 04:34:53
|
valgrind revision: 12651 VEX revision: 2385 C compiler: i686-apple-darwin10-gcc-4.2.1 (GCC) 4.2.1 (Apple Inc. build 5646) Assembler: C library: unknown uname -mrs: Darwin 10.8.0 i386 Vendor version: unknown Nightly build on macbook ( Darwin 10.8.0 i386 ) Started at 2012-06-17 23:05:00 CDT Ended at 2012-06-17 23:34:22 CDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 493 tests, 478 stderr failures, 130 stdout failures, 3 stderrB failures, 3 stdoutB failures, 32 post failures == gdbserver_tests/mchelp (stdoutB) gdbserver_tests/mchelp (stderrB) gdbserver_tests/mcinvokeRU (stdoutB) gdbserver_tests/mcinvokeRU (stderrB) gdbserver_tests/mcinvokeWS (stdoutB) gdbserver_tests/mcinvokeWS (stderrB) gdbserver_tests/nlfork_chain (stdout) gdbserver_tests/nlfork_chain (stderr) memcheck/tests/accounting (stderr) memcheck/tests/addressable (stdout) memcheck/tests/addressable (stderr) memcheck/tests/atomic_incs (stdout) memcheck/tests/atomic_incs (stderr) memcheck/tests/badaddrvalue (stdout) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badfree3 (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/big_blocks_freed_list (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/bug287260 (stderr) memcheck/tests/calloc-overflow (stderr) memcheck/tests/clientperm (stdout) memcheck/tests/clientperm (stderr) memcheck/tests/clireq_nofill (stdout) memcheck/tests/clireq_nofill (stderr) memcheck/tests/custom-overlap (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/darwin/aio (stderr) memcheck/tests/darwin/env (stderr) memcheck/tests/darwin/pth-supp (stderr) memcheck/tests/darwin/scalar (stderr) memcheck/tests/darwin/scalar_fork (stderr) memcheck/tests/darwin/scalar_nocancel (stderr) memcheck/tests/darwin/scalar_vfork (stderr) memcheck/tests/deep_templates (stdout) memcheck/tests/deep_templates (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/err_disable1 (stderr) memcheck/tests/err_disable2 (stderr) memcheck/tests/err_disable3 (stderr) memcheck/tests/err_disable4 (stderr) memcheck/tests/erringfds (stdout) memcheck/tests/erringfds (stderr) memcheck/tests/error_counts (stderr) memcheck/tests/errs1 (stderr) memcheck/tests/execve1 (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/file_locking (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/holey_buffer_too_small (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cases-full (stderr) memcheck/tests/leak-cases-possible (stderr) memcheck/tests/leak-cases-summary (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-delta (stderr) memcheck/tests/leak-pool-0 (stderr) memcheck/tests/leak-pool-1 (stderr) memcheck/tests/leak-pool-2 (stderr) memcheck/tests/leak-pool-3 (stderr) memcheck/tests/leak-pool-4 (stderr) memcheck/tests/leak-pool-5 (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/long-supps (stderr) memcheck/tests/long_namespace_xml (stdout) memcheck/tests/long_namespace_xml (stderr) memcheck/tests/mallinfo (stderr) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/malloc_free_fill (stderr) memcheck/tests/malloc_usable (stderr) memcheck/tests/manuel1 (stdout) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stdout) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stdout) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/mempool2 (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak2 (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stdout) memcheck/tests/new_override (stderr) memcheck/tests/noisy_child (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/origin1-yes (stderr) memcheck/tests/origin2-not-quite (stderr) memcheck/tests/origin3-no (stderr) memcheck/tests/origin4-many (stderr) memcheck/tests/origin5-bz2 (stdout) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/origin6-fp (stderr) memcheck/tests/overlap (stdout) memcheck/tests/overlap (stderr) memcheck/tests/partial_load_dflt (stderr) memcheck/tests/partial_load_ok (stderr) memcheck/tests/partiallydefinedeq (stdout) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pdb-realloc (stderr) memcheck/tests/pdb-realloc2 (stdout) memcheck/tests/pdb-realloc2 (stderr) memcheck/tests/pipe (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/sbfragment (stdout) memcheck/tests/sbfragment (stderr) memcheck/tests/sh-mem-random (stdout) memcheck/tests/sh-mem-random (stderr) memcheck/tests/sh-mem (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/signal2 (stdout) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/static_malloc (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/strchr (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/test-plo-no (stderr) memcheck/tests/test-plo-yes (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/unit_libcbase (stderr) memcheck/tests/unit_oset (stdout) memcheck/tests/unit_oset (stderr) memcheck/tests/varinfo1 (stderr) memcheck/tests/varinfo2 (stderr) memcheck/tests/varinfo3 (stderr) memcheck/tests/varinfo4 (stdout) memcheck/tests/varinfo4 (stderr) memcheck/tests/varinfo5 (stderr) memcheck/tests/varinfo6 (stdout) memcheck/tests/varinfo6 (stderr) memcheck/tests/vcpu_bz2 (stdout) memcheck/tests/vcpu_bz2 (stderr) memcheck/tests/vcpu_fbench (stdout) memcheck/tests/vcpu_fbench (stderr) memcheck/tests/vcpu_fnfns (stdout) memcheck/tests/vcpu_fnfns (stderr) memcheck/tests/wrap1 (stdout) memcheck/tests/wrap1 (stderr) memcheck/tests/wrap2 (stdout) memcheck/tests/wrap2 (stderr) memcheck/tests/wrap3 (stdout) memcheck/tests/wrap3 (stderr) memcheck/tests/wrap4 (stdout) memcheck/tests/wrap4 (stderr) memcheck/tests/wrap5 (stdout) memcheck/tests/wrap5 (stderr) memcheck/tests/wrap6 (stdout) memcheck/tests/wrap6 (stderr) memcheck/tests/wrap7 (stdout) memcheck/tests/wrap7 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) memcheck/tests/writev1 (stderr) memcheck/tests/x86/bug152022 (stderr) memcheck/tests/x86/espindola2 (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/fprem (stdout) memcheck/tests/x86/fprem (stderr) memcheck/tests/x86/fxsave (stdout) memcheck/tests/x86/fxsave (stderr) memcheck/tests/x86/insn_basic (stdout) memcheck/tests/x86/insn_basic (stderr) memcheck/tests/x86/insn_cmov (stdout) memcheck/tests/x86/insn_cmov (stderr) memcheck/tests/x86/insn_fpu (stdout) memcheck/tests/x86/insn_fpu (stderr) memcheck/tests/x86/insn_mmx (stdout) memcheck/tests/x86/insn_mmx (stderr) memcheck/tests/x86/insn_sse (stdout) memcheck/tests/x86/insn_sse (stderr) memcheck/tests/x86/insn_sse2 (stdout) memcheck/tests/x86/insn_sse2 (stderr) memcheck/tests/x86/more_x86_fp (stdout) memcheck/tests/x86/more_x86_fp (stderr) memcheck/tests/x86/pushfpopf (stdout) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/pushfw_x86 (stdout) memcheck/tests/x86/pushfw_x86 (stderr) memcheck/tests/x86/pushpopmem (stdout) memcheck/tests/x86/pushpopmem (stderr) memcheck/tests/x86/sse1_memory (stdout) memcheck/tests/x86/sse1_memory (stderr) memcheck/tests/x86/sse2_memory (stdout) memcheck/tests/x86/sse2_memory (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/x86/xor-undef-x86 (stdout) memcheck/tests/x86/xor-undef-x86 (stderr) memcheck/tests/xml1 (stdout) memcheck/tests/xml1 (stderr) cachegrind/tests/chdir (stderr) cachegrind/tests/clreq (stderr) cachegrind/tests/dlclose (stdout) cachegrind/tests/dlclose (stderr) cachegrind/tests/notpower2 (stderr) cachegrind/tests/wrap5 (stdout) cachegrind/tests/wrap5 (stderr) cachegrind/tests/x86/fpu-28-108 (stderr) callgrind/tests/clreq (stderr) callgrind/tests/notpower2-hwpref (stderr) callgrind/tests/notpower2-use (stderr) callgrind/tests/notpower2-wb (stderr) callgrind/tests/notpower2 (stderr) callgrind/tests/simwork-both (stdout) callgrind/tests/simwork-both (stderr) callgrind/tests/simwork-branch (stdout) callgrind/tests/simwork-branch (stderr) callgrind/tests/simwork-cache (stdout) callgrind/tests/simwork-cache (stderr) callgrind/tests/simwork1 (stdout) callgrind/tests/simwork1 (stderr) callgrind/tests/simwork2 (stdout) callgrind/tests/simwork2 (stderr) callgrind/tests/simwork3 (stdout) callgrind/tests/simwork3 (stderr) callgrind/tests/threads-use (stderr) callgrind/tests/threads (stderr) massif/tests/alloc-fns-A (stderr) massif/tests/alloc-fns-A (post) massif/tests/alloc-fns-B (stderr) massif/tests/alloc-fns-B (post) massif/tests/basic (stderr) massif/tests/basic (post) massif/tests/basic2 (stderr) massif/tests/basic2 (post) massif/tests/big-alloc (stderr) massif/tests/big-alloc (post) massif/tests/culling1 (stderr) massif/tests/culling2 (stderr) massif/tests/custom_alloc (stderr) massif/tests/custom_alloc (post) massif/tests/deep-A (stderr) massif/tests/deep-A (post) massif/tests/deep-B (stderr) massif/tests/deep-B (post) massif/tests/deep-C (stderr) massif/tests/deep-C (post) massif/tests/deep-D (stderr) massif/tests/deep-D (post) massif/tests/ignored (stderr) massif/tests/ignored (post) massif/tests/ignoring (stderr) massif/tests/ignoring (post) massif/tests/insig (stderr) massif/tests/insig (post) massif/tests/long-names (stderr) massif/tests/long-names (post) massif/tests/long-time (stderr) massif/tests/long-time (post) massif/tests/malloc_usable (stderr) massif/tests/new-cpp (stderr) massif/tests/new-cpp (post) massif/tests/no-stack-no-heap (stderr) massif/tests/no-stack-no-heap (post) massif/tests/null (stderr) massif/tests/null (post) massif/tests/one (stderr) massif/tests/one (post) massif/tests/overloaded-new (stderr) massif/tests/overloaded-new (post) massif/tests/pages_as_heap (stderr) massif/tests/peak (stderr) massif/tests/peak (post) massif/tests/peak2 (stderr) massif/tests/peak2 (post) massif/tests/realloc (stderr) massif/tests/realloc (post) massif/tests/thresholds_0_0 (stderr) massif/tests/thresholds_0_0 (post) massif/tests/thresholds_0_10 (stderr) massif/tests/thresholds_0_10 (post) massif/tests/thresholds_10_0 (stderr) massif/tests/thresholds_10_0 (post) massif/tests/thresholds_10_10 (stderr) massif/tests/thresholds_10_10 (post) massif/tests/thresholds_5_0 (stderr) massif/tests/thresholds_5_0 (post) massif/tests/thresholds_5_10 (stderr) massif/tests/thresholds_5_10 (post) massif/tests/zero1 (stderr) massif/tests/zero1 (post) massif/tests/zero2 (stderr) massif/tests/zero2 (post) lackey/tests/true (stderr) none/tests/allexec32 (stdout) none/tests/allexec32 (stderr) none/tests/allexec64 (stdout) none/tests/allexec64 (stderr) none/tests/ansi (stderr) none/tests/args (stdout) none/tests/args (stderr) none/tests/async-sigs (stderr) none/tests/bitfield1 (stderr) none/tests/bug129866 (stdout) none/tests/bug129866 (stderr) none/tests/closeall (stderr) none/tests/cmd-with-special (stderr) none/tests/cmdline5 (stderr) none/tests/coolo_sigaction (stdout) none/tests/coolo_sigaction (stderr) none/tests/coolo_strlen (stderr) none/tests/darwin/access_extended (stderr) none/tests/darwin/apple-main-arg (stderr) none/tests/darwin/rlimit (stderr) none/tests/discard (stdout) none/tests/discard (stderr) none/tests/empty-exe (stderr) none/tests/exec-sigmask (stderr) none/tests/execve (stderr) none/tests/faultstatus (stderr) none/tests/fcntl_setown (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_creat (stderr) none/tests/fdleak_dup (stderr) none/tests/fdleak_dup2 (stderr) none/tests/fdleak_fcntl (stderr) none/tests/fdleak_ipv4 (stdout) none/tests/fdleak_ipv4 (stderr) none/tests/fdleak_open (stderr) none/tests/fdleak_pipe (stderr) none/tests/fdleak_socketpair (stderr) none/tests/floored (stdout) none/tests/floored (stderr) none/tests/fork (stdout) none/tests/fork (stderr) none/tests/fucomip (stderr) none/tests/gxx304 (stderr) none/tests/manythreads (stdout) none/tests/manythreads (stderr) none/tests/map_unaligned (stderr) none/tests/map_unmap (stdout) none/tests/map_unmap (stderr) none/tests/mmap_fcntl_bug (stderr) none/tests/mq (stderr) none/tests/munmap_exe (stderr) none/tests/nestedfns (stdout) none/tests/nestedfns (stderr) none/tests/nodir (stderr) none/tests/pending (stdout) none/tests/pending (stderr) none/tests/process_vm_readv_writev (stderr) none/tests/procfs-non-linux (stderr) none/tests/pth_atfork1 (stdout) none/tests/pth_atfork1 (stderr) none/tests/pth_blockedsig (stdout) none/tests/pth_blockedsig (stderr) none/tests/pth_cancel1 (stdout) none/tests/pth_cancel1 (stderr) none/tests/pth_cancel2 (stderr) none/tests/pth_cvsimple (stdout) none/tests/pth_cvsimple (stderr) none/tests/pth_empty (stderr) none/tests/pth_exit (stderr) none/tests/pth_exit2 (stderr) none/tests/pth_mutexspeed (stdout) none/tests/pth_mutexspeed (stderr) none/tests/pth_once (stdout) none/tests/pth_once (stderr) none/tests/pth_rwlock (stderr) none/tests/pth_stackalign (stdout) none/tests/pth_stackalign (stderr) none/tests/rcrl (stdout) none/tests/rcrl (stderr) none/tests/readline1 (stdout) none/tests/readline1 (stderr) none/tests/require-text-symbol-1 (stderr) none/tests/require-text-symbol-2 (stderr) none/tests/res_search (stdout) none/tests/res_search (stderr) none/tests/resolv (stdout) none/tests/resolv (stderr) none/tests/rlimit64_nofile (stderr) none/tests/rlimit_nofile (stderr) none/tests/sem (stderr) none/tests/semlimit (stderr) none/tests/sha1_test (stderr) none/tests/shell (stdout) none/tests/shell (stderr) none/tests/shell_nosuchfile (stderr) none/tests/shell_valid1 (stderr) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) none/tests/shell_zerolength (stderr) none/tests/shortpush (stderr) none/tests/shorts (stderr) none/tests/sigstackgrowth (stdout) none/tests/sigstackgrowth (stderr) none/tests/stackgrowth (stdout) none/tests/stackgrowth (stderr) none/tests/syscall-restart1 (stderr) none/tests/syscall-restart2 (stderr) none/tests/syslog (stderr) none/tests/system (stderr) none/tests/thread-exits (stdout) none/tests/thread-exits (stderr) none/tests/threaded-fork (stdout) none/tests/threaded-fork (stderr) none/tests/threadederrno (stdout) none/tests/threadederrno (stderr) none/tests/timestamp (stderr) none/tests/vgprintf (stderr) none/tests/x86/aad_aam (stdout) none/tests/x86/aad_aam (stderr) none/tests/x86/badseg (stdout) none/tests/x86/badseg (stderr) none/tests/x86/bt_everything (stdout) none/tests/x86/bt_everything (stderr) none/tests/x86/bt_literal (stdout) none/tests/x86/bt_literal (stderr) none/tests/x86/bug125959-x86 (stdout) none/tests/x86/bug125959-x86 (stderr) none/tests/x86/bug126147-x86 (stdout) none/tests/x86/bug126147-x86 (stderr) none/tests/x86/bug132813-x86 (stdout) none/tests/x86/bug132813-x86 (stderr) none/tests/x86/bug135421-x86 (stdout) none/tests/x86/bug135421-x86 (stderr) none/tests/x86/bug137714-x86 (stdout) none/tests/x86/bug137714-x86 (stderr) none/tests/x86/bug152818-x86 (stdout) none/tests/x86/bug152818-x86 (stderr) none/tests/x86/cmpxchg8b (stdout) none/tests/x86/cmpxchg8b (stderr) none/tests/x86/cpuid (stdout) none/tests/x86/cpuid (stderr) none/tests/x86/cse_fail (stdout) none/tests/x86/fcmovnu (stdout) none/tests/x86/fcmovnu (stderr) none/tests/x86/fpu_lazy_eflags (stdout) none/tests/x86/fpu_lazy_eflags (stderr) none/tests/x86/fxtract (stdout) none/tests/x86/fxtract (stderr) none/tests/x86/getseg (stdout) none/tests/x86/getseg (stderr) none/tests/x86/incdec_alt (stdout) none/tests/x86/incdec_alt (stderr) none/tests/x86/insn_basic (stdout) none/tests/x86/insn_basic (stderr) none/tests/x86/insn_cmov (stdout) none/tests/x86/insn_cmov (stderr) none/tests/x86/insn_fpu (stdout) none/tests/x86/insn_fpu (stderr) none/tests/x86/insn_mmx (stdout) none/tests/x86/insn_mmx (stderr) none/tests/x86/insn_sse (stdout) none/tests/x86/insn_sse (stderr) none/tests/x86/insn_sse2 (stdout) none/tests/x86/insn_sse2 (stderr) none/tests/x86/insn_sse3 (stdout) none/tests/x86/insn_sse3 (stderr) none/tests/x86/jcxz (stdout) none/tests/x86/jcxz (stderr) none/tests/x86/lahf (stdout) none/tests/x86/lahf (stderr) none/tests/x86/looper (stdout) none/tests/x86/looper (stderr) none/tests/x86/movx (stdout) none/tests/x86/movx (stderr) none/tests/x86/pushpopseg (stdout) none/tests/x86/pushpopseg (stderr) none/tests/x86/sbbmisc (stdout) none/tests/x86/sbbmisc (stderr) none/tests/x86/shift_ndep (stdout) none/tests/x86/shift_ndep (stderr) none/tests/x86/smc1 (stdout) none/tests/x86/smc1 (stderr) none/tests/x86/x86locked (stdout) none/tests/x86/x86locked (stderr) none/tests/x86/xadd (stdout) none/tests/x86/xadd (stderr) helgrind/tests/annotate_hbefore (stderr) helgrind/tests/annotate_rwlock (stderr) helgrind/tests/annotate_smart_pointer (stderr) helgrind/tests/cond_timedwait_invalid (stderr) helgrind/tests/free_is_write (stderr) helgrind/tests/hg01_all_ok (stderr) helgrind/tests/hg02_deadlock (stderr) helgrind/tests/hg03_inherit (stderr) helgrind/tests/hg04_race (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/hg06_readshared (stderr) helgrind/tests/locked_vs_unlocked1_fwd (stderr) helgrind/tests/locked_vs_unlocked1_rev (stderr) helgrind/tests/locked_vs_unlocked2 (stderr) helgrind/tests/locked_vs_unlocked3 (stderr) helgrind/tests/rwlock_race (stderr) helgrind/tests/rwlock_test (stderr) helgrind/tests/t2t_laog (stderr) helgrind/tests/tc01_simple_race (stderr) helgrind/tests/tc02_simple_tls (stderr) helgrind/tests/tc03_re_excl (stderr) helgrind/tests/tc04_free_lock (stderr) helgrind/tests/tc05_simple_race (stderr) helgrind/tests/tc06_two_races (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc07_hbl1 (stderr) helgrind/tests/tc08_hbl2 (stderr) helgrind/tests/tc09_bad_unlock (stderr) helgrind/tests/tc10_rec_lock (stderr) helgrind/tests/tc11_XCHG (stderr) helgrind/tests/tc12_rwl_trivial (stderr) helgrind/tests/tc13_laog1 (stderr) helgrind/tests/tc14_laog_dinphils (stderr) helgrind/tests/tc15_laog_lockdel (stderr) helgrind/tests/tc16_byterace (stderr) helgrind/tests/tc17_sembar (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc19_shadowmem (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc23_bogus_condwait (stderr) helgrind/tests/tc24_nonzero_sem (stderr) drd/tests/annotate_barrier (stderr) drd/tests/annotate_barrier_xml (stderr) drd/tests/annotate_hb_err (stderr) drd/tests/annotate_hb_race (stderr) drd/tests/annotate_hbefore (stderr) drd/tests/annotate_ignore_read (stderr) drd/tests/annotate_ignore_rw (stderr) drd/tests/annotate_ignore_rw2 (stderr) drd/tests/annotate_ignore_write (stderr) drd/tests/annotate_ignore_write2 (stderr) drd/tests/annotate_order_1 (stderr) drd/tests/annotate_order_2 (stderr) drd/tests/annotate_order_3 (stderr) drd/tests/annotate_publish_hg (stderr) drd/tests/annotate_rwlock (stderr) drd/tests/annotate_rwlock_hg (stderr) drd/tests/annotate_smart_pointer (stderr) drd/tests/annotate_smart_pointer2 (stderr) drd/tests/annotate_spinlock (stderr) drd/tests/annotate_static (stderr) drd/tests/annotate_trace_memory (stderr) drd/tests/annotate_trace_memory_xml (stderr) drd/tests/atomic_var (stderr) drd/tests/bug-235681 (stderr) drd/tests/circular_buffer (stderr) drd/tests/custom_alloc (stderr) drd/tests/custom_alloc_fiw (stderr) drd/tests/fp_race (stderr) drd/tests/fp_race2 (stderr) drd/tests/fp_race_xml (stderr) drd/tests/free_is_write (stderr) drd/tests/free_is_write2 (stderr) drd/tests/hg01_all_ok (stderr) drd/tests/hg02_deadlock (stderr) drd/tests/hg03_inherit (stderr) drd/tests/hg04_race (stderr) drd/tests/hg05_race2 (stderr) drd/tests/hg06_readshared (stderr) drd/tests/hold_lock_1 (stderr) drd/tests/hold_lock_2 (stderr) drd/tests/linuxthreads_det (stderr) drd/tests/memory_allocation (stderr) drd/tests/monitor_example (stderr) drd/tests/new_delete (stderr) drd/tests/pth_broadcast (stderr) drd/tests/pth_cancel_locked (stderr) drd/tests/pth_cleanup_handler (stderr) drd/tests/pth_cond_race (stderr) drd/tests/pth_cond_race2 (stderr) drd/tests/pth_cond_race3 (stderr) drd/tests/pth_create_chain (stderr) drd/tests/pth_detached (stderr) drd/tests/pth_detached2 (stderr) drd/tests/pth_detached3 (stderr) drd/tests/pth_inconsistent_cond_wait (stderr) drd/tests/pth_mutex_reinit (stderr) drd/tests/pth_once (stderr) drd/tests/pth_process_shared_mutex (stderr) drd/tests/pth_uninitialized_cond (stderr) drd/tests/read_and_free_race (stderr) drd/tests/recursive_mutex (stderr) drd/tests/rwlock_race (stderr) drd/tests/rwlock_test (stderr) drd/tests/rwlock_type_checking (stderr) drd/tests/sem_open (stderr) drd/tests/sem_open2 (stderr) drd/tests/sem_open3 (stderr) drd/tests/sem_open_traced (stderr) drd/tests/sigalrm (stderr) drd/tests/sigaltstack (stderr) drd/tests/tc01_simple_race (stderr) drd/tests/tc02_simple_tls (stderr) drd/tests/tc03_re_excl (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc05_simple_race (stderr) drd/tests/tc06_two_races (stderr) drd/tests/tc07_hbl1 (stdout) drd/tests/tc07_hbl1 (stderr) drd/tests/tc08_hbl2 (stdout) drd/tests/tc08_hbl2 (stderr) drd/tests/tc09_bad_unlock (stderr) drd/tests/tc10_rec_lock (stderr) drd/tests/tc11_XCHG (stdout) drd/tests/tc11_XCHG (stderr) drd/tests/tc12_rwl_trivial (stderr) drd/tests/tc13_laog1 (stderr) drd/tests/tc15_laog_lockdel (stderr) drd/tests/tc16_byterace (stderr) drd/tests/tc17_sembar (stderr) drd/tests/tc19_shadowmem (stderr) drd/tests/tc21_pthonce (stdout) drd/tests/tc21_pthonce (stderr) drd/tests/tc23_bogus_condwait (stderr) drd/tests/thread_name (stderr) drd/tests/thread_name_xml (stderr) drd/tests/threaded-fork (stderr) drd/tests/trylock (stderr) drd/tests/unit_bitmap (stderr) drd/tests/unit_vc (stderr) exp-bbv/tests/x86/complex_rep (stderr) exp-bbv/tests/x86/fldcw_check (stderr) exp-bbv/tests/x86/million (stderr) exp-bbv/tests/x86/rep_prefix (stderr) ================================================= ./valgrind-new/cachegrind/tests/chdir.stderr.diff ================================================= --- chdir.stderr.exp 2012-06-17 23:19:30.000000000 -0500 +++ chdir.stderr.out 2012-06-17 23:31:35.000000000 -0500 @@ -1,17 +1,28 @@ -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3800D6A5: ??? + by 0x3800D868: ??? + by 0x38054B27: ??? + by 0x380569B7: ??? + by 0x3807BE18: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. + ================================================= ./valgrind-new/cachegrind/tests/clreq.stderr.diff ================================================= --- clreq.stderr.exp 2012-06-17 23:19:30.000000000 -0500 +++ clreq.stderr.out 2012-06-17 23:31:35.000000000 -0500 @@ -0,0 +1,27 @@ + +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3800D6A5: ??? + by 0x3800D868: ??? + by 0x38054B27: ??? + by 0x380569B7: ??? + by 0x3807BE18: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. + ================================================= ./valgrind-new/cachegrind/tests/dlclose.stderr.diff ================================================= --- dlclose.stderr.exp 2012-06-17 23:19:30.000000000 -0500 +++ dlclose.stderr.out 2012-06-17 23:31:35.000000000 -0500 @@ -1,17 +1,28 @@ -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3800D6A5: ??? + by 0x3800D868: ??? + by 0x38054B27: ??? + by 0x380569B7: ??? + by 0x3807BE18: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. + ================================================= ./valgrind-new/cachegrind/tests/dlclose.stdout.diff ================================================= --- dlclose.stdout.exp 2012-06-17 23:19:30.000000000 -0500 +++ dlclose.stdout.out 2012-06-17 23:31:35.000000000 -0500 @@ -1 +0,0 @@ -This is myprint! ================================================= ./valgrind-new/cachegrind/tests/notpower2.stderr.diff ================================================= --- notpower2.stderr.exp 2012-06-17 23:19:30.000000000 -0500 +++ notpower2.stderr.out 2012-06-17 23:31:35.000000000 -0500 @@ -1,17 +1,28 @@ -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3800D6A5: ??? + by 0x3800D868: ??? + by 0x38054B27: ??? + by 0x380569B7: ??? + by 0x3807BE18: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. + ================================================= ./valgrind-new/cachegrind/tests/wrap5.stderr.diff ================================================= --- wrap5.stderr.exp 2012-06-17 23:19:30.000000000 -0500 +++ wrap5.stderr.out 2012-06-17 23:31:36.000000000 -0500 @@ -1,17 +1,28 @@ -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3800D6A5: ??? + by 0x3800D868: ??? + by 0x38054B27: ??? + by 0x380569B7: ??? + by 0x3807BE18: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. + ================================================= ./valgrind-new/cachegrind/tests/wrap5.stdout.diff ================================================= --- wrap5.stdout.exp 2012-06-17 23:19:30.000000000 -0500 +++ wrap5.stdout.out 2012-06-17 23:31:35.000000000 -0500 @@ -1,37 +0,0 @@ -computing fact1(7) -in wrapper1-pre: fact(7) -in wrapper2-pre: fact(6) -in wrapper1-pre: fact(5) -in wrapper2-pre: fact(4) -in wrapper1-pre: fact(3) -in wrapper2-pre: fact(2) -in wrapper1-pre: fact(1) -in wrapper2-pre: fact(0) -in wrapper2-post: fact(0) = 1 -in wrapper1-post: fact(1) = 1 -in wrapper2-post: fact(2) = 2 -in wrapper1-post: fact(3) = 6 -in wrapper2-pre: fact(2) -in wrapper1-pre: fact(1) -in wrapper2-pre: fact(0) -in wrapper2-post: fact(0) = 1 -in wrapper1-post: fact(1) = 1 -in wrapper2-post: fact(2) = 2 -in wrapper2-post: fact(4) = 32 -in wrapper1-post: fact(5) = 160 -in wrapper2-pre: fact(2) -in wrapper1-pre: fact(1) -in wrapper2-pre: fact(0) -in wrapper2-post: fact(0) = 1 -in wrapper1-post: fact(1) = 1 -in wrapper2-post: fact(2) = 2 -in wrapper2-post: fact(6) = 972 -in wrapper1-post: fact(7) = 6804 -in wrapper2-pre: fact(2) -in wrapper1-pre: fact(1) -in wrapper2-pre: fact(0) -in wrapper2-post: fact(0) = 1 -in wrapper1-post: fact(1) = 1 -in wrapper2-post: fact(2) = 2 -fact1(7) = 6806 -allocated 51 Lards ================================================= ./valgrind-new/cachegrind/tests/x86/fpu-28-108.stderr.diff ================================================= --- fpu-28-108.stderr.exp 2012-06-17 23:19:30.000000000 -0500 +++ fpu-28-108.stderr.out 2012-06-17 23:31:36.000000000 -0500 @@ -1,17 +1,28 @@ -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3800D6A5: ??? + by 0x3800D868: ??? + by 0x38054B27: ??? + by 0x380569B7: ??? + by 0x3807BE18: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. + ================================================= ./valgrind-new/callgrind/tests/clreq.stderr.diff ================================================= --- clreq.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ clreq.stderr.out 2012-06-17 23:31:36.000000000 -0500 @@ -1,6 +1,28 @@ -Events : Ir -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: ================================================= ./valgrind-new/callgrind/tests/notpower2-hwpref.stderr.diff ================================================= --- notpower2-hwpref.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ notpower2-hwpref.stderr.out 2012-06-17 23:31:36.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/notpower2-use.stderr.diff ================================================= --- notpower2-use.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ notpower2-use.stderr.out 2012-06-17 23:31:37.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw AcCost1 SpLoss1 AcCost2 SpLoss2 -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/notpower2-wb.stderr.diff ================================================= --- notpower2-wb.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ notpower2-wb.stderr.out 2012-06-17 23:31:37.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw ILdmr DLdmr DLdmw -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/notpower2.stderr.diff ================================================= --- notpower2.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ notpower2.stderr.out 2012-06-17 23:31:37.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/simwork-both.stderr.diff ================================================= --- simwork-both.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork-both.stderr.out 2012-06-17 23:31:37.000000000 -0500 @@ -1,24 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw Bc Bcm Bi Bim -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: - -Branches: -Mispredicts: -Mispred rate: ================================================= ./valgrind-new/callgrind/tests/simwork-both.stdout.diff ================================================= --- simwork-both.stdout.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork-both.stdout.out 2012-06-17 23:31:37.000000000 -0500 @@ -1 +0,0 @@ -Sum: 1000000 ================================================= ./valgrind-new/callgrind/tests/simwork-branch.stderr.diff ================================================= --- simwork-branch.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork-branch.stderr.out 2012-06-17 23:31:37.000000000 -0500 @@ -1,10 +1,28 @@ -Events : Ir Bc Bcm Bi Bim -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? -I refs: +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -Branches: -Mispredicts: -Mispred rate: ================================================= ./valgrind-new/callgrind/tests/simwork-branch.stdout.diff ================================================= --- simwork-branch.stdout.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork-branch.stdout.out 2012-06-17 23:31:37.000000000 -0500 @@ -1 +0,0 @@ -Sum: 1000000 ================================================= ./valgrind-new/callgrind/tests/simwork-cache.stderr.diff ================================================= --- simwork-cache.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork-cache.stderr.out 2012-06-17 23:31:38.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/simwork-cache.stdout.diff ================================================= --- simwork-cache.stdout.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork-cache.stdout.out 2012-06-17 23:31:37.000000000 -0500 @@ -1 +0,0 @@ -Sum: 1000000 ================================================= ./valgrind-new/callgrind/tests/simwork1.stderr.diff ================================================= --- simwork1.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork1.stderr.out 2012-06-17 23:31:38.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/simwork1.stdout.diff ================================================= --- simwork1.stdout.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork1.stdout.out 2012-06-17 23:31:38.000000000 -0500 @@ -1 +0,0 @@ -Sum: 1000000 ================================================= ./valgrind-new/callgrind/tests/simwork2.stderr.diff ================================================= --- simwork2.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork2.stderr.out 2012-06-17 23:31:38.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw ILdmr DLdmr DLdmw -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/simwork2.stdout.diff ================================================= --- simwork2.stdout.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork2.stdout.out 2012-06-17 23:31:38.000000000 -0500 @@ -1 +0,0 @@ -Sum: 1000000 ================================================= ./valgrind-new/callgrind/tests/simwork3.stderr.diff ================================================= --- simwork3.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork3.stderr.out 2012-06-17 23:31:38.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw AcCost1 SpLoss1 AcCost2 SpLoss2 -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happened in m_mallocfree.c. + +If that doesn't help, please report this bug to: www.valgrind.org + +In the bug report, send all the above text, the valgrind +version, and what OS and version you are using. Thanks. -I refs: -I1 misses: -LLi misses: -I1 miss rate: -LLi miss rate: - -D refs: -D1 misses: -LLd misses: -D1 miss rate: -LLd miss rate: - -LL refs: -LL misses: -LL miss rate: ================================================= ./valgrind-new/callgrind/tests/simwork3.stdout.diff ================================================= --- simwork3.stdout.exp 2012-06-17 23:19:27.000000000 -0500 +++ simwork3.stdout.out 2012-06-17 23:31:38.000000000 -0500 @@ -1 +0,0 @@ -Sum: 1000000 ================================================= ./valgrind-new/callgrind/tests/threads-use.stderr.diff ================================================= --- threads-use.stderr.exp 2012-06-17 23:19:27.000000000 -0500 +++ threads-use.stderr.out 2012-06-17 23:31:38.000000000 -0500 @@ -1,20 +1,28 @@ -Events : Ir Dr Dw I1mr D1mr D1mw ILmr DLmr DLmw AcCost1 SpLoss1 AcCost2 SpLoss2 Ge sysCount sysTime -Collected : +valgrind: m_scheduler/scheduler.c:707 (do_pre_run_checks): Assertion 'VG_IS_32_ALIGNED(a_vex)' failed. + at 0x3801F1A5: ??? + by 0x3801F368: ??? + by 0x38064D17: ??? + by 0x38066BA7: ??? + by 0x3808C008: ??? + +sched status: + running_tid=1 + +Thread 1: status = VgTs_Runnable + at 0x8FE01030: _dyld_start (in /usr/lib/dyld) + + +Note: see also the FAQ in the source distribution. +It contains workarounds to several common problems. +In particular, if Valgrind aborted or crashed after +identifying problems in your program, there's a good chance +that fixing those problems will prevent Valgrind aborting or +crashing, especially if it happe... [truncated message content] |
|
From: Philippe W. <phi...@sk...> - 2012-06-18 03:46:07
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.3.1-3.fc16.ppc64 ppc64 Vendor version: Fedora release 16 (Verne) Nightly build on gcc110 ( Fedora release 16 (Verne), ppc64 ) Started at 2012-06-17 20:00:14 PDT Ended at 2012-06-17 20:44:58 PDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 526 tests, 15 stderr failures, 8 stdout failures, 1 stderrB failure, 1 stdoutB failure, 2 post failures == gdbserver_tests/mcmain_pic (stdout) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/mcmain_pic (stdoutB) gdbserver_tests/mcmain_pic (stderrB) memcheck/tests/ppc32/power_ISA2_05 (stdout) memcheck/tests/ppc32/power_ISA2_05 (stderr) memcheck/tests/ppc64/power_ISA2_05 (stdout) memcheck/tests/ppc64/power_ISA2_05 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) massif/tests/big-alloc (post) massif/tests/deep-D (post) none/tests/empty-exe (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-vmx (stdout) none/tests/ppc64/jm-fp (stdout) none/tests/ppc64/jm-vmx (stdout) none/tests/shell (stderr) none/tests/shell_valid1 (stderr) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) none/tests/shell_zerolength (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-18 03:09:53
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.3.0 20080428 (Red Hat 4.3.0-8) Assembler: GNU assembler version 2.18.50.0.6-2 20080403 C library: GNU C Library stable release version 2.8 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 9 (Sulphur) Nightly build on bristol ( x86_64, Fedora 9 ) Started at 2012-06-18 03:41:37 BST Ended at 2012-06-18 04:09:32 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 600 tests, 1 stderr failure, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: Tom H. <to...@co...> - 2012-06-18 02:59:15
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.4.1 20090725 (Red Hat 4.4.1-2) Assembler: GNU assembler version 2.19.51.0.14-3.fc11 20090722 C library: GNU C Library stable release version 2.10.2 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 11 (Leonidas) Nightly build on bristol ( x86_64, Fedora 11 ) Started at 2012-06-18 03:31:26 BST Ended at 2012-06-18 03:58:52 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 602 tests, 2 stderr failures, 1 stdout failure, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) memcheck/tests/long_namespace_xml (stderr) none/tests/amd64/sse4-64 (stdout) |
|
From: <br...@ac...> - 2012-06-18 02:55:55
|
valgrind revision: 12651
VEX revision: 2385
C compiler: gcc (GCC) 3.4.6 20060404 (Red Hat 3.4.6-3)
Assembler: GNU assembler 2.15.92.0.2 20040927
C library: GNU C Library stable release version 2.3.4
uname -mrs: Linux 2.6.9-42.EL s390x
Vendor version: Red Hat Enterprise Linux AS release 4 (Nahant Update 4)
Nightly build on z10-ec ( s390x build on z10-EC )
Started at 2012-06-17 22:20:07 EDT
Ended at 2012-06-17 22:55:42 EDT
Results differ from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 508 tests, 6 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures ==
gdbserver_tests/mcinvokeRU (stdoutB)
gdbserver_tests/mcinvokeRU (stderrB)
memcheck/tests/manuel3 (stderr)
memcheck/tests/partial_load_ok (stderr)
memcheck/tests/varinfo6 (stderr)
helgrind/tests/tc09_bad_unlock (stderr)
helgrind/tests/tc18_semabuse (stderr)
helgrind/tests/tc20_verifywrap (stderr)
=================================================
== Results from 24 hours ago ==
=================================================
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 508 tests, 8 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/manuel3 (stderr)
memcheck/tests/partial_load_ok (stderr)
memcheck/tests/varinfo6 (stderr)
helgrind/tests/tc09_bad_unlock (stderr)
helgrind/tests/tc18_semabuse (stderr)
helgrind/tests/tc20_verifywrap (stderr)
drd/tests/tc04_free_lock (stderr)
drd/tests/tc09_bad_unlock (stderr)
=================================================
== Difference between 24 hours ago and now ==
=================================================
*** old.short Sun Jun 17 22:37:15 2012
--- new.short Sun Jun 17 22:55:42 2012
***************
*** 8,10 ****
! == 508 tests, 8 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures ==
memcheck/tests/manuel3 (stderr)
--- 8,12 ----
! == 508 tests, 6 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures ==
! gdbserver_tests/mcinvokeRU (stdoutB)
! gdbserver_tests/mcinvokeRU (stderrB)
memcheck/tests/manuel3 (stderr)
***************
*** 15,18 ****
helgrind/tests/tc20_verifywrap (stderr)
- drd/tests/tc04_free_lock (stderr)
- drd/tests/tc09_bad_unlock (stderr)
--- 17,18 ----
=================================================
./valgrind-new/gdbserver_tests/mcinvokeRU.stderrB.diff
=================================================
--- mcinvokeRU.stderrB.exp 2012-06-17 22:37:43.000000000 -0400
+++ mcinvokeRU.stderrB.out 2012-06-17 22:44:33.000000000 -0400
@@ -4,6 +4,8 @@
sending command v.wait 0 to pid ....
sending command v.wait 0 to pid ....
sending command v.wait 0 to pid ....
+readchar: Got EOF
+error reading packet
sending command v.wait 0 to pid ....
sending command v.wait 0 to pid ....
sending command v.wait 0 to pid ....
=================================================
./valgrind-new/gdbserver_tests/mcinvokeRU.stdoutB.diff
=================================================
--- mcinvokeRU.stdoutB.exp 2012-06-17 22:37:43.000000000 -0400
+++ mcinvokeRU.stdoutB.out 2012-06-17 22:44:33.000000000 -0400
@@ -18,6 +18,4 @@
gdbserver: continuing after wait ...
gdbserver: continuing in 0 ms ...
gdbserver: continuing after wait ...
-gdbserver: continuing in 0 ms ...
-gdbserver: continuing after wait ...
monitor command request to kill this process
=================================================
./valgrind-new/helgrind/tests/tc09_bad_unlock.stderr.diff
=================================================
--- tc09_bad_unlock.stderr.exp 2012-06-17 22:37:38.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-17 22:51:10.000000000 -0400
@@ -42,14 +42,6 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:49)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
-
---------------------
----------------------------------------------------------------
@@ -110,16 +102,8 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-----------------------------------------------------------------
-
Thread #x: Exiting thread still holds 1 lock
...
-ERROR SUMMARY: 11 errors from 11 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 9 errors from 9 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/helgrind/tests/tc18_semabuse.stderr.diff
=================================================
--- tc18_semabuse.stderr.exp 2012-06-17 22:37:38.000000000 -0400
+++ tc18_semabuse.stderr.out 2012-06-17 22:51:18.000000000 -0400
@@ -18,13 +18,5 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc18_semabuse.c:34)
-----------------------------------------------------------------
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc18_semabuse.c:37)
-
-
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 2 errors from 2 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/helgrind/tests/tc20_verifywrap.stderr.diff
=================================================
--- tc20_verifywrap.stderr.exp 2012-06-17 22:37:38.000000000 -0400
+++ tc20_verifywrap.stderr.out 2012-06-17 22:51:28.000000000 -0400
@@ -1,7 +1,7 @@
------- This is output for >= glibc 2.4 ------
+------ This is output for < glibc 2.4 ------
---------------- pthread_create/join ----------------
@@ -45,13 +45,6 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_init failed
- with error code 95 (EOPNOTSUPP: Operation not supported on transport endpoint)
- at 0x........: pthread_mutex_init (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:92)
-
-----------------------------------------------------------------
-
Thread #x: pthread_mutex_destroy of a locked mutex
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
@@ -63,26 +56,8 @@
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_lock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_lock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:108)
-
-----------------------------------------------------------------
-Thread #x's call to pthread_mutex_trylock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_trylock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:116)
-
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_timedlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_timedlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:121)
+make pthread_mutex_lock fail: skipped on glibc < 2.4
----------------------------------------------------------------
@@ -90,13 +65,6 @@
at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:125)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:125)
-
---------------- pthread_cond_wait et al ----------------
@@ -215,14 +183,6 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:242)
-----------------------------------------------------------------
-
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:245)
-
FIXME: can't figure out how to verify wrap of sem_post
@@ -235,4 +195,4 @@
...
-ERROR SUMMARY: 23 errors from 23 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 17 errors from 17 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/memcheck/tests/manuel3.stderr.diff
=================================================
--- manuel3.stderr.exp 2012-06-17 22:38:09.000000000 -0400
+++ manuel3.stderr.out 2012-06-17 22:46:09.000000000 -0400
@@ -1,4 +1,3 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: gcc_cant_inline_me (manuel3.c:22)
- by 0x........: main (manuel3.c:14)
+ at 0x........: main (manuel3.c:12)
=================================================
./valgrind-new/memcheck/tests/partial_load_ok.stderr.diff
=================================================
--- partial_load_ok.stderr.exp 2012-06-17 22:38:09.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-17 22:46:40.000000000 -0400
@@ -1,7 +1,13 @@
-Invalid read of size 4
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
+Invalid read of size 8
at 0x........: main (partial_load.c:23)
- Address 0x........ is 1 bytes inside a block of size 4 alloc'd
+ Address 0x........ is 1 bytes inside a block of size 8 alloc'd
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:20)
@@ -11,9 +17,9 @@
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:28)
-Invalid read of size 4
+Invalid read of size 8
at 0x........: main (partial_load.c:37)
- Address 0x........ is 0 bytes inside a block of size 4 free'd
+ Address 0x........ is 0 bytes inside a block of size 8 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:36)
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/memcheck/tests/partial_load_ok.stderr.diff64
=================================================
--- partial_load_ok.stderr.exp64 2012-06-17 22:38:09.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-17 22:46:40.000000000 -0400
@@ -1,4 +1,10 @@
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
Invalid read of size 8
at 0x........: main (partial_load.c:23)
Address 0x........ is 1 bytes inside a block of size 8 alloc'd
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-new/memcheck/tests/varinfo6.stderr.diff
=================================================
--- varinfo6.stderr.exp 2012-06-17 22:38:09.000000000 -0400
+++ varinfo6.stderr.out 2012-06-17 22:47:37.000000000 -0400
@@ -7,8 +7,7 @@
by 0x........: BZ2_bzCompress (varinfo6.c:4860)
by 0x........: BZ2_bzBuffToBuffCompress (varinfo6.c:5667)
by 0x........: main (varinfo6.c:6517)
- Location 0x........ is 2 bytes inside local var "budget"
- declared at varinfo6.c:3115, in frame #2 of thread 1
+ Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
at 0x........: croak (varinfo6.c:34)
=================================================
./valgrind-new/memcheck/tests/varinfo6.stderr.diff-ppc64
=================================================
--- varinfo6.stderr.exp-ppc64 2012-06-17 22:38:09.000000000 -0400
+++ varinfo6.stderr.out 2012-06-17 22:47:37.000000000 -0400
@@ -1,5 +1,5 @@
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: mainSort (varinfo6.c:2999)
by 0x........: BZ2_blockSort (varinfo6.c:3143)
by 0x........: BZ2_compressBlock (varinfo6.c:4072)
@@ -10,7 +10,7 @@
Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: BZ2_decompress (varinfo6.c:1699)
by 0x........: BZ2_bzDecompress (varinfo6.c:5230)
by 0x........: BZ2_bzBuffToBuffDecompress (varinfo6.c:5715)
=================================================
./valgrind-old/drd/tests/tc04_free_lock.stderr.diff-ppc
=================================================
--- tc04_free_lock.stderr.exp-ppc 2012-06-17 22:21:47.000000000 -0400
+++ tc04_free_lock.stderr.out 2012-06-17 22:36:32.000000000 -0400
@@ -7,28 +7,22 @@
by 0x........: main (tc04_free_lock.c:20)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:26)
+ at 0x........: bar (tc04_free_lock.c:40)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
by 0x........: bar (tc04_free_lock.c:38)
by 0x........: main (tc04_free_lock.c:26)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: foo (tc04_free_lock.c:47)
- by 0x........: main (tc04_free_lock.c:27)
+ at 0x........: foo (tc04_free_lock.c:49)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: foo (tc04_free_lock.c:46)
by 0x........: main (tc04_free_lock.c:27)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
- by 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-
-ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 3 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc04_free_lock.stderr.diff-x86
=================================================
--- tc04_free_lock.stderr.exp-x86 2012-06-17 22:21:47.000000000 -0400
+++ tc04_free_lock.stderr.out 2012-06-17 22:36:32.000000000 -0400
@@ -8,7 +8,8 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: bar (tc04_free_lock.c:40)
- by 0x........: main (tc04_free_lock.c:26)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
by 0x........: bar (tc04_free_lock.c:38)
@@ -16,19 +17,12 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: foo (tc04_free_lock.c:49)
- by 0x........: main (tc04_free_lock.c:27)
+ by 0x........: process_dl_debug (in /lib64/ld-2.3.4.so)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: foo (tc04_free_lock.c:46)
by 0x........: main (tc04_free_lock.c:27)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: bar (tc04_free_lock.c:40)
- by 0x........: main (tc04_free_lock.c:28)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_lock (drd_pthread_intercepts.c:?)
- by 0x........: bar (tc04_free_lock.c:38)
- by 0x........: main (tc04_free_lock.c:28)
-
-ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 3 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc09_bad_unlock.stderr.diff-glibc2.8
=================================================
--- tc09_bad_unlock.stderr.exp-glibc2.8 2012-06-17 22:21:47.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-17 22:36:35.000000000 -0400
@@ -26,7 +26,7 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: (below main)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: (below main)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc09_bad_unlock.stderr.diff-ppc
=================================================
--- tc09_bad_unlock.stderr.exp-ppc 2012-06-17 22:21:47.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-17 22:36:35.000000000 -0400
@@ -25,8 +25,8 @@
by 0x........: main (tc09_bad_unlock.c:49)
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
+ at 0x........: nearly_main (tc09_bad_unlock.c:45)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/drd/tests/tc09_bad_unlock.stderr.diff-x86
=================================================
--- tc09_bad_unlock.stderr.exp-x86 2012-06-17 22:21:47.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-17 22:36:35.000000000 -0400
@@ -26,7 +26,7 @@
Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: main (tc09_bad_unlock.c:49)
+ by 0x........: ???
mutex 0x........ was first observed at:
at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
by 0x........: nearly_main (tc09_bad_unlock.c:31)
@@ -47,13 +47,5 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:50)
-Destroying locked mutex: mutex 0x........, recursion count 1, owner 1.
- at 0x........: nearly_main (tc09_bad_unlock.c:45)
- by 0x........: main (tc09_bad_unlock.c:50)
-mutex 0x........ was first observed at:
- at 0x........: pthread_mutex_init (drd_pthread_intercepts.c:?)
- by 0x........: nearly_main (tc09_bad_unlock.c:31)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-ERROR SUMMARY: 8 errors from 7 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 8 errors from 6 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/helgrind/tests/tc09_bad_unlock.stderr.diff
=================================================
--- tc09_bad_unlock.stderr.exp 2012-06-17 22:20:48.000000000 -0400
+++ tc09_bad_unlock.stderr.out 2012-06-17 22:32:43.000000000 -0400
@@ -42,14 +42,6 @@
by 0x........: nearly_main (tc09_bad_unlock.c:41)
by 0x........: main (tc09_bad_unlock.c:49)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:49)
-
---------------------
----------------------------------------------------------------
@@ -110,16 +102,8 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: nearly_main (tc09_bad_unlock.c:41)
- by 0x........: main (tc09_bad_unlock.c:50)
-
-----------------------------------------------------------------
-
Thread #x: Exiting thread still holds 1 lock
...
-ERROR SUMMARY: 11 errors from 11 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 9 errors from 9 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/helgrind/tests/tc18_semabuse.stderr.diff
=================================================
--- tc18_semabuse.stderr.exp 2012-06-17 22:20:48.000000000 -0400
+++ tc18_semabuse.stderr.out 2012-06-17 22:32:51.000000000 -0400
@@ -18,13 +18,5 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc18_semabuse.c:34)
-----------------------------------------------------------------
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc18_semabuse.c:37)
-
-
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 2 errors from 2 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/helgrind/tests/tc20_verifywrap.stderr.diff
=================================================
--- tc20_verifywrap.stderr.exp 2012-06-17 22:20:48.000000000 -0400
+++ tc20_verifywrap.stderr.out 2012-06-17 22:33:01.000000000 -0400
@@ -1,7 +1,7 @@
------- This is output for >= glibc 2.4 ------
+------ This is output for < glibc 2.4 ------
---------------- pthread_create/join ----------------
@@ -45,13 +45,6 @@
----------------------------------------------------------------
-Thread #x's call to pthread_mutex_init failed
- with error code 95 (EOPNOTSUPP: Operation not supported on transport endpoint)
- at 0x........: pthread_mutex_init (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:92)
-
-----------------------------------------------------------------
-
Thread #x: pthread_mutex_destroy of a locked mutex
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
@@ -63,26 +56,8 @@
at 0x........: pthread_mutex_destroy (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:102)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_lock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_lock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:108)
-
-----------------------------------------------------------------
-Thread #x's call to pthread_mutex_trylock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_trylock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:116)
-
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_timedlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_timedlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:121)
+make pthread_mutex_lock fail: skipped on glibc < 2.4
----------------------------------------------------------------
@@ -90,13 +65,6 @@
at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:125)
-----------------------------------------------------------------
-
-Thread #x's call to pthread_mutex_unlock failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: pthread_mutex_unlock (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:125)
-
---------------- pthread_cond_wait et al ----------------
@@ -215,14 +183,6 @@
by 0x........: sem_wait (hg_intercepts.c:...)
by 0x........: main (tc20_verifywrap.c:242)
-----------------------------------------------------------------
-
-Thread #x's call to sem_post failed
- with error code 22 (EINVAL: Invalid argument)
- at 0x........: sem_post_WRK (hg_intercepts.c:...)
- by 0x........: sem_post (hg_intercepts.c:...)
- by 0x........: main (tc20_verifywrap.c:245)
-
FIXME: can't figure out how to verify wrap of sem_post
@@ -235,4 +195,4 @@
...
-ERROR SUMMARY: 23 errors from 23 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 17 errors from 17 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/memcheck/tests/manuel3.stderr.diff
=================================================
--- manuel3.stderr.exp 2012-06-17 22:20:56.000000000 -0400
+++ manuel3.stderr.out 2012-06-17 22:27:42.000000000 -0400
@@ -1,4 +1,3 @@
Conditional jump or move depends on uninitialised value(s)
- at 0x........: gcc_cant_inline_me (manuel3.c:22)
- by 0x........: main (manuel3.c:14)
+ at 0x........: main (manuel3.c:12)
=================================================
./valgrind-old/memcheck/tests/partial_load_ok.stderr.diff
=================================================
--- partial_load_ok.stderr.exp 2012-06-17 22:20:56.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-17 22:28:12.000000000 -0400
@@ -1,7 +1,13 @@
-Invalid read of size 4
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
+Invalid read of size 8
at 0x........: main (partial_load.c:23)
- Address 0x........ is 1 bytes inside a block of size 4 alloc'd
+ Address 0x........ is 1 bytes inside a block of size 8 alloc'd
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:20)
@@ -11,9 +17,9 @@
at 0x........: calloc (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:28)
-Invalid read of size 4
+Invalid read of size 8
at 0x........: main (partial_load.c:37)
- Address 0x........ is 0 bytes inside a block of size 4 free'd
+ Address 0x........ is 0 bytes inside a block of size 8 free'd
at 0x........: free (vg_replace_malloc.c:...)
by 0x........: main (partial_load.c:36)
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/memcheck/tests/partial_load_ok.stderr.diff64
=================================================
--- partial_load_ok.stderr.exp64 2012-06-17 22:20:56.000000000 -0400
+++ partial_load_ok.stderr.out 2012-06-17 22:28:12.000000000 -0400
@@ -1,4 +1,10 @@
+Invalid read of size 1
+ at 0x........: main (partial_load.c:16)
+ Address 0x........ is 0 bytes after a block of size 7 alloc'd
+ at 0x........: calloc (vg_replace_malloc.c:...)
+ by 0x........: main (partial_load.c:14)
+
Invalid read of size 8
at 0x........: main (partial_load.c:23)
Address 0x........ is 1 bytes inside a block of size 8 alloc'd
@@ -25,4 +31,4 @@
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
-ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0)
+ERROR SUMMARY: 4 errors from 4 contexts (suppressed: 0 from 0)
=================================================
./valgrind-old/memcheck/tests/varinfo6.stderr.diff
=================================================
--- varinfo6.stderr.exp 2012-06-17 22:20:56.000000000 -0400
+++ varinfo6.stderr.out 2012-06-17 22:29:10.000000000 -0400
@@ -7,8 +7,7 @@
by 0x........: BZ2_bzCompress (varinfo6.c:4860)
by 0x........: BZ2_bzBuffToBuffCompress (varinfo6.c:5667)
by 0x........: main (varinfo6.c:6517)
- Location 0x........ is 2 bytes inside local var "budget"
- declared at varinfo6.c:3115, in frame #2 of thread 1
+ Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
at 0x........: croak (varinfo6.c:34)
=================================================
./valgrind-old/memcheck/tests/varinfo6.stderr.diff-ppc64
=================================================
--- varinfo6.stderr.exp-ppc64 2012-06-17 22:20:56.000000000 -0400
+++ varinfo6.stderr.out 2012-06-17 22:29:10.000000000 -0400
@@ -1,5 +1,5 @@
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: mainSort (varinfo6.c:2999)
by 0x........: BZ2_blockSort (varinfo6.c:3143)
by 0x........: BZ2_compressBlock (varinfo6.c:4072)
@@ -10,7 +10,7 @@
Address 0x........ is on thread 1's stack
Uninitialised byte(s) found during client check request
- at 0x........: croak (varinfo6.c:35)
+ at 0x........: croak (varinfo6.c:34)
by 0x........: BZ2_decompress (varinfo6.c:1699)
by 0x........: BZ2_bzDecompress (varinfo6.c:5230)
by 0x........: BZ2_bzBuffToBuffDecompress (varinfo6.c:5715)
|
|
From: Rich C. <rc...@wi...> - 2012-06-18 02:55:07
|
valgrind revision: 12651
VEX revision: 2385
C compiler: gcc (SUSE Linux) 4.5.1 20101208 [gcc-4_5-branch revision 167585]
Assembler: GNU assembler (GNU Binutils; openSUSE 11.4) 2.21
C library: GNU C Library stable release version 2.11.3 (20110203)
uname -mrs: Linux 2.6.37.6-0.7-desktop x86_64
Vendor version: Welcome to openSUSE 11.4 "Celadon" - Kernel %r (%t).
Nightly build on ultra ( gcc 4.5.1 Linux 2.6.37.6-0.7-desktop x86_64 )
Started at 2012-06-17 21:30:01 CDT
Ended at 2012-06-17 21:54:57 CDT
Results unchanged from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... done
Building valgrind ... done
Running regression tests ... failed
Regression test results follow
== 610 tests, 1 stderr failure, 0 stdout failures, 6 stderrB failures, 0 stdoutB failures, 0 post failures ==
gdbserver_tests/mcbreak (stderrB)
gdbserver_tests/mcclean_after_fork (stderrB)
gdbserver_tests/mcleak (stderrB)
gdbserver_tests/mcmain_pic (stderrB)
gdbserver_tests/mcvabits (stderrB)
gdbserver_tests/mssnapshot (stderrB)
memcheck/tests/origin5-bz2 (stderr)
=================================================
./valgrind-new/gdbserver_tests/mcbreak.stderrB.diff
=================================================
--- mcbreak.stderrB.exp 2012-06-17 21:43:24.770545374 -0500
+++ mcbreak.stderrB.out 2012-06-17 21:46:10.698738010 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
vgdb-error value changed from 999999 to 0
n_errs_found 1 n_errs_shown 1 (vgdb-error 0)
vgdb-error value changed from 0 to 0
=================================================
./valgrind-new/gdbserver_tests/mcclean_after_fork.stderrB.diff
=================================================
--- mcclean_after_fork.stderrB.exp 2012-06-17 21:43:24.770545374 -0500
+++ mcclean_after_fork.stderrB.out 2012-06-17 21:46:12.376932134 -0500
@@ -1,4 +1,6 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
monitor command request to kill this process
Remote connection closed
=================================================
./valgrind-new/gdbserver_tests/mcleak.stderrB.diff
=================================================
--- mcleak.stderrB.exp 2012-06-17 21:43:24.766544910 -0500
+++ mcleak.stderrB.out 2012-06-17 21:46:30.383014972 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
10 bytes in 1 blocks are still reachable in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: f (leak-delta.c:14)
=================================================
./valgrind-new/gdbserver_tests/mcmain_pic.stderrB.diff
=================================================
--- mcmain_pic.stderrB.exp 2012-06-17 21:43:24.773545722 -0500
+++ mcmain_pic.stderrB.out 2012-06-17 21:46:31.951196371 -0500
@@ -1,3 +1,5 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Remote connection closed
=================================================
./valgrind-new/gdbserver_tests/mcvabits.stderrB.diff
=================================================
--- mcvabits.stderrB.exp 2012-06-17 21:43:24.774545838 -0500
+++ mcvabits.stderrB.out 2012-06-17 21:46:36.834761276 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Address 0x........ len 10 addressable
Address 0x........ is 0 bytes inside data symbol "undefined"
Address 0x........ len 10 defined
=================================================
./valgrind-new/gdbserver_tests/mssnapshot.stderrB.diff
=================================================
--- mssnapshot.stderrB.exp 2012-06-17 21:43:24.773545722 -0500
+++ mssnapshot.stderrB.out 2012-06-17 21:46:39.954122110 -0500
@@ -1,5 +1,9 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=92ec8fe859846a62345f74696ab349721415587a"
general valgrind monitor commands:
help [debug] : monitor command help. With debug: + debugging commands
v.wait [<ms>] : sleep <ms> (default 0) then continue
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc212-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc212-s390x 2012-06-17 21:43:26.280720046 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:48:00.977494716 -0500
@@ -75,17 +75,6 @@
at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
- at 0x........: mainSort (origin5-bz2.c:2859)
- by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
- by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
- by 0x........: handle_compress (origin5-bz2.c:4753)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -131,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc234-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc234-s390x 2012-06-17 21:43:26.264718195 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:48:00.977494716 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc25-amd64
=================================================
--- origin5-bz2.stderr.exp-glibc25-amd64 2012-06-17 21:43:26.209711833 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:48:00.977494716 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc25-x86
=================================================
--- origin5-bz2.stderr.exp-glibc25-x86 2012-06-17 21:43:26.238715187 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:48:00.977494716 -0500
@@ -12,7 +12,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -21,7 +21,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -30,7 +30,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -41,7 +41,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -52,7 +52,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -63,7 +63,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -74,7 +74,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -85,7 +85,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -96,7 +96,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -107,7 +107,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2275)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
<truncated beyond 100 lines>
=================================================
./valgrind-new/memcheck/tests/origin5-bz2.stderr.diff-glibc27-ppc64
=================================================
--- origin5-bz2.stderr.exp-glibc27-ppc64 2012-06-17 21:43:26.251716691 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:48:00.977494716 -0500
@@ -1,7 +1,7 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6481)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Conditional jump or move depends on uninitialised value(s)
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -10,7 +10,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -19,7 +19,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -28,7 +28,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
@@ -39,7 +39,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
@@ -50,7 +50,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
@@ -61,7 +61,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
@@ -72,7 +72,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
@@ -83,7 +83,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
@@ -94,7 +94,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
@@ -105,7 +105,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
<truncated beyond 100 lines>
=================================================
./valgrind-old/gdbserver_tests/mcbreak.stderrB.diff
=================================================
--- mcbreak.stderrB.exp 2012-06-17 21:30:28.122719595 -0500
+++ mcbreak.stderrB.out 2012-06-17 21:34:23.952002473 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
vgdb-error value changed from 999999 to 0
n_errs_found 1 n_errs_shown 1 (vgdb-error 0)
vgdb-error value changed from 0 to 0
=================================================
./valgrind-old/gdbserver_tests/mcclean_after_fork.stderrB.diff
=================================================
--- mcclean_after_fork.stderrB.exp 2012-06-17 21:30:28.122719595 -0500
+++ mcclean_after_fork.stderrB.out 2012-06-17 21:34:25.624195823 -0500
@@ -1,4 +1,6 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
monitor command request to kill this process
Remote connection closed
=================================================
./valgrind-old/gdbserver_tests/mcleak.stderrB.diff
=================================================
--- mcleak.stderrB.exp 2012-06-17 21:30:28.118719132 -0500
+++ mcleak.stderrB.out 2012-06-17 21:34:44.037324870 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
10 bytes in 1 blocks are still reachable in loss record ... of ...
at 0x........: malloc (vg_replace_malloc.c:...)
by 0x........: f (leak-delta.c:14)
=================================================
./valgrind-old/gdbserver_tests/mcmain_pic.stderrB.diff
=================================================
--- mcmain_pic.stderrB.exp 2012-06-17 21:30:28.125719942 -0500
+++ mcmain_pic.stderrB.out 2012-06-17 21:34:45.599505502 -0500
@@ -1,3 +1,5 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Remote connection closed
=================================================
./valgrind-old/gdbserver_tests/mcvabits.stderrB.diff
=================================================
--- mcvabits.stderrB.exp 2012-06-17 21:30:28.126720058 -0500
+++ mcvabits.stderrB.out 2012-06-17 21:34:50.539076654 -0500
@@ -1,5 +1,7 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
Address 0x........ len 10 addressable
Address 0x........ is 0 bytes inside data symbol "undefined"
Address 0x........ len 10 defined
=================================================
./valgrind-old/gdbserver_tests/mssnapshot.stderrB.diff
=================================================
--- mssnapshot.stderrB.exp 2012-06-17 21:30:28.125719942 -0500
+++ mssnapshot.stderrB.out 2012-06-17 21:34:53.658437339 -0500
@@ -1,5 +1,9 @@
relaying data between gdb and process ....
vgdb-error value changed from 0 to 999999
+
+
+Missing separate debuginfo for /lib64/libc.so.6
+Try: zypper install -C "debuginfo(build-id)=92ec8fe859846a62345f74696ab349721415587a"
general valgrind monitor commands:
help [debug] : monitor command help. With debug: + debugging commands
v.wait [<ms>] : sleep <ms> (default 0) then continue
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc212-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc212-s390x 2012-06-17 21:30:29.978934514 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:36:13.723695361 -0500
@@ -75,17 +75,6 @@
at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
- at 0x........: mainSort (origin5-bz2.c:2859)
- by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
- by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
- by 0x........: handle_compress (origin5-bz2.c:4753)
- by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
- by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
- by 0x........: main (origin5-bz2.c:6484)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
-
-Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -131,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc234-s390x
=================================================
--- origin5-bz2.stderr.exp-glibc234-s390x 2012-06-17 21:30:29.961932546 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:36:13.723695361 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc25-amd64
=================================================
--- origin5-bz2.stderr.exp-glibc25-amd64 2012-06-17 21:30:29.906926176 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:36:13.723695361 -0500
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
+ by 0x........: g_serviceFn (origin5-bz2.c:6429)
+ by 0x........: default_bzalloc (origin5-bz2.c:4470)
+ by 0x........: BZ2_decompress (origin5-bz2.c:1578)
+ by 0x........: BZ2_bzDecompress (origin5-bz2.c:5192)
+ by 0x........: BZ2_bzBuffToBuffDecompress (origin5-bz2.c:5678)
+ by 0x........: main (origin5-bz2.c:6498)
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc25-x86
=================================================
--- origin5-bz2.stderr.exp-glibc25-x86 2012-06-17 21:30:29.935929534 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:36:13.723695361 -0500
@@ -12,7 +12,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -21,7 +21,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
by 0x........: handle_compress (origin5-bz2.c:4750)
by 0x........: BZ2_bzCompress (origin5-bz2.c:4822)
@@ -30,7 +30,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -41,7 +41,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -52,7 +52,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -63,7 +63,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -74,7 +74,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -85,7 +85,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
by 0x........: BZ2_blockSort (origin5-bz2.c:3105)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -96,7 +96,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -107,7 +107,7 @@
Uninitialised value was created by a client request
at 0x........: main (origin5-bz2.c:6479)
-Use of uninitialised value of size 4
+Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2275)
by 0x........: BZ2_blockSort (origin5-bz2.c:3116)
by 0x........: BZ2_compressBlock (origin5-bz2.c:4034)
@@ -120,6 +120,12 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6512)
- Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6479)
+ Uninitialised value was created by a heap allocation
+ at 0x........: malloc (vg_replace_malloc.c:...)
<truncated beyond 100 lines>
=================================================
./valgrind-old/memcheck/tests/origin5-bz2.stderr.diff-glibc27-ppc64
=================================================
--- origin5-bz2.stderr.exp-glibc27-ppc64 2012-06-17 21:30:29.948931040 -0500
+++ origin5-bz2.stderr.out 2012-06-17 21:36:13.723695361 -0500
@@ -1,7 +1,7 @@
Conditional jump or move depends on uninitialised value(s)
at 0x........: main (origin5-bz2.c:6481)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Conditional jump or move depends on uninitialised value(s)
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -10,7 +10,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -19,7 +19,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: copy_input_until_stop (origin5-bz2.c:4686)
@@ -28,7 +28,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2820)
@@ -39,7 +39,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2823)
@@ -50,7 +50,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2854)
@@ -61,7 +61,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2858)
@@ -72,7 +72,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2963)
@@ -83,7 +83,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: mainSort (origin5-bz2.c:2964)
@@ -94,7 +94,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
at 0x........: fallbackSort (origin5-bz2.c:2269)
@@ -105,7 +105,7 @@
by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630)
by 0x........: main (origin5-bz2.c:6484)
Uninitialised value was created by a client request
- at 0x........: main (origin5-bz2.c:6481)
+ at 0x........: main (origin5-bz2.c:6479)
Use of uninitialised value of size 8
<truncated beyond 100 lines>
|
|
From: Tom H. <to...@co...> - 2012-06-18 02:49:48
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.4.5 20101112 (Red Hat 4.4.5-2) Assembler: GNU assembler version 2.20.51.0.2-20.fc13 20091009 C library: GNU C Library stable release version 2.12.2 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 13 (Goddard) Nightly build on bristol ( x86_64, Fedora 13 ) Started at 2012-06-18 03:22:04 BST Ended at 2012-06-18 03:49:32 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 602 tests, 2 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == memcheck/tests/err_disable4 (stderr) helgrind/tests/pth_barrier3 (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-18 02:47:18
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.5.1 20100924 (Red Hat 4.5.1-4) Assembler: GNU assembler version 2.20.51.0.7-8.fc14 20100318 C library: GNU C Library stable release version 2.13 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 14 (Laughlin) Nightly build on bristol ( x86_64, Fedora 14 ) Started at 2012-06-18 03:12:35 BST Ended at 2012-06-18 03:46:56 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 617 tests, 2 stderr failures, 0 stdout failures, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-18 02:35:29
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.51.0.6-6.fc15 20110118 C library: GNU C Library stable release version 2.14.1 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 15 (Lovelock) Nightly build on bristol ( x86_64, Fedora 15 ) Started at 2012-06-18 03:03:00 BST Ended at 2012-06-18 03:34:47 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 3 stderr failures, 0 stdout failures, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) |
|
From: Tom H. <to...@co...> - 2012-06-18 02:30:16
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2) Assembler: GNU assembler version 2.21.53.0.1-6.fc16 20110716 C library: GNU C Library development release version 2.14.90 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 16 (Verne) Nightly build on bristol ( x86_64, Fedora 16 ) Started at 2012-06-18 02:51:53 BST Ended at 2012-06-18 03:29:54 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 4 stderr failures, 0 stdout failures, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) memcheck/tests/str_tester (stderr) |
|
From: Christian B. <bor...@de...> - 2012-06-18 02:12:21
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (SUSE Linux) 4.3.4 [gcc-4_3-branch revision 152973] Assembler: GNU assembler (GNU Binutils; SUSE Linux Enterprise 11) 2.20.0.20100122-0.7.9 C library: GNU C Library stable release version 2.11.1 (20100118) uname -mrs: Linux 2.6.32.59-0.3-default s390x Vendor version: Welcome to SUSE Linux Enterprise Server 11 SP1 (s390x) - Kernel %r (%t). Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP1 gcc 4.3.4 on z196 (s390x) ) Started at 2012-06-18 03:45:01 CEST Ended at 2012-06-18 04:12:09 CEST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 544 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) drd/tests/tc04_free_lock (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 544 tests, 4 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Mon Jun 18 03:58:38 2012 --- new.short Mon Jun 18 04:12:08 2012 *************** *** 8,10 **** ! == 544 tests, 4 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc18_semabuse (stderr) --- 8,10 ---- ! == 544 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc18_semabuse (stderr) *************** *** 12,14 **** drd/tests/tc04_free_lock (stderr) - drd/tests/tc09_bad_unlock (stderr) --- 12,13 ---- |
|
From: Tom H. <to...@co...> - 2012-06-18 02:12:09
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.7.0 20120507 (Red Hat 4.7.0-5) Assembler: GNU assembler version 2.22.52.0.1-10.fc17 20120131 C library: GNU C Library stable release version 2.15 uname -mrs: Linux 3.3.4-5.fc17.x86_64 x86_64 Vendor version: Fedora release 17 (Beefy Miracle) Nightly build on bristol ( x86_64, Fedora 17 (Beefy Miracle) ) Started at 2012-06-18 02:41:12 BST Ended at 2012-06-18 03:11:44 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 11 stderr failures, 1 stdout failure, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) memcheck/tests/str_tester (stderr) drd/tests/bar_bad (stderr) drd/tests/bar_bad_xml (stderr) drd/tests/pth_cancel_locked (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 618 tests, 10 stderr failures, 1 stdout failure, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderr) gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/mcmain_pic (stderr) gdbserver_tests/nlcontrolc (stdoutB) gdbserver_tests/nlpasssigalrm (stdoutB) memcheck/tests/err_disable4 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/overlap (stderr) memcheck/tests/str_tester (stderr) drd/tests/bar_bad (stderr) drd/tests/bar_bad_xml (stderr) drd/tests/pth_cancel_locked (stderr) exp-sgcheck/tests/preen_invars (stdout) exp-sgcheck/tests/preen_invars (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short 2012-06-18 02:56:10.112182231 +0100 --- new.short 2012-06-18 03:11:44.808626473 +0100 *************** *** 8,10 **** ! == 618 tests, 10 stderr failures, 1 stdout failure, 1 stderrB failure, 2 stdoutB failures, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderr) --- 8,11 ---- ! == 618 tests, 11 stderr failures, 1 stdout failure, 1 stderrB failure, 2 stdoutB failures, 0 post failures == ! gdbserver_tests/mcinfcallRU (stderr) gdbserver_tests/mcinfcallWSRU (stderr) |
|
From: Christian B. <bor...@de...> - 2012-06-18 02:03:55
|
valgrind revision: 12651 VEX revision: 2385 C compiler: gcc (GCC) 4.5.3 20110121 (Red Hat 4.5.3-5) Assembler: GNU assembler version 2.20.51.0.7-4bb6.fc13 20100318 C library: GNU C Library stable release version 2.12.1 uname -mrs: Linux 3.3.4-53.x.20120504-s390xperformance s390x Vendor version: unknown Nightly build on fedora390 ( Fedora 13/14/15 mix with gcc 3.5.3 on z196 (s390x) ) Started at 2012-06-18 03:45:01 CEST Ended at 2012-06-18 04:04:04 CEST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 543 tests, 6 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == gdbserver_tests/mcinvokeWS (stdoutB) gdbserver_tests/mcinvokeWS (stderrB) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc21_pthonce (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 543 tests, 7 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == gdbserver_tests/mcinvokeWS (stdoutB) gdbserver_tests/mcinvokeWS (stderrB) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) drd/tests/tc21_pthonce (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Mon Jun 18 03:54:34 2012 --- new.short Mon Jun 18 04:04:04 2012 *************** *** 8,10 **** ! == 543 tests, 7 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == gdbserver_tests/mcinvokeWS (stdoutB) --- 8,10 ---- ! == 543 tests, 6 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == gdbserver_tests/mcinvokeWS (stdoutB) *************** *** 16,18 **** drd/tests/tc04_free_lock (stderr) - drd/tests/tc09_bad_unlock (stderr) drd/tests/tc21_pthonce (stderr) --- 16,17 ---- |