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From: Christian B. <bor...@de...> - 2011-05-27 20:38:22
|
Nightly build on sless390 ( SUSE Linux Enterprise Server 11 SP1 gcc 4.3.4 on z196 (s390x) ) Started at 2011-05-27 22:10:01 CEST Ended at 2011-05-27 22:38:02 CEST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 476 tests, 6 stderr failures, 0 stdout failures, 3 stderrB failures, 0 stdoutB failures, 0 post failures == gdbserver_tests/mcbreak (stderrB) gdbserver_tests/mcclean_after_fork (stderrB) gdbserver_tests/mssnapshot (stderrB) none/tests/faultstatus (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc23_bogus_condwait (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) drd/tests/tc23_bogus_condwait (stderr) |
|
From: Christian B. <bor...@de...> - 2011-05-27 20:36:50
|
Nightly build on fedora390 ( Fedora 13/14/15 mix with gcc 3.5.3 on z196 (s390x) ) Started at 2011-05-27 22:10:01 CEST Ended at 2011-05-27 22:36:02 CEST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 476 tests, 6 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc23_bogus_condwait (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) drd/tests/tc23_bogus_condwait (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 476 tests, 6 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == gdbserver_tests/mcinfcallWSRU (stderrB) gdbserver_tests/nlcontrolc (stdoutB) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc23_bogus_condwait (stderr) drd/tests/tc04_free_lock (stderr) drd/tests/tc09_bad_unlock (stderr) drd/tests/tc23_bogus_condwait (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Fri May 27 22:23:25 2011 --- new.short Fri May 27 22:36:02 2011 *************** *** 8,12 **** ! == 476 tests, 6 stderr failures, 0 stdout failures, 1 stderrB failure, 1 stdoutB failure, 0 post failures == ! gdbserver_tests/mcinfcallWSRU (stderrB) ! gdbserver_tests/nlcontrolc (stdoutB) helgrind/tests/tc06_two_races_xml (stderr) --- 8,10 ---- ! == 476 tests, 6 stderr failures, 0 stdout failures, 0 stderrB failures, 0 stdoutB failures, 0 post failures == helgrind/tests/tc06_two_races_xml (stderr) |
|
From: <sv...@va...> - 2011-05-27 13:28:36
|
Author: sewardj
Date: 2011-05-27 14:23:44 +0100 (Fri, 27 May 2011)
New Revision: 11779
Log:
Further fixes for GDB server on Thumb code:
* Disabled several tests on ARM when gdb version < 7.1
gdb 7.0 has problems with next/step/... in ARM thumb code.
* Documented in manual-core.xml that ARM thumb code implies
a gdb version >= 7.1
* m_gdbserver.h/.c : take into account the thumb bit at several places
* use new IRStmt_IMark::delta field to distinguish ARM vs Thumb
instructions as committed in vex r2153
Patch from bug 214909 comment 99 (valgrind part).
(Philippe Waroquiers, phi...@sk...)
Modified:
trunk/coregrind/m_gdbserver/m_gdbserver.c
trunk/docs/xml/manual-core.xml
trunk/gdbserver_tests/filter_gdb
trunk/gdbserver_tests/make_local_links
trunk/gdbserver_tests/mcbreak.vgtest
trunk/gdbserver_tests/mcinfcallWSRU.stderrB.exp
trunk/gdbserver_tests/mcinfcallWSRU.vgtest
trunk/gdbserver_tests/mcwatchpoints.vgtest
Modified: trunk/coregrind/m_gdbserver/m_gdbserver.c
===================================================================
--- trunk/coregrind/m_gdbserver/m_gdbserver.c 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/coregrind/m_gdbserver/m_gdbserver.c 2011-05-27 13:23:44 UTC (rev 11779)
@@ -84,10 +84,11 @@
/* An instruction instrumented for gdbserver looks like this:
1. Ist_Mark (0x1234)
- 2. helperc_CallDebugger (0x1234)
+ 2. Put (IP, 0x1234)
+ 3. helperc_CallDebugger (0x1234)
This will give control to gdb if there is a break at 0x1234
or if we are single stepping
- 3. ... here the real IR for the instruction at 0x1234
+ 4. ... here the real IR for the instruction at 0x1234
When there is a break at 0x1234:
if user does "continue" or "step" or similar,
@@ -180,24 +181,41 @@
single stepping (kind == GS_jump).
When gdbserver is not single stepping anymore, all GS_jump entries
are removed, their translations are invalidated.
+
+ Note for ARM: addr in GS_Address is the value without the thumb bit set.
*/
static VgHashTable gs_addresses = NULL;
+// Transform addr in the form stored in the list of addresses.
+// For the ARM architecture, we store it with the thumb bit set to 0.
+static Addr HT_addr ( Addr addr )
+{
+#if defined(VGA_arm)
+ return addr & ~(Addr)1;
+#else
+ return addr;
+#endif
+}
+
static void add_gs_address (Addr addr, GS_Kind kind, char* from)
{
GS_Address *p;
p = VG_(arena_malloc)(VG_AR_CORE, from, sizeof(GS_Address));
- p->addr = addr;
+ p->addr = HT_addr (addr);
p->kind = kind;
VG_(HT_add_node)(gs_addresses, p);
- VG_(discard_translations) (addr, 1, from);
+ /* It should be sufficient to discard a range of 1.
+ We use 2 to ensure the below is not sensitive to the presence
+ of thumb bit in the range of addresses to discard. */
+ VG_(discard_translations) (addr, 2, from);
}
static void remove_gs_address (GS_Address* g, char* from)
{
VG_(HT_remove) (gs_addresses, g->addr);
- VG_(discard_translations) (g->addr, 1, from);
+ // See add_gs_address for the explanation for the range 2 below.
+ VG_(discard_translations) (g->addr, 2, from);
VG_(arena_free) (VG_AR_CORE, g);
}
@@ -231,7 +249,7 @@
{
GS_Address *g;
- g = VG_(HT_lookup) (gs_addresses, (UWord)addr);
+ g = VG_(HT_lookup) (gs_addresses, (UWord)HT_addr(addr));
if (insert) {
/* insert a breakpoint at addr or upgrade its kind */
if (g == NULL) {
@@ -419,7 +437,8 @@
VG_(HT_ResetIter) (gs_addresses);
while ((g = VG_(HT_Next) (gs_addresses))) {
for (e = 0; e < vge->n_used; e++) {
- if (g->addr >= vge->base[e] && g->addr < vge->base[e] + vge->len[e]) {
+ if (g->addr >= HT_addr(vge->base[e])
+ && g->addr < HT_addr(vge->base[e]) + vge->len[e]) {
dlog(2,
"gdbserver_instrumentation_needed %p %s reason %s\n",
C2v(g->addr), sym(g->addr, /* is_code */ True),
@@ -484,7 +503,7 @@
static void invalidate_if_jump_not_yet_gdbserved (Addr addr, char* from)
{
- if (VG_(HT_lookup) (gs_addresses, (UWord)addr))
+ if (VG_(HT_lookup) (gs_addresses, (UWord)HT_addr(addr)))
return;
add_gs_address (addr, GS_jump, from);
}
@@ -859,9 +878,9 @@
return;
if (valgrind_single_stepping() ||
- ((g = VG_(HT_lookup) (gs_addresses, (UWord)iaddr)) &&
+ ((g = VG_(HT_lookup) (gs_addresses, (UWord)HT_addr(iaddr))) &&
(g->kind == GS_break))) {
- if (iaddr == ignore_this_break_once) {
+ if (iaddr == HT_addr(ignore_this_break_once)) {
dlog(1, "ignoring ignore_this_break_once %s\n",
sym(ignore_this_break_once, /* is_code */ True));
ignore_this_break_once = 0;
@@ -952,7 +971,8 @@
VexGuestLayout* layout,
VexGuestExtents* vge,
IRType gWordTy, IRType hWordTy,
- Addr iaddr, /* Addr of instruction being instrumented */
+ Addr iaddr, /* Addr of instruction being instrumented */
+ UChar delta, /* delta to add to iaddr to obtain IP */
IRSB* irsb) /* irsb block to which call is added */
{
void* fn;
@@ -969,9 +989,18 @@
remove the redundant store. And in any case, when debugging a
piece of code, the efficiency requirement is not critical: very
few blocks will be instrumented for debugging. */
-
- addStmtToIRSB(irsb, IRStmt_Put(layout->offset_IP , mkIRExpr_HWord(iaddr)));
+ /* For platforms on which the IP can differ from the addr of the instruction
+ being executed, we need to add the delta to obtain the IP.
+ This IP will be given to gdb (e.g. if a breakpoint is put at iaddr).
+
+ For ARM, this delta will ensure that the thumb bit is set in the
+ IP when executing thumb code. gdb uses this thumb bit a.o.
+ to properly guess the next IP for the 'step' and 'stepi' commands. */
+ vg_assert(delta <= 1);
+ addStmtToIRSB(irsb, IRStmt_Put(layout->offset_IP ,
+ mkIRExpr_HWord(iaddr + (Addr)delta)));
+
fn = &VG_(helperc_CallDebugger);
nm = "VG_(helperc_CallDebugger)";
args = mkIRExprVec_1(mkIRExpr_HWord (iaddr));
@@ -1065,6 +1094,7 @@
VG_(add_stmt_call_gdbserver) ( sb_in, layout, vge,
gWordTy, hWordTy,
st->Ist.IMark.addr,
+ st->Ist.IMark.delta,
sb_out);
/* There is an optimisation possible here for Vg_VgdbFull:
Put a guard ensuring we only call gdbserver if 'FullCallNeeded'.
Modified: trunk/docs/xml/manual-core.xml
===================================================================
--- trunk/docs/xml/manual-core.xml 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/docs/xml/manual-core.xml 2011-05-27 13:23:44 UTC (rev 11779)
@@ -2248,6 +2248,9 @@
will report an error message when using the target
command. Debugging will not work because gdb will then not be
able to fetch the registers from the Valgrind gdbserver.
+ For ARM programs using the thumb instruction set, you must use
+ a gdb version >= 7.1 as previous versions have problems
+ with next/step/breakpoints/... in thumb code.
</para>
</listitem>
Modified: trunk/gdbserver_tests/filter_gdb
===================================================================
--- trunk/gdbserver_tests/filter_gdb 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/gdbserver_tests/filter_gdb 2011-05-27 13:23:44 UTC (rev 11779)
@@ -46,6 +46,7 @@
# a location in the nptl lib rather than our sources (same as
# standard gdb gdbserver) gdb 7.0
# same special transform but for gdb 7.2
+# transform info thread of 7.3 into the layout of 7.2 and before.
# delete lines telling that some memory can't be accessed: this is
# a.o. produced by gdb 7.2 on arm (same with standard gdbserver)
# delete empty lines (the last line (only made of prompts) sometimes
@@ -58,6 +59,7 @@
-e 's/pid [0-9][0-9]*/pid ..../g' \
-e 's/Thread [0-9][0-9]*/Thread ..../g' \
-e '/\[Switching to Thread ....\]/d' \
+ -e 's/\(\[Switching to thread [1234] (Thread ....)\]\)#0/\1\n#0/' \
-e 's/^\([ \* ] [0-9] Thread .... (tid [0-9] VgTs_WaitSys) 0x........ in\).*$/\1 syscall .../' \
-e 's/#[0-9]\( 0x........ in sleeper_or_burner\)/#.\1/' \
-e '/^Reading symbols from .*\.\.\.done\./d' \
@@ -88,9 +90,13 @@
-e 's/0x........ in \(main (argc=1, argv=0x........) at watchpoints.c:[24][3689]\)/\1/' \
-e 's/0x........ in \(main () at clean_after_fork.c:32\)/\1/' \
-e 's/^0x........ in \*__GI_raise (sig=8).*/0x........ in test4 () at faultstatus.c:120\n120 volatile int v = 44\/zero();/' \
+ -e 's/^0x........ in raise (.*/0x........ in test4 () at faultstatus.c:120\n120 volatile int v = 44\/zero();/' \
-e '/ at ..\/nptl\/sysdeps\/unix\/sysv\/linux\/raise.c:[0-9]*/d' \
- -e '/ in ..\/nptl\/sysdeps\/unix\/sysv\/linux\/raise.c/d' \
+ -e '/ in ..\/nptl\/sysdeps\/unix\/sysv\/linux\/.*raise.c/d' \
-e 's/^0x........ in \.\{0,1\}raise () from \/lib[0-9]\{0,2\}\/libc\.so\../0x........ in test4 () at faultstatus.c:120\n120 volatile int v = 44\/zero();'/ \
+ -e '/Id Target Id Frame/d' \
+ -e 's/^\([ \*] [1234] \) *Thread /\1Thread /' \
+ -e 's/VgTs_WaitSys) 0x/VgTs_WaitSys) 0x/' \
-e '/Cannot access memory at address 0x......../d' \
-e '/^$/d' |
Modified: trunk/gdbserver_tests/make_local_links
===================================================================
--- trunk/gdbserver_tests/make_local_links 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/gdbserver_tests/make_local_links 2011-05-27 13:23:44 UTC (rev 11779)
@@ -23,16 +23,33 @@
awk '{ if ( ($1 >= 7) || (($1 == 6) && ($2 >= 5)) ) print "version ok"}'`
if [ "$VERSIONOK" = "" ]
then
- echo "gdbserver tests suppressed as $1 version is not >= 6.5: " $VERSIONLINE
- rm gdbserver_tests/gdb
+ echo "gdbserver tests suppressed as $1 version is < 6.5: " $VERSIONLINE
+ rm -f gdbserver_tests/gdb
fi
+ # We need at least a 7.1 version on ARM to run tests doing step/next/...
+ # (gdb 7.0 has bugs in the 'guess next pc' heuristic in thumb mode).
+ if tests/arch_test arm
+ then
+ VERSIONOK=`echo $VERSION |
+ awk '{ if ( ($1 >= 8) || (($1 == 7) && ($2 >= 1)) ) print "version ok"}'`
+ if [ "$VERSIONOK" = "" ]
+ then
+ echo "gdbserver 'step/next' tests suppressed as arm $1 version is < 7.1: " $VERSIONLINE
+ rm -f gdbserver_tests/gdb.step
+ else
+ touch gdbserver_tests/gdb.step
+ fi
+ else
+ touch gdbserver_tests/gdb.step
+ fi
+
# We need at least a 7.2 version for gdb tests using eval command
VERSIONOK=`echo $VERSION |
awk '{ if ( ($1 >= 8) || (($1 == 7) && ($2 >= 2)) ) print "version ok"}'`
if [ "$VERSIONOK" = "" ]
then
- echo "gdbserver eval tests suppressed as $1 version is not >= 7.2: " $VERSIONLINE
+ echo "gdbserver eval tests suppressed as $1 version is < 7.2: " $VERSIONLINE
rm -f gdbserver_tests/gdb.eval
else
touch gdbserver_tests/gdb.eval
Modified: trunk/gdbserver_tests/mcbreak.vgtest
===================================================================
--- trunk/gdbserver_tests/mcbreak.vgtest 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/gdbserver_tests/mcbreak.vgtest 2011-05-27 13:23:44 UTC (rev 11779)
@@ -1,6 +1,6 @@
# test execution control (break, next, step) and inferior calls
# when stopped on these events
-prereq: test -e gdb
+prereq: test -e gdb -a -f gdb.step
prog: t
vgopts: --tool=memcheck --vgdb=yes --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-mcbreak
stdout_filter: filter_gdb
Modified: trunk/gdbserver_tests/mcinfcallWSRU.stderrB.exp
===================================================================
--- trunk/gdbserver_tests/mcinfcallWSRU.stderrB.exp 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/gdbserver_tests/mcinfcallWSRU.stderrB.exp 2011-05-27 13:23:44 UTC (rev 11779)
@@ -20,10 +20,12 @@
Program received signal SIGTRAP, Trace/breakpoint trap.
0x........ in do_burn () at sleepers.c:39
39 for (i = 0; i < burn; i++) loopnr++;
-[Switching to thread 1 (Thread ....)]#0 0x........ in do_burn () at sleepers.c:39
+[Switching to thread 1 (Thread ....)]
+#0 0x........ in do_burn () at sleepers.c:39
39 for (i = 0; i < burn; i++) loopnr++;
$1 = void
-[Switching to thread 2 (Thread ....)]#0 0x........ in syscall ...
+[Switching to thread 2 (Thread ....)]
+#0 0x........ in syscall ...
Could not write register "xxx"; remote failure reply 'E.
ERROR changing register xxx regno y
gdb commands changing registers (pc, sp, ...) (e.g. 'jump',
@@ -31,7 +33,8 @@
can only be accepted if the thread is VgTs_Runnable or VgTs_Yielding state
Thread status is VgTs_WaitSys
'
-[Switching to thread 3 (Thread ....)]#0 0x........ in syscall ...
+[Switching to thread 3 (Thread ....)]
+#0 0x........ in syscall ...
Could not write register "xxx"; remote failure reply 'E.
ERROR changing register xxx regno y
gdb commands changing registers (pc, sp, ...) (e.g. 'jump',
@@ -39,7 +42,8 @@
can only be accepted if the thread is VgTs_Runnable or VgTs_Yielding state
Thread status is VgTs_WaitSys
'
-[Switching to thread 4 (Thread ....)]#0 0x........ in syscall ...
+[Switching to thread 4 (Thread ....)]
+#0 0x........ in syscall ...
Could not write register "xxx"; remote failure reply 'E.
ERROR changing register xxx regno y
gdb commands changing registers (pc, sp, ...) (e.g. 'jump',
Modified: trunk/gdbserver_tests/mcinfcallWSRU.vgtest
===================================================================
--- trunk/gdbserver_tests/mcinfcallWSRU.vgtest 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/gdbserver_tests/mcinfcallWSRU.vgtest 2011-05-27 13:23:44 UTC (rev 11779)
@@ -5,8 +5,9 @@
# but this introduces too much dependencies to scheduler fairness.
args: 100 100000000 1000000000 -S-S-SB-
vgopts: --tool=memcheck --vgdb=yes --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-mcinfcallWSRU
+# We need a non buggy gdb.step on arm thumb.
# Disable on Darwin: inferior call rejected as it cannot find malloc.
-prereq: test -e gdb && ../tests/os_test linux
+prereq: test -e gdb -a -f gdb.step && ../tests/os_test linux
# filter_gdb to replace pid and Thread numbers in the output of the program:
stderr_filter: filter_gdb
progB: gdb
Modified: trunk/gdbserver_tests/mcwatchpoints.vgtest
===================================================================
--- trunk/gdbserver_tests/mcwatchpoints.vgtest 2011-05-18 16:09:54 UTC (rev 11778)
+++ trunk/gdbserver_tests/mcwatchpoints.vgtest 2011-05-27 13:23:44 UTC (rev 11779)
@@ -1,6 +1,7 @@
# test the memcheck watchpoint functionality
# Note: we need --vgdb=full to stop at the instruction following the watchpoint.
-prereq: test -e gdb
+# We need a non buggy gdb.step as watchpoints are placed after a "step".
+prereq: test -e gdb -a -f gdb.step
prog: watchpoints
vgopts: --tool=memcheck --vgdb=full --vgdb-error=0 --vgdb-prefix=./vgdb-prefix-mcwatchpoints
stdout_filter: filter_make_empty
|
|
From: <sv...@va...> - 2011-05-27 13:25:52
|
Author: sewardj
Date: 2011-05-27 14:20:56 +0100 (Fri, 27 May 2011)
New Revision: 2153
Log:
Add a field 'UChar delta' to IRStmt_IMark, and use it to carry around
the T bit for the instruction when the instruction is a ARM/Thumb.
This more or less avoids introducing Thumb specific hacks in the IR,
yet makes it possible to identify, from an IMark, whether it refers to
a Thumb or ARM instruction. This is important for the GDB server
integration to work properly on Thumb code.
Patch from bug 214909 comment 99 (vex part).
(Philippe Waroquiers, phi...@sk...)
Modified:
trunk/priv/guest_generic_bb_to_IR.c
trunk/priv/ir_defs.c
trunk/priv/ir_opt.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest_generic_bb_to_IR.c
===================================================================
--- trunk/priv/guest_generic_bb_to_IR.c 2011-05-17 16:18:36 UTC (rev 2152)
+++ trunk/priv/guest_generic_bb_to_IR.c 2011-05-27 13:20:56 UTC (rev 2153)
@@ -267,15 +267,30 @@
distinguishes ARM vs Thumb instructions. All instructions
actually start on at least 2-aligned addresses. So we need
to ignore the bottom bit of the insn address when forming the
- IMark. For more details of this convention, see comments on
- definition of guest_R15 in libvex_guest_arm.h. */
- addStmtToIRSB( irsb,
- IRStmt_IMark( arch_guest == VexArchARM
- ? (guest_IP_curr_instr & ~(Addr64)1)
- : guest_IP_curr_instr,
- 0
- )
- );
+ IMark's address field, but put that bottom bit in the delta
+ field, so that comparisons against guest_R15T for Thumb can
+ be done correctly. By inspecting the delta field,
+ instruction processors can determine whether the instruction
+ was originally Thumb or ARM. For more details of this
+ convention, see comments on definition of guest_R15T in
+ libvex_guest_arm.h. */
+ if (arch_guest == VexArchARM && (guest_IP_curr_instr & (Addr64)1)) {
+ /* Thumb insn => mask out the T bit, but put it in delta */
+ addStmtToIRSB( irsb,
+ IRStmt_IMark(guest_IP_curr_instr & ~(Addr64)1,
+ 0, /* len */
+ 1 /* delta */
+ )
+ );
+ } else {
+ /* All other targets: store IP as-is, and set delta to zero. */
+ addStmtToIRSB( irsb,
+ IRStmt_IMark(guest_IP_curr_instr,
+ 0, /* len */
+ 0 /* delta */
+ )
+ );
+ }
/* for the first insn, the dispatch loop will have set
%IP, but for all the others we have to do it ourselves. */
Modified: trunk/priv/ir_defs.c
===================================================================
--- trunk/priv/ir_defs.c 2011-05-17 16:18:36 UTC (rev 2152)
+++ trunk/priv/ir_defs.c 2011-05-27 13:20:56 UTC (rev 2153)
@@ -1148,8 +1148,9 @@
vex_printf("IR-NoOp");
break;
case Ist_IMark:
- vex_printf( "------ IMark(0x%llx, %d) ------",
- s->Ist.IMark.addr, s->Ist.IMark.len);
+ vex_printf( "------ IMark(0x%llx, %d, %u) ------",
+ s->Ist.IMark.addr, s->Ist.IMark.len,
+ (UInt)s->Ist.IMark.delta);
break;
case Ist_AbiHint:
vex_printf("====== AbiHint(");
@@ -1604,11 +1605,12 @@
static_closure.tag = Ist_NoOp;
return &static_closure;
}
-IRStmt* IRStmt_IMark ( Addr64 addr, Int len ) {
- IRStmt* s = LibVEX_Alloc(sizeof(IRStmt));
- s->tag = Ist_IMark;
- s->Ist.IMark.addr = addr;
- s->Ist.IMark.len = len;
+IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta ) {
+ IRStmt* s = LibVEX_Alloc(sizeof(IRStmt));
+ s->tag = Ist_IMark;
+ s->Ist.IMark.addr = addr;
+ s->Ist.IMark.len = len;
+ s->Ist.IMark.delta = delta;
return s;
}
IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
@@ -1871,7 +1873,9 @@
s->Ist.AbiHint.len,
deepCopyIRExpr(s->Ist.AbiHint.nia));
case Ist_IMark:
- return IRStmt_IMark(s->Ist.IMark.addr, s->Ist.IMark.len);
+ return IRStmt_IMark(s->Ist.IMark.addr,
+ s->Ist.IMark.len,
+ s->Ist.IMark.delta);
case Ist_Put:
return IRStmt_Put(s->Ist.Put.offset,
deepCopyIRExpr(s->Ist.Put.data));
@@ -3214,9 +3218,11 @@
switch (stmt->tag) {
case Ist_IMark:
/* Somewhat heuristic, but rule out totally implausible
- instruction sizes. */
+ instruction sizes and deltas. */
if (stmt->Ist.IMark.len < 0 || stmt->Ist.IMark.len > 20)
sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
+ if (stmt->Ist.IMark.delta > 1)
+ sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible");
break;
case Ist_AbiHint:
if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
Modified: trunk/priv/ir_opt.c
===================================================================
--- trunk/priv/ir_opt.c 2011-05-17 16:18:36 UTC (rev 2152)
+++ trunk/priv/ir_opt.c 2011-05-27 13:20:56 UTC (rev 2153)
@@ -1997,7 +1997,9 @@
}
case Ist_IMark:
- return IRStmt_IMark(st->Ist.IMark.addr, st->Ist.IMark.len);
+ return IRStmt_IMark(st->Ist.IMark.addr,
+ st->Ist.IMark.len,
+ st->Ist.IMark.delta);
case Ist_NoOp:
return IRStmt_NoOp();
@@ -4269,7 +4271,9 @@
st->Ist.Exit.dst
);
case Ist_IMark:
- return IRStmt_IMark(st->Ist.IMark.addr, st->Ist.IMark.len);
+ return IRStmt_IMark(st->Ist.IMark.addr,
+ st->Ist.IMark.len,
+ st->Ist.IMark.delta);
case Ist_NoOp:
return IRStmt_NoOp();
case Ist_MBE:
Modified: trunk/pub/libvex_ir.h
===================================================================
--- trunk/pub/libvex_ir.h 2011-05-17 16:18:36 UTC (rev 2152)
+++ trunk/pub/libvex_ir.h 2011-05-27 13:20:56 UTC (rev 2153)
@@ -104,7 +104,7 @@
One Vex IR translation for this code would be this:
- ------ IMark(0x24F275, 7) ------
+ ------ IMark(0x24F275, 7, 0) ------
t3 = GET:I32(0) # get %eax, a 32-bit integer
t2 = GET:I32(12) # get %ebx, a 32-bit integer
t1 = Add32(t3,t2) # addl
@@ -147,7 +147,7 @@
This becomes (again ignoring condition code and instruction pointer
updates):
- ------ IMark(0x4000ABA, 3) ------
+ ------ IMark(0x4000ABA, 3, 0) ------
t3 = Add32(GET:I32(0),0x4:I32)
t2 = LDle:I32(t3)
t1 = GET:I32(8)
@@ -1894,12 +1894,27 @@
the IRSB). Contains the address and length of the
instruction.
- ppIRStmt output: ------ IMark(<addr>, <len>) ------,
- eg. ------ IMark(0x4000792, 5) ------,
+ It also contains a delta value. The delta must be
+ subtracted from a guest program counter value before
+ attempting to establish, by comparison with the address
+ and length values, whether or not that program counter
+ value refers to this instruction. For x86, amd64, ppc32,
+ ppc64 and arm, the delta value is zero. For Thumb
+ instructions, the delta value is one. This is because, on
+ Thumb, guest PC values (guest_R15T) are encoded using the
+ top 31 bits of the instruction address and a 1 in the lsb;
+ hence they appear to be (numerically) 1 past the start of
+ the instruction they refer to. IOW, guest_R15T on ARM
+ holds a standard ARM interworking address.
+
+ ppIRStmt output: ------ IMark(<addr>, <len>, <delta>) ------,
+ eg. ------ IMark(0x4000792, 5, 0) ------,
*/
struct {
Addr64 addr; /* instruction address */
Int len; /* instruction length */
+ UChar delta; /* addr = program counter as encoded in guest state
+ - delta */
} IMark;
/* META: An ABI hint, which says something about this
@@ -2076,7 +2091,7 @@
/* Statement constructors. */
extern IRStmt* IRStmt_NoOp ( void );
-extern IRStmt* IRStmt_IMark ( Addr64 addr, Int len );
+extern IRStmt* IRStmt_IMark ( Addr64 addr, Int len, UChar delta );
extern IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia );
extern IRStmt* IRStmt_Put ( Int off, IRExpr* data );
extern IRStmt* IRStmt_PutI ( IRRegArray* descr, IRExpr* ix, Int bias,
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