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From: Evgeniy S. <eu...@go...> - 2010-08-05 12:50:54
|
Hi, glibc version is baked into default suppressions file at Valgrind build time. This becomes a problem when glibc is updated, or when Valgrind installation is transferred to another machine. Other than that, the same Valgrind binary seems to work perfectly well with different versions of glibc (we tested 2.7, 2.10, 2.11). Could these suppressions be made a little more generic, excluding the minor version number from object names? A line like obj:/lib*/ld-2.*.so* instead of obj:/lib*/ld-2.11*.so* still seems specific enough not to match anything unexpected. Alternatively, we could include suppressions for all reasonable versions of glibc at the same time. I can prepare the patch if either option is acceptable. |
|
From: Evgeniy S. <eu...@go...> - 2010-08-04 08:54:09
|
Thanks for the advice! Some comments inline.
On Thu, Jun 3, 2010 at 10:02 AM, Julian Seward <js...@ac...> wrote:
>
> > I've got some success with the following approach. I steal the address of
> > usleep() function from the program with a client request from vgpreload
> > part of the tool, and insert a call to that address during code
> > instrumentation:
> >
> > // put sleep duration in %edi
> > PUT(56) = 0xF4241:I64
> > // put return address on the stack
> > t15 = GET:I64(32)
> > t16 = Sub64(t15,0x8:I64)
> > PUT(32) = t16
> > STle(t16) = 0x405F55:I64
> > // call the stolen usleep()
> > if (1:I1) goto {Call} 0x40A012:I64
> >
> > This code must be placed immediately before an IMark, whose address is
> the
> > return address of the call (0x405FF5 in this case). It also can not be
> > placed at the beginning of an IRSB, because valgrind complains about an
> > unknown PC. This approach is very arch-dependent and does not feel right.
>
> I think this will work, but as you say, it is ugly.
>
> > Is there a simpler way to do this? Is it possible to somehow tell the
> > valgrind scheduler to let the other threads run for a bit (some kind of
> > VG_(sched_yield) or VG_(sleep))?
>
> Yes (I think so .. I tried something like this a couple of months
> back).
>
> Let's suppose X is the client instruction after which you want to
> let other threads run. After the translation of X, finish the
> IRSB, and put a jump to the next instruction. (in the same way
> that the front ends will translate an unconditional branch that
> they don't chase into).
>
It seems that, unless I pass --vex-iropt-level=0, pre-instrumentation
optimization pass can move some instruction side effects past the IMark. For
example, this code:
0xD7DF7F7: movq (%rsi),%rax
------ IMark(0xD7DF7F7, 3) ------
t0 = GET:I64(48)
PUT(0) = LDle:I64(t0)
0xD7DF7FA: leaq 64(%rsp), %rcx
------ IMark(0xD7DF7FA, 5) ------
PUT(168) = 0xD7DF7FA:I64
t1 = Add64(GET:I64(32),0x40:I64)
PUT(8) = t1
..................
is translated to this even before the tool can take a look at it:
------ IMark(0xD7DF7F7, 3) ------
t0 = GET:I64(48)
t58 = LDle:I64(t0)
------ IMark(0xD7DF7FA, 5) ------
t60 = GET:I64(32)
t59 = Add64(t60,0x40:I64)
..............
If the IRSB is finished at 0xD7DF7FA IMark, all effects of the previous
instruction will be lost. Disabling optimization helps, but obviously slows
down execution and still looks fragile. What is the correct way to finish an
IRSB at some point, making sure that all effects of instructions up to that
point have already happened?
Except .. for this jump, mark it as Ijk_Yield, not _Boring.
>
> In scheduler.c find this
>
> case VEX_TRC_JMP_YIELD:
> /* Explicit yield, because this thread is in a spin-lock
> or something. Only let the thread run for a short while
> longer. Because swapping to another thread is expensive,
> we're prepared to let this thread eat a little more CPU
> before swapping to another. That means that short term
> spins waiting for hardware to poke memory won't cause a
> thread swap. */
> if (VG_(dispatch_ctr) > 2000)
> VG_(dispatch_ctr) = 2000;
> break;
>
> change '2000' to '1'
>
> In scheduler.c find this
>
> /* ------------ now we don't have The Lock ------------ */
> ...
> /* ------------ now we do have The Lock ------------ */
>
> in between these two comments add this
>
> VG_(do_syscall0)(__NR_sched_yield);
>
> this should cause the thread to be placed to the back of the run queue
> for threads of this priority, which will allow another thread to run.
>
> but be careful, I think __NR_sched_yield on linux takes a parameter which
> controls its behaviour. Google for that.
>
> add debug printing to make sure this is really behaving as you expect.
> (it's all pretty fragile, but I'm sure i had something like this working
> earlier this year)
>
I've noticed a VG_(vg_yield) function that seems to do exactly what is
needed. Is there a fundamental reason why it can not be used in helper
functions? Is there an assumption somewhere that the_BigLock can not be
released when a block of generated code has started execution and not
finished it yet?
|
|
From: Alexander P. <gl...@go...> - 2010-08-03 14:14:35
|
This is the output of trunk/useful/cpuid for the machine the tests are built on: ========== 00000000 00000000 -> 0000000a 756e6547 6c65746e 49656e69 00000001 00000000 -> 00010676 01040800 000ce3bd bfebfbff 00000002 00000000 -> 05b0b101 005657f0 00000000 2cb4304e 00000003 00000000 -> 00000000 00000000 00000000 00000000 00000004 00000000 -> 0c000121 01c0003f 0000003f 00000001 00000004 00000001 -> 0c000122 01c0003f 0000003f 00000001 00000004 00000002 -> 0c004143 05c0003f 00000fff 00000001 00000004 00000003 -> 00000000 00000000 00000000 00000000 00000004 00000004 -> 00000000 00000000 00000000 00000000 00000004 00000005 -> 00000000 00000000 00000000 00000000 00000004 00000006 -> 00000000 00000000 00000000 00000000 00000004 00000007 -> 00000000 00000000 00000000 00000000 00000004 00000008 -> 00000000 00000000 00000000 00000000 00000004 00000009 -> 00000000 00000000 00000000 00000000 00000005 00000000 -> 00000040 00000040 00000003 00002220 00000006 00000000 -> 00000001 00000002 00000001 00000000 00000007 00000000 -> 00000000 00000000 00000000 00000000 00000008 00000000 -> 00000400 00000000 00000000 00000000 00000009 00000000 -> 00000000 00000000 00000000 00000000 0000000a 00000000 -> 07280202 00000000 00000000 00000503 80000000 00000000 -> 80000008 00000000 00000000 00000000 80000001 00000000 -> 00000000 00000000 00000001 20100800 80000002 00000000 -> 65746e49 2952286c 6f655820 2952286e 80000003 00000000 -> 55504320 20202020 20202020 45202020 80000004 00000000 -> 32363435 20402020 30382e32 007a4847 80000005 00000000 -> 00000000 00000000 00000000 00000000 80000006 00000000 -> 00000000 00000000 18008040 00000000 80000007 00000000 -> 00000000 00000000 00000000 00000000 80000008 00000000 -> 00003026 00000000 00000000 00000000 invalid 000004d2 00000000 -> 07280202 00000000 00000000 00000503 800004d3 00000000 -> 07280202 00000000 00000000 00000503 ========= On Tue, Aug 3, 2010 at 4:13 PM, Alexander Potapenko <gl...@go...>wrote: > Nightly build on mcgrind ( Darwin 9.8.0 i386 ) > Started at 2010-08-03 15:44:28 MSD > Ended at 2010-08-03 15:53:48 MSD > Results differ from 24 hours ago > > Checking out valgrind source tree ... done > Configuring valgrind ... done > Building valgrind ... failed > > Last 20 lines of verbose log follow echo > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o int int.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT jcxz.o -MD -MP -MF > .deps/jcxz.Tpo -c -o jcxz.o jcxz.c > mv -f .deps/jcxz.Tpo .deps/jcxz.Po > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o jcxz jcxz.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT lahf.o -MD -MP -MF > .deps/lahf.Tpo -c -o lahf.o lahf.c > mv -f .deps/lahf.Tpo .deps/lahf.Po > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o lahf lahf.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT looper.o -MD -MP -MF > .deps/looper.Tpo -c -o looper.o looper.c > mv -f .deps/looper.Tpo .deps/looper.Po > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o looper > looper.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF > .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c > /var/tmp//cc3NmJaY.s:51:no such instruction: `lzcntl 0(%eax), %esi' > /var/tmp//cc3NmJaY.s:93:no such instruction: `lzcntw 0(%eax), %si' > make[5]: *** [lzcnt32.o] Error 1 > rm insn_ssse3.c insn_sse3.c insn_fpu.c insn_sse.c insn_mmx.c > insn_mmxext.c insn_sse2.c insn_basic.c insn_cmov.c > make[4]: *** [check-am] Error 2 > make[3]: *** [check-recursive] Error 1 > make[2]: *** [check-recursive] Error 1 > make[1]: *** [check-recursive] Error 1 > make: *** [check] Error 2 > ================================================= > == Results from 24 hours ago == > ================================================= > > Checking out valgrind source tree ... done > Configuring valgrind ... done > Building valgrind ... failed > > Last 20 lines of verbose log follow echo > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o int int.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT jcxz.o -MD -MP -MF > .deps/jcxz.Tpo -c -o jcxz.o jcxz.c > mv -f .deps/jcxz.Tpo .deps/jcxz.Po > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o jcxz jcxz.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT lahf.o -MD -MP -MF > .deps/lahf.Tpo -c -o lahf.o lahf.c > mv -f .deps/lahf.Tpo .deps/lahf.Po > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o lahf lahf.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT looper.o -MD -MP -MF > .deps/looper.Tpo -c -o looper.o looper.c > mv -f .deps/looper.Tpo .deps/looper.Po > gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic > -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o looper > looper.o > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF > .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c > /var/tmp//ccJCvqLg.s:51:no such instruction: `lzcntl 0(%eax), %esi' > /var/tmp//ccJCvqLg.s:93:no such instruction: `lzcntw 0(%eax), %si' > make[5]: *** [lzcnt32.o] Error 1 > rm insn_ssse3.c insn_sse3.c insn_fpu.c insn_sse.c insn_mmx.c > insn_mmxext.c insn_sse2.c insn_basic.c insn_cmov.c > make[4]: *** [check-am] Error 2 > make[3]: *** [check-recursive] Error 1 > make[2]: *** [check-recursive] Error 1 > make[1]: *** [check-recursive] Error 1 > make: *** [check] Error 2 > > ================================================= > == Difference between 24 hours ago and now == > ================================================= > > *** old.short Tue Aug 3 15:49:07 2010 > --- new.short Tue Aug 3 15:53:48 2010 > *************** > *** 17,20 **** > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF > .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c > ! /var/tmp//ccJCvqLg.s:51:no such instruction: `lzcntl 0(%eax), %esi' > ! /var/tmp//ccJCvqLg.s:93:no such instruction: `lzcntw 0(%eax), %si' > make[5]: *** [lzcnt32.o] Error 1 > --- 17,20 ---- > gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include > -I../../../coregrind -I../../../include -I../../../VEX/pub > -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall > -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long > -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF > .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c > ! /var/tmp//cc3NmJaY.s:51:no such instruction: `lzcntl 0(%eax), %esi' > ! /var/tmp//cc3NmJaY.s:93:no such instruction: `lzcntw 0(%eax), %si' > make[5]: *** [lzcnt32.o] Error 1 > > > > > -- > Alexander Potapenko > Software Engineer > Google Moscow > -- Alexander Potapenko Software Engineer Google Moscow |
|
From: Alexander P. <gl...@go...> - 2010-08-03 12:13:43
|
Nightly build on mcgrind ( Darwin 9.8.0 i386 ) Started at 2010-08-03 15:44:28 MSD Ended at 2010-08-03 15:53:48 MSD Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... failed Last 20 lines of verbose log follow echo gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o int int.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT jcxz.o -MD -MP -MF .deps/jcxz.Tpo -c -o jcxz.o jcxz.c mv -f .deps/jcxz.Tpo .deps/jcxz.Po gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o jcxz jcxz.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT lahf.o -MD -MP -MF .deps/lahf.Tpo -c -o lahf.o lahf.c mv -f .deps/lahf.Tpo .deps/lahf.Po gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o lahf lahf.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT looper.o -MD -MP -MF .deps/looper.Tpo -c -o looper.o looper.c mv -f .deps/looper.Tpo .deps/looper.Po gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o looper looper.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c /var/tmp//cc3NmJaY.s:51:no such instruction: `lzcntl 0(%eax), %esi' /var/tmp//cc3NmJaY.s:93:no such instruction: `lzcntw 0(%eax), %si' make[5]: *** [lzcnt32.o] Error 1 rm insn_ssse3.c insn_sse3.c insn_fpu.c insn_sse.c insn_mmx.c insn_mmxext.c insn_sse2.c insn_basic.c insn_cmov.c make[4]: *** [check-am] Error 2 make[3]: *** [check-recursive] Error 1 make[2]: *** [check-recursive] Error 1 make[1]: *** [check-recursive] Error 1 make: *** [check] Error 2 ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... failed Last 20 lines of verbose log follow echo gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o int int.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT jcxz.o -MD -MP -MF .deps/jcxz.Tpo -c -o jcxz.o jcxz.c mv -f .deps/jcxz.Tpo .deps/jcxz.Po gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o jcxz jcxz.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT lahf.o -MD -MP -MF .deps/lahf.Tpo -c -o lahf.o lahf.c mv -f .deps/lahf.Tpo .deps/lahf.Po gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o lahf lahf.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT looper.o -MD -MP -MF .deps/looper.Tpo -c -o looper.o looper.c mv -f .deps/looper.Tpo .deps/looper.Po gcc -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o looper looper.o gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c /var/tmp//ccJCvqLg.s:51:no such instruction: `lzcntl 0(%eax), %esi' /var/tmp//ccJCvqLg.s:93:no such instruction: `lzcntw 0(%eax), %si' make[5]: *** [lzcnt32.o] Error 1 rm insn_ssse3.c insn_sse3.c insn_fpu.c insn_sse.c insn_mmx.c insn_mmxext.c insn_sse2.c insn_basic.c insn_cmov.c make[4]: *** [check-am] Error 2 make[3]: *** [check-recursive] Error 1 make[2]: *** [check-recursive] Error 1 make[1]: *** [check-recursive] Error 1 make: *** [check] Error 2 ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Tue Aug 3 15:49:07 2010 --- new.short Tue Aug 3 15:53:48 2010 *************** *** 17,20 **** gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c ! /var/tmp//ccJCvqLg.s:51:no such instruction: `lzcntl 0(%eax), %esi' ! /var/tmp//ccJCvqLg.s:93:no such instruction: `lzcntw 0(%eax), %si' make[5]: *** [lzcnt32.o] Error 1 --- 17,20 ---- gcc -DHAVE_CONFIG_H -I. -I../../.. -I../../.. -I../../../include -I../../../coregrind -I../../../include -I../../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -m32 -mmmx -msse -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT lzcnt32.o -MD -MP -MF .deps/lzcnt32.Tpo -c -o lzcnt32.o lzcnt32.c ! /var/tmp//cc3NmJaY.s:51:no such instruction: `lzcntl 0(%eax), %esi' ! /var/tmp//cc3NmJaY.s:93:no such instruction: `lzcntw 0(%eax), %si' make[5]: *** [lzcnt32.o] Error 1 -- Alexander Potapenko Software Engineer Google Moscow |
|
From: Dave G. <go...@mc...> - 2010-08-02 15:54:38
|
On Aug 2, 2010, at 9:03 AM CDT, Tom Hughes wrote: > On 02/08/10 14:33, Alexander Potapenko wrote: > >> has the SVN server version changed? >> BTW, I'm still able to do "svn co" from the same machine manually. > > That message is nothing to do with the server. > > It means that you checked it out with one client and then tried to > update it using another, older, client. You can also get that message in a more surprising way: 1) Checkout using older SVN client version A. 2) Update using newer SVN client version B. SVN quietly upgrades the local repository format. 3) Attempting to update (or do almost anything else) with client A now yields the error message. There's some way to downgrade a working copy format (google around for it), but it's usually easier to just blow away the whole working copy and check it out with whatever client version you intend to use in the long run. -Dave |
|
From: Tom H. <to...@co...> - 2010-08-02 14:48:42
|
On 02/08/10 14:33, Alexander Potapenko wrote: > has the SVN server version changed? > BTW, I'm still able to do "svn co" from the same machine manually. That message is nothing to do with the server. It means that you checked it out with one client and then tried to update it using another, older, client. Tom -- Tom Hughes (to...@co...) http://compton.nu/ |
|
From: <sv...@va...> - 2010-08-01 16:45:50
|
Author: sewardj
Date: 2010-08-01 17:45:42 +0100 (Sun, 01 Aug 2010)
New Revision: 1999
Log:
Support a couple more Thumb insns. Fix PC alignment problem for ADR.
Modified:
branches/THUMB/priv/guest_arm_toIR.c
Modified: branches/THUMB/priv/guest_arm_toIR.c
===================================================================
--- branches/THUMB/priv/guest_arm_toIR.c 2010-08-01 13:24:56 UTC (rev 1998)
+++ branches/THUMB/priv/guest_arm_toIR.c 2010-08-01 16:45:42 UTC (rev 1999)
@@ -6566,9 +6566,12 @@
case BITS5(1,0,1,0,0): {
/* ---------------- ADD rD, PC, #imm8 * 4 ---------------- */
/* a.k.a. ADR */
+ /* rD = align4(PC) + imm8 * 4 */
UInt rD = INSN0(10,8);
UInt imm8 = INSN0(7,0);
- putIRegT(rD, binop(Iop_Add32, getIRegT(15), mkU32(imm8 * 4)),
+ putIRegT(rD, binop(Iop_Add32,
+ binop(Iop_And32, getIRegT(15), mkU32(~3UL)),
+ mkU32(imm8 * 4)),
condT);
DIP("add r%u, pc, #%u\n", rD, imm8 * 4);
goto decode_success;
@@ -7201,7 +7204,8 @@
if (INSN0(15,11) == BITS5(1,1,1,1,0)
&& ( INSN0(9,5) == BITS5(0,0,0,1,0) // ORR
|| INSN0(9,5) == BITS5(0,0,0,0,0) // AND
- || INSN0(9,5) == BITS5(0,0,0,0,1)) // BIC
+ || INSN0(9,5) == BITS5(0,0,0,0,1) // BIC
+ || INSN0(9,5) == BITS5(0,0,1,0,0)) // EOR
&& INSN1(15,15) == 0) {
UInt bS = INSN0(4,4);
UInt rN = INSN0(3,0);
@@ -7211,10 +7215,11 @@
IROp op = Iop_INVALID;
HChar* nm = "???";
switch (INSN0(9,5)) {
+ case BITS5(0,0,0,1,0): op = Iop_Or32; nm = "orr"; break;
case BITS5(0,0,0,0,0): op = Iop_And32; nm = "and"; break;
- case BITS5(0,0,0,1,0): op = Iop_Or32; nm = "orr"; break;
case BITS5(0,0,0,0,1): op = Iop_And32; nm = "bic";
isBIC = True; break;
+ case BITS5(0,0,1,0,0): op = Iop_Xor32; nm = "eor"; break;
default: vassert(0);
}
IRTemp argL = newTemp(Ity_I32);
@@ -7308,6 +7313,59 @@
}
}
+ /* ---------- (T3) ADC{S}.W Rd, Rn, Rm, {shift} ---------- */
+ // also SBC
+ if (INSN0(15,9) == BITS7(1,1,1,0,1,0,1)
+ && ( INSN0(8,5) == BITS4(1,0,1,0) // adc subopc
+ /* || INSN0(8,5) == BITS4(?,?,?,?*/ ) // sbc subopc
+ && INSN1(15,15) == 0) {
+ /* ADC: Rd = Rn + shifter_operand + oldC */
+ /* SBC: Rd = Rn - shifter_operand - (oldC ^ 1) */
+ UInt rN = INSN0(3,0);
+ UInt rD = INSN1(11,8);
+ UInt rM = INSN1(3,0);
+ if (!isBadRegT(rD) && !isBadRegT(rN) && !isBadRegT(rM)) {
+ UInt bS = INSN0(4,4);
+ UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6);
+ UInt how = INSN1(5,4);
+
+ IRTemp argL = newTemp(Ity_I32);
+ assign(argL, getIRegT(rN));
+
+ IRTemp rMt = newTemp(Ity_I32);
+ assign(rMt, getIRegT(rM));
+
+ IRTemp argR = newTemp(Ity_I32);
+ IRTemp oldC = newTemp(Ity_I32);
+ compute_result_and_C_after_shift_by_imm5(
+ dis_buf, &argR, &oldC, rMt, how, imm5, rM
+ );
+
+ HChar* nm = "???";
+ IRTemp res = newTemp(Ity_I32);
+ switch (INSN0(8,5)) {
+ case BITS4(1,0,1,0): // ADC
+ nm = "adc";
+ assign(res,
+ binop(Iop_Add32,
+ binop(Iop_Add32, mkexpr(argL), mkexpr(argR)),
+ mkexpr(oldC) ));
+ putIRegT(rD, mkexpr(res), condT);
+ if (bS)
+ setFlags_D1_D2_ND( ARMG_CC_OP_ADC,
+ argL, argR, oldC, condT );
+
+ break;
+ default:
+ vassert(0);
+ }
+
+ DIP("%s%s.w r%u, r%u, %s\n",
+ nm, bS ? "s" : "", rD, rN, dis_buf);
+ goto decode_success;
+ }
+ }
+
/* ---------- (T3) AND{S}.W Rd, Rn, Rm, {shift} ---------- */
/* ---------- (T3) ORR{S}.W Rd, Rn, Rm, {shift} ---------- */
/* ---------- (T3) EOR{S}.W Rd, Rn, Rm, {shift} ---------- */
@@ -8248,21 +8306,35 @@
}
/* ------------------ UXTB ------------------ */
- if (INSN0(15,0) == 0xFA5F
+ if ((INSN0(15,0) == 0xFA5F || INSN0(15,0) == 0xFA1F)
&& INSN1(15,12) == BITS4(1,1,1,1)
&& INSN1(7,6) == BITS2(1,0)) {
UInt rD = INSN1(11,8);
UInt rM = INSN1(3,0);
UInt rot = INSN1(5,4);
if (!isBadRegT(rD) && !isBadRegT(rM)) {
+ HChar* nm = "???";
IRTemp srcT = newTemp(Ity_I32);
IRTemp rotT = newTemp(Ity_I32);
IRTemp dstT = newTemp(Ity_I32);
assign(srcT, getIRegT(rM));
assign(rotT, genROR32(srcT, 8 * rot));
- assign(dstT, unop(Iop_8Uto32, unop(Iop_32to8, mkexpr(rotT))));
+ switch (INSN0(15,0)) {
+ case 0xFA5F: // UXTB
+ nm = "uxtb";
+ assign(dstT, unop(Iop_8Uto32,
+ unop(Iop_32to8, mkexpr(rotT))));
+ break;
+ case 0xFA1F: // UXTH
+ nm = "uxth";
+ assign(dstT, unop(Iop_16Uto32,
+ unop(Iop_32to16, mkexpr(rotT))));
+ break;
+ default:
+ vassert(0);
+ }
putIRegT(rD, mkexpr(dstT), condT);
- DIP("uxtb r%u, r%u, ror #%u\n", rD, rM, 8 * rot);
+ DIP("%s r%u, r%u, ror #%u\n", nm, rD, rM, 8 * rot);
goto decode_success;
}
}
|
|
From: <sv...@va...> - 2010-08-01 13:25:05
|
Author: sewardj
Date: 2010-08-01 14:24:56 +0100 (Sun, 01 Aug 2010)
New Revision: 1998
Log:
Fix up the IR optimiser a bit and the ARM spechelper for
armg_calculate_condition in particular. This is so it can
successfully fold out the all the boilerplate IR guff inserted at the
start of translation of all Thumb instructions, in most circumstances.
Modified:
branches/THUMB/priv/guest_amd64_defs.h
branches/THUMB/priv/guest_amd64_helpers.c
branches/THUMB/priv/guest_arm_defs.h
branches/THUMB/priv/guest_arm_helpers.c
branches/THUMB/priv/guest_arm_toIR.c
branches/THUMB/priv/guest_ppc_defs.h
branches/THUMB/priv/guest_ppc_helpers.c
branches/THUMB/priv/guest_x86_defs.h
branches/THUMB/priv/guest_x86_helpers.c
branches/THUMB/priv/ir_opt.c
branches/THUMB/priv/ir_opt.h
branches/THUMB/priv/main_main.c
Modified: branches/THUMB/priv/guest_amd64_defs.h
===================================================================
--- branches/THUMB/priv/guest_amd64_defs.h 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_amd64_defs.h 2010-08-01 13:24:56 UTC (rev 1998)
@@ -61,8 +61,10 @@
/* Used by the optimiser to specialise calls to helpers. */
extern
-IRExpr* guest_amd64_spechelper ( HChar* function_name,
- IRExpr** args );
+IRExpr* guest_amd64_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts );
/* Describes to the optimiser which part of the guest state require
precise memory exceptions. This is logically part of the guest
Modified: branches/THUMB/priv/guest_amd64_helpers.c
===================================================================
--- branches/THUMB/priv/guest_amd64_helpers.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_amd64_helpers.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -867,7 +867,9 @@
}
IRExpr* guest_amd64_spechelper ( HChar* function_name,
- IRExpr** args )
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts )
{
# define unop(_op,_a1) IRExpr_Unop((_op),(_a1))
# define binop(_op,_a1,_a2) IRExpr_Binop((_op),(_a1),(_a2))
Modified: branches/THUMB/priv/guest_arm_defs.h
===================================================================
--- branches/THUMB/priv/guest_arm_defs.h 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_arm_defs.h 2010-08-01 13:24:56 UTC (rev 1998)
@@ -55,8 +55,10 @@
/* Used by the optimiser to specialise calls to helpers. */
extern
-IRExpr* guest_arm_spechelper ( HChar* function_name,
- IRExpr** args );
+IRExpr* guest_arm_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts );
/* Describes to the optimser which part of the guest state require
precise memory exceptions. This is logically part of the guest
Modified: branches/THUMB/priv/guest_arm_helpers.c
===================================================================
--- branches/THUMB/priv/guest_arm_helpers.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_arm_helpers.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -215,11 +215,16 @@
{
UInt cond = cond_n_op >> 4;
UInt cc_op = cond_n_op & 0xF;
- UInt nf, zf, vf, cf;
- UInt inv = cond & 1;
- // vex_printf("XXXXXXXX %x %x %x %x\n", cond_n_op, cc_dep1, cc_dep2, cc_dep3);
- UInt nzcv = armg_calculate_flags_nzcv(cc_op, cc_dep1, cc_dep2, cc_dep3);
+ UInt nf, zf, vf, cf, nzcv, inv;
+ // vex_printf("XXXXXXXX %x %x %x %x\n",
+ // cond_n_op, cc_dep1, cc_dep2, cc_dep3);
+ // skip flags computation in this case
+ if (cond == ARMCondAL) return 1;
+
+ inv = cond & 1;
+ nzcv = armg_calculate_flags_nzcv(cc_op, cc_dep1, cc_dep2, cc_dep3);
+
switch (cond) {
case ARMCondEQ: // Z=1 => z
case ARMCondNE: // Z=0
@@ -260,9 +265,7 @@
zf = nzcv >> ARMG_CC_SHIFT_Z;
return 1 & (inv ^ ~(zf | (nf ^ vf)));
- case ARMCondAL:
- return 1; /* well, that bit at least was easy! */
-
+ case ARMCondAL: // handled above
case ARMCondNV: // should never get here: Illegal instr
default:
/* shouldn't really make these calls from generated code */
@@ -291,8 +294,10 @@
&& e->Iex.Const.con->Ico.U32 == n );
}
-IRExpr* guest_arm_spechelper ( HChar* function_name,
- IRExpr** args )
+IRExpr* guest_arm_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts )
{
# define unop(_op,_a1) IRExpr_Unop((_op),(_a1))
# define binop(_op,_a1,_a2) IRExpr_Binop((_op),(_a1),(_a2))
@@ -312,7 +317,7 @@
vex_printf("\n");
# endif
- /* --------- specialising "x86g_calculate_condition" --------- */
+ /* --------- specialising "armg_calculate_condition" --------- */
if (vex_streq(function_name, "armg_calculate_condition")) {
/* specialise calls to above "armg_calculate condition" function */
@@ -343,7 +348,7 @@
}
if (isU32(cond_n_op, (ARMCondLT << 4) | ARMG_CC_OP_SUB)) {
- /* LE after SUB --> test argL <s argR */
+ /* LT after SUB --> test argL <s argR */
return unop(Iop_1Uto32,
binop(Iop_CmpLT32S, cc_dep1, cc_dep2));
}
@@ -380,6 +385,51 @@
binop(Iop_CmpNE32, cc_dep1, mkU32(0)));
}
+ /*----------------- AL -----------------*/
+ /* A critically important case for Thumb code.
+
+ What we're trying to spot is the case where cond_n_op is an
+ expression of the form Or32(..., 0xE0) since that means the
+ caller is asking for CondAL and we can simply return 1
+ without caring what the ... part is. This is a potentially
+ dodgy kludge in that it assumes that the ... part has zeroes
+ in bits 7:4, so that the result of the Or32 is guaranteed to
+ be 0xE in bits 7:4. Given that the places where this first
+ arg are constructed (in guest_arm_toIR.c) are very
+ constrained, we can get away with this. To make this
+ guaranteed safe would require to have a new primop, Slice44
+ or some such, thusly
+
+ Slice44(arg1, arg2) = 0--(24)--0 arg1[7:4] arg2[3:0]
+
+ and we would then look for Slice44(0xE0, ...)
+ which would give the required safety property.
+
+ It would be infeasibly expensive to scan backwards through
+ the entire block looking for an assignment to the temp, so
+ just look at the previous 16 statements. That should find it
+ if it is an interesting case, as a result of how the
+ boilerplate guff at the start of each Thumb insn translation
+ is made.
+ */
+ if (cond_n_op->tag == Iex_RdTmp) {
+ Int j;
+ IRTemp look_for = cond_n_op->Iex.RdTmp.tmp;
+ Int limit = n_precedingStmts - 16;
+ if (limit < 0) limit = 0;
+ if (0) vex_printf("scanning %d .. %d\n", n_precedingStmts-1, limit);
+ for (j = n_precedingStmts - 1; j >= limit; j--) {
+ IRStmt* st = precedingStmts[j];
+ if (st->tag == Ist_WrTmp
+ && st->Ist.WrTmp.tmp == look_for
+ && st->Ist.WrTmp.data->tag == Iex_Binop
+ && st->Ist.WrTmp.data->Iex.Binop.op == Iop_Or32
+ && isU32(st->Ist.WrTmp.data->Iex.Binop.arg2, (ARMCondAL << 4)))
+ return mkU32(1);
+ }
+ /* Didn't find any useful binding to the first arg
+ in the previous 16 stmts. */
+ }
}
# undef unop
Modified: branches/THUMB/priv/guest_arm_toIR.c
===================================================================
--- branches/THUMB/priv/guest_arm_toIR.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_arm_toIR.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -32,8 +32,19 @@
that all cases where putIRegT writes r15, we generate a jump.
All uses of newTemp assign to an IRTemp and not a UInt
- */
+
+ XXXX thumb to do: improve the ITSTATE-zeroing optimisation by
+ taking into account the number of insns guarded by an IT.
+
+ remove the nasty hack, in the spechelper, of looking for Or32(...,
+ 0xE0) in as the first arg to armg_calculate_condition, and instead
+ use Slice44 as specified in comments in the spechelper.
+
+ add specialisations for armg_calculate_flag_c and _v, as they
+ are moderately often needed in Thumb code.
+*/
+
/* Limitations, etc
- pretty dodgy exception semantics for {LD,ST}Mxx, no doubt
@@ -5613,7 +5624,26 @@
that would not otherwise have happened. The saving grace is
that such skipping is pretty rare -- it only happens,
statistically, 18/4096ths of the time, so is judged unlikely to
- be a performance problems. */
+ be a performance problems.
+
+ FIXME: do better. Take into account the number of insns covered
+ by any IT insns we find, to rule out cases where an IT clearly
+ cannot cover this instruction. This would improve behaviour for
+ branch targets immediately following an IT-guarded group that is
+ not of full length. Eg, (and completely ignoring issues of 16-
+ vs 32-bit insn length):
+
+ ite cond
+ insn1
+ insn2
+ label: insn3
+ insn4
+
+ The 'it' only conditionalises insn1 and insn2. However, the
+ current analysis is conservative and considers insn3 and insn4
+ also possibly guarded. Hence if 'label:' is the start of a hot
+ loop we will get a big performance hit.
+ */
{
/* Summary result of this analysis: False == safe but
suboptimal. */
Modified: branches/THUMB/priv/guest_ppc_defs.h
===================================================================
--- branches/THUMB/priv/guest_ppc_defs.h 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_ppc_defs.h 2010-08-01 13:24:56 UTC (rev 1998)
@@ -62,12 +62,16 @@
/* Used by the optimiser to specialise calls to helpers. */
extern
-IRExpr* guest_ppc32_spechelper ( HChar* function_name,
- IRExpr** args );
+IRExpr* guest_ppc32_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts );
extern
-IRExpr* guest_ppc64_spechelper ( HChar* function_name,
- IRExpr** args );
+IRExpr* guest_ppc64_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts );
/* Describes to the optimser which part of the guest state require
precise memory exceptions. This is logically part of the guest
Modified: branches/THUMB/priv/guest_ppc_helpers.c
===================================================================
--- branches/THUMB/priv/guest_ppc_helpers.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_ppc_helpers.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -182,13 +182,17 @@
/* Helper-function specialiser. */
IRExpr* guest_ppc32_spechelper ( HChar* function_name,
- IRExpr** args )
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts )
{
return NULL;
}
IRExpr* guest_ppc64_spechelper ( HChar* function_name,
- IRExpr** args )
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts )
{
return NULL;
}
Modified: branches/THUMB/priv/guest_x86_defs.h
===================================================================
--- branches/THUMB/priv/guest_x86_defs.h 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_x86_defs.h 2010-08-01 13:24:56 UTC (rev 1998)
@@ -61,8 +61,10 @@
/* Used by the optimiser to specialise calls to helpers. */
extern
-IRExpr* guest_x86_spechelper ( HChar* function_name,
- IRExpr** args );
+IRExpr* guest_x86_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts );
/* Describes to the optimiser which part of the guest state require
precise memory exceptions. This is logically part of the guest
Modified: branches/THUMB/priv/guest_x86_helpers.c
===================================================================
--- branches/THUMB/priv/guest_x86_helpers.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/guest_x86_helpers.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -772,8 +772,10 @@
&& e->Iex.Const.con->Ico.U32 == n );
}
-IRExpr* guest_x86_spechelper ( HChar* function_name,
- IRExpr** args )
+IRExpr* guest_x86_spechelper ( HChar* function_name,
+ IRExpr** args,
+ IRStmt** precedingStmts,
+ Int n_precedingStmts )
{
# define unop(_op,_a1) IRExpr_Unop((_op),(_a1))
# define binop(_op,_a1,_a2) IRExpr_Binop((_op),(_a1),(_a2))
Modified: branches/THUMB/priv/ir_opt.c
===================================================================
--- branches/THUMB/priv/ir_opt.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/ir_opt.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -2196,8 +2196,10 @@
/*---------------------------------------------------------------*/
static
-IRSB* spec_helpers_BB ( IRSB* bb,
- IRExpr* (*specHelper) ( HChar*, IRExpr**) )
+IRSB* spec_helpers_BB(
+ IRSB* bb,
+ IRExpr* (*specHelper) (HChar*, IRExpr**, IRStmt**, Int)
+ )
{
Int i;
IRStmt* st;
@@ -2212,7 +2214,8 @@
continue;
ex = (*specHelper)( st->Ist.WrTmp.data->Iex.CCall.cee->name,
- st->Ist.WrTmp.data->Iex.CCall.args );
+ st->Ist.WrTmp.data->Iex.CCall.args,
+ &bb->stmts[0], i );
if (!ex)
/* the front end can't think of a suitable replacement */
continue;
@@ -4358,7 +4361,7 @@
static
IRSB* cheap_transformations (
IRSB* bb,
- IRExpr* (*specHelper) (HChar*, IRExpr**),
+ IRExpr* (*specHelper) (HChar*, IRExpr**, IRStmt**, Int),
Bool (*preciseMemExnsFn)(Int,Int)
)
{
@@ -4509,10 +4512,13 @@
*/
-IRSB* do_iropt_BB ( IRSB* bb0,
- IRExpr* (*specHelper) (HChar*, IRExpr**),
- Bool (*preciseMemExnsFn)(Int,Int),
- Addr64 guest_addr )
+IRSB* do_iropt_BB(
+ IRSB* bb0,
+ IRExpr* (*specHelper) (HChar*, IRExpr**, IRStmt**, Int),
+ Bool (*preciseMemExnsFn)(Int,Int),
+ Addr64 guest_addr,
+ VexArch guest_arch
+ )
{
static Int n_total = 0;
static Int n_expensive = 0;
@@ -4543,6 +4549,15 @@
bb = cheap_transformations( bb, specHelper, preciseMemExnsFn );
+ if (guest_arch == VexArchARM) {
+ /* Translating Thumb2 code produces a lot of chaff. We have to
+ work extra hard to get rid of it. */
+ bb = cprop_BB(bb);
+ bb = spec_helpers_BB ( bb, specHelper );
+ redundant_put_removal_BB ( bb, preciseMemExnsFn );
+ do_deadcode_BB( bb );
+ }
+
if (vex_control.iropt_level > 1) {
/* Peer at what we have, to decide how much more effort to throw
Modified: branches/THUMB/priv/ir_opt.h
===================================================================
--- branches/THUMB/priv/ir_opt.h 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/ir_opt.h 2010-08-01 13:24:56 UTC (rev 1998)
@@ -43,10 +43,13 @@
/* Top level optimiser entry point. Returns a new BB. Operates
under the control of the global "vex_control" struct. */
extern
-IRSB* do_iropt_BB ( IRSB* bb,
- IRExpr* (*specHelper) (HChar*, IRExpr**),
- Bool (*preciseMemExnsFn)(Int,Int),
- Addr64 guest_addr );
+IRSB* do_iropt_BB(
+ IRSB* bb,
+ IRExpr* (*specHelper) (HChar*, IRExpr**, IRStmt**, Int),
+ Bool (*preciseMemExnsFn)(Int,Int),
+ Addr64 guest_addr,
+ VexArch guest_arch
+ );
/* Do a constant folding/propagation pass. */
extern
Modified: branches/THUMB/priv/main_main.c
===================================================================
--- branches/THUMB/priv/main_main.c 2010-07-29 18:10:51 UTC (rev 1997)
+++ branches/THUMB/priv/main_main.c 2010-08-01 13:24:56 UTC (rev 1998)
@@ -183,7 +183,7 @@
HInstrArray* (*iselSB) ( IRSB*, VexArch, VexArchInfo*,
VexAbiInfo* );
Int (*emit) ( UChar*, Int, HInstr*, Bool, void* );
- IRExpr* (*specHelper) ( HChar*, IRExpr** );
+ IRExpr* (*specHelper) ( HChar*, IRExpr**, IRStmt**, Int );
Bool (*preciseMemExnsFn) ( Int, Int );
DisOneInstrFn disInstrFn;
@@ -501,7 +501,8 @@
/* Clean it up, hopefully a lot. */
irsb = do_iropt_BB ( irsb, specHelper, preciseMemExnsFn,
- vta->guest_bytes_addr );
+ vta->guest_bytes_addr,
+ vta->arch_guest );
sanityCheckIRSB( irsb, "after initial iropt",
True/*must be flat*/, guest_word_type );
|
|
From: Bart V. A. <bva...@ac...> - 2010-08-01 07:43:02
|
Nightly build on cellbuzz-native ( cellbuzz, ppc64, Fedora 7, native ) Started at 2010-08-01 02:00:05 EDT Ended at 2010-08-01 03:42:40 EDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 462 tests, 45 stderr failures, 12 stdout failures, 0 post failures == memcheck/tests/deep_templates (stdout) memcheck/tests/leak-cases-full (stderr) memcheck/tests/leak-cases-summary (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/linux/timerfd-syscall (stdout) memcheck/tests/linux-syscalls-2007 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/varinfo1 (stderr) memcheck/tests/varinfo2 (stderr) memcheck/tests/varinfo3 (stderr) memcheck/tests/varinfo4 (stderr) memcheck/tests/varinfo5 (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) callgrind/tests/simwork-both (stdout) callgrind/tests/simwork-both (stderr) callgrind/tests/simwork-branch (stdout) callgrind/tests/simwork-branch (stderr) none/tests/empty-exe (stderr) none/tests/linux/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-vmx (stdout) none/tests/ppc32/round (stdout) none/tests/ppc32/test_gx (stdout) none/tests/ppc64/jm-fp (stdout) none/tests/ppc64/jm-vmx (stdout) none/tests/ppc64/round (stdout) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) none/tests/shell_zerolength (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) helgrind/tests/tc23_bogus_condwait (stderr) exp-ptrcheck/tests/bad_percentify (stderr) exp-ptrcheck/tests/base (stderr) exp-ptrcheck/tests/ccc (stderr) exp-ptrcheck/tests/fp (stderr) exp-ptrcheck/tests/globalerr (stderr) exp-ptrcheck/tests/hackedbz2 (stderr) exp-ptrcheck/tests/hp_bounds (stderr) exp-ptrcheck/tests/hp_dangle (stderr) exp-ptrcheck/tests/hsg (stderr) exp-ptrcheck/tests/justify (stderr) exp-ptrcheck/tests/partial_bad (stderr) exp-ptrcheck/tests/partial_good (stderr) exp-ptrcheck/tests/preen_invars (stderr) exp-ptrcheck/tests/pth_create (stderr) exp-ptrcheck/tests/pth_specific (stderr) exp-ptrcheck/tests/realloc (stderr) exp-ptrcheck/tests/stackerr (stderr) exp-ptrcheck/tests/strcpy (stderr) exp-ptrcheck/tests/supp (stderr) exp-ptrcheck/tests/tricky (stderr) exp-ptrcheck/tests/unaligned (stderr) exp-ptrcheck/tests/zero (stderr) |
|
From: Rich C. <rc...@wi...> - 2010-08-01 04:17:52
|
Nightly build on macbook ( Darwin 9.8.0 i386 ) Started at 2010-07-31 23:05:00 CDT Ended at 2010-07-31 23:17:29 CDT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... failed Last 20 lines of verbose log follow echo Making check in . make addressable atomic_incs badaddrvalue badfree badjump badjump2 badloop badpoll badrw brk2 buflen_check calloc-overflow clientperm custom_alloc custom-overlap deep_templates describe-block doublefree error_counts errs1 exitprog execve execve2 erringfds file_locking fprw fwrite inits inline leak-0 leak-cases leak-cycle leak-pool leak-tree linux-syslog-syscall linux-syscalls-2007 long_namespace_xml long-supps mallinfo malloc_free_fill malloc_usable malloc1 malloc2 malloc3 manuel1 manuel2 manuel3 match-overrun memalign_test memalign2 memcmptest mempool mmaptest mismatches new_override metadata nanoleak_supp nanoleak2 new_nothrow noisy_child null_socket origin1-yes origin2-not-quite origin3-no origin4-many origin5-bz2 origin6-fp overlap partiallydefinedeq partial_load pdb-realloc pdb-realloc2 pipe pointer-trace post-syscall realloc1 realloc2 realloc3 sh-mem sh-mem-random sigaltstack signal2 sigprocmask sigkill strchr str_tester supp_unknown supp1 supp2 suppfree trivialleak un it_libcbase unit_oset varinfo1 varinfo2 varinfo3 varinfo4 varinfo5 varinfo5so.so varinfo6 vcpu_fbench vcpu_fnfns xml1 wrap1 wrap2 wrap3 wrap4 wrap5 wrap6 wrap7 wrap7so.so wrap8 writev gcc -DHAVE_CONFIG_H -I. -I../.. -I../.. -I../../include -I../../coregrind -I../../include -I../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -arch x86_64 -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT addressable.o -MD -MP -MF .deps/addressable.Tpo -c -o addressable.o addressable.c mv -f .deps/addressable.Tpo .deps/addressable.Po gcc -Winline -Wall -Wshadow -g -arch x86_64 -Wno-long-long -Wno-pointer-sign -fno-stack-protector -o addressable addressable.o gcc -DHAVE_CONFIG_H -I. -I../.. -I../.. -I../../include -I../../coregrind -I../../include -I../../VEX/pub -DVGA_amd64=1 -DVGO_darwin=1 -DVGP_amd64_darwin=1 -Winline -Wall -Wshadow -g -arch x86_64 -mdynamic-no-pic -Wno-long-long -Wno-pointer-sign -fno-stack-protector -MT atomic_incs-atomic_incs.o -MD -MP -MF .deps/atomic_incs-atomic_incs.Tpo -c -o atomic_incs-atomic_incs.o `test -f 'atomic_incs.c' || echo './'`atomic_incs.c atomic_incs.c: In function 'atomic_add_8bit': atomic_incs.c:37: error: PIC register 'rbx' clobbered in 'asm' atomic_incs.c: In function 'atomic_add_16bit': atomic_incs.c:101: error: PIC register 'rbx' clobbered in 'asm' atomic_incs.c: In function 'atomic_add_32bit': atomic_incs.c:164: error: PIC register 'rbx' clobbered in 'asm' atomic_incs.c: In function 'atomic_add_64bit': atomic_incs.c:219: error: PIC register 'rbx' clobbered in 'asm' make[5]: *** [atomic_incs-atomic_incs.o] Error 1 make[4]: *** [check-am] Error 2 make[3]: *** [check-recursive] Error 1 make[2]: *** [check-recursive] Error 1 make[1]: *** [check-recursive] Error 1 make: *** [check] Error 2 Congratulations, all tests passed! |
|
From: Tom H. <th...@cy...> - 2010-08-01 02:50:57
|
Nightly build on lloyd ( x86_64, Fedora 7 ) Started at 2010-08-01 03:05:08 BST Ended at 2010-08-01 03:50:42 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 546 tests, 2 stderr failures, 3 stdout failures, 0 post failures == none/tests/amd64/bug132918 (stdout) none/tests/amd64/fxtract (stdout) none/tests/x86/fxtract (stdout) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 546 tests, 3 stderr failures, 3 stdout failures, 0 post failures == memcheck/tests/x86-linux/scalar (stderr) none/tests/amd64/bug132918 (stdout) none/tests/amd64/fxtract (stdout) none/tests/x86/fxtract (stdout) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Sun Aug 1 03:27:33 2010 --- new.short Sun Aug 1 03:50:42 2010 *************** *** 8,11 **** ! == 546 tests, 3 stderr failures, 3 stdout failures, 0 post failures == ! memcheck/tests/x86-linux/scalar (stderr) none/tests/amd64/bug132918 (stdout) --- 8,10 ---- ! == 546 tests, 2 stderr failures, 3 stdout failures, 0 post failures == none/tests/amd64/bug132918 (stdout) |
|
From: Tom H. <th...@cy...> - 2010-08-01 02:37:46
|
Nightly build on mg ( x86_64, Fedora 9 ) Started at 2010-08-01 03:10:04 BST Ended at 2010-08-01 03:37:33 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 553 tests, 2 stderr failures, 3 stdout failures, 0 post failures == none/tests/amd64/bug132918 (stdout) none/tests/amd64/fxtract (stdout) none/tests/x86/fxtract (stdout) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 553 tests, 4 stderr failures, 3 stdout failures, 0 post failures == memcheck/tests/x86-linux/scalar (stderr) none/tests/amd64/bug132918 (stdout) none/tests/amd64/fxtract (stdout) none/tests/x86/fxtract (stdout) helgrind/tests/pth_spinlock (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc09_bad_unlock (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Sun Aug 1 03:23:50 2010 --- new.short Sun Aug 1 03:37:33 2010 *************** *** 8,11 **** ! == 553 tests, 4 stderr failures, 3 stdout failures, 0 post failures == ! memcheck/tests/x86-linux/scalar (stderr) none/tests/amd64/bug132918 (stdout) --- 8,10 ---- ! == 553 tests, 2 stderr failures, 3 stdout failures, 0 post failures == none/tests/amd64/bug132918 (stdout) *************** *** 13,15 **** none/tests/x86/fxtract (stdout) - helgrind/tests/pth_spinlock (stderr) helgrind/tests/tc06_two_races_xml (stderr) --- 12,13 ---- |