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From: <sv...@va...> - 2010-01-09 11:44:29
|
Author: sewardj
Date: 2010-01-09 11:44:21 +0000 (Sat, 09 Jan 2010)
New Revision: 11024
Log:
Add tests for PLD (cache-prefetch-hint) instructions.
Modified:
trunk/none/tests/arm/v6int.c
trunk/none/tests/arm/v6int.stdout.exp
Modified: trunk/none/tests/arm/v6int.c
===================================================================
--- trunk/none/tests/arm/v6int.c 2010-01-08 10:53:04 UTC (rev 11023)
+++ trunk/none/tests/arm/v6int.c 2010-01-09 11:44:21 UTC (rev 11024)
@@ -781,5 +781,32 @@
TESTINST3("uxtah r0, r1, r2, ROR #0", 0x31415927, 0x27182899,
r0, r1, r2, 0);
+ printf("------------ PLD/PLDW (begin) ------------\n");
+ /* These don't have any effect on the architected state, so,
+ uh, there's no result values to check. Just _do_ some of
+ them and check Valgrind's instruction decoder eats them up
+ without complaining. */
+ { int alocal;
+ printf("pld reg +/- imm12 cases\n");
+ __asm__ __volatile__( "pld [%0, #128]" : :/*in*/"r"(&alocal) );
+ __asm__ __volatile__( "pld [%0, #-128]" : :/*in*/"r"(&alocal) );
+ __asm__ __volatile__( "pld [r15, #-128]" : :/*in*/"r"(&alocal) );
+
+ // apparently pldw is v7 only
+ //__asm__ __volatile__( "pldw [%0, #128]" : :/*in*/"r"(&alocal) );
+ //__asm__ __volatile__( "pldw [%0, #-128]" : :/*in*/"r"(&alocal) );
+ //__asm__ __volatile__( "pldw [r15, #128]" : :/*in*/"r"(&alocal) );
+
+ printf("pld reg +/- shifted reg cases\n");
+ __asm__ __volatile__( "pld [%0, %1]" : : /*in*/"r"(&alocal), "r"(0) );
+ __asm__ __volatile__( "pld [%0, %1, LSL #1]" : : /*in*/"r"(&alocal), "r"(0) );
+ __asm__ __volatile__( "pld [%0, %1, LSR #1]" : : /*in*/"r"(&alocal), "r"(0) );
+ __asm__ __volatile__( "pld [%0, %1, ASR #1]" : : /*in*/"r"(&alocal), "r"(0) );
+ __asm__ __volatile__( "pld [%0, %1, ROR #1]" : : /*in*/"r"(&alocal), "r"(0) );
+ __asm__ __volatile__( "pld [%0, %1, RRX]" : : /*in*/"r"(&alocal), "r"(0) );
+ }
+ printf("------------ PLD/PLDW (done) ------------\n");
+
+
return 0;
}
Modified: trunk/none/tests/arm/v6int.stdout.exp
===================================================================
--- trunk/none/tests/arm/v6int.stdout.exp 2010-01-08 10:53:04 UTC (rev 11023)
+++ trunk/none/tests/arm/v6int.stdout.exp 2010-01-09 11:44:21 UTC (rev 11024)
@@ -715,3 +715,7 @@
uxtah r0, r1, r2, ROR #16 :: rd 0x3141803f rm 0x31415927, rn 0x27182899, carryin 0, cpsr 0x00000000
uxtah r0, r1, r2, ROR #8 :: rd 0x3141714f rm 0x31415927, rn 0x27182899, carryin 0, cpsr 0x00000000
uxtah r0, r1, r2, ROR #0 :: rd 0x314181c0 rm 0x31415927, rn 0x27182899, carryin 0, cpsr 0x00000000
+------------ PLD/PLDW (begin) ------------
+pld reg +/- imm12 cases
+pld reg +/- shifted reg cases
+------------ PLD/PLDW (done) ------------
|
|
From: <sv...@va...> - 2010-01-09 11:43:31
|
Author: sewardj
Date: 2010-01-09 11:43:21 +0000 (Sat, 09 Jan 2010)
New Revision: 1954
Log:
* support PLD (cache-preload-hint) instructions
* start of a framework for decoding instructions in NV space
* fix a couple of unused/untested RRX shifter operand cases
Modified:
trunk/priv/guest_arm_toIR.c
Modified: trunk/priv/guest_arm_toIR.c
===================================================================
--- trunk/priv/guest_arm_toIR.c 2010-01-03 01:20:59 UTC (rev 1953)
+++ trunk/priv/guest_arm_toIR.c 2010-01-09 11:43:21 UTC (rev 1954)
@@ -151,7 +151,7 @@
/* Do a little-endian load of a 32-bit word, regardless of the
endianness of the underlying host. */
-static UInt getUIntLittleEndianly ( UChar* p )
+static inline UInt getUIntLittleEndianly ( UChar* p )
{
UInt w = 0;
w = (w << 8) | p[3];
@@ -182,7 +182,12 @@
((BITS4((_b7),(_b6),(_b5),(_b4)) << 4) \
| BITS4((_b3),(_b2),(_b1),(_b0)))
+/* produces _uint[_bMax:_bMin] */
+#define SLICE_UInt(_uint,_bMax,_bMin) \
+ (( ((UInt)(_uint)) >> (_bMin)) \
+ & ((1 << ((_bMax) - (_bMin) + 1)) - 1))
+
/*------------------------------------------------------------*/
/*--- Helper bits and pieces for creating IR fragments. ---*/
/*------------------------------------------------------------*/
@@ -1012,7 +1017,7 @@
// shco = Rm[0]
if (shco) {
assign( *shco,
- binop(Iop_And32, mkexpr(rMt), mkU32(1)));
+ binop(Iop_And32, mkexpr(rMt), mkU32(1)));
}
assign( oldcT, mk_armg_calculate_flag_c() );
assign( *shop,
@@ -1337,6 +1342,8 @@
}
+/* NB: This is "DecodeImmShift" in newer versions of the the ARM ARM.
+*/
static
IRExpr* mk_EA_reg_plusminus_shifted_reg ( UInt rN, UInt bU, UInt rM,
UInt sh2, UInt imm5,
@@ -1382,12 +1389,10 @@
IRTemp rmT = newTemp(Ity_I32);
IRTemp cflagT = newTemp(Ity_I32);
assign(rmT, getIReg(rM));
- assign(cflagT, mk_armg_calculate_flag_v());
- vassert(imm5 >= 1 && imm5 <= 31);
+ assign(cflagT, mk_armg_calculate_flag_c());
index = binop(Iop_Or32,
binop(Iop_Shl32, mkexpr(cflagT), mkU8(31)),
binop(Iop_Shr32, mkexpr(rmT), mkU8(1)));
- vassert(0); // ATC
DIS(buf, "[r%u, %cr%u, RRX]", rN, opChar, rM);
} else {
IRTemp rmT = newTemp(Ity_I32);
@@ -1396,7 +1401,6 @@
index = binop(Iop_Or32,
binop(Iop_Shl32, mkexpr(rmT), mkU8(32-imm5)),
binop(Iop_Shr32, mkexpr(rmT), mkU8(imm5)));
- vassert(0); // ATC
DIS(buf, "[r%u, %cr%u, ROR #%u]", rN, opChar, rM, imm5);
}
break;
@@ -1516,6 +1520,60 @@
/*------------------------------------------------------------*/
+/*--- Instructions in NV (never) space ---*/
+/*------------------------------------------------------------*/
+
+static Bool decode_NV_instruction ( UInt insn )
+{
+# define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin))
+# define INSN_COND SLICE_UInt(insn, 31, 28)
+
+ HChar dis_buf[128];
+
+ // Should only be called for NV instructions
+ vassert(BITS4(1,1,1,1) == INSN_COND);
+
+ /* ------------------------ pld ------------------------ */
+ if (BITS8(0,1,0,1, 0, 1,0,1) == (INSN(27,20) & BITS8(1,1,1,1,0,1,1,1))
+ && BITS4(1,1,1,1) == INSN(15,12)) {
+ UInt rN = INSN(19,16);
+ UInt imm12 = INSN(11,0);
+ UInt bU = INSN(23,23);
+ DIP("pld [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12);
+ return True;
+ }
+
+ if (BITS8(0,1,1,1, 0, 1,0,1) == (INSN(27,20) & BITS8(1,1,1,1,0,1,1,1))
+ && BITS4(1,1,1,1) == INSN(15,12)
+ && 0 == INSN(4,4)) {
+ UInt rN = INSN(19,16);
+ UInt rM = INSN(3,0);
+ UInt imm5 = INSN(11,7);
+ UInt sh2 = INSN(6,5);
+ UInt bU = INSN(23,23);
+ if (rM != 15) {
+ IRExpr* eaE = mk_EA_reg_plusminus_shifted_reg(rN, bU, rM,
+ sh2, imm5, dis_buf);
+ IRTemp eaT = newTemp(Ity_I32);
+ /* Bind eaE to a temp merely for debugging-vex purposes, so we
+ can check it's a plausible decoding. It will get removed
+ by iropt a little later on. */
+ vassert(eaE);
+ assign(eaT, eaE);
+ DIP("pld %s\n", dis_buf);
+ return True;
+ }
+ /* fall through */
+ }
+
+ return False;
+
+# undef INSN_COND
+# undef INSN
+}
+
+
+/*------------------------------------------------------------*/
/*--- Disassemble a single instruction ---*/
/*------------------------------------------------------------*/
@@ -1535,10 +1593,8 @@
)
{
// A macro to fish bits out of 'insn'.
-# define INSN(_bMax,_bMin) \
- ((insn >> (_bMin)) & ((1 << ((_bMax) - (_bMin) + 1)) - 1))
-# define INSN_COND \
- INSN(31,28)
+# define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin))
+# define INSN_COND SLICE_UInt(insn, 31, 28)
DisResult dres;
UInt insn;
@@ -1649,8 +1705,15 @@
condT :: Ity_I32 and is always either zero or one. */
condT = IRTemp_INVALID;
switch ( (ARMCondcode)INSN_COND ) {
- case ARMCondNV: // Illegal instruction prior to v5 (see ARM ARM A3-5)
- goto decode_failure;
+ case ARMCondNV: {
+ // Illegal instruction prior to v5 (see ARM ARM A3-5), but
+ // some cases are acceptable
+ Bool ok = decode_NV_instruction(insn);
+ if (ok)
+ goto decode_success;
+ else
+ goto decode_failure;
+ }
case ARMCondAL: // Always executed
break;
case ARMCondEQ: case ARMCondNE: case ARMCondHS: case ARMCondLO:
@@ -4675,8 +4738,8 @@
return dres;
+# undef INSN_COND
# undef INSN
-# undef INSN_COND
}
#undef DIP
|
|
From: Alexander P. <gl...@go...> - 2010-01-09 10:18:17
|
Nightly build on mcgrind ( Darwin 9.7.0 i386 ) Started at 2010-01-09 09:06:03 MSK Ended at 2010-01-09 09:25:24 MSK Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 433 tests, 22 stderr failures, 1 stdout failure, 0 post failures == memcheck/tests/null_socket (stdout) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/varinfo1 (stderr) memcheck/tests/varinfo2 (stderr) memcheck/tests/varinfo3 (stderr) memcheck/tests/varinfo4 (stderr) memcheck/tests/varinfo5 (stderr) memcheck/tests/varinfo6 (stderr) none/tests/async-sigs (stderr) none/tests/faultstatus (stderr) none/tests/pth_blockedsig (stderr) helgrind/tests/hg03_inherit (stderr) helgrind/tests/hg04_race (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/rwlock_race (stderr) helgrind/tests/tc01_simple_race (stderr) helgrind/tests/tc05_simple_race (stderr) helgrind/tests/tc06_two_races (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc16_byterace (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc23_bogus_condwait (stderr) -- Alexander Potapenko Software Engineer Google Moscow |
|
From: Bart V. A. <bar...@gm...> - 2010-01-09 08:58:58
|
Nightly build on cellbuzz-native ( cellbuzz, ppc64, Fedora 7, native ) Started at 2010-01-09 02:28:14 EST Ended at 2010-01-09 03:58:43 EST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... done Regression test results follow == 449 tests, 43 stderr failures, 10 stdout failures, 0 post failures == memcheck/tests/deep_templates (stdout) memcheck/tests/leak-cases-full (stderr) memcheck/tests/leak-cases-summary (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/linux/timerfd-syscall (stdout) memcheck/tests/linux-syscalls-2007 (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/varinfo1 (stderr) memcheck/tests/varinfo2 (stderr) memcheck/tests/varinfo3 (stderr) memcheck/tests/varinfo4 (stderr) memcheck/tests/varinfo5 (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/wrap8 (stdout) memcheck/tests/wrap8 (stderr) none/tests/empty-exe (stderr) none/tests/linux/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-vmx (stdout) none/tests/ppc32/round (stdout) none/tests/ppc32/test_gx (stdout) none/tests/ppc64/jm-fp (stdout) none/tests/ppc64/jm-vmx (stdout) none/tests/ppc64/round (stdout) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) none/tests/shell_zerolength (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/tc06_two_races_xml (stderr) helgrind/tests/tc22_exit_w_lock (stderr) helgrind/tests/tc23_bogus_condwait (stderr) exp-ptrcheck/tests/bad_percentify (stderr) exp-ptrcheck/tests/base (stderr) exp-ptrcheck/tests/ccc (stderr) exp-ptrcheck/tests/fp (stderr) exp-ptrcheck/tests/globalerr (stderr) exp-ptrcheck/tests/hackedbz2 (stderr) exp-ptrcheck/tests/hp_bounds (stderr) exp-ptrcheck/tests/hp_dangle (stderr) exp-ptrcheck/tests/hsg (stderr) exp-ptrcheck/tests/justify (stderr) exp-ptrcheck/tests/partial_bad (stderr) exp-ptrcheck/tests/partial_good (stderr) exp-ptrcheck/tests/preen_invars (stderr) exp-ptrcheck/tests/pth_create (stderr) exp-ptrcheck/tests/pth_specific (stderr) exp-ptrcheck/tests/realloc (stderr) exp-ptrcheck/tests/stackerr (stderr) exp-ptrcheck/tests/strcpy (stderr) exp-ptrcheck/tests/supp (stderr) exp-ptrcheck/tests/tricky (stderr) exp-ptrcheck/tests/unaligned (stderr) exp-ptrcheck/tests/zero (stderr) |
|
From: Tom H. <th...@cy...> - 2010-01-09 03:49:43
|
Nightly build on lloyd ( x86_64, Fedora 7 ) Started at 2010-01-09 03:05:04 GMT Ended at 2010-01-09 03:49:22 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 531 tests, 1 stderr failure, 0 stdout failures, 0 post failures == helgrind/tests/tc06_two_races_xml (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 531 tests, 2 stderr failures, 0 stdout failures, 0 post failures == memcheck/tests/x86-linux/scalar (stderr) helgrind/tests/tc06_two_races_xml (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Sat Jan 9 03:27:17 2010 --- new.short Sat Jan 9 03:49:22 2010 *************** *** 8,11 **** ! == 531 tests, 2 stderr failures, 0 stdout failures, 0 post failures == ! memcheck/tests/x86-linux/scalar (stderr) helgrind/tests/tc06_two_races_xml (stderr) --- 8,10 ---- ! == 531 tests, 1 stderr failure, 0 stdout failures, 0 post failures == helgrind/tests/tc06_two_races_xml (stderr) |
|
From: Tom H. <th...@cy...> - 2010-01-09 03:35:57
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Nightly build on mg ( x86_64, Fedora 9 ) Started at 2010-01-09 03:10:04 GMT Ended at 2010-01-09 03:35:38 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 538 tests, 1 stderr failure, 0 stdout failures, 0 post failures == helgrind/tests/tc06_two_races_xml (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 538 tests, 2 stderr failures, 0 stdout failures, 0 post failures == memcheck/tests/x86-linux/scalar (stderr) helgrind/tests/tc06_two_races_xml (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Sat Jan 9 03:23:01 2010 --- new.short Sat Jan 9 03:35:38 2010 *************** *** 8,11 **** ! == 538 tests, 2 stderr failures, 0 stdout failures, 0 post failures == ! memcheck/tests/x86-linux/scalar (stderr) helgrind/tests/tc06_two_races_xml (stderr) --- 8,10 ---- ! == 538 tests, 1 stderr failure, 0 stdout failures, 0 post failures == helgrind/tests/tc06_two_races_xml (stderr) |