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From: Steve V.
|
Hello, I'm interested in valgrinding UML, so I dusted off John Reiser's old patches. The attached patches are enough to get UML to boot and run under valgrind but don't include all of John's changes. With these patches UML requires a one line change to run; the addition of the VKI_CLONE_CHILD_LETGO flag to a clone call. What needs to be done to these patches before they can be merged? UML and probably valgrind will need a few more patches to make the valgrind output useful, but I'm still working on that part. -- Steve |
|
From: <sv...@va...> - 2008-07-29 19:02:42
|
Author: sewardj
Date: 2008-07-29 20:02:49 +0100 (Tue, 29 Jul 2008)
New Revision: 8479
Log:
Much tidying up for x86-linux. Also, make lossage-checking command
line controllable.
Modified:
branches/PTRCHECK/exp-ptrcheck/pc_main.c
Modified: branches/PTRCHECK/exp-ptrcheck/pc_main.c
===================================================================
--- branches/PTRCHECK/exp-ptrcheck/pc_main.c 2008-07-29 19:01:52 UTC (rev 8478)
+++ branches/PTRCHECK/exp-ptrcheck/pc_main.c 2008-07-29 19:02:49 UTC (rev 8479)
@@ -42,8 +42,6 @@
// FIXME: tidy up findShadowTmp
-// FIXME: looks_like_a_pointer
-
// FIXME: post_reg_write_demux(Vg_CoreSysCall) is redundant w.r.t.
// the default 'NONPTR' behaviour of post_syscall. post_reg_write_demux
// is called first, then post_syscall.
@@ -210,6 +208,7 @@
#include "pub_tool_hashtable.h"
#include "pub_tool_tooliface.h"
#include "pub_tool_replacemalloc.h"
+#include "pub_tool_options.h"
#include "pub_tool_execontext.h"
#include "pub_tool_aspacemgr.h" // VG_(am_shadow_malloc)
#include "pub_tool_vki.h" // VKI_MAX_PAGE_SIZE
@@ -221,71 +220,51 @@
#include "pc_list.h"
-//#include "vg_profile.c"
-#define PC_MALLOC_REDZONE_SZB 0 /* no need for client heap redzones */
+/*------------------------------------------------------------*/
+/*--- Debug/trace options ---*/
+/*------------------------------------------------------------*/
+/* Set to 1 to do sanity checks on Seg values in many places, which
+ checks if bogus Segs are in circulation. Quite expensive from a
+ performance point of view. */
+#define SC_SEGS 0
-static __inline__ VG_REGPARM(1) Seg nonptr_or_unknown(UWord x); /*fwds*/
-
-//zz /*------------------------------------------------------------*/
-//zz /*--- Profiling events ---*/
-//zz /*------------------------------------------------------------*/
-//zz
-//zz typedef
-//zz enum {
-//zz VgpGetMemAseg = VgpFini+1,
-//zz VgpCheckLoadStore,
-//zz VgpCheckLoad4,
-//zz VgpCheckLoad21,
-//zz VgpCheckStore4,
-//zz VgpCheckStore21,
-//zz VgpCheckFpuR,
-//zz VgpCheckFpuW,
-//zz VgpDoAdd,
-//zz VgpDoSub,
-//zz VgpDoAdcSbb,
-//zz VgpDoXor,
-//zz VgpDoAnd,
-//zz VgpDoOr,
-//zz VgpDoLea1,
-//zz VgpDoLea2,
-//zz }
-//zz VgpSkinCC;
-
/*------------------------------------------------------------*/
/*--- Command line options ---*/
/*------------------------------------------------------------*/
-Bool clo_partial_loads_ok = True;
+static Bool clo_partial_loads_ok = True; /* user visible */
+static Bool clo_lossage_check = False; /* dev flag only */
-//zz Bool SK_(process_cmd_line_option)(Char* arg)
-//zz {
-//zz if (VG_CLO_STREQ(arg, "--partial-loads-ok=yes"))
-//zz clo_partial_loads_ok = True;
-//zz else if (VG_CLO_STREQ(arg, "--partial-loads-ok=no"))
-//zz clo_partial_loads_ok = False;
-//zz
-//zz else
-//zz return VG_(replacement_malloc_process_cmd_line_option)(arg);
-//zz
-//zz return True;
-//zz }
-//zz
-//zz void SK_(print_usage)(void)
-//zz {
-//zz VG_(printf)(
-//zz " --partial-loads-ok=no|yes same as for Memcheck [yes]\n"
-//zz );
-//zz VG_(replacement_malloc_print_usage)();
-//zz }
-//zz
-//zz void SK_(print_debug_usage)(void)
-//zz {
-//zz VG_(replacement_malloc_print_debug_usage)();
-//zz }
+static Bool pc_process_cmd_line_options(Char* arg)
+{
+ VG_BOOL_CLO(arg, "--partial-loads-ok", clo_partial_loads_ok)
+ else VG_BOOL_CLO(arg, "--lossage-check", clo_lossage_check)
+ else
+ return VG_(replacement_malloc_process_cmd_line_option)(arg);
+ return True;
+}
+
+static void pc_print_usage(void)
+{
+ VG_(printf)(
+ " --partial-loads-ok=no|yes same as for Memcheck [yes]\n"
+ );
+ VG_(replacement_malloc_print_usage)();
+}
+
+static void pc_print_debug_usage(void)
+{
+ VG_(printf)(
+ " --lossage-check=no|yes gather stats for quality control [no]\n"
+ );
+ VG_(replacement_malloc_print_debug_usage)();
+}
+
+
/*------------------------------------------------------------*/
/*--- Segments ---*/
/*------------------------------------------------------------*/
@@ -318,6 +297,8 @@
static void copy_mem( Addr from, Addr to, SizeT len );
static void set_mem_unknown ( Addr a, SizeT len );
+static __inline__ VG_REGPARM(1) Seg nonptr_or_unknown(UWord x); /*fwds*/
+
static __inline__
void* alloc_and_new_mem_heap ( ThreadId tid,
SizeT size, SizeT alignment, Bool is_zeroed )
@@ -729,15 +710,15 @@
/*a*/0, /*str*/NULL, /*extra*/(void*)&extra);
}
-static void record_sysparam_error( ThreadId tid, CorePart part, Char* s,
- Addr lo, Addr hi, Seg seglo, Seg seghi )
-{
- SysParamExtra extra = {
- .part = part, .lo = lo, .hi = hi, .seglo = seglo, .seghi = seghi
- };
- VG_(maybe_record_error)( tid, SysParamErr, /*a*/(Addr)0, /*str*/s,
- /*extra*/(void*)&extra);
-}
+//zz static void record_sysparam_error( ThreadId tid, CorePart part, Char* s,
+//zz Addr lo, Addr hi, Seg seglo, Seg seghi )
+//zz {
+//zz SysParamExtra extra = {
+//zz .part = part, .lo = lo, .hi = hi, .seglo = seglo, .seghi = seghi
+//zz };
+//zz VG_(maybe_record_error)( tid, SysParamErr, /*a*/(Addr)0, /*str*/s,
+//zz /*extra*/(void*)&extra);
+//zz }
static Bool eq_Error ( VgRes res, Error* e1, Error* e2 )
{
@@ -1412,11 +1393,6 @@
/* See description on definition of type IntRegInfo. */
static void get_IntRegInfo ( /*OUT*/IntRegInfo* iii, Int offset, Int szB )
{
- Int o = offset;
- Int sz = szB;
- /* Set default state 'does not intersect any int register. */
- VG_(memset)( iii, 0, sizeof(*iii) );
-
/* --------------------- x86 --------------------- */
# if defined(VGA_x86)
@@ -1424,11 +1400,18 @@
# define GOF(_fieldname) \
(offsetof(VexGuestX86State,guest_##_fieldname))
- Bool isXmmF = sz == 16 || sz == 8 || sz == 4;
- Bool is4 = sz == 4;
- Bool is21 = sz == 2 || sz == 1;
+ Int o = offset;
+ Int sz = szB;
+ Bool is4 = sz == 4;
+ Bool is21 = sz == 2 || sz == 1;
+
tl_assert(sz > 0);
tl_assert(host_is_little_endian());
+
+ /* Set default state to "does not intersect any int register". */
+ VG_(memset)( iii, 0, sizeof(*iii) );
+
+ /* Exact accesses to integer registers */
if (o == GOF(EAX) && is4) goto exactly1;
if (o == GOF(ECX) && is4) goto exactly1;
if (o == GOF(EDX) && is4) goto exactly1;
@@ -1443,29 +1426,51 @@
if (o == GOF(CC_DEP2) && is4) goto none;
if (o == GOF(CC_NDEP) && is4) goto none;
if (o == GOF(DFLAG) && is4) goto none;
+ if (o == GOF(IDFLAG) && is4) goto none;
+ if (o == GOF(ACFLAG) && is4) goto none;
+ /* Partial accesses to integer registers */
if (o == GOF(EAX) && is21) { o -= 0; goto contains_o; }
if (o == GOF(EAX)+1 && is21) { o -= 1; o -= 0; goto contains_o; }
if (o == GOF(ECX) && is21) { o -= 0; goto contains_o; }
if (o == GOF(ECX)+1 && is21) { o -= 1; o -= 0; goto contains_o; }
if (o == GOF(EBX) && is21) { o -= 0; goto contains_o; }
+ // bl case
if (o == GOF(EDX) && is21) { o -= 0; goto contains_o; }
if (o == GOF(EDX)+1 && is21) { o -= 1; o -= 0; goto contains_o; }
if (o == GOF(ESI) && is21) { o -= 0; goto contains_o; }
if (o == GOF(EDI) && is21) { o -= 0; goto contains_o; }
- if (o == GOF(GS) && sz == 2) goto none;
+ /* Segment related guff */
+ if (o == GOF(GS) && sz == 2) goto none;
if (o == GOF(LDT) && is4) goto none;
if (o == GOF(GDT) && is4) goto none;
- if (o == GOF(IDFLAG) && is4) goto none;
- if (o == GOF(ACFLAG) && is4) goto none;
- if (o == GOF(EMWARN) && is4) goto none;
+ /* FP admin related */
+ if (o == GOF(SSEROUND) && is4) goto none;
+ if (o == GOF(FPROUND) && is4) goto none;
+ if (o == GOF(EMWARN) && is4) goto none;
+ if (o == GOF(FTOP) && is4) goto none;
+ if (o == GOF(FPTAG) && sz == 8) goto none;
+ if (o == GOF(FC3210) && is4) goto none;
- if (o == GOF(XMM0) && isXmmF) goto none;
+ /* xmm registers, including arbitrary sub-parts */
+ if (o >= GOF(XMM0) && o+sz <= GOF(XMM0)+16) goto none;
+ if (o >= GOF(XMM1) && o+sz <= GOF(XMM1)+16) goto none;
+ if (o >= GOF(XMM2) && o+sz <= GOF(XMM2)+16) goto none;
+ if (o >= GOF(XMM3) && o+sz <= GOF(XMM3)+16) goto none;
+ if (o >= GOF(XMM4) && o+sz <= GOF(XMM4)+16) goto none;
+ if (o >= GOF(XMM5) && o+sz <= GOF(XMM5)+16) goto none;
+ if (o >= GOF(XMM6) && o+sz <= GOF(XMM6)+16) goto none;
+ if (o >= GOF(XMM7) && o+sz <= GOF(XMM7)+16) goto none;
- if (o == GOF(FTOP) && is4) goto none;
+ /* mmx/x87 registers (a bit of a kludge, since 'o' is not checked
+ to be exactly equal to one of FPREG[0] .. FPREG[7]) */
+ if (o >= GOF(FPREG[0]) && o < GOF(FPREG[7])+8 && sz == 8) goto none;
+ /* the entire mmx/x87 register bank in one big piece */
+ if (o == GOF(FPREG) && sz == 64) goto none;
+
VG_(printf)("get_IntRegInfo(x86):failing on (%d,%d)\n", o, sz);
tl_assert(0);
# undef GOF
@@ -1477,13 +1482,18 @@
# define GOF(_fieldname) \
(offsetof(VexGuestAMD64State,guest_##_fieldname))
- Bool isXmmF = sz == 16 || sz == 8 || sz == 4;
- Bool is421 = sz == 4 || sz == 2 || sz == 1;
- Bool is8 = sz == 8;
- Bool is84 = sz == 8 || sz == 4;
+ Int o = offset;
+ Int sz = szB;
+ Bool is421 = sz == 4 || sz == 2 || sz == 1;
+ Bool is8 = sz == 8;
+
tl_assert(sz > 0);
tl_assert(host_is_little_endian());
+ /* Set default state to "does not intersect any int register". */
+ VG_(memset)( iii, 0, sizeof(*iii) );
+
+ /* Exact accesses to integer registers */
if (o == GOF(RAX) && is8) goto exactly1;
if (o == GOF(RCX) && is8) goto exactly1;
if (o == GOF(RDX) && is8) goto exactly1;
@@ -1508,6 +1518,7 @@
if (o == GOF(DFLAG) && is8) goto none;
if (o == GOF(IDFLAG) && is8) goto none;
+ /* Partial accesses to integer registers */
if (o == GOF(RAX) && is421) { o -= 0; goto contains_o; }
if (o == GOF(RAX)+1 && is421) { o -= 1; o -= 0; goto contains_o; }
if (o == GOF(RCX) && is421) { o -= 0; goto contains_o; }
@@ -1528,32 +1539,18 @@
if (o == GOF(R14) && is421) { o -= 0; goto contains_o; }
if (o == GOF(R15) && is421) { o -= 0; goto contains_o; }
+ /* Segment related guff */
if (o == GOF(FS_ZERO) && is8) goto exactly1;
+ /* FP admin related */
if (o == GOF(SSEROUND) && is8) goto none;
- if (o == GOF(XMM0) && isXmmF) goto none;
- if (o == GOF(XMM1) && isXmmF) goto none;
- if (o == GOF(XMM2) && isXmmF) goto none;
- if (o == GOF(XMM3) && isXmmF) goto none;
- if (o == GOF(XMM4) && isXmmF) goto none;
- if (o == GOF(XMM5) && isXmmF) goto none;
- if (o == GOF(XMM6) && isXmmF) goto none;
- if (o == GOF(XMM7) && isXmmF) goto none;
- if (o == GOF(XMM8) && isXmmF) goto none;
- if (o == GOF(XMM9) && isXmmF) goto none;
- if (o == GOF(XMM10) && isXmmF) goto none;
- if (o == GOF(XMM11) && isXmmF) goto none;
- if (o == GOF(XMM12) && isXmmF) goto none;
- if (o == GOF(XMM13) && isXmmF) goto none;
- if (o == GOF(XMM14) && isXmmF) goto none;
- if (o == GOF(XMM15) && isXmmF) goto none;
+ if (o == GOF(FPROUND) && is8) goto none;
+ if (o == GOF(EMWARN) && sz == 4) goto none;
+ if (o == GOF(FTOP) && sz == 4) goto none;
+ if (o == GOF(FPTAG) && is8) goto none;
+ if (o == GOF(FC3210) && is8) goto none;
- if (o == GOF(FPROUND) && is8) goto none;
- if (o == GOF(EMWARN) && sz == 4) goto none;
- if (o == GOF(FTOP) && sz == 4) goto none;
- if (o == GOF(FPTAG) && sz == 8) goto none;
- if (o == GOF(FC3210) && sz == 8) goto none;
-
+ /* xmm registers, including arbitrary sub-parts */
if (o >= GOF(XMM0) && o+sz <= GOF(XMM0)+16) goto none;
if (o >= GOF(XMM1) && o+sz <= GOF(XMM1)+16) goto none;
if (o >= GOF(XMM2) && o+sz <= GOF(XMM2)+16) goto none;
@@ -1571,6 +1568,8 @@
if (o >= GOF(XMM14) && o+sz <= GOF(XMM14)+16) goto none;
if (o >= GOF(XMM15) && o+sz <= GOF(XMM15)+16) goto none;
+ /* mmx/x87 registers (a bit of a kludge, since 'o' is not checked
+ to be exactly equal to one of FPREG[0] .. FPREG[7]) */
if (o >= GOF(FPREG[0]) && o < GOF(FPREG[7])+8 && sz == 8) goto none;
VG_(printf)("get_IntRegInfo(amd64):failing on (%d,%d)\n", o, sz);
@@ -1903,7 +1902,9 @@
# if defined(__NR__llseek)
case __NR__llseek:
# endif
-
+# if defined(__NR__newselect)
+ case __NR__newselect:
+# endif
# if defined(__NR_accept)
case __NR_accept:
# endif
@@ -1919,6 +1920,9 @@
case __NR_exit: /* hmm, why are we still alive? */
case __NR_fchmod:
case __NR_fchown:
+# if defined(__NR_fchown32)
+ case __NR_fchown32:
+# endif
# if defined(__NR_fcntl64)
case __NR_fcntl64:
# endif
@@ -1926,9 +1930,21 @@
case __NR_fstatfs:
case __NR_fsync:
case __NR_ftruncate:
+# if defined(__NR_ftruncate64)
+ case __NR_ftruncate64:
+# endif
case __NR_getegid:
+# if defined(__NR_getegid32)
+ case __NR_getegid32:
+# endif
case __NR_geteuid:
+# if defined(__NR_geteuid32)
+ case __NR_geteuid32:
+# endif
case __NR_getgid:
+# if defined(__NR_getgid32)
+ case __NR_getgid32:
+# endif
case __NR_getppid:
case __NR_getresgid:
case __NR_getresuid:
@@ -1940,6 +1956,9 @@
# endif
case __NR_gettimeofday:
case __NR_getuid:
+# if defined(__NR_getuid32)
+ case __NR_getuid32:
+# endif
case __NR_inotify_init:
case __NR_kill:
case __NR_link:
@@ -1975,6 +1994,7 @@
# if defined(__NR_sendto)
case __NR_sendto:
# endif
+ case __NR_setitimer:
case __NR_setrlimit:
# if defined(__NR_setsockopt)
case __NR_setsockopt:
@@ -1991,6 +2011,9 @@
case __NR_tgkill:
case __NR_time:
case __NR_truncate:
+# if defined(__NR_truncate64)
+ case __NR_truncate64:
+# endif
case __NR_umask:
case __NR_unlink:
case __NR_utime:
@@ -2065,10 +2088,12 @@
/*--- Functions called from generated code ---*/
/*--------------------------------------------------------------------*/
+#if SC_SEGS
static void checkSeg ( Seg vseg ) {
tl_assert(vseg == UNKNOWN || vseg == NONPTR || vseg == BOTTOM
|| Seg__plausible(vseg) );
}
+#endif
// XXX: could be more sophisticated -- actually track the lowest/highest
// valid address used by the program, and then return False for anything
@@ -2076,12 +2101,15 @@
// 0xc0000000 is valid [unless you've changed that in your kernel]
static __inline__ Bool looks_like_a_pointer(Addr a)
{
- if (sizeof(UWord) == 4) {
- return (a > 0x01000000UL && a < 0xFF000000UL);
- } else {
- //return (a > 0x01000000UL && a < 0xFF00000000000000UL);
- return (a >= 16 * 0x10000UL && a < 0xFF00000000000000UL);
- }
+# if defined(VGA_x86) || defined(VGA_ppc32)
+ tl_assert(sizeof(UWord) == 4);
+ return (a > 0x01000000UL && a < 0xFF000000UL);
+# elif defined(VGA_amd64) || defined(VGA_ppc64)
+ tl_assert(sizeof(UWord) == 8);
+ return (a >= 16 * 0x10000UL && a < 0xFF00000000000000UL);
+# else
+# error "Unsupported architecture"
+# endif
}
static __inline__ VG_REGPARM(1)
@@ -2138,17 +2166,15 @@
static void show_lossage ( void )
{
Lossage* elem;
-return;
VG_(OSetGen_ResetIter)( lossage );
while ( (elem = VG_(OSetGen_Next)(lossage)) ) {
-
- if (elem->count < 10) continue;
- //Char buf[100];
+ if (elem->count < 10) continue;
+ //Char buf[100];
//(void)VG_(describe_IP)(elem->ec, buf, sizeof(buf)-1);
//buf[sizeof(buf)-1] = 0;
//VG_(printf)(" %,8lu %s\n", elem->count, buf);
- VG_(message)(Vg_UserMsg, "Lossage count %,lu at", elem->count);
- VG_(pp_ExeContext)(elem->ec);
+ VG_(message)(Vg_UserMsg, "Lossage count %,lu at", elem->count);
+ VG_(pp_ExeContext)(elem->ec);
}
}
@@ -2156,46 +2182,50 @@
static __inline__
void check_load_or_store(Bool is_write, Addr m, UInt sz, Seg mptr_vseg)
{
+ if (clo_lossage_check) {
+ Seg seg;
+ stats__tot_mem_refs++;
+ if (ISList__findI0( seglist, (Addr)m, &seg )) {
+ /* m falls inside 'seg' (that is, we are making a memory
+ reference inside 'seg'). Now, really mptr_vseg should be
+ a tracked segment of some description. Badness is when
+ mptr_vsrg is UNKNOWN, BOTTOM or NONPTR at this point,
+ since that means we've lost the type of it somehow: it
+ shoud say that m points into a real segment (preferable
+ 'seg'), but it doesn't. */
+ if (Seg__status_is_SegHeap(seg)) {
+ stats__refs_in_a_seg++;
+ if (UNKNOWN == mptr_vseg
+ || BOTTOM == mptr_vseg || NONPTR == mptr_vseg) {
+ ExeContext* ec;
+ Char buf[100];
+ static UWord xx = 0;
+ stats__refs_lost_seg++;
+ ec = VG_(record_ExeContext)( VG_(get_running_tid)(), 0 );
+ inc_lossage(ec);
+ if (0) {
+ VG_(message)(Vg_DebugMsg, "");
+ VG_(message)(Vg_DebugMsg,
+ "Lossage %s %p sz %lu inside block alloc'd",
+ is_write ? "wr" : "rd", m, (UWord)sz);
+ VG_(pp_ExeContext)(Seg__where(seg));
+ }
+ if (xx++ < 0) {
+ Addr ip = VG_(get_IP)( VG_(get_running_tid)() );
+ (void)VG_(describe_IP)( ip, buf, sizeof(buf)-1);
+ buf[sizeof(buf)-1] = 0;
+ VG_(printf)("lossage at %p %s\n", ec, buf );
+ }
+ }
+ }
+ }
- { Seg seg;
- stats__tot_mem_refs++;
- if (ISList__findI0( seglist, (Addr)m, &seg )) {
- /* m falls inside 'seg' (that is, we are making a memory
- reference inside 'seg'). Now, really mptr_vseg should be a
- tracked segment of some description. Badness is when
- mptr_vsrg is UNKNOWN, BOTTOM or NONPTR at this point, since
- that means we've lost the type of it somehow: it shoud say
- that m points into a real segment (preferable 'seg'), but it
- doesn't. */
- if (Seg__status_is_SegHeap(seg)) {
- stats__refs_in_a_seg++;
- if (UNKNOWN == mptr_vseg
- || BOTTOM == mptr_vseg || NONPTR == mptr_vseg) {
- ExeContext* ec;
- Char buf[100];
- static UWord xx = 0;
- stats__refs_lost_seg++;
- //ip = VG_(get_IP)( VG_(get_running_tid)() );
- ec = VG_(record_ExeContext)( VG_(get_running_tid)(), 0 );
- inc_lossage(ec);
- if (0) {
- VG_(message)(Vg_DebugMsg, "");
- VG_(message)(Vg_DebugMsg,
- "Lossage %s %p sz %lu inside block alloc'd",
- is_write ? "wr" : "rd", m, (UWord)sz);
- VG_(pp_ExeContext)(Seg__where(seg));
- }
- if (xx++ < 0) {
- (void)VG_(describe_IP)(ec, buf, sizeof(buf)-1);
- buf[sizeof(buf)-1] = 0;
- VG_(printf)("lossage at %p %s\n", ec, buf );
- }
- }
- }
- }
- }
+ } /* clo_lossage_check */
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
+
if (UNKNOWN == mptr_vseg) {
// do nothing
@@ -2250,10 +2280,13 @@
/* On 32 bit targets, we will use:
check_load1 check_load2 check_load4_P
+ check_load4 (for 32-bit FP reads)
+ check_load8 (for 64-bit FP reads)
+ check_load16 (for xmm/altivec reads)
On 64 bit targets, we will use:
check_load1 check_load2 check_load4 check_load8_P
- check_load8 (64-bit FP reads)
- check_load16 (for xmm reads)
+ check_load8 (for 64-bit FP reads)
+ check_load16 (for xmm/altivec reads)
A "_P" handler reads a pointer from memory, and so returns a value
to the generated code -- the pointer's shadow value. That implies
@@ -2267,7 +2300,9 @@
static VG_REGPARM(2)
void check_load16(Addr m, Seg mptr_vseg)
{
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 16, mptr_vseg);
}
@@ -2276,7 +2311,9 @@
static VG_REGPARM(2)
void check_load8(Addr m, Seg mptr_vseg)
{
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 8, mptr_vseg);
}
@@ -2288,7 +2325,9 @@
{
Seg vseg;
tl_assert(sizeof(UWord) == 8); /* DO NOT REMOVE */
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 8, mptr_vseg);
if (VG_IS_8_ALIGNED(m)) {
vseg = get_mem_vseg(m);
@@ -2306,7 +2345,9 @@
{
Seg vseg;
tl_assert(sizeof(UWord) == 4); /* DO NOT REMOVE */
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 4, mptr_vseg);
if (VG_IS_4_ALIGNED(m)) {
vseg = get_mem_vseg(m);
@@ -2316,13 +2357,13 @@
return vseg;
}
-// This handles 32 bit loads on 64 bit targets. It must not
-// be called on 32 bit targets.
+// Used for both 32 bit and 64 bit targets.
static VG_REGPARM(2)
void check_load4(Addr m, Seg mptr_vseg)
{
- tl_assert(sizeof(UWord) == 8); /* DO NOT REMOVE */
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 4, mptr_vseg);
}
@@ -2330,7 +2371,9 @@
static VG_REGPARM(2)
void check_load2(Addr m, Seg mptr_vseg)
{
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 2, mptr_vseg);
}
@@ -2338,7 +2381,9 @@
static VG_REGPARM(2)
void check_load1(Addr m, Seg mptr_vseg)
{
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/False, m, 1, mptr_vseg);
}
@@ -2377,22 +2422,65 @@
// store data is passed in 2 pieces, the most significant
// bits first.
static VG_REGPARM(3)
-void check_store16_msb8B_lsb8B(Addr m, Seg mptr_vseg,
- UWord msb8B, UWord lsb8B)
+void check_store16_ms8B_ls8B(Addr m, Seg mptr_vseg,
+ UWord ms8B, UWord ls8B)
{
tl_assert(sizeof(UWord) == 8); /* DO NOT REMOVE */
// Actually *do* the STORE here
if (host_is_little_endian()) {
// FIXME: aren't we really concerned whether the guest
// is little endian, not whether the host is?
- *(UWord*)(m + 0) = lsb8B;
- *(UWord*)(m + 8) = msb8B;
+ *(ULong*)(m + 0) = ls8B;
+ *(ULong*)(m + 8) = ms8B;
} else {
tl_assert(0);
}
nonptr_or_unknown_range(m, 16);
}
+// This handles 128 bit stores on 64 bit targets. The
+// store data is passed in 2 pieces, the most significant
+// bits first.
+static VG_REGPARM(3)
+void check_store16_ms4B_4B_4B_ls4B(Addr m, Seg mptr_vseg,
+ UWord ms4B, UWord w2,
+ UWord w1, UWord ls4B)
+{
+ tl_assert(sizeof(UWord) == 4); /* DO NOT REMOVE */
+ // Actually *do* the STORE here
+ if (host_is_little_endian()) {
+ // FIXME: aren't we really concerned whether the guest
+ // is little endian, not whether the host is?
+ *(UInt*)(m + 0) = ls4B;
+ *(UInt*)(m + 4) = w1;
+ *(UInt*)(m + 8) = w2;
+ *(UInt*)(m + 12) = ms4B;
+ } else {
+ tl_assert(0);
+ }
+ nonptr_or_unknown_range(m, 16);
+}
+
+// This handles 64 bit stores on 32 bit targets. The
+// store data is passed in 2 pieces, the most significant
+// bits first.
+static VG_REGPARM(3)
+void check_store8_ms4B_ls4B(Addr m, Seg mptr_vseg,
+ UWord ms4B, UWord ls4B)
+{
+ tl_assert(sizeof(UWord) == 4); /* DO NOT REMOVE */
+ // Actually *do* the STORE here
+ if (host_is_little_endian()) {
+ // FIXME: aren't we really concerned whether the guest
+ // is little endian, not whether the host is?
+ *(UInt*)(m + 0) = ls4B;
+ *(UInt*)(m + 4) = ms4B;
+ } else {
+ tl_assert(0);
+ }
+ nonptr_or_unknown_range(m, 8);
+}
+
// This handles 64 bit non pointer stores on 64 bit targets.
// It must not be called on 32 bit targets.
static VG_REGPARM(3)
@@ -2400,7 +2488,7 @@
{
tl_assert(sizeof(UWord) == 8); /* DO NOT REMOVE */
// Actually *do* the STORE here
- *(UWord*)m = all8B;
+ *(ULong*)m = all8B;
nonptr_or_unknown_range(m, 8);
}
@@ -2410,8 +2498,10 @@
void check_store8_P(Addr m, Seg mptr_vseg, UWord t, Seg t_vseg)
{
tl_assert(sizeof(UWord) == 8); /* DO NOT REMOVE */
-checkSeg(t_vseg);
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(t_vseg);
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/True, m, 8, mptr_vseg);
// Actually *do* the STORE here
*(ULong*)m = t;
@@ -2429,8 +2519,10 @@
void check_store4_P(Addr m, Seg mptr_vseg, UWord t, Seg t_vseg)
{
tl_assert(sizeof(UWord) == 4); /* DO NOT REMOVE */
-checkSeg(t_vseg);
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(t_vseg);
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/True, m, 4, mptr_vseg);
// Actually *do* the STORE here
*(UInt*)m = t;
@@ -2442,13 +2534,13 @@
}
}
-// This handles 32 bit stores on 64 bit targets. It must not
-// be called on 32 bit targets.
+// Used for both 32 bit and 64 bit targets.
static VG_REGPARM(3)
void check_store4(Addr m, Seg mptr_vseg, UWord t)
{
- tl_assert(sizeof(UWord) == 8); /* DO NOT REMOVE */
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/True, m, 4, mptr_vseg);
// Actually *do* the STORE here (Nb: cast must be to 4-byte type!)
*(UInt*)m = t;
@@ -2459,7 +2551,9 @@
static VG_REGPARM(3)
void check_store2(Addr m, Seg mptr_vseg, UWord t)
{
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/True, m, 2, mptr_vseg);
// Actually *do* the STORE here (Nb: cast must be to 2-byte type!)
*(UShort*)m = t;
@@ -2470,49 +2564,16 @@
static VG_REGPARM(3)
void check_store1(Addr m, Seg mptr_vseg, UWord t)
{
-checkSeg(mptr_vseg);
+# if SC_SEGS
+ checkSeg(mptr_vseg);
+# endif
check_load_or_store(/*is_write*/True, m, 1, mptr_vseg);
// Actually *do* the STORE here (Nb: cast must be to 1-byte type!)
*(UChar*)m = t;
nonptr_or_unknown_range(m, 1);
}
-//zz
-//zz #define CHECK_FPU_R(N) \
-//zz static __attribute__((regparm(2))) \
-//zz void check_fpu_r##N(Addr m, Seg mptr_vseg) \
-//zz { \
-//zz VGP_PUSHCC(VgpCheckFpuR); \
-//zz check_load_or_store(/*is_write*/False, m, N, mptr_vseg); \
-//zz VGP_POPCC(VgpCheckFpuR); \
-//zz }
-//zz CHECK_FPU_R(2);
-//zz CHECK_FPU_R(4);
-//zz CHECK_FPU_R(8);
-//zz CHECK_FPU_R(10);
-//zz CHECK_FPU_R(16);
-//zz CHECK_FPU_R(28);
-//zz CHECK_FPU_R(108);
-//zz
-//zz
-//zz #define CHECK_FPU_W(N) \
-//zz static __attribute__((regparm(2))) \
-//zz void check_fpu_w##N(Addr m, Seg mptr_vseg) \
-//zz { \
-//zz VGP_PUSHCC(VgpCheckFpuW); \
-//zz check_load_or_store(/*is_write*/True, m, N, mptr_vseg); \
-//zz set_mem_nonptr( m, N ); \
-//zz VGP_POPCC(VgpCheckFpuW); \
-//zz }
-//zz CHECK_FPU_W(2);
-//zz CHECK_FPU_W(4);
-//zz CHECK_FPU_W(8);
-//zz CHECK_FPU_W(10);
-//zz CHECK_FPU_W(16);
-//zz CHECK_FPU_W(28);
-//zz CHECK_FPU_W(108);
-
// Nb: if the result is BOTTOM, return immedately -- don't let BOTTOM
// be changed to NONPTR by a range check on the result.
#define BINOP(bt, nn, nu, np, un, uu, up, pn, pu, pp) \
@@ -2532,8 +2593,6 @@
record_arith_error(seg1, seg2, opname); \
out = NONPTR
-//zz // Extra arg for result of various ops
-//zz static UInt do_op___result;
// -------------
// + | n ? p
@@ -2544,8 +2603,10 @@
// -------------
static Seg do_addW_result(Seg seg1, Seg seg2, UWord result, HChar* opname)
{
-checkSeg(seg1);
-checkSeg(seg2);
+# if SC_SEGS
+ checkSeg(seg1);
+ checkSeg(seg2);
+# endif
Seg out;
BINOP(
return BOTTOM,
@@ -2559,11 +2620,14 @@
static VG_REGPARM(3) Seg do_addW(Seg seg1, Seg seg2, UWord result)
{
Seg out;
-checkSeg(seg1);
-checkSeg(seg2);
+# if SC_SEGS
+ checkSeg(seg1);
+ checkSeg(seg2);
+# endif
out = do_addW_result(seg1, seg2, result, "Add32/Add64");
-checkSeg(out);
-// VG_(printf)("do_add4: returning %p\n", out);
+# if SC_SEGS
+ checkSeg(out);
+# endif
return out;
}
@@ -2576,8 +2640,10 @@
// -------------
static VG_REGPARM(3) Seg do_subW(Seg seg1, Seg seg2, UWord result)
{
-checkSeg(seg1);
-checkSeg(seg2);
+# if SC_SEGS
+ checkSeg(seg1);
+ checkSeg(seg2);
+# endif
Seg out;
// Nb: when returning BOTTOM, don't let it go through the range-check;
// a segment linking offset can easily look like a nonptr.
@@ -2778,7 +2844,9 @@
// -------------
static VG_REGPARM(2) Seg do_notW(Seg seg1, UWord result)
{
-checkSeg(seg1);
+# if SC_SEGS
+ checkSeg(seg1);
+# endif
if (BOTTOM == seg1) return BOTTOM;
return NONPTR;
}
@@ -2788,8 +2856,10 @@
// Pretend it always returns a nonptr. Maybe improve later.
static VG_REGPARM(2) Seg do_mulW(Seg seg1, Seg seg2)
{
-checkSeg(seg1);
-checkSeg(seg2);
+# if SC_SEGS
+ checkSeg(seg1);
+ checkSeg(seg2);
+# endif
if (is_known_segment(seg1) && is_known_segment(seg2))
record_arith_error(seg1, seg2, "Mul32/Mul64");
return NONPTR;
@@ -2896,7 +2966,7 @@
initial IR optimisation, and we do not want to spaces in tables
tracking them.
- Shadow IRTemps are therefore allocated on demand. mce.tmpMap is a
+ Shadow IRTemps are therefore allocated on demand. pce.tmpMap is a
table indexed [0 .. n_types-1], which gives the current shadow for
each original tmp, or INVALID_IRTEMP if none is so far assigned.
It is necessary to support making multiple assignments to a shadow
@@ -3241,6 +3311,31 @@
stmt( 'I', pce, IRStmt_Dirty(di) );
}
+/* Version of gen_dirty_v_WWW for 6 arguments. Callee must be a
+ VG_REGPARM(3) function.*/
+static void gen_dirty_v_6W ( PCEnv* pce, void* h_fn, HChar* h_nm,
+ IRExpr* a1, IRExpr* a2, IRExpr* a3,
+ IRExpr* a4, IRExpr* a5, IRExpr* a6 )
+{
+ IRDirty* di;
+ tl_assert(isIRAtom(a1));
+ tl_assert(isIRAtom(a2));
+ tl_assert(isIRAtom(a3));
+ tl_assert(isIRAtom(a4));
+ tl_assert(isIRAtom(a5));
+ tl_assert(isIRAtom(a6));
+ tl_assert(typeOfIRExpr(pce->bb->tyenv, a1) == pce->gWordTy);
+ tl_assert(typeOfIRExpr(pce->bb->tyenv, a2) == pce->gWordTy);
+ tl_assert(typeOfIRExpr(pce->bb->tyenv, a3) == pce->gWordTy);
+ tl_assert(typeOfIRExpr(pce->bb->tyenv, a4) == pce->gWordTy);
+ tl_assert(typeOfIRExpr(pce->bb->tyenv, a5) == pce->gWordTy);
+ tl_assert(typeOfIRExpr(pce->bb->tyenv, a6) == pce->gWordTy);
+ di = unsafeIRDirty_0_N( 3/*regparms*/,
+ h_nm, VG_(fnptr_to_fnentry)( h_fn ),
+ mkIRExprVec_6( a1, a2, a3, a4, a5, a6 ) );
+ stmt( 'I', pce, IRStmt_Dirty(di) );
+}
+
static IRAtom* uwiden_to_host_word ( PCEnv* pce, IRAtom* a )
{
IRType a_ty = typeOfIRExpr(pce->bb->tyenv, a);
@@ -3328,8 +3423,8 @@
void* fn = NULL;
IRExpr* a1v = NULL;
IRExpr* a2v = NULL;
- IRExpr* a3v = NULL;
- IRExpr* a4v = NULL;
+ //IRExpr* a3v = NULL;
+ //IRExpr* a4v = NULL;
IRTemp res = IRTemp_INVALID;
if (pce->gWordTy == Ity_I32) {
@@ -3384,12 +3479,7 @@
time. */
case Iop_64HIto32: goto n_or_u_32;
case Iop_64to32: goto n_or_u_32;
- case Iop_Shl32: goto n_or_u_32;
- case Iop_Sar32: goto n_or_u_32;
- case Iop_Shr32: goto n_or_u_32;
case Iop_Xor32: goto n_or_u_32;
- case Iop_16Uto32: goto n_or_u_32;
- case Iop_16Sto32: goto n_or_u_32;
n_or_u_32:
assign( 'I', pce, dstv,
mkexpr(
@@ -3400,10 +3490,30 @@
/* Cases where it's very obvious that the result cannot be a
pointer. Hence declare directly that it's NONPTR; don't
bother with the overhead of calling nonptr_or_unknown. */
+
+ /* cases where it makes no sense for the result to be a ptr */
+ /* FIXME: for Shl/Shr/Sar, really should do a test on the 2nd
+ arg, so that shift by zero preserves the original
+ value. */
+ case Iop_Shl32: goto n32;
+ case Iop_Sar32: goto n32;
+ case Iop_Shr32: goto n32;
+ case Iop_16Uto32: goto n32;
+ case Iop_16Sto32: goto n32;
+ case Iop_F64toI32: goto n32;
+ case Iop_16HLto32: goto n32;
+ case Iop_MullS16: goto n32;
+ case Iop_MullU16: goto n32;
+ case Iop_PRemC3210F64: goto n32;
+
+ /* cases where result range is very limited and clearly cannot
+ be a pointer */
case Iop_1Uto32: goto n32;
case Iop_8Uto32: goto n32;
case Iop_8Sto32: goto n32;
case Iop_Clz32: goto n32;
+ case Iop_Ctz32: goto n32;
+ case Iop_CmpF64: goto n32;
n32:
assign( 'I', pce, dstv, mkU32( (UInt)NONPTR ));
break;
@@ -3417,19 +3527,6 @@
} else {
tl_assert(pce->gWordTy == Ity_I64);
-
-#if 0
- /* special handling of t +/- const: return the shadow for t
- regardless of how big the const is. Otherwise the result may
- degrade to Unknown if the const is declared unknown by
- nonptr_or_unknown(). */
- if (1 && op == Iop_Add64
- && a1->tag == Iex_RdTmp && a2->tag == Iex_Const) {
- a1v = schemeEw_Atom( pce, a1 );
- assign( 'I', pce, dstv, a1v );
- return;
- }
-#endif
switch (op) {
/* For these cases, pass Segs for both arguments, and the
@@ -3496,27 +3593,26 @@
bother with the overhead of calling nonptr_or_unknown. */
/* cases where it makes no sense for the result to be a ptr */
- /* FIXME: fix for 32-bit platforms. For Shl/Shr/Sar, really
- should do a test on the 2nd arg, so that shift by zero
- preserves the original value. */
+ /* FIXME: for Shl/Shr/Sar, really should do a test on the 2nd
+ arg, so that shift by zero preserves the original
+ value. */
case Iop_Shl64: goto n64;
case Iop_Sar64: goto n64;
case Iop_Shr64: goto n64;
-
case Iop_32Uto64: goto n64;
case Iop_32Sto64: goto n64;
case Iop_16Uto64: goto n64;
case Iop_16Sto64: goto n64;
case Iop_32HLto64: goto n64;
+ case Iop_DivModU64to32: goto n64;
+ case Iop_DivModS64to32: goto n64;
+ case Iop_F64toI64: goto n64;
/* cases where result range is very limited and clearly cannot
be a pointer */
case Iop_1Uto64: goto n64;
case Iop_8Uto64: goto n64;
case Iop_8Sto64: goto n64;
- case Iop_DivModU64to32: goto n64;
- case Iop_DivModS64to32: goto n64;
- case Iop_F64toI64: goto n64;
case Iop_Ctz64: goto n64;
case Iop_Clz64: goto n64;
/* 64-bit simd */
@@ -3727,28 +3823,98 @@
IRExpr* data = st->Ist.Store.data;
IRExpr* addr = st->Ist.Store.addr;
IRType d_ty = typeOfIRExpr(pce->bb->tyenv, data);
- HChar* h_nm = NULL;
- void* h_fn = NULL;
IRExpr* addrv = schemeEw_Atom( pce, addr );
if (pce->gWordTy == Ity_I32) {
/* ------ 32 bit host/guest (cough, cough) ------ */
switch (d_ty) {
- case Ity_I32: h_fn = &check_store4_P;
- h_nm = "check_store4_P"; break;
- case Ity_I16: h_fn = &check_store2;
- h_nm = "check_store2"; break;
- case Ity_I8: h_fn = &check_store1;
- h_nm = "check_store1"; break;
- default: tl_assert(0);
+ /* Integer word case */
+ case Ity_I32: {
+ IRExpr* datav = schemeEw_Atom( pce, data );
+ gen_dirty_v_WWWW( pce,
+ &check_store4_P, "check_store4_P",
+ addr, addrv, data, datav );
+ break;
+ }
+ /* Integer subword cases */
+ case Ity_I16:
+ gen_dirty_v_WWW( pce,
+ &check_store2, "check_store2",
+ addr, addrv,
+ uwiden_to_host_word( pce, data ));
+ break;
+ case Ity_I8:
+ gen_dirty_v_WWW( pce,
+ &check_store1, "check_store1",
+ addr, addrv,
+ uwiden_to_host_word( pce, data ));
+ break;
+ /* 64-bit float. Pass store data in 2 32-bit pieces. */
+ case Ity_F64: {
+ IRAtom* d64 = assignNew( 'I', pce, Ity_I64,
+ unop(Iop_ReinterpF64asI64, data) );
+ IRAtom* dLo32 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64to32, d64) );
+ IRAtom* dHi32 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64HIto32, d64) );
+ gen_dirty_v_WWWW( pce,
+ &check_store8_ms4B_ls4B,
+ "check_store8_ms4B_ls4B",
+ addr, addrv, dHi32, dLo32 );
+ break;
+ }
+ /* 32-bit float. We can just use _store4, but need
+ to futz with the argument type. */
+ case Ity_F32: {
+ IRAtom* i32 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_ReinterpF32asI32,
+ data ) );
+ gen_dirty_v_WWW( pce,
+ &check_store4,
+ "check_store4",
+ addr, addrv, i32 );
+ break;
+ }
+ /* 64-bit int. Pass store data in 2 32-bit pieces. */
+ case Ity_I64: {
+ IRAtom* dLo32 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64to32, data) );
+ IRAtom* dHi32 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64HIto32, data) );
+ gen_dirty_v_WWWW( pce,
+ &check_store8_ms4B_ls4B,
+ "check_store8_ms4B_ls4B",
+ addr, addrv, dHi32, dLo32 );
+ break;
+ }
+
+ /* 128-bit vector. Pass store data in 4 32-bit pieces.
+ This is all very ugly and inefficient, but it is
+ hard to better without considerably complicating the
+ store-handling schemes. */
+ case Ity_V128: {
+ IRAtom* dHi64 = assignNew( 'I', pce, Ity_I64,
+ unop(Iop_V128HIto64, data) );
+ IRAtom* dLo64 = assignNew( 'I', pce, Ity_I64,
+ unop(Iop_V128to64, data) );
+ IRAtom* w3 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64HIto32, dHi64) );
+ IRAtom* w2 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64to32, dHi64) );
+ IRAtom* w1 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64HIto32, dLo64) );
+ IRAtom* w0 = assignNew( 'I', pce, Ity_I32,
+ unop(Iop_64to32, dLo64) );
+ gen_dirty_v_6W( pce,
+ &check_store16_ms4B_4B_4B_ls4B,
+ "check_store16_ms4B_4B_4B_ls4B",
+ addr, addrv, w3, w2, w1, w0 );
+ break;
+ }
+
+
+ default:
+ ppIRType(d_ty); tl_assert(0);
}
- if (d_ty == Ity_I32) {
- IRExpr* datav = schemeEw_Atom( pce, data );
- gen_dirty_v_WWWW( pce, h_fn, h_nm, addr, addrv,
- data, datav );
- } else {
- gen_dirty_v_WWW( pce, h_fn, h_nm, addr, addrv,
- uwiden_to_host_word( pce, data ));
- }
} else {
/* ------ 64 bit host/guest (cough, cough) ------ */
switch (d_ty) {
@@ -3786,8 +3952,8 @@
IRAtom* dLo64 = assignNew( 'I', pce, Ity_I64,
unop(Iop_V128to64, data) );
gen_dirty_v_WWWW( pce,
- &check_store16_msb8B_lsb8B,
- "check_store16_msb8B_lsb8B",
+ &check_store16_ms8B_ls8B,
+ "check_store16_ms8B_ls8B",
addr, addrv, dHi64, dLo64 );
break;
}
@@ -3884,12 +4050,22 @@
if (pce->gWordTy == Ity_I32) {
/* 32 bit host/guest (cough, cough) */
switch (e_ty) {
- case Ity_I32: h_fn = &check_load4_P;
- h_nm = "check_load4_P"; break;
- case Ity_I16: h_fn = &check_load2;
- h_nm = "check_load2"; break;
- case Ity_I8: h_fn = &check_load1;
- h_nm = "check_load1"; break;
+ /* Ity_I32: helper returns shadow value. */
+ case Ity_I32: h_fn = &check_load4_P;
+ h_nm = "check_load4_P"; break;
+ /* all others: helper does not return a shadow
+ value. */
+ case Ity_V128: h_fn = &check_load16;
+ h_nm = "check_load16"; break;
+ case Ity_I64:
+ case Ity_F64: h_fn = &check_load8;
+ h_nm = "check_load8"; break;
+ case Ity_F32: h_fn = &check_load4;
+ h_nm = "check_load4"; break;
+ case Ity_I16: h_fn = &check_load2;
+ h_nm = "check_load2"; break;
+ case Ity_I8: h_fn = &check_load1;
+ h_nm = "check_load1"; break;
default: ppIRType(e_ty); tl_assert(0);
}
addrv = schemeEw_Atom( pce, addr );
@@ -4756,7 +4932,7 @@
pc_replace___builtin_delete,
pc_replace___builtin_vec_delete,
pc_replace_realloc,
- PC_MALLOC_REDZONE_SZB );
+ 0 /* no need for client heap redzones */ );
VG_(needs_core_errors) ();
VG_(needs_tool_errors) (eq_Error,
@@ -4772,6 +4948,10 @@
VG_(needs_syscall_wrapper)( pre_syscall,
post_syscall );
+ VG_(needs_command_line_options)(pc_process_cmd_line_options,
+ pc_print_usage,
+ pc_print_debug_usage);
+
VG_(needs_var_info)();
//zz // No needs
@@ -4859,18 +5039,20 @@
static void pc_fini ( Int exitcode )
{
-// if (0)
-// count_segs();
- VG_(message)(Vg_UserMsg, "");
- VG_(message)(Vg_UserMsg, "%12lld total memory references",
- stats__tot_mem_refs);
- VG_(message)(Vg_UserMsg, "%12lld of which are in a known segment",
- stats__refs_in_a_seg);
- VG_(message)(Vg_UserMsg, "%12lld of which are 'lost' w.r.t the seg",
- stats__refs_lost_seg);
- VG_(message)(Vg_UserMsg, "");
- show_lossage();
- VG_(message)(Vg_UserMsg, "");
+ if (clo_lossage_check) {
+ VG_(message)(Vg_UserMsg, "");
+ VG_(message)(Vg_UserMsg, "%12lld total memory references",
+ stats__tot_mem_refs);
+ VG_(message)(Vg_UserMsg, "%12lld of which are in a known segment",
+ stats__refs_in_a_seg);
+ VG_(message)(Vg_UserMsg, "%12lld of which are 'lost' w.r.t the seg",
+ stats__refs_lost_seg);
+ VG_(message)(Vg_UserMsg, "");
+ show_lossage();
+ VG_(message)(Vg_UserMsg, "");
+ } else {
+ tl_assert( 0 == VG_(OSetGen_Size)(lossage) );
+ }
}
VG_DETERMINE_INTERFACE_VERSION(pc_pre_clo_init)
|
|
From: <sv...@va...> - 2008-07-29 19:01:45
|
Author: sewardj
Date: 2008-07-29 20:01:52 +0100 (Tue, 29 Jul 2008)
New Revision: 8478
Log:
Don't hardwire the value of RAND_MAX in pc_list.c -- it isn't the right
value for VG_(random) and caused "statistically lopsided" skip lists to
be formed, and also segfaults due to array overruns.
Modified:
branches/PTRCHECK/exp-ptrcheck/pc_list.c
branches/PTRCHECK/include/pub_tool_libcbase.h
Modified: branches/PTRCHECK/exp-ptrcheck/pc_list.c
===================================================================
--- branches/PTRCHECK/exp-ptrcheck/pc_list.c 2008-07-29 17:54:49 UTC (rev 8477)
+++ branches/PTRCHECK/exp-ptrcheck/pc_list.c 2008-07-29 19:01:52 UTC (rev 8478)
@@ -57,11 +57,13 @@
#define my_assert assert
#define my_printf printf
#define my_random(_x) random()
+ #define MY_RAND_MAX RAND_MAX
#else
#define my_malloc VG_(malloc)
#define my_free VG_(free)
#define my_assert tl_assert
#define my_printf VG_(printf)
+ #define MY_RAND_MAX VG_RAND_MAX
#define my_random(_x) VG_(random)(_x)
#endif
@@ -829,10 +831,15 @@
return x->forward[0];
}
+/* Return a "random" float in the range [0.0 .. 1.0) */
static float normalizedRandom(void)
{
- // Nb: 2147483647 == (2**31 - 1)
- float f = ((float)my_random(NULL))/ 2147483647.0;
+ //static Int uh = 0, lh = 0;
+ float f = ((float)my_random(NULL))/ (MY_RAND_MAX + 1.0);
+ tl_assert(f >= 0.0);
+ tl_assert(f <= 1.0); /* in fact < and not <=, but we'll overlook that. */
+ //if (f >= 0.5) uh++; else lh++;
+ //VG_(printf)("(%d,%d) %d\n", lh, uh, (Int)(1000.0 * f));
return f;
}
@@ -840,7 +847,7 @@
static Int ISList__randomLevel(ISList* o)
{
Int levels = 0;
- while ( P < normalizedRandom() ) levels++;
+ while ( P <= normalizedRandom() ) levels++;
return ( levels <= o->maxLevel ? levels : o->maxLevel+1 );
}
Modified: branches/PTRCHECK/include/pub_tool_libcbase.h
===================================================================
--- branches/PTRCHECK/include/pub_tool_libcbase.h 2008-07-29 17:54:49 UTC (rev 8477)
+++ branches/PTRCHECK/include/pub_tool_libcbase.h 2008-07-29 19:01:52 UTC (rev 8478)
@@ -144,6 +144,7 @@
// is NULL, it uses its own seed, which starts at zero. If pSeed is
// non-NULL, it uses and updates whatever pSeed points at.
extern UInt VG_(random) ( /*MOD*/UInt* pSeed );
+#define VG_RAND_MAX (1ULL << 32)
#endif // __PUB_TOOL_LIBCBASE_H
|
|
From: <sv...@va...> - 2008-07-29 17:54:41
|
Author: bart
Date: 2008-07-29 18:54:49 +0100 (Tue, 29 Jul 2008)
New Revision: 8477
Log:
Un-break configure test for clock_gettime().
Modified:
trunk/configure.in
Modified: trunk/configure.in
===================================================================
--- trunk/configure.in 2008-07-29 17:04:31 UTC (rev 8476)
+++ trunk/configure.in 2008-07-29 17:54:49 UTC (rev 8477)
@@ -1275,11 +1275,6 @@
AC_CHECK_LIB([rt], [clock_gettime])
AC_CHECK_LIB([QtCore], [_ZN6QMutex4lockEv]) # QMutex::lock()
-# AC_CHECK_LIB adds any library found to the variable LIBS, and links these
-# libraries with any shared object and/or executable. This is NOT what we
-# want for e.g. vgpreload_core-x86-linux.so
-LIBS=""
-
AC_CHECK_FUNCS([ \
clock_gettime\
epoll_create \
@@ -1303,6 +1298,10 @@
utimensat \
])
+# AC_CHECK_LIB adds any library found to the variable LIBS, and links these
+# libraries with any shared object and/or executable. This is NOT what we
+# want for e.g. vgpreload_core-x86-linux.so
+LIBS=""
# Do we have a useable MPI setup on the primary and/or secondary targets?
# On Linux, by default, assumes mpicc and -m32/-m64
|
|
From: <sv...@va...> - 2008-07-29 17:04:23
|
Author: bart
Date: 2008-07-29 18:04:31 +0100 (Tue, 29 Jul 2008)
New Revision: 8476
Log:
Removed duplicate volatile keyword such that the compiler does no longer print a warning.
Modified:
trunk/helgrind/hg_intercepts.c
Modified: trunk/helgrind/hg_intercepts.c
===================================================================
--- trunk/helgrind/hg_intercepts.c 2008-07-29 16:57:06 UTC (rev 8475)
+++ trunk/helgrind/hg_intercepts.c 2008-07-29 17:04:31 UTC (rev 8476)
@@ -177,7 +177,7 @@
so is mentioned by name in glibc-*helgrind*.supp. */
static void* mythread_wrapper ( void* xargsV )
{
- volatile Word volatile* xargs = (volatile Word volatile*) xargsV;
+ volatile Word* xargs = (volatile Word*) xargsV;
void*(*fn)(void*) = (void*(*)(void*))xargs[0];
void* arg = (void*)xargs[1];
pthread_t me = pthread_self();
|
|
From: Török E. <edw...@gm...> - 2008-07-29 16:58:29
|
Hi,
Could you please take a look at bug #167483?
I am seeing it ever since glibc 2.7 hit debian unstable last year, for
now I added a local suppression for it [*].
The bugreport has a script to reproduce the problem.
[*]
{
glibc-freeres-dbg
Memcheck:Free
fun:free
fun:free_mem
fun:__libc_freeres
}
{
glibc-freeres
Memcheck:Free
fun:free
obj:/lib*/libc-*.so
fun:__libc_freeres
}
Best regards,
--Edwin
|
|
From: <sv...@va...> - 2008-07-29 16:57:00
|
Author: bart
Date: 2008-07-29 17:57:06 +0100 (Tue, 29 Jul 2008)
New Revision: 8475
Log:
Switched from ANSI C stdio to Unix I/O in order to avoid that the I/O statements trigger any locking.
Modified:
trunk/drd/tests/linuxthreads_det.c
Modified: trunk/drd/tests/linuxthreads_det.c
===================================================================
--- trunk/drd/tests/linuxthreads_det.c 2008-07-29 16:28:36 UTC (rev 8474)
+++ trunk/drd/tests/linuxthreads_det.c 2008-07-29 16:57:06 UTC (rev 8475)
@@ -5,7 +5,6 @@
#include <pthread.h>
#include <semaphore.h>
-#include <stdio.h>
#include <unistd.h>
@@ -17,11 +16,11 @@
{
if (s_main_thread_pid == getpid())
{
- printf("NPTL or non-Linux POSIX threads implementation detected.\n");
+ write(STDOUT_FILENO, "NPTL or non-Linux POSIX threads implementation detected.\n", 57);
}
else
{
- printf("Detected LinuxThreads as POSIX threads implemenentation.\n");
+ write(STDOUT_FILENO, "Detected LinuxThreads as POSIX threads implementation.\n", 55);
}
sem_post(&s_sem);
return 0;
|
|
From: <sv...@va...> - 2008-07-29 16:28:29
|
Author: bart Date: 2008-07-29 17:28:36 +0100 (Tue, 29 Jul 2008) New Revision: 8474 Log: Compiles now with old versions of <sys/epoll.h> too. Modified: trunk/memcheck/tests/linux-syscalls-2007.c Modified: trunk/memcheck/tests/linux-syscalls-2007.c =================================================================== --- trunk/memcheck/tests/linux-syscalls-2007.c 2008-07-29 15:27:48 UTC (rev 8473) +++ trunk/memcheck/tests/linux-syscalls-2007.c 2008-07-29 16:28:36 UTC (rev 8474) @@ -13,6 +13,7 @@ #include "../../config.h" #include <fcntl.h> #include <signal.h> +#include <stdint.h> #if defined(HAVE_SYS_EPOLL_H) #include <sys/epoll.h> #endif |
|
From: <sv...@va...> - 2008-07-29 15:27:40
|
Author: bart Date: 2008-07-29 16:27:48 +0100 (Tue, 29 Jul 2008) New Revision: 8473 Log: Updated Makefile.am. Modified: trunk/drd/tests/Makefile.am Modified: trunk/drd/tests/Makefile.am =================================================================== --- trunk/drd/tests/Makefile.am 2008-07-29 15:21:17 UTC (rev 8472) +++ trunk/drd/tests/Makefile.am 2008-07-29 15:27:48 UTC (rev 8473) @@ -17,7 +17,8 @@ EXTRA_DIST = \ $(noinst_SCRIPTS) \ - atomic_var.stderr.exp \ + atomic_var.stderr.exp-with-atomic-builtins \ + atomic_var.stderr.exp-without-atomic-builtins \ atomic_var.vgtest \ drd_bitmap_test.stderr.exp \ drd_bitmap_test.stdout.exp \ |
|
From: <sv...@va...> - 2008-07-29 15:21:10
|
Author: bart Date: 2008-07-29 16:21:17 +0100 (Tue, 29 Jul 2008) New Revision: 8472 Log: Removed duplicate expected output file. Removed: trunk/drd/tests/atomic_var.stderr.exp Deleted: trunk/drd/tests/atomic_var.stderr.exp =================================================================== --- trunk/drd/tests/atomic_var.stderr.exp 2008-07-29 13:01:16 UTC (rev 8471) +++ trunk/drd/tests/atomic_var.stderr.exp 2008-07-29 15:21:17 UTC (rev 8472) @@ -1,14 +0,0 @@ - -Start of test. -Thread 2: -Conflicting load by thread 2/3 at 0x........ size 4 - at 0x........: thread_func_2 (atomic_var.c:?) - by 0x........: vg_thread_wrapper (drd_pthread_intercepts.c:?) - by 0x........: (within libpthread-?.?.so) - by 0x........: clone (in /...libc...) -Location 0x........ is 0 bytes inside local var "s_y" -declared at atomic_var.c:32, in frame #? of thread 2 -y = 1 -Test finished. - -ERROR SUMMARY: 1 errors from 1 contexts (suppressed: 0 from 0) |
|
From: <sv...@va...> - 2008-07-29 13:01:13
|
Author: bart
Date: 2008-07-29 14:01:16 +0100 (Tue, 29 Jul 2008)
New Revision: 8471
Log:
Added suppression pattern for Qt4.0/4.1.
Modified:
trunk/glibc-2.X-drd.supp
Modified: trunk/glibc-2.X-drd.supp
===================================================================
--- trunk/glibc-2.X-drd.supp 2008-07-29 12:06:57 UTC (rev 8470)
+++ trunk/glibc-2.X-drd.supp 2008-07-29 13:01:16 UTC (rev 8471)
@@ -401,6 +401,13 @@
fun:g_private_set_posix_impl
}
{
+ libQtCore-4.0/4.1-Q_GLOBAL_STATIC-connectionList
+ drd:ConflictingAccess
+ obj:/usr/lib*/libQtCore.so.4.*
+ fun:_ZN11QMetaObject8activateEP7QObjectiiPPv
+ fun:_ZN11QMetaObject8activateEP7QObjectPKS_iPPv
+}
+{
libQtCore-QObjectPrivate::clearGuards(QObject*)
drd:ConflictingAccess
fun:_ZN14QReadWriteLock12lockForWriteEv
|
|
From: <sv...@va...> - 2008-07-29 12:06:52
|
Author: bart Date: 2008-07-29 13:06:57 +0100 (Tue, 29 Jul 2008) New Revision: 8470 Log: Added expected output for comiler versions without support for built-in atomic operations. Added: trunk/drd/tests/atomic_var.stderr.exp-with-atomic-builtins trunk/drd/tests/atomic_var.stderr.exp-without-atomic-builtins Copied: trunk/drd/tests/atomic_var.stderr.exp-with-atomic-builtins (from rev 8469, trunk/drd/tests/atomic_var.stderr.exp) =================================================================== --- trunk/drd/tests/atomic_var.stderr.exp-with-atomic-builtins (rev 0) +++ trunk/drd/tests/atomic_var.stderr.exp-with-atomic-builtins 2008-07-29 12:06:57 UTC (rev 8470) @@ -0,0 +1,14 @@ + +Start of test. +Thread 2: +Conflicting load by thread 2/3 at 0x........ size 4 + at 0x........: thread_func_2 (atomic_var.c:?) + by 0x........: vg_thread_wrapper (drd_pthread_intercepts.c:?) + by 0x........: (within libpthread-?.?.so) + by 0x........: clone (in /...libc...) +Location 0x........ is 0 bytes inside local var "s_y" +declared at atomic_var.c:32, in frame #? of thread 2 +y = 1 +Test finished. + +ERROR SUMMARY: 1 errors from 1 contexts (suppressed: 0 from 0) Added: trunk/drd/tests/atomic_var.stderr.exp-without-atomic-builtins =================================================================== --- trunk/drd/tests/atomic_var.stderr.exp-without-atomic-builtins (rev 0) +++ trunk/drd/tests/atomic_var.stderr.exp-without-atomic-builtins 2008-07-29 12:06:57 UTC (rev 8470) @@ -0,0 +1,4 @@ + +Sorry, but your compiler does not have built-in support for atomic operations. + +ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0) |
|
From: MoJiong Q. <qm...@ho...> - 2008-07-29 10:16:02
|
> How general will your record/replay tool be ? Are you aware that not> only system calls but also I/O instructions like rdtsc, inb, outb,> inw, outw have to be recorded ? And the result of loads and stores to> memory-mapped address ranges will have to be recorded too.> Yes, all the things you mentioned are hard to be recorded. Besides, shared memory with other process is also a problem. These difficulities may limit the usages of syscall-based record/replay. However, some of them could be solved since Valgrind takes full control of client program, I think. Sensitive instructions like rdtsc and I/O instructions could be specially treated and instrumented by Valgrind; Memory-mapped address ranges without MAP_SHARED flag could be wholly logged down and saved as a file for replay, though performance is an issue. But shared memory is a big problem. Any comments or any suggestions are welcome. They will help me a lot:) Thanks, Mojiong _________________________________________________________________ News, entertainment and everything you care about at Live.com. Get it now! http://www.live.com/getstarted.aspx |
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From: <sv...@va...> - 2008-07-29 09:48:19
|
Author: sewardj
Date: 2008-07-29 10:48:26 +0100 (Tue, 29 Jul 2008)
New Revision: 1859
Log:
Handle Iop_ReinterpF32asI32, as needed for exp-ptrcheck.
Modified:
trunk/priv/host-amd64/isel.c
Modified: trunk/priv/host-amd64/isel.c
===================================================================
--- trunk/priv/host-amd64/isel.c 2008-07-29 09:47:21 UTC (rev 1858)
+++ trunk/priv/host-amd64/isel.c 2008-07-29 09:48:26 UTC (rev 1859)
@@ -1607,6 +1607,20 @@
return dst;
}
+ /* ReinterpF32asI32(e) */
+ /* Given an IEEE754 single, produce an I64 with the same bit
+ pattern in the lower half. */
+ case Iop_ReinterpF32asI32: {
+ AMD64AMode* m8_rsp = AMD64AMode_IR(-8, hregAMD64_RSP());
+ HReg dst = newVRegI(env);
+ HReg src = iselFltExpr(env, e->Iex.Unop.arg);
+ /* paranoia */
+ set_SSE_rounding_default(env);
+ addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 4, src, m8_rsp));
+ addInstr(env, AMD64Instr_LoadEX(4, False/*unsigned*/, m8_rsp, dst ));
+ return dst;
+ }
+
case Iop_16to8:
case Iop_32to8:
case Iop_64to8:
|
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From: <sv...@va...> - 2008-07-29 09:47:19
|
Author: sewardj
Date: 2008-07-29 10:47:21 +0100 (Tue, 29 Jul 2008)
New Revision: 1858
Log:
Minor printing changes.
Modified:
trunk/priv/ir/irdefs.c
Modified: trunk/priv/ir/irdefs.c
===================================================================
--- trunk/priv/ir/irdefs.c 2008-06-30 10:31:47 UTC (rev 1857)
+++ trunk/priv/ir/irdefs.c 2008-07-29 09:47:21 UTC (rev 1858)
@@ -301,16 +301,16 @@
case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
- case Iop_I32UtoFx4: vex_printf("Iop_I32UtoFx4"); return;
- case Iop_I32StoFx4: vex_printf("Iop_I32StoFx4"); return;
+ case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return;
+ case Iop_I32StoFx4: vex_printf("I32StoFx4"); return;
- case Iop_QFtoI32Ux4_RZ: vex_printf("Iop_QFtoI32Ux4_RZ"); return;
- case Iop_QFtoI32Sx4_RZ: vex_printf("Iop_QFtoI32Sx4_RZ"); return;
+ case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return;
+ case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return;
- case Iop_RoundF32x4_RM: vex_printf("Iop_RoundF32x4_RM"); return;
- case Iop_RoundF32x4_RP: vex_printf("Iop_RoundF32x4_RP"); return;
- case Iop_RoundF32x4_RN: vex_printf("Iop_RoundF32x4_RN"); return;
- case Iop_RoundF32x4_RZ: vex_printf("Iop_RoundF32x4_RZ"); return;
+ case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
+ case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
+ case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
+ case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
case Iop_Add8x8: vex_printf("Add8x8"); return;
case Iop_Add16x4: vex_printf("Add16x4"); return;
@@ -361,7 +361,7 @@
case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
- case Iop_Perm8x8: vex_printf("Iop_Perm8x8"); return;
+ case Iop_Perm8x8: vex_printf("Perm8x8"); return;
case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
|
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From: <sv...@va...> - 2008-07-29 09:44:44
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Author: sewardj
Date: 2008-07-29 10:44:52 +0100 (Tue, 29 Jul 2008)
New Revision: 8469
Log:
Add a followup comment to the changes in r8454, which made memcheck's
client realloc function use an always-move strategy.
Modified:
trunk/memcheck/mc_malloc_wrappers.c
Modified: trunk/memcheck/mc_malloc_wrappers.c
===================================================================
--- trunk/memcheck/mc_malloc_wrappers.c 2008-07-29 09:24:29 UTC (rev 8468)
+++ trunk/memcheck/mc_malloc_wrappers.c 2008-07-29 09:44:52 UTC (rev 8469)
@@ -372,6 +372,14 @@
old_szB = mc->szB;
+ /* In all cases, even when the new size is smaller or unchanged, we
+ reallocate and copy the contents, and make the old block
+ inaccessible. This is so as to guarantee to catch all cases of
+ accesses via the old address after reallocation, regardless of
+ the change in size. (Of course the ability to detect accesses
+ to the old block also depends on the size of the freed blocks
+ queue). */
+
if (new_szB <= old_szB) {
/* new size is smaller or the same */
Addr a_new;
|
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From: <sv...@va...> - 2008-07-29 09:24:22
|
Author: bart Date: 2008-07-29 10:24:29 +0100 (Tue, 29 Jul 2008) New Revision: 8468 Log: Reverted commit 8435. This removes splash2-modified.patch from the repository (because no information about the copyright status of this patch is available). Added: branches/DRDDEV/drd/scripts/download-and-build-splash2.in Removed: branches/DRDDEV/drd/scripts/download-and-build-splash2 branches/DRDDEV/drd/scripts/splash2.patch.in Modified: branches/DRDDEV/configure.in [... diff too large to include ...] |
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From: Bart V. A. <bar...@gm...> - 2008-07-29 09:20:21
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On Tue, Jul 29, 2008 at 10:14 AM, Julian Seward <js...@ac...> wrote: > On Monday 28 July 2008 16:15, Bart Van Assche wrote: >> Some DRD regression tests link against the Qt4 library, and that is >> why there is a test for Qt4 in Valgrind's configure.in. That test >> currently uses built-in autoconf macro's like AC_TRY_COMPILE(). This >> is a rather cumbersome way to find out e.g. the path of Qt4 include >> files. Would it be OK to rewrite this test using the autoconf macro's >> provided by pkg-config, e.g. PKG_CHECK_EXISTS() ? This would add an >> extra requirement however when building Valgrind, and I'm not sure >> where to document this. > > I prefer not; we spent already a lot of time and effort getting rid of > dependencies of various kinds. > > How bad does the cumbersome code look? Is it the Qt4 checking stuff > in configure.in r8465, or some other un-committed changes you have? Writing configure tests for detecting e.g. the Qt4 package compared to using pkg-config is something like reinventing the wheel. E.g. for some distro's the Qt4 include path is /usr/include, for other distro's it is /usr/include/qt4 and maybe there exist even other choices. I don't think there even exists a clean way to find out from the configure script any path a distro could come up except by using pkg-config. Additionally, sometimes additional compiler flags have to be passed to the compiler for compiling Qt4 code. Trying to figure out these flags from the configure script would be more duplication of information already known by pkg-config. As an example, the relevant info for Qt4 is as follows: $ pkg-config --cflags QtCore -DQT_SHARED -I/usr/include/QtCore $ pkg-config --libs QtCore -lQtCore -lz -lm -lrt -lpthread -ldl Bart. |
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From: <sv...@va...> - 2008-07-29 08:35:35
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Author: bart Date: 2008-07-29 09:35:44 +0100 (Tue, 29 Jul 2008) New Revision: 8467 Log: Changed address bitmap size from 2**14 to 2**12 items. Modified: branches/DRDDEV/drd/drd_bitmap.h Modified: branches/DRDDEV/drd/drd_bitmap.h =================================================================== --- branches/DRDDEV/drd/drd_bitmap.h 2008-07-29 08:30:38 UTC (rev 8466) +++ branches/DRDDEV/drd/drd_bitmap.h 2008-07-29 08:35:44 UTC (rev 8467) @@ -63,7 +63,7 @@ /** Number of bits assigned to the least significant component of an address. */ -#define ADDR_LSB_BITS 14 +#define ADDR_LSB_BITS 12 /** Mask that has to be applied to an address of type Addr in order to * compute the least significant part of an address split, after having |
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From: <sv...@va...> - 2008-07-29 08:30:32
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Author: bart
Date: 2008-07-29 09:30:38 +0100 (Tue, 29 Jul 2008)
New Revision: 8466
Log:
Minor optimizations.
Modified:
branches/DRDDEV/drd/drd_thread.c
Modified: branches/DRDDEV/drd/drd_thread.c
===================================================================
--- branches/DRDDEV/drd/drd_thread.c 2008-07-28 14:55:38 UTC (rev 8465)
+++ branches/DRDDEV/drd/drd_thread.c 2008-07-29 08:30:38 UTC (rev 8466)
@@ -784,10 +784,11 @@
Segment* q;
for (q = s_threadinfo[i].last; q; q = q->prev)
{
- // Since q iterates over the segments of thread i in order of
- // decreasing vector clocks, if q->vc <= p->vc, then
- // q->next->vc <= p->vc will also hold. Hence, break out of the
- // loop once this condition is met.
+ /* Since q iterates over the segments of thread i in order of
+ * decreasing vector clocks, if q->vc <= p->vc, then
+ * q->next->vc <= p->vc will also hold. Hence, break out of the
+ * loop once this condition is met.
+ */
if (vc_lte(&q->vc, &p->vc))
break;
if (! vc_lte(&p->vc, &q->vc))
@@ -871,10 +872,19 @@
const Segment* q;
for (q = s_threadinfo[j].last; q; q = q->prev)
{
- const struct bitmap2* const q_bm2 = bm2_lookup(q->bm, a1);
- if (q_bm2 && ! vc_lte(&q->vc, &p->vc) && ! vc_lte(&p->vc, &q->vc))
+ const struct bitmap2* q_bm2;
+
+ /* Since q iterates over the segments of thread i in order of
+ * decreasing vector clocks, if q->vc <= p->vc, then
+ * q->next->vc <= p->vc will also hold. Hence, break out of the
+ * loop once this condition is met.
+ */
+ if (vc_lte(&q->vc, &p->vc))
+ break;
+
+ if ((q_bm2 = bm2_lookup(q->bm, a1)) && ! vc_lte(&p->vc, &q->vc))
{
- if (s_trace_conflict_set)
+ if (UNLIKELY(s_trace_conflict_set))
{
char msg[256];
VG_(snprintf)(msg, sizeof(msg),
@@ -888,7 +898,7 @@
}
else
{
- if (s_trace_conflict_set)
+ if (UNLIKELY(s_trace_conflict_set))
{
char msg[256];
VG_(snprintf)(msg, sizeof(msg),
|
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From: Julian S. <js...@ac...> - 2008-07-29 08:23:10
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On Monday 28 July 2008 16:15, Bart Van Assche wrote: > Some DRD regression tests link against the Qt4 library, and that is > why there is a test for Qt4 in Valgrind's configure.in. That test > currently uses built-in autoconf macro's like AC_TRY_COMPILE(). This > is a rather cumbersome way to find out e.g. the path of Qt4 include > files. Would it be OK to rewrite this test using the autoconf macro's > provided by pkg-config, e.g. PKG_CHECK_EXISTS() ? This would add an > extra requirement however when building Valgrind, and I'm not sure > where to document this. I prefer not; we spent already a lot of time and effort getting rid of dependencies of various kinds. How bad does the cumbersome code look? Is it the Qt4 checking stuff in configure.in r8465, or some other un-committed changes you have? J |
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From: Julian S. <js...@ac...> - 2008-07-29 08:19:22
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> but I'm unable to be sure until sometime later. Currently I'm > handling this with some custom error code where I grab the ExecContext > when I think the error might occur and use it later when reporting the > error. That doesn't seem like a bad approach. I presume you mean, your tool collects whatever data is relevant, and only calls VG_(record_error) when it is sure an error has occurred. Yes? J |
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From: Julian S. <js...@ac...> - 2008-07-29 08:17:52
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> > That will not help me, I don't need a hash table. I need a data structure > > which will keep all the allocations sorted (so it has to be an ordered list) > > and I need fast searching within that list (for that, skip lists are the > > best). Otherwise, I have tried implementing a simple linked list (in which i > > can search with linear complexity) and it takes hours to run a program under > > valgrind. Skip lists have a complexity of O( log(n) ). > > Thanks for the data structure lesson. I still suggest you look at OSet. I agree. There is no need to reimplement the existing data structure code. In any case, your code simply has a segmentation fault; there is no "thread error": --9227-- VALGRIND INTERNAL ERROR: Valgrind received a signal 11 (SIGSEGV) - exiting --9227-- si_code=1; Faulting address: 0x0; sp: 0x6279AEDC valgrind: the 'impossible' happened: Killed by fatal signal ==9227== at 0x3800093A: add_node (ms_main.c:1548) ==9227== by 0x380028F8: new_block (ms_main.c:1615) ==9227== by 0x3802290F: vgPlain_scheduler (scheduler.c:1269) ==9227== by 0x38036868: run_a_thread_NORETURN (syswrap-linux.c:89) J |
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From: Bart V. A. <bar...@gm...> - 2008-07-29 06:26:48
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On Thu, Jul 24, 2008 at 3:39 AM, MoJiong Qiu <qm...@ho...> wrote: > I have spent some time implementing a prototype of record and replay in > the valgrind core based on intercepting and recording syscall results and > playing back their results. So far, I have only wrapped a dozen or so > syscalls and valgrind only records and replays small single threaded > programs. I am able to record execution for these small programs with this > modified valgrind core with no analysis, and have the core replay the > execution while turning on instrumentation and analysis (I turned on > cachegrind while replaying). More complex client programs can be supported > as more syscalls are recorded and replayed. It doesn't currently support > multithreading or signal delivery, though I expect recording and replaying > these should be doable as well. How general will your record/replay tool be ? Are you aware that not only system calls but also I/O instructions like rdtsc, inb, outb, inw, outw have to be recorded ? And the result of loads and stores to memory-mapped address ranges will have to be recorded too. Bart. |
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From: Tom H. <th...@cy...> - 2008-07-29 03:04:19
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Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2008-07-29 03:15:01 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 345 tests, 60 stderr failures, 1 stdout failure, 29 post failures == memcheck/tests/file_locking (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/long_namespace_xml (stderr) memcheck/tests/malloc_free_fill (stderr) memcheck/tests/origin1-yes (stderr) memcheck/tests/origin4-many (stderr) memcheck/tests/origin5-bz2 (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_changes (stderr) memcheck/tests/varinfo1 (stderr) memcheck/tests/varinfo2 (stderr) memcheck/tests/varinfo3 (stderr) memcheck/tests/varinfo4 (stderr) memcheck/tests/varinfo5 (stderr) memcheck/tests/varinfo6 (stderr) memcheck/tests/x86/bug152022 (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/xor-undef-x86 (stderr) memcheck/tests/xml1 (stderr) massif/tests/alloc-fns-A (post) massif/tests/alloc-fns-B (post) massif/tests/basic (post) massif/tests/basic2 (post) massif/tests/big-alloc (post) massif/tests/culling1 (stderr) massif/tests/culling2 (stderr) massif/tests/custom_alloc (post) massif/tests/deep-A (post) massif/tests/deep-B (stderr) massif/tests/deep-B (post) massif/tests/deep-C (stderr) massif/tests/deep-C (post) massif/tests/deep-D (post) massif/tests/ignoring (post) massif/tests/insig (post) massif/tests/long-names (post) massif/tests/long-time (post) massif/tests/new-cpp (post) massif/tests/null (post) massif/tests/one (post) massif/tests/overloaded-new (post) massif/tests/peak (post) massif/tests/peak2 (stderr) massif/tests/peak2 (post) massif/tests/realloc (stderr) massif/tests/realloc (post) massif/tests/thresholds_0_0 (post) massif/tests/thresholds_0_10 (post) massif/tests/thresholds_10_0 (post) massif/tests/thresholds_10_10 (post) massif/tests/thresholds_5_0 (post) massif/tests/thresholds_5_10 (post) massif/tests/zero1 (post) massif/tests/zero2 (post) none/tests/blockfault (stderr) none/tests/mremap2 (stdout) none/tests/shell (stderr) none/tests/shell_valid1 (stderr) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) helgrind/tests/hg01_all_ok (stderr) helgrind/tests/hg02_deadlock (stderr) helgrind/tests/hg03_inherit (stderr) helgrind/tests/hg04_race (stderr) helgrind/tests/hg05_race2 (stderr) helgrind/tests/hg06_readshared (stderr) helgrind/tests/tc01_simple_race (stderr) helgrind/tests/tc02_simple_tls (stderr) helgrind/tests/tc03_re_excl (stderr) helgrind/tests/tc05_simple_race (stderr) helgrind/tests/tc06_two_races (stderr) helgrind/tests/tc07_hbl1 (stderr) helgrind/tests/tc08_hbl2 (stderr) helgrind/tests/tc09_bad_unlock (stderr) helgrind/tests/tc11_XCHG (stderr) helgrind/tests/tc12_rwl_trivial (stderr) helgrind/tests/tc14_laog_dinphils (stderr) helgrind/tests/tc16_byterace (stderr) helgrind/tests/tc17_sembar (stderr) helgrind/tests/tc18_semabuse (stderr) helgrind/tests/tc19_shadowmem (stderr) helgrind/tests/tc20_verifywrap (stderr) helgrind/tests/tc21_pthonce (stderr) helgrind/tests/tc22_exit_w_lock (stderr) helgrind/tests/tc23_bogus_condwait (stderr) helgrind/tests/tc24_nonzero_sem (stderr) |