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From: <js...@ac...> - 2006-09-30 13:09:14
|
Nightly build on minnie ( SuSE 10.0, ppc32 ) started at 2006-09-30 09:00:02 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 207 tests, 10 stderr failures, 7 stdout failures, 0 posttest failures == memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_changes (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) none/tests/ppc32/jm-int (stdout) none/tests/ppc32/round (stdout) none/tests/ppc32/round (stderr) none/tests/ppc32/test_fx (stdout) none/tests/ppc32/test_fx (stderr) none/tests/ppc32/test_gx (stdout) |
|
From: <sv...@va...> - 2006-09-30 11:36:57
|
Author: sewardj
Date: 2006-09-30 12:36:50 +0100 (Sat, 30 Sep 2006)
New Revision: 6100
Log:
Code for reading XCOFF32 and XCOFF64 symbol tables and line numbers.
Added:
branches/AIX5/coregrind/m_debuginfo/priv_readxcoff.h
branches/AIX5/coregrind/m_debuginfo/readxcoff.c
Added: branches/AIX5/coregrind/m_debuginfo/priv_readxcoff.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_debuginfo/priv_readxcoff.h =
(rev 0)
+++ branches/AIX5/coregrind/m_debuginfo/priv_readxcoff.h 2006-09-30 11:36=
:50 UTC (rev 6100)
@@ -0,0 +1,46 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Read XCOFF format debug info. priv_readxcoff.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __PRIV_READXCOFF_H
+#define __PRIV_READXCOFF_H
+
+
+/* Read whatever info we can from an XCOFF object file. */
+extern
+Bool ML_(read_xcoff_debug_info) ( struct _SegInfo* si,
+ Addr data_addr,
+ SSizeT data_len,
+ Bool is_mainexe );
+
+#endif /* ndef __PRIV_READXCOFF_H */
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/coregrind/m_debuginfo/readxcoff.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_debuginfo/readxcoff.c =
(rev 0)
+++ branches/AIX5/coregrind/m_debuginfo/readxcoff.c 2006-09-30 11:36:50 U=
TC (rev 6100)
@@ -0,0 +1,2680 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Read XCOFF debug info. readxcoff.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* This file reads XCOFF symbol tables and debug info.
+ Known limitations:
+
+ * only one text section per object file is handled
+
+ * C_BINCL/C_EINCL handling is wrong, so functions defined in files
+ included from other files will end up with the wrong file name
+ and possibly line numbers. Fixable.
+
+ * The line number reader leans heavily on the fact that the generic
+ line number canonicaliser in storage.c truncates overlapping
+ ranges.
+*/
+
+#include "pub_core_basics.h"
+#include "pub_core_vki.h" /* struct vki_stat et al */
+#include "pub_core_debuginfo.h"
+#include "pub_core_libcbase.h"
+#include "pub_core_libcassert.h"
+#include "pub_core_libcprint.h"
+#include "pub_core_mallocfree.h"
+#include "pub_core_libcfile.h" /* stat, open, close */
+#include "pub_core_aspacemgr.h" /* for mmaping debuginfo files */
+#include "pub_core_options.h" /* VG_(clo_trace_symtab) */
+#include "priv_storage.h"
+#include "priv_readxcoff.h" /* self */
+
+/* --- !!! --- EXTERNAL HEADERS start --- !!! --- */
+#if defined(VGP_ppc32_aix5)
+# define __XCOFF32__ 1
+# undef __XCOFF64__
+#elif defined(VGP_ppc64_aix5)
+# define __XCOFF64__ 1
+# undef __XCOFF32__
+#else
+# error "This file should only be compiled on AIX"
+#endif
+#include <xcoff.h>
+
+#undef __AR_SMALL__
+#define __AR_BIG__ 1
+#include <ar.h>
+/* --- !!! --- EXTERNAL HEADERS end --- !!! --- */
+
+/* Debug stuff */
+#define SHOW_LD_STRTAB 1 /* loader string tables */
+#define SHOW_LD_SYMTAB 1 /* loader symbol table */
+#define SHOW_LD_RELTAB 1 /* loader reloc table */
+#define SHOW_STRTAB 1 /* main string table */
+#define SHOW_SYMS_P1 1 /* P1: find text sym starts */
+#define SHOW_SYMS_P2 1 /* P2: find text sym ends */
+#define SHOW_SYMS_P3 1 /* P3: src filenames & fn start/end line #s *=
/
+#define SHOW_SYMS_P4 1 /* P4: line numbers */
+#define SHOW_SYMS_P5 1 /* P5: find TOC pointers */
+#define SHOW_SYMS_P6 1 /* P6: finalise symbol info */
+
+#define SHOW_AR_DETAILS 0 /* show details of .a file internals */
+
+#define SHOW VG_(clo_trace_symtab)
+
+/* A small stack of filenames is maintained for dealing
+ with BINCL/EINCL symbol table entries. */
+
+#define N_FILENAME_STACK 16
+
+/* Phase 5 (find TOC pointers) has two implementations, the official
+ version, which involves reading the data segment symbols, and the
+ kludgey version, which basically scans the (actual loaded) data
+ segment to find structs which look like function descriptors. */
+
+#if 1
+# undef OFFICIAL_PHASE5
+#else
+# define OFFICIAL_PHASE5 1
+#endif
+
+/*------------------------------------------------------------*/
+/*--- Read XCOFF format debug info. ---*/
+/*------------------------------------------------------------*/
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+// priv
+struct _XArray {
+ void* (*alloc) ( SizeT );
+ void (*free) ( void* );
+ Word (*cmpFn) ( void*, void* );
+ Word elemSzB;
+ void* arr;
+ Word usedsize;
+ Word totsize;
+ Bool sorted;
+};
+
+// public
+typedef void XArray;
+
+/* Create new XArray, using given allocation and free function, and
+ for elements of the specified size. Alloc fn must not fail. */
+extern=20
+XArray* newXA ( void*(*alloc_fn)(SizeT),=20
+ void(*free_fn)(void*),
+ Word elemSzB );
+
+/* Free all memory associated with an XArray. */
+void deleteXA ( XArray* );
+
+/* Set the comparison function for this XArray. */
+void setCmpFnXA ( XArray*, Word (*compar)(void*,void*) );
+
+/* Add an element to an XArray. Element is copied into the XArray. */
+void addToXA ( XArray*, void* elem );
+
+/* Sort an XArray using its comparison function, if set; else bomb. */
+void sortXA ( XArray* );
+
+/* Lookup (by binary search) 'key' in the array. Set *first to be the
+ index of the first, and *last to be the index of the last matching
+ value found. If any values are found, return True, else return
+ False, and don't change *first or *last. Bomb if the array is not
+ sorted. */
+Bool lookupXA ( XArray*, void* key, Word* first, Word* last );
+
+/* How big is the XArray now? */
+Word sizeXA ( XArray* );
+
+/* Index into the XArray. */
+void* indexXA ( XArray*, Word );
+
+/* Drop the last n elements of an XArray. */
+void dropTailXA ( XArray*, Word );
+
+///////////////////////
+
+XArray* newXA ( void*(*alloc_fn)(SizeT),=20
+ void(*free_fn)(void*),
+ Word elemSzB )
+{
+ struct _XArray* xa;
+ vg_assert(alloc_fn);
+ vg_assert(free_fn);
+ vg_assert(elemSzB > 0);
+ xa =3D alloc_fn( sizeof(struct _XArray) );
+ vg_assert(xa);
+ xa->alloc =3D alloc_fn;
+ xa->free =3D free_fn;
+ xa->cmpFn =3D NULL;
+ xa->elemSzB =3D elemSzB;
+ xa->usedsize =3D 0;
+ xa->totsize =3D 0;
+ xa->sorted =3D False;
+ xa->arr =3D NULL;
+ return xa;
+}
+
+void deleteXA ( XArray* xao )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(xa->free);
+ if (xa->arr);
+ xa->free(xa->arr);
+ xa->free(xa);
+}
+
+void setCmpFnXA ( XArray* xao, Word (*compar)(void*,void*) )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(compar);
+ xa->cmpFn =3D compar;
+ xa->sorted =3D False;
+}
+
+void addToXA ( XArray* xao, void* elem )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(elem);
+ vg_assert(xa->totsize >=3D 0);
+ vg_assert(xa->usedsize >=3D 0 && xa->usedsize <=3D xa->totsize);
+ if (xa->usedsize =3D=3D xa->totsize) {
+ void* tmp;
+ Word newsz;
+ if (xa->totsize =3D=3D 0)
+ vg_assert(!xa->arr);
+ if (xa->totsize > 0)
+ vg_assert(xa->arr);
+ newsz =3D xa->totsize=3D=3D0 ? 2 : 2 * xa->totsize;
+ if (0)=20
+ VG_(printf)("addToXA: increasing from %ld to %ld\n",=20
+ xa->totsize, newsz);
+ tmp =3D xa->alloc(newsz * xa->elemSzB);
+ vg_assert(tmp);
+ if (xa->usedsize > 0)=20
+ VG_(memcpy)(tmp, xa->arr, xa->usedsize * xa->elemSzB);
+ if (xa->arr)
+ xa->free(xa->arr);
+ xa->arr =3D tmp;
+ xa->totsize =3D newsz;
+ }
+ vg_assert(xa->usedsize < xa->totsize);
+ vg_assert(xa->arr);
+ VG_(memcpy)( ((UChar*)xa->arr) + xa->usedsize * xa->elemSzB,
+ elem, xa->elemSzB );
+ xa->usedsize++;
+ xa->sorted =3D False;
+}
+
+// Generic shell sort. Like stdlib.h's qsort().
+static void ssort( void* base, Word nmemb, Word size,
+ Word (*compar)(void*, void*) )
+{
+ Int incs[14] =3D { 1, 4, 13, 40, 121, 364, 1093, 3280,
+ 9841, 29524, 88573, 265720,
+ 797161, 2391484 };
+ Int lo =3D 0;
+ Int hi =3D nmemb-1;
+ Int i, j, h, bigN, hp;
+
+ bigN =3D hi - lo + 1; if (bigN < 2) return;
+ hp =3D 0; while (hp < 14 && incs[hp] < bigN) hp++; hp--;
+
+ #define SORT \
+ for ( ; hp >=3D 0; hp--) { \
+ h =3D incs[hp]; \
+ for (i =3D lo + h; i <=3D hi; i++) { \
+ ASSIGN(v,0, a,i); \
+ j =3D i; \
+ while (COMPAR(a,(j-h), v,0) > 0) { \
+ ASSIGN(a,j, a,(j-h)); \
+ j =3D j - h; \
+ if (j <=3D (lo + h - 1)) break; \
+ } \
+ ASSIGN(a,j, v,0); \
+ } \
+ }
+
+ // General case
+ {
+ char* a =3D base;
+ char v[size]; // will be at least 'size' bytes
+
+ #define ASSIGN(dst, dsti, src, srci) \
+ VG_(memcpy)( &dst[size*(dsti)], &src[size*(srci)], size );
+
+ #define COMPAR(dst, dsti, src, srci) \
+ compar( &dst[size*(dsti)], &src[size*(srci)] )
+
+ SORT;
+
+ #undef ASSIGN
+ #undef COMPAR
+ }
+ #undef SORT
+}
+
+void sortXA ( XArray* xao )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(xa->cmpFn);
+ ssort( xa->arr, xa->usedsize, xa->elemSzB, xa->cmpFn );
+ xa->sorted =3D True;
+}
+
+Bool lookupXA ( XArray* xao, void* key, Word* first, Word* last )
+{
+ Word lo, mid, hi, cres;
+ void* midv;
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(xa->cmpFn);
+ vg_assert(xa->sorted);
+ lo =3D 0;
+ hi =3D xa->usedsize-1;
+ while (True) {
+ /* current unsearched space is from lo to hi, inclusive. */
+ if (lo > hi) return False; /* not found */
+ mid =3D (lo + hi) / 2;
+ midv =3D indexXA( xa, mid );
+ cres =3D xa->cmpFn( key, midv );
+ if (cres < 0) { hi =3D mid-1; continue; }
+ if (cres > 0) { lo =3D mid+1; continue; }
+ /* Found it, at mid. See how far we can expand this. */
+ vg_assert(xa->cmpFn( key, indexXA(xa, lo) ) >=3D 0);
+ vg_assert(xa->cmpFn( key, indexXA(xa, hi) ) <=3D 0);
+ *first =3D *last =3D mid;
+ while (*first > 0=20
+ && 0 =3D=3D xa->cmpFn( key, indexXA(xa, (*first)-1)))
+ (*first)--;
+ while (*last < xa->usedsize-1
+ && 0 =3D=3D xa->cmpFn( key, indexXA(xa, (*last)+1)))
+ (*last)++;
+ return True;
+ }
+}
+
+Word sizeXA ( XArray* xao )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ return xa->usedsize;
+}
+
+void* indexXA ( XArray* xao, Word n )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(n >=3D 0);
+ vg_assert(n < xa->usedsize);
+ return ((char*)xa->arr) + n * xa->elemSzB;
+}
+
+void dropTailXA ( XArray* xao, Word n )
+{
+ struct _XArray* xa =3D (struct _XArray*)xao;
+ vg_assert(xa);
+ vg_assert(n >=3D 0);
+ vg_assert(n <=3D xa->usedsize);
+ xa->usedsize -=3D n;
+}
+
+/////////////////////////////////////////////////////////////////////
+/////////////////////////////////////////////////////////////////////
+
+/* COFF uses a strange way to represent symbol names. A symbol is an
+ eight-byte field.
+
+ In 32-bit mode: if the first four bytes are zero, then the second
+ four bytes give the offset into the string table where the string
+ really is. Otherwise, the whole 8-byte thing is itself the name.
+
+ In 64-bit mode: a four-byte field at offset 8 is always interpreted
+ as an offset into the string table.
+
+ For a symbol of length 8, in 32-bit mode, there is no obvious way
+ to zero-terminate it. One solution is to copy the name into
+ dynamically allocated memory, but that complicates storage
+ management.
+
+ An alternative solution, used here, is to represent a name as a
+ (data, length) pair instead of the traditional zero-terminated
+ string. Such a pair can be constructed for any XCOFF symbol name,
+ and has the advantages that (1) no dynamic memory is required, and
+ (2) the name is guaranteed to be accessible as long as the object
+ image is mapped in.
+
+ What the .vec points at must not be modified; if you want to do
+ that, copy it elsewhere first.
+*/
+
+typedef
+ struct {
+ UChar* vec; /* the text of the name */
+ UInt len; /* length of the text */
+ }
+ Name;
+
+static Name maybeDerefStrTab( SYMENT* sym,
+ UChar* oi_strtab, UWord oi_n_strtab)
+{
+ Name res;
+ static UChar* bogus=20
+ =3D (UChar*)"**_Error_Dereferencing_COFF_String_Table_**";
+ UChar* bytes =3D (UChar*)sym;
+
+# if defined(VGP_ppc32_aix5)
+ if (bytes[0]=3D=3D0 && bytes[1]=3D=3D0 && bytes[2]=3D=3D0 && bytes[3]=
=3D=3D0) {
+ UInt off =3D *(UInt*)&bytes[4];
+ if (oi_strtab && oi_n_strtab > 0 && off < oi_n_strtab) {
+ res.vec =3D &oi_strtab[off];
+ res.len =3D VG_(strlen)(res.vec);
+ return res;
+ } else
+ goto bad;
+ } else {
+ Int i;
+ res.vec =3D bytes;
+ res.len =3D 8;
+ for (i =3D 0; i < 8; i++)
+ if (bytes[i] =3D=3D 0)
+ res.len--;
+ return res;
+ }
+
+# elif defined(VGP_ppc64_aix5)
+ ULong off =3D (ULong)( *(UInt*)&bytes[8] );
+ if (oi_strtab && oi_n_strtab > 0 && off < oi_n_strtab) {
+ res.vec =3D &oi_strtab[off];
+ res.len =3D VG_(strlen)(res.vec);
+ return res;
+ } else
+ goto bad;
+
+# else
+# error "Unknown platform"
+# endif
+
+ bad:
+ res.vec =3D bogus;
+ res.len =3D VG_(strlen)(bogus);
+ return res;
+}
+
+
+/* Similar scheme for extracting names from C_FILE auxiliary entries,
+ except that the 32-bit scheme appears to be always used, even for
+ XCOFF64. */
+
+static Name maybeDerefStrTab_fname ( UChar* bytes,
+ UChar* oi_strtab, UWord oi_n_strtab=
)
+{
+ Name res;
+ static UChar* bogus=20
+ =3D (UChar*)"**_Error_Dereferencing_COFF_String_Table_**";
+
+ if (bytes[0]=3D=3D0 && bytes[1]=3D=3D0 && bytes[2]=3D=3D0 && bytes[3]=
=3D=3D0) {
+ UInt off =3D *(UInt*)&bytes[4];
+ if (oi_strtab && oi_n_strtab > 0 && off < oi_n_strtab) {
+ res.vec =3D &oi_strtab[off];
+ res.len =3D VG_(strlen)(res.vec);
+ return res;
+ } else
+ goto bad;
+ } else {
+ Int i;
+ res.vec =3D bytes;
+ res.len =3D 8;
+ for (i =3D 0; i < 8; i++)
+ if (bytes[i] =3D=3D 0)
+ res.len--;
+ return res;
+ }
+
+ bad:
+ res.vec =3D bogus;
+ res.len =3D VG_(strlen)(bogus);
+ return res;
+}
+
+
+static Name mk_const_Name ( HChar* str )
+{
+ Name res;
+ res.vec =3D str;
+ res.len =3D VG_(strlen)(res.vec);
+ return res;
+}
+
+static Name mk_empty_Name ( void )
+{
+ Name res;
+ res.vec =3D "";
+ res.len =3D 0;
+ return res;
+}
+
+static Bool is_empty_Name ( Name name )
+{
+ return name.len =3D=3D 0;
+}
+
+static Bool eq_string_Name ( Name name, UChar* str )
+{
+ UInt i;
+ for (i =3D 0; i < name.len; i++) {
+ if (str[i] =3D=3D 0)
+ return False;
+ if (str[i] !=3D name.vec[i])
+ return False;
+ }
+ if (str[name.len] =3D=3D 0)
+ return True;
+ else
+ return False;
+}
+
+static Word cmp_Names ( Name n1, Name n2 )
+{
+ UInt i =3D 0;
+ while (1) {
+ vg_assert(i >=3D 0 && i <=3D n1.len);
+ vg_assert(i >=3D 0 && i <=3D n2.len);
+ if (i =3D=3D n1.len && i =3D=3D n2.len)
+ return 0;
+ if (i =3D=3D n1.len && i < n2.len)
+ return -1;
+ if (i < n1.len && i =3D=3D n2.len)
+ return 1;
+ if (n1.vec[i] < n2.vec[i])
+ return -1;
+ if (n1.vec[i] > n2.vec[i])
+ return 1;
+ i++;
+ }
+}
+
+static void print_Name ( Name name )
+{
+ UInt i;
+ for (i =3D 0; i < name.len; i++)
+ VG_(printf)("%c", name.vec[i]);
+}
+
+
+static UChar sanitiseChar ( UChar c )
+{
+ if (c < 32 || c > 127)
+ c =3D '?';
+ return c;
+}
+
+static HChar* name_of_filhdr_f_magic ( Int magic )
+{
+ switch (magic) {
+ case 0x01DF: return "xcoff32";
+ case 0x01EF: return "xcoff64-upto-aix43";
+ case 0x01F7: return "xcoff64-from-aix51";
+ default: return "unknown-xcoff-header-magic";
+ }
+}
+
+static HChar* name_of_scnhdr_s_flags ( Int flags )
+{
+ switch (flags & 0xFFFF) {
+ case STYP_REG: return "\"regular\"";
+ case STYP_PAD: return "\"padding\"";
+ case STYP_TEXT: return "text only";
+ case STYP_DATA: return "data only";
+ case STYP_BSS: return "bss only";
+ case STYP_EXCEPT: return "Exception";
+ case STYP_INFO: return "Comment";
+ case STYP_LOADER: return "Loader";
+ case STYP_DEBUG: return "Debug";
+ case STYP_TYPCHK: return "Typecheck";
+ case STYP_OVRFLO: return "Overflow";
+ default: return "unknown-section-header-name";
+ }
+}
+
+static HChar* name_of_syment_n_sclass ( Int sclass )
+{
+ static HChar buf[10];
+ switch (sclass) {
+ /* dbx ones (>=3D 0x80) */
+ case C_GSYM: return "gsym";
+ case C_LSYM: return "lsym";
+ case C_PSYM: return "psym";
+ case C_RSYM: return "rsym";
+ case C_RPSYM: return "rpsym";
+ case C_STSYM: return "stsym";
+ case C_DECL: return "decl";
+ case C_FUN: return "fun";
+ case C_BSTAT: return "bstat";
+ case C_ESTAT: return "estat";
+ /* non-dbx ones (< 0x80) */
+ case C_STAT: return "STAT";
+ case C_FILE: return "FILE";
+ case C_HIDEXT: return "HIDEXT";
+ case C_EXT: return "EXT";
+ case C_FCN: return "FCN";
+ case C_BINCL: return "BINCL";
+ case C_EINCL: return "EINCL";
+ case C_BLOCK: return "BLOCK";
+ case C_WEAKEXT: return "WEAKEXT";
+ default:
+ VG_(sprintf)(buf, "??%d??", sclass);
+ return buf;
+ }
+}
+
+typedef=20
+ struct {
+ Name name; /* symbol's name */
+ Addr first; /* first address; always known */
+ Addr last; /* last address; may be an overestimate */
+
+ Name fname; /* source file name, if known */
+ Int slnno; /* starting line #, or 0 if unknown */
+ Int elnno; /* ending line #, or 0 if unknown */
+
+ UWord r2value; /* what r2 should be for this fn (tocptr) */
+ Bool r2known; /* do we have a r2 value? */
+ }=20
+ XCoffSym;
+
+static void init_XCoffSym( XCoffSym* sym )
+{
+ sym->name =3D mk_empty_Name();
+ sym->first =3D 0;
+ sym->last =3D 0;
+ sym->fname =3D mk_empty_Name();
+ sym->slnno =3D 0;
+ sym->elnno =3D 0;
+ sym->r2known =3D False;
+ sym->r2value =3D False;
+}
+
+/* Compare XCoffSyms by their start address. */
+static Word cmp_XCoffSym_by_start ( void* v1, void* v2 )
+{
+ XCoffSym* s1 =3D (XCoffSym*)v1;
+ XCoffSym* s2 =3D (XCoffSym*)v2;
+ if (s1->first < s2->first) return -1;
+ if (s1->first > s2->first) return 1;
+ return 0;
+}
+
+/* Compare XCoffSyms by a slightly weaker ordering, returning zero
+ (equivalence) for any overlap, and -1 or 1 otherwise. */
+static Word cmp_XCoffSym_by_overlap ( void* v1, void* v2 )
+{
+ XCoffSym* s1 =3D (XCoffSym*)v1;
+ XCoffSym* s2 =3D (XCoffSym*)v2;
+ if (s1->last < s2->first) return -1;
+ if (s2->last < s1->first) return 1;
+ return 0;
+}
+
+/* Compare XCoffSyms by their start address, and for equal addresses,
+ use the name as a secondary sort key. */
+static Word cmp_XCoffSym_by_start_then_name ( void* v1, void* v2 )
+{
+ XCoffSym* s1 =3D (XCoffSym*)v1;
+ XCoffSym* s2 =3D (XCoffSym*)v2;
+ if (s1->first < s2->first) return -1;
+ if (s1->first > s2->first) return 1;
+ return cmp_Names(s1->name, s2->name);
+}
+
+
+/* csect_idx is an index in the symbol table (start, n_entries) to a
+ symbol defining a csect. If possible, find the bounds of the csect
+ and assign them to *first and *last, and return True; else return
+ False. sntext_1based_if_known is the 1-based number of the text
+ section. Note: computes stated VMAs, not actual VMAs. */
+
+#if defined(VGP_ppc32_aix5)
+# define SMTYP_SMTYP(x) ((x) & 0x7) /* symbol type */
+# define CSECT(PP) (((AUXENT*)(PP))->x_csect)
+# define CSECT_LEN(PP) (CSECT(PP).x_scnlen)
+# define CSECT_ALIGN(PP) (SMTYP_ALIGN(CSECT(PP).x_smtyp))
+# define CSECT_SMTYP(PP) (SMTYP_SMTYP(CSECT(PP).x_smtyp))
+# define CSECT_SCLAS(PP) (CSECT(PP).x_smclas)
+
+#elif defined(VGP_ppc64_aix5)
+# define SMTYP_SMTYP(x) ((x) & 0x7) /* symbol type */
+# define CSECT(PP) (((AUXENT*)(PP))->x_csect)
+# define CSECT_LEN(PP) ((((ULong)(CSECT(PP).x_scnlen_hi)) << 32) \
+ | ((ULong)(CSECT(PP).x_scnlen_lo)))
+# define CSECT_ALIGN(PP) (SMTYP_ALIGN(CSECT(PP).x_smtyp))
+# define CSECT_SMTYP(PP) (SMTYP_SMTYP(CSECT(PP).x_smtyp))
+# define CSECT_SCLAS(PP) (CSECT(PP).x_smclas)
+
+#else
+# error "Unknown platform"
+
+#endif
+
+
+#define SYM_IX(_tab,_n) ((SYMENT*)(((UChar*)(_tab)) + SYMESZ * (_n)))
+
+static=20
+Bool get_csect_bounds ( UChar* start, UWord n_entries,
+ UWord csect_idx,=20
+ Int sntext_1based_if_known,
+ /*OUT*/UChar** first, /*OUT*/UChar** last )
+{
+ Bool is_text;
+ SYMENT* cssym;
+ AUXENT* csaux;
+
+ vg_assert(SYMESZ =3D=3D 18); /* both for XCOFF32 and XCOFF64 */
+
+ if (n_entries < 2)
+ return False;
+ if (csect_idx+1 >=3D n_entries)
+ return False;
+ cssym =3D (SYMENT*)SYM_IX(start, csect_idx);
+ csaux =3D (AUXENT*)SYM_IX(start, csect_idx+1);
+ is_text =3D sntext_1based_if_known !=3D -1
+ && (Int)cssym->n_scnum =3D=3D sntext_1based_if_known;
+
+ if (!is_text)
+ return False;
+
+ if (cssym->n_sclass =3D=3D C_EXT || cssym->n_sclass =3D=3D C_HIDEXT) =
{
+ if (cssym->n_numaux =3D=3D 1) {
+ if (CSECT_SMTYP(csaux) =3D=3D XTY_SD) {
+ if (0) VG_(printf)("GCB: SD: len is %ld\n", CSECT_LEN(csaux)=
);
+ *first =3D (UChar*)(cssym->n_value);
+ *last =3D *first + CSECT_LEN(csaux)-1;
+ return True;
+ }
+ } else {
+ /* Possibly complain or take evasive action here. In fact
+ I've yet to see a case where a csect definition symbol has
+ n_numaux !=3D 1. */
+ }
+ }
+ return False;
+}
+
+static void* malloc_AR_SYMTAB ( SizeT nbytes ) {
+ return VG_(arena_malloc)(VG_AR_SYMTAB, nbytes);
+}
+static void free_AR_SYMTAB ( void* ptr ) {
+ return VG_(arena_free)(VG_AR_SYMTAB, ptr);
+}
+
+/* Read symbol and line number info for the given text section. (This
+ is the central routine for XCOFF reading.) Returns NULL on
+ success, or the text of an error message otherwise. */
+static=20
+HChar* read_symbol_table (=20
+ /*MOD*/SegInfo* si,
+
+ /* location of symbol table */
+ UChar* oi_symtab, UWord oi_nent_symtab,
+
+ /* location of string table */
+ UChar* oi_strtab, UWord oi_n_strtab,
+
+ /* location of debug section (stabs strings, if any) */
+ UChar* oi_debug, UWord oi_n_debug,
+
+ /* location of line number info, if any */
+ UChar* oi_lnos, UWord oi_nent_lnos,
+
+ /* section indices */
+ Int sntext_1based_if_known,
+ Int sndata_1based_if_known,
+
+ /* where the mapped data section is */
+ Addr data_avma,=20
+ UWord data_alen,
+ UWord data_alen_from_auxhdr,
+
+ /* where the mapped toc is (in the data section,
+ presumably), if known */
+ Addr toc_avma,
+
+ /* stated-to-actual VMA offsets */=20
+ Word text_bias,
+ Word data_bias=20
+ )
+{
+ SYMENT* sym;
+ SYMENT* aux;
+ UInt i, j, nsyms, k, m;
+ Name name;
+ Bool is_text, is_data;
+ XArray* syms =3D NULL; /* XArray of XCoffSyms */
+
+ /* If the TOC avma is obviously bogus, get rid of it */
+ {=20
+ UWord data_maxlen =3D data_alen;
+ if (data_maxlen < data_alen_from_auxhdr)
+ data_maxlen =3D data_alen_from_auxhdr;
+
+ //VG_(printf)(" toc_avma %p\n", toc_avma);
+ //VG_(printf)("data_avma %p\n", data_avma);
+ //VG_(printf)("dxxx_avma %p\n", data_avma + data_maxlen);
+
+ if (toc_avma !=3D 0
+ && (toc_avma < data_avma || toc_avma >=3D data_avma + data_maxl=
en))
+ toc_avma =3D 0;
+ //VG_(printf)("2toc_avma %p\n", toc_avma);
+ }
+
+ /* We can't just treat this as an array of SYMENTs, because C
+ thinks they have size 20 whereas the spec says they have size 18
+ (alignment padding) so doing the obvious thing screws up. Hence
+ we have to calculate the offset of each entry manually. */
+
+ if (0) VG_(printf)("size of SYMENT =3D %ld\n", sizeof(SYMENT));
+
+ /* ----------------------------------------------------------
+ Phase 1: first make a pass through the symbols, looking for
+ stuff in the text segment. Calculate their actual VMAs,
+ dump any outside the text segment actual VMA bounds, and=20
+ add the rest to 'syms'.
+ ---------------------------------------------------------- */
+
+ syms =3D newXA( malloc_AR_SYMTAB, free_AR_SYMTAB, sizeof(XCoffSym) );
+
+ if (SHOW && SHOW_SYMS_P1) {
+ VG_(printf)("--- BEGIN Phase1 (find text symbol starts) ---\n");
+ VG_(printf)("--- note: shown addresses are STATED VMAs ---\n");
+ }
+
+ i =3D 0;
+ while (1) {
+
+ if (i >=3D oi_nent_symtab)
+ break;
+
+ sym =3D SYM_IX(oi_symtab, i);
+ is_text =3D sntext_1based_if_known !=3D -1
+ && (Int)sym->n_scnum =3D=3D sntext_1based_if_known;
+ is_data =3D sndata_1based_if_known !=3D -1
+ && (Int)sym->n_scnum =3D=3D sndata_1based_if_known;
+
+ if (SHOW && SHOW_SYMS_P1)
+ VG_(printf)("Phase1: %5d+%d ", i, (Int)sym->n_numaux);
+
+ name =3D mk_const_Name("(unknown)");
+ if (sym->n_scnum =3D=3D N_DEBUG && sym->n_sclass =3D=3D C_FUN)
+ name =3D maybeDerefStrTab( sym, oi_debug, oi_n_debug );
+ else=20
+ if (sym->n_sclass & DBXMASK)
+ name =3D mk_const_Name("(dbxstr)");
+ else
+ name =3D maybeDerefStrTab( sym, oi_strtab, oi_n_strtab);
+
+ if (SHOW && SHOW_SYMS_P1) {
+ VG_(printf)("%5s(%2d) %6s 0x%016llx ",=20
+ is_text ? "text" : is_data ? "data" : "other",
+ (Int)sym->n_scnum,=20
+ name_of_syment_n_sclass(sym->n_sclass),=20
+ (ULong)sym->n_value);
+ print_Name(name);
+ VG_(printf)("\n");
+ }
+
+ i++;
+ i +=3D sym->n_numaux;
+
+ if (!is_text)
+ continue;
+
+ /* --- BEGIN regular(ish) symbol --- */
+ if ((sym->n_sclass =3D=3D C_EXT || sym->n_sclass =3D=3D C_HIDEXT)
+ && (sym->n_numaux =3D=3D 1 || sym->n_numaux =3D=3D 2)) {
+ /* Dealing with a symbol with a csect entry. By convention
+ (according to IBM docs) the csect entry is the last
+ auxiliary for this symbol, if there is more than one
+ auxiliary present; hence "SYM_IX(oi_symtab, i-1)" below. */
+
+ aux =3D SYM_IX(oi_symtab, i-1);
+ if (0) VG_(printf)("symtype is %d\n", CSECT_SMTYP(aux));
+
+ if (CSECT_SMTYP(aux) =3D=3D XTY_SD) {
+ /* Aux is a csect definition. This is relatively rare,
+ but at least it is simple: the CSECT_LEN(aux) field
+ contains it's length, so we just heave that into the
+ pot for phase 2. */
+ if (0) VG_(printf)("SD: len is %d\n", (Int)CSECT_LEN(aux));
+ if (0) VG_(printf)("SD: proposed %p\n", sym->n_value);
+ XCoffSym cand;
+ init_XCoffSym(&cand);
+ cand.first =3D sym->n_value;
+ cand.last =3D cand.first + (UWord)CSECT_LEN(aux) - 1;
+
+ cand.first +=3D text_bias;
+ cand.last +=3D text_bias;
+ cand.name =3D name;
+
+ if (cand.last < si->start || cand.first >=3D si->start+si->s=
ize)
+ continue;
+ if (cand.last < cand.first)
+ continue;
+ if (is_empty_Name(name))
+ continue;
+ addToXA(syms, &cand);
+ }
+
+ if (CSECT_SMTYP(aux) =3D=3D XTY_LD) {
+ /* Aux is a label definition. This is the common case. */
+ XCoffSym cand;
+ Bool ok;
+ UChar *csect_first, *csect_last;
+ /* x_scnlen contains the symbol table entry of the
+ containing csect. Use the symbol's stated vma and csect
+ end as the initial approximation of this symbol's start
+ and length. The length will get revised downwards in
+ Phase 2. */
+ init_XCoffSym(&cand);
+ ok =3D get_csect_bounds( oi_symtab, oi_nent_symtab,=20
+ CSECT_LEN(aux),=20
+ sntext_1based_if_known,
+ &csect_first, &csect_last );
+ if (0 && ok)
+ VG_(printf)("new csect svma %p %p\n", csect_first, csect_=
last);
+ if (ok && ((UWord)csect_first) <=3D ((UWord)sym->n_value)
+ && ((UWord)sym->n_value) <=3D ((UWord)csect_last)) {
+ if (0) {
+ VG_(printf)("LD: in a csect %p %p\n",=20
+ csect_first, csect_last);
+ VG_(printf)("CAND: %p .. %p %s\n",=20
+ (void*)sym->n_value, (void*)csect_last, na=
me);
+ }
+ cand.first =3D sym->n_value;
+ cand.last =3D (Addr)csect_last;
+ } else {
+ if (0) {
+ VG_(printf)("LD: can't compute csect bounds?!\n");
+ VG_(printf)("CAND: %p .. %p %s\n",=20
+ (HChar*)sym->n_value,
+ (HChar*)sym->n_value+1, name);
+ }
+ cand.first =3D sym->n_value;
+ cand.last =3D cand.first + 1;
+ }
+
+ /* cand.first is a stated VMA; turn it into an actual VMA
+ and ignore it if not in the actual text segment. */
+
+ cand.first +=3D text_bias;
+ cand.last +=3D text_bias;
+ cand.name =3D name;
+
+ if (cand.last < si->start || cand.first >=3D si->start+si->s=
ize)
+ continue;
+ if (cand.last < cand.first)
+ continue;
+ if (is_empty_Name(name))
+ continue;
+
+ addToXA(syms, &cand);
+ }
+ }
+ /* --- END regular(ish) symbol --- */
+
+ }
+
+ /* ----------------------------------------------------------
+ Phase 2: suitable text symbols have been put into 'syms'. Their
+ start addresses are correct, but end addresses are those of the
+ containing csect, which is in general way too long. This phase
+ clips the ends so that the ranges no longer overlap, and thereby
+ constrains each symbol's range to something which, for the most
+ part, is correct.
+ ---------------------------------------------------------- */
+
+ nsyms =3D sizeXA(syms);
+
+ if (SHOW && SHOW_SYMS_P1)
+ VG_(printf)("Phase1 acquired %d text symbols\n", nsyms);
+
+ if (SHOW && SHOW_SYMS_P2) {
+ VG_(printf)("--- BEGIN Phase2 (find text symbol ends) ---\n");
+ VG_(printf)("--- note: shown addresses are ACTUAL VMAs ---\n");
+ }
+
+ setCmpFnXA(syms, cmp_XCoffSym_by_start_then_name);
+ sortXA(syms);
+
+ /* We only know for sure the start addresses (actual VMAs) of
+ symbols, and an overestimation of their end addresses. So sort
+ by start address, then clip each symbol so that its end address
+ does not overlap with the next one along.
+
+ There is a small refinement: if a group of symbols have the same
+ address, treat them as a group: find the next symbol along that
+ has a higher start address, and clip all of the group
+ accordingly. This clips the group as a whole so as not to
+ overlap following symbols. This leaves prefersym() in
+ storage.c, which is not XCOFF-specific, to later decide which of
+ the symbols in the group to keep.=20
+
+ Another refinement is that we need to get rid of symbols which,
+ after clipping, have identical starts, ends, and names. So the
+ sorting uses the name as a secondary key.
+ */
+
+ for (i =3D 0; i < nsyms; i++) {
+ for (k =3D i+1;=20
+ k < nsyms=20
+ && ((XCoffSym*)indexXA(syms,i))->first=20
+ =3D=3D ((XCoffSym*)indexXA(syms,k))->first;=20
+ k++)
+ ;
+ /* So now [i .. k-1] is a group all with the same start address.
+ Clip their ending addresses so they don't overlap [k]. In
+ the normal case (no overlaps), k =3D=3D i+1. */
+ if (k < nsyms) {
+ XCoffSym* next =3D (XCoffSym*)indexXA(syms,k);
+ for (m =3D i; m < k; m++) {
+ XCoffSym* here =3D (XCoffSym*)indexXA(syms,m);
+ vg_assert(here->first < next->first);
+ if (here->last >=3D next->first)
+ here->last =3D next->first-1;
+ }
+ }
+ i =3D k-1;
+ vg_assert(i <=3D nsyms);
+ }
+
+ j =3D 0;
+ if (nsyms > 0) {
+ j =3D 1;
+ for (i =3D 1; i < nsyms; i++) {
+ vg_assert(j <=3D i);
+ XCoffSym* s_j1 =3D (XCoffSym*)indexXA(syms, j-1);
+ XCoffSym* s_j =3D (XCoffSym*)indexXA(syms, j);
+ XCoffSym* s_i =3D (XCoffSym*)indexXA(syms, i);
+ if (s_i->first !=3D s_j1->first
+ || s_i->last !=3D s_j1->last
+ || 0 !=3D cmp_Names(s_i->name, s_j1->name)) {
+ *s_j =3D *s_i;
+ j++;
+ } else {
+ if (SHOW && SHOW_SYMS_P2) {
+ VG_(printf)("Phase2: dump duplicate ");=20
+ print_Name(s_i->name);
+ VG_(printf)("\n");
+ }
+ }
+ }
+ }
+ vg_assert(j >=3D 0 && j <=3D nsyms);
+ dropTailXA(syms, nsyms - j);
+ nsyms =3D j;
+
+ if (1) {
+ for (i =3D 0; i < nsyms; i++) {
+ XCoffSym* s =3D (XCoffSym*)indexXA(syms, i);
+ if (SHOW && SHOW_SYMS_P2) {
+ VG_(printf)("Phase2: %d 0x%lx 0x%lx ",=20
+ i, s->first, s->last);
+ print_Name(s->name);
+ VG_(printf)("\n");
+ }
+ }
+ }
+
+ /* ----------------------------------------------------------
+ Phase 3: rescan the symbol table, looking for info on function
+ start/end line numbers and source file names. Generally
+ this will be absent for sources compiled without -g.
+ ---------------------------------------------------------- */
+
+ if (SHOW && SHOW_SYMS_P3) {
+ VG_(printf)("--- BEGIN Phase3 (find src filenames "
+ "& fn start/end line #s) ---\n");
+ VG_(printf)("--- note: shown addresses are STATED VMAs ---\n");
+ }
+
+ /* The lookupXAs in the C_FUN(.bf) part have to operate by
+ inclusion. Hence: */
+ setCmpFnXA(syms, cmp_XCoffSym_by_overlap);
+ sortXA(syms);
+
+ /* In this loop, p3currsym is maintained as a pointer to the most
+ recent XCoffSym identified as FCN(.bf) (function start).
+ Subsequent FCN(.ef) (function end) indications are compared
+ against said symbol. This assumes that function start/end
+ indications are not nested. */
+
+ XCoffSym* p3currsym =3D NULL;
+
+ /* Maintain a stack of filenames. We allow the stack pointer to go
+ beyond the end, but obviously nothing is stored in this
+ imaginary part of the stack. */
+ Name filenames[N_FILENAME_STACK];
+ Int filenames_used =3D 1;
+
+ Name name_unknown =3D mk_empty_Name();
+ Name name_overflow =3D mk_const_Name("(filename_stack_overflow)");
+
+ for (i =3D 0; i < N_FILENAME_STACK; i++)
+ filenames[i] =3D name_unknown;
+
+# define FNAME_PUSH(_fname) \
+ do { \
+ vg_assert(filenames_used >=3D 1);\
+ if (filenames_used < N_FILENAME_STACK)\
+ filenames[filenames_used] =3D (_fname);\
+ filenames_used++;\
+ } while (0)
+
+# define FNAME_POP \
+ do {\
+ vg_assert(filenames_used >=3D 1);\
+ if (filenames_used > 1 && filenames_used <=3D N_FILENAME_STACK)=
\
+ filenames[filenames_used-1] =3D name_unknown; \
+ if (filenames_used > 1)\
+ filenames_used--;\
+ } while (0)
+
+# define FNAME_GET_TOP \
+ (filenames_used > N_FILENAME_STACK \
+ ? name_overflow \
+ : filenames[filenames_used-1])
+
+# define FNAME_SET_TOP(_fname) \
+ do {\
+ vg_assert(filenames_used >=3D 1);\
+ filenames[filenames_used-1] =3D (_fname);\
+ } while (0)
+
+
+ i =3D 0;
+ while (1) {
+
+ if (i >=3D oi_nent_symtab)
+ break;
+
+ sym =3D SYM_IX(oi_symtab, i);
+ is_text =3D sntext_1based_if_known !=3D -1
+ && (Int)sym->n_scnum =3D=3D sntext_1based_if_known;
+ is_data =3D sndata_1based_if_known !=3D -1
+ && (Int)sym->n_scnum =3D=3D sndata_1based_if_known;
+
+ if (0 && SHOW && SHOW_SYMS_P3)
+ VG_(printf)("Phase3: %5d+%d ", i, (Int)sym->n_numaux);
+
+ name =3D mk_const_Name("(unknown)");
+ if (sym->n_scnum =3D=3D N_DEBUG && sym->n_sclass =3D=3D C_FUN)
+ name =3D maybeDerefStrTab( sym, oi_debug, oi_n_debug );
+ else=20
+ if (sym->n_sclass & DBXMASK)
+ name =3D mk_const_Name("(dbxstr)");
+ else
+ name =3D maybeDerefStrTab( sym, oi_strtab, oi_n_strtab);
+
+ if (0 && SHOW && SHOW_SYMS_P3) {
+ VG_(printf)("%5s(%2d) %6s 0x%016llx ",=20
+ is_text ? "text" : is_data ? "data" : "other",
+ (Int)sym->n_scnum,=20
+ name_of_syment_n_sclass(sym->n_sclass),=20
+ (ULong)sym->n_value);
+ print_Name(name);
+ VG_(printf)("\n");
+ }
+
+ i++;
+ i +=3D sym->n_numaux;
+
+ /* --- BEGIN C_FILE [source file] --- */
+ /* There are two variants of C_FILE: a simple one with n_numaux
+ =3D=3D 0, where the primary name is what we're after, and anoth=
er
+ variant with n_numaux =3D=3D 3, in which we have to hunt around
+ in the auxiliary entries to find the file name. gcc produces
+ exclusively the first kind, and xlc a mixture of both. */
+ if (sym->n_sclass =3D=3D C_FILE && sym->n_numaux =3D=3D 0) {
+ if (!is_empty_Name(name))
+ FNAME_SET_TOP(name);
+ if (SHOW && SHOW_SYMS_P3) {
+ VG_(printf)("Phase3: %5d+%d FILE ",
+ i-1-sym->n_numaux, (Int)sym->n_numaux );
+ print_Name(name);
+ VG_(printf)("\n");
+ }
+ continue;
+ }
+ if (sym->n_sclass =3D=3D C_FILE && sym->n_numaux > 1=20
+ && sym->n_numaux <=3D 5 /*stay sane*/)=
{
+ for (k =3D 0; k < sym->n_numaux; k++) {
+ aux =3D SYM_IX(oi_symtab, i - sym->n_numaux + k);
+ Name fname
+ =3D maybeDerefStrTab_fname(=20
+ (UChar*)&((AUXENT*)aux)->x_file.x_fname,
+ oi_strtab, oi_n_strtab);
+ if (((AUXENT*)aux)->x_file._x.x_ftype =3D=3D XFT_FN) {
+ if (!is_empty_Name(fname))
+ FNAME_SET_TOP(fname);
+ if (SHOW && SHOW_SYMS_P3) {
+ VG_(printf)("Phase3: %5d+%d FILE ",
+ i-1-sym->n_numaux, (Int)sym->n_numaux );
+ print_Name(fname);
+ VG_(printf)("\n");
+ }
+ break;
+ }
+ }
+ continue;
+ }
+ /* --- END C_FILE [source file] --- */
+
+ /* --- BEGIN C_BINCL [beginning of include] --- */
+ if (sym->n_sclass =3D=3D C_BINCL && sym->n_numaux =3D=3D 0) {
+ FNAME_PUSH(name);
+ if (SHOW && SHOW_SYMS_P3)
+ VG_(printf)("Phase3: %5d+%d BINCL %s\n",
+ i-1-sym->n_numaux, (Int)sym->n_numaux,=20
+ name );
+ continue;
+ }
+ /* --- END C_BINCL [beginning of include] --- */
+
+ /* --- BEGIN C_EINCL [end of include] --- */
+ if (sym->n_sclass =3D=3D C_EINCL && sym->n_numaux =3D=3D 0) {
+ FNAME_POP;
+ if (SHOW && SHOW_SYMS_P3)
+ VG_(printf)("Phase3: %5d+%d EINCL %s\n",
+ i-1-sym->n_numaux, (Int)sym->n_numaux,=20
+ name );
+ continue;
+ }
+ /* --- END C_EINCL [end of include] --- */
+
+ /* everything else that is interesting is in the text
+ section. */
+ if (!is_text)
+ continue;
+=20
+ /* --- BEGIN C_FCN(.bf) [function begin mark] --- */
+ if (sym->n_sclass =3D=3D C_FCN=20
+ && sym->n_numaux =3D=3D 1=20
+ && eq_string_Name(name, ".bf")) {
+ /* aux is BLOCK */
+ aux =3D SYM_IX(oi_symtab, i-1);
+ Addr fn_start_avma =3D ((Addr)sym->n_value) + text_bias;
+ Int fn_start_lnno =3D ((AUXENT*)aux)->x_sym.x_misc.x_lnsz.x_ln=
no;
+ /* Look in 'syms' to see if we have anything for address
+ fn_avma. */
+ XCoffSym key;
+ VG_(memset)(&key, 0, sizeof(key));
+ key.first =3D fn_start_avma;
+ key.last =3D fn_start_avma;
+ Word ix_lo, ix_hi;
+
+ /* Search for all symbols intersecting fn_start_avma. */
+ Bool found =3D lookupXA(syms, &key, &ix_lo, &ix_hi);
+ if (found) {
+ /* All the 'syms' entries from ix_lo to ix_hi match. */
+
+ for (k =3D ix_lo; k <=3D ix_hi; k++) {
+ XCoffSym* tsym =3D (XCoffSym*)indexXA(syms,k);
+
+ /* note the start line number */
+ if (tsym->slnno =3D=3D 0 && fn_start_lnno > 0)
+ tsym->slnno =3D fn_start_lnno;
+
+ /* also the current filename, if we know it */
+ if (is_empty_Name(tsym->fname)=20
+ && !is_empty_Name(FNAME_GET_TOP))=20
+ tsym->fname =3D FNAME_GET_TOP;
+
+ /* remember the first in the range as the new current
+ (I've never seen a range with > 1) */
+ if (k =3D=3D ix_lo)
+ p3currsym =3D tsym;
+ if (SHOW && SHOW_SYMS_P3) {
+ VG_(printf)("Phase3: %5d+%d FCN(.bf) 0x%016llx "
+ "lnno=3D%-4d ",=20
+ i-1-sym->n_numaux, (Int)sym->n_numaux,=20
+ (ULong)sym->n_value,
+ fn_start_lnno );
+ print_Name(tsym->name);
+ VG_(printf)("\n");
+ if (!is_empty_Name(tsym->fname)) {
+ VG_(printf)("Phase3: ");
+ print_Name(tsym->fname);
+ VG_(printf)("\n");
+ }
+ }
+ }
+ }
+ continue;
+ }
+ /* --- END C_FCN(.bf) [function begin mark] --- */
+
+ /* --- BEGIN C_FCN(.ef) [function end mark] --- */
+ if (sym->n_sclass =3D=3D C_FCN=20
+ && sym->n_numaux =3D=3D 1=20
+ && eq_string_Name(name, ".ef")) {
+ /* aux is BLOCK */
+ aux =3D SYM_IX(oi_symtab, i-1);
+ /* In this case the n_value field appears to give the address
+ of the first insn following the end of the function.
+ Hence the - 1. */
+ Addr fn_end_avma =3D ((Addr)sym->n_value) + text_bias - 1;
+ Int fn_end_lnno =3D ((AUXENT*)aux)->x_sym.x_misc.x_lnsz.x_lnno=
;
+
+ if (p3currsym
+ && fn_end_avma >=3D p3currsym->first
+ && fn_end_avma <=3D p3currsym->last) {
+ if (p3currsym->elnno =3D=3D 0 && fn_end_lnno > 0)
+ p3currsym->elnno =3D fn_end_lnno;
+ if (SHOW && SHOW_SYMS_P3) {
+ VG_(printf)("Phase3: %5d+%d FCN(.ef) 0x%016llx "
+ "lnno=3D%-4d ",=20
+ i-1-sym->n_numaux, (Int)sym->n_numaux,=20
+ (ULong)sym->n_value,
+ fn_end_lnno );
+ print_Name(p3currsym->name);
+ VG_(printf)("\n");
+ }
+ if (fn_end_avma < p3currsym->last) {
+ /* also take the opportunity to trim the symbol's
+ length to something less than established by the
+ initial estimation done by Phases 1 and 2. */
+ if (0) VG_(printf)("trim end from %p to %p\n",=20
+ p3currsym->last, fn_end_avma);
+ p3currsym->last =3D fn_end_avma;
+ }
+ }
+ continue;
+ }
+ /* --- END C_FCN(.ef) [function end mark] --- */
+
+ }
+
+ /* ----------------------------------------------------------
+ Phase 4: read and enumerate the line number entries, if=20
+ there are any. This depends on knowing the function start/end
+ line numbers established in Phase 3.
+ ---------------------------------------------------------- */
+
+ if (SHOW && SHOW_SYMS_P4) {
+ VG_(printf)("--- BEGIN Phase4 (read line number info) ---\n");
+ VG_(printf)("--- note: shown addresses are ACTUAL VMAs ---\n");
+ }
+
+ /* Re-sort 'syms' using the compare-start-addresses ordering, so we
+ can use that in subsequent searches. */
+ setCmpFnXA(syms, cmp_XCoffSym_by_start);
+ sortXA(syms);
+
+ if (oi_lnos && oi_nent_lnos > 0) {
+
+# if defined(VGP_ppc32_aix5)
+ vg_assert(LINESZ =3D=3D 6); /* XCOFF32 */
+# elif defined(VGP_ppc64_aix5)
+ vg_assert(LINESZ =3D=3D 12); /* XCOFF64 */
+# else
+# error "Unknown plat"
+# endif
+
+# define LNO_IX(_tab,_n) \
+ ((LINENO*)(((UChar*)(_tab)) + LINESZ * (_n)))
+
+ /* Current fn that we are processing line numbers for */
+ XCoffSym* p4currsym =3D NULL;
+
+ /* SegInfo's string table pointer for p4currsym's file name.
+ Allocated on demand, so as not to waste space in the
+ SegInfo's string table. */
+ UChar* si_fname_str =3D NULL;
+
+ /* Ditto the directory name, if we can manage it. */
+ UChar* si_dname_str =3D NULL;
+
+ for (i =3D 0; i < oi_nent_lnos; i++) {
+ LINENO* lno =3D LNO_IX(oi_lnos,i);
+
+ if (lno->l_lnno =3D=3D 0) {
+ /* New fn. We get given the index in the symbol table of
+ the relevant function. It should be a C_EXT, C_WEAKEXT
+ or C_HIDEXT flavour, according to the IBM docs. */
+ Int sym_ix =3D (Int)lno->l_addr.l_symndx;
+ sym =3D SYM_IX(oi_symtab, sym_ix);
+ if (!(sym->n_sclass =3D=3D C_EXT=20
+ || sym->n_sclass =3D=3D C_WEAKEXT=20
+ || sym->n_sclass =3D=3D C_HIDEXT))
+ return "readxcoff.c: invalid symbol reference"
+ " in line number info";
+ /* For these 3 symbol kinds, the n_value field is the
+ symbol's stated VMA. Convert this to an actual VMA and
+ use that to find the associated XCoffSym. */
+ Addr sym_avma =3D ((Addr)sym->n_value) + text_bias;
+
+ XCoffSym key;
+ VG_(memset)(&key, 0, sizeof(key));
+ key.first =3D sym_avma;
+ Word ix_lo, ix_hi;
+
+ Bool found =3D lookupXA(syms, &key, &ix_lo, &ix_hi);
+ if (found) {
+ /* All the 'syms' entries from ix_lo to ix_hi match.
+ Just use the lowest (sigh ..) */
+ p4currsym =3D (XCoffSym*)indexXA(syms, ix_lo);
+ } else {
+ /* We can't find the relevant sym, but we still have to
+ wade through the line number info for this function
+ until we get to the starting record for the next
+ one. */
+ p4currsym =3D NULL;
+ }
+
+ /* If we decide to add any line info for this fn to the
+ SegInfo, we'll allocate this. Otherwise don't
+ bother. */
+ si_fname_str =3D NULL;
+ si_dname_str =3D NULL;
+
+ if (SHOW && SHOW_SYMS_P4) {
+ VG_(printf)("Phase4: new fn (%d found), avma 0x%016llx "=
,=20
+ (Int)(ix_hi-ix_lo+1),
+ (ULong)sym_avma );
+ if (p4currsym)
+ print_Name(p4currsym->name);
+ else
+ VG_(printf)("UNKNOWN");
+ VG_(printf)("\n");
+ }
+
+ } else {
+ /* Line number entry for the current fn. */
+ if (!p4currsym)
+ continue;
+ Int line_no =3D (Int)(UInt)lno->l_lnno;
+ line_no +=3D (p4currsym->slnno - 1);
+ Addr line_first_avma =3D ((Addr)lno->l_addr.l_paddr) + text_=
bias;
+ if (line_first_avma < p4currsym->first
+ || line_first_avma > p4currsym->last)
+ continue;
+ Addr line_last_avma =3D p4currsym->last;
+ /* Try to refine the last_avma by looking at the next
+ line's entry. */
+
+ /* XXX: TODO. What we have currently works only because
+ the generic line number canonicaliser truncates
+ overlapping address ranges in the way which we happen
+ to need anyway. */
+ if (SHOW && SHOW_SYMS_P4)
+ VG_(printf)("Phase4: line %d 0x%016llx - 0x%016llx\n",=20
+ line_no, (ULong)line_first_avma,=20
+ (ULong)line_last_avma);
+
+ /* This now has to be allocated. Try and figure out the
+ dir name at the same time. This is a bit ugly in that
+ it involves messing with the string after it's been
+ copied into the SegInfo's string table, but seems
+ harmless enough. */
+ if ((!si_fname_str) && !is_empty_Name(p4currsym->fname)) {
+ si_dname_str =3D NULL;
+ si_fname_str =3D ML_(addStr)(si, p4currsym->fname.vec,
+ p4currsym->fname.len);
+ UChar* lastslash =3D VG_(strrchr)(si_fname_str, '/');
+ if (lastslash)
+ vg_assert(lastslash[0] =3D=3D '/');
+ if (lastslash[1] !=3D 0) {
+ si_dname_str =3D si_fname_str;
+ lastslash[0] =3D 0; /* replace the / with a NUL
+ terminator */
+ si_fname_str =3D lastslash+1;
+ if (0) VG_(printf)("XXX %s %s\n", si_dname_str,=20
+ si_fname_str);
+ }
+ }
+ /* finally .. */
+ if (line_no >=3D 0)
+ ML_(addLineInfo)(si, si_fname_str, si_dname_str,
+ line_first_avma, line_last_avma+1,
+ line_no, i/*debugging only*/);
+ }
+ }
+
+# undef LNO_IX
+ }
+
+#if defined(OFFICIAL_PHASE5)
+ /* ----------------------------------------------------------
+ Phase 5: Do another trawl of the XCOFF symbol table, looking
+ for TOC entries for the entries we've already placed in 'syms'.
+ ---------------------------------------------------------- */
+
+ if (SHOW && SHOW_SYMS_P5)
+ VG_(printf)("--- BEGIN official Phase5 (find TOC pointers) ---\n")=
;
+
+ Bool is_cfun;
+
+ i =3D 0;
+ while (1) {
+
+ if (i >=3D oi_nent_symtab)
+ break;
+
+ sym =3D SYM_IX(oi_symtab, i);
+ is_text =3D sntext_1based_if_known !=3D -1
+ && (Int)sym->n_scnum =3D=3D sntext_1based_if_known;
+ is_data =3D sndata_1based_if_known !=3D -1
+ && (Int)sym->n_scnum =3D=3D sndata_1based_if_known;
+ is_cfun =3D sym->n_scnum =3D=3D N_DEBUG=20
+ && sym->n_sclass =3D=3D C_FUN;
+
+ i++;
+ i +=3D sym->n_numaux;
+
+ if (!is_cfun && !is_data)
+ continue;
+
+ if (SHOW && SHOW_SYMS_P5)
+ VG_(printf)("Phase5o: %5d+%d ", i-1-sym->n_numaux,=20
+ (Int)sym->n_numaux);
+
+ name =3D mk_const_Name("(unknown)");
+ if (is_cfun)
+ name =3D maybeDerefStrTab( sym, oi_debug, oi_n_debug );
+ else=20
+ if (sym->n_sclass & DBXMASK)
+ name =3D mk_const_Name("(dbxstr)");
+ else
+ name =3D maybeDerefStrTab( sym, oi_strtab, oi_n_strtab);
+
+ if (SHOW && SHOW_SYMS_P5) {
+ VG_(printf)("%5s(%2d) %6s svma 0x%016llx ",=20
+ is_text ? "text" : is_data ? "data" : "other",
+ (Int)sym->n_scnum,=20
+ name_of_syment_n_sclass(sym->n_sclass),=20
+ (ULong)sym->n_value);
+ print_Name(name);
+ VG_(printf)("\n");
+ }
+
+ Addr avma =3D (Addr)sym->n_value + data_bias;
+ if (0) VG_(printf)("data sym: avma %p, limits %p-%p\n",=20
+ avma, data_avma,data_avma + data_alen);
+
+ /* Does avma point to 3 valid words inside the actual data
+ segment? iow, can it possibly be a valid function
+ descriptor? If not, move on. */
+ if (! (avma >=3D data_avma=20
+ && avma + 3 * sizeof(Word) <=3D data_avma + data_alen) )
+ continue;
+
+ UWord* fndescr =3D (UWord*)avma;
+
+ if (SHOW && SHOW_SYMS_P5)=20
+ VG_(printf)(" fndescr =3D {0x%lx,0x%lx}\n",=20
+ fndescr[0], fndescr[1]);
+
+ /* Another check: fndescr[0], the entry point, must point inside
+ the actual text segment. Discard any that don't. */
+
+ Addr fndescr_0 =3D (Addr)fndescr[0];
+ if (fndescr_0 < si->start || fndescr_0 >=3D si->start+si->size)
+ continue;
+
+ /* Let's suppose that fndescr is the descriptor for a
+ function with name NAME. If that's so, then 'syms'
+ acquired by stage 2 should have an entry of name '.NAME'
+ whose address is fndescr[0]. If so, then fndescr[1] must
+ be the relevant r2 value for it. */
+ /* Look in 'syms' to see if we have anything for address
+ fndescr[0]. */
+ XCoffSym key;
+ VG_(memset)(&key, 0, sizeof(key));
+ key.first =3D fndescr_0;
+ Word ix_lo, ix_hi;
+ Bool found =3D lookupXA(syms, &key, &ix_lo, &ix_hi);
+ if (found) {
+ /* So all the 'syms' entries from ix_lo to ix_hi have an
+ address which matches the entry point address stated in
+ this descriptor. For each one, as a final sanity
+ check, see if the 'syms' entry has a name .NAME where
+ NAME is that of the data symbol currently under
+ consideration. If so, it's a pretty good bet that this
+ descriptor matches the text symbol we already have, and
+ so we have a valid tocptr value from fndescr[1]. */
+ for (k =3D ix_lo; k <=3D ix_hi; k++) {
+ XCoffSym* tsym =3D (XCoffSym*)indexXA(syms,k);
+ vg_assert(!is_empty_Name(tsym->name));
+ /* VG_(printf)("cmp %s %s\n", name, tsym->name); */
+ /* VG_(printf)("found matching %d %s\n", k, tsym->name); */
+ if (tsym->name.len =3D=3D 1 + name.len
+ && tsym->name.vec[0] =3D=3D '.'
+ && 0 =3D=3D VG_(memcmp)(&tsym->name.vec[1],
+ &name.vec[0], name.len)) {
+ Addr r2val =3D fndescr[1];
+ if (tsym->r2known) {
+ if (tsym->r2value !=3D r2val)
+ /* COMPLAIN - conflicting r2 values*/ ;
+ } else {
+ tsym->r2known =3D True;
+ tsym->r2value =3D r2val;
+ }
+ }
+ }
+ }
+
+ }
+
+#else /* !defined(OFFICIAL_PHASE5) */
+ /* ----------------------------------------------------------
+ Alternative kludgey Phase 5: find TOC entries for 'syms' by the
+ blunt-instrument approach of scanning the actual data section
+ and noting anything that looks like a function descriptor.
+ This is dangerous in the sense that if there are any 3 word
+ structs which are not real function descriptors but just happen
+ to look like them, then those will be included too. =20
+ Seems unlikely though.
+ ---------------------------------------------------------- */
+
+ if (SHOW && SHOW_SYMS_P5)
+ VG_(printf)("--- BEGIN kludged Phase5 (find TOC pointers) ---\n");
+
+ if (SHOW)
+ VG_(printf)("Phase5: actual data segment: %p %p\n",
+ data_avma, data_avma + data_alen);
+
+ /* Skip obviously-missing data sections. */
+ if (data_avma !=3D 0 && data_alen >=3D sizeof(UWord)) {
+
+ /* set up for inspecting all the aligned words in the actual
+ data section. */
+
+ Addr tmp =3D (Addr)data_avma;
+ while (tmp & (sizeof(UWord)-1))
+ tmp++;
+
+ UWord* first_data_word =3D (UWord*)tmp;
+ tmp =3D data_avma + data_alen - sizeof(UWord);
+ while (tmp & (sizeof(UWord)-1))
+ tmp--;
+ UWord* last_data_word =3D (UWord*)tmp;
+
+ if (SHOW)=20
+ VG_(printf)("Phase5: data segment conservatively aligned %p %p\=
n",=20
+ first_data_word, l...
[truncated message content] |
|
From: <sv...@va...> - 2006-09-30 10:51:45
|
Author: sewardj
Date: 2006-09-30 11:51:40 +0100 (Sat, 30 Sep 2006)
New Revision: 6099
Log:
Dispatchers for AIX5.
Added:
branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-aix5.S
branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-aix5.S
Added: branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-aix5.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-aix5.S =
(rev 0)
+++ branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-aix5.S 2006-09-30 1=
0:51:40 UTC (rev 6099)
@@ -0,0 +1,680 @@
+
+/*--------------------------------------------------------------------*/
+/*--- The core dispatch loop, for jumping to a code address. ---*/
+/*--- dispatch-ppc32-aix5.S ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics_asm.h"
+#include "pub_core_dispatch_asm.h"
+#include "pub_core_transtab_asm.h"
+#include "libvex_guest_offsets.h" /* for OFFSET_ppc32_CIA */
+
+
+/*------------------------------------------------------------*/
+/*--- ---*/
+/*--- The dispatch loop. VG_(run_innerloop) is used to ---*/
+/*--- run all translations except no-redir ones. ---*/
+/*--- ---*/
+/*------------------------------------------------------------*/
+
+/*----------------------------------------------------*/
+/*--- Incomprehensible TOC mumbo-jumbo nonsense. ---*/
+/*----------------------------------------------------*/
+
+/* No, I don't have a clue either. I just compiled a bit of
+ C with gcc and copied the assembly code it produced. */
+
+/* Basically "lwz rd, tocent__foo(2)" gets &foo into rd. */
+
+ .file "dispatch-ppc32-aix5.S"
+ .machine "any"
+ .toc
+ .csect .text[PR]
+ .toc
+tocent__vgPlain_dispatch_ctr:
+ .tc vgPlain_dispatch_ctr[TC],vgPlain_dispatch_ctr[RW]
+tocent__vgPlain_machine_ppc32_has_VMX:
+ .tc vgPlain_machine_ppc32_has_VMX[TC],vgPlain_machine_ppc32_has_VMX[=
RW]
+tocent__vgPlain_machine_ppc32_has_FP:
+ .tc vgPlain_machine_ppc32_has_FP[TC],vgPlain_machine_ppc32_has_FP[RW=
]
+tocent__vgPlain_tt_fast:
+ .tc vgPlain_tt_fast[TC],vgPlain_tt_fast[RW]
+ .csect .text[PR]
+ .align 2
+ .globl vgPlain_run_innerloop
+ .globl .vgPlain_run_innerloop
+ .csect vgPlain_run_innerloop[DS]
+vgPlain_run_innerloop:
+ .long .vgPlain_run_innerloop, TOC[tc0], 0
+ .csect .text[PR]
+
+/*----------------------------------------------------*/
+/*--- Preamble (set everything up) ---*/
+/*----------------------------------------------------*/
+
+/* signature:
+UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling );
+*/
+.vgPlain_run_innerloop:
+ /* r3 holds guest_state */
+ /* r4 holds do_profiling */
+ /* Rather than attempt to make sense of the AIX ABI, just
+ drop r1 by 256 (to get away from the caller's frame), then
+ 512 (to give ourselves a 512-byte save area), and then
+ another 256 (to clear our save area). In all, drop r1 by 1024
+ and dump stuff on the stack at 256(1)..768(1). */
+
+ /* ----- entry point to VG_(run_innerloop) ----- */
+ /* For AIX/ppc32 we do: LR-> +8(parent_sp), CR-> +4(parent_sp) =
*/
+
+ /* Save lr and cr*/
+ mflr 0
+ stw 0,8(1)
+ mfcr 0
+ stw 0,4(1)
+
+ /* New stack frame */
+ stwu 1,-1024(1) /* sp should maintain 16-byte alignment */
+
+ /* Save callee-saved registers... */
+ /* r3, r4 are live here, so use r5 */
+ lwz 5,tocent__vgPlain_machine_ppc32_has_FP(2)
+ lwz 5,0(5)
+ cmplwi 5,0
+ beq LafterFP1
+
+ /* Floating-point reg save area : 144 bytes at r1[256..399] */
+ stfd 31,392(1)
+ stfd 30,384(1)
+ stfd 29,376(1)
+ stfd 28,368(1)
+ stfd 27,360(1)
+ stfd 26,352(1)
+ stfd 25,344(1)
+ stfd 24,336(1)
+ stfd 23,328(1)
+ stfd 22,320(1)
+ stfd 21,312(1)
+ stfd 20,304(1)
+ stfd 19,296(1)
+ stfd 18,288(1)
+ stfd 17,280(1)
+ stfd 16,272(1)
+ stfd 15,264(1)
+ stfd 14,256(1)
+LafterFP1:
+
+ /* General reg save area : 76 bytes at r1[400 .. 475] */
+ stw 31,472(1)
+ stw 30,468(1)
+ stw 29,464(1)
+ stw 28,460(1)
+ stw 27,456(1)
+ stw 26,452(1)
+ stw 25,448(1)
+ stw 24,444(1)
+ stw 23,440(1)
+ stw 22,436(1)
+ stw 21,432(1)
+ stw 20,428(1)
+ stw 19,424(1)
+ stw 18,420(1)
+ stw 17,416(1)
+ stw 16,412(1)
+ stw 15,408(1)
+ stw 14,404(1)
+ /* Probably not necessary to save r13 (thread-specific ptr),
+ as VEX stays clear of it... but what the hell. */
+ stw 13,400(1)
+
+ /* It's necessary to save/restore VRSAVE in the AIX / Darwin ABI=
.
+ The Linux kernel might not actually use VRSAVE for its intend=
ed
+ purpose, but it should be harmless to preserve anyway. */
+ /* r3, r4 are live here, so use r5 */
+ lwz 5,tocent__vgPlain_machine_ppc32_has_VMX(2)
+ lwz 5,0(5)
+ cmplwi 5,0
+ beq LafterVMX1
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* VRSAVE save word : 4 bytes at r1[476 .. 479] */
+// mfspr 5,256 /* vrsave reg is spr number 256 */
+// stw 5,476(1)
+//
+// /* Vector reg save area (quadword aligned):=20
+// 192 bytes at r1[480 .. 671] */
+// li 5,656
+// stvx 31,5,1
+// li 5,640
+// stvx 30,5,1
+// li 5,624
+// stvx 29,5,1
+// li 5,608
+// stvx 28,5,1
+// li 5,592
+// stvx 27,5,1
+// li 5,576
+// stvx 26,5,1
+// li 5,560
+// stvx 25,5,1
+// li 5,544
+// stvx 25,5,1
+// li 5,528
+// stvx 23,5,1
+// li 5,512
+// stvx 22,5,1
+// li 5,496
+// stvx 21,5,1
+// li 5,480
+// stvx 20,5,1
+LafterVMX1:
+
+ /* Local variable space... */
+ /* Put the original guest state pointer at r1[128]. We
+ will need to refer to it each time round the dispatch loop.
+ Apart from that, we can use r1[0 .. 128] and r1[132 .. 255]
+ as scratch space. */
+
+ /* r3 holds guest_state */
+ /* r4 holds do_profiling */
+ mr 31,3 /* r31 (generated code gsp) =3D r3 */
+ stw 3,128(1) /* stash orig guest_state ptr */
+
+ /* hold dispatch_ctr in r29 */
+ lwz 5,tocent__vgPlain_dispatch_ctr(2)
+ lwz 29,0(5)
+
+ /* set host FPU control word to the default mode expected=20
+ by VEX-generated code. See comments in libvex.h for
+ more info. */
+ lwz 5,tocent__vgPlain_machine_ppc32_has_FP(2)
+ lwz 5,0(5)
+ cmplwi 5,0
+ beq LafterFP2
+
+ /* get zero into f3 (tedious) */
+ /* note: fsub 3,3,3 is not a reliable way to do this,=20
+ since if f3 holds a NaN or similar then we don't necessarily
+ wind up with zero. */
+ li 5,0
+ stw 5,64(1) /* r1[64] is scratch */
+ lfs 3,64(1)
+ mtfsf 0xFF,3 /* fpscr =3D f3 */
+LafterFP2:
+
+ /* set host AltiVec control word to the default mode expected=20
+ by VEX-generated code. */
+ lwz 5,tocent__vgPlain_machine_ppc32_has_VMX(2)
+ lwz 5,0(5)
+ cmplwi 5,0
+ beq LafterVMX2
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// vspltisw 3,0x0 /* generate zero */
+// mtvscr 3
+LafterVMX2:
+
+ /* fetch %CIA into r3 */
+ lwz 3,OFFSET_ppc32_CIA(31)
+
+ /* fall into main loop (the right one) */
+ /* r4 =3D do_profiling. It's probably trashed after here,
+ but that's OK: we don't need it after here. */
+ cmplwi 4,0
+ beq VG_(run_innerloop__dispatch_unprofiled)
+ b VG_(run_innerloop__dispatch_profiled)
+ /*NOTREACHED*/
+
+/*----------------------------------------------------*/
+/*--- NO-PROFILING (standard) dispatcher ---*/
+/*----------------------------------------------------*/
+
+.globl VG_(run_innerloop__dispatch_unprofiled)
+VG_(run_innerloop__dispatch_unprofiled):
+ /* At entry: Live regs:
+ r1 (=3Dsp)
+ r3 (=3DCIA =3D next guest address)
+ r29 (=3Ddispatch_ctr)
+ r31 (=3Dguest_state)
+ Stack state:
+ 128(r1) (=3Dorig guest_state)
+ */
+
+ /* Has the guest state pointer been messed with? If yes, exit. */
+ lwz 5,128(1) /* original guest_state ptr */
+ cmpw 5,31
+ bne gsp_changed
+
+ /* save the jump address in the guest state */
+ stw 3,OFFSET_ppc32_CIA(31)
+
+ /* Are we out of timeslice? If yes, defer to scheduler. */
+ addi 29,29,-1
+ cmplwi 29,0
+ beq counter_is_zero
+
+ /* try a fast lookup in the translation cache */
+ /* r4 =3D VG_TT_FAST_HASH(addr) * sizeof(ULong*)
+ =3D ((r3 >>u 2) & VG_TT_FAST_MASK) << 2 */
+ rlwinm 4,3, 0, 32-2-VG_TT_FAST_BITS, 31-2
+
+ lwz 5,tocent__vgPlain_tt_fast(2) /* r5 =3D &tt_fast */
+
+ lwzx 5,5,4 /* r5 =3D tt_fast[r5] */
+
+ lwz 6,4(5) /* big-endian, so comparing 2nd 32bit word */
+ cmpw 3,6
+ bne fast_lookup_failed
+
+ /* Found a match. Call tce[1], which is 8 bytes along, since
+ each tce element is a 64-bit int. */
+ addi 8,5,8
+ mtlr 8
+
+ /* run the translation */
+ blrl
+
+ /* On return from guest code:
+ r3 holds destination (original) address.
+ r31 may be unchanged (guest_state), or may indicate further
+ details of the control transfer requested to *r3.
+ */
+
+ /* start over */
+ b VG_(run_innerloop__dispatch_unprofiled)
+ /*NOTREACHED*/
+
+/*----------------------------------------------------*/
+/*--- PROFILING dispatcher (can be much slower) ---*/
+/*----------------------------------------------------*/
+
+.globl VG_(run_innerloop__dispatch_profiled)
+VG_(run_innerloop__dispatch_profiled):
+ trap
+#if 0
+ /* At entry: Live regs:
+ r1 (=3Dsp)
+ r3 (=3DCIA =3D next guest address)
+ r29 (=3Ddispatch_ctr)
+ r31 (=3Dguest_state)
+ Stack state:
+ 44(r1) (=3Dorig guest_state)
+ */
+
+ /* Has the guest state pointer been messed with? If yes, exit. */
+ lwz 5,44(1) /* original guest_state ptr */
+ cmpw 5,31
+ bne gsp_changed
+
+ /* save the jump address in the guest state */
+ stw 3,OFFSET_ppc32_CIA(31)
+
+ /* Are we out of timeslice? If yes, defer to scheduler. */
+ subi 29,29,1
+ cmplwi 29,0
+ beq counter_is_zero
+
+ /* try a fast lookup in the translation cache */
+ /* r4 =3D VG_TT_FAST_HASH(addr) * sizeof(ULong*)
+ =3D ((r3 >>u 2) & VG_TT_FAST_MASK) << 2 */
+ rlwinm 4,3, 0, 32-2-VG_TT_FAST_BITS, 31-2=20
+ addis 5,4,VG_(tt_fast)@ha
+ lwz 5,VG_(tt_fast)@l(5)
+ lwz 6,4(5) /* big-endian, so comparing 2nd 32bit word */
+ cmpw 3,6
+ bne fast_lookup_failed
+
+ /* increment bb profile counter */
+ addis 6,4,VG_(tt_fastN)@ha
+ lwz 7,VG_(tt_fastN)@l(6)
+ lwz 8,0(7)
+ addi 8,8,1
+ stw 8,0(7)
+
+ /* Found a match. Call tce[1], which is 8 bytes along, since
+ each tce element is a 64-bit int. */
+ addi 8,5,8
+ mtlr 8
+
+ /* run the translation */
+ blrl
+
+ /* On return from guest code:
+ r3 holds destination (original) address.
+ r31 may be unchanged (guest_state), or may indicate further
+ details of the control transfer requested to *r3.
+ */
+
+ /* start over */
+ b VG_(run_innerloop__dispatch_profiled)
+ /*NOTREACHED*/
+#endif
+
+/*----------------------------------------------------*/
+/*--- exit points ---*/
+/*----------------------------------------------------*/
+
+gsp_changed:
+ /* Someone messed with the gsp (in r31). Have to
+ defer to scheduler to resolve this. dispatch ctr
+ is not yet decremented, so no need to increment. */
+ /* %CIA is NOT up to date here. First, need to write
+ %r3 back to %CIA, but without trashing %r31 since
+ that holds the value we want to return to the scheduler.
+ Hence use %r5 transiently for the guest state pointer. */
+ lwz 5,128(1) /* original guest_state ptr */
+ stw 3,OFFSET_ppc32_CIA(5)
+ mr 3,31 /* r3 =3D new gsp value */
+ b run_innerloop_exit
+ /*NOTREACHED*/
+
+counter_is_zero:
+ /* %CIA is up to date */
+ /* back out decrement of the dispatch counter */
+ addi 29,29,1
+ li 3,VG_TRC_INNER_COUNTERZERO
+ b run_innerloop_exit
+
+fast_lookup_failed:
+ /* %CIA is up to date */
+ /* back out decrement of the dispatch counter */
+ addi 29,29,1
+ li 3,VG_TRC_INNER_FASTMISS
+ b run_innerloop_exit
+
+
+
+/* All exits from the dispatcher go through here.
+ r3 holds the return value.=20
+*/
+run_innerloop_exit:=20
+ /* We're leaving. Check that nobody messed with
+ VSCR or FPSCR. */
+
+ /* Using r10 - value used again further on, so don't trash! */
+ lwz 10,tocent__vgPlain_machine_ppc32_has_FP(2)
+ lwz 10,0(10)
+ cmplwi 10,0
+ beq LafterFP8
+
+ /* Set fpscr back to a known state, since vex-generated code
+ may have messed with fpscr[rm]. */
+ li 5,0
+ stw 5,64(1) /* r1[64] is scratch */
+ lfs 3,64(1)
+ mtfsf 0xFF,3 /* fpscr =3D f3 */
+LafterFP8:
+
+ /* Using r11 - value used again further on, so don't trash! */
+ lwz 11,tocent__vgPlain_machine_ppc32_has_VMX(2)
+ lwz 11,0(11)
+ cmplwi 11,0
+ beq LafterVMX8
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* Check VSCR[NJ] =3D=3D 1 */
+// /* first generate 4x 0x00010000 */
+// vspltisw 4,0x1 /* 4x 0x00000001 */
+// vspltisw 5,0x0 /* zero */
+// vsldoi 6,4,5,0x2 /* <<2*8 =3D> 4x 0x00010000 =
*/
+// /* retrieve VSCR and mask wanted bits */
+// mfvscr 7
+// vand 7,7,6 /* gives NJ flag */
+// vspltw 7,7,0x3 /* flags-word to all lanes *=
/
+// vcmpequw. 8,6,7 /* CR[24] =3D 1 if v6 =3D=3D=
v7 */
+// bt 24,invariant_violation /* branch if all_equal */
+LafterVMX8:
+
+ /* otherwise we're OK */
+ b run_innerloop_exit_REALLY
+
+
+invariant_violation:
+ li 3,VG_TRC_INVARIANT_FAILED
+ b run_innerloop_exit_REALLY
+
+run_innerloop_exit_REALLY:
+ /* r3 holds VG_TRC_* value to return */
+
+ /* Write ctr to VG(dispatch_ctr) */
+ lwz 5,tocent__vgPlain_dispatch_ctr(2)
+ stw 29,0(5)
+
+ /* Restore callee-saved registers... */
+
+ /* r10 already holds VG_(machine_ppc32_has_FP) value */
+ cmplwi 10,0
+ beq LafterFP9
+
+ /* Floating-point regs */
+ lfd 31,392(1)
+ lfd 30,384(1)
+ lfd 29,376(1)
+ lfd 28,368(1)
+ lfd 27,360(1)
+ lfd 26,352(1)
+ lfd 25,344(1)
+ lfd 24,336(1)
+ lfd 23,328(1)
+ lfd 22,320(1)
+ lfd 21,312(1)
+ lfd 20,304(1)
+ lfd 19,296(1)
+ lfd 18,288(1)
+ lfd 17,280(1)
+ lfd 16,272(1)
+ lfd 15,264(1)
+ lfd 14,256(1)
+LafterFP9:
+
+ /* General regs */
+ lwz 31,472(1)
+ lwz 30,468(1)
+ lwz 29,464(1)
+ lwz 28,460(1)
+ lwz 27,456(1)
+ lwz 26,452(1)
+ lwz 25,448(1)
+ lwz 24,444(1)
+ lwz 23,440(1)
+ lwz 22,436(1)
+ lwz 21,432(1)
+ lwz 20,428(1)
+ lwz 19,424(1)
+ lwz 18,420(1)
+ lwz 17,416(1)
+ lwz 16,412(1)
+ lwz 15,408(1)
+ lwz 14,404(1)
+ lwz 13,400(1)
+
+ /* r11 already holds VG_(machine_ppc32_has_VMX) value */
+ cmplwi 11,0
+ beq LafterVMX9
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* VRSAVE */
+// lwz 4,476(1)
+// mtspr 4,256 /* VRSAVE reg is spr number 256 */
+//
+// /* Vector regs */
+// li 4,656
+// lvx 31,4,1
+// li 4,640
+// lvx 30,4,1
+// li 4,624
+// lvx 29,4,1
+// li 4,608
+// lvx 28,4,1
+// li 4,592
+// lvx 27,4,1
+// li 4,576
+// lvx 26,4,1
+// li 4,560
+// lvx 25,4,1
+// li 4,544
+// lvx 24,4,1
+// li 4,528
+// lvx 23,4,1
+// li 4,512
+// lvx 22,4,1
+// li 4,496
+// lvx 21,4,1
+// li 4,480
+// lvx 20,4,1
+LafterVMX9:
+
+ /* r3 is live here; don't trash it */
+ /* restore lr,cr,sp */
+ addi 4,1,1024 /* r4 =3D old SP */
+ lwz 0,8(4)
+ mtlr 0
+ lwz 0,4(4)
+ mtcr 0
+ mr 1,4
+ blr
+
+LT..vgPlain_run_innerloop:
+ .long 0
+ .byte 0,0,32,64,0,0,2,0
+ .long 0
+ .long LT..vgPlain_run_innerloop-.vgPlain_run_innerloop
+ .short 13
+ .byte "vgPlain_run_innerloop"
+ .align 2
+_section_.text:
+ .csect .data[RW],3
+ .long _section_.text
+
+/*------------------------------------------------------------*/
+/*--- ---*/
+/*--- A special dispatcher, for running no-redir ---*/
+/*--- translations. Just runs the given translation once. ---*/
+/*--- ---*/
+/*------------------------------------------------------------*/
+=09
+/* signature:
+void VG_(run_a_noredir_translation) ( UWord* argblock );
+*/
+
+/* Run a no-redir translation. argblock points to 4 UWords, 2 to carry =
args
+ and 2 to carry results:
+ 0: input: ptr to translation
+ 1: input: ptr to guest state
+ 2: output: next guest PC
+ 3: output: guest state pointer afterwards (=3D=3D thread return co=
de)
+*/
+.csect .text[PR]
+.align 2
+.globl .VG_(run_a_noredir_translation)
+.VG_(run_a_noredir_translation):
+
+ /* Rather than attempt to make sense of the AIX ABI, just
+ drop r1 by 256 (to get away from the caller's frame), then
+ 512 (to give ourselves a 512-byte save area), and then
+ another 256 (to clear our save area). In all, drop r1 by 1024
+ and dump stuff on the stack at 256(1)..768(1). */
+ /* At entry, r3 points to argblock */
+
+ /* ----- entry point to VG_(run_innerloop) ----- */
+ /* For AIX/ppc32 we do: LR-> +8(parent_sp), CR-> +4(parent_sp) =
*/
+
+ /* Save lr and cr*/
+ mflr 0
+ stw 0,8(1)
+ mfcr 0
+ stw 0,4(1)
+
+ /* New stack frame */
+ stwu 1,-1024(1) /* sp should maintain 16-byte alignment */
+
+ /* General reg save area : 76 bytes at r1[400 .. 475] */
+ stw 31,472(1)
+ stw 30,468(1)
+ stw 29,464(1)
+ stw 28,460(1)
+ stw 27,456(1)
+ stw 26,452(1)
+ stw 25,448(1)
+ stw 24,444(1)
+ stw 23,440(1)
+ stw 22,436(1)
+ stw 21,432(1)
+ stw 20,428(1)
+ stw 19,424(1)
+ stw 18,420(1)
+ stw 17,416(1)
+ stw 16,412(1)
+ stw 15,408(1)
+ stw 14,404(1)
+ stw 13,400(1)
+ stw 3,396(1) /* will need it later */
+=09
+ lwz 31,4(3) /* rd argblock[1] */
+ lwz 30,0(3) /* rd argblock[0] */
+ mtlr 30 /* run translation */
+ blrl
+
+ lwz 4,396(1) /* &argblock */
+ stw 3, 8(4) /* wr argblock[2] */
+ stw 31,12(4) /* wr argblock[3] */
+ =09
+ /* General regs */
+ lwz 31,472(1)
+ lwz 30,468(1)
+ lwz 29,464(1)
+ lwz 28,460(1)
+ lwz 27,456(1)
+ lwz 26,452(1)
+ lwz 25,448(1)
+ lwz 24,444(1)
+ lwz 23,440(1)
+ lwz 22,436(1)
+ lwz 21,432(1)
+ lwz 20,428(1)
+ lwz 19,424(1)
+ lwz 18,420(1)
+ lwz 17,416(1)
+ lwz 16,412(1)
+ lwz 15,408(1)
+ lwz 14,404(1)
+ lwz 13,400(1)
+
+ /* restore lr,cr,sp */
+ addi 4,1,1024 /* r4 =3D old SP */
+ lwz 0,8(4)
+ mtlr 0
+ lwz 0,4(4)
+ mtcr 0
+ mr 1,4
+ blr
+
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-aix5.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-aix5.S =
(rev 0)
+++ branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-aix5.S 2006-09-30 1=
0:51:40 UTC (rev 6099)
@@ -0,0 +1,654 @@
+
+/*--------------------------------------------------------------------*/
+/*--- The core dispatch loop, for jumping to a code address. ---*/
+/*--- dispatch-ppc64-aix5.S ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics_asm.h"
+#include "pub_core_dispatch_asm.h"
+#include "pub_core_transtab_asm.h"
+#include "libvex_guest_offsets.h" /* for OFFSET_ppc64_CIA */
+
+
+/*------------------------------------------------------------*/
+/*--- ---*/
+/*--- The dispatch loop. VG_(run_innerloop) is used to ---*/
+/*--- run all translations except no-redir ones. ---*/
+/*--- ---*/
+/*------------------------------------------------------------*/
+
+/*----------------------------------------------------*/
+/*--- Incomprehensible TOC mumbo-jumbo nonsense. ---*/
+/*----------------------------------------------------*/
+
+/* No, I don't have a clue either. I just compiled a bit of
+ C with gcc and copied the assembly code it produced. */
+
+/* Basically "ld rd, tocent__foo(2)" gets &foo into rd. */
+
+ .file "dispatch-ppc64-aix5.S"
+ .machine "ppc64"
+ .toc
+ .csect .text[PR]
+ .toc
+tocent__vgPlain_dispatch_ctr:
+ .tc vgPlain_dispatch_ctr[TC],vgPlain_dispatch_ctr[RW]
+tocent__vgPlain_machine_ppc64_has_VMX:
+ .tc vgPlain_machine_ppc64_has_VMX[TC],vgPlain_machine_ppc64_has_VMX[=
RW]
+tocent__vgPlain_tt_fast:
+ .tc vgPlain_tt_fast[TC],vgPlain_tt_fast[RW]
+ .csect .text[PR]
+ .align 2
+ .globl vgPlain_run_innerloop
+ .globl .vgPlain_run_innerloop
+ .csect vgPlain_run_innerloop[DS]
+vgPlain_run_innerloop:
+ .llong .vgPlain_run_innerloop, TOC[tc0], 0
+ .csect .text[PR]
+
+/*----------------------------------------------------*/
+/*--- Preamble (set everything up) ---*/
+/*----------------------------------------------------*/
+
+/* signature:
+UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling );
+*/
+.vgPlain_run_innerloop:
+
+ /* r3 holds guest_state */
+ /* r4 holds do_profiling */
+ /* Rather than attempt to make sense of the AIX ABI, just
+ drop r1 by 512 (to get away from the caller's frame), then
+ 1024 (to give ourselves a 1024-byte save area), and then
+ another 512 (to clear our save area). In all, drop r1 by 2048
+ and dump stuff on the stack at 512(1)..1536(1). */
+
+ /* ----- entry point to VG_(run_innerloop) ----- */
+ /* For AIX/ppc64 we do: LR-> +16(parent_sp), CR-> +8(parent_sp)=
*/
+
+ /* Save lr and cr*/
+ mflr 0
+ std 0,16(1)
+ mfcr 0
+ std 0,8(1)
+
+ /* New stack frame */
+ stdu 1,-2048(1) /* sp should maintain 16-byte alignment */
+
+ /* Save callee-saved registers... */
+ /* r3, r4 are live here, so use r5 */
+
+ /* Floating-point reg save area : 144 bytes at r1[256+256..256+3=
99] */
+ stfd 31,256+392(1)
+ stfd 30,256+384(1)
+ stfd 29,256+376(1)
+ stfd 28,256+368(1)
+ stfd 27,256+360(1)
+ stfd 26,256+352(1)
+ stfd 25,256+344(1)
+ stfd 24,256+336(1)
+ stfd 23,256+328(1)
+ stfd 22,256+320(1)
+ stfd 21,256+312(1)
+ stfd 20,256+304(1)
+ stfd 19,256+296(1)
+ stfd 18,256+288(1)
+ stfd 17,256+280(1)
+ stfd 16,256+272(1)
+ stfd 15,256+264(1)
+ stfd 14,256+256(1)
+
+ /* General reg save area : 76 bytes at r1[256+400 .. 256+543] */
+ std 31,256+544(1)
+ std 30,256+536(1)
+ std 29,256+528(1)
+ std 28,256+520(1)
+ std 27,256+512(1)
+ std 26,256+504(1)
+ std 25,256+496(1)
+ std 24,256+488(1)
+ std 23,256+480(1)
+ std 22,256+472(1)
+ std 21,256+464(1)
+ std 20,256+456(1)
+ std 19,256+448(1)
+ std 18,256+440(1)
+ std 17,256+432(1)
+ std 16,256+424(1)
+ std 15,256+416(1)
+ std 14,256+408(1)
+ /* Probably not necessary to save r13 (thread-specific ptr),
+ as VEX stays clear of it... but what the hell. */
+ std 13,256+400(1)
+
+ /* It's necessary to save/restore VRSAVE in the AIX / Darwin ABI=
.
+ The Linux kernel might not actually use VRSAVE for its intend=
ed
+ purpose, but it should be harmless to preserve anyway. */
+ /* r3, r4 are live here, so use r5 */
+ ld 5,tocent__vgPlain_machine_ppc64_has_VMX(2)
+ ld 5,0(5)
+ cmpldi 5,0
+ beq LafterVMX1
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* VRSAVE save word : 4 bytes at r1[476 .. 479] */
+// mfspr 5,256 /* vrsave reg is spr number 256 */
+// stw 5,476(1)
+//
+// /* Vector reg save area (quadword aligned):=20
+// 192 bytes at r1[480 .. 671] */
+// li 5,656
+// stvx 31,5,1
+// li 5,640
+// stvx 30,5,1
+// li 5,624
+// stvx 29,5,1
+// li 5,608
+// stvx 28,5,1
+// li 5,592
+// stvx 27,5,1
+// li 5,576
+// stvx 26,5,1
+// li 5,560
+// stvx 25,5,1
+// li 5,544
+// stvx 25,5,1
+// li 5,528
+// stvx 23,5,1
+// li 5,512
+// stvx 22,5,1
+// li 5,496
+// stvx 21,5,1
+// li 5,480
+// stvx 20,5,1
+LafterVMX1:
+
+ /* Local variable space... */
+ /* Put the original guest state pointer at r1[256]. We
+ will need to refer to it each time round the dispatch loop.
+ Apart from that, we can use r1[0 .. 255] and r1[264 .. 511]
+ as scratch space. */
+
+ /* r3 holds guest_state */
+ /* r4 holds do_profiling */
+ mr 31,3 /* r31 (generated code gsp) =3D r3 */
+ std 3,256(1) /* stash orig guest_state ptr */
+
+ /* hold dispatch_ctr (NOTE: 32-bit value) in r29 */
+ ld 5,tocent__vgPlain_dispatch_ctr(2)
+ lwz 29,0(5)
+
+ /* set host FPU control word to the default mode expected=20
+ by VEX-generated code. See comments in libvex.h for
+ more info. */
+ /* get zero into f3 (tedious) */
+ /* note: fsub 3,3,3 is not a reliable way to do this,=20
+ since if f3 holds a NaN or similar then we don't necessarily
+ wind up with zero. */
+ li 5,0
+ std 5,128(1) /* r1[128] is scratch */
+ lfd 3,128(1)
+ mtfsf 0xFF,3 /* fpscr =3D f3 */
+
+ /* set host AltiVec control word to the default mode expected=20
+ by VEX-generated code. */
+ ld 5,tocent__vgPlain_machine_ppc64_has_VMX(2)
+ ld 5,0(5)
+ cmpldi 5,0
+ beq LafterVMX2
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// vspltisw 3,0x0 /* generate zero */
+// mtvscr 3
+LafterVMX2:
+
+ /* fetch %CIA into r3 */
+ ld 3,OFFSET_ppc64_CIA(31)
+
+ /* fall into main loop (the right one) */
+ /* r4 =3D do_profiling. It's probably trashed after here,
+ but that's OK: we don't need it after here. */
+ cmpldi 4,0
+ beq VG_(run_innerloop__dispatch_unprofiled)
+ b VG_(run_innerloop__dispatch_profiled)
+ /*NOTREACHED*/
+
+/*----------------------------------------------------*/
+/*--- NO-PROFILING (standard) dispatcher ---*/
+/*----------------------------------------------------*/
+
+.globl VG_(run_innerloop__dispatch_unprofiled)
+VG_(run_innerloop__dispatch_unprofiled):
+ /* At entry: Live regs:
+ r1 (=3Dsp)
+ r3 (=3DCIA =3D next guest address)
+ r29 (=3Ddispatch_ctr)
+ r31 (=3Dguest_state)
+ Stack state:
+ 256(r1) (=3Dorig guest_state)
+ */
+
+ /* Has the guest state pointer been messed with? If yes, exit. */
+ ld 5,256(1) /* original guest_state ptr */
+ cmpd 5,31
+ bne gsp_changed
+
+ /* save the jump address in the guest state */
+ std 3,OFFSET_ppc64_CIA(31)
+
+ /* Are we out of timeslice? If yes, defer to scheduler. */
+ addi 29,29,-1
+ cmplwi 29,0 /* yes, lwi - is 32-bit */
+ beq counter_is_zero
+
+ /* try a fast lookup in the translation cache */
+ /* r4 =3D VG_TT_FAST_HASH(addr) * sizeof(ULong*)
+ =3D ((r3 >>u 2) & VG_TT_FAST_MASK) << 3 */
+ rldicl 4,3, 62, 64-VG_TT_FAST_BITS
+ sldi 4,4,3
+
+ ld 5,tocent__vgPlain_tt_fast(2) /* r5 =3D &tt_fast */
+
+ ldx 5,5,4 /* r5 =3D VG_(tt_fast)[VG_TT_FAST_HASH(addr)] */
+ ld 6,0(5) /* r6 =3D (r5)->orig_addr */
+ cmpd 3,6
+ bne fast_lookup_failed
+
+ /* Found a match. Call tce[1], which is 8 bytes along, since
+ each tce element is a 64-bit int. */
+ addi 8,5,8
+ mtlr 8
+
+ /* run the translation */
+ blrl
+
+ /* On return from guest code:
+ r3 holds destination (original) address.
+ r31 may be unchanged (guest_state), or may indicate further
+ details of the control transfer requested to *r3.
+ */
+
+ /* start over */
+ b VG_(run_innerloop__dispatch_unprofiled)
+ /*NOTREACHED*/
+
+/*----------------------------------------------------*/
+/*--- PROFILING dispatcher (can be much slower) ---*/
+/*----------------------------------------------------*/
+
+.globl VG_(run_innerloop__dispatch_profiled)
+VG_(run_innerloop__dispatch_profiled):
+ trap
+#if 0
+ /* At entry: Live regs:
+ r1 (=3Dsp)
+ r3 (=3DCIA =3D next guest address)
+ r29 (=3Ddispatch_ctr)
+ r31 (=3Dguest_state)
+ Stack state:
+ 44(r1) (=3Dorig guest_state)
+ */
+
+ /* Has the guest state pointer been messed with? If yes, exit. */
+ lwz 5,44(1) /* original guest_state ptr */
+ cmpw 5,31
+ bne gsp_changed
+
+ /* save the jump address in the guest state */
+ stw 3,OFFSET_ppc32_CIA(31)
+
+ /* Are we out of timeslice? If yes, defer to scheduler. */
+ subi 29,29,1
+ cmplwi 29,0
+ beq counter_is_zero
+
+ /* try a fast lookup in the translation cache */
+ /* r4 =3D VG_TT_FAST_HASH(addr) * sizeof(ULong*)
+ =3D ((r3 >>u 2) & VG_TT_FAST_MASK) << 2 */
+ rlwinm 4,3, 0, 32-2-VG_TT_FAST_BITS, 31-2=20
+ addis 5,4,VG_(tt_fast)@ha
+ lwz 5,VG_(tt_fast)@l(5)
+ lwz 6,4(5) /* big-endian, so comparing 2nd 32bit word */
+ cmpw 3,6
+ bne fast_lookup_failed
+
+ /* increment bb profile counter */
+ addis 6,4,VG_(tt_fastN)@ha
+ lwz 7,VG_(tt_fastN)@l(6)
+ lwz 8,0(7)
+ addi 8,8,1
+ stw 8,0(7)
+
+ /* Found a match. Call tce[1], which is 8 bytes along, since
+ each tce element is a 64-bit int. */
+ addi 8,5,8
+ mtlr 8
+
+ /* run the translation */
+ blrl
+
+ /* On return from guest code:
+ r3 holds destination (original) address.
+ r31 may be unchanged (guest_state), or may indicate further
+ details of the control transfer requested to *r3.
+ */
+
+ /* start over */
+ b VG_(run_innerloop__dispatch_profiled)
+ /*NOTREACHED*/
+#endif
+
+/*----------------------------------------------------*/
+/*--- exit points ---*/
+/*----------------------------------------------------*/
+
+gsp_changed:
+ /* Someone messed with the gsp (in r31). Have to
+ defer to scheduler to resolve this. dispatch ctr
+ is not yet decremented, so no need to increment. */
+ /* %CIA is NOT up to date here. First, need to write
+ %r3 back to %CIA, but without trashing %r31 since
+ that holds the value we want to return to the scheduler.
+ Hence use %r5 transiently for the guest state pointer. */
+ ld 5,256(1) /* original guest_state ptr */
+ std 3,OFFSET_ppc64_CIA(5)
+ mr 3,31 /* r3 =3D new gsp value */
+ b run_innerloop_exit
+ /*NOTREACHED*/
+
+counter_is_zero:
+ /* %CIA is up to date */
+ /* back out decrement of the dispatch counter */
+ addi 29,29,1
+ li 3,VG_TRC_INNER_COUNTERZERO
+ b run_innerloop_exit
+
+fast_lookup_failed:
+ /* %CIA is up to date */
+ /* back out decrement of the dispatch counter */
+ addi 29,29,1
+ li 3,VG_TRC_INNER_FASTMISS
+ b run_innerloop_exit
+
+
+
+/* All exits from the dispatcher go through here.
+ r3 holds the return value.=20
+*/
+run_innerloop_exit:=20
+ /* We're leaving. Check that nobody messed with
+ VSCR or FPSCR. */
+
+ /* Set fpscr back to a known state, since vex-generated code
+ may have messed with fpscr[rm]. */
+ li 5,0
+ std 5,128(1) /* r1[128] is scratch */
+ lfd 3,128(1)
+ mtfsf 0xFF,3 /* fpscr =3D f3 */
+
+ /* Using r11 - value used again further on, so don't trash! */
+ ld 11,tocent__vgPlain_machine_ppc64_has_VMX(2)
+ ld 11,0(11)
+ cmpldi 11,0
+ beq LafterVMX8
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* Check VSCR[NJ] =3D=3D 1 */
+// /* first generate 4x 0x00010000 */
+// vspltisw 4,0x1 /* 4x 0x00000001 */
+// vspltisw 5,0x0 /* zero */
+// vsldoi 6,4,5,0x2 /* <<2*8 =3D> 4x 0x00010000 =
*/
+// /* retrieve VSCR and mask wanted bits */
+// mfvscr 7
+// vand 7,7,6 /* gives NJ flag */
+// vspltw 7,7,0x3 /* flags-word to all lanes *=
/
+// vcmpequw. 8,6,7 /* CR[24] =3D 1 if v6 =3D=3D=
v7 */
+// bt 24,invariant_violation /* branch if all_equal */
+LafterVMX8:
+
+ /* otherwise we're OK */
+ b run_innerloop_exit_REALLY
+
+
+invariant_violation:
+ li 3,VG_TRC_INVARIANT_FAILED
+ b run_innerloop_exit_REALLY
+
+run_innerloop_exit_REALLY:
+ /* r3 holds VG_TRC_* value to return */
+
+ /* Write ctr to VG(dispatch_ctr) */
+ ld 5,tocent__vgPlain_dispatch_ctr(2)
+ stw 29,0(5) /* yes, really stw */
+
+ /* Restore callee-saved registers... */
+
+ /* Floating-point regs */
+ lfd 31,256+392(1)
+ lfd 30,256+384(1)
+ lfd 29,256+376(1)
+ lfd 28,256+368(1)
+ lfd 27,256+360(1)
+ lfd 26,256+352(1)
+ lfd 25,256+344(1)
+ lfd 24,256+336(1)
+ lfd 23,256+328(1)
+ lfd 22,256+320(1)
+ lfd 21,256+312(1)
+ lfd 20,256+304(1)
+ lfd 19,256+296(1)
+ lfd 18,256+288(1)
+ lfd 17,256+280(1)
+ lfd 16,256+272(1)
+ lfd 15,256+264(1)
+ lfd 14,256+256(1)
+
+ /* General regs */
+ ld 31,256+544(1)
+ ld 30,256+536(1)
+ ld 29,256+528(1)
+ ld 28,256+520(1)
+ ld 27,256+512(1)
+ ld 26,256+504(1)
+ ld 25,256+496(1)
+ ld 24,256+488(1)
+ ld 23,256+480(1)
+ ld 22,256+472(1)
+ ld 21,256+464(1)
+ ld 20,256+456(1)
+ ld 19,256+448(1)
+ ld 18,256+440(1)
+ ld 17,256+432(1)
+ ld 16,256+424(1)
+ ld 15,256+416(1)
+ ld 14,256+408(1)
+ ld 13,256+400(1)
+
+ /* r11 already holds VG_(machine_ppc64_has_VMX) value */
+ cmpldi 11,0
+ beq LafterVMX9
+
+// Sigh. AIX 5.2 has no idea that Altivec exists.
+// /* VRSAVE */
+// lwz 4,476(1)
+// mtspr 4,256 /* VRSAVE reg is spr number 256 */
+//
+// /* Vector regs */
+// li 4,656
+// lvx 31,4,1
+// li 4,640
+// lvx 30,4,1
+// li 4,624
+// lvx 29,4,1
+// li 4,608
+// lvx 28,4,1
+// li 4,592
+// lvx 27,4,1
+// li 4,576
+// lvx 26,4,1
+// li 4,560
+// lvx 25,4,1
+// li 4,544
+// lvx 24,4,1
+// li 4,528
+// lvx 23,4,1
+// li 4,512
+// lvx 22,4,1
+// li 4,496
+// lvx 21,4,1
+// li 4,480
+// lvx 20,4,1
+LafterVMX9:
+
+ /* r3 is live here; don't trash it */
+ /* restore lr,cr,sp */
+ addi 4,1,2048 /* r4 =3D old SP */
+ ld 0,16(4)
+ mtlr 0
+ ld 0,8(4)
+ mtcr 0
+ mr 1,4
+ blr
+
+LT..vgPlain_run_innerloop:
+ .long 0
+ .byte 0,0,32,64,0,0,1,0
+ .long 0
+ .long LT..vgPlain_run_innerloop-.vgPlain_run_innerloop
+ .short 3
+ .byte "vgPlain_run_innerloop"
+ .align 2
+_section_.text:
+ .csect .data[RW],3
+ .llong _section_.text
+
+/*------------------------------------------------------------*/
+/*--- ---*/
+/*--- A special dispatcher, for running no-redir ---*/
+/*--- translations. Just runs the given translation once. ---*/
+/*--- ---*/
+/*------------------------------------------------------------*/
+=09
+/* signature:
+void VG_(run_a_noredir_translation) ( UWord* argblock );
+*/
+
+/* Run a no-redir translation. argblock points to 4 UWords, 2 to carry =
args
+ and 2 to carry results:
+ 0: input: ptr to translation
+ 1: input: ptr to guest state
+ 2: output: next guest PC
+ 3: output: guest state pointer afterwards (=3D=3D thread return co=
de)
+*/
+.csect .text[PR]
+.align 2
+.globl .VG_(run_a_noredir_translation)
+.VG_(run_a_noredir_translation):
+ /* Rather than attempt to make sense of the AIX ABI, just
+ drop r1 by 512 (to get away from the caller's frame), then
+ 1024 (to give ourselves a 1024-byte save area), and then
+ another 1024 (to clear our save area). In all, drop r1 by 2048
+ and dump stuff on the stack at 512(1)..1536(1). */
+ /* At entry, r3 points to argblock */
+
+ /* ----- entry point to VG_(run_innerloop) ----- */
+ /* For AIX/ppc64 we do: LR-> +16(parent_sp), CR-> +8(parent_sp)=
*/
+
+ /* Save lr and cr*/
+ mflr 0
+ std 0,16(1)
+ mfcr 0
+ std 0,8(1)
+
+ /* New stack frame */
+ stdu 1,-2048(1) /* sp should maintain 16-byte alignment */
+
+ /* General reg save area : 160 bytes at r1[512 .. 671] */
+ std 31,664(1)
+ std 30,656(1)
+ std 29,648(1)
+ std 28,640(1)
+ std 27,632(1)
+ std 26,624(1)
+ std 25,616(1)
+ std 24,608(1)
+ std 23,600(1)
+ std 22,592(1)
+ std 21,584(1)
+ std 20,576(1)
+ std 19,568(1)
+ std 18,560(1)
+ std 17,552(1)
+ std 16,544(1)
+ std 15,536(1)
+ std 14,528(1)
+ std 13,520(1)
+ std 3,512(1) /* will need it later */
+=09
+ ld 31,8(3) /* rd argblock[1] */
+ ld 30,0(3) /* rd argblock[0] */
+ mtlr 30 /* run translation */
+ blrl
+
+ ld 4,512(1) /* &argblock */
+ std 3, 16(4) /* wr argblock[2] */
+ std 31,24(4) /* wr argblock[3] */
+ =09
+ /* General regs */
+ ld 31,664(1)
+ ld 30,656(1)
+ ld 29,648(1)
+ ld 28,640(1)
+ ld 27,632(1)
+ ld 26,624(1)
+ ld 25,616(1)
+ ld 24,608(1)
+ ld 23,600(1)
+ ld 22,592(1)
+ ld 21,584(1)
+ ld 20,576(1)
+ ld 19,568(1)
+ ld 18,560(1)
+ ld 17,552(1)
+ ld 16,544(1)
+ ld 15,536(1)
+ ld 14,528(1)
+ ld 13,520(1)
+
+ /* restore lr,cr,sp */
+ addi 4,1,2048 /* r4 =3D old SP */
+ ld 0,16(4)
+ mtlr 0
+ ld 0,8(4)
+ mtcr 0
+ mr 1,4
+ blr
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-09-30 10:44:54
|
Author: sewardj Date: 2006-09-30 11:44:52 +0100 (Sat, 30 Sep 2006) New Revision: 6098 Log: Comment-only changes. Modified: branches/AIX5/coregrind/m_dispatch/dispatch-amd64-linux.S branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-linux.S branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-linux.S branches/AIX5/coregrind/m_dispatch/dispatch-x86-linux.S Modified: branches/AIX5/coregrind/m_dispatch/dispatch-amd64-linux.S =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/coregrind/m_dispatch/dispatch-amd64-linux.S 2006-09-30 = 10:41:48 UTC (rev 6097) +++ branches/AIX5/coregrind/m_dispatch/dispatch-amd64-linux.S 2006-09-30 = 10:44:52 UTC (rev 6098) @@ -1,7 +1,7 @@ =20 /*--------------------------------------------------------------------*/ /*--- The core dispatch loop, for jumping to a code address. ---*/ -/*--- dispatch-amd64.S ---*/ +/*--- dispatch-amd64-linux.S ---*/ /*--------------------------------------------------------------------*/ =20 /* Modified: branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-linux.S =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-linux.S 2006-09-30 = 10:41:48 UTC (rev 6097) +++ branches/AIX5/coregrind/m_dispatch/dispatch-ppc32-linux.S 2006-09-30 = 10:44:52 UTC (rev 6098) @@ -1,7 +1,7 @@ =20 /*--------------------------------------------------------------------*/ /*--- The core dispatch loop, for jumping to a code address. ---*/ -/*--- dispatch-ppc32.S ---*/ +/*--- dispatch-ppc32-linux.S ---*/ /*--------------------------------------------------------------------*/ =20 /* Modified: branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-linux.S =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-linux.S 2006-09-30 = 10:41:48 UTC (rev 6097) +++ branches/AIX5/coregrind/m_dispatch/dispatch-ppc64-linux.S 2006-09-30 = 10:44:52 UTC (rev 6098) @@ -1,7 +1,7 @@ =20 /*--------------------------------------------------------------------*/ /*--- The core dispatch loop, for jumping to a code address. ---*/ -/*--- dispatch-ppc64.S ---*/ +/*--- dispatch-ppc64-linux.S ---*/ /*--------------------------------------------------------------------*/ =20 /* Modified: branches/AIX5/coregrind/m_dispatch/dispatch-x86-linux.S =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/coregrind/m_dispatch/dispatch-x86-linux.S 2006-09-30 10= :41:48 UTC (rev 6097) +++ branches/AIX5/coregrind/m_dispatch/dispatch-x86-linux.S 2006-09-30 10= :44:52 UTC (rev 6098) @@ -1,7 +1,7 @@ =20 /*--------------------------------------------------------------------*/ /*--- The core dispatch loop, for jumping to a code address. ---*/ -/*--- dispatch-x86.S ---*/ +/*--- dispatch-x86-linux.S ---*/ /*--------------------------------------------------------------------*/ =20 /* |
|
From: <sv...@va...> - 2006-09-30 10:41:50
|
Author: sewardj
Date: 2006-09-30 11:41:48 +0100 (Sat, 30 Sep 2006)
New Revision: 6097
Log:
Stub implementation for AIX5.
Added:
branches/AIX5/coregrind/m_coredump/coredump-ppc32-aix5.c
branches/AIX5/coregrind/m_coredump/coredump-ppc64-aix5.c
Added: branches/AIX5/coregrind/m_coredump/coredump-ppc32-aix5.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-ppc32-aix5.c =
(rev 0)
+++ branches/AIX5/coregrind/m_coredump/coredump-ppc32-aix5.c 2006-09-30 1=
0:41:48 UTC (rev 6097)
@@ -0,0 +1,43 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Dumping core. coredump-ppc32-aix5.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics.h"
+#include "pub_core_vki.h"
+#include "pub_core_libcassert.h"
+#include "pub_core_coredump.h" /* self */
+
+void VG_(make_coredump)(ThreadId tid, const vki_siginfo_t *si, UInt max_=
size)
+{
+ /* not implemented */
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/coregrind/m_coredump/coredump-ppc64-aix5.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-ppc64-aix5.c =
(rev 0)
+++ branches/AIX5/coregrind/m_coredump/coredump-ppc64-aix5.c 2006-09-30 1=
0:41:48 UTC (rev 6097)
@@ -0,0 +1,43 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Dumping core. coredump-ppc64-aix5.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics.h"
+#include "pub_core_vki.h"
+#include "pub_core_libcassert.h"
+#include "pub_core_coredump.h" /* self */
+
+void VG_(make_coredump)(ThreadId tid, const vki_siginfo_t *si, UInt max_=
size)
+{
+ /* not implemented */
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-09-30 10:39:40
|
Author: sewardj
Date: 2006-09-30 11:39:37 +0100 (Sat, 30 Sep 2006)
New Revision: 6096
Log:
Minor naming / const-ness changes.
Modified:
branches/AIX5/coregrind/m_coredump/coredump-amd64-linux.c
branches/AIX5/coregrind/m_coredump/coredump-elf.c
branches/AIX5/coregrind/m_coredump/coredump-ppc32-linux.c
branches/AIX5/coregrind/m_coredump/coredump-ppc64-linux.c
branches/AIX5/coregrind/m_coredump/coredump-x86-linux.c
Modified: branches/AIX5/coregrind/m_coredump/coredump-amd64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-amd64-linux.c 2006-09-30 =
10:34:43 UTC (rev 6095)
+++ branches/AIX5/coregrind/m_coredump/coredump-amd64-linux.c 2006-09-30 =
10:39:37 UTC (rev 6096)
@@ -29,6 +29,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
#include "pub_core_libcbase.h"
#include "pub_core_coredump.h"
#include "pub_core_threadstate.h"
Modified: branches/AIX5/coregrind/m_coredump/coredump-elf.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-elf.c 2006-09-30 10:34:43=
UTC (rev 6095)
+++ branches/AIX5/coregrind/m_coredump/coredump-elf.c 2006-09-30 10:39:37=
UTC (rev 6096)
@@ -29,6 +29,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
#include "pub_core_aspacemgr.h"
#include "pub_core_libcbase.h"
#include "pub_core_machine.h"
@@ -289,7 +290,7 @@
Char *coreext =3D "";
Int seq =3D 0;
Int core_fd;
- NSegment *seg;
+ NSegment const * seg;
ESZ(Ehdr) ehdr;
ESZ(Phdr) *phdrs;
Int num_phdrs;
@@ -322,11 +323,11 @@
VKI_O_CREAT|VKI_O_WRONLY|VKI_O_EXCL|VKI_O_TRUNC,=20
VKI_S_IRUSR|VKI_S_IWUSR);
if (!sres.isError) {
- core_fd =3D sres.val;
+ core_fd =3D sres.res;
break;
}
=20
- if (sres.isError && sres.val !=3D VKI_EEXIST)
+ if (sres.isError && sres.err !=3D VKI_EEXIST)
return; /* can't create file */
}
=20
Modified: branches/AIX5/coregrind/m_coredump/coredump-ppc32-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-ppc32-linux.c 2006-09-30 =
10:34:43 UTC (rev 6095)
+++ branches/AIX5/coregrind/m_coredump/coredump-ppc32-linux.c 2006-09-30 =
10:39:37 UTC (rev 6096)
@@ -29,6 +29,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
#include "pub_core_coredump.h"
#include "pub_core_threadstate.h"
=20
Modified: branches/AIX5/coregrind/m_coredump/coredump-ppc64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-ppc64-linux.c 2006-09-30 =
10:34:43 UTC (rev 6095)
+++ branches/AIX5/coregrind/m_coredump/coredump-ppc64-linux.c 2006-09-30 =
10:39:37 UTC (rev 6096)
@@ -29,6 +29,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
#include "pub_core_coredump.h"
#include "pub_core_threadstate.h"
=20
Modified: branches/AIX5/coregrind/m_coredump/coredump-x86-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_coredump/coredump-x86-linux.c 2006-09-30 10=
:34:43 UTC (rev 6095)
+++ branches/AIX5/coregrind/m_coredump/coredump-x86-linux.c 2006-09-30 10=
:39:37 UTC (rev 6096)
@@ -29,6 +29,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
#include "pub_core_libcbase.h"
#include "pub_core_coredump.h"
#include "pub_core_threadstate.h"
|
|
From: <sv...@va...> - 2006-09-30 10:34:46
|
Author: sewardj
Date: 2006-09-30 11:34:43 +0100 (Sat, 30 Sep 2006)
New Revision: 6095
Log:
A minimal sigframe implementation for AIX5. Works but does not
provide valid siginfo or ucontext to handlers.
Added:
branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-aix5.c
branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-aix5.c
Added: branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-aix5.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-aix5.c =
(rev 0)
+++ branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-aix5.c 2006-09-30 1=
0:34:43 UTC (rev 6095)
@@ -0,0 +1,220 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Create/destroy signal delivery frames. ---*/
+/*--- sigframe-ppc32-aix5.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics.h"
+#include "pub_core_vki.h"
+#include "pub_core_vkiscnums.h"
+#include "pub_core_threadstate.h"
+#include "pub_core_aspacemgr.h"
+#include "pub_core_libcbase.h"
+#include "pub_core_libcassert.h"
+#include "pub_core_libcprint.h"
+#include "pub_core_machine.h"
+#include "pub_core_options.h"
+#include "pub_core_signals.h"
+#include "pub_core_tooliface.h"
+#include "pub_core_trampoline.h"
+#include "pub_core_transtab.h" // VG_(discard_translations)
+#include "pub_core_sigframe.h" /* self */
+
+
+/* This module creates and removes signal frames for signal deliveries
+ on ppc32-aix5. Kludgey; the machine state ought to be saved in a
+ ucontext and retrieved from it later, so the handler can modify it
+ and return. However .. for now .. just stick the vex guest state
+ in the frame and snarf it again later.
+
+ Also, don't bother with creating siginfo and ucontext in the
+ handler, although do point them somewhere non-faulting.
+*/
+struct hacky_sigframe {
+ UChar lower_guardzone[512]; // put nothing here
+ VexGuestPPC32State gst;
+ VexGuestPPC32State gshadow;
+ UInt magicPI;
+ UInt sigNo_private;
+ UInt tramp[2];
+ UChar upper_guardzone[512]; // put nothing here
+};
+
+
+/* Extend the stack segment downwards if needed so as to ensure the
+ new signal frames are mapped to something. Return a Bool
+ indicating whether or not the operation was successful.
+*/
+static Bool extend ( ThreadState *tst, Addr addr, SizeT size )
+{
+ /* For tracking memory events, indicate the entire frame has been
+ allocated. Except, don't mess with the area which
+ overlaps the previous frame's redzone. */
+ VG_TRACK( new_mem_stack_signal, addr, size - VG_STACK_REDZONE_SZB );
+ return True;
+}
+
+#define SET_SIGNAL_LR(zztst, zzval) \
+ do { tst->arch.vex.guest_LR =3D (zzval); \
+ VG_TRACK( post_reg_write, Vg_CoreSignal, tst->tid, \
+ offsetof(VexGuestPPC32State,guest_LR), \
+ sizeof(UWord) ); \
+ } while (0)
+
+#define SET_SIGNAL_GPR(zztst, zzn, zzval) \
+ do { tst->arch.vex.guest_GPR##zzn =3D (zzval); \
+ VG_TRACK( post_reg_write, Vg_CoreSignal, tst->tid, \
+ offsetof(VexGuestPPC32State,guest_GPR##zzn), \
+ sizeof(UWord) ); \
+ } while (0)
+
+
+/* Create a signal frame for thread 'tid'. */
+void VG_(sigframe_create) ( ThreadId tid,
+ Addr sp_top_of_frame,
+ const vki_siginfo_t *siginfo,
+ void *handler,
+ UInt flags,
+ const vki_sigset_t *mask,
+ void *restorer )
+{
+ ThreadState* tst;
+ Addr sp;
+ struct hacky_sigframe* frame;
+ Int sigNo =3D siginfo->si_signo;
+ Int __NR_FAKE_SIGRETURN =3D __NR_AIX5_FAKE_SIGRETURN;
+
+ vg_assert(VG_IS_16_ALIGNED(sizeof(struct hacky_sigframe)));
+
+ sp_top_of_frame &=3D ~0xf;
+ sp =3D sp_top_of_frame - sizeof(struct hacky_sigframe);
+
+ tst =3D VG_(get_ThreadState)(tid);
+ if (!extend(tst, sp, sp_top_of_frame - sp))
+ return;
+
+ vg_assert(VG_IS_16_ALIGNED(sp));
+
+ frame =3D (struct hacky_sigframe *) sp;
+
+ /* clear it (very conservatively) */
+ VG_(memset)(&frame->lower_guardzone, 0, 512);
+ VG_(memset)(&frame->gst, 0, sizeof(VexGuestPPC32State));
+ VG_(memset)(&frame->gshadow, 0, sizeof(VexGuestPPC32State));
+
+ /* save stuff in frame */
+ frame->gst =3D tst->arch.vex;
+ frame->gshadow =3D tst->arch.vex_shadow;
+ frame->sigNo_private =3D sigNo;
+ frame->magicPI =3D 0x31415927;
+
+ /* Set up stack frame pointer */
+ sp +=3D 256;
+ vg_assert(sp =3D=3D (Addr)&frame->lower_guardzone[256]);
+ VG_TRACK( pre_mem_write, Vg_CoreSignal, tid, "signal handler frame",
+ sp, sizeof(UWord) );
+ *(Addr*)sp =3D tst->arch.vex.guest_GPR1;
+ VG_TRACK( post_mem_write, Vg_CoreSignal, tid,
+ sp, sizeof(UWord) );
+
+ /* Set regs for the handler */
+ SET_SIGNAL_GPR(tid, 1, sp);
+ SET_SIGNAL_GPR(tid, 2, ((UWord*)handler)[1]);
+ SET_SIGNAL_GPR(tid, 3, sigNo);
+ SET_SIGNAL_GPR(tid, 4, 0); /* XXX: the siginfo* */
+ SET_SIGNAL_GPR(tid, 5, 0); /* XXX: the ucontext* */
+ tst->arch.vex.guest_CIA =3D ((UWord*)handler)[0];
+
+ /* set up return trampoline */
+ vg_assert(__NR_FAKE_SIGRETURN >=3D 10000);
+ vg_assert(__NR_FAKE_SIGRETURN <=3D 32767);
+ frame->tramp[0] =3D 0x38400000U=20
+ + __NR_FAKE_SIGRETURN; /* li 2,__NR_FAKE_SIGRETURN =
*/
+ frame->tramp[1] =3D 0x44000002U; /* sc */
+
+ /* invalidate any translation of this area */
+ VG_(discard_translations)( (Addr64)(Addr)&frame->tramp[0],=20
+ sizeof(frame->tramp), "sigframe tramp" ); =
=20
+ /* set the signal handler to return to the trampoline */
+ SET_SIGNAL_LR(tst, (Addr) &frame->tramp[0]);
+
+ VG_TRACK(post_mem_write, Vg_CoreSignal, tst->tid,
+ (Addr)&frame->tramp, sizeof(frame->tramp));
+
+ if (0) {
+ VG_(printf)("pushed signal frame for sig %d; R1 now =3D %p, "
+ "next %%CIA =3D %p, status=3D%d\n",=20
+ sigNo,
+ sp, tst->arch.vex.guest_CIA, tst->status);
+ VG_(printf)("trampoline is at %p\n", &frame->tramp[0]);
+ }
+}
+
+
+/* Remove a signal frame from thread 'tid's stack, and restore the CPU
+ state from it. Note, isRT is irrelevant here. */
+void VG_(sigframe_destroy)( ThreadId tid, Bool isRT )
+{
+ ThreadState *tst;
+ Addr sp;
+ Int sigNo;
+ struct hacky_sigframe* frame;
+=20
+ vg_assert(VG_(is_valid_tid)(tid));
+ tst =3D VG_(get_ThreadState)(tid);
+
+ /* Check that the stack frame looks valid */
+ sp =3D tst->arch.vex.guest_GPR1;
+ vg_assert(VG_IS_16_ALIGNED(sp));
+
+ frame =3D (struct hacky_sigframe*)(sp - 256);
+ vg_assert(frame->magicPI =3D=3D 0x31415927);
+
+ /* restore the entire guest state, and shadow, from the
+ frame. Note, as per comments above, this is a kludge - should
+ restore it from saved ucontext. Oh well. */
+ tst->arch.vex =3D frame->gst;
+ tst->arch.vex_shadow =3D frame->gshadow;
+ sigNo =3D frame->sigNo_private;
+
+ if (VG_(clo_trace_signals))
+ VG_(message)(Vg_DebugMsg,
+ "vg_pop_signal_frame (thread %d): valid magic; CIA=3D=
%p",
+ tid, tst->arch.vex.guest_CIA);
+
+ VG_TRACK( die_mem_stack_signal,=20
+ (Addr)frame,=20
+ sizeof(struct hacky_sigframe) - VG_STACK_REDZONE_SZB );
+
+ /* tell the tools */
+ VG_TRACK( post_deliver_signal, tid, sigNo );
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end sigframe-ppc32-linux.c ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-aix5.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-aix5.c =
(rev 0)
+++ branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-aix5.c 2006-09-30 1=
0:34:43 UTC (rev 6095)
@@ -0,0 +1,254 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Create/destroy signal delivery frames. ---*/
+/*--- sigframe-ppc64-aix5.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics.h"
+#include "pub_core_vki.h"
+#include "pub_core_vkiscnums.h"
+#include "pub_core_threadstate.h"
+#include "pub_core_aspacemgr.h"
+#include "pub_core_libcbase.h"
+#include "pub_core_libcassert.h"
+#include "pub_core_libcprint.h"
+#include "pub_core_machine.h"
+#include "pub_core_options.h"
+#include "pub_core_signals.h"
+#include "pub_core_tooliface.h"
+#include "pub_core_trampoline.h"
+#include "pub_core_transtab.h" // VG_(discard_translations)
+#include "pub_core_sigframe.h" /* self */
+
+
+/* This module creates and removes signal frames for signal deliveries
+ on ppc64-aix5. Kludgey; the machine state ought to be saved in a
+ ucontext and retrieved from it later, so the handler can modify it
+ and return. However .. for now .. just stick the vex guest state
+ in the frame and snarf it again later.
+
+ Also, don't bother with creating siginfo and ucontext in the
+ handler, although do point them somewhere non-faulting.
+*/
+struct hacky_sigframe {
+ UChar lower_guardzone[1024]; // put nothing here
+ VexGuestPPC64State gst;
+ VexGuestPPC64State gshadow;
+ UInt magicPI;
+ UInt sigNo_private;
+ UInt tramp[2];
+ UChar upper_guardzone[1024]; // put nothing here
+};
+
+
+/* Extend the stack segment downwards if needed so as to ensure the
+ new signal frames are mapped to something. Return a Bool
+ indicating whether or not the operation was successful.
+*/
+static Bool extend ( ThreadState *tst, Addr addr, SizeT size )
+{
+ /* For tracking memory events, indicate the entire frame has been
+ allocated. Except, don't mess with the area which
+ overlaps the previous frame's redzone. */
+ VG_TRACK( new_mem_stack_signal, addr, size - VG_STACK_REDZONE_SZB );
+ return True;
+}
+
+#define SET_SIGNAL_LR(zztst, zzval) \
+ do { tst->arch.vex.guest_LR =3D (zzval); \
+ VG_TRACK( post_reg_write, Vg_CoreSignal, tst->tid, \
+ offsetof(VexGuestPPC64State,guest_LR), \
+ sizeof(UWord) ); \
+ } while (0)
+
+#define SET_SIGNAL_GPR(zztst, zzn, zzval) \
+ do { tst->arch.vex.guest_GPR##zzn =3D (zzval); \
+ VG_TRACK( post_reg_write, Vg_CoreSignal, tst->tid, \
+ offsetof(VexGuestPPC64State,guest_GPR##zzn), \
+ sizeof(UWord) ); \
+ } while (0)
+
+
+/* Create a signal frame for thread 'tid'. */
+void VG_(sigframe_create) ( ThreadId tid,
+ Addr sp_top_of_frame,
+ const vki_siginfo_t *siginfo,
+ void *handler,
+ UInt flags,
+ const vki_sigset_t *mask,
+ void *restorer )
+{
+ ThreadState* tst;
+ Addr sp;
+ struct hacky_sigframe* frame;
+ Int sigNo =3D siginfo->si_signo;
+ Int __NR_FAKE_SIGRETURN =3D __NR_AIX5_FAKE_SIGRETURN;
+
+ vg_assert(VG_IS_16_ALIGNED(sizeof(struct hacky_sigframe)));
+
+ sp_top_of_frame &=3D ~0xf;
+ sp =3D sp_top_of_frame - sizeof(struct hacky_sigframe);
+
+ tst =3D VG_(get_ThreadState)(tid);
+ if (!extend(tst, sp, sp_top_of_frame - sp))
+ return;
+
+ vg_assert(VG_IS_16_ALIGNED(sp));
+
+ frame =3D (struct hacky_sigframe *) sp;
+
+ /* clear it (very conservatively) */
+ VG_(memset)(&frame->lower_guardzone, 0, 1024);
+ VG_(memset)(&frame->gst, 0, sizeof(VexGuestPPC64State));
+ VG_(memset)(&frame->gshadow, 0, sizeof(VexGuestPPC64State));
+
+ /* save stuff in frame */
+ frame->gst =3D tst->arch.vex;
+ frame->gshadow =3D tst->arch.vex_shadow;
+ frame->sigNo_private =3D sigNo;
+ frame->magicPI =3D 0x31415927;
+
+ /* Set up stack frame pointer */
+ sp +=3D 512;
+ vg_assert(sp =3D=3D (Addr)&frame->lower_guardzone[512]);
+ VG_TRACK( pre_mem_write, Vg_CoreSignal, tid, "signal handler frame",
+ sp, sizeof(UWord) );
+ *(Addr*)sp =3D tst->arch.vex.guest_GPR1;
+ VG_TRACK( post_mem_write, Vg_CoreSignal, tid,
+ sp, sizeof(UWord) );
+
+ /* Set regs for the handler */
+ SET_SIGNAL_GPR(tid, 1, sp);
+ SET_SIGNAL_GPR(tid, 2, ((UWord*)handler)[1]);
+ SET_SIGNAL_GPR(tid, 3, sigNo);
+ SET_SIGNAL_GPR(tid, 4, 0); /* XXX: the siginfo* */
+ SET_SIGNAL_GPR(tid, 5, 0); /* XXX: the ucontext* */
+ tst->arch.vex.guest_CIA =3D ((UWord*)handler)[0];
+
+ /* set up return trampoline */
+ vg_assert(__NR_FAKE_SIGRETURN >=3D 10000);
+ vg_assert(__NR_FAKE_SIGRETURN <=3D 32767);
+ frame->tramp[0] =3D 0x38400000U=20
+ + __NR_FAKE_SIGRETURN; /* li 2,__NR_FAKE_SIGRETURN =
*/
+ frame->tramp[1] =3D 0x44000002U; /* sc */
+
+ /* invalidate any translation of this area */
+ VG_(discard_translations)( (Addr64)(Addr)&frame->tramp[0],=20
+ sizeof(frame->tramp), "sigframe tramp" ); =
=20
+ /* set the signal handler to return to the trampoline */
+ SET_SIGNAL_LR(tst, (Addr) &frame->tramp[0]);
+
+ VG_TRACK(post_mem_write, Vg_CoreSignal, tst->tid,
+ (Addr)&frame->tramp, sizeof(frame->tramp));
+
+ if (0) {
+ VG_(printf)("pushed signal frame for sig %d; R1 now =3D %p, "
+ "next %%CIA =3D %p, status=3D%d\n",=20
+ sigNo,
+ sp, tst->arch.vex.guest_CIA, tst->status);
+ VG_(printf)("trampoline is at %p\n", &frame->tramp[0]);
+ }
+}
+
+
+/* Remove a signal frame from thread 'tid's stack, and restore the CPU
+ state from it. Note, isRT is irrelevant here. */
+void VG_(sigframe_destroy)( ThreadId tid, Bool isRT )
+{
+ ThreadState *tst;
+ Addr sp, sp_max;
+ const UWord one_meg =3D 1048576;
+ UWord scannable_bytes;
+
+ Int sigNo, i;
+ struct hacky_sigframe* frame;
+=20
+ vg_assert(VG_(is_valid_tid)(tid));
+ tst =3D VG_(get_ThreadState)(tid);
+
+ /* Check that the stack frame looks valid */
+ sp =3D tst->arch.vex.guest_GPR1;
+ vg_assert(VG_IS_16_ALIGNED(sp));
+
+ /* If the frame is being cleared by some mechanism other than our
+ fake sigreturn, sp may not be as it was after the frame was
+ constructed. If so, scan back up the stack looking for the most
+ recently pushed frame and assume that's the right one to use.
+ Urk. */
+ sp_max =3D tst->client_stack_highest_word;
+ scannable_bytes =3D 0;
+ if (sp_max > sp)
+ scannable_bytes =3D sp_max - sp;
+ if (scannable_bytes > one_meg)
+ scannable_bytes =3D one_meg;
+ if (scannable_bytes < (sizeof(struct hacky_sigframe)-512))=20
+ scannable_bytes =3D 0;
+ else
+ scannable_bytes -=3D (sizeof(struct hacky_sigframe)-512);
+
+ vg_assert(scannable_bytes <=3D one_meg);
+
+ frame =3D (struct hacky_sigframe*)(sp - 512);
+ if (frame->magicPI !=3D 0x31415927) {
+ if (!VG_(clo_xml))
+ VG_(message)(Vg_DebugMsg,=20
+ "WARNING: dubious signal return: searching %ld bytes for fra=
me",=20
+ scannable_bytes);
+ for (i =3D 0; i < scannable_bytes/4; i++) {
+ if (frame->magicPI =3D=3D 0x31415927)
+ break;
+ frame =3D (struct hacky_sigframe*)(((Addr)frame)+4);
+ }
+ }
+
+ /* If we haven't found the frame by now, we're hosed. */
+ vg_assert(frame->magicPI =3D=3D 0x31415927);
+
+ /* restore the entire guest state, and shadow, from the
+ frame. Note, as per comments above, this is a kludge - should
+ restore it from saved ucontext. Oh well. */
+ tst->arch.vex =3D frame->gst;
+ tst->arch.vex_shadow =3D frame->gshadow;
+ sigNo =3D frame->sigNo_private;
+
+ if (VG_(clo_trace_signals))
+ VG_(message)(Vg_DebugMsg,
+ "vg_pop_signal_frame (thread %d): valid magic; CIA=3D=
%p",
+ tid, tst->arch.vex.guest_CIA);
+
+ VG_TRACK( die_mem_stack_signal,=20
+ (Addr)frame,=20
+ sizeof(struct hacky_sigframe) - VG_STACK_REDZONE_SZB );
+
+ /* tell the tools */
+ VG_TRACK( post_deliver_signal, tid, sigNo );
+}
+
+/*--------------------------------------------------------------------*/
+/*--- end sigframe-ppc64-linux.c ---*/
+/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-09-30 10:33:23
|
Author: sewardj
Date: 2006-09-30 11:33:20 +0100 (Sat, 30 Sep 2006)
New Revision: 6094
Log:
Track return type change for VG_(am_find_nsegment) (extra const-ness)
Modified:
branches/AIX5/coregrind/m_sigframe/sigframe-amd64-linux.c
branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-linux.c
branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-linux.c
branches/AIX5/coregrind/m_sigframe/sigframe-x86-linux.c
Modified: branches/AIX5/coregrind/m_sigframe/sigframe-amd64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_sigframe/sigframe-amd64-linux.c 2006-09-30 =
10:26:03 UTC (rev 6093)
+++ branches/AIX5/coregrind/m_sigframe/sigframe-amd64-linux.c 2006-09-30 =
10:33:20 UTC (rev 6094)
@@ -375,7 +375,7 @@
static Bool extend ( ThreadState *tst, Addr addr, SizeT size )
{
ThreadId tid =3D tst->tid;
- NSegment *stackseg =3D NULL;
+ NSegment const* stackseg =3D NULL;
=20
if (VG_(extend_stack)(addr, tst->client_stack_szB)) {
stackseg =3D VG_(am_find_nsegment)(addr);
Modified: branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-linux.c 2006-09-30 =
10:26:03 UTC (rev 6093)
+++ branches/AIX5/coregrind/m_sigframe/sigframe-ppc32-linux.c 2006-09-30 =
10:33:20 UTC (rev 6094)
@@ -32,6 +32,8 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
+#include "pub_core_vkiscnums.h"
#include "pub_core_threadstate.h"
#include "pub_core_aspacemgr.h"
#include "pub_core_libcbase.h"
@@ -44,7 +46,6 @@
#include "pub_core_tooliface.h"
#include "pub_core_trampoline.h"
#include "pub_core_transtab.h" // VG_(discard_translations)
-#include "vki_unistd-ppc32-linux.h" // __NR_rt_sigreturn
=20
=20
/* This module creates and removes signal frames for signal deliveries
@@ -493,7 +494,7 @@
static Bool extend ( ThreadState *tst, Addr addr, SizeT size )
{
ThreadId tid =3D tst->tid;
- NSegment *stackseg =3D NULL;
+ NSegment const *stackseg =3D NULL;
=20
if (VG_(extend_stack)(addr, tst->client_stack_szB)) {
stackseg =3D VG_(am_find_nsegment)(addr);
Modified: branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-linux.c 2006-09-30 =
10:26:03 UTC (rev 6093)
+++ branches/AIX5/coregrind/m_sigframe/sigframe-ppc64-linux.c 2006-09-30 =
10:33:20 UTC (rev 6094)
@@ -32,6 +32,8 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
+#include "pub_core_vkiscnums.h"
#include "pub_core_threadstate.h"
#include "pub_core_aspacemgr.h"
#include "pub_core_libcbase.h"
@@ -44,7 +46,6 @@
#include "pub_core_tooliface.h"
#include "pub_core_trampoline.h"
#include "pub_core_transtab.h" // VG_(discard_translations)
-#include "vki_unistd-ppc64-linux.h" // __NR_rt_sigreturn
=20
=20
/* This module creates and removes signal frames for signal deliveries
@@ -133,7 +134,7 @@
static Bool extend ( ThreadState *tst, Addr addr, SizeT size )
{
ThreadId tid =3D tst->tid;
- NSegment *stackseg =3D NULL;
+ NSegment const *stackseg =3D NULL;
=20
if (VG_(extend_stack)(addr, tst->client_stack_szB)) {
stackseg =3D VG_(am_find_nsegment)(addr);
Modified: branches/AIX5/coregrind/m_sigframe/sigframe-x86-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_sigframe/sigframe-x86-linux.c 2006-09-30 10=
:26:03 UTC (rev 6093)
+++ branches/AIX5/coregrind/m_sigframe/sigframe-x86-linux.c 2006-09-30 10=
:33:20 UTC (rev 6094)
@@ -30,6 +30,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_vki.h"
#include "pub_core_threadstate.h"
#include "pub_core_aspacemgr.h" /* find_segment */
#include "pub_core_libcbase.h"
@@ -37,10 +38,10 @@
#include "pub_core_libcprint.h"
#include "pub_core_machine.h"
#include "pub_core_options.h"
-#include "pub_core_sigframe.h"
#include "pub_core_signals.h"
#include "pub_core_tooliface.h"
#include "pub_core_trampoline.h"
+#include "pub_core_sigframe.h" /* self */
=20
=20
/* This module creates and removes signal frames for signal deliveries
@@ -395,7 +396,7 @@
static Bool extend ( ThreadState *tst, Addr addr, SizeT size )
{
ThreadId tid =3D tst->tid;
- NSegment *stackseg =3D NULL;
+ NSegment const* stackseg =3D NULL;
=20
if (VG_(extend_stack)(addr, tst->client_stack_szB)) {
stackseg =3D VG_(am_find_nsegment)(addr);
|
|
From: <sv...@va...> - 2006-09-30 10:26:09
|
Author: sewardj
Date: 2006-09-30 11:26:03 +0100 (Sat, 30 Sep 2006)
New Revision: 6093
Log:
Create a new module, m_vkiscnums, which exports system call numbers.
This moves the ad-hoc collection of Linux vki_unistd*.h into
include/vki and wraps a 'standard' module interface around it:
pub_{tool,core}_vkiscnums.h.
On AIX it handles the added complication that system call numbers for
each process are assigned at process start time. The interface is
designed to hide this fact from module users, who can continue to use,
for example, __NR_write, __NR_read, etc, exactly as before.
Added:
branches/AIX5/auxprogs/aix5_proc_self_sysent.c
branches/AIX5/coregrind/m_vkiscnums.c
branches/AIX5/coregrind/pub_core_vkiscnums.h
branches/AIX5/include/pub_tool_vkiscnums.h
branches/AIX5/include/vki/vki-scnums-aix5.h
branches/AIX5/include/vki/vki-scnums-amd64-linux.h
branches/AIX5/include/vki/vki-scnums-ppc32-linux.h
branches/AIX5/include/vki/vki-scnums-ppc64-linux.h
branches/AIX5/include/vki/vki-scnums-x86-linux.h
Removed:
branches/AIX5/coregrind/vki_unistd-amd64-linux.h
branches/AIX5/coregrind/vki_unistd-ppc32-linux.h
branches/AIX5/coregrind/vki_unistd-ppc64-linux.h
branches/AIX5/coregrind/vki_unistd-x86-linux.h
branches/AIX5/coregrind/vki_unistd.h
[... diff too large to include ...]
|
|
From: <js...@ac...> - 2006-09-30 04:06:19
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2006-09-30 04:30:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 238 tests, 5 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/leak-tree (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) |
|
From: Tom H. <th...@cy...> - 2006-09-30 03:12:17
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2006-09-30 03:00:02 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 270 tests, 6 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/mempool (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/fdleak_fcntl (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/tls (stdout) |
|
From: Tom H. <to...@co...> - 2006-09-30 02:45:23
|
Nightly build on dunsmere ( athlon, Fedora Core 5 ) started at 2006-09-30 03:30:06 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 240 tests, 4 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) |
|
From: Tom H. <th...@cy...> - 2006-09-30 02:25:51
|
Nightly build on dellow ( x86_64, Fedora Core 5 ) started at 2006-09-30 03:10:05 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 268 tests, 14 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/mempool (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/xml1 (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_creat (stderr) none/tests/fdleak_dup (stderr) none/tests/fdleak_dup2 (stderr) none/tests/fdleak_fcntl (stderr) none/tests/fdleak_ipv4 (stderr) none/tests/fdleak_open (stderr) none/tests/fdleak_pipe (stderr) none/tests/fdleak_socketpair (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/rlimit_nofile (stderr) |
|
From: Tom H. <th...@cy...> - 2006-09-30 02:25:13
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2006-09-30 03:15:02 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Last 20 lines of verbose log follow echo /tmp/ccsYsqFA.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccsYsqFA.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 rm insn_mmx.c insn_sse2.c insn_fpu.c insn_mmxext.c insn_sse.c insn_sse3.c insn_cmov.c insn_basic.c make[5]: Leaving directory `/tmp/valgrind.15419/valgrind/none/tests/x86' make[4]: *** [check-am] Error 2 make[4]: Leaving directory `/tmp/valgrind.15419/valgrind/none/tests/x86' make[3]: *** [check-recursive] Error 1 make[3]: Leaving directory `/tmp/valgrind.15419/valgrind/none/tests' make[2]: *** [check-recursive] Error 1 make[2]: Leaving directory `/tmp/valgrind.15419/valgrind/none' make[1]: *** [check-recursive] Error 1 make[1]: Leaving directory `/tmp/valgrind.15419/valgrind' make: *** [check] Error 2 ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Last 20 lines of verbose log follow echo /tmp/cc5qR7nT.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5qR7nT.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 rm insn_mmx.c insn_sse2.c insn_fpu.c insn_mmxext.c insn_sse.c insn_sse3.c insn_cmov.c insn_basic.c make[5]: Leaving directory `/tmp/valgrind.15419/valgrind/none/tests/x86' make[4]: *** [check-am] Error 2 make[4]: Leaving directory `/tmp/valgrind.15419/valgrind/none/tests/x86' make[3]: *** [check-recursive] Error 1 make[3]: Leaving directory `/tmp/valgrind.15419/valgrind/none/tests' make[2]: *** [check-recursive] Error 1 make[2]: Leaving directory `/tmp/valgrind.15419/valgrind/none' make[1]: *** [check-recursive] Error 1 make[1]: Leaving directory `/tmp/valgrind.15419/valgrind' make: *** [check] Error 2 ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Sat Sep 30 03:19:52 2006 --- new.short Sat Sep 30 03:24:39 2006 *************** *** 7,16 **** Last 20 lines of verbose log follow echo ! /tmp/cc5qR7nT.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5qR7nT.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 --- 7,16 ---- Last 20 lines of verbose log follow echo ! /tmp/ccsYsqFA.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccsYsqFA.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 |
|
From: Tom H. <th...@cy...> - 2006-09-30 02:19:52
|
Nightly build on lloyd ( x86_64, Fedora Core 3 ) started at 2006-09-30 03:05:07 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 268 tests, 6 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) |
|
From: <sv...@va...> - 2006-09-30 01:51:31
|
Author: sewardj
Date: 2006-09-30 02:51:26 +0100 (Sat, 30 Sep 2006)
New Revision: 6092
Log:
AIX5 kernel-interface stuff.
Added:
branches/AIX5/auxprogs/aix5_VKI_info.c
branches/AIX5/include/vki/vki-ppc32-aix5.h
branches/AIX5/include/vki/vki-ppc64-aix5.h
Added: branches/AIX5/auxprogs/aix5_VKI_info.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/auxprogs/aix5_VKI_info.c (rev 0=
)
+++ branches/AIX5/auxprogs/aix5_VKI_info.c 2006-09-30 01:51:26 UTC (rev 6=
092)
@@ -0,0 +1,336 @@
+
+/* Used to generate include/vki/vki-ppc{32,64}-aix5.h. */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <sys/mman.h>
+#include <errno.h>
+#include <string.h>
+#include <time.h>
+#include <sys/ptrace.h>
+#include <sys/uio.h>
+#include <sys/ioctl.h>
+
+#undef offsetof
+
+/* This is so useful it should be visible absolutely everywhere. */
+#if !defined(offsetof)
+# define offsetof(type,memb) ((int)&((type*)0)->memb)
+#endif
+
+
+int main ( void )
+{
+ printf ("aix5_VKI_info: sizeof(void*) =3D %d\n", (int)sizeof(void*));
+
+ printf("/* ---------------- Errors ---------------- */\n");
+ printf("\n");
+ printf("#define VKI_EINVAL %d\n", EINVAL);
+ printf("#define VKI_EINTR %d\n", EINTR);
+ printf("#define VKI_ENOSYS %d\n", ENOSYS);
+ printf("#define VKI_EAGAIN %d\n", EAGAIN);
+ printf("#define VKI_ENOMEM %d\n", ENOMEM);
+ printf("#define VKI_EACCES %d\n", EACCES);
+ printf("#define VKI_EEXIST %d\n", EEXIST);
+ printf("#define VKI_EPERM %d\n", EPERM);
+ printf("#define VKI_ENOENT %d\n", ENOENT);
+ printf("#define VKI_ESRCH %d\n", ESRCH);
+ printf("#define VKI_EBADF %d\n", EBADF);
+ printf("#define VKI_EFAULT %d\n", EFAULT);
+ printf("#define VKI_EMFILE %d\n", EMFILE);
+ printf("#define VKI_ECHILD %d\n", ECHILD);
+ printf("\n");
+ printf("/* ---------------- File I/O ---------------- */\n");
+ printf("\n");
+ printf("#define VKI_O_WRONLY 0x%08x\n", O_WRONLY);
+ printf("#define VKI_O_RDONLY 0x%08x\n", O_RDONLY);
+ printf("#define VKI_O_APPEND 0x%08x\n", O_APPEND);
+ printf("#define VKI_O_CREAT 0x%08x\n", O_CREAT);
+ printf("#define VKI_O_RDWR 0x%08x\n", O_RDWR);
+ printf("#define VKI_O_EXCL 0x%08x\n", O_EXCL);
+ printf("#define VKI_O_TRUNC 0x%08x\n", O_TRUNC);
+ printf("\n");
+ printf("#define VKI_S_IRUSR 0x%08x\n", S_IRUSR);
+ printf("#define VKI_S_IXUSR 0x%08x\n", S_IXUSR);
+ printf("#define VKI_S_IXGRP 0x%08x\n", S_IXGRP);
+ printf("#define VKI_S_IXOTH 0x%08x\n", S_IXOTH);
+ printf("#define VKI_S_IWUSR 0x%08x\n", S_IWUSR);
+ printf("#define VKI_S_ISUID 0x%08x\n", S_ISUID);
+ printf("#define VKI_S_ISGID 0x%08x\n", S_ISGID);
+ printf("#define VKI_S_IFMT 0x%08x\n", S_IFMT);
+ printf("#define VKI_S_IFDIR 0x%08x\n", S_IFDIR);
+ printf("\n");
+ printf("#define VKI_F_DUPFD 0x%08x\n", F_DUPFD);
+ printf("#define VKI_F_SETFD 0x%08x\n", F_SETFD);
+ printf("#define VKI_FD_CLOEXEC 0x%08x\n", FD_CLOEXEC);
+ printf("\n");
+ printf("#define VKI_R_OK 0x%08x\n", R_OK);
+ printf("#define VKI_W_OK 0x%08x\n", W_OK);
+ printf("#define VKI_X_OK 0x%08x\n", X_OK);
+
+ /* info about struct stat */
+ struct stat st;
+ printf("\nsizeof(struct stat) =3D %d\n", (int)sizeof(struct stat));
+
+ printf(" st_size: off %2d sz %d\n",=20
+ offsetof(struct stat, st_size),
+ (int)sizeof(st.st_size));
+
+ printf(" st_mode: off %2d sz %d\n",=20
+ offsetof(struct stat, st_mode),
+ (int)sizeof(st.st_mode));
+
+ printf(" st_uid: off %2d sz %d\n",=20
+ offsetof(struct stat, st_uid),
+ (int)sizeof(st.st_uid));
+
+ printf(" st_gid: off %2d sz %d\n",=20
+ offsetof(struct stat, st_gid),
+ (int)sizeof(st.st_gid));
+
+ printf(" st_dev: off %2d sz %d\n",=20
+ offsetof(struct stat, st_dev),
+ (int)sizeof(st.st_dev));
+
+ printf(" st_ino: off %2d sz %d\n",=20
+ offsetof(struct stat, st_ino),
+ (int)sizeof(st.st_ino));
+
+ printf("\n");
+ printf("#define VKI_STX_NORMAL %d\n", (int)STX_NORMAL);
+ printf("\n");
+ printf("sizeof(size_t) =3D %d\n", (int)sizeof(size_t) );
+ printf("\n");
+ printf("#define VKI_SEEK_SET %d\n", SEEK_SET);
+ printf("#define VKI_PATH_MAX %d\n", PATH_MAX);
+
+ /* info about struct iovec */
+ struct iovec iov;
+ printf("\nsizeof(struct iovec) =3D %d\n", (int)sizeof(struct iovec));
+ printf(" iov_base: off %2d sz %d\n",=20
+ offsetof(struct iovec, iov_base),
+ (int)sizeof(iov.iov_base));
+ printf(" iov_len: off %2d sz %d\n",=20
+ offsetof(struct iovec, iov_len),
+ (int)sizeof(iov.iov_len));
+
+ printf("\n");
+ printf("#define _VKI_IOC_NONE %d\n", 3 & (IOC_VOID >> 30));
+ printf("#define _VKI_IOC_READ %d\n", 3 & (IOC_OUT >> 30));
+ printf("#define _VKI_IOC_WRITE %d\n", 3 & (IOC_IN >> 30));
+ printf("\n");
+ printf("/* ---------------- MMappery ---------------- */\n");
+ printf("\n");
+ printf("#define VKI_PAGE_SIZE %d\n", (int)sysconf(_SC_PAGESIZE));
+ printf("\n");
+ printf("#define VKI_PROT_NONE 0x%08x\n", PROT_NONE);
+ printf("#define VKI_PROT_READ 0x%08x\n", PROT_READ);
+ printf("#define VKI_PROT_WRITE 0x%08x\n", PROT_WRITE);
+ printf("#define VKI_PROT_EXEC 0x%08x\n", PROT_EXEC);
+ printf("\n");
+ printf("#define VKI_MAP_FIXED 0x%08x\n", MAP_FIXED);
+ printf("#define VKI_MAP_PRIVATE 0x%08x\n", MAP_PRIVATE);
+ printf("#define VKI_MAP_ANONYMOUS 0x%08x\n", MAP_ANONYMOUS);
+ printf("\n");
+ printf("/* ---------------- RLimitery ---------------- */\n");
+ printf("\n");
+ printf("#define VKI_RLIMIT_DATA 0x%08x\n", RLIMIT_DATA);
+ printf("#define VKI_RLIMIT_NOFILE 0x%08x\n", RLIMIT_NOFILE);
+ printf("#define VKI_RLIMIT_STACK 0x%08x\n", RLIMIT_STACK);
+ printf("#define VKI_RLIMIT_CORE 0x%08x\n", RLIMIT_CORE);
+
+ /* info about struct rlimit */
+ struct rlimit rl;
+ printf("\nsizeof(struct rlimit) =3D %d\n", (int)sizeof(struct rlimit)=
);
+ printf(" rlim_cur: off %2d sz %d\n",=20
+ offsetof(struct rlimit, rlim_cur),
+ (int)sizeof(rl.rlim_cur));
+ printf(" rlim_max: off %2d sz %d\n",=20
+ offsetof(struct rlimit, rlim_max),
+ (int)sizeof(rl.rlim_max));
+ printf("\n");
+ printf("/* ---------------- Time ---------------- */\n");
+ printf("\n");
+
+ /* print info about struct timeval */
+ struct timeval tv;
+ printf("sizeof(struct timeval) =3D %d\n", (int)sizeof(struct timeval)=
);
+ printf(" tv_sec: off %2d sz %d\n",=20
+ offsetof(struct timeval, tv_sec),
+ (int)sizeof(tv.tv_sec));
+ printf(" tv_usec: off %2d sz %d\n",=20
+ offsetof(struct timeval, tv_usec),
+ (int)sizeof(tv.tv_usec));
+
+ /* print info about struct timespec */
+ struct timespec ts;
+ printf("\nsizeof(struct timespec) =3D %d\n", (int)sizeof(struct times=
pec));
+ printf(" tv_sec: off %2d sz %d\n",=20
+ offsetof(struct timespec, tv_sec),
+ (int)sizeof(ts.tv_sec));
+ printf(" tv_nsec: off %2d sz %d\n",=20
+ offsetof(struct timespec, tv_nsec),
+ (int)sizeof(ts.tv_nsec));
+
+ printf("\n");
+ printf("/* ---------------- Signals ---------------- */\n");
+ printf("\n");
+ printf("#define _VKI_NSIG %ld\n", 8 * sizeof(sigset_t) );
+ printf("\n");
+ printf("#define VKI_SIGSEGV %d\n", SIGSEGV);
+ printf("#define VKI_SIGBUS %d\n", SIGBUS);
+ printf("#define VKI_SIGFPE %d\n", SIGFPE);
+ printf("#define VKI_SIGHUP %d\n", SIGHUP);
+ printf("#define VKI_SIGINT %d\n", SIGINT);
+ printf("#define VKI_SIGQUIT %d\n", SIGQUIT);
+ printf("#define VKI_SIGABRT %d\n", SIGABRT);
+ printf("#define VKI_SIGUSR1 %d\n", SIGUSR1);
+ printf("#define VKI_SIGUSR2 %d\n", SIGUSR2);
+ printf("#define VKI_SIGPIPE %d\n", SIGPIPE);
+ printf("#define VKI_SIGALRM %d\n", SIGALRM);
+ printf("#define VKI_SIGTERM %d\n", SIGTERM);
+ printf("/* VKI_SIGSTKFLT does not exist on AIX 5.2 */\n");
+ printf("#define VKI_SIGTTIN %d\n", SIGTTIN);
+ printf("#define VKI_SIGTTOU %d\n", SIGTTOU);
+ printf("#define VKI_SIGXCPU %d\n", SIGXCPU);
+ printf("#define VKI_SIGXFSZ %d\n", SIGXFSZ);
+ printf("#define VKI_SIGVTALRM %d\n", SIGVTALRM);
+ printf("#define VKI_SIGPROF %d\n", SIGPROF);
+ printf("#define VKI_SIGIO %d\n", SIGIO);
+ printf("#define VKI_SIGPWR %d\n", SIGPWR);
+ printf("/* VKI_SIGUNUSED does not exist on AIX 5.2 */\n");
+ printf("#define VKI_SIGRTMIN %d\n", SIGRTMIN);
+ printf("#define VKI_SIGRTMAX %d\n", SIGRTMAX);
+ printf("#define VKI_SIGTRAP %d\n", SIGTRAP);
+ printf("#define VKI_SIGCONT %d\n", SIGCONT);
+ printf("#define VKI_SIGCHLD %d\n", SIGCHLD);
+ printf("#define VKI_SIGWINCH %d\n", SIGWINCH);
+ printf("#define VKI_SIGURG %d\n", SIGURG);
+ printf("#define VKI_SIGILL %d\n", SIGILL);
+ printf("#define VKI_SIGSTOP %d\n", SIGSTOP);
+ printf("#define VKI_SIGKILL %d\n", SIGKILL);
+ printf("#define VKI_SIGTSTP %d\n", SIGTSTP);
+ printf("#define VKI_SIGSYS %d\n", SIGSYS);
+
+ /* print info about struct sigaction */
+ struct sigaction sa;
+ printf("\n");
+ printf("sizeof(struct sigaction) =3D %d\n", (int)sizeof(struct sigact=
ion));
+ printf(" sa_handler: off %2d sz %d\n",=20
+ offsetof(struct sigaction, sa_handler),
+ (int)sizeof(sa.sa_handler));
+ printf(" sa_mask: off %2d sz %d\n",=20
+ offsetof(struct sigaction, sa_mask),
+ (int)sizeof(sa.sa_mask));
+ printf(" sa_flags: off %2d sz %d\n",=20
+ offsetof(struct sigaction, sa_flags),
+ (int)sizeof(sa.sa_flags));
+ printf("sa_sigaction: off %2d sz %d\n",=20
+ offsetof(struct sigaction, sa_sigaction),
+ (int)sizeof(sa.sa_sigaction));
+ printf("\n");
+ printf("#define VKI_SA_ONSTACK %d\n",SA_ONSTACK );
+ printf("#define VKI_SA_RESTART %d\n",SA_RESTART );
+ printf("#define VKI_SA_RESETHAND %d\n",SA_RESETHAND );
+ printf("#define VKI_SA_SIGINFO %d\n",SA_SIGINFO);
+ printf("#define VKI_SA_NODEFER %d\n",SA_NODEFER );
+ // printf("#define VKI_SA_NOMASK %d\n",SA_NOMASK ) ;
+ // printf("#define VKI_SA_ONESHOT %d\n",SA_ONESHOT );
+ printf("#define VKI_SA_NOCLDSTOP %d\n",SA_NOCLDSTOP );
+ printf("#define VKI_SA_NOCLDWAIT %d\n",SA_NOCLDWAIT );
+ // printf("#define VKI_SA_RESTORER %d\n",SA_RESTORER );
+ printf("\n");
+ printf("#define VKI_SS_ONSTACK %d\n",SS_ONSTACK );
+ printf("#define VKI_SS_DISABLE %d\n",SS_DISABLE );
+ printf("\n");
+ printf("#define VKI_MINSIGSTKSZ %ld\n",MINSIGSTKSZ );
+ printf("\n");
+ printf("#define VKI_SI_USER %d\n",SI_USER );
+ printf("\n");
+ printf("#define VKI_SIG_BLOCK %d\n",SIG_BLOCK );
+ printf("#define VKI_SIG_SETMASK %d\n",SIG_SETMASK );
+ printf("#define VKI_SIG_UNBLOCK %d\n",SIG_UNBLOCK );
+ printf("#define VKI_SIG_IGN (void*)%d\n",(int)SIG_IGN );
+ printf("#define VKI_SIG_DFL (void*)%d\n",(int)SIG_DFL );
+ printf("\n");
+ // printf("#define VKI_SI_TKILL %d\n",SI_TKILL );
+ printf("#define VKI_SI_USER %d\n",SI_USER );
+ printf("\n");
+ printf("#define VKI_SEGV_ACCERR %d\n", SEGV_ACCERR);
+ printf("#define VKI_SEGV_MAPERR %d\n", SEGV_MAPERR);
+ printf("\n");
+ printf("#define VKI_TRAP_TRACE %d\n", TRAP_TRACE);
+ printf("#define VKI_BUS_OBJERR %d\n", BUS_OBJERR);
+ printf("#define VKI_BUS_ADRERR %d\n", BUS_ADRERR);
+ printf("#define VKI_BUS_ADRALN %d\n", BUS_ADRALN);
+ printf("#define VKI_FPE_FLTSUB %d\n", FPE_FLTSUB);
+ printf("#define VKI_FPE_FLTINV %d\n", FPE_FLTINV);
+ printf("#define VKI_FPE_FLTRES %d\n", FPE_FLTRES);
+ printf("#define VKI_FPE_FLTUND %d\n", FPE_FLTUND);
+ printf("#define VKI_FPE_FLTOVF %d\n", FPE_FLTOVF);
+ printf("#define VKI_FPE_FLTDIV %d\n", FPE_FLTDIV);
+ printf("#define VKI_FPE_INTOVF %d\n", FPE_INTOVF);
+ printf("#define VKI_FPE_INTDIV %d\n", FPE_INTDIV);
+ printf("\n");
+ printf("#define VKI_ILL_BADSTK %d\n", ILL_BADSTK);
+ printf("#define VKI_ILL_COPROC %d\n", ILL_COPROC);
+ printf("#define VKI_ILL_PRVREG %d\n", ILL_PRVREG);
+ printf("#define VKI_ILL_PRVOPC %d\n", ILL_PRVOPC);
+ printf("#define VKI_ILL_ILLTRP %d\n", ILL_ILLTRP);
+ printf("#define VKI_ILL_ILLADR %d\n", ILL_ILLADR);
+ printf("#define VKI_ILL_ILLOPN %d\n", ILL_ILLOPN);
+ printf("#define VKI_ILL_ILLOPC %d\n", ILL_ILLOPC);
+
+ /* info about siginfo_t */
+ siginfo_t si;
+ printf("\nsizeof(siginfo_t) =3D %d\n", (int)sizeof(siginfo_t));
+ printf(" si_signo: off %2d sz %d\n",=20
+ offsetof(siginfo_t, si_signo),
+ (int)sizeof(si.si_signo));
+ printf(" si_code: off %2d sz %d\n",=20
+ offsetof(siginfo_t, si_code),
+ (int)sizeof(si.si_code));
+ printf(" si_pid: off %2d sz %d\n",
+ offsetof(siginfo_t, si_pid),
+ (int)sizeof(si.si_pid));
+ printf(" si_addr: off %2d sz %d\n",=20
+ offsetof(siginfo_t, si_addr),
+ (int)sizeof(si.si_addr));
+
+ /* info about sigaltstack */
+ stack_t ss;
+ printf("\nsizeof(stack_t) =3D %d\n", (int)sizeof(stack_t));
+ printf(" ss_sp: off %2d sz %d\n",=20
+ offsetof(stack_t, ss_sp),
+ (int)sizeof(ss.ss_sp));
+ printf(" ss_size: off %2d sz %d\n",=20
+ offsetof(stack_t, ss_size),
+ (int)sizeof(ss.ss_size));
+ printf(" ss_flags: off %2d sz %d\n",=20
+ offsetof(stack_t, ss_flags),
+ (int)sizeof(ss.ss_flags));
+
+ printf("\n");
+ printf("/* ---------------- Misc ---------------- */\n");
+ printf("\n");
+ printf("#define VKI_PTRACE_TRACEME %d\n", PT_TRACE_ME);
+ printf("#define VKI_PTRACE_DETACH %d\n", PT_DETACH);
+ printf("\n");
+
+#if 0
+ printf("#define VKI_ %d\n", );
+ printf("#define VKI_ %d\n", );
+ printf("#define VKI_ %d\n", );
+ printf("#define VKI_ %d\n", );
+
+ printf("#define VKI_ 0x%08x\n", );
+ printf("#define VKI_ 0x%08x\n", );
+ printf("#define VKI_ 0x%08x\n", );
+ printf("#define VKI_ 0x%08x\n", );
+#endif
+ return 0;
+}
Added: branches/AIX5/include/vki/vki-ppc32-aix5.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/include/vki/vki-ppc32-aix5.h (r=
ev 0)
+++ branches/AIX5/include/vki/vki-ppc32-aix5.h 2006-09-30 01:51:26 UTC (r=
ev 6092)
@@ -0,0 +1,450 @@
+
+/*--------------------------------------------------------------------*/
+/*--- 32-bit AIX5-specific kernel interface. vki-ppc32-aix5.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* This file defines types and constants for the kernel interface, and t=
o
+ make that clear everything is prefixed VKI_/vki_.
+*/
+
+/* This file was generated by running auxprogs/aix5_VKI_info.c. */
+
+#ifndef __VKI_PPC32_AIX5_H
+#define __VKI_PPC32_AIX5_H
+
+#if !defined(VGP_ppc32_aix5)
+# error This file should be included in 32-bit AIX5 builds only.
+#endif
+
+//--------------------------------------------------------------
+// VERIFIED
+//--------------------------------------------------------------
+
+/* ---------------- Errors ---------------- */
+
+#define VKI_EINVAL 22
+#define VKI_EINTR 4
+#define VKI_ENOSYS 109
+#define VKI_EAGAIN 11
+#define VKI_ENOMEM 12
+#define VKI_EACCES 13
+#define VKI_EEXIST 17
+#define VKI_EPERM 1
+#define VKI_ENOENT 2
+#define VKI_ESRCH 3
+#define VKI_EBADF 9
+#define VKI_EFAULT 14
+#define VKI_EMFILE 24
+#define VKI_ECHILD 10
+#define VKI_ERESTARTSYS 0 /* AIX doesn't have this */
+
+/* ---------------- File I/O ---------------- */
+
+#define VKI_O_WRONLY 0x00000001
+#define VKI_O_RDONLY 0x00000000
+#define VKI_O_APPEND 0x00000008
+#define VKI_O_CREAT 0x00000100
+#define VKI_O_RDWR 0x00000002
+#define VKI_O_EXCL 0x00000400
+#define VKI_O_TRUNC 0x00000200
+
+#define VKI_S_IRUSR 0x00000100
+#define VKI_S_IXUSR 0x00000040
+#define VKI_S_IXGRP 0x00000008
+#define VKI_S_IXOTH 0x00000001
+#define VKI_S_IWUSR 0x00000080
+#define VKI_S_ISUID 0x00000800
+#define VKI_S_ISGID 0x00000400
+#define VKI_S_IFMT 0x0000f000
+#define VKI_S_IFDIR 0x00004000
+#define VKI_S_ISDIR(m) (((m) & VKI_S_IFMT) =3D=3D VKI_S_IFDIR)
+
+#define VKI_F_DUPFD 0x00000000
+#define VKI_F_SETFD 0x00000002
+#define VKI_FD_CLOEXEC 0x00000001
+
+#define VKI_R_OK 0x00000004
+#define VKI_W_OK 0x00000002
+#define VKI_X_OK 0x00000001
+
+/* Known:
+ sizeof(struct stat) =3D 116
+ st_dev: off 0 sz 4
+ st_ino: off 4 sz 4
+ st_mode: off 8 sz 4
+ st_uid: off 16 sz 4
+ st_gid: off 20 sz 4
+ st_size: off 28 sz 4
+*/
+struct vki_stat {
+ /* 0 */ UInt st_dev;
+ /* 4 */ UInt st_ino;
+ /* 8 */ UInt st_mode;
+ /* 12 */ UInt __off12;
+ /* 16 */ UInt st_uid;
+ /* 20 */ UInt st_gid;
+ /* 24 */ UInt __off24;
+ /* 28 */ UInt st_size;
+ /* 32 */ UChar __off32[116-32];
+};
+
+#define VKI_STX_NORMAL 0
+
+typedef UInt vki_size_t;
+
+#define VKI_SEEK_SET 0
+#define VKI_PATH_MAX 1023
+
+/* Known:
+ sizeof(struct iovec) =3D 8
+ iov_base: off 0 sz 4
+ iov_len: off 4 sz 4
+*/
+struct vki_iovec {
+ /* 0 */ Addr iov_base;
+ /* 4 */ UInt iov_len;
+};
+
+#define _VKI_IOC_NONE 0
+#define _VKI_IOC_READ 1 /* kernel reads, userspace writes */
+#define _VKI_IOC_WRITE 2 /* kernel writes, userspace reads */
+#define _VKI_IOC_DIR(_x) (((_x) >> 30) & 3)
+#define _VKI_IOC_SIZE(_x) (((_x) >> 16) & 0x7F)
+
+/* ---------------- MMappery ---------------- */
+
+#define VKI_PAGE_SIZE 4096 /* this is checked by the launcher */
+
+#define VKI_PROT_NONE 0x00000000
+#define VKI_PROT_READ 0x00000001
+#define VKI_PROT_WRITE 0x00000002
+#define VKI_PROT_EXEC 0x00000004
+
+#define VKI_MAP_FIXED 0x00000100
+#define VKI_MAP_PRIVATE 0x00000002
+#define VKI_MAP_ANONYMOUS 0x00000010
+
+/* ---------------- RLimitery ---------------- */
+
+/* rlimit: these pertain to syscall "appgetrlimit" */
+#define VKI_RLIMIT_DATA 0x00000002
+#define VKI_RLIMIT_NOFILE 0x00000007
+#define VKI_RLIMIT_STACK 0x00000003
+#define VKI_RLIMIT_CORE 0x00000004
+
+/* Known:
+ sizeof(struct rlimit) =3D 8
+ rlim_cur: off 0 sz 4
+ rlim_max: off 4 sz 4
+*/
+struct vki_rlimit {
+ UInt rlim_cur;
+ UInt rlim_max;
+};
+
+/* ---------------- Time ---------------- */
+
+/* Known:
+ sizeof(struct timeval) =3D 8
+ tv_sec: off 0 sz 4
+ tv_usec: off 4 sz 4
+*/
+struct vki_timeval {
+ UInt tv_sec; /* seconds */
+ UInt tv_usec; /* microseconds */
+};
+
+/* Known:
+ sizeof(struct timespec) =3D 8
+ tv_sec: off 0 sz 4
+ tv_nsec: off 4 sz 4
+*/
+struct vki_timespec {
+ UInt tv_sec; /* seconds */
+ UInt tv_nsec; /* nanoseconds */
+};
+
+/* ---------------- Signals ---------------- */
+
+/* This layout verified 27 July 06. */
+#define _VKI_NSIG_BPW 32
+#define _VKI_NSIG 64
+#define _VKI_NSIG_WORDS (_VKI_NSIG / _VKI_NSIG_BPW)
+
+typedef struct {
+ UInt sig[_VKI_NSIG_WORDS];
+} vki_sigset_t;
+
+#define VKI_SIGSEGV 11
+#define VKI_SIGBUS 10
+#define VKI_SIGFPE 8
+#define VKI_SIGHUP 1
+#define VKI_SIGINT 2
+#define VKI_SIGQUIT 3
+#define VKI_SIGABRT 6
+#define VKI_SIGUSR1 30
+#define VKI_SIGUSR2 31
+#define VKI_SIGPIPE 13
+#define VKI_SIGALRM 14
+#define VKI_SIGTERM 15
+/* VKI_SIGSTKFLT does not exist on AIX 5.2 */
+#define VKI_SIGTTIN 21
+#define VKI_SIGTTOU 22
+#define VKI_SIGXCPU 24
+#define VKI_SIGXFSZ 25
+#define VKI_SIGVTALRM 34
+#define VKI_SIGPROF 32
+#define VKI_SIGIO 23
+#define VKI_SIGPWR 29
+/* VKI_SIGUNUSED does not exist on AIX 5.2 */
+#define VKI_SIGRTMIN 50
+#define VKI_SIGRTMAX 57
+#define VKI_SIGTRAP 5
+#define VKI_SIGCONT 19
+#define VKI_SIGCHLD 20
+#define VKI_SIGWINCH 28
+#define VKI_SIGURG 16
+#define VKI_SIGILL 4
+#define VKI_SIGSTOP 17
+#define VKI_SIGKILL 9
+#define VKI_SIGTSTP 18
+#define VKI_SIGSYS 12
+
+/* Known:
+ sizeof(struct sigaction) =3D 16
+ sa_handler: off 0 sz 4
+ sa_mask: off 4 sz 8
+ sa_flags: off 12 sz 4
+ sa_sigaction: off 0 sz 4
+*/
+struct vki_sigaction {
+ void* ksa_handler;
+ vki_sigset_t sa_mask;
+ UInt sa_flags;
+};
+
+#define VKI_SA_ONSTACK 1
+#define VKI_SA_RESTART 8
+#define VKI_SA_RESETHAND 2
+#define VKI_SA_SIGINFO 256
+#define VKI_SA_NODEFER 512
+#define VKI_SA_NOCLDSTOP 4
+#define VKI_SA_NOCLDWAIT 1024
+
+#define VKI_SA_RESTORER 0 /* AIX doesn't have this */
+#define VKI_SA_NOMASK 0 /* AIX doesn't have this */
+#define VKI_SA_ONESHOT 0 /* AIX doesn't have this */
+
+#define VKI_SS_ONSTACK 1
+#define VKI_SS_DISABLE 2
+
+#define VKI_MINSIGSTKSZ 1168
+
+#define VKI_SI_TKILL 0 /* AIX doesn't have this */
+#define VKI_SI_USER 0 /* but it does have this */
+
+#define VKI_SIG_BLOCK 0
+#define VKI_SIG_SETMASK 2
+#define VKI_SIG_UNBLOCK 1
+#define VKI_SIG_IGN (void*)1
+#define VKI_SIG_DFL (void*)0
+
+#define VKI_SEGV_ACCERR 51
+#define VKI_SEGV_MAPERR 50
+
+#define VKI_TRAP_TRACE 61
+#define VKI_BUS_OBJERR 3
+#define VKI_BUS_ADRERR 2
+#define VKI_BUS_ADRALN 1
+#define VKI_FPE_FLTSUB 27
+#define VKI_FPE_FLTINV 26
+#define VKI_FPE_FLTRES 25
+#define VKI_FPE_FLTUND 24
+#define VKI_FPE_FLTOVF 23
+#define VKI_FPE_FLTDIV 22
+#define VKI_FPE_INTOVF 21
+#define VKI_FPE_INTDIV 20
+#define VKI_ILL_BADSTK 37
+#define VKI_ILL_COPROC 36
+#define VKI_ILL_PRVREG 35
+#define VKI_ILL_PRVOPC 34
+#define VKI_ILL_ILLTRP 33
+#define VKI_ILL_ILLADR 32
+#define VKI_ILL_ILLOPN 31
+#define VKI_ILL_ILLOPC 30
+
+/* Known:=20
+ sizeof(siginfo_t) =3D 64
+ si_signo: off 0 sz 4
+ si_code: off 8 sz 4
+ si_pid: off 12 sz 4
+ si_addr: off 20 sz 4
+*/
+typedef struct {
+ UInt si_signo;
+ UInt __off4;
+ UInt si_code;
+ UInt si_pid;
+ UInt __off16;
+ void* si_addr;
+ UInt __off24;
+ UInt __off28;
+ UInt __off32;
+ UInt __off36;
+ UInt __off40;
+ UInt __off44;
+ UInt __off48;
+ UInt __off52;
+ UInt __off56;
+ UInt __off60;
+} vki_siginfo_t;
+
+/* Known:
+ sizeof(stack_t) =3D 28
+ ss_sp: off 0 sz 4
+ ss_size: off 4 sz 4
+ ss_flags: off 8 sz 4
+*/
+typedef struct vki_sigaltstack {
+ /* 0 */ void* ss_sp;
+ /* 4 */ UInt ss_size;
+ /* 8 */ UInt ss_flags;
+ /* 12 */ UInt __off12;
+ /* 16 */ UInt __off16;
+ /* 20 */ UInt __off20;
+ /* 24 */ UInt __off24;
+} vki_stack_t;
+
+/* ---------------- Misc ---------------- */
+
+#define VKI_PTRACE_TRACEME 0 /* nb: is really PT_TRACE_ME */
+#define VKI_PTRACE_DETACH 31 /* nb: is really PT_DETACH */
+
+
+//--------------------------------------------------------------
+// BOGUS
+//--------------------------------------------------------------
+
+struct vki_dirent {
+ int bogus;
+};
+
+struct vki_sockaddr {
+ int bogus;
+};
+
+struct vki_pollfd {
+ int bogus;
+};
+
+/* Structure describing an Internet (IP) socket address. */
+//struct vki_sockaddr_in {
+// int bogus;
+//};
+
+struct vki_ucontext {
+ int bogus;
+};
+
+
+//--------------------------------------------------------------
+// FROM glibc-ports-2.4/sysdeps/unix/sysv/aix/dlldr.h
+//--------------------------------------------------------------
+
+/* Copyright (C) 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+
+/*
+
+ int __loadx(flag, module, arg1, arg2, arg3)
+
+ The __loadx() is a call to ld_loadutil() kernel function, which
+ does the real work. Note ld_loadutil() is not exported an cannot be
+ called directly from user space.
+
+ void *ld_loadutil() call is a utility function used for loader extensio=
ns
+ supporting run-time linking and dl*() functions.
+
+ void * - will return the modules entry point if it succeds of NULL
+ on failure.
+
+ int flag - the flag field performas a dual role: the top 8 bits specify
+ the work for __loadx() to perform, the bottom 8 bits are
+ used to pass flags to the work routines, all other bits are
+ reserved.
+
+*/
+
+#define VKI_DL_LOAD 0x1000000 /* __loadx(flag,buf, buf_len, filena=
me, libr_path) */
+#define VKI_DL_POSTLOADQ 0x2000000 /* __loadx(flag,buf, buf_len, module=
_handle) */
+#define VKI_DL_EXECQ 0x3000000 /* __loadx(flag,buf, buf_len) */
+#define VKI_DL_EXITQ 0x4000000 /* __loadx(flag,buf, buf_len) */
+#define VKI_DL_PREUNLOADQ 0x5000000 /* __loadx(flag,buf, buf_len, module=
_handle) */
+#define VKI_DL_INIT 0x6000000 /* __loadx(flag,NULL) */
+#define VKI_DL_GETSYM 0x7000000 /* __loadx(flag,symbol, index, modul=
es_data_origin) */
+#define VKI_DL_SETDEPEND 0x8000000 /* __loadx(flag,import_data_org, imp=
ort_index, */
+ /* export_data_org, exp=
ort_index) */
+#define VKI_DL_DELDEPEND 0x9000000 /* __loadx(flag,import_data_org, imp=
ort_index, */
+ /* export_data_org, exp=
ort_index) */
+#define VKI_DL_GLOBALSYM 0xA000000 /* __loadx(flag,symbol_name, ptr_to_=
rec_index, */
+ /* ptr_to_rec=
_data_org) */
+#define VKI_DL_UNIX_SYSCALL 0xB000000 /* __loadx(flag,syscall_symbol_nam=
e) */
+
+#define VKI_DL_FUNCTION_MASK 0xFF000000
+#define VKI_DL_SRCHDEPENDS 0x00100000
+#define VKI_DL_SRCHMODULE 0x00080000
+#define VKI_DL_SRCHLOADLIST 0x00040000
+#define VKI_DL_LOAD_LDX1 0x00040000
+#define VKI_DL_LOAD_RTL 0x00020000
+#define VKI_DL_HASHSTRING 0x00020000
+#define VKI_DL_INFO_OK 0x00010000
+#define VKI_DL_LOAD_DLINFO 0x00010000
+#define VKI_DL_UNLOADED 0x00020000
+
+
+#endif // __VKI_PPC32_AIX5_H
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/include/vki/vki-ppc64-aix5.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/include/vki/vki-ppc64-aix5.h (r=
ev 0)
+++ branches/AIX5/include/vki/vki-ppc64-aix5.h 2006-09-30 01:51:26 UTC (r=
ev 6092)
@@ -0,0 +1,451 @@
+
+/*--------------------------------------------------------------------*/
+/*--- 64-bit AIX5-specific kernel interface. vki-ppc64-aix5.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* This file defines types and constants for the kernel interface, and t=
o
+ make that clear everything is prefixed VKI_/vki_.
+*/
+
+/* This file was generated by running auxprogs/aix5_VKI_info.c. */
+
+#ifndef __VKI_PPC64_AIX5_H
+#define __VKI_PPC64_AIX5_H
+
+#if !defined(VGP_ppc64_aix5)
+# error This file should be included in 64-bit AIX5 builds only.
+#endif
+
+//--------------------------------------------------------------
+// VERIFIED
+//--------------------------------------------------------------
+
+/* ---------------- Errors ---------------- */
+
+#define VKI_EINVAL 22
+#define VKI_EINTR 4
+#define VKI_ENOSYS 109
+#define VKI_EAGAIN 11
+#define VKI_ENOMEM 12
+#define VKI_EACCES 13
+#define VKI_EEXIST 17
+#define VKI_EPERM 1
+#define VKI_ENOENT 2
+#define VKI_ESRCH 3
+#define VKI_EBADF 9
+#define VKI_EFAULT 14
+#define VKI_EMFILE 24
+#define VKI_ECHILD 10
+#define VKI_ERESTARTSYS 0 /* AIX doesn't have this */
+
+/* ---------------- File I/O ---------------- */
+
+#define VKI_O_WRONLY 0x00000001
+#define VKI_O_RDONLY 0x00000000
+#define VKI_O_APPEND 0x00000008
+#define VKI_O_CREAT 0x00000100
+#define VKI_O_RDWR 0x00000002
+#define VKI_O_EXCL 0x00000400
+#define VKI_O_TRUNC 0x00000200
+
+#define VKI_S_IRUSR 0x00000100
+#define VKI_S_IXUSR 0x00000040
+#define VKI_S_IXGRP 0x00000008
+#define VKI_S_IXOTH 0x00000001
+#define VKI_S_IWUSR 0x00000080
+#define VKI_S_ISUID 0x00000800
+#define VKI_S_ISGID 0x00000400
+#define VKI_S_IFMT 0x0000f000
+#define VKI_S_IFDIR 0x00004000
+#define VKI_S_ISDIR(m) (((m) & VKI_S_IFMT) =3D=3D VKI_S_IFDIR)
+
+#define VKI_F_DUPFD 0x00000000
+#define VKI_F_SETFD 0x00000002
+#define VKI_FD_CLOEXEC 0x00000001
+
+#define VKI_R_OK 0x00000004
+#define VKI_W_OK 0x00000002
+#define VKI_X_OK 0x00000001
+
+/* Known:
+ sizeof(struct stat) =3D 176
+ st_dev: off 0 sz 8
+ st_ino: off 8 sz 8
+ st_mode: off 16 sz 4
+ st_uid: off 24 sz 4
+ st_gid: off 28 sz 4
+ st_size: off 168 sz 8
+*/
+struct vki_stat {
+ /* 0 */ ULong st_dev;
+ /* 8 */ ULong st_ino;
+ /* 16 */ UInt st_mode;
+ /* 20 */ UInt __off20;
+ /* 24 */ UInt st_uid;
+ /* 28 */ UInt st_gid;
+ /* 32 */ UChar __off28[168-32];
+ /* 168 */ ULong st_size;
+};
+
+#define VKI_STX_NORMAL 0
+
+typedef ULong vki_size_t;
+
+#define VKI_SEEK_SET 0
+#define VKI_PATH_MAX 1023
+
+/* Known:
+ sizeof(struct iovec) =3D 16
+ iov_base: off 0 sz 8
+ iov_len: off 8 sz 8
+
+*/
+struct vki_iovec {
+ /* 0 */ Addr iov_base;
+ /* 8 */ ULong iov_len;
+};
+
+#define _VKI_IOC_NONE 0
+#define _VKI_IOC_READ 1 /* kernel reads, userspace writes */
+#define _VKI_IOC_WRITE 2 /* kernel writes, userspace reads */
+#define _VKI_IOC_DIR(_x) (((_x) >> 30) & 3)
+#define _VKI_IOC_SIZE(_x) (((_x) >> 16) & 0x7F)
+
+/* ---------------- MMappery ---------------- */
+
+#define VKI_PAGE_SIZE 4096 /* this is checked by the launcher */
+
+#define VKI_PROT_NONE 0x00000000
+#define VKI_PROT_READ 0x00000001
+#define VKI_PROT_WRITE 0x00000002
+#define VKI_PROT_EXEC 0x00000004
+
+#define VKI_MAP_FIXED 0x00000100
+#define VKI_MAP_PRIVATE 0x00000002
+#define VKI_MAP_ANONYMOUS 0x00000010
+
+/* ---------------- RLimitery ---------------- */
+
+/* rlimit: these pertain to syscall "appgetrlimit" */
+#define VKI_RLIMIT_DATA 0x00000002
+#define VKI_RLIMIT_NOFILE 0x00000007
+#define VKI_RLIMIT_STACK 0x00000003
+#define VKI_RLIMIT_CORE 0x00000004
+
+/* Known:
+ sizeof(struct rlimit) =3D 16
+ rlim_cur: off 0 sz 8
+ rlim_max: off 8 sz 8
+*/
+struct vki_rlimit {
+ /* 0 */ ULong rlim_cur;
+ /* 8 */ ULong rlim_max;
+};
+
+/* ---------------- Time ---------------- */
+
+/* Known:
+ sizeof(struct timeval) =3D 16
+ tv_sec: off 0 sz 8
+ tv_usec: off 8 sz 4
+*/
+struct vki_timeval {
+ /* 0 */ ULong tv_sec; /* seconds */
+ /* 8 */ UInt tv_usec; /* microseconds */
+ /* 12 */ UInt __off12;
+};
+
+/* Known:
+ sizeof(struct timespec) =3D 16
+ tv_sec: off 0 sz 8
+ tv_nsec: off 8 sz 8
+*/
+struct vki_timespec {
+ /* 0 */ ULong tv_sec; /* seconds */
+ /* 8 */ ULong tv_nsec; /* nanoseconds */
+};
+
+/* ---------------- Signals ---------------- */
+
+/* This layout verified 27 July 06. */
+#define _VKI_NSIG_BPW 64
+#define _VKI_NSIG 256
+#define _VKI_NSIG_WORDS (_VKI_NSIG / _VKI_NSIG_BPW)
+
+typedef struct {
+ ULong sig[_VKI_NSIG_WORDS];
+} vki_sigset_t;
+
+#define VKI_SIGSEGV 11
+#define VKI_SIGBUS 10
+#define VKI_SIGFPE 8
+#define VKI_SIGHUP 1
+#define VKI_SIGINT 2
+#define VKI_SIGQUIT 3
+#define VKI_SIGABRT 6
+#define VKI_SIGUSR1 30
+#define VKI_SIGUSR2 31
+#define VKI_SIGPIPE 13
+#define VKI_SIGALRM 14
+#define VKI_SIGTERM 15
+/* VKI_SIGSTKFLT does not exist on AIX 5.2 */
+#define VKI_SIGTTIN 21
+#define VKI_SIGTTOU 22
+#define VKI_SIGXCPU 24
+#define VKI_SIGXFSZ 25
+#define VKI_SIGVTALRM 34
+#define VKI_SIGPROF 32
+#define VKI_SIGIO 23
+#define VKI_SIGPWR 29
+/* VKI_SIGUNUSED does not exist on AIX 5.2 */
+#define VKI_SIGRTMIN 50
+#define VKI_SIGRTMAX 57
+#define VKI_SIGTRAP 5
+#define VKI_SIGCONT 19
+#define VKI_SIGCHLD 20
+#define VKI_SIGWINCH 28
+#define VKI_SIGURG 16
+#define VKI_SIGILL 4
+#define VKI_SIGSTOP 17
+#define VKI_SIGKILL 9
+#define VKI_SIGTSTP 18
+#define VKI_SIGSYS 12
+
+/* Known:
+ sizeof(struct sigaction) =3D 48
+ sa_sigaction: off 0 sz 8
+ sa_handler: off 0 sz 8
+ sa_mask: off 8 sz 32
+ sa_flags: off 40 sz 4
+*/
+struct vki_sigaction {
+ /* 0 */ void* ksa_handler;
+ /* 8 */ vki_sigset_t sa_mask;
+ /* 40 */ UInt sa_flags;
+ /* 44 */ UInt __off44;
+};
+
+#define VKI_SA_ONSTACK 1
+#define VKI_SA_RESTART 8
+#define VKI_SA_RESETHAND 2
+#define VKI_SA_SIGINFO 256
+#define VKI_SA_NODEFER 512
+#define VKI_SA_NOCLDSTOP 4
+#define VKI_SA_NOCLDWAIT 1024
+
+#define VKI_SA_RESTORER 0 /* AIX doesn't have this */
+#define VKI_SA_NOMASK 0 /* AIX doesn't have this */
+#define VKI_SA_ONESHOT 0 /* AIX doesn't have this */
+
+#define VKI_SS_ONSTACK 1
+#define VKI_SS_DISABLE 2
+
+#define VKI_MINSIGSTKSZ 1200
+
+#define VKI_SI_TKILL 0 /* AIX doesn't have this */
+#define VKI_SI_USER 0 /* but it does have this */
+
+#define VKI_SIG_BLOCK 0
+#define VKI_SIG_SETMASK 2
+#define VKI_SIG_UNBLOCK 1
+#define VKI_SIG_IGN (void*)1
+#define VKI_SIG_DFL (void*)0
+
+#define VKI_SEGV_ACCERR 51
+#define VKI_SEGV_MAPERR 50
+
+#define VKI_TRAP_TRACE 61
+#define VKI_BUS_OBJERR 3
+#define VKI_BUS_ADRERR 2
+#define VKI_BUS_ADRALN 1
+#define VKI_FPE_FLTSUB 27
+#define VKI_FPE_FLTINV 26
+#define VKI_FPE_FLTRES 25
+#define VKI_FPE_FLTUND 24
+#define VKI_FPE_FLTOVF 23
+#define VKI_FPE_FLTDIV 22
+#define VKI_FPE_INTOVF 21
+#define VKI_FPE_INTDIV 20
+
+#define VKI_ILL_BADSTK 37
+#define VKI_ILL_COPROC 36
+#define VKI_ILL_PRVREG 35
+#define VKI_ILL_PRVOPC 34
+#define VKI_ILL_ILLTRP 33
+#define VKI_ILL_ILLADR 32
+#define VKI_ILL_ILLOPN 31
+#define VKI_ILL_ILLOPC 30
+
+/* Known:=20
+ sizeof(siginfo_t) =3D 64
+ si_signo: off 0 sz 4
+ si_code: off 8 sz 4
+ si_pid: off 12 sz 4
+ si_addr: off 24 sz 8
+*/
+typedef struct {
+ /* 0 */ UInt si_signo;
+ /* 4 */ UInt __off4;
+ /* 8 */ UInt si_code;
+ /* 12 */ UInt si_pid;
+ /* 16 */ UInt __off16;
+ /* 20 */ UInt __off20;
+ /* 24 */ void* si_addr;
+ /* 32 */ UInt __off32;
+ /* 36 */ UInt __off36;
+ /* 40 */ UInt __off40;
+ /* 44 */ UInt __off44;
+ /* 48 */ UInt __off48;
+ /* 52 */ UInt __off52;
+ /* 56 */ UInt __off56;
+ /* 60 */ UInt __off60;
+} vki_siginfo_t;
+
+/* Known:
+ sizeof(stack_t) =3D 40
+ ss_sp: off 0 sz 8
+ ss_size: off 8 sz 8
+ ss_flags: off 16 sz 4
+*/
+typedef struct vki_sigaltstack {
+ /* 0 */ void* ss_sp;
+ /* 8 */ ULong ss_size;
+ /* 16 */ UInt ss_flags;
+ /* 20 */ UInt __off20;
+ /* 24 */ ULong __off24;
+ /* 32 */ ULong __off32;
+} vki_stack_t;
+
+/* ---------------- Misc ---------------- */
+
+#define VKI_PTRACE_TRACEME 0 /* nb: is really PT_TRACE_ME */
+#define VKI_PTRACE_DETACH 31 /* nb: is really PT_DETACH */
+
+
+//--------------------------------------------------------------
+// BOGUS
+//--------------------------------------------------------------
+
+struct vki_dirent {
+ int bogus;
+};
+
+struct vki_sockaddr {
+ int bogus;
+};
+
+struct vki_pollfd {
+ int bogus;
+};
+
+/* Structure describing an Internet (IP) socket address. */
+//struct vki_sockaddr_in {
+// int bogus;
+//};
+
+struct vki_ucontext {
+ int bogus;
+};
+
+
+//--------------------------------------------------------------
+// FROM glibc-ports-2.4/sysdeps/unix/sysv/aix/dlldr.h
+//--------------------------------------------------------------
+
+/* Copyright (C) 2001 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, write to the Free
+ Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307 USA. */
+
+
+/*
+
+ int __loadx(flag, module, arg1, arg2, arg3)
+
+ The __loadx() is a call to ld_loadutil() kernel function, which
+ does the real work. Note ld_loadutil() is not exported an cannot be
+ called directly from user space.
+
+ void *ld_loadutil() call is a utility function used for loader extensio=
ns
+ supporting run-time linking and dl*() functions.
+
+ void * - will return the modules entry point if it succeds of NULL
+ on failure.
+
+ int flag - the flag field performas a dual role: the top 8 bits specify
+ the work for __loadx() to perform, the bottom 8 bits are
+ used to pass flags to the work routines, all other bits are
+ reserved.
+
+*/
+
+#define VKI_DL_LOAD 0x1000000 /* __loadx(flag,buf, buf_len, filena=
me, libr_path) */
+#define VKI_DL_POSTLOADQ 0x2000000 /* __loadx(flag,buf, buf_len, module=
_handle) */
+#define VKI_DL_EXECQ 0x3000000 /* __loadx(flag,buf, buf_len) */
+#define VKI_DL_EXITQ 0x4000000 /* __loadx(flag,buf, buf_len) */
+#define VKI_DL_PREUNLOADQ 0x5000000 /* __loadx(flag,buf, buf_len, module=
_handle) */
+#define VKI_DL_INIT 0x6000000 /* __loadx(flag,NULL) */
+#define VKI_DL_GETSYM 0x7000000 /* __loadx(flag,symbol, index, modul=
es_data_origin) */
+#define VKI_DL_SETDEPEND 0x8000000 /* __loadx(flag,import_data_org, imp=
ort_index, */
+ /* export_data_org, exp=
ort_index) */
+#define VKI_DL_DELDEPEND 0x9000000 /* __loadx(flag,import_data_org, imp=
ort_index, */
+ /* export_data_org, exp=
ort_index) */
+#define VKI_DL_GLOBALSYM 0xA000000 /* __loadx(flag,symbol_name, ptr_to_=
rec_index, */
+ /* ptr_to_rec=
_data_org) */
+#define VKI_DL_UNIX_SYSCALL 0xB000000 /* __loadx(flag,syscall_symbol_nam=
e) */
+
+#define VKI_DL_FUNCTION_MASK 0xFF000000
+#define VKI_DL_SRCHDEPENDS 0x00100000
+#define VKI_DL_SRCHMODULE 0x00080000
+#define VKI_DL_SRCHLOADLIST 0x00040000
+#define VKI_DL_LOAD_LDX1 0x00040000
+#define VKI_DL_LOAD_RTL 0x00020000
+#define VKI_DL_HASHSTRING 0x00020000
+#define VKI_DL_INFO_OK 0x00010000
+#define VKI_DL_LOAD_DLINFO 0x00010000
+#define VKI_DL_UNLOADED 0x00020000
+
+
+#endif // __VKI_PPC64_AIX5_H
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-09-30 01:40:46
|
Author: sewardj
Date: 2006-09-30 02:40:44 +0100 (Sat, 30 Sep 2006)
New Revision: 6091
Log:
Give the kernel-interface stuff a standard interface in line with
the naming scheme for all other modules in the system.
Added:
branches/AIX5/coregrind/m_vki.c
branches/AIX5/coregrind/pub_core_vki.h
branches/AIX5/include/pub_tool_vki.h
Added: branches/AIX5/coregrind/m_vki.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/m_vki.c (rev 0)
+++ branches/AIX5/coregrind/m_vki.c 2006-09-30 01:40:44 UTC (rev 6091)
@@ -0,0 +1,43 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Notional "implementation" for m_vki. ---*/
+/*--- m_vki.c ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#include "pub_core_basics.h"
+#include "pub_core_vki.h" /* self */
+
+/* We have pub_{core,tool}_vki.h. This is the matching implementation
+ for that interface. In fact there is no implementation, as the
+ sole purpose of the module is to export types and constants
+ describing the kernel interface, so this file is empty. */
+
+
+/*--------------------------------------------------------------------*/
+/*--- end m_vki.c ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/coregrind/pub_core_vki.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/pub_core_vki.h (rev 0=
)
+++ branches/AIX5/coregrind/pub_core_vki.h 2006-09-30 01:40:44 UTC (rev 6=
091)
@@ -0,0 +1,50 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Top level for kernel interface declarations. ---*/
+/*--- pub_core_vki.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2006 Julian Seward
+ js...@ac...
+ Copyright (C) 2005-2006 Nicholas Nethercote
+ nj...@va...
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+#ifndef __PUB_CORE_VKI_H
+#define __PUB_CORE_VKI_H
+
+/* Most unfortunately, all the kernel decls are visible to tools. Not
+ really necessary, but to avoid this would require some tedious
+ refactoring of the sources. Anyway, we live with this kludge, and
+ that means the only thing to be done here is ... */
+
+#include "pub_tool_vki.h"
+
+#endif // __PUB_CORE_VKI_H
+
+/*--------------------------------------------------------------------*/
+/*--- end ---*/
+/*--------------------------------------------------------------------*/
Added: branches/AIX5/include/pub_tool_vki.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/include/pub_tool_vki.h (rev 0)
+++ branches/AIX5/include/pub_tool_vki.h 2006-09-30 01:40:44 UTC (rev 609=
1)
@@ -0,0 +1,62 @@
+
+/*--------------------------------------------------------------------*/
+/*--- Top level for kernel interface declarations. ---*/
+/*--- pub_tool_vki.h ---*/
+/*--------------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright (C) 2000-2006 Julian Seward
+ js...@ac...
+ Copyright (C) 2005-2006 Nicholas Nethercote
+ nj...@va...
+ Copyright (C) 2006-2006 OpenWorks LLP
+ in...@op...
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* This file defines types and constants for the kernel interface, and t=
o
+ make that clear everything is prefixed VKI_/vki_.
+
+ This file is merely a top-level "steering" file, which pulls in the
+ correct bits for the relevant platform. You should not directly
+ #include any file in include/vki; instead #include only this one or
+ pub_core_vki.h.
+*/
+
+#ifndef __PUB_TOOL_VKI_H
+#define __PUB_TOOL_VKI_H
+
+#if defined(VGO_linux)
+# include "vki/vki-linux.h"
+#elif defined(VGP_ppc32_aix5)
+# include "vki/vki-ppc32-aix5.h"
+#elif defined(VGP_ppc64_aix5)
+# include "vki/vki-ppc64-aix5.h"
+#else
+# error Unknown Plat/OS
+#endif
+
+#endif // __PUB_TOOL_VKI_H
+
+/*--------------------------------------------------------------------*/
+/*--- end pub_tool_vki.h ---*/
+/*--------------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2006-09-30 01:29:33
|
Author: sewardj Date: 2006-09-30 02:29:29 +0100 (Sat, 30 Sep 2006) New Revision: 6090 Log: Push these headers into include/vki/. Added: branches/AIX5/include/vki/vki-amd64-linux.h branches/AIX5/include/vki/vki-linux.h branches/AIX5/include/vki/vki-ppc32-linux.h branches/AIX5/include/vki/vki-ppc64-linux.h branches/AIX5/include/vki/vki-x86-linux.h Removed: branches/AIX5/include/vki-amd64-linux.h branches/AIX5/include/vki-linux.h branches/AIX5/include/vki-ppc32-linux.h branches/AIX5/include/vki-ppc64-linux.h branches/AIX5/include/vki-x86-linux.h [... diff too large to include ...] |
|
From: <sv...@va...> - 2006-09-30 01:11:35
|
Author: sewardj Date: 2006-09-30 02:11:34 +0100 (Sat, 30 Sep 2006) New Revision: 6089 Log: New directory in which to place all kernel-interface definitions. Added: branches/AIX5/include/vki/ |
|
From: <sv...@va...> - 2006-09-30 01:09:48
|
Author: sewardj
Date: 2006-09-30 02:09:45 +0100 (Sat, 30 Sep 2006)
New Revision: 6088
Log:
Baseline suppressions for AIX5.
Added:
branches/AIX5/aix5libc.supp
Added: branches/AIX5/aix5libc.supp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/aix5libc.supp (rev 0)
+++ branches/AIX5/aix5libc.supp 2006-09-30 01:09:45 UTC (rev 6088)
@@ -0,0 +1,783 @@
+
+## AIX clients start off by executing a short code stub which
+## loads the preloads, and then jumps to the real client. The
+## stub reads data belonging to V (by design) and it's easier
+## to hide the resulting errors than mess properly with permissions.
+{
+ VG_(trampoline_stuff_start) hack
+ Memcheck:Addr4
+ fun:vgPlain_trampoline_stuff_start
+}
+
+## Not really a bug in the thread library, just padding=20
+## problems.
+# Syscall param thread_setmystate(arg1) points to uninitialised byte(s)
+# at 0xD011F36C: _set_pthread+680 (in /usr/lib/libpthreads.a)
+# by 0xD01142E4: _alloc_initial_pthread+804 (in /usr/lib/libpthreads.=
a)
+# by 0xD01123AC: pthread_init+2880 (in /usr/lib/libpthreads.a)
+# by 0x10000344: call_pthread_init+20 (in /proc/557146/object/a.out)
+# by 0x10000258: __threads_init+64 (in /proc/557146/object/a.out)
+# by 0xD0325278: __modinit+356 (in /usr/lib/threads/libc.a)
+# by 0x10000198: __start+72 (in /proc/557146/object/a.out)
+{
+ AIX-thread_setmystate-padding-kludge-1
+ Memcheck:Param
+ thread_setmystate(arg1)
+ fun:_set_pthread
+ fun:_alloc_initial_pthread
+ fun:pthread_init
+}
+{
+ AIX-thread_setmystate-padding-kludge-2
+ Memcheck:Param
+ thread_setmystate(arg1)
+ fun:_set_pthread
+ fun:_fork_child
+ fun:_atfork_child
+ fun:__fork
+}
+{
+ AIX-thread_setmystate-padding-kludge-3
+ Memcheck:Param
+ thread_setmystate(arg1)
+ fun:_sigsetmask
+ fun:_p_sigaction
+}
+{
+ AIX-thread_setmystate-padding-kludge-4
+ Memcheck:Param
+ thread_setmystate(arg1)
+ fun:_sigsetmask
+ fun:sigthreadmask
+}
+{
+ AIX-thread_setmystate-padding-kludge-5
+ Memcheck:Param
+ thread_setmystate(arg1)
+ fun:_sigsetmask
+ fun:_fork_*
+}
+
+# AIX's libc contains a qsort routine which expertly does
+# memcpy(src, dst, N) for src=3D=3Ddst. This is technically a
+# violation of POSIX and so Memcheck complains.
+{
+ AIX-libc-qsort-bug-1
+ Memcheck:Overlap
+ fun:memcpy
+ fun:qs2
+ fun:qsort
+}
+{
+ AIX-libc-qsort-bug-2
+ Memcheck:Overlap
+ fun:memcpy
+ fun:qs2
+ fun:qs2
+ fun:qsort
+}
+{
+ AIX-libc-qsort-bug-3
+ Memcheck:Overlap
+ fun:memcpy
+ fun:qs2
+ fun:qs2
+ fun:qs2
+}
+
+## Thread library initialisation, cause unknown.
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD030DD30: fseeko64_unlocked (in /usr/lib/libc.a)
+# by 0xD030DFF0: fseeko64 (in /usr/lib/libc.a)
+# by 0xD0453F2C: nlist64 (in /usr/lib/libc.a)
+# by 0xD01267FC: _pth_init_kgetsig (in /usr/lib/libpthread.a)
+# by 0xD01123DC: pthread_init (in /usr/lib/libpthread.a)
+# by 0x10000344: call_pthread_init (in /proc/645084/object/a.out)
+# by 0x10000258: __threads_init (in /proc/645084/object/a.out)
+# by 0xD0325278: __modinit (in /usr/lib/libc.a)
+# by 0x10000198: (below main) (in /proc/645084/object/a.out)
+{
+ AIX-thread-library-init-1
+ Memcheck:Cond
+ fun:fseeko64_unlocked
+ fun:fseeko64
+}
+
+## More of the same (cause again unknown)
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD030E1F0: __ftell (in /usr/lib/libc.a)
+# by 0xD030E334: ftello64 (in /usr/lib/libc.a)
+# by 0xD0454044: nlist64 (in /usr/lib/libc.a)
+# by 0xD01267FC: _pth_init_kgetsig (in /usr/lib/libpthread.a)
+# by 0xD01123DC: pthread_init (in /usr/lib/libpthread.a)
+# by 0x10000344: call_pthread_init (in /proc/448094/object/a.out)
+# by 0x10000258: __threads_init (in /proc/448094/object/a.out)
+# by 0xD0325278: __modinit (in /usr/lib/libc.a)
+# by 0x10000198: (below main) (in /proc/448094/object/a.out)
+{
+ AIX-thread-library-init-2
+ Memcheck:Cond
+ fun:__ftell
+ fun:ftello64
+ fun:nlist64
+}
+
+## Related wierdness (klseek is undocumented, so the wrapper
+## is a guess at best)
+{
+ AIX-libc-klseek-1
+ Memcheck:Param
+ klseek(offset)
+ fun:lseek64
+ fun:fseeko64_unlocked
+ fun:fseeko64
+}
+{
+ AIX-libc-klseek-2
+ Memcheck:Param
+ klseek(whence)
+ fun:lseek64
+ fun:fseeko64_unlocked
+ fun:fseeko64
+}
+
+## Buffer overrun in libc regexp stuff?
+# Invalid read of size 1
+# at 0xD08A2F50: memcpy (mc_replace_strmem.c:437)
+# by 0xD0328B30: match_re (in /usr/lib/libc.a)
+# by 0xD032A464: match_re (in /usr/lib/libc.a)
+# by 0xD032A464: match_re (in /usr/lib/libc.a)
+# by 0xD032A464: match_re (in /usr/lib/libc.a)
+# by 0xD0328AD4: match_re (in /usr/lib/libc.a)
+# by 0xD032A464: match_re (in /usr/lib/libc.a)
+# by 0xD032816C: __regexec_std (in /usr/lib/libc.a)
+# by 0xD0330AA8: regexec (in /usr/lib/libc.a)
+{
+ AIX-regexp-dodgyness-1
+ Memcheck:Addr1
+ fun:memcpy
+ fun:match_re
+ fun:match_re
+ fun:match_re
+}
+
+## Misuse of memcpy
+# Source and destination overlap in memcpy(0x32154ECC, 0x32154EC8, 8)
+# at 0xD13A4F30: memcpy (mc_replace_strmem.c:437)
+# by 0xD03D34BC: __ntree_locate (in /usr/lib/libc.a)
+# by 0xD03D3090: ntree_search (in /usr/lib/libc.a)
+# by 0xD0406E8C: colon_search (in /usr/lib/libc.a)
+# by 0xD03DE068: method_getpw_common (in /usr/lib/libc.a)
+# by 0xD03DEB18: method_getpwuid (in /usr/lib/libc.a)
+# by 0xD03C89DC: _getpwuid_shadow_r (in /usr/lib/libc.a)
+# by 0xD03C62FC: _getpwuid_shadow (in /usr/lib/libc.a)
+{
+ AIX-overlapping-memcpy-1
+ Memcheck:Overlap
+ fun:memcpy
+ fun:__ntree_locate
+ fun:ntree_search
+ fun:colon_search
+}
+{
+ AIX-overlapping-memcpy-2
+ Memcheck:Overlap
+ fun:memcpy
+ fun:__ntree_locate
+ fun:__ntree_locate
+ fun:ntree_search
+}
+
+## No idea what this is caused by
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD03069F8: fflush_unlocked (in /usr/lib/libc.a)
+# by 0xD03077AC: fflush (in /usr/lib/libc.a)
+# by 0xD03D545C: common_close (in /usr/lib/libc.a)
+# by 0xD03D46B8: common_unlock (in /usr/lib/libc.a)
+# by 0xD040712C: colon_search (in /usr/lib/libc.a)
+# by 0xD03DE068: method_getpw_common (in /usr/lib/libc.a)
+# by 0xD03DEB18: method_getpwuid (in /usr/lib/libc.a)
+{
+ AIX-fflush-unlocked-1
+ Memcheck:Cond
+ fun:fflush_unlocked
+ fun:fflush
+ fun:common_close
+ fun:common_unlock
+}
+
+## No idea what this is caused by
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD03EBC30: __method_getentry_v2 (in /usr/lib/libc.a)
+# by 0xD03E887C: does_user_exist (in /usr/lib/libc.a)
+# by 0xD03E9010: getuserattrs (in /usr/lib/libc.a)
+# by 0xD03E4E68: getuserattr (in /usr/lib/libc.a)
+# by 0xD03C8BA4: _getpwuid_shadow_r (in /usr/lib/libc.a)
+# by 0xD03CBE4C: getpwuid (in /usr/lib/libc.a)
+{
+ AIX-__method_getentry_v2-1
+ Memcheck:Cond
+ fun:__method_getentry_v2
+ fun:does_user_exist
+ fun:getuserattrs
+ fun:getuserattr
+}
+{
+ AIX-__method_getentry_v2-2
+ Memcheck:Cond
+ fun:__method_getentry_v2
+ fun:does_user_exist
+ fun:process_module
+ fun:getuserattrs
+}
+
+## No idea what this is caused by
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD03F7120: seekdir64 (in /usr/lib/libc.a)
+# by 0xD041A63C: opendir64 (in /usr/lib/libc.a)
+# by 0xD041961C: getwd (in /usr/lib/libc.a)
+# by 0xD04194B4: getcwd (in /usr/lib/libc.a)
+{
+ AIX-seekdir64
+ Memcheck:Cond
+ fun:seekdir64
+ fun:opendir64
+ fun:getwd
+}
+
+## No idea what this is caused by
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD036C80C: ungetwc (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.=
o))
+# by 0xD0369D94: ungetcc (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.=
o))
+# by 0xD03695EC: _doscan (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.=
o))
+# by 0xD037544C: sscanf (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.o=
))
+# by 0xD1BAD9BC: lapi_atoi (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD1BA8DBC: _read_int_env (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD1BAB86C: _lapi_init_env_once (in /usr/lib/liblapi_r.a(liblapi=
_r.o))
+# by 0xD1BAB44C: _lapi_perproc_setup (in /usr/lib/liblapi_r.a(liblapi=
_r.o))
+# by 0xD0118E50: pthread_once (in /usr/lib/libpthreads.a(shr_xpg5.o))
+# by 0xD1BA86B8: LAPI__Init (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD0EC7A70: lapi_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpci_r=
.o))
+# by 0xD0EC9524: mpci_connect (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpc=
i_r.o))
+{
+ AIX-LAPI-ungetwc-1
+ Memcheck:Cond
+ fun:ungetwc
+ fun:ungetcc
+ fun:_doscan
+ fun:sscanf
+}
+{
+ AIX-LAPI-ungetwc-2
+ Memcheck:Cond
+ fun:ungetwc
+ fun:ungetcc
+ fun:number
+ fun:_doscan
+}
+
+## No idea what this is caused by
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD030CAD0: atoi (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.o))
+# by 0xD0E48DAC: _udp_open_socket (in /usr/lib/liblapi_r.a(liblapiudp=
_r.o))
+# by 0xD0E4B17C: _udp_open (in /usr/lib/liblapi_r.a(liblapiudp_r.o))
+# by 0xD1BAC77C: _lapi_init_function (in /usr/lib/liblapi_r.a(liblapi=
_r.o))
+# by 0xD1BAE4F0: _lapi_non_pss_init (in /usr/lib/liblapi_r.a(liblapi_=
r.o))
+# by 0xD1BA883C: LAPI__Init (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD0EC7A70: lapi_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpci_r=
.o))
+# by 0xD0EC9524: mpci_connect (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpc=
i_r.o))
+# by 0xD06AA28C: _css_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+# by 0xD06AB664: _mp_init_msg_passing (in /usr/lpp/ppe.poe/lib/libmpi=
_r.a(mpicore_r.o))
+# by 0xD0647F54: MPI__Init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+{
+ AIX-LAPI-atoi-1
+ Memcheck:Cond
+ fun:atoi
+ fun:_udp_open_socket
+ fun:_udp_open
+ fun:_lapi_init_function
+}
+{
+ AIX-LAPI-atoi-2
+ Memcheck:Value4
+ fun:atoi
+ fun:_udp_open_socket
+ fun:_udp_open
+ fun:_lapi_init_function
+}
+{
+ AIX-LAPI-atoi-3
+ Memcheck:Value8
+ fun:atoi
+ fun:_udp_open_socket
+ fun:_udp_open
+ fun:_lapi_init_function
+}
+
+## MPI stuff. Not sure what's going on here. Is this a=20
+## legit padding problem? Dunno.
+# Syscall param write(buf) points to uninitialised byte(s)
+# at 0xD0310068: write (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.o)=
)
+# by 0xD1CD03B0: pm_SSM_write (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpi=
poe_r.o))
+# by 0xD1CD5FB0: mp_main (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpipoe_r=
.o))
+# by 0x100005D8: poe_remote_main (in /proc/872668/object/a.out)
+# by 0xD0325414: mod_init1 (in /usr/lpp/ppe.poe/lib/threads/libc.a(sh=
r.o))
+# by 0xD0325328: __modinit (in /usr/lpp/ppe.poe/lib/threads/libc.a(sh=
r.o))
+# by 0x10000198: (below main) (in /proc/872668/object/a.out)
+# Address 0x32131422 is 10 bytes inside a block of size 19 alloc'd
+# at 0xD4230514: malloc (vg_replace_malloc.c:168)
+# by 0xD1CD035C: pm_SSM_write (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpi=
poe_r.o))
+# by 0xD1CD5FB0: mp_main (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpipoe_r=
.o))
+# by 0x100005D8: poe_remote_main (in /proc/872668/object/a.out)
+# by 0xD0325414: mod_init1 (in /usr/lpp/ppe.poe/lib/threads/libc.a(sh=
r.o))
+# by 0xD0325328: __modinit (in /usr/lpp/ppe.poe/lib/threads/libc.a(sh=
r.o))
+# by 0x10000198: (below main) (in /proc/872668/object/a.out)
+{
+ AIX-MPI-pm_SSM_write-1
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_write
+ fun:mp_main
+}
+{
+ AIX-MPI-pm_SSM_write-2
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_write
+ fun:_mp_send_child_pid
+}
+{
+ AIX-MPI-pm_SSM_write-3
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_write
+ fun:_mp_finalize_req
+}
+{
+ AIX-MPI-pm_SSM_write-4
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_write
+ fun:pm_atexit
+}
+{
+ AIX-MPI-pm_SSM_write-5
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_write
+ fun:_udp_init
+}
+{
+ AIX-MPI-pm_SSM_write-6
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_write
+ fun:_us_info
+}
+{
+ AIX-MPI-pm_SSM_read-1
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_read
+ fun:pm_atexit
+}
+{
+ AIX-MPI-pm_SSM_read-2
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_read
+ fun:poe_unlock_all
+}
+{
+ AIX-MPI-pm_SSM_read-3
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_read
+ fun:_css_init
+}
+{
+ AIX-MPI-pm_SSM_read-3
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_read
+ fun:pthread_mutex_lock
+}
+{
+ AIX-MPI-pm_SSM_read-4
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_read
+ fun:_mp_Wtime_stop
+}
+{
+ AIX-MPI-pm_SSM_read-5
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:pm_SSM_read
+ fun:pthread_mutex_unlock
+}
+
+
+## More MPI stuff
+# Invalid read of size 8
+# at 0xD3EB34D8: read_canopus (in /usr/lib/swclock.o)
+# by 0xD3EB31A0: swclockRead (hps_scri.c:431)
+# by 0xD08B6AD4: HPSOclk_reset (in /usr/lpp/ppe.poe/lib/libppe_r.a(dy=
namic.o))
+# by 0xD08B6CB4: HPSOclk_init (in /usr/lpp/ppe.poe/lib/libppe_r.a(dyn=
amic.o))
+# by 0xD16BC9F0: _mp_Wtime_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(m=
pipoe_r.o))
+# by 0xD1FEA3A8: _css_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+# by 0xD1FEB664: _mp_init_msg_passing (in /usr/lpp/ppe.poe/lib/libmpi=
_r.a(mpicore_r.o))
+# by 0xD1F87F54: MPI__Init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+# Address 0x40000000 is not stack'd, malloc'd or (recently) free'd
+{
+ AIX-MPI-read_canopus
+ Memcheck:Addr8
+ fun:read_canopus
+ fun:swclockRead
+ fun:HPSOclk_reset
+ fun:HPSOclk_init
+}
+
+## More MPI stuff (many variants of these)
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD1E8297C: ipcompare (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD033CADC: qs1 (in /usr/lpp/ppe.poe/lib/threads/libc.a(shr.o))
+# by 0xD1E82A38: _derive_up_down_instances (in /usr/lib/liblapi_r.a(l=
iblapi\
+#_r.o))
+# by 0xD1E83484: NAM_monitor_thread (in /usr/lib/liblapi_r.a(liblapi_=
r.o))
+# by 0xD0111440: _pthread_body (in /usr/lib/libpthreads.a(shr_xpg5.o)=
)
+{
+ AIX-MPI-ipcompare-1
+ Memcheck:Cond
+ fun:ipcompare
+ fun:qs1
+ fun:_derive_up_down_instances
+ fun:NAM_monitor_thread
+}
+{
+ AIX-MPI-ipcompare-2
+ Memcheck:Cond
+ fun:ipcompare
+ fun:qs1
+ fun:qsort
+ fun:_derive_up_down_instances
+}
+{
+ AIX-MPI-ipcompare-3
+ Memcheck:Cond
+ fun:ipcompare
+ fun:qs1
+ fun:qs1
+ fun:qsort
+}
+{
+ AIX-MPI-ipcompare-4
+ Memcheck:Cond
+ fun:ipcompare
+ fun:qs1
+ fun:qs1
+ fun:qs1
+}
+{
+ AIX-MPI-ipcompare-5
+ Memcheck:Cond
+ fun:ipcompare
+ fun:bsearch_*_1
+ fun:NAM_monitor_thread
+}
+
+## More MPI stuff
+# Conditional jump or move depends on uninitialised value(s)
+# at 0xD1CA2240: barrier_shft_b (in /usr/lpp/ppe.poe/lib/libmpi_r.a(m=
picore_r.o))
+# by 0xD1CE6FAC: _mpi_barrier (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpi=
core_r.o))
+# by 0xD1D11720: _mpi_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+# by 0xD1D733D8: _css_init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+# by 0xD1D74644: _mp_init_msg_passing (in /usr/lpp/ppe.poe/lib/libmpi=
_r.a(mpicore_r.o))
+# by 0xD1D10F34: MPI__Init (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpicor=
e_r.o))
+# by 0xD33DD5D0: PMPI_Init (libmpiwrap.c:1789)
+# by 0xD33E48F8: before (libmpiwrap.c:186)
+# by 0xD33DD55C: PMPI_Init (libmpiwrap.c:1788)
+{
+ AIX-MPI-barrier_shft_b-1
+ Memcheck:Cond
+ fun:barrier_shft_b
+ fun:_mpi_barrier
+ fun:_mpi_init
+ fun:_css_init
+}
+{
+ AIX-MPI-barrier_shft_b-2
+ Memcheck:Cond
+ fun:barrier_shft_b
+ fun:_mpi_barrier
+ fun:MPI__Finalize
+}
+{
+ AIX-MPI-barrier_shft_b-3
+ Memcheck:Cond
+ fun:barrier_shft_b
+ fun:_mpi_barrier
+ fun:MPI__Barrier
+}
+
+## MPI
+# Invalid read of size 1
+# at 0xD21B8FB8: can_writepkt (in /usr/lib/libhal_r.a(hal_hps.o))
+# by 0xD1E86D7C: _stripe_hal_writepkt_noflip (in /usr/lib/liblapi_r.a=
(liblapi_r.o))
+# by 0xD1E33BB8: _process_one_contig_item (in /usr/lib/liblapi_r.a(li=
blapi_r.o))
+# by 0xD1E4E3A8: _Am_xfer (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD1E4EB9C: _Dgsp_xfer (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD1E49EC0: LAPI__Xfer (in /usr/lib/liblapi_r.a(liblapi_r.o))
+# by 0xD1DCF2FC: mpci_send (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpci_r=
.o))
+# by 0xD1C90F6C: _mpi_start (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpico=
re_r.o))
+# by 0xD1C90648: _mpi_xisend (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpic=
ore_r.o))
+# by 0xD1C89898: MPI__Isend (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpico=
re_r.o))
+# by 0xD3910FD4: generic_Isend (libmpiwrap.c:1129)
+# by 0xFFFFFFFB: ???
+# Address 0x370A4794 is 0 bytes after a block of size 20 alloc'd
+# at 0xD38DE514: malloc (vg_replace_malloc.c:168)
+# by 0x100004BC: main (mpi_vg_demo2.c:56)
+{
+ AIX-MPI-can_writepkt-1
+ Memcheck:Addr1
+ fun:can_writepkt
+ fun:_stripe_hal_writepkt_noflip
+ fun:_process_one_contig_item
+ fun:_Am_xfer
+}
+{
+ AIX-MPI-can_writepkt-2
+ Memcheck:Addr1
+ obj:*
+ fun:_make_localbuf_copy
+ fun:_Am_xfer
+ fun:_Dgsp_xfer
+}
+
+## MPI
+# Invalid write of size 4
+# at 0xD1D14B18: check_ranks (in /usr/lpp/ppe.poe/lib/libmpi_r.a(mpic=
ore_r.o))
+# by 0xD1D147C8: MPI__Group_incl (in /usr/lpp/ppe.poe/lib/libmpi_r.a(=
mpicore_r.o))
+# Address 0x2FF12154 is not stack'd, malloc'd or (recently) free'd
+{
+ AIX-MPI-check_ranks-1
+ Memcheck:Addr4
+ fun:check_ranks
+ fun:MPI__Group_incl
+}
+
+## X, holes in structs?
+{
+ AIX-X11-write-_X11TransSocketWrite
+ Memcheck:Param
+ write(buf)
+ fun:write
+ fun:_X11TransSocketWrite
+ fun:_X11TransWrite
+}
+
+## Who knows
+{
+ AIX-fread_unlocked-1
+ Memcheck:Cond
+ fun:*memcpy
+ fun:fread_unlocked
+ fun:fread
+}
+{
+ AIX-fread_unlocked-2
+ Memcheck:Value8
+ fun:*memcpy
+ fun:fread_unlocked
+ fun:fread
+}
+{
+ AIX-fread_unlocked-3
+ Memcheck:Value4
+ fun:*memcpy
+ fun:fread_unlocked
+ fun:fread
+}
+{
+ AIX-fread_unlocked-4
+ Memcheck:Cond
+ fun:fread_unlocked
+ fun:fread
+}
+
+#####################################################################
+### AIX 64-bit ###
+#####################################################################
+
+{
+ AIX64-uu-sz8
+ Memcheck:Addr8
+ obj:/usr/ccs/bin/usla64
+ obj:/usr/ccs/bin/usla64
+}
+{
+ AIX64-uu-sz4
+ Memcheck:Addr4
+ obj:/usr/ccs/bin/usla64
+ obj:/usr/ccs/bin/usla64
+}
+{
+ AIX64-uu-sz2
+ Memcheck:Addr2
+ obj:/usr/ccs/bin/usla64
+ obj:/usr/ccs/bin/usla64
+}
+{
+ AIX64-uu-sz1
+ Memcheck:Addr1
+ obj:/usr/ccs/bin/usla64
+ obj:/usr/ccs/bin/usla64
+}
+
+{
+ AIX64-uc-sz8
+ Memcheck:Addr8
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+{
+ AIX64-uc-sz4
+ Memcheck:Addr4
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+{
+ AIX64-uc-sz2
+ Memcheck:Addr2
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+{
+ AIX64-uc-sz1
+ Memcheck:Addr1
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+
+{
+ AIX64-?uu-sz8
+ Memcheck:Addr8
+ fun:*
+ obj:/usr/ccs/bin/usla64
+ obj:/usr/ccs/bin/usla64
+}
+{
+ AIX64-?uu-sz4
+ Memcheck:Addr4
+ fun:*
+ obj:/usr/ccs/bin/usla64
+ obj:/usr/ccs/bin/usla64
+}
+
+{
+ AIX64-?uc-sz8
+ Memcheck:Addr8
+ fun:*
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+{
+ AIX64-?uc-sz4
+ Memcheck:Addr4
+ fun:*
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+{
+ AIX64-?uc-sz2
+ Memcheck:Addr2
+ fun:*
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+{
+ AIX64-?uc-sz1
+ Memcheck:Addr1
+ fun:*
+ obj:/usr/ccs/bin/usla64
+ obj:*/libc.a(shr*.o)
+}
+
+{
+ AIX64-usla_exec_init_mods-sz8
+ Memcheck:Addr8
+ fun:usl_exec_init_mods
+}
+
+{
+ AIX64-usla_main-sz8
+ Memcheck:Addr8
+ fun:usla_main
+}
+
+{
+ AIX64-__modfini64-sz8
+ Memcheck:Addr8
+ fun:__modfini64
+}
+
+{
+ AIX64-load-lib?-sz8
+ Memcheck:Addr8
+ fun:load
+ obj:*/lib?.a(shr*.o)
+}
+
+{
+ AIX64-__loadx-libc-sz8
+ Memcheck:Addr8
+ fun:__loadx
+ obj:*/libc.a(shr*.o)
+}
+
+{
+ AIX64-loadquery-libC-sz8
+ Memcheck:Addr8
+ fun:loadquery
+ obj:*/libC.a(shr*.o)
+}
+
+{
+ AIX64-__loadx-pthread_init-sz8
+ Memcheck:Addr8
+ fun:__loadx
+ fun:pthread_init
+}
+
+{
+ AIX64-unload-libC-sz8
+ Memcheck:Addr8
+ fun:unload
+ obj:*/libC.a(shr*.o)
+}
+
+{
+ AIX64-loadquery-__C_runtime_startup-sz8
+ Memcheck:Addr8
+ fun:loadquery
+ fun:__C_runtime_startup
+}
+
+{
+ AIX64-load-libppe-sz8
+ Memcheck:Addr8
+ fun:load
+ obj:*/libppe*.a(*.o)
+}
|
|
From: <sv...@va...> - 2006-09-30 00:30:51
|
Author: sewardj
Date: 2006-09-30 01:30:46 +0100 (Sat, 30 Sep 2006)
New Revision: 1666
Log:
Fix up some function prototype confusion so it compiles again.
Modified:
branches/AIX5/priv/guest-amd64/gdefs.h
branches/AIX5/priv/guest-amd64/toIR.c
branches/AIX5/priv/guest-generic/bb_to_IR.c
branches/AIX5/priv/guest-generic/bb_to_IR.h
branches/AIX5/priv/guest-ppc/toIR.c
branches/AIX5/priv/guest-x86/gdefs.h
branches/AIX5/priv/guest-x86/toIR.c
branches/AIX5/priv/host-amd64/hdefs.h
branches/AIX5/priv/host-amd64/isel.c
branches/AIX5/priv/host-ppc/hdefs.c
branches/AIX5/priv/host-ppc/hdefs.h
branches/AIX5/priv/host-ppc/isel.c
branches/AIX5/priv/host-x86/hdefs.h
branches/AIX5/priv/host-x86/isel.c
branches/AIX5/priv/main/vex_main.c
Modified: branches/AIX5/priv/guest-amd64/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-amd64/gdefs.h 2006-09-29 22:26:57 UTC (rev 1=
665)
+++ branches/AIX5/priv/guest-amd64/gdefs.h 2006-09-30 00:30:46 UTC (rev 1=
666)
@@ -64,6 +64,7 @@
UChar* guest_code,
Long delta,
Addr64 guest_IP,
+ VexArch guest_arch,
VexArchInfo* archinfo,
VexMiscInfo* miscinfo,
Bool host_bigendian );
Modified: branches/AIX5/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-amd64/toIR.c 2006-09-29 22:26:57 UTC (rev 16=
65)
+++ branches/AIX5/priv/guest-amd64/toIR.c 2006-09-30 00:30:46 UTC (rev 16=
66)
@@ -14350,6 +14350,7 @@
UChar* guest_code_IN,
Long delta,
Addr64 guest_IP,
+ VexArch guest_arch,
VexArchInfo* archinfo,
VexMiscInfo* miscinfo,
Bool host_bigendian_IN )
Modified: branches/AIX5/priv/guest-generic/bb_to_IR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-generic/bb_to_IR.c 2006-09-29 22:26:57 UTC (=
rev 1665)
+++ branches/AIX5/priv/guest-generic/bb_to_IR.c 2006-09-30 00:30:46 UTC (=
rev 1666)
@@ -99,6 +99,7 @@
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
+ /*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
/*IN*/ VexMiscInfo* miscinfo_both,
/*IN*/ IRType guest_word_type,
@@ -232,6 +233,7 @@
guest_code,
delta,
guest_IP_curr_instr,
+ arch_guest,
archinfo_guest,
miscinfo_both,
host_bigendian );
Modified: branches/AIX5/priv/guest-generic/bb_to_IR.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-generic/bb_to_IR.h 2006-09-29 22:26:57 UTC (=
rev 1665)
+++ branches/AIX5/priv/guest-generic/bb_to_IR.h 2006-09-30 00:30:46 UTC (=
rev 1666)
@@ -140,6 +140,7 @@
/*IN*/ Addr64 guest_IP,
=20
/* Info about the guest architecture */
+ /*IN*/ VexArch guest_arch,
/*IN*/ VexArchInfo* archinfo,
=20
/* Misc info about guest and host */
@@ -164,6 +165,7 @@
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
+ /*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
/*IN*/ VexMiscInfo* miscinfo_both,
/*IN*/ IRType guest_word_type,
Modified: branches/AIX5/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-ppc/toIR.c 2006-09-29 22:26:57 UTC (rev 1665=
)
+++ branches/AIX5/priv/guest-ppc/toIR.c 2006-09-30 00:30:46 UTC (rev 1666=
)
@@ -9508,6 +9508,7 @@
UChar* guest_code_IN,
Long delta,
Addr64 guest_IP,
+ VexArch guest_arch,
VexArchInfo* archinfo,
VexMiscInfo* miscinfo,
Bool host_bigendian_IN )
Modified: branches/AIX5/priv/guest-x86/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-x86/gdefs.h 2006-09-29 22:26:57 UTC (rev 166=
5)
+++ branches/AIX5/priv/guest-x86/gdefs.h 2006-09-30 00:30:46 UTC (rev 166=
6)
@@ -64,6 +64,7 @@
UChar* guest_code,
Long delta,
Addr64 guest_IP,
+ VexArch guest_arch,
VexArchInfo* archinfo,
VexMiscInfo* miscinfo,
Bool host_bigendian );
Modified: branches/AIX5/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-x86/toIR.c 2006-09-29 22:26:57 UTC (rev 1665=
)
+++ branches/AIX5/priv/guest-x86/toIR.c 2006-09-30 00:30:46 UTC (rev 1666=
)
@@ -12900,6 +12900,7 @@
UChar* guest_code_IN,
Long delta,
Addr64 guest_IP,
+ VexArch guest_arch,
VexArchInfo* archinfo,
VexMiscInfo* miscinfo,
Bool host_bigendian_IN )
Modified: branches/AIX5/priv/host-amd64/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-amd64/hdefs.h 2006-09-29 22:26:57 UTC (rev 16=
65)
+++ branches/AIX5/priv/host-amd64/hdefs.h 2006-09-30 00:30:46 UTC (rev 16=
66)
@@ -725,7 +725,8 @@
extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset, Bool=
);
extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset, Bool=
);
extern void getAllocableRegs_AMD64 ( Int*, HReg** );
-extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArchInfo*,
+extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArch,
+ VexArchInfo*,
VexMiscInfo* );
=20
#endif /* ndef __LIBVEX_HOST_AMD64_HDEFS_H */
Modified: branches/AIX5/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-amd64/isel.c 2006-09-29 22:26:57 UTC (rev 166=
5)
+++ branches/AIX5/priv/host-amd64/isel.c 2006-09-30 00:30:46 UTC (rev 166=
6)
@@ -3801,7 +3801,8 @@
=20
/* Translate an entire BB to amd64 code. */
=20
-HInstrArray* iselBB_AMD64 ( IRBB* bb, VexArchInfo* archinfo_host,
+HInstrArray* iselBB_AMD64 ( IRBB* bb, VexArch arch_host,
+ VexArchInfo* archinfo_host,
VexMiscInfo* vmi/*UNUSED*/ )
{
Int i, j;
Modified: branches/AIX5/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-ppc/hdefs.c 2006-09-29 22:26:57 UTC (rev 1665=
)
+++ branches/AIX5/priv/host-ppc/hdefs.c 2006-09-30 00:30:46 UTC (rev 1666=
)
@@ -1123,8 +1123,6 @@
=20
/* Pretty Print instructions */
static void ppLoadImm ( HReg dst, ULong imm, Bool mode64 ) {
-XXX tidy this up
-#if 1
vex_printf("li_word ");
ppHRegPPC(dst);
if (!mode64) {
@@ -1132,58 +1130,6 @@
} else {
vex_printf(",0x%016llx", imm);
}
-#else
- if (imm >=3D 0xFFFFFFFFFFFF8000ULL || imm < 0x8000) {
- // sign-extendable from 16 bits
- vex_printf("li ");
- ppHRegPPC(dst);
- vex_printf(",0x%x", (UInt)imm);
- } else {
- if (imm >=3D 0xFFFFFFFF80000000ULL || imm < 0x80000000ULL) {
- // sign-extendable from 32 bits
- vex_printf("lis ");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 16));
- vex_printf("ori ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x", (UInt)(imm & 0xFFFF));
- } else {
- // full 64bit immediate load: 5 (five!) insns.
- vassert(mode64);
-
- // load high word
- vex_printf("lis ");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 48) & 0xFFFF);
- vex_printf("ori ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 32) & 0xFFFF);
- =20
- // shift r_dst low word to high word =3D> rldicr
- vex_printf("rldicr ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",32,31 ; ");
-
- // load low word
- vex_printf("oris ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x ; ", (UInt)(imm >> 16) & 0xFFFF);
- vex_printf("ori ");
- ppHRegPPC(dst);
- vex_printf(",");
- ppHRegPPC(dst);
- vex_printf(",0x%x", (UInt)(imm >> 0) & 0xFFFF);
- }
- }
-#endif
}
=20
static void ppMovReg ( HReg dst, HReg src ) {
Modified: branches/AIX5/priv/host-ppc/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-ppc/hdefs.h 2006-09-29 22:26:57 UTC (rev 1665=
)
+++ branches/AIX5/priv/host-ppc/hdefs.h 2006-09-30 00:30:46 UTC (rev 1666=
)
@@ -838,7 +838,8 @@
extern PPCInstr* genSpill_PPC ( HReg rreg, UShort offsetB, Bo=
ol mode64 );
extern PPCInstr* genReload_PPC ( HReg rreg, UShort offsetB, Bo=
ol mode64 );
extern void getAllocableRegs_PPC ( Int*, HReg**, Bool mode64 );
-extern HInstrArray* iselBB_PPC ( IRBB*, VexArchInfo*,
+extern HInstrArray* iselBB_PPC ( IRBB*, VexArch,
+ VexArchInfo*,
VexMiscInfo* );
=20
#endif /* ndef __LIBVEX_HOST_PPC_HDEFS_H */
Modified: branches/AIX5/priv/host-ppc/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-ppc/isel.c 2006-09-29 22:26:57 UTC (rev 1665)
+++ branches/AIX5/priv/host-ppc/isel.c 2006-09-30 00:30:46 UTC (rev 1666)
@@ -3878,7 +3878,8 @@
=20
/* Translate an entire BB to ppc code. */
=20
-HInstrArray* iselBB_PPC ( IRBB* bb, VexArchInfo* archinfo_host,
+HInstrArray* iselBB_PPC ( IRBB* bb, VexArch arch_host,
+ VexArchInfo* archinfo_host,
VexMiscInfo* vmi )
{
Int i, j;
@@ -3886,33 +3887,24 @@
ISelEnv* env;
UInt hwcaps_host =3D archinfo_host->hwcaps;
Bool mode64 =3D False;
- Bool is32, is64;
UInt mask32, mask64;
=20
- /* Figure out whether we're being ppc32 or ppc64 today. */
+ vassert(arch_host =3D=3D VexArchPPC32 || arch_host =3D=3D VexArchPPC6=
4);
+ mode64 =3D arch_host =3D=3D VexArchPPC64;
+
+ /* do some sanity checks */
mask32 =3D VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V
| VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX;
=20
- is32 =3D (hwcaps_host & mask32) > 0;
-
mask64 =3D VEX_HWCAPS_PPC64_V
| VEX_HWCAPS_PPC64_FX | VEX_HWCAPS_PPC64_GX;
=20
- XXX this is a mess, fix me
if (mode64) {
vassert((hwcaps_host & mask32) =3D=3D 0);
} else {
vassert((hwcaps_host & mask64) =3D=3D 0);
}
- is64 =3D (hwcaps_host & mask64) > 0;
=20
- if (is32 && !is64)
- mode64 =3D False;
- else if (is64 && !is32)
- mode64 =3D True;
- else
- vpanic("iselBB_PPC: illegal subarch");
-
/* Make up an initial environment to use. */
env =3D LibVEX_Alloc(sizeof(ISelEnv));
env->vreg_ctr =3D 0;
Modified: branches/AIX5/priv/host-x86/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-x86/hdefs.h 2006-09-29 22:26:57 UTC (rev 1665=
)
+++ branches/AIX5/priv/host-x86/hdefs.h 2006-09-30 00:30:46 UTC (rev 1666=
)
@@ -665,7 +665,8 @@
extern X86Instr* genSpill_X86 ( HReg rreg, Int offset, Bool )=
;
extern X86Instr* genReload_X86 ( HReg rreg, Int offset, Bool )=
;
extern void getAllocableRegs_X86 ( Int*, HReg** );
-extern HInstrArray* iselBB_X86 ( IRBB*, VexArchInfo*,
+extern HInstrArray* iselBB_X86 ( IRBB*, VexArch,
+ VexArchInfo*,
VexMiscInfo* );
=20
#endif /* ndef __LIBVEX_HOST_X86_HDEFS_H */
Modified: branches/AIX5/priv/host-x86/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-x86/isel.c 2006-09-29 22:26:57 UTC (rev 1665)
+++ branches/AIX5/priv/host-x86/isel.c 2006-09-30 00:30:46 UTC (rev 1666)
@@ -3604,7 +3604,8 @@
=20
/* Translate an entire BB to x86 code. */
=20
-HInstrArray* iselBB_X86 ( IRBB* bb, VexArchInfo* archinfo_host,
+HInstrArray* iselBB_X86 ( IRBB* bb, VexArch arch_host,
+ VexArchInfo* archinfo_host,
VexMiscInfo* vmi/*UNUSED*/ )
{
Int i, j;
Modified: branches/AIX5/priv/main/vex_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/main/vex_main.c 2006-09-29 22:26:57 UTC (rev 1665)
+++ branches/AIX5/priv/main/vex_main.c 2006-09-30 00:30:46 UTC (rev 1666)
@@ -193,7 +193,8 @@
HInstr* (*genReload) ( HReg, Int, Bool );
void (*ppInstr) ( HInstr*, Bool );
void (*ppReg) ( HReg );
- HInstrArray* (*iselBB) ( IRBB*, VexArchInfo*, VexMiscInfo* );
+ HInstrArray* (*iselBB) ( IRBB*, VexArch, VexArchInfo*,=20
+ VexMiscInfo* );
Int (*emit) ( UChar*, Int, HInstr*, Bool, void* );
IRExpr* (*specHelper) ( HChar*, IRExpr** );
Bool (*preciseMemExnsFn) ( Int, Int );
@@ -559,7 +560,8 @@
" Instruction selection "
"------------------------\n");
=20
- vcode =3D iselBB ( irbb, &vta->archinfo_host, &vta->miscinfo_both );
+ vcode =3D iselBB ( irbb, vta->arch_host, &vta->archinfo_host,=20
+ &vta->miscinfo_both );
=20
vexAllocSanityCheck();
=20
|