You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
(9) |
2
(16) |
|
3
(9) |
4
(8) |
5
(9) |
6
(10) |
7
(14) |
8
(10) |
9
(7) |
|
10
(14) |
11
(19) |
12
(22) |
13
(18) |
14
(20) |
15
(10) |
16
(12) |
|
17
(13) |
18
(7) |
19
(12) |
20
(13) |
21
(9) |
22
(12) |
23
(6) |
|
24
(5) |
25
(5) |
26
(6) |
27
(7) |
28
(9) |
29
(13) |
30
(21) |
Author: sewardj
Date: 2006-09-29 23:26:57 +0100 (Fri, 29 Sep 2006)
New Revision: 1665
Log:
Changes for supporting AIX5.
- Get rid of a bunch of ad-hoc hacks which hardwire in certain
assumptions about guest and host ABIs. Instead pass that info
in a VexMiscInfo structure. This cleans up various grotty bits.
- Add to ppc32 guest state, redirection-stack stuff already present
in ppc64 guest state. This is to enable function redirection/
wrapping in the presence of TOC pointers in 32-bit mode.
- Add to both ppc32 and ppc64 guest states, a new pseudo-register
LR_AT_SC. This holds the link register value at the most recent
'sc', so that AIX can back up to restart a syscall if needed.
- Add to both ppc32 and ppc64 guest states, a SPRG3 register.
- Use VexMiscInfo to handle 'sc' on AIX differently from Linux:
on AIX, 'sc' continues at the location stated in the link=20
register, not at the next insn.
Modified:
branches/AIX5/priv/guest-amd64/gdefs.h
branches/AIX5/priv/guest-amd64/toIR.c
branches/AIX5/priv/guest-generic/bb_to_IR.c
branches/AIX5/priv/guest-generic/bb_to_IR.h
branches/AIX5/priv/guest-ppc/gdefs.h
branches/AIX5/priv/guest-ppc/ghelpers.c
branches/AIX5/priv/guest-ppc/toIR.c
branches/AIX5/priv/guest-x86/gdefs.h
branches/AIX5/priv/guest-x86/toIR.c
branches/AIX5/priv/host-amd64/hdefs.h
branches/AIX5/priv/host-amd64/isel.c
branches/AIX5/priv/host-ppc/hdefs.c
branches/AIX5/priv/host-ppc/hdefs.h
branches/AIX5/priv/host-ppc/isel.c
branches/AIX5/priv/host-x86/hdefs.h
branches/AIX5/priv/host-x86/isel.c
branches/AIX5/priv/main/vex_main.c
branches/AIX5/pub/libvex.h
branches/AIX5/pub/libvex_basictypes.h
branches/AIX5/pub/libvex_guest_ppc32.h
branches/AIX5/pub/libvex_guest_ppc64.h
branches/AIX5/test_main.c
Modified: branches/AIX5/priv/guest-amd64/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-amd64/gdefs.h 2006-09-29 21:24:54 UTC (rev 1=
664)
+++ branches/AIX5/priv/guest-amd64/gdefs.h 2006-09-29 22:26:57 UTC (rev 1=
665)
@@ -64,8 +64,8 @@
UChar* guest_code,
Long delta,
Addr64 guest_IP,
- VexArch guest_arch,
VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo,
Bool host_bigendian );
=20
/* Used by the optimiser to specialise calls to helpers. */
Modified: branches/AIX5/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-amd64/toIR.c 2006-09-29 21:24:54 UTC (rev 16=
64)
+++ branches/AIX5/priv/guest-amd64/toIR.c 2006-09-29 22:26:57 UTC (rev 16=
65)
@@ -1931,14 +1931,24 @@
generates an AbiHint to say that -128(%rsp) .. -1(%rsp) should now
be regarded as uninitialised.
*/
-static void make_redzone_AbiHint ( IRTemp new_rsp, HChar* who )
+static=20
+void make_redzone_AbiHint ( VexMiscInfo* vmi, IRTemp new_rsp, HChar* who=
)
{
+ Int szB =3D vmi->guest_stack_redzone_size;
+ vassert(szB >=3D 0);
+
+ /* A bit of a kludge. Currently the only AbI we've guested AMD64
+ for is ELF. So just check it's the expected 128 value
+ (paranoia). */
+ vassert(szB =3D=3D 128);
+
if (0) vex_printf("AbiHint: %s\n", who);
vassert(typeOfIRTemp(irbb->tyenv, new_rsp) =3D=3D Ity_I64);
- stmt( IRStmt_AbiHint(=20
- binop(Iop_Sub64, mkexpr(new_rsp), mkU64(128)),=20
- 128=20
- ));
+ if (szB > 0)
+ stmt( IRStmt_AbiHint(=20
+ binop(Iop_Sub64, mkexpr(new_rsp), mkU64(szB)),=20
+ szB
+ ));
}
=20
=20
@@ -3626,7 +3636,8 @@
=20
/* Group 5 extended opcodes. */
static
-ULong dis_Grp5 ( Prefix pfx, Int sz, Long delta, DisResult* dres )
+ULong dis_Grp5 ( VexMiscInfo* vmi,
+ Prefix pfx, Int sz, Long delta, DisResult* dres )
{
Int len;
UChar modrm;
@@ -3666,7 +3677,7 @@
assign(t2, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8)));
putIReg64(R_RSP, mkexpr(t2));
storeLE( mkexpr(t2), mkU64(guest_RIP_bbstart+delta+1));
- make_redzone_AbiHint(t2, "call-Ev(reg)");
+ make_redzone_AbiHint(vmi, t2, "call-Ev(reg)");
jmp_treg(Ijk_Call,t3);
dres->whatNext =3D Dis_StopHere;
showSz =3D False;
@@ -3721,7 +3732,7 @@
assign(t2, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8)));
putIReg64(R_RSP, mkexpr(t2));
storeLE( mkexpr(t2), mkU64(guest_RIP_bbstart+delta+len));
- make_redzone_AbiHint(t2, "call-Ev(mem)");
+ make_redzone_AbiHint(vmi, t2, "call-Ev(mem)");
jmp_treg(Ijk_Call,t3);
dres->whatNext =3D Dis_StopHere;
showSz =3D False;
@@ -7565,7 +7576,7 @@
//.. }
=20
static
-void dis_ret ( ULong d64 )
+void dis_ret ( VexMiscInfo* vmi, ULong d64 )
{
IRTemp t1 =3D newTemp(Ity_I64);=20
IRTemp t2 =3D newTemp(Ity_I64);
@@ -7574,7 +7585,7 @@
assign(t2, loadLE(Ity_I64,mkexpr(t1)));
assign(t3, binop(Iop_Add64, mkexpr(t1), mkU64(8+d64)));
putIReg64(R_RSP, mkexpr(t3));
- make_redzone_AbiHint(t3, "ret");
+ make_redzone_AbiHint(vmi, t3, "ret");
jmp_treg(Ijk_Ret,t2);
}
=20
@@ -8218,7 +8229,8 @@
Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
void* callback_opaque,
Long delta64,
- VexArchInfo* archinfo=20
+ VexArchInfo* archinfo,
+ VexMiscInfo* vmi
)
{
IRType ty;
@@ -12170,7 +12182,7 @@
case 0xC3: /* RET */
if (haveF2(pfx)) goto decode_failure;
/* F3 is acceptable on AMD. */
- dis_ret(0);
+ dis_ret(vmi, 0);
dres.whatNext =3D Dis_StopHere;
DIP(haveF3(pfx) ? "rep ; ret\n" : "ret\n");
break;
@@ -12184,7 +12196,7 @@
assign(t1, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8)));
putIReg64(R_RSP, mkexpr(t1));
storeLE( mkexpr(t1), mkU64(guest_RIP_bbstart+delta));
- make_redzone_AbiHint(t1, "call-d32");
+ make_redzone_AbiHint(vmi, t1, "call-d32");
if (resteerOkFn( callback_opaque, (Addr64)d64) ) {
/* follow into the call target. */
dres.whatNext =3D Dis_Resteer;
@@ -13711,7 +13723,7 @@
=20
case 0xFF: /* Grp5 Ev */
if (haveF2orF3(pfx)) goto decode_failure;
- delta =3D dis_Grp5 ( pfx, sz, delta, &dres );
+ delta =3D dis_Grp5 ( vmi, pfx, sz, delta, &dres );
break;
=20
/* ------------------------ Escapes to 2-byte opcodes -- */
@@ -14338,8 +14350,8 @@
UChar* guest_code_IN,
Long delta,
Addr64 guest_IP,
- VexArch guest_arch,
VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo,
Bool host_bigendian_IN )
{
DisResult dres;
@@ -14357,7 +14369,7 @@
guest_RIP_next_mustcheck =3D False;
=20
dres =3D disInstr_AMD64_WRK ( put_IP, resteerOkFn, callback_opaque,
- delta, archinfo );
+ delta, archinfo, miscinfo );
=20
/* If disInstr_AMD64_WRK tried to figure out the next rip, check it
got it right. Failure of this assertion is serious and denotes
Modified: branches/AIX5/priv/guest-generic/bb_to_IR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-generic/bb_to_IR.c 2006-09-29 21:24:54 UTC (=
rev 1664)
+++ branches/AIX5/priv/guest-generic/bb_to_IR.c 2006-09-29 22:26:57 UTC (=
rev 1665)
@@ -99,8 +99,8 @@
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
- /*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
+ /*IN*/ VexMiscInfo* miscinfo_both,
/*IN*/ IRType guest_word_type,
/*IN*/ Bool do_self_check,
/*IN*/ Bool (*preamble_function)(void*,IRBB=
*),
@@ -232,8 +232,8 @@
guest_code,
delta,
guest_IP_curr_instr,
- arch_guest,
archinfo_guest,
+ miscinfo_both,
host_bigendian );
=20
/* stay sane ... */
@@ -342,6 +342,7 @@
=20
UInt len2check, adler32;
IRTemp tistart_tmp, tilen_tmp;
+ HWord p_adler_helper;
=20
vassert(vge->n_used =3D=3D 1);
len2check =3D vge->len[0];
@@ -373,6 +374,10 @@
irbb->stmts[selfcheck_idx+3]
=3D IRStmt_Put( offB_TILEN, IRExpr_Tmp(tilen_tmp) );
=20
+ p_adler_helper =3D miscinfo_both->host_ppc_calls_use_fndescrs
+ ? ((HWord*)(&genericg_compute_adler32))[0]
+ : (HWord)&genericg_compute_adler32;
+
irbb->stmts[selfcheck_idx+4]
=3D IRStmt_Exit(=20
IRExpr_Binop(=20
@@ -381,11 +386,7 @@
Ity_I32,=20
2/*regparms*/,=20
"genericg_compute_adler32",
-#if defined(__powerpc__) && defined(__powerpc64__)
- (void*)((ULong*)(&genericg_compute_adler32))[0],
-#else
- &genericg_compute_adler32,
-#endif
+ (void*)p_adler_helper,
mkIRExprVec_2(=20
mkIRExpr_HWord( (HWord)guest_code ),=20
mkIRExpr_HWord( (HWord)len2check )
Modified: branches/AIX5/priv/guest-generic/bb_to_IR.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-generic/bb_to_IR.h 2006-09-29 21:24:54 UTC (=
rev 1664)
+++ branches/AIX5/priv/guest-generic/bb_to_IR.h 2006-09-29 22:26:57 UTC (=
rev 1665)
@@ -140,9 +140,11 @@
/*IN*/ Addr64 guest_IP,
=20
/* Info about the guest architecture */
- /*IN*/ VexArch guest_arch,
/*IN*/ VexArchInfo* archinfo,
=20
+ /* Misc info about guest and host */
+ /*IN*/ VexMiscInfo* miscinfo,
+
/* Is the host bigendian? */
/*IN*/ Bool host_bigendian
=20
@@ -162,8 +164,8 @@
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
- /*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
+ /*IN*/ VexMiscInfo* miscinfo_both,
/*IN*/ IRType guest_word_type,
/*IN*/ Bool do_self_check,
/*IN*/ Bool (*preamble_function)(void*,IRBB=
*),
Modified: branches/AIX5/priv/guest-ppc/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-ppc/gdefs.h 2006-09-29 21:24:54 UTC (rev 166=
4)
+++ branches/AIX5/priv/guest-ppc/gdefs.h 2006-09-29 22:26:57 UTC (rev 166=
5)
@@ -67,6 +67,7 @@
Addr64 guest_IP,
VexArch guest_arch,
VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo,
Bool host_bigendian );
=20
/* Used by the optimiser to specialise calls to helpers. */
Modified: branches/AIX5/priv/guest-ppc/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-ppc/ghelpers.c 2006-09-29 21:24:54 UTC (rev =
1664)
+++ branches/AIX5/priv/guest-ppc/ghelpers.c 2006-09-29 22:26:57 UTC (rev =
1665)
@@ -78,7 +78,7 @@
/* Reads a complete, consistent 64-bit TB value. */
ULong ppcg_dirtyhelper_MFTB ( void )
{
-# if defined(__powerpc__)
+# if defined(__powerpc__) || defined(_AIX)
ULong res;
UInt lo, hi1, hi2;
while (1) {
@@ -320,6 +320,7 @@
/* VISIBLE TO LIBVEX CLIENT */
void LibVEX_GuestPPC32_initialise ( /*OUT*/VexGuestPPC32State* vex_state=
)
{
+ Int i;
vex_state->guest_GPR0 =3D 0;
vex_state->guest_GPR1 =3D 0;
vex_state->guest_GPR2 =3D 0;
@@ -464,6 +465,14 @@
vex_state->guest_TILEN =3D 0;
=20
vex_state->guest_NRADDR =3D 0;
+ vex_state->guest_NRADDR_GPR2 =3D 0;
+
+ vex_state->guest_REDIR_SP =3D -1;
+ for (i =3D 0; i < VEX_GUEST_PPC32_REDIR_STACK_SIZE; i++)
+ vex_state->guest_REDIR_STACK[i] =3D 0;
+
+ vex_state->guest_CIA_AT_SC =3D 0;
+ vex_state->guest_SPRG3_RO =3D 0;
}
=20
=20
@@ -620,6 +629,9 @@
vex_state->guest_REDIR_SP =3D -1;
for (i =3D 0; i < VEX_GUEST_PPC64_REDIR_STACK_SIZE; i++)
vex_state->guest_REDIR_STACK[i] =3D 0;
+
+ vex_state->guest_CIA_AT_SC =3D 0;
+ vex_state->guest_SPRG3_RO =3D 0;
}
=20
=20
@@ -733,7 +745,7 @@
=20
/* Describe any sections to be regarded by Memcheck as
'always-defined'. */
- .n_alwaysDefd =3D 8,
+ .n_alwaysDefd =3D 12,
=20
.alwaysDefd=20
=3D { /* 0 */ ALWAYSDEFD32(guest_CIA),
@@ -743,7 +755,11 @@
/* 4 */ ALWAYSDEFD32(guest_VSCR),
/* 5 */ ALWAYSDEFD32(guest_FPROUND),
/* 6 */ ALWAYSDEFD32(guest_RESVN),
- /* 7 */ ALWAYSDEFD32(guest_NRADDR)
+ /* 7 */ ALWAYSDEFD32(guest_NRADDR),
+ /* 8 */ ALWAYSDEFD32(guest_NRADDR_GPR2),
+ /* 9 */ ALWAYSDEFD32(guest_REDIR_SP),
+ /* 10 */ ALWAYSDEFD32(guest_REDIR_STACK),
+ /* 11 */ ALWAYSDEFD32(guest_CIA_AT_SC)
}
};
=20
@@ -767,7 +783,7 @@
=20
/* Describe any sections to be regarded by Memcheck as
'always-defined'. */
- .n_alwaysDefd =3D 11,
+ .n_alwaysDefd =3D 12,
=20
.alwaysDefd=20
=3D { /* 0 */ ALWAYSDEFD64(guest_CIA),
@@ -780,7 +796,8 @@
/* 7 */ ALWAYSDEFD64(guest_NRADDR),
/* 8 */ ALWAYSDEFD64(guest_NRADDR_GPR2),
/* 9 */ ALWAYSDEFD64(guest_REDIR_SP),
- /* 10 */ ALWAYSDEFD64(guest_REDIR_STACK)
+ /* 10 */ ALWAYSDEFD64(guest_REDIR_STACK),
+ /* 11 */ ALWAYSDEFD64(guest_CIA_AT_SC)
}
};
=20
Modified: branches/AIX5/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-ppc/toIR.c 2006-09-29 21:24:54 UTC (rev 1664=
)
+++ branches/AIX5/priv/guest-ppc/toIR.c 2006-09-29 22:26:57 UTC (rev 1665=
)
@@ -75,7 +75,7 @@
Non-Java mode would give us more inaccuracy, as our intermediate
results would then be zeroed, too.
=20
- - 64-bit mode: AbiHints for the stack red zone are only emitted for
+ - AbiHints for the stack red zone are only emitted for
unconditional calls and returns (bl, blr). They should also be
emitted for conditional calls and returns, but we don't have a=20
way to express that right now. Ah well.
@@ -102,7 +102,7 @@
7C210B78 (or 1,1,1) %R3 =3D client_request ( %R4 )
7C421378 (or 2,2,2) %R3 =3D guest_NRADDR
7C631B78 (or 3,3,3) branch-and-link-to-noredir %R11
- 7C842378 (or 4,4,4) %R3 =3D guest_NRADDR_GPR2 (64-bit mode only)
+ 7C842378 (or 4,4,4) %R3 =3D guest_NRADDR_GPR2
=20
Any other bytes following the 16-byte preamble are illegal and
constitute a failure in instruction decoding. This all assumes
@@ -178,17 +178,21 @@
// Given a pointer to a function as obtained by "& functionname" in C,
// produce a pointer to the actual entry point for the function. For
// most platforms it's the identity function. Unfortunately, on
-// ppc64-linux it isn't (sigh).
-static void* fnptr_to_fnentry( void* f )
+// ppc64-linux it isn't (sigh) and ditto for ppc32-aix5 and
+// ppc64-aix5.
+static void* fnptr_to_fnentry( VexMiscInfo* vmi, void* f )
{
-#if defined(__powerpc64__)
- /* f is a pointer to a 3-word function descriptor, of which
- the first word is the entry address. */
- ULong* fdescr =3D (ULong*)f;
- return (void*)(fdescr[0]);
-#else
- return f;
-#endif
+ if (vmi->host_ppc_calls_use_fndescrs) {
+ /* f is a pointer to a 3-word function descriptor, of which the
+ first word is the entry address. */
+ /* note, this is correct even with cross-jitting, since this is
+ purely a host issue, not a guest one. */
+ HWord* fdescr =3D (HWord*)f;
+ return (void*)(fdescr[0]);
+ } else {
+ /* Simple; "& f" points directly at the code for f. */
+ return f;
+ }
}
=20
=20
@@ -213,27 +217,26 @@
(mode64 ? offsetof(VexGuestPPC64State, _x) : \
offsetof(VexGuestPPC32State, _x))
=20
-#define OFFB_CIA offsetofPPCGuestState(guest_CIA)
-#define OFFB_LR offsetofPPCGuestState(guest_LR)
-#define OFFB_CTR offsetofPPCGuestState(guest_CTR)
-#define OFFB_XER_SO offsetofPPCGuestState(guest_XER_SO)
-#define OFFB_XER_OV offsetofPPCGuestState(guest_XER_OV)
-#define OFFB_XER_CA offsetofPPCGuestState(guest_XER_CA)
-#define OFFB_XER_BC offsetofPPCGuestState(guest_XER_BC)
-#define OFFB_FPROUND offsetofPPCGuestState(guest_FPROUND)
-#define OFFB_VRSAVE offsetofPPCGuestState(guest_VRSAVE)
-#define OFFB_VSCR offsetofPPCGuestState(guest_VSCR)
-#define OFFB_EMWARN offsetofPPCGuestState(guest_EMWARN)
-#define OFFB_TISTART offsetofPPCGuestState(guest_TISTART)
-#define OFFB_TILEN offsetofPPCGuestState(guest_TILEN)
-#define OFFB_RESVN offsetofPPCGuestState(guest_RESVN)
-#define OFFB_NRADDR offsetofPPCGuestState(guest_NRADDR)
+#define OFFB_CIA offsetofPPCGuestState(guest_CIA)
+#define OFFB_CIA_AT_SC offsetofPPCGuestState(guest_CIA_AT_SC)
+#define OFFB_SPRG3_RO offsetofPPCGuestState(guest_SPRG3_RO)
+#define OFFB_LR offsetofPPCGuestState(guest_LR)
+#define OFFB_CTR offsetofPPCGuestState(guest_CTR)
+#define OFFB_XER_SO offsetofPPCGuestState(guest_XER_SO)
+#define OFFB_XER_OV offsetofPPCGuestState(guest_XER_OV)
+#define OFFB_XER_CA offsetofPPCGuestState(guest_XER_CA)
+#define OFFB_XER_BC offsetofPPCGuestState(guest_XER_BC)
+#define OFFB_FPROUND offsetofPPCGuestState(guest_FPROUND)
+#define OFFB_VRSAVE offsetofPPCGuestState(guest_VRSAVE)
+#define OFFB_VSCR offsetofPPCGuestState(guest_VSCR)
+#define OFFB_EMWARN offsetofPPCGuestState(guest_EMWARN)
+#define OFFB_TISTART offsetofPPCGuestState(guest_TISTART)
+#define OFFB_TILEN offsetofPPCGuestState(guest_TILEN)
+#define OFFB_RESVN offsetofPPCGuestState(guest_RESVN)
+#define OFFB_NRADDR offsetofPPCGuestState(guest_NRADDR)
+#define OFFB_NRADDR_GPR2 offsetofPPCGuestState(guest_NRADDR_GPR2)
=20
-/* This only exists in the 64-bit guest state */
-#define OFFB64_NRADDR_GPR2 \
- offsetof(VexGuestPPC64State,guest_NRADDR_GPR2)
=20
-
/*------------------------------------------------------------*/
/*--- Extract instruction fields --- */
/*------------------------------------------------------------*/
@@ -324,6 +327,8 @@
PPC_GST_TISTART,// For icbi: start of area to invalidate
PPC_GST_TILEN, // For icbi: length of area to invalidate
PPC_GST_RESVN, // For lwarx/stwcx.
+ PPC_GST_CIA_AT_SC, // the CIA of the most recently executed SC insn
+ PPC_GST_SPRG3_RO, // SPRG3
PPC_GST_MAX
} PPC_GST;
=20
@@ -1203,19 +1208,28 @@
}
=20
=20
-/* Generate AbiHints which mark points at which the ELF ppc64 ABI says
- that the stack red zone (viz, -288(r1) .. -1(r1)) becomes
- undefined. That is at function calls and returns. Only in 64-bit
- mode - ELF ppc32 doesn't have this "feature".
+/* Generate AbiHints which mark points at which the ELF or PowerOpen
+ ABIs say that the stack red zone (viz, -N(r1) .. -1(r1), for some
+ N) becomes undefined. That is at function calls and returns. ELF
+ ppc32 doesn't have this "feature" (how fortunate for it).
*/
-static void make_redzone_AbiHint ( HChar* who )
+static void make_redzone_AbiHint ( VexMiscInfo* vmi, HChar* who )
{
+ Int szB =3D vmi->guest_stack_redzone_size;
if (0) vex_printf("AbiHint: %s\n", who);
- vassert(mode64);
- stmt( IRStmt_AbiHint(=20
- binop(Iop_Sub64, getIReg(1), mkU64(288)),=20
- 288=20
- ));
+ vassert(szB >=3D 0);
+ if (szB > 0) {
+ if (mode64)
+ stmt( IRStmt_AbiHint(=20
+ binop(Iop_Sub64, getIReg(1), mkU64(szB)),=20
+ szB
+ ));
+ else
+ stmt( IRStmt_AbiHint(=20
+ binop(Iop_Sub32, getIReg(1), mkU32(szB)),=20
+ szB
+ ));
+ }
}
=20
=20
@@ -2051,6 +2065,12 @@
{
IRType ty =3D mode64 ? Ity_I64 : Ity_I32;
switch (reg) {
+ case PPC_GST_SPRG3_RO:
+ return IRExpr_Get( OFFB_SPRG3_RO, ty );
+
+ case PPC_GST_CIA:=20
+ return IRExpr_Get( OFFB_CIA, ty );
+
case PPC_GST_LR:=20
return IRExpr_Get( OFFB_LR, ty );
=20
@@ -2181,6 +2201,10 @@
IRType ty_src =3D typeOfIRExpr(irbb->tyenv,src );
vassert( reg < PPC_GST_MAX );
switch (reg) {
+ case PPC_GST_CIA_AT_SC:=20
+ vassert( ty_src =3D=3D ty );
+ stmt( IRStmt_Put( OFFB_CIA_AT_SC, src ) );
+ break;
case PPC_GST_CIA:=20
vassert( ty_src =3D=3D ty );
stmt( IRStmt_Put( OFFB_CIA, src ) );
@@ -3714,7 +3738,7 @@
/*
Integer Store Instructions
*/
-static Bool dis_int_store ( UInt theInstr )
+static Bool dis_int_store ( UInt theInstr, VexMiscInfo* vmi )
{
/* D-Form, X-Form, DS-Form */
UChar opc1 =3D ifieldOPC(theInstr);
@@ -4211,6 +4235,7 @@
Integer Branch Instructions
*/
static Bool dis_branch ( UInt theInstr,=20
+ VexMiscInfo* vmi,
/*OUT*/DisResult* dres,
Bool (*resteerOkFn)(void*,Addr64),
void* callback_opaque )
@@ -4263,8 +4288,10 @@
=20
if (flag_LK) {
putGST( PPC_GST_LR, e_nia );
- if (mode64)
- make_redzone_AbiHint( "branch-and-link (unconditional call)"=
);
+ if (vmi->guest_ppc_zap_RZ_at_bl
+ && vmi->guest_ppc_zap_RZ_at_bl( (ULong)tgt) )
+ make_redzone_AbiHint( vmi,=20
+ "branch-and-link (unconditional call)"=
);
}
=20
if (resteerOkFn( callback_opaque, tgt )) {
@@ -4378,8 +4405,8 @@
Ijk_Boring,
c_nia ));
=20
- if (vanilla_return && mode64)
- make_redzone_AbiHint( "branch-to-lr (unconditional return)" =
);
+ if (vanilla_return && vmi->guest_ppc_zap_RZ_at_blr)
+ make_redzone_AbiHint( vmi, "branch-to-lr (unconditional retu=
rn)" );
=20
/* blrl is pretty strange; it's like a return that sets the
return address of its caller to the insn following this
@@ -4627,7 +4654,8 @@
/*
System Linkage Instructions
*/
-static Bool dis_syslink ( UInt theInstr, DisResult* dres )
+static Bool dis_syslink ( UInt theInstr,=20
+ VexMiscInfo* miscinfo, DisResult* dres )
{
IRType ty =3D mode64 ? Ity_I64 : Ity_I32;
=20
@@ -4638,11 +4666,22 @@
=20
// sc (System Call, PPC32 p504)
DIP("sc\n");
- =20
+
+ /* Copy CIA into the CIA_AT_SC pseudo-register, so that on AIX
+ Valgrind can back the guest up to this instruction if it needs
+ to restart the syscall. */
+ putGST( PPC_GST_CIA_AT_SC, getGST( PPC_GST_CIA ) );
+
/* It's important that all ArchRegs carry their up-to-date value
at this point. So we declare an end-of-block here, which
forces any TempRegs caching ArchRegs to be flushed. */
- irbb->next =3D mkSzImm( ty, nextInsnAddr() );
+ /* At this point, AIX's behaviour differs from Linux's: AIX resumes
+ after the syscall at %lr, whereas Linux does the obvious thing
+ and resumes at the next instruction. Hence we need to encode
+ that into the generated IR. */
+ irbb->next =3D miscinfo->guest_ppc_sc_continues_at_LR
+ ? /*AIXishly*/getGST( PPC_GST_LR )
+ : /*Linuxfully*/mkSzImm( ty, nextInsnAddr() );
irbb->jumpkind =3D Ijk_Sys_syscall;
=20
dres->whatNext =3D Dis_StopHere;
@@ -5193,7 +5232,7 @@
/*
Processor Control Instructions
*/
-static Bool dis_proc_ctl ( UInt theInstr )
+static Bool dis_proc_ctl ( VexMiscInfo* vmi, UInt theInstr )
{
UChar opc1 =3D ifieldOPC(theInstr);
=20
@@ -5290,7 +5329,12 @@
putIReg( rD_addr, mkSzWiden32(ty, getGST( PPC_GST_VRSAVE ),
/* Signed */False) );
break;
- =20
+
+ case 0x103:
+ DIP("mfspr r%u, SPRG3(readonly)\n", rD_addr);
+ putIReg( rD_addr, getGST( PPC_GST_SPRG3_RO ) );
+ break;
+
default:
vex_printf("dis_proc_ctl(ppc)(mfspr,SPR)(0x%x)\n", SPR);
return False;
@@ -5304,7 +5348,7 @@
val,=20
0/*regparms*/,=20
"ppcg_dirtyhelper_MFTB",=20
- fnptr_to_fnentry(&ppcg_dirtyhelper_MFTB),=20
+ fnptr_to_fnentry(vmi, &ppcg_dirtyhelper_MF=
TB),=20
args );
/* execute the dirty call, dumping the result in val. */
stmt( IRStmt_Dirty(d) );
@@ -6704,7 +6748,7 @@
/*
AltiVec Load Instructions
*/
-static Bool dis_av_load ( UInt theInstr )
+static Bool dis_av_load ( VexMiscInfo* vmi, UInt theInstr )
{
/* X-Form */
UChar opc1 =3D ifieldOPC(theInstr);
@@ -6740,13 +6784,13 @@
d =3D unsafeIRDirty_0_N (
0/*regparms*/,=20
"ppc32g_dirtyhelper_LVS",
- fnptr_to_fnentry(&ppc32g_dirtyhelper_LVS),
+ fnptr_to_fnentry(vmi, &ppc32g_dirtyhelper_LVS),
args );
} else {
d =3D unsafeIRDirty_0_N (
0/*regparms*/,=20
"ppc64g_dirtyhelper_LVS",
- fnptr_to_fnentry(&ppc64g_dirtyhelper_LVS),
+ fnptr_to_fnentry(vmi, &ppc64g_dirtyhelper_LVS),
args );
}
DIP("lvsl v%d,r%u,r%u\n", vD_addr, rA_addr, rB_addr);
@@ -6773,13 +6817,13 @@
d =3D unsafeIRDirty_0_N (
0/*regparms*/,=20
"ppc32g_dirtyhelper_LVS",
- fnptr_to_fnentry(&ppc32g_dirtyhelper_LVS),
+ fnptr_to_fnentry(vmi, &ppc32g_dirtyhelper_LVS),
args );
} else {
d =3D unsafeIRDirty_0_N (
0/*regparms*/,=20
"ppc64g_dirtyhelper_LVS",
- fnptr_to_fnentry(&ppc64g_dirtyhelper_LVS),
+ fnptr_to_fnentry(vmi, &ppc64g_dirtyhelper_LVS),
args );
}
DIP("lvsr v%d,r%u,r%u\n", vD_addr, rA_addr, rB_addr);
@@ -8690,7 +8734,8 @@
Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
void* callback_opaque,
Long delta64,
- VexArchInfo* archinfo=20
+ VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo
)
{
UChar opc1;
@@ -8793,14 +8838,12 @@
goto decode_success;
}
else
- if (mode64=20
- && getUIntBigendianly(code+16) =3D=3D 0x7C842378 /* or 4,4,=
4 */) {
+ if (getUIntBigendianly(code+16) =3D=3D 0x7C842378 /* or 4,4,4 *=
/) {
/* %R3 =3D guest_NRADDR_GPR2 */
DIP("r3 =3D guest_NRADDR_GPR2\n");
delta +=3D 20;
dres.len =3D 20;
- vassert(ty =3D=3D Ity_I64);
- putIReg(3, IRExpr_Get( OFFB64_NRADDR_GPR2, ty ));
+ putIReg(3, IRExpr_Get( OFFB_NRADDR_GPR2, ty ));
goto decode_success;
}
/* We don't know what it is. Set opc1/opc2 so decode_failure
@@ -8856,7 +8899,7 @@
/* Integer Store Instructions */
case 0x26: case 0x27: case 0x2C: // stb, stbu, sth
case 0x2D: case 0x24: case 0x25: // sthu, stw, stwu
- if (dis_int_store( theInstr )) goto decode_success;
+ if (dis_int_store( theInstr, miscinfo )) goto decode_success;
goto decode_failure;
=20
/* Integer Load and Store Multiple Instructions */
@@ -8866,13 +8909,14 @@
=20
/* Branch Instructions */
case 0x12: case 0x10: // b, bc
- if (dis_branch(theInstr, &dres, resteerOkFn, callback_opaque))=20
+ if (dis_branch(theInstr, miscinfo, &dres,=20
+ resteerOkFn, callback_opaque))=20
goto decode_success;
goto decode_failure;
=20
/* System Linkage Instructions */
case 0x11: // sc
- if (dis_syslink(theInstr, &dres)) goto decode_success;
+ if (dis_syslink(theInstr, miscinfo, &dres)) goto decode_success;
goto decode_failure;
=20
/* Trap Instructions */
@@ -8937,7 +8981,7 @@
/* 64bit Integer Stores */
case 0x3E: // std, stdu
if (!mode64) goto decode_failure;
- if (dis_int_store( theInstr )) goto decode_success;
+ if (dis_int_store( theInstr, miscinfo )) goto decode_success;
goto decode_failure;
=20
case 0x3F:
@@ -9029,7 +9073,8 @@
=20
/* Branch Instructions */
case 0x210: case 0x010: // bcctr, bclr
- if (dis_branch(theInstr, &dres, resteerOkFn, callback_opaque))=20
+ if (dis_branch(theInstr, miscinfo, &dres,=20
+ resteerOkFn, callback_opaque))=20
goto decode_success;
goto decode_failure;
=20
@@ -9125,13 +9170,13 @@
/* Integer Store Instructions */
case 0x0F7: case 0x0D7: case 0x1B7: // stbux, stbx, sthux
case 0x197: case 0x0B7: case 0x097: // sthx, stwux, stwx
- if (dis_int_store( theInstr )) goto decode_success;
+ if (dis_int_store( theInstr, miscinfo )) goto decode_success;
goto decode_failure;
=20
/* 64bit Integer Store Instructions */
case 0x0B5: case 0x095: // stdux, stdx
if (!mode64) goto decode_failure;
- if (dis_int_store( theInstr )) goto decode_success;
+ if (dis_int_store( theInstr, miscinfo )) goto decode_success;
goto decode_failure;
=20
/* Integer Load and Store with Byte Reverse Instructions */
@@ -9169,7 +9214,7 @@
/* Processor Control Instructions */
case 0x200: case 0x013: case 0x153: // mcrxr, mfcr, mfspr
case 0x173: case 0x090: case 0x1D3: // mftb, mtcrf, mtspr
- if (dis_proc_ctl( theInstr )) goto decode_success;
+ if (dis_proc_ctl( miscinfo, theInstr )) goto decode_success;
goto decode_failure;
=20
/* Cache Management Instructions */
@@ -9225,7 +9270,7 @@
case 0x007: case 0x027: case 0x047: // lvebx, lvehx, lvewx
case 0x067: case 0x167: // lvx, lvxl
if (!allow_V) goto decode_noV;
- if (dis_av_load( theInstr )) goto decode_success;
+ if (dis_av_load( miscinfo, theInstr )) goto decode_success;
goto decode_failure;
=20
/* AV Store */
@@ -9463,8 +9508,8 @@
UChar* guest_code_IN,
Long delta,
Addr64 guest_IP,
- VexArch guest_arch,
VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo,
Bool host_bigendian_IN )
{
IRType ty;
@@ -9500,7 +9545,7 @@
guest_CIA_bbstart =3D mkSzAddr(ty, guest_IP - delta);
=20
dres =3D disInstr_PPC_WRK ( put_IP, resteerOkFn, callback_opaque,
- delta, archinfo );
+ delta, archinfo, miscinfo );
=20
return dres;
}
Modified: branches/AIX5/priv/guest-x86/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-x86/gdefs.h 2006-09-29 21:24:54 UTC (rev 166=
4)
+++ branches/AIX5/priv/guest-x86/gdefs.h 2006-09-29 22:26:57 UTC (rev 166=
5)
@@ -64,8 +64,8 @@
UChar* guest_code,
Long delta,
Addr64 guest_IP,
- VexArch guest_arch,
VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo,
Bool host_bigendian );
=20
/* Used by the optimiser to specialise calls to helpers. */
Modified: branches/AIX5/priv/guest-x86/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/guest-x86/toIR.c 2006-09-29 21:24:54 UTC (rev 1664=
)
+++ branches/AIX5/priv/guest-x86/toIR.c 2006-09-29 22:26:57 UTC (rev 1665=
)
@@ -12900,8 +12900,8 @@
UChar* guest_code_IN,
Long delta,
Addr64 guest_IP,
- VexArch guest_arch,
VexArchInfo* archinfo,
+ VexMiscInfo* miscinfo,
Bool host_bigendian_IN )
{
DisResult dres;
Modified: branches/AIX5/priv/host-amd64/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-amd64/hdefs.h 2006-09-29 21:24:54 UTC (rev 16=
64)
+++ branches/AIX5/priv/host-amd64/hdefs.h 2006-09-29 22:26:57 UTC (rev 16=
65)
@@ -725,7 +725,8 @@
extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset, Bool=
);
extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset, Bool=
);
extern void getAllocableRegs_AMD64 ( Int*, HReg** );
-extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArch, VexArchInfo=
* );
+extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArchInfo*,
+ VexMiscInfo* );
=20
#endif /* ndef __LIBVEX_HOST_AMD64_HDEFS_H */
=20
Modified: branches/AIX5/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-amd64/isel.c 2006-09-29 21:24:54 UTC (rev 166=
4)
+++ branches/AIX5/priv/host-amd64/isel.c 2006-09-29 22:26:57 UTC (rev 166=
5)
@@ -3801,8 +3801,8 @@
=20
/* Translate an entire BB to amd64 code. */
=20
-HInstrArray* iselBB_AMD64 ( IRBB* bb, VexArch arch_host,
- VexArchInfo* archinfo_host )
+HInstrArray* iselBB_AMD64 ( IRBB* bb, VexArchInfo* archinfo_host,
+ VexMiscInfo* vmi/*UNUSED*/ )
{
Int i, j;
HReg hreg, hregHI;
Modified: branches/AIX5/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-ppc/hdefs.c 2006-09-29 21:24:54 UTC (rev 1664=
)
+++ branches/AIX5/priv/host-ppc/hdefs.c 2006-09-29 22:26:57 UTC (rev 1665=
)
@@ -1123,11 +1123,11 @@
=20
/* Pretty Print instructions */
static void ppLoadImm ( HReg dst, ULong imm, Bool mode64 ) {
+XXX tidy this up
#if 1
vex_printf("li_word ");
ppHRegPPC(dst);
if (!mode64) {
- vassert(imm =3D=3D (ULong)(Long)(Int)(UInt)imm);
vex_printf(",0x%08x", (UInt)imm);
} else {
vex_printf(",0x%016llx", imm);
@@ -2496,19 +2496,26 @@
vassert(mode64);
=20
// load high word
+
// lis r_dst, (imm>>48) & 0xFFFF
p =3D mkFormD(p, 15, r_dst, 0, (imm>>48) & 0xFFFF);
+
// ori r_dst, r_dst, (imm>>32) & 0xFFFF
- p =3D mkFormD(p, 24, r_dst, r_dst, (imm>>32) & 0xFFFF);
+ if ((imm>>32) & 0xFFFF)
+ p =3D mkFormD(p, 24, r_dst, r_dst, (imm>>32) & 0xFFFF);
=20
// shift r_dst low word to high word =3D> rldicr
p =3D mkFormMD(p, 30, r_dst, r_dst, 32, 31, 1);
=20
// load low word
+
// oris r_dst, r_dst, (imm>>16) & 0xFFFF
- p =3D mkFormD(p, 25, r_dst, r_dst, (imm>>16) & 0xFFFF);
+ if ((imm>>16) & 0xFFFF)
+ p =3D mkFormD(p, 25, r_dst, r_dst, (imm>>16) & 0xFFFF);
+
// ori r_dst, r_dst, (imm) & 0xFFFF
- p =3D mkFormD(p, 24, r_dst, r_dst, imm & 0xFFFF);
+ if (imm & 0xFFFF)
+ p =3D mkFormD(p, 24, r_dst, r_dst, imm & 0xFFFF);
}
}
return p;
Modified: branches/AIX5/priv/host-ppc/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-ppc/hdefs.h 2006-09-29 21:24:54 UTC (rev 1664=
)
+++ branches/AIX5/priv/host-ppc/hdefs.h 2006-09-29 22:26:57 UTC (rev 1665=
)
@@ -838,7 +838,8 @@
extern PPCInstr* genSpill_PPC ( HReg rreg, UShort offsetB, Bo=
ol mode64 );
extern PPCInstr* genReload_PPC ( HReg rreg, UShort offsetB, Bo=
ol mode64 );
extern void getAllocableRegs_PPC ( Int*, HReg**, Bool mode64 );
-extern HInstrArray* iselBB_PPC ( IRBB*, VexArch, VexArchInfo* =
);
+extern HInstrArray* iselBB_PPC ( IRBB*, VexArchInfo*,
+ VexMiscInfo* );
=20
#endif /* ndef __LIBVEX_HOST_PPC_HDEFS_H */
=20
Modified: branches/AIX5/priv/host-ppc/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-ppc/isel.c 2006-09-29 21:24:54 UTC (rev 1664)
+++ branches/AIX5/priv/host-ppc/isel.c 2006-09-29 22:26:57 UTC (rev 1665)
@@ -253,6 +253,9 @@
was most recently set. Setting to NULL is always safe. Used to
avoid redundant settings of the FPU's rounding mode, as
described in set_FPU_rounding_mode below.
+
+ - A VexMiscInfo*, needed for knowing how to generate
+ function calls for this target
*/
=20
typedef
@@ -275,6 +278,8 @@
Bool mode64;
=20
IRExpr* previous_rm;
+
+ VexMiscInfo* vmi;
}
ISelEnv;
=20
@@ -532,7 +537,7 @@
=20
/* Given a guest-state array descriptor, an index expression and a
bias, generate a PPCAMode pointing at the relevant piece of=20
- guest state. Only needed in 64-bit mode. */
+ guest state. */
static
PPCAMode* genGuestArrayOffset ( ISelEnv* env, IRArray* descr,
IRExpr* off, Int bias )
@@ -542,23 +547,22 @@
Int nElems =3D descr->nElems;
Int shift =3D 0;
=20
- vassert(env->mode64);
-
/* Throw out any cases we don't need. In theory there might be a
day where we need to handle others, but not today. */
=20
if (nElems !=3D 16 && nElems !=3D 32)
- vpanic("genGuestArrayOffset(ppc64 host)(1)");
+ vpanic("genGuestArrayOffset(ppc host)(1)");
=20
switch (elemSz) {
+ case 4: shift =3D 2; break;
case 8: shift =3D 3; break;
- default: vpanic("genGuestArrayOffset(ppc64 host)(2)");
+ default: vpanic("genGuestArrayOffset(ppc host)(2)");
}
=20
if (bias < -100 || bias > 100) /* somewhat arbitrarily */
- vpanic("genGuestArrayOffset(ppc64 host)(3)");
+ vpanic("genGuestArrayOffset(ppc host)(3)");
if (descr->base < 0 || descr->base > 2000) /* somewhat arbitrarily */
- vpanic("genGuestArrayOffset(ppc64 host)(4)");
+ vpanic("genGuestArrayOffset(ppc host)(4)");
=20
/* Compute off into a reg, %off. Then return:
=20
@@ -580,7 +584,7 @@
PPCRH_Imm(False/*signed*/, toUShort(nElems-1))));
addInstr(env, PPCInstr_Shft(
Pshft_SHL,=20
- False/*64-bit shift*/,
+ env->mode64 ? False : True/*F:64-bit, T:32-bit shift=
*/,
rtmp, rtmp,=20
PPCRH_Imm(False/*unsigned*/, toUShort(shift))));
addInstr(env, PPCInstr_Alu(
@@ -631,6 +635,11 @@
ULong target;
Bool mode64 =3D env->mode64;
=20
+ /* Do we need to force use of an odd-even reg pair for 64-bit
+ args? */
+ Bool regalign_int64s
+ =3D (!mode64) && env->vmi->host_ppc32_regalign_int64_args;
+
/* Marshal args for a call and do the call.
=20
If passBBP is True, %rbp (the baseblock pointer) is to be passed
@@ -756,8 +765,9 @@
iselWordExpr_R(env, args[i]) ));
} else { // Ity_I64
HReg rHi, rLo;
- if (argreg%2 =3D=3D 1) // ppc32 abi spec for passing LONG=
_LONG
- argreg++; // XXX: odd argreg =3D> even rN
+ if (regalign_int64s && (argreg%2) =3D=3D 1)=20
+ // ppc32 ELF abi spec for passing LONG_LON=
G
+ argreg++; // XXX: odd argreg =3D> even rN
vassert(argreg < PPC_N_REGPARMS-1);
iselInt64Expr(&rHi,&rLo, env, args[i]);
argiregs |=3D (1 << (argreg+3));
@@ -799,8 +809,9 @@
tmpregs[argreg] =3D iselWordExpr_R(env, args[i]);
} else { // Ity_I64
HReg rHi, rLo;
- if (argreg%2 =3D=3D 1) // ppc32 abi spec for passing LONG=
_LONG
- argreg++; // XXX: odd argreg =3D> even rN
+ if (regalign_int64s && (argreg%2) =3D=3D 1)
+ // ppc32 ELF abi spec for passing LONG_LONG
+ argreg++; // XXX: odd argreg =3D> even rN
vassert(argreg < PPC_N_REGPARMS-1);
iselInt64Expr(&rHi,&rLo, env, args[i]);
tmpregs[argreg++] =3D rHi;
@@ -1788,17 +1799,23 @@
break;
}
=20
- case Iex_GetI:=20
+ case Iex_GetI: {
+ PPCAMode* src_am
+ =3D genGuestArrayOffset( env, e->Iex.GetI.descr,
+ e->Iex.GetI.ix, e->Iex.GetI.bias );
+ HReg r_dst =3D newVRegI(env);
if (mode64 && ty =3D=3D Ity_I64) {
- PPCAMode* src_am
- =3D genGuestArrayOffset( env, e->Iex.GetI.descr,
- e->Iex.GetI.ix, e->Iex.GetI.bias=
);
- HReg r_dst =3D newVRegI(env);
addInstr(env, PPCInstr_Load( toUChar(8),
r_dst, src_am, mode64 ));
return r_dst;
}
+ if ((!mode64) && ty =3D=3D Ity_I32) {
+ addInstr(env, PPCInstr_Load( toUChar(4),
+ r_dst, src_am, mode64 ));
+ return r_dst;
+ }
break;
+ }
=20
/* --------- CCALL --------- */
case Iex_CCall: {
@@ -2485,8 +2502,8 @@
HReg tLo =3D newVRegI(env);
HReg tHi =3D newVRegI(env);
vassert(e->Iex.Const.con->tag =3D=3D Ico_U64);
- addInstr(env, PPCInstr_LI(tHi, wHi, False/*mode32*/));
- addInstr(env, PPCInstr_LI(tLo, wLo, False/*mode32*/));
+ addInstr(env, PPCInstr_LI(tHi, (Long)(Int)wHi, False/*mode32*/));
+ addInstr(env, PPCInstr_LI(tLo, (Long)(Int)wLo, False/*mode32*/));
*rHi =3D tHi;
*rLo =3D tLo;
return;
@@ -3674,21 +3691,26 @@
}
=20
/* --------- Indexed PUT --------- */
- case Ist_PutI:
- if (mode64) {
- PPCAMode* dst_am
- =3D genGuestArrayOffset(
- env, stmt->Ist.PutI.descr,=20
- stmt->Ist.PutI.ix, stmt->Ist.PutI.bias );
- IRType ty =3D typeOfIRExpr(env->type_env, stmt->Ist.PutI.data);
- if (ty =3D=3D Ity_I64) {
- HReg r_src =3D iselWordExpr_R(env, stmt->Ist.PutI.data);
- addInstr(env, PPCInstr_Store( toUChar(8),
- dst_am, r_src, mode64 ));
- return;
- }
+ case Ist_PutI: {
+ PPCAMode* dst_am
+ =3D genGuestArrayOffset(
+ env, stmt->Ist.PutI.descr,=20
+ stmt->Ist.PutI.ix, stmt->Ist.PutI.bias );
+ IRType ty =3D typeOfIRExpr(env->type_env, stmt->Ist.PutI.data);
+ if (mode64 && ty =3D=3D Ity_I64) {
+ HReg r_src =3D iselWordExpr_R(env, stmt->Ist.PutI.data);
+ addInstr(env, PPCInstr_Store( toUChar(8),
+ dst_am, r_src, mode64 ));
+ return;
}
+ if ((!mode64) && ty =3D=3D Ity_I32) {
+ HReg r_src =3D iselWordExpr_R(env, stmt->Ist.PutI.data);
+ addInstr(env, PPCInstr_Store( toUChar(4),
+ dst_am, r_src, mode64 ));
+ return;
+ }
break;
+ }
=20
/* --------- TMP --------- */
case Ist_Tmp: {
@@ -3856,32 +3878,41 @@
=20
/* Translate an entire BB to ppc code. */
=20
-HInstrArray* iselBB_PPC ( IRBB* bb, VexArch arch_host,
- VexArchInfo* archinfo_host )
+HInstrArray* iselBB_PPC ( IRBB* bb, VexArchInfo* archinfo_host,
+ VexMiscInfo* vmi )
{
Int i, j;
HReg hreg, hregHI;
ISelEnv* env;
UInt hwcaps_host =3D archinfo_host->hwcaps;
Bool mode64 =3D False;
+ Bool is32, is64;
UInt mask32, mask64;
=20
- vassert(arch_host =3D=3D VexArchPPC32 || arch_host =3D=3D VexArchPPC6=
4);
- mode64 =3D arch_host =3D=3D VexArchPPC64;
-
- /* do some sanity checks */
+ /* Figure out whether we're being ppc32 or ppc64 today. */
mask32 =3D VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V
| VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX;
=20
+ is32 =3D (hwcaps_host & mask32) > 0;
+
mask64 =3D VEX_HWCAPS_PPC64_V
| VEX_HWCAPS_PPC64_FX | VEX_HWCAPS_PPC64_GX;
=20
+ XXX this is a mess, fix me
if (mode64) {
vassert((hwcaps_host & mask32) =3D=3D 0);
} else {
vassert((hwcaps_host & mask64) =3D=3D 0);
}
+ is64 =3D (hwcaps_host & mask64) > 0;
=20
+ if (is32 && !is64)
+ mode64 =3D False;
+ else if (is64 && !is32)
+ mode64 =3D True;
+ else
+ vpanic("iselBB_PPC: illegal subarch");
+
/* Make up an initial environment to use. */
env =3D LibVEX_Alloc(sizeof(ISelEnv));
env->vreg_ctr =3D 0;
@@ -3904,6 +3935,7 @@
/* and finally ... */
env->hwcaps =3D hwcaps_host;
env->previous_rm =3D NULL;
+ env->vmi =3D vmi;
=20
/* For each IR temporary, allocate a suitably-kinded virtual
register. */
Modified: branches/AIX5/priv/host-x86/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-x86/hdefs.h 2006-09-29 21:24:54 UTC (rev 1664=
)
+++ branches/AIX5/priv/host-x86/hdefs.h 2006-09-29 22:26:57 UTC (rev 1665=
)
@@ -665,7 +665,8 @@
extern X86Instr* genSpill_X86 ( HReg rreg, Int offset, Bool )=
;
extern X86Instr* genReload_X86 ( HReg rreg, Int offset, Bool )=
;
extern void getAllocableRegs_X86 ( Int*, HReg** );
-extern HInstrArray* iselBB_X86 ( IRBB*, VexArch, VexArchInfo* =
);
+extern HInstrArray* iselBB_X86 ( IRBB*, VexArchInfo*,
+ VexMiscInfo* );
=20
#endif /* ndef __LIBVEX_HOST_X86_HDEFS_H */
=20
Modified: branches/AIX5/priv/host-x86/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/host-x86/isel.c 2006-09-29 21:24:54 UTC (rev 1664)
+++ branches/AIX5/priv/host-x86/isel.c 2006-09-29 22:26:57 UTC (rev 1665)
@@ -3604,8 +3604,8 @@
=20
/* Translate an entire BB to x86 code. */
=20
-HInstrArray* iselBB_X86 ( IRBB* bb, VexArch arch_host,
- VexArchInfo* archinfo_host )
+HInstrArray* iselBB_X86 ( IRBB* bb, VexArchInfo* archinfo_host,
+ VexMiscInfo* vmi/*UNUSED*/ )
{
Int i, j;
HReg hreg, hregHI;
Modified: branches/AIX5/priv/main/vex_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/priv/main/vex_main.c 2006-09-29 21:24:54 UTC (rev 1664)
+++ branches/AIX5/priv/main/vex_main.c 2006-09-29 22:26:57 UTC (rev 1665)
@@ -193,7 +193,7 @@
HInstr* (*genReload) ( HReg, Int, Bool );
void (*ppInstr) ( HInstr*, Bool );
void (*ppReg) ( HReg );
- HInstrArray* (*iselBB) ( IRBB*, VexArch, VexArchInfo* );
+ HInstrArray* (*iselBB) ( IRBB*, VexArchInfo*, VexMiscInfo* );
Int (*emit) ( UChar*, Int, HInstr*, Bool, void* );
IRExpr* (*specHelper) ( HChar*, IRExpr** );
Bool (*preciseMemExnsFn) ( Int, Int );
@@ -432,6 +432,7 @@
host_is_bigendian,
vta->arch_guest,
&vta->archinfo_guest,
+ &vta->miscinfo_both,
guest_word_type,
vta->do_self_check,
vta->preamble_function,
@@ -558,7 +559,7 @@
" Instruction selection "
"------------------------\n");
=20
- vcode =3D iselBB ( irbb, vta->arch_host, &vta->archinfo_host );
+ vcode =3D iselBB ( irbb, &vta->archinfo_host, &vta->miscinfo_both );
=20
vexAllocSanityCheck();
=20
@@ -695,7 +696,6 @@
}
=20
=20
-
/* Write default settings info *vai. */
void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai )
{
@@ -703,7 +703,18 @@
vai->ppc_cache_line_szB =3D 0;
}
=20
+/* Write default settings info *vmi. */
+void LibVEX_default_VexMiscInfo ( /*OUT*/VexMiscInfo* vmi )
+{
+ vmi->guest_stack_redzone_size =3D 0;
+ vmi->guest_ppc_zap_RZ_at_blr =3D False;
+ vmi->guest_ppc_zap_RZ_at_bl =3D NULL;
+ vmi->guest_ppc_sc_continues_at_LR =3D False;
+ vmi->host_ppc_calls_use_fndescrs =3D False;
+ vmi->host_ppc32_regalign_int64_args =3D False;
+}
=20
+
/* Return a string showing the hwcaps in a nice way. The string will
be NULL for invalid combinations of flags, so these functions also
serve as a way to validate hwcaps values. */
Modified: branches/AIX5/pub/libvex.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/pub/libvex.h 2006-09-29 21:24:54 UTC (rev 1664)
+++ branches/AIX5/pub/libvex.h 2006-09-29 22:26:57 UTC (rev 1665)
@@ -110,8 +110,8 @@
=20
=20
/* This struct is a bit of a hack, but is needed to carry misc
- important bits of info about an arch. Fields which are optional or
- ignored on some arch should be set to zero. */
+ important bits of info about an arch. Fields which are meaningless
+ or ignored for the platform in question should be set to zero. */
=20
typedef
struct {
@@ -127,6 +127,90 @@
void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai );
=20
=20
+/* This struct carries guest and host ABI variant information that may
+ be needed. Fields which are meaningless or ignored for the
+ platform in question should be set to zero.
+
+ Settings which are believed to be correct are:
+
+ guest_stack_redzone_size
+ guest is ppc32-linux =3D=3D> 0
+ guest is ppc64-linux =3D=3D> 288
+ guest is ppc32-aix5 =3D=3D> 220
+ guest is ppc64-aix5 =3D=3D> unknown
+ guest is amd64-linux =3D=3D> 128
+ guest is other =3D=3D> inapplicable
+
+ guest_ppc_zap_RZ_at_blr
+ guest is ppc64-linux =3D=3D> True
+ guest is ppc32-linux =3D=3D> False
+ guest is ppc64-aix5 =3D=3D> unknown
+ guest is ppc32-aix5 =3D=3D> False
+ guest is other =3D=3D> inapplicable
+
+ guest_ppc_zap_RZ_at_bl
+ guest is ppc64-linux =3D=3D> const True
+ guest is ppc32-linux =3D=3D> const False
+ guest is ppc64-aix5 =3D=3D> unknown
+ guest is ppc32-aix5 =3D=3D> True except for calls =
to
+ millicode, $SAVEFn, $RESTF=
n
+ guest is other =3D=3D> inapplicable
+
+ guest_ppc_sc_continues_at_LR:
+ guest is ppc32-aix5 or ppc64-aix5 =3D=3D> True
+ guest is ppc32-linux or ppc64-linux =3D=3D> False
+ guest is other =3D=3D> inapplicable
+
+ host_ppc_calls_use_fndescrs:
+ host is ppc32-linux =3D=3D> False
+ host is ppc64-linux =3D=3D> True
+ host is ppc32-aix5 or ppc64-aix5 =3D=3D> True
+ host is other =3D=3D> inapplicable
+
+ host_ppc32_regalign_int64_args:
+ host is ppc32-linux =3D=3D> True
+ host is ppc32-aix5 =3D=3D> False
+ host is other =3D=3D> inapplicable
+*/
+
+typedef
+ struct {
+ /* PPC and AMD64 GUESTS only: how many bytes below the=20
+ stack pointer are validly addressible? */
+ Int guest_stack_redzone_size;
+
+ /* PPC GUESTS only: should we zap the stack red zone at a 'blr'
+ (function return) ? */
+ Bool guest_ppc_zap_RZ_at_blr;
+
+ /* PPC GUESTS only: should we zap the stack red zone at a 'bl'
+ (function call) ? Is supplied with the guest address of the
+ target of the call since that may be significant. If NULL,
+ is assumed equivalent to a fn which always returns False. */
+ Bool (*guest_ppc_zap_RZ_at_bl)(Addr64);
+
+ /* PPC32/PPC64 GUESTS only: where does the kernel resume after
+ 'sc'? False =3D> Linux style, at the next insn. True =3D> AIX
+ style, at the address stated in the link register. */
+ Bool guest_ppc_sc_continues_at_LR;
+
+ /* PPC32/PPC64 HOSTS only: does '&f' give us a pointer to a
+ function descriptor on the host, or to the function code
+ itself? True =3D> descriptor, False =3D> code. */
+ Bool host_ppc_calls_use_fndescrs;
+
+ /* PPC32 HOSTS only: when generating code to pass a 64-bit value
+ (actual parameter) in a pair of regs, should we skip an arg
+ reg if it is even-numbered? True =3D> yes, False =3D> no. */
+ Bool host_ppc32_regalign_int64_args;
+ }
+ VexMiscInfo;
+
+/* Write default settings info *vmi. */
+extern=20
+void LibVEX_default_VexMiscInfo ( /*OUT*/VexMiscInfo* vmi );
+
+
/*-------------------------------------------------------*/
/*--- Control of Vex's optimiser (iropt). ---*/
/*-------------------------------------------------------*/
@@ -320,11 +404,13 @@
many of them, it seems better to have a structure. */
typedef
struct {
- /* IN: The instruction sets we are translating from and to. */
+ /* IN: The instruction sets we are translating from and to. And
+ guest/host misc info. */
VexArch arch_guest;
VexArchInfo archinfo_guest;
VexArch arch_host;
VexArchInfo archinfo_host;
+ VexMiscInfo miscinfo_both;
=20
/* IN: an opaque value which is passed as the first arg to all
callback functions supplied in this struct. Vex has no idea
Modified: branches/AIX5/pub/libvex_basictypes.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/pub/libvex_basictypes.h 2006-09-29 21:24:54 UTC (rev 16=
64)
+++ branches/AIX5/pub/libvex_basictypes.h 2006-09-29 22:26:57 UTC (rev 16=
65)
@@ -135,6 +135,7 @@
=20
#undef VEX_HOST_WORDSIZE
=20
+/* The following 4 work OK for Linux. */
#if defined(__x86_64__)
# define VEX_HOST_WORDSIZE 8
#elif defined(__i386__)
@@ -143,6 +144,12 @@
# define VEX_HOST_WORDSIZE 8
#elif defined(__powerpc__) && !defined(__powerpc64__)
# define VEX_HOST_WORDSIZE 4
+
+#elif defined(_AIX) && !defined(__64BIT__)
+# define VEX_HOST_WORDSIZE 4
+#elif defined(_AIX) && defined(__64BIT__)
+# define VEX_HOST_WORDSIZE 8
+
#else
# error "Vex: Fatal: Can't establish the host architecture"
#endif
Modified: branches/AIX5/pub/libvex_guest_ppc32.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/pub/libvex_guest_ppc32.h 2006-09-29 21:24:54 UTC (rev 1=
664)
+++ branches/AIX5/pub/libvex_guest_ppc32.h 2006-09-29 22:26:57 UTC (rev 1=
665)
@@ -55,6 +55,8 @@
/*--- Vex's representation of the PPC32 CPU state ---*/
/*---------------------------------------------------------------*/
=20
+#define VEX_GUEST_PPC32_REDIR_STACK_SIZE (16/*entries*/ * 2/*words per e=
ntry*/)
+
typedef
struct {
/* General Purpose Registers */
@@ -214,10 +216,25 @@
Note, this is only set for wrap-style redirects, not for
replace-style ones. */
/* 956 */ UInt guest_NRADDR;
+ /* 960 */ UInt guest_NRADDR_GPR2; /* needed by aix */
=20
+ /* A grows-upwards stack for hidden saves/restores of LR and R2
+ needed for function interception and wrapping on ppc32-aix5.
+ A horrible hack. REDIR_SP points to the highest live entry,
+ and so starts at -1. */
+ /* 964 */ UInt guest_REDIR_SP;
+ /* 968 */ UInt guest_REDIR_STACK[VEX_GUEST_PPC32_REDIR_STACK_SIZE]=
;
+
+ /* Needed for AIX: CIA at the last SC insn. Used when backing up
+ to restart a syscall that has been interrupted by a signal. */
+ /* ??? */ UInt guest_CIA_AT_SC;=20
+
+ /* SPRG3, which AIUI is readonly in user space. Needed for
+ threading on AIX. */
+ /* ??? */ UInt guest_SPRG3_RO;
+
/* Padding to make it have an 8-aligned size */
- /* 956 */ UInt padding;
- /* 960 */
+ /* UInt padding; */
}
VexGuestPPC32State;
=20
Modified: branches/AIX5/pub/libvex_guest_ppc64.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/pub/libvex_guest_ppc64.h 2006-09-29 21:24:54 UTC (rev 1=
664)
+++ branches/AIX5/pub/libvex_guest_ppc64.h 2006-09-29 22:26:57 UTC (rev 1=
665)
@@ -266,6 +266,14 @@
/* 1128 */ ULong guest_REDIR_SP;
/* 1136 */ ULong guest_REDIR_STACK[VEX_G...
[truncated message content] |
|
From: <sv...@va...> - 2006-09-29 21:24:57
|
Author: sewardj
Date: 2006-09-29 22:24:54 +0100 (Fri, 29 Sep 2006)
New Revision: 1664
Log:
Print the offsets of a few more ppc registers.
Modified:
branches/AIX5/auxprogs/genoffsets.c
Modified: branches/AIX5/auxprogs/genoffsets.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/auxprogs/genoffsets.c 2006-09-29 21:23:54 UTC (rev 1663=
)
+++ branches/AIX5/auxprogs/genoffsets.c 2006-09-29 21:24:54 UTC (rev 1664=
)
@@ -143,6 +143,9 @@
printf("#define OFFSET_ppc32_GPR0 %3d\n",
offsetof(VexGuestPPC32State,guest_GPR0));
=20
+ printf("#define OFFSET_ppc32_GPR2 %3d\n",
+ offsetof(VexGuestPPC32State,guest_GPR2));
+
printf("#define OFFSET_ppc32_GPR3 %3d\n",
offsetof(VexGuestPPC32State,guest_GPR3));
=20
@@ -161,6 +164,12 @@
printf("#define OFFSET_ppc32_GPR8 %3d\n",
offsetof(VexGuestPPC32State,guest_GPR8));
=20
+ printf("#define OFFSET_ppc32_GPR9 %3d\n",
+ offsetof(VexGuestPPC32State,guest_GPR9));
+
+ printf("#define OFFSET_ppc32_GPR10 %3d\n",
+ offsetof(VexGuestPPC32State,guest_GPR10));
+
printf("#define OFFSET_ppc32_CIA %3d\n",
offsetof(VexGuestPPC32State,guest_CIA));
=20
@@ -173,6 +182,9 @@
printf("#define OFFSET_ppc64_GPR0 %4d\n",
offsetof(VexGuestPPC64State,guest_GPR0));
=20
+ printf("#define OFFSET_ppc64_GPR2 %4d\n",
+ offsetof(VexGuestPPC64State,guest_GPR2));
+
printf("#define OFFSET_ppc64_GPR3 %4d\n",
offsetof(VexGuestPPC64State,guest_GPR3));
=20
@@ -191,6 +203,12 @@
printf("#define OFFSET_ppc64_GPR8 %4d\n",
offsetof(VexGuestPPC64State,guest_GPR8));
=20
+ printf("#define OFFSET_ppc64_GPR9 %4d\n",
+ offsetof(VexGuestPPC64State,guest_GPR9));
+
+ printf("#define OFFSET_ppc64_GPR10 %4d\n",
+ offsetof(VexGuestPPC64State,guest_GPR10));
+
printf("#define OFFSET_ppc64_CIA %4d\n",
offsetof(VexGuestPPC64State,guest_CIA));
=20
|
|
From: <sv...@va...> - 2006-09-29 21:23:56
|
Author: sewardj Date: 2006-09-29 22:23:54 +0100 (Fri, 29 Sep 2006) New Revision: 1663 Log: AIX5 build changes. Added: branches/AIX5/newline.txt branches/AIX5/quote.txt Modified: branches/AIX5/Makefile Modified: branches/AIX5/Makefile =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/Makefile 2006-09-19 13:21:18 UTC (rev 1662) +++ branches/AIX5/Makefile 2006-09-29 21:23:54 UTC (rev 1663) @@ -137,7 +137,19 @@ if [ ! -f TAG_ppc64_linux ] ; then rm -f $(LIB_OBJS) TAG_* libvex.a ; f= i touch TAG_ppc64_linux =20 +libvex_ppc32_aix5.a: TAG_ppc32_aix5 libvex.a + mv -f libvex.a libvex_ppc32_aix5.a +TAG_ppc32_aix5: + if [ ! -f TAG_ppc32_aix5 ] ; then rm -f $(LIB_OBJS) TAG_* libvex.a ; fi + touch TAG_ppc32_aix5 =20 +libvex_ppc64_aix5.a: TAG_ppc64_aix5 libvex.a + mv -f libvex.a libvex_ppc64_aix5.a +TAG_ppc64_aix5: + if [ ! -f TAG_ppc64_aix5 ] ; then rm -f $(LIB_OBJS) TAG_* libvex.a ; fi + touch TAG_ppc64_aix5 + + # This doesn't get rid of priv/main/vex_svnversion.h, because # that can't be regenerated in the final Valgrind tarball, and # so if 'make clean' did get rid of it, then in the tarball, @@ -148,9 +160,10 @@ =20 version: rm -f priv/main/vex_svnversion.h - echo -n "\"" > priv/main/vex_svnversion.h + cat quote.txt >> priv/main/vex_svnversion.h svnversion -n . >> priv/main/vex_svnversion.h - echo "\"" >> priv/main/vex_svnversion.h + cat quote.txt >> priv/main/vex_svnversion.h + cat newline.txt >> priv/main/vex_svnversion.h =20 minidist: version rm -f vex--minidist-2005MMDD.tar Added: branches/AIX5/newline.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/newline.txt (rev 0) +++ branches/AIX5/newline.txt 2006-09-29 21:23:54 UTC (rev 1663) @@ -0,0 +1 @@ + Added: branches/AIX5/quote.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/AIX5/quote.txt (rev 0) +++ branches/AIX5/quote.txt 2006-09-29 21:23:54 UTC (rev 1663) @@ -0,0 +1 @@ +" \ No newline at end of file |
|
From: <sv...@va...> - 2006-09-29 21:08:44
|
Author: sewardj
Date: 2006-09-29 22:08:40 +0100 (Fri, 29 Sep 2006)
New Revision: 6087
Log:
Changes for AIX5. No surprises here. New stuff:
- generates automake symbols of name VGP_platform and VGO_os,=20
whereas previously it just made VG_platform
- Do checks to enable building MPI wrapper library for both the
primary and secondary target
Modified:
branches/AIX5/configure.in
Modified: branches/AIX5/configure.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/configure.in 2006-09-29 21:05:06 UTC (rev 6086)
+++ branches/AIX5/configure.in 2006-09-29 21:08:40 UTC (rev 6087)
@@ -108,7 +108,11 @@
esac
=20
=20
-# Checks for the platform
+# Checks for the platform, with the aim of setting VG_ARCH. Note
+# that VG_ARCH must be set to reflect the most that this CPU can
+# do: for example if it is a 64-bit capable PowerPC, then it must
+# be set to ppc64 and not ppc32. Ditto for amd64.
+
AC_CANONICAL_HOST
=20
AC_MSG_CHECKING([for a supported CPU])
@@ -135,6 +139,7 @@
;;
=20
powerpc64)
+# This value can only happen on Linux, not on AIX
AC_MSG_RESULT([ok (${host_cpu})])
VG_ARCH=3D"ppc64"
valt_load_address_normal=3D"0x38000000"
@@ -142,8 +147,17 @@
;;
=20
powerpc)
+# Complexity. 'powerpc' on AIX implies a 64-bit capable CPU.
+# Whereas in Linux that means only a 32-bit capable CPU.
AC_MSG_RESULT([ok (${host_cpu})])
- VG_ARCH=3D"ppc32"
+ case "${host_os}" in
+ aix5.*)
+ VG_ARCH=3D"ppc64"
+ ;;
+ *)
+ VG_ARCH=3D"ppc32"
+ ;;
+ esac
valt_load_address_normal=3D"0x38000000"
valt_load_address_inner=3D"0x28000000"
;;
@@ -227,6 +241,15 @@
=20
;;
=20
+ aix5.2.*)
+ AC_MSG_RESULT([ok (${host_os})])
+ VG_OS=3D"aix5"
+ ;; =20
+ aix5.3.*)
+ AC_MSG_RESULT([ok (${host_os})])
+ VG_OS=3D"aix5"
+ ;; =20
+
*freebsd*)
AC_MSG_RESULT([ok (${host_os})])
VG_OS=3D"freebsd"
@@ -301,6 +324,19 @@
VG_PLATFORM_SEC=3D""
AC_MSG_RESULT([ok (${host_cpu}-${host_os})])
;;
+ ppc64-aix5)
+ if test x$vg_cv_only64bit =3D xyes; then
+ VG_PLATFORM_PRI=3D"PPC64_AIX5"
+ VG_PLATFORM_SEC=3D""
+ elif test x$vg_cv_only32bit =3D xyes; then
+ VG_PLATFORM_PRI=3D"PPC32_AIX5"
+ VG_PLATFORM_SEC=3D""
+ else
+ VG_PLATFORM_PRI=3D"PPC64_AIX5"
+ VG_PLATFORM_SEC=3D"PPC32_AIX5"
+ fi
+ AC_MSG_RESULT([ok (${host_cpu}-${host_os})])
+ ;;
ppc64-linux)
if test x$vg_cv_only64bit =3D xyes; then
VG_PLATFORM_PRI=3D"PPC64_LINUX"
@@ -322,27 +358,52 @@
;;
esac
=20
-# Set up VG_<platform>. Either one or two of these become defined.
+# Set up VGP_<platform>. Either one or two of these become defined.
#
-AM_CONDITIONAL(VG_X86_LINUX, =20
+AM_CONDITIONAL(VGP_X86_LINUX, =20
test x$VG_PLATFORM_PRI =3D xX86_LINUX \
-o x$VG_PLATFORM_SEC =3D xX86_LINUX)
-AM_CONDITIONAL(VG_AMD64_LINUX,=20
+AM_CONDITIONAL(VGP_AMD64_LINUX,=20
test x$VG_PLATFORM_PRI =3D xAMD64_LINUX)
-AM_CONDITIONAL(VG_PPC32_LINUX,=20
+AM_CONDITIONAL(VGP_PPC32_LINUX,=20
test x$VG_PLATFORM_PRI =3D xPPC32_LINUX \=20
-o x$VG_PLATFORM_SEC =3D xPPC32_LINUX)
-AM_CONDITIONAL(VG_PPC64_LINUX,=20
+AM_CONDITIONAL(VGP_PPC64_LINUX,=20
test x$VG_PLATFORM_PRI =3D xPPC64_LINUX)
+AM_CONDITIONAL(VGP_PPC32_AIX5,=20
+ test x$VG_PLATFORM_PRI =3D xPPC32_AIX5 \=20
+ -o x$VG_PLATFORM_SEC =3D xPPC32_AIX5)
+AM_CONDITIONAL(VGP_PPC64_AIX5,=20
+ test x$VG_PLATFORM_PRI =3D xPPC64_AIX5)
=20
+# Similarly, set up VGO_<os>. Exactly one of these becomes defined.
+# Relies on the assumption that the primary and secondary targets are=20
+# for the same OS, so therefore only necessary to test the primary.
+#
+AM_CONDITIONAL(VGO_LINUX,
+ test x$VG_PLATFORM_PRI =3D xX86_LINUX \
+ -o x$VG_PLATFORM_PRI =3D xAMD64_LINUX \
+ -o x$VG_PLATFORM_PRI =3D xPPC32_LINUX \
+ -o x$VG_PLATFORM_PRI =3D xPPC64_LINUX)
+AM_CONDITIONAL(VGO_AIX5,
+ test x$VG_PLATFORM_PRI =3D xPPC32_AIX5 \
+ -o x$VG_PLATFORM_PRI =3D xPPC64_AIX5)
=20
+
+# Sometimes, in the Makefile.am-s, it's useful to know
+# whether or not there is a secondary target.
+#
+AM_CONDITIONAL(VGP_HAVE_SECONDARY,
+ test x$VG_PLATFORM_SEC !=3D x)
+
+
# This variable will collect the individual suppression files
# depending on the results of autoconf
DEFAULT_SUPP=3D""
AC_SUBST(DEFAULT_SUPP)
=20
=20
-glibc=3D""
+libc=3D""
=20
AC_EGREP_CPP([GLIBC_22], [
#include <features.h>
@@ -352,7 +413,7 @@
#endif
#endif
],
-glibc=3D"2.2")
+libc=3D"2.2")
=20
AC_EGREP_CPP([GLIBC_23], [
#include <features.h>
@@ -362,7 +423,7 @@
#endif
#endif
],
-glibc=3D"2.3")
+libc=3D"2.3")
=20
AC_EGREP_CPP([GLIBC_24], [
#include <features.h>
@@ -372,11 +433,19 @@
#endif
#endif
],
-glibc=3D"2.4")
+libc=3D"2.4")
=20
-AC_MSG_CHECKING([the glibc version])
+AC_EGREP_CPP([AIX5_LIBC], [
+#include <standards.h>
+#if defined(_AIXVERSION_520) || defined(_AIXVERSION_530)
+ AIX5_LIBC
+#endif
+],
+libc=3D"aix5")
=20
-case "${glibc}" in
+AC_MSG_CHECKING([the libc version])
+
+case "${libc}" in
2.2)
AC_MSG_RESULT(2.2 family)
AC_DEFINE([GLIBC_2_2], 1, [Define to 1 if you're using glibc 2.2.x])
@@ -395,15 +464,22 @@
DEFAULT_SUPP=3D"glibc-2.4.supp ${DEFAULT_SUPP}"
;;
=20
+ aix5)
+ AC_MSG_RESULT(AIX 5.2 or 5.3)
+ AC_DEFINE([AIX5_LIBC], 1, [Define to 1 if you're using AIX 5.2 or 5.3])
+ DEFAULT_SUPP=3D"aix5libc.supp ${DEFAULT_SUPP}"
+ ;;
+
*)
AC_MSG_RESULT(unsupported version)
AC_MSG_ERROR([Valgrind requires glibc version 2.2, 2.3 or 2.4])
+ AC_MSG_ERROR([or AIX 5.2/5.3 libc])
;;
esac
=20
=20
# We don't know how to detect the X client library version
-# (detecting the server version is easy, bu no help). So we
+# (detecting the server version is easy, but no help). So we
# just use a hack: always include the suppressions for both
# versions 3 and 4.
AC_PATH_X
@@ -434,6 +510,27 @@
AC_SUBST(FLAG_M32)
=20
=20
+# does this compiler support -maix32 ?
+AC_MSG_CHECKING([if gcc accepts -maix32])
+
+safe_CFLAGS=3D$CFLAGS
+CFLAGS=3D"-maix32"
+
+AC_TRY_COMPILE(, [
+int main () { return 0 ; }
+],
+[
+FLAG_MAIX32=3D"-maix32"
+AC_MSG_RESULT([yes])
+], [
+FLAG_MAIX32=3D""
+AC_MSG_RESULT([no])
+])
+CFLAGS=3D$safe_CFLAGS
+
+AC_SUBST(FLAG_MAIX32)
+
+
# does this compiler support -m64 ?
AC_MSG_CHECKING([if gcc accepts -m64])
=20
@@ -455,6 +552,27 @@
AC_SUBST(FLAG_M64)
=20
=20
+# does this compiler support -maix64 ?
+AC_MSG_CHECKING([if gcc accepts -maix64])
+
+safe_CFLAGS=3D$CFLAGS
+CFLAGS=3D"-maix64"
+
+AC_TRY_COMPILE(, [
+int main () { return 0 ; }
+],
+[
+FLAG_MAIX64=3D"-maix64"
+AC_MSG_RESULT([yes])
+], [
+FLAG_MAIX64=3D""
+AC_MSG_RESULT([no])
+])
+CFLAGS=3D$safe_CFLAGS
+
+AC_SUBST(FLAG_MAIX64)
+
+
# does this compiler support -mmmx ?
AC_MSG_CHECKING([if gcc accepts -mmmx])
=20
@@ -639,11 +757,18 @@
AC_CHECK_FUNCS([floor memchr memset mkdir strchr strdup strpbrk strrchr =
strstr semtimedop])
=20
=20
-# Do we have a useable MPI setup on the primary target
-# (mpicc, and suitable MPI2 headers?)
+# Do we have a useable MPI setup on the primary and/or secondary targets=
?
+# On Linux, by default, assumes mpicc and -m32/-m64
+# On AIX, by default, assumes mpxlc and -q32/-q64
# Note: this is a kludge in that it assumes the specified mpicc=20
-# understands '-m32' or '-m64', as established above
+# understands -m32/-m64/-q32/-q64 regardless of what is specified using
+# --with-mpicc=3D.
MPI_CC=3D"mpicc"
+if test x$VG_PLATFORM_PRI =3D xPPC32_AIX5 \
+ -o x$VG_PLATFORM_PRI =3D xPPC64_AIX5 ; then
+ MPI_CC=3D"mpxlc"
+fi
+
mflag_primary=3D
if test x$VG_PLATFORM_PRI =3D xX86_LINUX \
-o x$VG_PLATFORM_PRI =3D xPPC32_LINUX ; then
@@ -651,13 +776,30 @@
elif test x$VG_PLATFORM_PRI =3D xAMD64_LINUX \
-o x$VG_PLATFORM_PRI =3D xPPC64_LINUX ; then
mflag_primary=3D$FLAG_M64
+elif test x$VG_PLATFORM_PRI =3D xPPC32_AIX5 ; then
+ mflag_primary=3D-q32
+elif test x$VG_PLATFORM_PRI =3D xPPC64_AIX5 ; then
+ mflag_primary=3D-q64
fi
=20
+mflag_secondary=3D
+if test x$VG_PLATFORM_SEC =3D xX86_LINUX \
+ -o x$VG_PLATFORM_SEC =3D xPPC32_LINUX ; then
+ mflag_secondary=3D$FLAG_M32
+elif test x$VG_PLATFORM_SEC =3D xPPC32_AIX5 ; then
+ mflag_secondary=3D-q32
+fi
+
+
AC_ARG_WITH(mpicc,
[ --with-mpicc=3D Specify name of MPI2-ised C compiler],
MPI_CC=3D$withval
)
-AC_MSG_CHECKING([for usable MPI2-compliant mpicc and mpi.h])
+AC_SUBST(MPI_CC)
+
+## See if MPI_CC works for the primary target
+##
+AC_MSG_CHECKING([primary target for usable MPI2-compliant C compiler and=
mpi.h])
saved_CC=3D$CC
saved_CFLAGS=3D$CFLAGS
CC=3D$MPI_CC
@@ -670,17 +812,47 @@
r |=3D MPI_Type_get_contents( MPI_INT, 0,0,0, NULL,NULL,NULL );
return r;=20
], [
-ac_have_mpi2=3Dyes
+ac_have_mpi2_pri=3Dyes
AC_MSG_RESULT([yes, $MPI_CC])
], [
-ac_have_mpi2=3Dno
+ac_have_mpi2_pri=3Dno
AC_MSG_RESULT([no])
])
CC=3D$saved_CC
CFLAGS=3D$saved_CFLAGS
+AM_CONDITIONAL(BUILD_MPIWRAP_PRI, test x$ac_have_mpi2_pri =3D xyes)
=20
-AM_CONDITIONAL(BUILD_MPIWRAP, test x$ac_have_mpi2 =3D xyes)
-AC_SUBST(MPI_CC)
+## See if MPI_CC works for the secondary target. Complication: what if
+## there is no secondary target? We need this to then fail.
+## Kludge this by making MPI_CC something which will surely fail in
+## such a case.
+##
+AC_MSG_CHECKING([secondary target for usable MPI2-compliant C compiler a=
nd mpi.h])
+saved_CC=3D$CC
+saved_CFLAGS=3D$CFLAGS
+if test x$VG_PLATFORM_SEC =3D x ; then
+ CC=3D"$MPI_CC this will surely fail"
+else
+ CC=3D$MPI_CC
+fi
+CFLAGS=3D$mflag_secondary
+AC_TRY_LINK([
+#include <mpi.h>
+#include <stdio.h>
+],[
+ int r =3D MPI_Init(NULL,NULL);
+ r |=3D MPI_Type_get_contents( MPI_INT, 0,0,0, NULL,NULL,NULL );
+ return r;=20
+], [
+ac_have_mpi2_sec=3Dyes
+AC_MSG_RESULT([yes, $MPI_CC])
+], [
+ac_have_mpi2_sec=3Dno
+AC_MSG_RESULT([no])
+])
+CC=3D$saved_CC
+CFLAGS=3D$saved_CFLAGS
+AM_CONDITIONAL(BUILD_MPIWRAP_SEC, test x$ac_have_mpi2_sec =3D xyes)
=20
=20
# -------------------- ok. We're done. --------------------
|
Author: sewardj
Date: 2006-09-29 22:05:06 +0100 (Fri, 29 Sep 2006)
New Revision: 6086
Log:
Makefile.am changes for AIX5. Almost all boilerplate stuff fitting in
with the existing factorisation scheme. The only change of interest
is that configure.in now generates automake symbols of name
VGP_platform and VGO_os, whereas previously it just made VG_platform
which was a bit inconsistent with the VGP/VGO/VGA scheme used in C
code.
Modified:
branches/AIX5/Makefile.am
branches/AIX5/Makefile.core.am
branches/AIX5/Makefile.flags.am
branches/AIX5/Makefile.install.am
branches/AIX5/Makefile.tool-flags.am
branches/AIX5/Makefile.tool.am
branches/AIX5/auxprogs/Makefile.am
branches/AIX5/cachegrind/Makefile.am
branches/AIX5/cachegrind/tests/Makefile.am
branches/AIX5/callgrind/Makefile.am
branches/AIX5/coregrind/Makefile.am
branches/AIX5/helgrind/Makefile.am
branches/AIX5/helgrind/tests/Makefile.am
branches/AIX5/include/Makefile.am
branches/AIX5/lackey/Makefile.am
branches/AIX5/massif/Makefile.am
branches/AIX5/memcheck/Makefile.am
branches/AIX5/memcheck/tests/Makefile.am
branches/AIX5/none/Makefile.am
branches/AIX5/none/tests/Makefile.am
Modified: branches/AIX5/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -17,7 +17,7 @@
DIST_SUBDIRS =3D $(SUBDIRS)
=20
SUPP_FILES =3D \
- glibc-2.2.supp glibc-2.3.supp glibc-2.4.supp \
+ glibc-2.2.supp glibc-2.3.supp glibc-2.4.supp aix5libc.supp \
xfree-3.supp xfree-4.supp
=20
dist_val_DATA =3D $(SUPP_FILES) default.supp
@@ -32,22 +32,30 @@
CLEANFILES =3D=20
DISTCLEANFILES =3D default.supp
=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
BUILT_SOURCES +=3D valt_load_address_x86_linux.lds
CLEANFILES +=3D valt_load_address_x86_linux.lds
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
BUILT_SOURCES +=3D valt_load_address_amd64_linux.lds
CLEANFILES +=3D valt_load_address_amd64_linux.lds
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
BUILT_SOURCES +=3D valt_load_address_ppc32_linux.lds
CLEANFILES +=3D valt_load_address_ppc32_linux.lds
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
BUILT_SOURCES +=3D valt_load_address_ppc64_linux.lds
CLEANFILES +=3D valt_load_address_ppc64_linux.lds
endif
+if VGP_PPC32_AIX5
+# No need to generate valt_load_address*.lds; the final executables
+# can be linked to be at any address. They will be relocated by
+# AIX kernel when they are loaded.
+endif
+if VGP_PPC64_AIX5
+# Ditto
+endif
=20
default.supp: $(SUPP_FILES)
=20
@@ -99,6 +107,8 @@
# These list the bits of vex we need to copy into the tarball
=20
VEX_PRIMARY_SOURCES =3D \
+ VEX/quote.txt \
+ VEX/newline.txt \
VEX/HACKING.README \
VEX/LICENSE.README \
VEX/LICENSE.GPL \
Modified: branches/AIX5/Makefile.core.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/Makefile.core.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/Makefile.core.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -46,10 +46,28 @@
-DVGO_linux=3D1 \
-DVGP_ppc64_linux=3D1
=20
+add_includes_ppc32_aix5 =3D -I$(top_srcdir)/coregrind \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/coregrind/ppc32 \
+ -I$(top_srcdir)/coregrind/aix5 \
+ -I$(top_srcdir)/coregrind/ppc32-aix5 \
+ -I$(top_srcdir)/include \
+ -I@VEX_DIR@/pub \
+ -DVG_PLATFORM=3D"\"ppc32-aix5\"" \
+ -DVGA_ppc32=3D1 \
+ -DVGO_aix5=3D1 \
+ -DVGP_ppc32_aix5=3D1
+
+add_includes_ppc64_aix5 =3D -I$(top_srcdir)/coregrind \
+ -I$(top_srcdir) \
+ -I$(top_srcdir)/coregrind/ppc64 \
+ -I$(top_srcdir)/coregrind/aix5 \
+ -I$(top_srcdir)/coregrind/ppc64-aix5 \
+ -I$(top_srcdir)/include \
+ -I@VEX_DIR@/pub \
+ -DVG_PLATFORM=3D"\"ppc64-aix5\"" \
+ -DVGA_ppc64=3D1 \
+ -DVGO_aix5=3D1 \
+ -DVGP_ppc64_aix5=3D1
+
include $(top_srcdir)/Makefile.flags.am
-
-PRELOAD_LDFLAGS_COMMON =3D -nostdlib -shared -Wl,-z,interpose,-z,initfir=
st
-PRELOAD_LDFLAGS_X86_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) @FLAG_M32@
-PRELOAD_LDFLAGS_AMD64_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) -m64
-PRELOAD_LDFLAGS_PPC32_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) @FLAG_M32@
-PRELOAD_LDFLAGS_PPC64_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) -m64
Modified: branches/AIX5/Makefile.flags.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/Makefile.flags.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/Makefile.flags.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -15,8 +15,8 @@
AM_FLAG_M3264_AMD64_LINUX =3D @FLAG_M64@
AM_CPPFLAGS_AMD64_LINUX =3D $(add_includes_amd64_linux)
AM_CFLAGS_AMD64_LINUX =3D $(WERROR) @FLAG_M64@ -fomit-frame-pointer =
\
- @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
-AM_CCASFLAGS_AMD64_LINUX =3D $(add_includes_amd64_linux) -m64 -g
+ @PREFERRED_STACK_BOUNDARY@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_AMD64_LINUX =3D $(add_includes_amd64_linux) @FLAG_M64@ -g
=20
AM_FLAG_M3264_PPC32_LINUX =3D @FLAG_M32@
AM_CPPFLAGS_PPC32_LINUX =3D $(add_includes_ppc32_linux)
@@ -26,8 +26,20 @@
AM_FLAG_M3264_PPC64_LINUX =3D @FLAG_M64@
AM_CPPFLAGS_PPC64_LINUX =3D $(add_includes_ppc64_linux)
AM_CFLAGS_PPC64_LINUX =3D $(WERROR) @FLAG_M64@ $(AM_CFLAGS_BASE)
-AM_CCASFLAGS_PPC64_LINUX =3D $(add_includes_ppc64_linux) -Wa,-maltivec =
-m64 -g
+AM_CCASFLAGS_PPC64_LINUX =3D $(add_includes_ppc64_linux) -Wa,-maltivec =
@FLAG_M64@ -g
=20
+AM_FLAG_M3264_PPC32_AIX5 =3D @FLAG_MAIX32@
+AM_CPPFLAGS_PPC32_AIX5 =3D $(add_includes_ppc32_aix5)
+AM_CFLAGS_PPC32_AIX5 =3D $(WERROR) @FLAG_MAIX32@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC32_AIX5 =3D $(add_includes_ppc32_aix5) \
+ @FLAG_MAIX32@ -g
+
+AM_FLAG_M3264_PPC64_AIX5 =3D @FLAG_MAIX64@
+AM_CPPFLAGS_PPC64_AIX5 =3D $(add_includes_ppc64_aix5)
+AM_CFLAGS_PPC64_AIX5 =3D $(WERROR) @FLAG_MAIX64@ $(AM_CFLAGS_BASE)
+AM_CCASFLAGS_PPC64_AIX5 =3D $(add_includes_ppc64_aix5) \
+ @FLAG_MAIX64@ -g
+
# Flags for the primary target. These must be used to build the
# regtests and performance tests. In fact, these must be used to
# build anything which is built only once on a dual-arch build.
@@ -36,3 +48,21 @@
AM_CPPFLAGS_PRI =3D $(AM_CPPFLAGS_@VG_PLATFORM_PRI@)
AM_CFLAGS_PRI =3D $(AM_CFLAGS_@VG_PLATFORM_PRI@)
AM_CCASFLAGS_PRI =3D $(AM_CCASFLAGS_@VG_PLATFORM_PRI@)
+
+if VGP_HAVE_SECONDARY
+ AM_FLAG_M3264_SEC =3D $(AM_FLAG_M3264_@VG_PLATFORM_SEC@)
+else
+ AM_FLAG_M3264_SEC =3D=20
+endif
+
+
+# Baseline link flags for making dynamic shared objects.
+#
+PRELOAD_LDFLAGS_COMMON_LINUX =3D -nostdlib -shared -Wl,-z,interpose,-z,i=
nitfirst
+PRELOAD_LDFLAGS_COMMON_AIX5 =3D -nostdlib -shared -Wl,-G -Wl,-bnogc
+PRELOAD_LDFLAGS_X86_LINUX =3D $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M3=
2@
+PRELOAD_LDFLAGS_AMD64_LINUX =3D $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M6=
4@
+PRELOAD_LDFLAGS_PPC32_LINUX =3D $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M3=
2@
+PRELOAD_LDFLAGS_PPC64_LINUX =3D $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M6=
4@
+PRELOAD_LDFLAGS_PPC32_AIX5 =3D $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MA=
IX32@
+PRELOAD_LDFLAGS_PPC64_AIX5 =3D $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MA=
IX64@
Modified: branches/AIX5/Makefile.install.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/Makefile.install.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/Makefile.install.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -19,7 +19,7 @@
done ; \
fi ; \
if [ -n "$(noinst_LIBRARIES)" ] ; then \
- for f in $(noinst_LIBRARIES); do \
+ for f in $(noinst_LIBRARIES) expr_wont_match_me; do \
if expr match $$f libcoregrind_ > /dev/null ; then \
pU=3D`echo $$f | sed -e 's/libcoregrind_//g' -e 's/\.a//g'` ; \
pD=3D`echo $$pU | sed -e 's/_/-/g'` ; \
Modified: branches/AIX5/Makefile.tool-flags.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/Makefile.tool-flags.am 2006-09-29 08:18:57 UTC (rev 608=
5)
+++ branches/AIX5/Makefile.tool-flags.am 2006-09-29 21:05:06 UTC (rev 608=
6)
@@ -22,4 +22,16 @@
-DVGO_linux=3D1 \
-DVGP_ppc64_linux=3D1
=20
+add_includes_ppc32_aix5 =3D -I$(top_srcdir)/include \
+ -I@VEX_DIR@/pub \
+ -DVGA_ppc32=3D1 \
+ -DVGO_aix5=3D1 \
+ -DVGP_ppc32_aix5=3D1
+
+add_includes_ppc64_aix5 =3D -I$(top_srcdir)/include \
+ -I@VEX_DIR@/pub \
+ -DVGA_ppc64=3D1 \
+ -DVGO_aix5=3D1 \
+ -DVGP_ppc64_aix5=3D1
+
include $(top_srcdir)/Makefile.flags.am
Modified: branches/AIX5/Makefile.tool.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/Makefile.tool.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/Makefile.tool.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -18,6 +18,12 @@
LIBREPLACEMALLOC_PPC64_LINUX =3D \
$(top_builddir)/coregrind/libreplacemalloc_toolpreload_ppc64_linux.a
=20
+LIBREPLACEMALLOC_PPC32_AIX5 =3D \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload_ppc32_aix5.a
+
+LIBREPLACEMALLOC_PPC64_AIX5 =3D \
+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload_ppc64_aix5.a
+
COREGRIND_LIBS_X86_LINUX =3D \
$(top_builddir)/coregrind/libcoregrind_x86_linux.a \
@VEX_DIR@/libvex_x86_linux.a
@@ -34,58 +40,84 @@
$(top_builddir)/coregrind/libcoregrind_ppc64_linux.a \
@VEX_DIR@/libvex_ppc64_linux.a
=20
+COREGRIND_LIBS_PPC32_AIX5 =3D \
+ $(top_builddir)/coregrind/libcoregrind_ppc32_aix5.a \
+ @VEX_DIR@/libvex_ppc32_aix5.a
+
+COREGRIND_LIBS_PPC64_AIX5 =3D \
+ $(top_builddir)/coregrind/libcoregrind_ppc64_aix5.a \
+ @VEX_DIR@/libvex_ppc64_aix5.a
+
##.PHONY: @VEX_DIR@/libvex.a
=20
@VEX_DIR@/libvex_x86_linux.a: @VEX_DIR@/priv/main/vex_svnversion.h
- $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" libvex_x86_linux.a \
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR)" \
+ libvex_x86_linux.a \
EXTRA_CFLAGS=3D"$(AM_CFLAGS_X86_LINUX) @FLAG_WDECL_AFTER_STMT@"
=20
@VEX_DIR@/libvex_amd64_linux.a: @VEX_DIR@/priv/main/vex_svnversion.h
- $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" libvex_amd64_linux.a \
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR)" \
+ libvex_amd64_linux.a \
EXTRA_CFLAGS=3D"$(AM_CFLAGS_AMD64_LINUX) @FLAG_WDECL_AFTER_STMT@"
=20
@VEX_DIR@/libvex_ppc32_linux.a: @VEX_DIR@/priv/main/vex_svnversion.h
- $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" libvex_ppc32_linux.a \
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR)" \
+ libvex_ppc32_linux.a \
EXTRA_CFLAGS=3D"$(AM_CFLAGS_PPC32_LINUX) @FLAG_WDECL_AFTER_STMT@"
=20
@VEX_DIR@/libvex_ppc64_linux.a: @VEX_DIR@/priv/main/vex_svnversion.h
- $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" libvex_ppc64_linux.a \
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR)" \
+ libvex_ppc64_linux.a \
EXTRA_CFLAGS=3D"$(AM_CFLAGS_PPC64_LINUX) @FLAG_WDECL_AFTER_STMT@"
=20
+@VEX_DIR@/libvex_ppc32_aix5.a: @VEX_DIR@/priv/main/vex_svnversion.h
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR) -X32" \
+ libvex_ppc32_aix5.a \
+ EXTRA_CFLAGS=3D"$(AM_CFLAGS_PPC32_AIX5) @FLAG_WDECL_AFTER_STMT@"
+
+@VEX_DIR@/libvex_ppc64_aix5.a: @VEX_DIR@/priv/main/vex_svnversion.h
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR) -X64" \
+ libvex_ppc64_aix5.a \
+ EXTRA_CFLAGS=3D"$(AM_CFLAGS_PPC64_AIX5) @FLAG_WDECL_AFTER_STMT@"
+
@VEX_DIR@/priv/main/vex_svnversion.h:
$(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" version
=20
TOOL_LDADD_COMMON =3D -lgcc
-TOOL_LDFLAGS_COMMON =3D -static \
+TOOL_LDFLAGS_COMMON_LINUX =3D -static \
-Wl,-defsym,valt_load_address=3D@VALT_LOAD_ADDRESS@ \
-nodefaultlibs -nostartfiles -u _start
+TOOL_LDFLAGS_COMMON_AIX5 =3D -static -Wl,-e_start_valgrind
=20
+
TOOL_LDADD_X86_LINUX =3D $(COREGRIND_LIBS_X86_LINUX) $(TOOL_LDADD_COMMON=
)
TOOL_LDFLAGS_X86_LINUX =3D \
- $(TOOL_LDFLAGS_COMMON) @FLAG_M32@ \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@ \
-Wl,-T,$(top_builddir)/valt_load_address_x86_linux.lds
=20
TOOL_LDADD_AMD64_LINUX =3D $(COREGRIND_LIBS_AMD64_LINUX) $(TOOL_LDADD_CO=
MMON)
TOOL_LDFLAGS_AMD64_LINUX =3D \
- $(TOOL_LDFLAGS_COMMON) -m64 \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@ \
-Wl,-T,$(top_builddir)/valt_load_address_amd64_linux.lds
=20
TOOL_LDADD_PPC32_LINUX =3D $(COREGRIND_LIBS_PPC32_LINUX) $(TOOL_LDADD_CO=
MMON)
TOOL_LDFLAGS_PPC32_LINUX =3D \
- $(TOOL_LDFLAGS_COMMON) @FLAG_M32@ \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@ \
-Wl,-T,$(top_builddir)/valt_load_address_ppc32_linux.lds
=20
TOOL_LDADD_PPC64_LINUX =3D $(COREGRIND_LIBS_PPC64_LINUX) $(TOOL_LDADD_CO=
MMON)
TOOL_LDFLAGS_PPC64_LINUX =3D \
- $(TOOL_LDFLAGS_COMMON) -m64 \
+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@ \
-Wl,-T,$(top_builddir)/valt_load_address_ppc64_linux.lds
=20
-PRELOAD_LDFLAGS_COMMON =3D -nostdlib -shared -Wl,-z,interpose,-z,initfir=
st
-PRELOAD_LDFLAGS_X86_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) @FLAG_M32@
-PRELOAD_LDFLAGS_AMD64_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) -m64
-PRELOAD_LDFLAGS_PPC32_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) @FLAG_M32@
-PRELOAD_LDFLAGS_PPC64_LINUX =3D $(PRELOAD_LDFLAGS_COMMON) -m64
+TOOL_LDADD_PPC32_AIX5 =3D $(COREGRIND_LIBS_PPC32_AIX5) $(TOOL_LDADD_COMM=
ON)
+TOOL_LDFLAGS_PPC32_AIX5 =3D \
+ $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@
=20
+TOOL_LDADD_PPC64_AIX5 =3D $(COREGRIND_LIBS_PPC64_AIX5) $(TOOL_LDADD_COMM=
ON)
+TOOL_LDFLAGS_PPC64_AIX5 =3D \
+ $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@ -Wl,-bbigtoc
+
LIBREPLACEMALLOC_LDFLAGS_X86_LINUX =3D \
-Wl,--whole-archive \
$(LIBREPLACEMALLOC_X86_LINUX) \
@@ -102,3 +134,7 @@
-Wl,--whole-archive \
$(LIBREPLACEMALLOC_PPC64_LINUX) \
-Wl,--no-whole-archive
+LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5 =3D \
+ $(LIBREPLACEMALLOC_PPC32_AIX5)
+LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5 =3D \
+ $(LIBREPLACEMALLOC_PPC64_AIX5)
Modified: branches/AIX5/auxprogs/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/auxprogs/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/auxprogs/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -6,6 +6,7 @@
noinst_SCRIPTS =3D gen-mdg DotToScc.hs primes.c \
gsl16test gsl16-badfree.patch gsl16-wavelet.patch \
ppcfround.c ppc64shifts.c libmpiwrap.c mpiwrap_type_test.c \
+ aix5_VKI_info.c \
posixtestsuite-1.5.1-diff-results \
posixtestsuite-1.5.1-diff.txt
=20
@@ -26,43 +27,82 @@
=20
=20
#------------------------- mpi wrappers -----------------------
-# Build libmpiwrap.so for the primary target only.
+# Build libmpiwrap.so for the primary target, and for the secondary
+# target if relevant.
#
# This is really horrible.
#
-# Don't let automake install this, since it puts it in the
-# wrong place. Instead install it ourselves in the right
+# Don't let automake install this, since it puts the .so's in the
+# wrong place. Instead install them ourselves in the right
# place using the install-exec-local target below.
#
# Also, automake isn't good at supporting non-$(CC) compilers.
# But we need to use $(MPI_CC) here. Hence the nasty hack of
-# directly saying how to build libmpiwrap.so, instead of
+# directly saying how to build libmpiwrap-*.so, instead of
# using automake's standard gunk.
#
-if BUILD_MPIWRAP
-noinst_PROGRAMS =3D libmpiwrap.so
-#libmpiwrap_so_SOURCES =3D mpiwrap.c
-#libmpiwrap_so_CFLAGS =3D $(AM_FLAG_M3264_PRI) \
-# -g -O -fPIC -fno-omit-frame-pointer \
-# -I../include -I@MPI_PREFIX@/include
-#libmpiwrap_so_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -g -shared
-#
-# Note re leading '-'s: tells GNU make to keep going even if command fai=
ls
-#
-libmpiwrap.so: libmpiwrap.c
- -$(MPI_CC) -g -O -fno-omit-frame-pointer -Wall -fPIC -shared \
+if VGO_AIX5
+ HACKY_FLAGS_PRI =3D -g -O -bE:libmpiwrap.exp -bM:SRE -bnoentry \
+ `echo $(AM_FLAG_M3264_PRI) | sed s/maix/q/g`
+ HACKY_FLAGS_SEC =3D -g -O -bE:libmpiwrap.exp -bM:SRE -bnoentry \
+ `echo $(AM_FLAG_M3264_SEC) | sed s/maix/q/g`
+else
+ HACKY_FLAGS_PRI =3D -g -O -fno-omit-frame-pointer -Wall -fpic -shared \
+ $(AM_FLAG_M3264_PRI)
+ HACKY_FLAGS_SEC =3D -g -O -fno-omit-frame-pointer -Wall -fpic -shared \
+ $(AM_FLAG_M3264_SEC)
+endif
+
+
+## First, we have to say how to build the .so's ..
+##
+noinst_PROGRAMS =3D
+if BUILD_MPIWRAP_PRI
+noinst_PROGRAMS +=3D libmpiwrap-@VG_PLATFORM_PRI@.so
+libmpiwrap-@VG_PLATFORM_PRI@.so: libmpiwrap.c
+ $(MPI_CC) $(HACKY_FLAGS_PRI) \
-I../include \
- $(AM_FLAG_M3264_PRI) \
- -o libmpiwrap.so libmpiwrap.c
+ -o libmpiwrap-@VG_PLATFORM_PRI@.so libmpiwrap.c
+endif
+if BUILD_MPIWRAP_SEC
+noinst_PROGRAMS +=3D libmpiwrap-@VG_PLATFORM_SEC@.so
+libmpiwrap-@VG_PLATFORM_SEC@.so: libmpiwrap.c
+ $(MPI_CC) $(HACKY_FLAGS_SEC) \
+ -I../include \
+ -o libmpiwrap-@VG_PLATFORM_SEC@.so libmpiwrap.c
+endif
=20
+
+## And here we say how to install them.
+##
+# The following install hack is serialised by "libmpiwrap.so".
+# Hence force -j 1.
+.NOTPARALLEL:
+
install-exec-local:
+if BUILD_MPIWRAP_PRI
# convert (eg) X86_LINUX to x86-linux
# really should use sed here, rather than assume tr is available
pD=3D`echo @VG_PLATFORM_PRI@ | tr A-Z_ a-z-` ; \
$(mkinstalldirs) $(DESTDIR)$(valdir)/$$pD;
- -pD=3D`echo @VG_PLATFORM_PRI@ | tr A-Z_ a-z-` ; \
- $(INSTALL_PROGRAM) ./libmpiwrap.so $(DESTDIR)$(valdir)/$$pD
+ rm -f ./libmpiwrap.so; \
+ cp ./libmpiwrap-@VG_PLATFORM_PRI@.so ./libmpiwrap.so; \
+ $(INSTALL_PROGRAM) ./libmpiwrap.so \
+ $(DESTDIR)$(valdir)/$$pD; \
+ rm -f ./libmpiwrap.so
endif
+if BUILD_MPIWRAP_SEC
+ pD=3D`echo @VG_PLATFORM_SEC@ | tr A-Z_ a-z-` ; \
+ $(mkinstalldirs) $(DESTDIR)$(valdir)/$$pD; \
+ rm -f ./libmpiwrap.so; \
+ cp ./libmpiwrap-@VG_PLATFORM_SEC@.so ./libmpiwrap.so; \
+ $(INSTALL_PROGRAM) ./libmpiwrap.so \
+ $(DESTDIR)$(valdir)/$$pD; \
+ rm -f ./libmpiwrap.so
+endif
+
+
+
#
#----------------------------------------------------------
=20
Modified: branches/AIX5/cachegrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/cachegrind/Makefile.am 2006-09-29 08:18:57 UTC (rev 608=
5)
+++ branches/AIX5/cachegrind/Makefile.am 2006-09-29 21:05:06 UTC (rev 608=
6)
@@ -5,18 +5,24 @@
noinst_HEADERS =3D cg_arch.h cg_sim.c
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D cachegrind-x86-linux
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D cachegrind-amd64-linux
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D cachegrind-ppc32-linux
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D cachegrind-ppc64-linux
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D cachegrind-ppc32-aix5
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D cachegrind-ppc64-aix5
+endif
=20
CACHEGRIND_SOURCES_COMMON =3D cg_main.c
CACHEGRIND_SOURCES_X86 =3D cg-x86.c
@@ -51,3 +57,17 @@
cachegrind_ppc64_linux_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_LINUX)
cachegrind_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
cachegrind_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
+
+cachegrind_ppc32_aix5_SOURCES =3D $(CACHEGRIND_SOURCES_COMMON) $(CA=
CHEGRIND_SOURCES_PPC32)
+cachegrind_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+cachegrind_ppc32_aix5_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5)
+cachegrind_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+cachegrind_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+cachegrind_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
+
+cachegrind_ppc64_aix5_SOURCES =3D $(CACHEGRIND_SOURCES_COMMON) $(CA=
CHEGRIND_SOURCES_PPC64)
+cachegrind_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+cachegrind_ppc64_aix5_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5)
+cachegrind_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+cachegrind_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+cachegrind_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
Modified: branches/AIX5/cachegrind/tests/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/cachegrind/tests/Makefile.am 2006-09-29 08:18:57 UTC (r=
ev 6085)
+++ branches/AIX5/cachegrind/tests/Makefile.am 2006-09-29 21:05:06 UTC (r=
ev 6086)
@@ -3,16 +3,16 @@
include $(top_srcdir)/Makefile.flags.am
=20
SUBDIRS =3D .
-if VG_X86_LINUX
+if VGP_X86_LINUX
SUBDIRS +=3D x86
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
SUBDIRS +=3D amd64
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
SUBDIRS +=3D ppc32
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
SUBDIRS +=3D ppc64
endif
=20
@@ -37,3 +37,14 @@
myprint_so_SOURCES =3D myprint.c
myprint_so_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -shared -fPIC
myprint_so_CFLAGS =3D $(AM_FLAG_M3264_PRI) -fPIC
+
+if VGP_PPC32_AIX5
+if VGP_PPC64_AIX5
+else
+ # persuade the AIX linker not to junk apparently unused
+ # function descriptors. Unfortunately -Wl,-G -Wl,-bnogc
+ # produces a link error on 64-bit AIX, hence only 32-bit
+ # gets these flags.
+ wrap5_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+endif
+endif
Modified: branches/AIX5/callgrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/callgrind/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085=
)
+++ branches/AIX5/callgrind/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086=
)
@@ -5,18 +5,24 @@
noinst_HEADERS =3D global.h costs.h events.h
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D callgrind-x86-linux
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D callgrind-amd64-linux
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D callgrind-ppc32-linux
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D callgrind-ppc64-linux
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D callgrind-ppc32-aix5
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D callgrind-ppc64-aix5
+endif
=20
CALLGRIND_SOURCES_COMMON =3D main.c events.c bb.c clo.c \
costs.c bbcc.c command.c debug.c fn.c \
@@ -58,7 +64,19 @@
callgrind_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
callgrind_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
=20
+callgrind_ppc32_aix5_SOURCES =3D $(CALLGRIND_SOURCES_COMMON) $(CALL=
GRIND_SOURCES_PPC32)
clincludedir =3D $(includedir)/valgrind
+callgrind_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+callgrind_ppc32_aix5_CFLAGS =3D $(CALLGRIND_CFLAGS_COMMON) $(AM_CF=
LAGS_PPC32_AIX5)
+callgrind_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+callgrind_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+callgrind_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
=20
+callgrind_ppc64_aix5_SOURCES =3D $(CALLGRIND_SOURCES_COMMON) $(CALL=
GRIND_SOURCES_PPC64)
+callgrind_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
clinclude_HEADERS =3D \
callgrind.h
+callgrind_ppc64_aix5_CFLAGS =3D $(CALLGRIND_CFLAGS_COMMON) $(AM_CF=
LAGS_PPC64_AIX5)
+callgrind_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+callgrind_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+callgrind_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
Modified: branches/AIX5/coregrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/coregrind/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085=
)
+++ branches/AIX5/coregrind/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086=
)
@@ -12,23 +12,31 @@
AM_CPPFLAGS_AMD64_LINUX +=3D -DVG_LIBDIR=3D"\"$(valdir)"\"
AM_CPPFLAGS_PPC32_LINUX +=3D -DVG_LIBDIR=3D"\"$(valdir)"\"
AM_CPPFLAGS_PPC64_LINUX +=3D -DVG_LIBDIR=3D"\"$(valdir)"\"
+AM_CPPFLAGS_PPC32_AIX5 +=3D -DVG_LIBDIR=3D"\"$(valdir)"\"
+AM_CPPFLAGS_PPC64_AIX5 +=3D -DVG_LIBDIR=3D"\"$(valdir)"\"
=20
=20
default.supp: $(SUPP_FILES)
=20
noinst_LIBRARIES =3D
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_LIBRARIES +=3D libcoregrind_x86_linux.a libreplacemalloc_toolprel=
oad_x86_linux.a
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_LIBRARIES +=3D libcoregrind_amd64_linux.a libreplacemalloc_toolpr=
eload_amd64_linux.a
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_LIBRARIES +=3D libcoregrind_ppc32_linux.a libreplacemalloc_toolpr=
eload_ppc32_linux.a
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_LIBRARIES +=3D libcoregrind_ppc64_linux.a libreplacemalloc_toolpr=
eload_ppc64_linux.a
endif
+if VGP_PPC32_AIX5
+noinst_LIBRARIES +=3D libcoregrind_ppc32_aix5.a libreplacemalloc_toolpre=
load_ppc32_aix5.a
+endif
+if VGP_PPC64_AIX5
+noinst_LIBRARIES +=3D libcoregrind_ppc64_aix5.a libreplacemalloc_toolpre=
load_ppc64_aix5.a
+endif
=20
#------------------------- launcher -----------------------
# Build the launcher (valgrind) for the primary target only.
@@ -36,9 +44,16 @@
bin_PROGRAMS =3D \
valgrind
=20
+if VGO_AIX5
valgrind_SOURCES =3D \
+ launcher-aix5.c \
+ m_debuglog.c \
+ m_vkiscnums.c
+else
+valgrind_SOURCES =3D \
launcher.c \
m_debuglog.c
+endif
=20
valgrind_CPPFLAGS =3D $(AM_CPPFLAGS_PRI)
valgrind_CFLAGS =3D $(AM_CFLAGS_PRI)
@@ -49,18 +64,24 @@
=20
=20
noinst_PROGRAMS =3D
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D vgpreload_core-x86-linux.so
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D vgpreload_core-amd64-linux.so
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D vgpreload_core-ppc32-linux.so
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D vgpreload_core-ppc64-linux.so
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D vgpreload_core-ppc32-aix5.so
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D vgpreload_core-ppc64-aix5.so
+endif
=20
noinst_HEADERS =3D \
pub_core_aspacemgr.h \
@@ -108,11 +129,8 @@
pub_core_transtab.h \
pub_core_transtab_asm.h \
pub_core_ume.h \
- vki_unistd.h \
- vki_unistd-amd64-linux.h\
- vki_unistd-ppc32-linux.h\
- vki_unistd-ppc64-linux.h\
- vki_unistd-x86-linux.h \
+ pub_core_vki.h \
+ pub_core_vkiscnums.h \
m_coredump/priv_elf.h \
m_debuginfo/priv_storage.h \
m_debuginfo/priv_readstabs.h \
@@ -127,7 +145,9 @@
m_syswrap/priv_syswrap-generic.h \
m_syswrap/priv_syswrap-linux.h \
m_syswrap/priv_syswrap-linux-variants.h \
- m_syswrap/priv_syswrap-main.h
+ m_syswrap/priv_syswrap-aix5.h \
+ m_syswrap/priv_syswrap-main.h \
+ launcher-aix5-bootblock.h
=20
BUILT_SOURCES =3D=20
CLEANFILES =3D=20
@@ -165,12 +185,11 @@
m_trampoline.S \
m_translate.c \
m_transtab.c \
+ m_vki.c \
+ m_vkiscnums.c \
m_ume.c \
- m_aspacemgr/aspacemgr.c \
+ m_aspacemgr/aspacemgr-common.c \
m_debuginfo/storage.c \
- m_debuginfo/readdwarf.c \
- m_debuginfo/readstabs.c \
- m_debuginfo/readelf.c \
m_debuginfo/debuginfo.c \
m_demangle/cp-demangle.c \
m_demangle/cplus-dem.c \
@@ -180,14 +199,25 @@
m_replacemalloc/replacemalloc_core.c \
m_scheduler/scheduler.c \
m_scheduler/sema.c \
- m_syswrap/syswrap-generic.c \
m_syswrap/syswrap-main.c
=20
COREGRIND_LINUX_SOURCE =3D \
m_coredump/coredump-elf.c \
m_syswrap/syswrap-linux.c \
- m_syswrap/syswrap-linux-variants.c
+ m_syswrap/syswrap-linux-variants.c \
+ m_aspacemgr/aspacemgr-linux.c \
+ m_initimg/initimg-linux.c \
+ m_debuginfo/readelf.c \
+ m_debuginfo/readdwarf.c \
+ m_debuginfo/readstabs.c \
+ m_syswrap/syswrap-generic.c
=20
+COREGRIND_AIX5_SOURCE =3D \
+ m_aspacemgr/aspacemgr-aix5.c \
+ m_initimg/initimg-aix5.c \
+ m_debuginfo/readxcoff.c \
+ m_syswrap/syswrap-aix5.c
+
libcoregrind_x86_linux_a_SOURCES =3D \
$(COREGRIND_SOURCES_COMMON) \
$(COREGRIND_LINUX_SOURCE) \
@@ -240,6 +270,34 @@
libcoregrind_ppc64_linux_a_CFLAGS =3D $(AM_CFLAGS_PPC64_LINUX)
libcoregrind_ppc64_linux_a_CCASFLAGS =3D $(AM_CCASFLAGS_PPC64_LINUX)
=20
+libcoregrind_ppc32_aix5_a_SOURCES =3D \
+ $(COREGRIND_SOURCES_COMMON) \
+ $(COREGRIND_AIX5_SOURCE) \
+ m_coredump/coredump-ppc32-aix5.c \
+ m_dispatch/dispatch-ppc32-aix5.S \
+ m_sigframe/sigframe-ppc32-aix5.c \
+ m_syswrap/syscall-ppc32-aix5.S \
+ m_syswrap/syswrap-ppc32-aix5.c
+
+libcoregrind_ppc32_aix5_a_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+libcoregrind_ppc32_aix5_a_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5)
+libcoregrind_ppc32_aix5_a_CCASFLAGS =3D $(AM_CCASFLAGS_PPC32_AIX5)
+libcoregrind_ppc32_aix5_a_AR =3D $(AR) -X32 cru
+
+libcoregrind_ppc64_aix5_a_SOURCES =3D \
+ $(COREGRIND_SOURCES_COMMON) \
+ $(COREGRIND_AIX5_SOURCE) \
+ m_coredump/coredump-ppc64-aix5.c \
+ m_dispatch/dispatch-ppc64-aix5.S \
+ m_sigframe/sigframe-ppc64-aix5.c \
+ m_syswrap/syscall-ppc64-aix5.S \
+ m_syswrap/syswrap-ppc64-aix5.c
+
+libcoregrind_ppc64_aix5_a_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+libcoregrind_ppc64_aix5_a_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5)
+libcoregrind_ppc64_aix5_a_CCASFLAGS =3D $(AM_CCASFLAGS_PPC64_AIX5)
+
+
libreplacemalloc_toolpreload_x86_linux_a_SOURCES =3D m_replacemalloc/vg_=
replace_malloc.c
libreplacemalloc_toolpreload_x86_linux_a_CPPFLAGS =3D $(AM_CPPFLAGS_X86_=
LINUX)
libreplacemalloc_toolpreload_x86_linux_a_CFLAGS =3D $(AM_CFLAGS_X86_LINU=
X) -fpic -fno-omit-frame-pointer
@@ -256,14 +314,27 @@
libreplacemalloc_toolpreload_ppc64_linux_a_CPPFLAGS =3D $(AM_CPPFLAGS_PP=
C64_LINUX)
libreplacemalloc_toolpreload_ppc64_linux_a_CFLAGS =3D $(AM_CFLAGS_PPC64_=
LINUX) -fpic -fno-omit-frame-pointer
=20
+libreplacemalloc_toolpreload_ppc32_aix5_a_SOURCES =3D m_replacemalloc/vg=
_replace_malloc.c
+libreplacemalloc_toolpreload_ppc32_aix5_a_CPPFLAGS =3D $(AM_CPPFLAGS_PPC=
32_AIX5)
+libreplacemalloc_toolpreload_ppc32_aix5_a_CFLAGS =3D $(AM_CFLAGS_PPC32_A=
IX5) -fpic -fno-omit-frame-pointer
+libreplacemalloc_toolpreload_ppc32_aix5_a_AR =3D $(AR) -X32 cru
+
+libreplacemalloc_toolpreload_ppc64_aix5_a_SOURCES =3D m_replacemalloc/vg=
_replace_malloc.c
+libreplacemalloc_toolpreload_ppc64_aix5_a_CPPFLAGS =3D $(AM_CPPFLAGS_PPC=
64_AIX5)
+libreplacemalloc_toolpreload_ppc64_aix5_a_CFLAGS =3D $(AM_CFLAGS_PPC64_A=
IX5) -fpic -fno-omit-frame-pointer
+
m_dispatch/dispatch-x86-linux.S: libvex_guest_offsets.h
m_dispatch/dispatch-amd64-linux.S: libvex_guest_offsets.h
m_dispatch/dispatch-ppc32-linux.S: libvex_guest_offsets.h
m_dispatch/dispatch-ppc64-linux.S: libvex_guest_offsets.h
+m_dispatch/dispatch-ppc32-aix5.S: libvex_guest_offsets.h
+m_dispatch/dispatch-ppc64-aix5.S: libvex_guest_offsets.h
m_syswrap/syscall-x86-linux.S: libvex_guest_offsets.h
m_syswrap/syscall-amd64-linux.S: libvex_guest_offsets.h
m_syswrap/syscall-ppc32-linux.S: libvex_guest_offsets.h
m_syswrap/syscall-ppc64-linux.S: libvex_guest_offsets.h
+m_syswrap/syscall-ppc32-aix5.S: libvex_guest_offsets.h
+m_syswrap/syscall-ppc64-aix5.S: libvex_guest_offsets.h
m_syswrap/syswrap-main.c: libvex_guest_offsets.h
=20
libvex_guest_offsets.h:
@@ -291,8 +362,18 @@
vgpreload_core_ppc64_linux_so_CFLAGS =3D $(AM_CFLAGS_PPC64_LINUX) $(AM_C=
FLAGS_PIC)
vgpreload_core_ppc64_linux_so_LDFLAGS =3D $(PRELOAD_LDFLAGS_PPC64_LINUX)
=20
+vgpreload_core_ppc32_aix5_so_SOURCES =3D $(VGPRELOAD_CORE_SOURCES_COMMON=
)
+vgpreload_core_ppc32_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+vgpreload_core_ppc32_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5) $(AM_CFL=
AGS_PIC)
+vgpreload_core_ppc32_aix5_so_LDFLAGS =3D $(PRELOAD_LDFLAGS_PPC32_AIX5)
+
+vgpreload_core_ppc64_aix5_so_SOURCES =3D $(VGPRELOAD_CORE_SOURCES_COMMON=
)
+vgpreload_core_ppc64_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+vgpreload_core_ppc64_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5) $(AM_CFL=
AGS_PIC)
+vgpreload_core_ppc64_aix5_so_LDFLAGS =3D $(PRELOAD_LDFLAGS_PPC64_AIX5)
+
clean-local:
- $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" clean
+ $(MAKE) -C @VEX_DIR@ CC=3D"$(CC)" AR=3D"$(AR)" clean
=20
MANUAL_DEPS =3D $(noinst_HEADERS) $(include_HEADERS)
=20
Modified: branches/AIX5/helgrind/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/helgrind/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/helgrind/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -1,18 +1,24 @@
include $(top_srcdir)/Makefile.tool.am
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D helgrind-x86-linux vgpreload_helgrind-x86-linux.so
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D helgrind-amd64-linux vgpreload_helgrind-amd64-linux=
.so
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D helgrind-ppc32-linux vgpreload_helgrind-ppc32-linux=
.so
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D helgrind-ppc64-linux vgpreload_helgrind-ppc64-linux=
.so
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D helgrind-ppc32-aix5 vgpreload_helgrind-ppc32-aix5.s=
o
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D helgrind-ppc64-aix5 vgpreload_helgrind-ppc64-aix5.s=
o
+endif
=20
vgpreload_helgrind_x86_linux_so_SOURCES =3D=20
vgpreload_helgrind_x86_linux_so_CPPFLAGS =3D $(AM_CPPFLAGS_X86_LINUX=
)
@@ -46,6 +52,22 @@
$(PRELOAD_LDFLAGS_PPC64_LINUX) \
$(LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX)
=20
+vgpreload_helgrind_ppc32_aix5_so_SOURCES =3D=20
+vgpreload_helgrind_ppc32_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AI=
X5)
+vgpreload_helgrind_ppc32_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5=
) $(AM_CFLAGS_PIC)
+vgpreload_helgrind_ppc32_aix5_so_DEPENDENCIES =3D $(LIBREPLACEMALLOC_PPC=
32_AIX5)
+vgpreload_helgrind_ppc32_aix5_so_LDFLAGS =3D \
+ $(PRELOAD_LDFLAGS_PPC32_AIX5) \
+ $(LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5)
+
+vgpreload_helgrind_ppc64_aix5_so_SOURCES =3D=20
+vgpreload_helgrind_ppc64_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AI=
X5)
+vgpreload_helgrind_ppc64_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5=
) $(AM_CFLAGS_PIC)
+vgpreload_helgrind_ppc64_aix5_so_DEPENDENCIES =3D $(LIBREPLACEMALLOC_PPC=
64_AIX5)
+vgpreload_helgrind_ppc64_aix5_so_LDFLAGS =3D \
+ $(PRELOAD_LDFLAGS_PPC64_AIX5) \
+ $(LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5)
+
HELGRIND_SOURCES_COMMON =3D hg_main.c
=20
helgrind_x86_linux_SOURCES =3D $(HELGRIND_SOURCES_COMMON)
@@ -76,6 +98,20 @@
helgrind_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
helgrind_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
=20
+helgrind_ppc32_aix5_SOURCES =3D $(HELGRIND_SOURCES_COMMON)
+helgrind_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+helgrind_ppc32_aix5_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5)
+helgrind_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+helgrind_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+helgrind_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
+
+helgrind_ppc64_aix5_SOURCES =3D $(HELGRIND_SOURCES_COMMON)
+helgrind_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+helgrind_ppc64_aix5_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5)
+helgrind_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+helgrind_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+helgrind_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
+
hgincludedir =3D $(includedir)/valgrind
=20
hginclude_HEADERS =3D helgrind.h
Modified: branches/AIX5/helgrind/tests/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/helgrind/tests/Makefile.am 2006-09-29 08:18:57 UTC (rev=
6085)
+++ branches/AIX5/helgrind/tests/Makefile.am 2006-09-29 21:05:06 UTC (rev=
6086)
@@ -19,7 +19,7 @@
# force -gstabs, because we don't print symaddr for DWARF yet
# Sigh, gcc-3.4.3 on ppc64 generates bogus .stabs. So disable it
# for now on ppc64-linux.
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
AM_CFLAGS =3D $(WERROR) -Winline -Wall -Wshadow -g $(AM_FLAG_M3264_=
PRI)
else
AM_CFLAGS =3D $(WERROR) -Winline -Wall -Wshadow -gstabs $(AM_FLAG_M3264_=
PRI)
Modified: branches/AIX5/include/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/include/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/include/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -28,13 +28,21 @@
pub_tool_stacktrace.h \
pub_tool_threadstate.h \
pub_tool_tooliface.h \
+ pub_tool_vki.h \
+ pub_tool_vkiscnums.h \
valgrind.h \
- vki-linux.h \
- vki-amd64-linux.h \
- vki-ppc32-linux.h \
- vki-ppc64-linux.h \
- vki-x86-linux.h \
- vki_posixtypes-amd64-linux.h \
- vki_posixtypes-ppc32-linux.h \
- vki_posixtypes-ppc64-linux.h \
- vki_posixtypes-x86-linux.h
+ vki/vki-amd64-linux.h \
+ vki/vki-linux.h \
+ vki/vki-posixtypes-amd64-linux.h \
+ vki/vki-posixtypes-ppc32-linux.h \
+ vki/vki-posixtypes-ppc64-linux.h \
+ vki/vki-posixtypes-x86-linux.h \
+ vki/vki-ppc32-aix5.h \
+ vki/vki-ppc32-linux.h \
+ vki/vki-ppc64-linux.h \
+ vki/vki-scnums-amd64-linux.h \
+ vki/vki-scnums-ppc32-linux.h \
+ vki/vki-scnums-ppc64-linux.h \
+ vki/vki-scnums-x86-linux.h \
+ vki/vki-scnums-aix5.h \
+ vki/vki-x86-linux.h
Modified: branches/AIX5/lackey/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/lackey/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/lackey/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -1,18 +1,24 @@
include $(top_srcdir)/Makefile.tool.am
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D lackey-x86-linux
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D lackey-amd64-linux
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D lackey-ppc32-linux
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D lackey-ppc64-linux
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D lackey-ppc32-aix5
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D lackey-ppc64-aix5
+endif
=20
LACKEY_SOURCES_COMMON =3D lk_main.c
=20
@@ -43,3 +49,17 @@
lackey_ppc64_linux_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_LINUX)
lackey_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
lackey_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
+
+lackey_ppc32_aix5_SOURCES =3D $(LACKEY_SOURCES_COMMON)
+lackey_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+lackey_ppc32_aix5_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5)
+lackey_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+lackey_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+lackey_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
+
+lackey_ppc64_aix5_SOURCES =3D $(LACKEY_SOURCES_COMMON)
+lackey_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+lackey_ppc64_aix5_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5)
+lackey_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+lackey_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+lackey_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
Modified: branches/AIX5/massif/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/massif/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/massif/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -3,18 +3,24 @@
SUBDIRS +=3D hp2ps
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D massif-x86-linux vgpreload_massif-x86-linux.so
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D massif-amd64-linux vgpreload_massif-amd64-linux.so
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D massif-ppc32-linux vgpreload_massif-ppc32-linux.so
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D massif-ppc64-linux vgpreload_massif-ppc64-linux.so
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D massif-ppc32-aix5 vgpreload_massif-ppc32-aix5.so
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D massif-ppc64-aix5 vgpreload_massif-ppc64-aix5.so
+endif
=20
vgpreload_massif_x86_linux_so_SOURCES =3D=20
vgpreload_massif_x86_linux_so_CPPFLAGS =3D $(AM_CPPFLAGS_X86_LINUX)
@@ -48,6 +54,22 @@
$(PRELOAD_LDFLAGS_PPC64_LINUX) \
$(LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX)
=20
+vgpreload_massif_ppc32_aix5_so_SOURCES =3D=20
+vgpreload_massif_ppc32_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5=
)
+vgpreload_massif_ppc32_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5) =
$(AM_CFLAGS_PIC)
+vgpreload_massif_ppc32_aix5_so_DEPENDENCIES =3D $(LIBREPLACEMALLOC_PPC32=
_AIX5)
+vgpreload_massif_ppc32_aix5_so_LDFLAGS =3D \
+ $(PRELOAD_LDFLAGS_PPC32_AIX5) \
+ $(LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5)
+
+vgpreload_massif_ppc64_aix5_so_SOURCES =3D=20
+vgpreload_massif_ppc64_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5=
)
+vgpreload_massif_ppc64_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5) =
$(AM_CFLAGS_PIC)
+vgpreload_massif_ppc64_aix5_so_DEPENDENCIES =3D $(LIBREPLACEMALLOC_PPC64=
_AIX5)
+vgpreload_massif_ppc64_aix5_so_LDFLAGS =3D \
+ $(PRELOAD_LDFLAGS_PPC64_AIX5) \
+ $(LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5)
+
MASSIF_SOURCES_COMMON =3D ms_main.c
=20
massif_x86_linux_SOURCES =3D $(MASSIF_SOURCES_COMMON)
@@ -77,3 +99,17 @@
massif_ppc64_linux_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_LINUX)
massif_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
massif_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
+
+massif_ppc32_aix5_SOURCES =3D $(MASSIF_SOURCES_COMMON)
+massif_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+massif_ppc32_aix5_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5)
+massif_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+massif_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+massif_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
+
+massif_ppc64_aix5_SOURCES =3D $(MASSIF_SOURCES_COMMON)
+massif_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+massif_ppc64_aix5_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5)
+massif_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+massif_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+massif_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
Modified: branches/AIX5/memcheck/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/memcheck/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/memcheck/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -1,18 +1,24 @@
include $(top_srcdir)/Makefile.tool.am
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D memcheck-x86-linux vgpreload_memcheck-x86-linux.so
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D memcheck-amd64-linux vgpreload_memcheck-amd64-linux=
.so
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D memcheck-ppc32-linux vgpreload_memcheck-ppc32-linux=
.so
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D memcheck-ppc64-linux vgpreload_memcheck-ppc64-linux=
.so
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D memcheck-ppc32-aix5 vgpreload_memcheck-ppc32-aix5.s=
o
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D memcheck-ppc64-aix5 vgpreload_memcheck-ppc64-aix5.s=
o
+endif
=20
VGPRELOAD_MEMCHECK_SOURCES_COMMON =3D mc_replace_strmem.c
=20
@@ -52,6 +58,24 @@
$(PRELOAD_LDFLAGS_PPC64_LINUX) \
$(LIBREPLACEMALLOC_LDFLAGS_PPC64_LINUX)
=20
+vgpreload_memcheck_ppc32_aix5_so_SOURCES =3D $(VGPRELOAD_MEMCHECK_S=
OURCES_COMMON)
+vgpreload_memcheck_ppc32_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AI=
X5)
+vgpreload_memcheck_ppc32_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5=
) $(AM_CFLAGS_PIC) -O2
+vgpreload_memcheck_ppc32_aix5_so_CCASFLAGS =3D $(AM_CCASFLAGS_PPC32_A=
IX5)
+vgpreload_memcheck_ppc32_aix5_so_DEPENDENCIES =3D $(LIBREPLACEMALLOC_PPC=
32_AIX5)
+vgpreload_memcheck_ppc32_aix5_so_LDFLAGS =3D \
+ $(PRELOAD_LDFLAGS_PPC32_AIX5) \
+ $(LIBREPLACEMALLOC_LDFLAGS_PPC32_AIX5)
+
+vgpreload_memcheck_ppc64_aix5_so_SOURCES =3D $(VGPRELOAD_MEMCHECK_S=
OURCES_COMMON)
+vgpreload_memcheck_ppc64_aix5_so_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AI=
X5)
+vgpreload_memcheck_ppc64_aix5_so_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5=
) $(AM_CFLAGS_PIC) -O2
+vgpreload_memcheck_ppc64_aix5_so_CCASFLAGS =3D $(AM_CCASFLAGS_PPC64_A=
IX5)
+vgpreload_memcheck_ppc64_aix5_so_DEPENDENCIES =3D $(LIBREPLACEMALLOC_PPC=
64_AIX5)
+vgpreload_memcheck_ppc64_aix5_so_LDFLAGS =3D \
+ $(PRELOAD_LDFLAGS_PPC64_AIX5) \
+ $(LIBREPLACEMALLOC_LDFLAGS_PPC64_AIX5)
+
MEMCHECK_SOURCES_COMMON =3D \
mc_leakcheck.c \
mc_malloc_wrappers.c \
@@ -90,6 +114,22 @@
memcheck_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
memcheck_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
=20
+memcheck_ppc32_aix5_SOURCES =3D $(MEMCHECK_SOURCES_COMMON)
+memcheck_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+memcheck_ppc32_aix5_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5) -O2
+memcheck_ppc32_aix5_CCASFLAGS =3D $(AM_CCASFLAGS_PPC32_AIX5)
+memcheck_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+memcheck_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+memcheck_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
+
+memcheck_ppc64_aix5_SOURCES =3D $(MEMCHECK_SOURCES_COMMON)
+memcheck_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+memcheck_ppc64_aix5_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5) -O2
+memcheck_ppc64_aix5_CCASFLAGS =3D $(AM_CCASFLAGS_PPC64_AIX5)
+memcheck_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+memcheck_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+memcheck_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
+
mcincludedir =3D $(includedir)/valgrind
=20
mcinclude_HEADERS =3D \
Modified: branches/AIX5/memcheck/tests/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/memcheck/tests/Makefile.am 2006-09-29 08:18:57 UTC (rev=
6085)
+++ branches/AIX5/memcheck/tests/Makefile.am 2006-09-29 21:05:06 UTC (rev=
6086)
@@ -3,16 +3,16 @@
include $(top_srcdir)/Makefile.flags.am
=20
SUBDIRS =3D .
-if VG_X86_LINUX
+if VGP_X86_LINUX
SUBDIRS +=3D x86
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
SUBDIRS +=3D amd64
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
SUBDIRS +=3D ppc32
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
SUBDIRS +=3D ppc64
endif
=20
@@ -127,6 +127,7 @@
wrap7.vgtest wrap7.stdout.exp wrap7.stderr.exp \
wrap8.vgtest wrap8.stdout.exp wrap8.stderr.exp \
wrap8.stdout.exp2 wrap8.stderr.exp2 \
+ wrap8.stdout.exp3 wrap8.stderr.exp3 \
writev.stderr.exp writev.stderr.exp2 writev.stderr.exp3 writev.vgtest \
xml1.stderr.exp xml1.stderr.exp2 xml1.stderr.exp3 \
xml1.stderr.exp64 xml1.stderr.exp64_2 xml1.stdout.exp \
@@ -199,18 +200,55 @@
deep_templates_SOURCES =3D deep_templates.cpp
deep_templates_CXXFLAGS =3D $(AM_FLAG_M3264_PRI) $(AM_CFLAGS) -O -gstabs
=20
+if VGP_PPC32_AIX5
+if VGP_PPC64_AIX5
+else
+ # persuade the AIX linker not to junk apparently unused
+ # function descriptors. Unfortunately -Wl,-G -Wl,-bnogc
+ # produces a link error on 64-bit AIX, hence only 32-bit
+ # gets these flags.
+ wrap1_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+ wrap2_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+ wrap3_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+ wrap4_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+ wrap5_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+ wrap6_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+ wrap8_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+endif
+endif
+
# Build shared object for wrap7
wrap7_SOURCES =3D wrap7.c
wrap7_DEPENDENCIES =3D wrap7so.so
-wrap7_LDFLAGS =3D $(AM_FLAG_M3264_PRI) \
+if VGP_PPC64_AIX5=20
+ wrap7_LDADD =3D `pwd`/wrap7so.so
+ wrap7_LDFLAGS =3D $(AM_FLAG_M3264_PRI)
+else
+if VGP_PPC32_AIX5
+ wrap7_LDADD =3D `pwd`/wrap7so.so
+ wrap7_LDFLAGS =3D $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc
+else
+ wrap7_LDADD =3D wrap7so.so
+ wrap7_LDFLAGS =3D $(AM_FLAG_M3264_PRI) \
-Wl,-rpath,$(top_builddir)/memcheck/tests
-wrap7_LDADD =3D wrap7so.so
+endif
+endif
+
wrap7so_so_SOURCES =3D wrap7so.c
wrap7so_so_LDADD =3D=20
wrap7so_so_DEPENDENCIES =3D=20
-wrap7so_so_LDFLAGS =3D -fpic $(AM_FLAG_M3264_PRI) \
- -Wl,-soname -Wl,wrap7so.so -shared
wrap7so_so_CFLAGS =3D -fpic $(AM_FLAG_M3264_PRI)
+if VGP_PPC64_AIX5
+ wrap7so_so_LDFLAGS =3D -fpic $(AM_FLAG_M3264_PRI) -shared
+else
+if VGP_PPC32_AIX5
+ wrap7so_so_LDFLAGS =3D -fpic $(AM_FLAG_M3264_PRI) -shared \
+ -Wl,-G -Wl,-bnogc
+else
+ wrap7so_so_LDFLAGS =3D -fpic $(AM_FLAG_M3264_PRI) -shared \
+ -Wl,-soname -Wl,wrap7so.so
+endif
+endif
=20
# Valgrind unit self-tests
#hello_LDFLAGS =3D -Wl,-defsym,valt_load_address=3D0x50000000 \
Modified: branches/AIX5/none/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/none/Makefile.am 2006-09-29 08:18:57 UTC (rev 6085)
+++ branches/AIX5/none/Makefile.am 2006-09-29 21:05:06 UTC (rev 6086)
@@ -1,18 +1,24 @@
include $(top_srcdir)/Makefile.tool.am
=20
noinst_PROGRAMS =3D=20
-if VG_X86_LINUX
+if VGP_X86_LINUX
noinst_PROGRAMS +=3D none-x86-linux
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
noinst_PROGRAMS +=3D none-amd64-linux
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
noinst_PROGRAMS +=3D none-ppc32-linux
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
noinst_PROGRAMS +=3D none-ppc64-linux
endif
+if VGP_PPC32_AIX5
+noinst_PROGRAMS +=3D none-ppc32-aix5
+endif
+if VGP_PPC64_AIX5
+noinst_PROGRAMS +=3D none-ppc64-aix5
+endif
=20
NONE_SOURCES_COMMON =3D nl_main.c
=20
@@ -43,3 +49,17 @@
none_ppc64_linux_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_LINUX)
none_ppc64_linux_LDADD =3D $(TOOL_LDADD_PPC64_LINUX)
none_ppc64_linux_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_LINUX)
+
+none_ppc32_aix5_SOURCES =3D $(NONE_SOURCES_COMMON)
+none_ppc32_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC32_AIX5)
+none_ppc32_aix5_CFLAGS =3D $(AM_CFLAGS_PPC32_AIX5)
+none_ppc32_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC32_AIX5)
+none_ppc32_aix5_LDADD =3D $(TOOL_LDADD_PPC32_AIX5)
+none_ppc32_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC32_AIX5)
+
+none_ppc64_aix5_SOURCES =3D $(NONE_SOURCES_COMMON)
+none_ppc64_aix5_CPPFLAGS =3D $(AM_CPPFLAGS_PPC64_AIX5)
+none_ppc64_aix5_CFLAGS =3D $(AM_CFLAGS_PPC64_AIX5)
+none_ppc64_aix5_DEPENDENCIES =3D $(COREGRIND_LIBS_PPC64_AIX5)
+none_ppc64_aix5_LDADD =3D $(TOOL_LDADD_PPC64_AIX5)
+none_ppc64_aix5_LDFLAGS =3D $(TOOL_LDFLAGS_PPC64_AIX5)
Modified: branches/AIX5/none/tests/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/AIX5/none/tests/Makefile.am 2006-09-29 08:18:57 UTC (rev 608=
5)
+++ branches/AIX5/none/tests/Makefile.am 2006-09-29 21:05:06 UTC (rev 608=
6)
@@ -3,16 +3,16 @@
include $(top_srcdir)/Makefile.flags.am
=20
SUBDIRS =3D .
-if VG_X86_LINUX
+if VGP_X86_LINUX
SUBDIRS +=3D x86
endif
-if VG_AMD64_LINUX
+if VGP_AMD64_LINUX
SUBDIRS +=3D amd64
endif
-if VG_PPC32_LINUX
+if VGP_PPC32_LINUX
SUBDIRS +=3D ppc32
endif
-if VG_PPC64_LINUX
+if VGP_PPC64_LINUX
SUBDIRS +=3D ppc64
endif
=20
@@ -175,7 +175,11 @@
pth_once_LDADD =3D -lpthread
pth_rwlock_LDADD =3D -lpthread
pth_stackalign_LDADD =3D -lpthread
-res_search_LDADD =3D -lresolv -lpthread
+if VGP_PPC32_AIX5
+ res_search_LDADD =3D -lpthread
+else
+ res_search_LDADD =3D -lresolv -lpthread
+endif
semlimit_LDADD =3D -lpthread
susphello_LDADD =3D -lpthread
thread_exits_LDADD =3D -lpthread
@@ -183,12 +187,21 @@
threadederrno_LDADD =3D -lpthread
tls_SOURCES =3D tls.c tls2.c
tls_DEPENDENCIES =3D tls.so
-tls_LDFLAGS =3D -Wl,-rpath,$(top_builddir)/none/tests
+if VGP_PPC32_AIX5
+ tls_LDFLAGS =3D=20
+else
+ tls_LDFLAGS =3D -Wl,-rpath,$(top_builddir)/none/tests
+endif
tls_LDADD =3D tls.so -lpthread
tls_so_SOURCES =3D tls_so.c
-tls_so_LDADD =3D tls2.so
tls_so_DEPENDENCIES =3D tls2.so
-tls_so_LDFLAGS =3D -Wl,-rpath,$(top_builddir)/none/tests -shared -fPIC
+if VGP_PPC32_AIX5
+ tls_so_LDFLAGS =3D -shared -fPIC
+ tls_so_LDADD =3D `pwd`/tls2.so
+else
+ tls_so_LDFLAGS =3D -Wl,-rpath,$(top_builddir)/none/tests -shared -fPIC
+ tls_so_LDADD =3D tls2.so
+endif
tls_so_CFLAGS =3D $(AM_FLAG_M3264_PRI) -fPIC
tls2_so_SOURCES =3D tls2_so.c
tls2_so_LDFLAGS =3D -shared
|
|
From: <js...@ac...> - 2006-09-29 13:00:49
|
Nightly build on minnie ( SuSE 10.0, ppc32 ) started at 2006-09-29 09:00:01 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 207 tests, 10 stderr failures, 7 stdout failures, 0 posttest failures == memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_changes (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) none/tests/ppc32/jm-int (stdout) none/tests/ppc32/round (stdout) none/tests/ppc32/round (stderr) none/tests/ppc32/test_fx (stdout) none/tests/ppc32/test_fx (stderr) none/tests/ppc32/test_gx (stdout) |
|
From: <sv...@va...> - 2006-09-29 08:19:03
|
Author: tom Date: 2006-09-29 09:18:57 +0100 (Fri, 29 Sep 2006) New Revision: 6085 Log: Update bug list. Modified: trunk/docs/internals/3_2_BUGSTATUS.txt Modified: trunk/docs/internals/3_2_BUGSTATUS.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/3_2_BUGSTATUS.txt 2006-09-29 08:12:08 UTC (rev 6= 084) +++ trunk/docs/internals/3_2_BUGSTATUS.txt 2006-09-29 08:18:57 UTC (rev 6= 085) @@ -23,6 +23,11 @@ vx1660 pending n-i-bz %eflags rule for SUBL-CondNLE Signal race condition (users list, 13 June, Johannes Berg) Unrecognised instruction at address 0x70198EC2 (users, 19 July, Bennee) +pending pending 133984 unhandled instruction bytes: 0xCC 0x89 0x= EC 0x31 (int3) +pending pending 134138 Stale default library used after reconfig= uring +pending pending 134219 Launcher defaults to ppc32-linux even wit= h --enable-only64bit +pending pending 134316 Callgrind does not distinguish between pa= rent and child +v6084 pending 134727 valgrind exits with "Value too large for = defined data type" =20 ------- Bugs reported and fixed in 3.2.0 ------ =20 |
|
From: <sv...@va...> - 2006-09-29 08:12:14
|
Author: tom
Date: 2006-09-29 09:12:08 +0100 (Fri, 29 Sep 2006)
New Revision: 6084
Log:
Use stat64 instead of stat when it is available. Fixes bug #134727.
Modified:
trunk/coregrind/m_libcfile.c
Modified: trunk/coregrind/m_libcfile.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_libcfile.c 2006-09-21 15:59:30 UTC (rev 6083)
+++ trunk/coregrind/m_libcfile.c 2006-09-29 08:12:08 UTC (rev 6084)
@@ -234,10 +234,14 @@
/* returns: 0 =3D success, non-0 is failure */
Int VG_(check_executable)(HChar* f)
{
+#ifdef __NR_stat64
+ struct vki_stat64 st;
+ SysRes res =3D VG_(do_syscall2)(__NR_stat64, (UWord)f, (UWord)&st);
+#else
struct vki_stat st;
- SysRes res;
+ SysRes res =3D VG_(do_syscall2)(__NR_stat, (UWord)f, (UWord)&st);
+#endif
=20
- res =3D VG_(stat)(f, &st);
if (res.isError) {
return res.val;
}
|
|
From: <js...@ac...> - 2006-09-29 04:33:25
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2006-09-29 04:30:01 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 238 tests, 5 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/leak-tree (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) |
|
From: Tom H. <th...@cy...> - 2006-09-29 02:36:23
|
Nightly build on dellow ( x86_64, Fedora Core 5 ) started at 2006-09-29 03:10:03 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 268 tests, 14 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/mempool (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/xml1 (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_creat (stderr) none/tests/fdleak_dup (stderr) none/tests/fdleak_dup2 (stderr) none/tests/fdleak_fcntl (stderr) none/tests/fdleak_ipv4 (stderr) none/tests/fdleak_open (stderr) none/tests/fdleak_pipe (stderr) none/tests/fdleak_socketpair (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/rlimit_nofile (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 268 tests, 14 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/mempool (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/xml1 (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_creat (stderr) none/tests/fdleak_dup (stderr) none/tests/fdleak_dup2 (stderr) none/tests/fdleak_fcntl (stderr) none/tests/fdleak_ipv4 (stderr) none/tests/fdleak_open (stderr) none/tests/fdleak_pipe (stderr) none/tests/fdleak_socketpair (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/rlimit_nofile (stderr) none/tests/tls (stdout) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Fri Sep 29 03:23:31 2006 --- new.short Fri Sep 29 03:36:19 2006 *************** *** 8,10 **** ! == 268 tests, 14 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/mempool (stderr) --- 8,10 ---- ! == 268 tests, 14 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/mempool (stderr) *************** *** 24,26 **** none/tests/rlimit_nofile (stderr) - none/tests/tls (stdout) --- 24,25 ---- |
|
From: Tom H. <th...@cy...> - 2006-09-29 02:24:56
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2006-09-29 03:15:02 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Last 20 lines of verbose log follow echo /tmp/cc5AAc6X.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/cc5AAc6X.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 rm insn_mmx.c insn_sse2.c insn_fpu.c insn_mmxext.c insn_sse.c insn_sse3.c insn_cmov.c insn_basic.c make[5]: Leaving directory `/tmp/valgrind.1911/valgrind/none/tests/x86' make[4]: *** [check-am] Error 2 make[4]: Leaving directory `/tmp/valgrind.1911/valgrind/none/tests/x86' make[3]: *** [check-recursive] Error 1 make[3]: Leaving directory `/tmp/valgrind.1911/valgrind/none/tests' make[2]: *** [check-recursive] Error 1 make[2]: Leaving directory `/tmp/valgrind.1911/valgrind/none' make[1]: *** [check-recursive] Error 1 make[1]: Leaving directory `/tmp/valgrind.1911/valgrind' make: *** [check] Error 2 ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Last 20 lines of verbose log follow echo /tmp/ccwjk2mb.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' /tmp/ccwjk2mb.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 rm insn_mmx.c insn_sse2.c insn_fpu.c insn_mmxext.c insn_sse.c insn_sse3.c insn_cmov.c insn_basic.c make[5]: Leaving directory `/tmp/valgrind.1911/valgrind/none/tests/x86' make[4]: *** [check-am] Error 2 make[4]: Leaving directory `/tmp/valgrind.1911/valgrind/none/tests/x86' make[3]: *** [check-recursive] Error 1 make[3]: Leaving directory `/tmp/valgrind.1911/valgrind/none/tests' make[2]: *** [check-recursive] Error 1 make[2]: Leaving directory `/tmp/valgrind.1911/valgrind/none' make[1]: *** [check-recursive] Error 1 make[1]: Leaving directory `/tmp/valgrind.1911/valgrind' make: *** [check] Error 2 ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Fri Sep 29 03:19:48 2006 --- new.short Fri Sep 29 03:24:47 2006 *************** *** 7,16 **** Last 20 lines of verbose log follow echo ! /tmp/ccwjk2mb.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/ccwjk2mb.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 --- 7,16 ---- Last 20 lines of verbose log follow echo ! /tmp/cc5AAc6X.s:4393: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:4513: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:4633: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:4753: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:4873: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:4993: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:5113: Error: no such instruction: `fisttpq -56(%ebp)' ! /tmp/cc5AAc6X.s:5233: Error: no such instruction: `fisttpq -56(%ebp)' make[5]: *** [insn_sse3.o] Error 1 |
|
From: Tom H. <th...@cy...> - 2006-09-29 02:20:15
|
Nightly build on lloyd ( x86_64, Fedora Core 3 ) started at 2006-09-29 03:05:11 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 268 tests, 6 stderr failures, 2 stdout failures, 0 posttest failures == memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) |
|
From: Tom H. <th...@cy...> - 2006-09-29 02:14:08
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2006-09-29 03:00:02 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 270 tests, 6 stderr failures, 1 stdout failure, 0 posttest failures == memcheck/tests/mempool (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/fdleak_fcntl (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) |