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From: <sv...@va...> - 2006-02-08 19:32:31
|
Author: sewardj
Date: 2006-02-08 19:32:20 +0000 (Wed, 08 Feb 2006)
New Revision: 5620
Log:
Enable rounding checks for fmadd/fmsub et al.
Modified:
trunk/auxprogs/ppcfround.c
Modified: trunk/auxprogs/ppcfround.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/auxprogs/ppcfround.c 2006-02-08 19:32:02 UTC (rev 5619)
+++ trunk/auxprogs/ppcfround.c 2006-02-08 19:32:20 UTC (rev 5620)
@@ -487,7 +487,6 @@
do_N_unary("fctiwz", insn_fctiwz, args, nargs, 0xFFFFFFFF00000000ULL=
);
do_N_unary("fctiwz_", insn_fctiwz_, args, nargs, 0xFFFFFFFF00000000ULL=
);
=20
-#if 0
do_N_ternary("fmadd", insn_fmadd, macArgs, nMacArgs, SHOW_ALL);
do_N_ternary("fmadd_", insn_fmadd_, macArgs, nMacArgs, SHOW_ALL);
=20
@@ -511,7 +510,6 @@
=20
do_N_ternary("fnmsubs", insn_fnmsubs, macArgs, nMacArgs, SHOW_ALL);
do_N_ternary("fnmsubs_", insn_fnmsubs_, macArgs, nMacArgs, SHOW_ALL);
-#endif
=20
//do_N_unary(fre, SHOW_ALL);
//do_N_unary(fre_, SHOW_ALL);
|
|
From: <sv...@va...> - 2006-02-08 19:32:13
|
Author: sewardj
Date: 2006-02-08 19:32:02 +0000 (Wed, 08 Feb 2006)
New Revision: 5619
Log:
Track vex r1573 (introduction of 4-arg IR primops for ppc fmadd/fmsub).
Modified:
trunk/lackey/lk_main.c
trunk/memcheck/mc_translate.c
Modified: trunk/lackey/lk_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/lackey/lk_main.c 2006-02-07 20:58:12 UTC (rev 5618)
+++ trunk/lackey/lk_main.c 2006-02-08 19:32:02 UTC (rev 5619)
@@ -432,6 +432,8 @@
break;
case Iex_Unop:
case Iex_Binop:
+ case Iex_Triop:
+ case Iex_Qop:
case Iex_Mux0X:
instrument_detail( bb, OpAlu, type );
break;
Modified: trunk/memcheck/mc_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_translate.c 2006-02-07 20:58:12 UTC (rev 5618)
+++ trunk/memcheck/mc_translate.c 2006-02-08 19:32:02 UTC (rev 5619)
@@ -1161,6 +1161,61 @@
}
=20
=20
+/* 4-arg version of the above. */
+static
+IRAtom* mkLazy4 ( MCEnv* mce, IRType finalVty,=20
+ IRAtom* va1, IRAtom* va2, IRAtom* va3, IRAtom* va4 )
+{
+ IRAtom* at;
+ IRType t1 =3D typeOfIRExpr(mce->bb->tyenv, va1);
+ IRType t2 =3D typeOfIRExpr(mce->bb->tyenv, va2);
+ IRType t3 =3D typeOfIRExpr(mce->bb->tyenv, va3);
+ IRType t4 =3D typeOfIRExpr(mce->bb->tyenv, va4);
+ tl_assert(isShadowAtom(mce,va1));
+ tl_assert(isShadowAtom(mce,va2));
+ tl_assert(isShadowAtom(mce,va3));
+ tl_assert(isShadowAtom(mce,va4));
+
+ /* The general case is inefficient because PCast is an expensive
+ operation. Here are some special cases which use PCast only
+ twice rather than three times. */
+
+ /* I32 x I64 x I64 x I64 -> I64 */
+ /* Standard FP idiom: rm x FParg1 x FParg2 x FParg3 -> FPresult */
+ if (t1 =3D=3D Ity_I32 && t2 =3D=3D Ity_I64 && t3 =3D=3D Ity_I64 && t4=
=3D=3D Ity_I64
+ && finalVty =3D=3D Ity_I64) {
+ if (0) VG_(printf)("mkLazy4: I32 x I64 x I64 x I64 -> I64\n");
+ /* Widen 1st arg to I64. Since 1st arg is typically a rounding
+ mode indication which is fully defined, this should get
+ folded out later. */
+ at =3D mkPCastTo(mce, Ity_I64, va1);
+ /* Now fold in 2nd, 3rd, 4th args. */
+ at =3D mkUifU(mce, Ity_I64, at, va2);
+ at =3D mkUifU(mce, Ity_I64, at, va3);
+ at =3D mkUifU(mce, Ity_I64, at, va4);
+ /* and PCast once again. */
+ at =3D mkPCastTo(mce, Ity_I64, at);
+ return at;
+ }
+
+ if (1) {
+ VG_(printf)("mkLazy4 ");
+ ppIRType(t1);
+ VG_(printf)(" x ");
+ ppIRType(t2);
+ VG_(printf)(" x ");
+ ppIRType(t3);
+ VG_(printf)(" x ");
+ ppIRType(t4);
+ VG_(printf)(" -> ");
+ ppIRType(finalVty);
+ VG_(printf)("\n");
+ }
+
+ tl_assert(0);
+}
+
+
/* Do the lazy propagation game from a null-terminated vector of
atoms. This is presumably the arguments to a helper call, so the
IRCallee info is also supplied in order that we can know which
@@ -1646,6 +1701,43 @@
/*------------------------------------------------------------*/
=20
static=20
+IRAtom* expr2vbits_Qop ( MCEnv* mce,
+ IROp op,
+ IRAtom* atom1, IRAtom* atom2,=20
+ IRAtom* atom3, IRAtom* atom4 )
+{
+ IRAtom* vatom1 =3D expr2vbits( mce, atom1 );
+ IRAtom* vatom2 =3D expr2vbits( mce, atom2 );
+ IRAtom* vatom3 =3D expr2vbits( mce, atom3 );
+ IRAtom* vatom4 =3D expr2vbits( mce, atom4 );
+
+ tl_assert(isOriginalAtom(mce,atom1));
+ tl_assert(isOriginalAtom(mce,atom2));
+ tl_assert(isOriginalAtom(mce,atom3));
+ tl_assert(isOriginalAtom(mce,atom4));
+ tl_assert(isShadowAtom(mce,vatom1));
+ tl_assert(isShadowAtom(mce,vatom2));
+ tl_assert(isShadowAtom(mce,vatom3));
+ tl_assert(isShadowAtom(mce,vatom4));
+ tl_assert(sameKindedAtoms(atom1,vatom1));
+ tl_assert(sameKindedAtoms(atom2,vatom2));
+ tl_assert(sameKindedAtoms(atom3,vatom3));
+ tl_assert(sameKindedAtoms(atom4,vatom4));
+ switch (op) {
+ case Iop_MAddF64:
+ case Iop_MAddF64r32:
+ case Iop_MSubF64:
+ case Iop_MSubF64r32:
+ /* I32(rm) x F64 x F64 x F64 -> F64 */
+ return mkLazy4(mce, Ity_I64, vatom1, vatom2, vatom3, vatom4);
+ default:
+ ppIROp(op);
+ VG_(tool_panic)("memcheck:expr2vbits_Qop");
+ }
+}
+
+
+static=20
IRAtom* expr2vbits_Triop ( MCEnv* mce,
IROp op,
IRAtom* atom1, IRAtom* atom2, IRAtom* atom3 )
@@ -2515,6 +2607,14 @@
case Iex_Const:
return definedOfType(shadowType(typeOfIRExpr(mce->bb->tyenv, e)=
));
=20
+ case Iex_Qop:
+ return expr2vbits_Qop(
+ mce,
+ e->Iex.Qop.op,
+ e->Iex.Qop.arg1, e->Iex.Qop.arg2,
+ e->Iex.Qop.arg3, e->Iex.Qop.arg4
+ );
+
case Iex_Triop:
return expr2vbits_Triop(
mce,
@@ -3029,6 +3129,11 @@
return isBogusAtom(e->Iex.Triop.arg1)
|| isBogusAtom(e->Iex.Triop.arg2)
|| isBogusAtom(e->Iex.Triop.arg3);
+ case Iex_Qop:=20
+ return isBogusAtom(e->Iex.Qop.arg1)
+ || isBogusAtom(e->Iex.Qop.arg2)
+ || isBogusAtom(e->Iex.Qop.arg3)
+ || isBogusAtom(e->Iex.Qop.arg4);
case Iex_Mux0X:
return isBogusAtom(e->Iex.Mux0X.cond)
|| isBogusAtom(e->Iex.Mux0X.expr0)
|
|
From: <sv...@va...> - 2006-02-08 19:30:55
|
Author: sewardj
Date: 2006-02-08 19:30:46 +0000 (Wed, 08 Feb 2006)
New Revision: 1573
Log:
Redo the way FP multiply-accumulate insns are done on ppc32/64.
Instead of splitting them up into a multiply and an add/sub, add 4 new
primops which keeps the operation as a single unit. Then, in the back
end, re-emit the as a single instruction.
Reason for this is that so-called fused-multiply-accumulate -- which
is what ppc does -- generates a double-double length intermediate
result (of the multiply, 112 mantissa bits) before doing the add, and
so it is impossible to do a bit-accurate simulation of it using AddF64
and MulF64.
Unfortunately the new primops unavoidably take 4 args (a rounding mode
+ 3 FP args) and so there is a new IRExpr expression type, IRExpr_Qop
and associated supporting junk.
Modified:
trunk/priv/guest-ppc/toIR.c
trunk/priv/host-generic/h_generic_regs.h
trunk/priv/host-ppc/hdefs.c
trunk/priv/host-ppc/hdefs.h
trunk/priv/host-ppc/isel.c
trunk/priv/ir/irdefs.c
trunk/priv/ir/iropt.c
trunk/pub/libvex_ir.h
Modified: trunk/priv/guest-ppc/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc/toIR.c 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/priv/guest-ppc/toIR.c 2006-02-08 19:30:46 UTC (rev 1573)
@@ -64,8 +64,6 @@
- Floating Point:
- All exceptions disabled in FPSCR
- condition codes not set in FPSCR
- - some error in accuracy
- - flt->int conversions are dubious in overflow cases
=20
- Altivec floating point:
- vmaddfp, vnmsubfp
@@ -483,17 +481,17 @@
return IRExpr_Triop(op, a1, a2, a3);
}
=20
+static IRExpr* qop ( IROp op, IRExpr* a1, IRExpr* a2,=20
+ IRExpr* a3, IRExpr* a4 )
+{
+ return IRExpr_Qop(op, a1, a2, a3, a4);
+}
+
static IRExpr* mkexpr ( IRTemp tmp )
{
return IRExpr_Tmp(tmp);
}
=20
-//uu static IRExpr* mkU1 ( UInt i )
-//uu {
-//uu vassert(i < 2);
-//uu return IRExpr_Const(IRConst_U1( toBool(i) ));
-//uu }
-
static IRExpr* mkU8 ( UChar i )
{
return IRExpr_Const(IRConst_U8(i));
@@ -6064,39 +6062,31 @@
case 0x1C: // fmsubs (Floating Mult-Subtr Single, PPC32 p412)
DIP("fmsubs%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
- assign( frD, triop( Iop_SubF64r32, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) ));
+ assign( frD, qop( Iop_MSubF64r32, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) ));
break;
=20
case 0x1D: // fmadds (Floating Mult-Add Single, PPC32 p409)
DIP("fmadds%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
- assign( frD, triop( Iop_AddF64r32, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) ));
+ assign( frD, qop( Iop_MAddF64r32, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) ));
break;
=20
case 0x1E: // fnmsubs (Float Neg Mult-Subtr Single, PPC32 p420)
DIP("fnmsubs%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
assign( frD, unop( Iop_NegF64,
- triop( Iop_SubF64r32, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) )));
+ qop( Iop_MSubF64r32, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) )));
break;
=20
case 0x1F: // fnmadds (Floating Negative Multiply-Add Single, PPC3=
2 p418)
DIP("fnmadds%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
assign( frD, unop( Iop_NegF64,
- triop( Iop_AddF64r32, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) )));
+ qop( Iop_MAddF64r32, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) )));
break;
=20
default:
@@ -6110,39 +6100,31 @@
case 0x1C: // fmsub (Float Mult-Sub (Dbl Precision), PPC32 p411)
DIP("fmsub%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
- assign( frD, triop( Iop_SubF64, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) ));
+ assign( frD, qop( Iop_MSubF64, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) ));
break;
=20
case 0x1D: // fmadd (Float Mult-Add (Dbl Precision), PPC32 p408)
DIP("fmadd%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
- assign( frD, triop( Iop_AddF64, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) ));
+ assign( frD, qop( Iop_MAddF64, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) ));
break;
=20
case 0x1E: // fnmsub (Float Neg Mult-Subtr (Dbl Precision), PPC32 =
p419)
DIP("fnmsub%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
assign( frD, unop( Iop_NegF64,
- triop( Iop_SubF64, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) )));
+ qop( Iop_MSubF64, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) )));
break;
=20
case 0x1F: // fnmadd (Float Neg Mult-Add (Dbl Precision), PPC32 p4=
17)
DIP("fnmadd%s fr%u,fr%u,fr%u,fr%u\n", flag_rC ? ".":"",
frD_addr, frA_addr, frC_addr, frB_addr);
assign( frD, unop( Iop_NegF64,
- triop( Iop_AddF64, rm,
- triop( Iop_MulF64, rm, mkexpr(frA),
- mkexpr(frC) ),
- mkexpr(frB) )));
+ qop( Iop_MAddF64, rm,
+ mkexpr(frA), mkexpr(frC), mkexpr(frB) )));
break;
=20
default:
Modified: trunk/priv/host-generic/h_generic_regs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-generic/h_generic_regs.h 2006-02-07 20:55:08 UTC (rev=
1572)
+++ trunk/priv/host-generic/h_generic_regs.h 2006-02-08 19:30:46 UTC (rev=
1573)
@@ -188,7 +188,7 @@
This is precisely the behaviour that the register allocator needs
to impose its decisions on the instructions it processes. */
=20
-#define N_HREG_REMAP 4
+#define N_HREG_REMAP 5
=20
typedef
struct {
Modified: trunk/priv/host-ppc/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/hdefs.c 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/priv/host-ppc/hdefs.c 2006-02-08 19:30:46 UTC (rev 1573)
@@ -616,6 +616,10 @@
case Pfp_SUBD: return "fsub";
case Pfp_MULD: return "fmul";
case Pfp_DIVD: return "fdiv";
+ case Pfp_MADDD: return "fmadd";
+ case Pfp_MSUBD: return "fmsub";
+ case Pfp_MADDS: return "fmadds";
+ case Pfp_MSUBS: return "fmsubs";
case Pfp_ADDS: return "fadds";
case Pfp_SUBS: return "fsubs";
case Pfp_MULS: return "fmuls";
@@ -905,6 +909,18 @@
i->Pin.FpBinary.srcR =3D srcR;
return i;
}
+PPCInstr* PPCInstr_FpMulAcc ( PPCFpOp op, HReg dst, HReg srcML,=20
+ HReg srcMR, HReg srcAcc )
+{
+ PPCInstr* i =3D LibVEX_Alloc(sizeof(PPCInstr));
+ i->tag =3D Pin_FpMulAcc;
+ i->Pin.FpMulAcc.op =3D op;
+ i->Pin.FpMulAcc.dst =3D dst;
+ i->Pin.FpMulAcc.srcML =3D srcML;
+ i->Pin.FpMulAcc.srcMR =3D srcMR;
+ i->Pin.FpMulAcc.srcAcc =3D srcAcc;
+ return i;
+}
PPCInstr* PPCInstr_FpLdSt ( Bool isLoad, UChar sz,
HReg reg, PPCAMode* addr ) {
PPCInstr* i =3D LibVEX_Alloc(sizeof(PPCInstr));
@@ -1400,6 +1416,16 @@
vex_printf(",");
ppHRegPPC(i->Pin.FpBinary.srcR);
return;
+ case Pin_FpMulAcc:
+ vex_printf("%s ", showPPCFpOp(i->Pin.FpMulAcc.op));
+ ppHRegPPC(i->Pin.FpMulAcc.dst);
+ vex_printf(",");
+ ppHRegPPC(i->Pin.FpMulAcc.srcML);
+ vex_printf(",");
+ ppHRegPPC(i->Pin.FpMulAcc.srcMR);
+ vex_printf(",");
+ ppHRegPPC(i->Pin.FpMulAcc.srcAcc);
+ return;
case Pin_FpLdSt: {
UChar sz =3D i->Pin.FpLdSt.sz;
Bool idxd =3D toBool(i->Pin.FpLdSt.addr->tag =3D=3D Pam_RR);
@@ -1774,6 +1800,12 @@
addHRegUse(u, HRmRead, i->Pin.FpBinary.srcL);
addHRegUse(u, HRmRead, i->Pin.FpBinary.srcR);
return;
+ case Pin_FpMulAcc:
+ addHRegUse(u, HRmWrite, i->Pin.FpMulAcc.dst);
+ addHRegUse(u, HRmRead, i->Pin.FpMulAcc.srcML);
+ addHRegUse(u, HRmRead, i->Pin.FpMulAcc.srcMR);
+ addHRegUse(u, HRmRead, i->Pin.FpMulAcc.srcAcc);
+ return;
case Pin_FpLdSt:
addHRegUse(u, (i->Pin.FpLdSt.isLoad ? HRmWrite : HRmRead),
i->Pin.FpLdSt.reg);
@@ -1973,6 +2005,12 @@
mapReg(m, &i->Pin.FpBinary.srcL);
mapReg(m, &i->Pin.FpBinary.srcR);
return;
+ case Pin_FpMulAcc:
+ mapReg(m, &i->Pin.FpMulAcc.dst);
+ mapReg(m, &i->Pin.FpMulAcc.srcML);
+ mapReg(m, &i->Pin.FpMulAcc.srcMR);
+ mapReg(m, &i->Pin.FpMulAcc.srcAcc);
+ return;
case Pin_FpLdSt:
mapReg(m, &i->Pin.FpLdSt.reg);
mapRegs_PPCAMode(m, i->Pin.FpLdSt.addr);
@@ -3190,6 +3228,30 @@
goto done;
}
=20
+ case Pin_FpMulAcc: {
+ UInt fr_dst =3D fregNo(i->Pin.FpMulAcc.dst);
+ UInt fr_srcML =3D fregNo(i->Pin.FpMulAcc.srcML);
+ UInt fr_srcMR =3D fregNo(i->Pin.FpMulAcc.srcMR);
+ UInt fr_srcAcc =3D fregNo(i->Pin.FpMulAcc.srcAcc);
+ switch (i->Pin.FpMulAcc.op) {
+ case Pfp_MADDD: // fmadd, PPC32 p408
+ p =3D mkFormA( p, 63, fr_dst, fr_srcML, fr_srcAcc, fr_srcMR, 29=
, 0 );
+ break;
+ case Pfp_MADDS: // fmadds, PPC32 p409
+ p =3D mkFormA( p, 59, fr_dst, fr_srcML, fr_srcAcc, fr_srcMR, 29=
, 0 );
+ break;
+ case Pfp_MSUBD: // fmsub, PPC32 p411
+ p =3D mkFormA( p, 63, fr_dst, fr_srcML, fr_srcAcc, fr_srcMR, 28=
, 0 );
+ break;
+ case Pfp_MSUBS: // fmsubs, PPC32 p412
+ p =3D mkFormA( p, 59, fr_dst, fr_srcML, fr_srcAcc, fr_srcMR, 28=
, 0 );
+ break;
+ default:
+ goto bad;
+ }
+ goto done;
+ }
+
case Pin_FpLdSt: {
PPCAMode* am_addr =3D i->Pin.FpLdSt.addr;
UInt f_reg =3D fregNo(i->Pin.FpLdSt.reg);
Modified: trunk/priv/host-ppc/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/hdefs.h 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/priv/host-ppc/hdefs.h 2006-02-08 19:30:46 UTC (rev 1573)
@@ -367,6 +367,11 @@
typedef
enum {
Pfp_INVALID,
+
+ /* Ternary */
+ Pfp_MADDD, Pfp_MSUBD,=20
+ Pfp_MADDS, Pfp_MSUBS,
+
/* Binary */
Pfp_ADDD, Pfp_SUBD, Pfp_MULD, Pfp_DIVD,=20
Pfp_ADDS, Pfp_SUBS, Pfp_MULS, Pfp_DIVS,=20
@@ -460,6 +465,7 @@
=20
Pin_FpUnary, /* FP unary op */
Pin_FpBinary, /* FP binary op */
+ Pin_FpMulAcc, /* FP multipy-accumulate style op */
Pin_FpLdSt, /* FP load/store */
Pin_FpSTFIW, /* stfiwx */
Pin_FpRSP, /* FP round IEEE754 double to IEEE754 single */
@@ -631,6 +637,13 @@
HReg srcR;
} FpBinary;
struct {
+ PPCFpOp op;
+ HReg dst;
+ HReg srcML;
+ HReg srcMR;
+ HReg srcAcc;
+ } FpMulAcc;
+ struct {
Bool isLoad;
UChar sz; /* only 4 (IEEE single) or 8 (IEEE double) */
HReg reg;
@@ -785,6 +798,8 @@
=20
extern PPCInstr* PPCInstr_FpUnary ( PPCFpOp op, HReg dst, HReg src );
extern PPCInstr* PPCInstr_FpBinary ( PPCFpOp op, HReg dst, HReg srcL, =
HReg srcR );
+extern PPCInstr* PPCInstr_FpMulAcc ( PPCFpOp op, HReg dst, HReg srcML,=
=20
+ HReg srcMR, HReg srcA=
cc );
extern PPCInstr* PPCInstr_FpLdSt ( Bool isLoad, UChar sz, HReg, PPCA=
Mode* );
extern PPCInstr* PPCInstr_FpSTFIW ( HReg addr, HReg data );
extern PPCInstr* PPCInstr_FpRSP ( HReg dst, HReg src );
Modified: trunk/priv/host-ppc/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc/isel.c 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/priv/host-ppc/isel.c 2006-02-08 19:30:46 UTC (rev 1573)
@@ -2932,6 +2932,7 @@
}
}
=20
+ /* --------- LOAD --------- */
if (e->tag =3D=3D Iex_Load && e->Iex.Load.end =3D=3D Iend_BE) {
HReg r_dst =3D newVRegF(env);
PPCAMode* am_addr;
@@ -2941,6 +2942,7 @@
return r_dst;
}
=20
+ /* --------- GET --------- */
if (e->tag =3D=3D Iex_Get) {
HReg r_dst =3D newVRegF(env);
PPCAMode* am_addr =3D PPCAMode_IR( e->Iex.Get.offset,
@@ -2949,6 +2951,28 @@
return r_dst;
}
=20
+ /* --------- OPS --------- */
+ if (e->tag =3D=3D Iex_Qop) {
+ PPCFpOp fpop =3D Pfp_INVALID;
+ switch (e->Iex.Qop.op) {
+ case Iop_MAddF64: fpop =3D Pfp_MADDD; break;
+ case Iop_MAddF64r32: fpop =3D Pfp_MADDS; break;
+ case Iop_MSubF64: fpop =3D Pfp_MSUBD; break;
+ case Iop_MSubF64r32: fpop =3D Pfp_MSUBS; break;
+ default: break;
+ }
+ if (fpop !=3D Pfp_INVALID) {
+ HReg r_dst =3D newVRegF(env);
+ HReg r_srcML =3D iselDblExpr(env, e->Iex.Qop.arg2);
+ HReg r_srcMR =3D iselDblExpr(env, e->Iex.Qop.arg3);
+ HReg r_srcAcc =3D iselDblExpr(env, e->Iex.Qop.arg4);
+ set_FPU_rounding_mode( env, e->Iex.Qop.arg1 );
+ addInstr(env, PPCInstr_FpMulAcc(fpop, r_dst,=20
+ r_srcML, r_srcMR, r_srcAc=
c));
+ return r_dst;
+ }
+ }
+
if (e->tag =3D=3D Iex_Triop) {
PPCFpOp fpop =3D Pfp_INVALID;
switch (e->Iex.Triop.op) {
Modified: trunk/priv/ir/irdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/ir/irdefs.c 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/priv/ir/irdefs.c 2006-02-08 19:30:46 UTC (rev 1573)
@@ -267,8 +267,14 @@
case Iop_TanF64: vex_printf("TanF64"); return;
case Iop_2xm1F64: vex_printf("2xm1F64"); return;
=20
- case Iop_Est5FRSqrt: vex_printf("Est5FRSqrt"); return;
+ case Iop_MAddF64: vex_printf("MAddF64"); return;
+ case Iop_MSubF64: vex_printf("MSubF64"); return;
+ case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
+ case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
+
+ case Iop_Est5FRSqrt: vex_printf("Est5FRSqrt"); return;
case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
+ case Iop_CalcFPRF: vex_printf("CalcFPRF");
=20
case Iop_CmpF64: vex_printf("CmpF64"); return;
=20
@@ -584,6 +590,18 @@
case Iex_Tmp:
ppIRTemp(e->Iex.Tmp.tmp);
break;
+ case Iex_Qop:
+ ppIROp(e->Iex.Qop.op);
+ vex_printf( "(" );
+ ppIRExpr(e->Iex.Qop.arg1);
+ vex_printf( "," );
+ ppIRExpr(e->Iex.Qop.arg2);
+ vex_printf( "," );
+ ppIRExpr(e->Iex.Qop.arg3);
+ vex_printf( "," );
+ ppIRExpr(e->Iex.Qop.arg4);
+ vex_printf( ")" );
+ break;
case Iex_Triop:
ppIROp(e->Iex.Triop.op);
vex_printf( "(" );
@@ -935,6 +953,17 @@
e->Iex.Tmp.tmp =3D tmp;
return e;
}
+IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,=20
+ IRExpr* arg3, IRExpr* arg4 ) {
+ IRExpr* e =3D LibVEX_Alloc(sizeof(IRExpr));
+ e->tag =3D Iex_Qop;
+ e->Iex.Qop.op =3D op;
+ e->Iex.Qop.arg1 =3D arg1;
+ e->Iex.Qop.arg2 =3D arg2;
+ e->Iex.Qop.arg3 =3D arg3;
+ e->Iex.Qop.arg4 =3D arg4;
+ return e;
+}
IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1,=20
IRExpr* arg2, IRExpr* arg3 ) {
IRExpr* e =3D LibVEX_Alloc(sizeof(IRExpr));
@@ -1368,7 +1397,8 @@
void typeOfPrimop ( IROp op,=20
/*OUTs*/
IRType* t_dst,=20
- IRType* t_arg1, IRType* t_arg2, IRType* t_arg3 )
+ IRType* t_arg1, IRType* t_arg2,=20
+ IRType* t_arg3, IRType* t_arg4 )
{
# define UNARY(_ta1,_td) \
*t_dst =3D (_td); *t_arg1 =3D (_ta1); break
@@ -1377,6 +1407,10 @@
# define TERNARY(_ta1,_ta2,_ta3,_td) \
*t_dst =3D (_td); *t_arg1 =3D (_ta1); \
*t_arg2 =3D (_ta2); *t_arg3 =3D (_ta3); break
+# define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td) \
+ *t_dst =3D (_td); *t_arg1 =3D (_ta1); \
+ *t_arg2 =3D (_ta2); *t_arg3 =3D (_ta3); \
+ *t_arg4 =3D (_ta4); break
# define COMPARISON(_ta) \
*t_dst =3D Ity_I1; *t_arg1 =3D *t_arg2 =3D (_ta); break;
# define UNARY_COMPARISON(_ta) \
@@ -1390,6 +1424,7 @@
*t_arg1 =3D Ity_INVALID;
*t_arg2 =3D Ity_INVALID;
*t_arg3 =3D Ity_INVALID;
+ *t_arg4 =3D Ity_INVALID;
switch (op) {
case Iop_Add8: case Iop_Sub8: case Iop_Mul8:=20
case Iop_Or8: case Iop_And8: case Iop_Xor8:
@@ -1593,6 +1628,10 @@
case Iop_2xm1F64:
case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64);
=20
+ case Iop_MAddF64: case Iop_MSubF64:
+ case Iop_MAddF64r32: case Iop_MSubF64r32:
+ QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64);
+
case Iop_Est5FRSqrt:
UNARY(Ity_F64, Ity_F64);
case Iop_RoundF64toF32:
@@ -1794,7 +1833,7 @@
=20
IRType typeOfIRExpr ( IRTypeEnv* tyenv, IRExpr* e )
{
- IRType t_dst, t_arg1, t_arg2, t_arg3;
+ IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
start:
switch (e->tag) {
case Iex_Load:
@@ -1807,14 +1846,21 @@
return typeOfIRTemp(tyenv, e->Iex.Tmp.tmp);
case Iex_Const:
return typeOfIRConst(e->Iex.Const.con);
+ case Iex_Qop:
+ typeOfPrimop(e->Iex.Qop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
+ return t_dst;
case Iex_Triop:
- typeOfPrimop(e->Iex.Triop.op, &t_dst, &t_arg1, &t_arg2, &t_arg3=
);
+ typeOfPrimop(e->Iex.Triop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
return t_dst;
case Iex_Binop:
- typeOfPrimop(e->Iex.Binop.op, &t_dst, &t_arg1, &t_arg2, &t_arg3=
);
+ typeOfPrimop(e->Iex.Binop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
return t_dst;
case Iex_Unop:
- typeOfPrimop(e->Iex.Unop.op, &t_dst, &t_arg1, &t_arg2, &t_arg3)=
;
+ typeOfPrimop(e->Iex.Unop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
return t_dst;
case Iex_CCall:
return e->Iex.CCall.retty;
@@ -1884,6 +1930,11 @@
case Iex_Get: return True;
case Iex_GetI: return isIRAtom(e->Iex.GetI.ix);
case Iex_Tmp: return True;
+ case Iex_Qop: return toBool(
+ isIRAtom(e->Iex.Qop.arg1)=20
+ && isIRAtom(e->Iex.Qop.arg2)
+ && isIRAtom(e->Iex.Qop.arg3)
+ && isIRAtom(e->Iex.Qop.arg4));
case Iex_Triop: return toBool(
isIRAtom(e->Iex.Triop.arg1)=20
&& isIRAtom(e->Iex.Triop.arg2)
@@ -2026,6 +2077,12 @@
case Iex_Tmp:
useBeforeDef_Temp(bb,stmt,expr->Iex.Tmp.tmp,def_counts);
break;
+ case Iex_Qop:
+ useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg1,def_counts);
+ useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg2,def_counts);
+ useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg3,def_counts);
+ useBeforeDef_Expr(bb,stmt,expr->Iex.Qop.arg4,def_counts);
+ break;
case Iex_Triop:
useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg1,def_counts);
useBeforeDef_Expr(bb,stmt,expr->Iex.Triop.arg2,def_counts);
@@ -2104,7 +2161,7 @@
void tcExpr ( IRBB* bb, IRStmt* stmt, IRExpr* expr, IRType gWordTy )
{
Int i;
- IRType t_dst, t_arg1, t_arg2, t_arg3;
+ IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
IRTypeEnv* tyenv =3D bb->tyenv;
switch (expr->tag) {
case Iex_Get:
@@ -2117,14 +2174,66 @@
if (!saneIRArray(expr->Iex.GetI.descr))
sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr");
break;
+ case Iex_Qop: {
+ IRType ttarg1, ttarg2, ttarg3, ttarg4;
+ tcExpr(bb,stmt, expr->Iex.Qop.arg1, gWordTy );
+ tcExpr(bb,stmt, expr->Iex.Qop.arg2, gWordTy );
+ tcExpr(bb,stmt, expr->Iex.Qop.arg3, gWordTy );
+ tcExpr(bb,stmt, expr->Iex.Qop.arg4, gWordTy );
+ typeOfPrimop(expr->Iex.Qop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
+ if (t_arg1 =3D=3D Ity_INVALID || t_arg2 =3D=3D Ity_INVALID=20
+ || t_arg3 =3D=3D Ity_INVALID || t_arg4 =3D=3D Ity_INVALID) =
{
+ vex_printf(" op name: " );
+ ppIROp(expr->Iex.Qop.op);
+ vex_printf("\n");
+ sanityCheckFail(bb,stmt,
+ "Iex.Qop: wrong arity op\n"
+ "... name of op precedes BB printout\n");
+ }
+ ttarg1 =3D typeOfIRExpr(tyenv, expr->Iex.Qop.arg1);
+ ttarg2 =3D typeOfIRExpr(tyenv, expr->Iex.Qop.arg2);
+ ttarg3 =3D typeOfIRExpr(tyenv, expr->Iex.Qop.arg3);
+ ttarg4 =3D typeOfIRExpr(tyenv, expr->Iex.Qop.arg4);
+ if (t_arg1 !=3D ttarg1 || t_arg2 !=3D ttarg2=20
+ || t_arg3 !=3D ttarg3 || t_arg4 !=3D ttarg4) {
+ vex_printf(" op name: ");
+ ppIROp(expr->Iex.Qop.op);
+ vex_printf("\n");
+ vex_printf(" op type is (");
+ ppIRType(t_arg1);
+ vex_printf(",");
+ ppIRType(t_arg2);
+ vex_printf(",");
+ ppIRType(t_arg3);
+ vex_printf(",");
+ ppIRType(t_arg4);
+ vex_printf(") -> ");
+ ppIRType (t_dst);
+ vex_printf("\narg tys are (");
+ ppIRType(ttarg1);
+ vex_printf(",");
+ ppIRType(ttarg2);
+ vex_printf(",");
+ ppIRType(ttarg3);
+ vex_printf(",");
+ ppIRType(ttarg4);
+ vex_printf(")\n");
+ sanityCheckFail(bb,stmt,
+ "Iex.Qop: arg tys don't match op tys\n"
+ "... additional details precede BB printout\n");
+ }
+ break;
+ }
case Iex_Triop: {
IRType ttarg1, ttarg2, ttarg3;
tcExpr(bb,stmt, expr->Iex.Triop.arg1, gWordTy );
tcExpr(bb,stmt, expr->Iex.Triop.arg2, gWordTy );
tcExpr(bb,stmt, expr->Iex.Triop.arg3, gWordTy );
- typeOfPrimop(expr->Iex.Triop.op, &t_dst, &t_arg1, &t_arg2, &t_a=
rg3);
+ typeOfPrimop(expr->Iex.Triop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
if (t_arg1 =3D=3D Ity_INVALID || t_arg2 =3D=3D Ity_INVALID=20
- || t_arg3 =3D=3D Ity_INVALID) {
+ || t_arg3 =3D=3D Ity_INVALID || t_arg4 !=3D Ity_INVALID) {
vex_printf(" op name: " );
ppIROp(expr->Iex.Triop.op);
vex_printf("\n");
@@ -2164,9 +2273,10 @@
IRType ttarg1, ttarg2;
tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy );
tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy );
- typeOfPrimop(expr->Iex.Binop.op, &t_dst, &t_arg1, &t_arg2, &t_a=
rg3);
+ typeOfPrimop(expr->Iex.Binop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
if (t_arg1 =3D=3D Ity_INVALID || t_arg2 =3D=3D Ity_INVALID=20
- || t_arg3 !=3D Ity_INVALID) {
+ || t_arg3 !=3D Ity_INVALID || t_arg4 !=3D Ity_INVALID) {
vex_printf(" op name: " );
ppIROp(expr->Iex.Binop.op);
vex_printf("\n");
@@ -2199,9 +2309,10 @@
}
case Iex_Unop:
tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy );
- typeOfPrimop(expr->Iex.Binop.op, &t_dst, &t_arg1, &t_arg2, &t_a=
rg3);
+ typeOfPrimop(expr->Iex.Binop.op,=20
+ &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
if (t_arg1 =3D=3D Ity_INVALID || t_arg2 !=3D Ity_INVALID
- || t_arg3 !=3D Ity_INVALID)
+ || t_arg3 !=3D Ity_INVALID || t_arg4 !=3D Ity_INVALID)
sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op");
if (t_arg1 !=3D typeOfIRExpr(tyenv, expr->Iex.Unop.arg))
sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op t=
y");
Modified: trunk/priv/ir/iropt.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/ir/iropt.c 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/priv/ir/iropt.c 2006-02-08 19:30:46 UTC (rev 1573)
@@ -297,6 +297,16 @@
IRStmt_Tmp(t1, ex));
return IRExpr_Tmp(t1);
=20
+ case Iex_Qop:
+ t1 =3D newIRTemp(bb->tyenv, ty);
+ addStmtToIRBB(bb, IRStmt_Tmp(t1,=20
+ IRExpr_Qop(ex->Iex.Qop.op,
+ flatten_Expr(bb, ex->Iex.Qop.arg1),
+ flatten_Expr(bb, ex->Iex.Qop.arg2),
+ flatten_Expr(bb, ex->Iex.Qop.arg3),
+ flatten_Expr(bb, ex->Iex.Qop.arg4))));
+ return IRExpr_Tmp(t1);
+
case Iex_Triop:
t1 =3D newIRTemp(bb->tyenv, ty);
addStmtToIRBB(bb, IRStmt_Tmp(t1,=20
@@ -1524,6 +1534,19 @@
ex->Iex.GetI.bias
);
=20
+ case Iex_Qop:
+ vassert(isIRAtom(ex->Iex.Qop.arg1));
+ vassert(isIRAtom(ex->Iex.Qop.arg2));
+ vassert(isIRAtom(ex->Iex.Qop.arg3));
+ vassert(isIRAtom(ex->Iex.Qop.arg4));
+ return IRExpr_Qop(
+ ex->Iex.Qop.op,
+ subst_Expr(env, ex->Iex.Qop.arg1),
+ subst_Expr(env, ex->Iex.Qop.arg2),
+ subst_Expr(env, ex->Iex.Qop.arg3),
+ subst_Expr(env, ex->Iex.Qop.arg4)
+ );
+
case Iex_Triop:
vassert(isIRAtom(ex->Iex.Triop.arg1));
vassert(isIRAtom(ex->Iex.Triop.arg2));
@@ -1814,6 +1837,12 @@
case Iex_Load:
addUses_Expr(set, e->Iex.Load.addr);
return;
+ case Iex_Qop:
+ addUses_Expr(set, e->Iex.Qop.arg1);
+ addUses_Expr(set, e->Iex.Qop.arg2);
+ addUses_Expr(set, e->Iex.Qop.arg3);
+ addUses_Expr(set, e->Iex.Qop.arg4);
+ return;
case Iex_Triop:
addUses_Expr(set, e->Iex.Triop.arg1);
addUses_Expr(set, e->Iex.Triop.arg2);
@@ -3432,6 +3461,12 @@
setHints_Expr(doesLoad, doesGet, e->Iex.Mux0X.expr0);
setHints_Expr(doesLoad, doesGet, e->Iex.Mux0X.exprX);
return;
+ case Iex_Qop:
+ setHints_Expr(doesLoad, doesGet, e->Iex.Qop.arg1);
+ setHints_Expr(doesLoad, doesGet, e->Iex.Qop.arg2);
+ setHints_Expr(doesLoad, doesGet, e->Iex.Qop.arg3);
+ setHints_Expr(doesLoad, doesGet, e->Iex.Qop.arg4);
+ return;
case Iex_Triop:
setHints_Expr(doesLoad, doesGet, e->Iex.Triop.arg1);
setHints_Expr(doesLoad, doesGet, e->Iex.Triop.arg2);
@@ -3499,6 +3534,13 @@
aoccCount_Expr(uses, e->Iex.Mux0X.exprX);
return;
=20
+ case Iex_Qop:=20
+ aoccCount_Expr(uses, e->Iex.Qop.arg1);
+ aoccCount_Expr(uses, e->Iex.Qop.arg2);
+ aoccCount_Expr(uses, e->Iex.Qop.arg3);
+ aoccCount_Expr(uses, e->Iex.Qop.arg4);
+ return;
+
case Iex_Triop:=20
aoccCount_Expr(uses, e->Iex.Triop.arg1);
aoccCount_Expr(uses, e->Iex.Triop.arg2);
@@ -3634,6 +3676,14 @@
atbSubst_Expr(env, e->Iex.Mux0X.expr0),
atbSubst_Expr(env, e->Iex.Mux0X.exprX)
);
+ case Iex_Qop:
+ return IRExpr_Qop(
+ e->Iex.Qop.op,
+ atbSubst_Expr(env, e->Iex.Qop.arg1),
+ atbSubst_Expr(env, e->Iex.Qop.arg2),
+ atbSubst_Expr(env, e->Iex.Qop.arg3),
+ atbSubst_Expr(env, e->Iex.Qop.arg4)
+ );
case Iex_Triop:
return IRExpr_Triop(
e->Iex.Triop.op,
Modified: trunk/pub/libvex_ir.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_ir.h 2006-02-07 20:55:08 UTC (rev 1572)
+++ trunk/pub/libvex_ir.h 2006-02-08 19:30:46 UTC (rev 1573)
@@ -217,7 +217,7 @@
#define IRTemp_INVALID ((IRTemp)0xFFFFFFFF)
=20
=20
-/* ------------------ Binary and unary ops ------------------ */
+/* --------------- Primops (arity 1,2,3 and 4) --------------- */
=20
typedef
enum {=20
@@ -432,6 +432,18 @@
=20
/* --- guest ppc32/64 specifics, not mandated by 754. --- */
=20
+ /* Ternary operations, with rounding. */
+ /* Fused multiply-add/sub, with 112-bit intermediate
+ precision */
+ /* :: IRRoundingMode(I32) x F64 x F64 x F64 -> F64=20
+ (computes arg2 * arg3 +/- arg4) */=20
+ Iop_MAddF64, Iop_MSubF64,
+
+ /* Variants of the above which produce a 64-bit result but which
+ round their result to a IEEE float range first. */
+ /* :: IRRoundingMode(I32) x F64 x F64 x F64 -> F64 */=20
+ Iop_MAddF64r32, Iop_MSubF64r32,
+
/* :: F64 -> F64 */
Iop_Est5FRSqrt, /* reciprocal square root estimate, 5 good bits=
*/
=20
@@ -760,6 +772,7 @@
Iex_Get, /* read guest state, fixed offset */
Iex_GetI, /* read guest state, run-time offset */
Iex_Tmp, /* value of temporary */
+ Iex_Qop, /* quaternary operation */
Iex_Triop, /* ternary operation */
Iex_Binop, /* binary operation */
Iex_Unop, /* unary operation */
@@ -794,6 +807,13 @@
struct _IRExpr* arg1;
struct _IRExpr* arg2;
struct _IRExpr* arg3;
+ struct _IRExpr* arg4;
+ } Qop;
+ struct {
+ IROp op;
+ struct _IRExpr* arg1;
+ struct _IRExpr* arg2;
+ struct _IRExpr* arg3;
} Triop;
struct {
IROp op;
@@ -830,6 +850,8 @@
extern IRExpr* IRExpr_Get ( Int off, IRType ty );
extern IRExpr* IRExpr_GetI ( IRArray* descr, IRExpr* ix, Int bias );
extern IRExpr* IRExpr_Tmp ( IRTemp tmp );
+extern IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,=20
+ IRExpr* arg3, IRExpr* arg4 );
extern IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1,=20
IRExpr* arg2, IRExpr* arg3 );
extern IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 );
|
|
From: Dave N. <dc...@us...> - 2006-02-08 19:13:41
|
I sent a message about an assembler error in helgrind/tests/allok.c back
in January. It appears that gcc is having problems with -gstab. Julian
acknowledged that this is a problem. Would it be possible to remove
this test (until the problem is fixed) from the build of helgrind? This
is preventing me from using nightly builds.
I suspect that I am going to have similar problems using the nightly
builds on the PPC970 where I reported a problem I am seeing having to do
with suppression that I need:
index-not-intercepted-early-enough-HACK-4
See end of 3_1_BUGSTATUS.txt.
-------- Original Message --------
Subject: Re: [Valgrind-developers] ppc64-linux coming to life
Date: Wed, 18 Jan 2006 15:41:34 -0800
From: Dave Nomura <dc...@us...>
To: val...@li...
CC: Julian Seward <js...@ac...>
References: <200...@ac...>
<43C...@us...> <200...@ac...>
I am able to compile with the simple gcc invocation that you've given
below. I did some experimentation with the gcc invocation generated by
make and it appears that it is the -gstabs that causes the problem.
The assembler file around line 285 looks like:280 .long 0
281 .byte 0,0,0,1,128,1,0,1
282 .size main,.-.L.main
283 .stabs "a:(10,20)",128,0,0,112
284 .stabs "b:(10,20)",128,0,0,120
285 .stabn 192,0,0,main-.L.main
286 .stabn 224,0,0,.Lscope1-.L.main
If I compare this to the same test program built in the 3.1.0 ppc32
valgrind it looks like:
256 .size main, .-main
257 .stabs "a:(10,20)",128,0,0,8
258 .stabs "b:(10,20)",128,0,0,12
259 .stabn 192,0,0,main-main
260 .stabn 224,0,0,.Lscope1-main
I don't know enough about the assembler to know what this gibberish
means but the assembler seems to be complaining about
"main-.L.main" vs "main-main"
gcc -v gives me the following information about the assembler invocation:
GNU C version 3.4.3 20050227 (Red Hat 3.4.3-22.1) (ppc64-redhat-linux)
compiled by GNU C version 3.4.3 20050227 (Red Hat 3.4.3-22.1).
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
as -a64 -mppc64 -many -V -Qy -o allok.o /tmp/ccIKMQIP.s
GNU assembler version 2.15.92.0.2 (ppc-redhat-linux) using BFD version
2.15.92.0.2 20040927
/tmp/ccIKMQIP.s: Assembler messages:
/tmp/ccIKMQIP.s:285: Error: can't resolve `main' {.opd section} -
`.L.main' {.text section}
/tmp/ccIKMQIP.s:285: Error: expression too complex
Julian Seward wrote:
>>and I get the following errors building the test programs in
>>helgrind/tests. Should these tests compile cleanly?
>>
>>make allok deadlock inherit race race2 readshared
>>make[1]: Entering directory `/home/dcn/svn/1-18/helgrind/tests'
>>if gcc -DHAVE_CONFIG_H -I. -I. -I../.. -Winline -Wall -Wshadow
>>-gstabs -m64 -Wno-long-long -Wdeclaration-after-statement -MT allok.o
>>-MD -MP -MF ".deps/allok.Tpo" -c -o allok.o allok.c; \
>>then mv -f ".deps/allok.Tpo" ".deps/allok.Po"; else rm -f
>>".deps/allok.Tpo"; exit 1; fi
>>/tmp/ccYznKU9.s: Assembler messages:
>>/tmp/ccYznKU9.s:285: Error: can't resolve `main' {.opd section} -
>>`.L.main' {.text section}
>
>
> They should compile cleanly and indeed they have on our 970.
>
> helgrind/allok.c is a completely vanilla small pthreads program.
> Are you able to compile it by hand (gcc -m64 -o allok allok.c -lpthread) ?
>
> J
>
>
>
> -------------------------------------------------------
> This SF.net email is sponsored by: Splunk Inc. Do you grep through log files
> for problems? Stop! Download the new AJAX search engine that makes
> searching your log files as easy as surfing the web. DOWNLOAD SPLUNK!
> http://sel.as-us.falkag.net/sel?cmd=lnk&kid=103432&bid=230486&dat=121642
> _______________________________________________
> Valgrind-developers mailing list
> Val...@li...
> https://lists.sourceforge.net/lists/listinfo/valgrind-developers
>
|
|
From: Dirk M. <dm...@gm...> - 2006-02-08 15:11:45
|
Hi, Its a long time already since 3.1.0 release, how are the plans for a 3.1.1 release? Dirk |
|
From: <js...@ac...> - 2006-02-08 11:33:50
|
Nightly build on minnie ( SuSE 10.0, ppc32 ) started at 2006-02-08 05:00:01 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 192 tests, 11 stderr failures, 5 stdout failures ================= memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/stack_changes (stdout) memcheck/tests/stack_changes (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) none/tests/ppc32/test_fx (stdout) none/tests/ppc32/test_fx (stderr) none/tests/ppc32/test_gx (stdout) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 191 tests, 11 stderr failures, 5 stdout failures ================= memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/stack_changes (stdout) memcheck/tests/stack_changes (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) none/tests/ppc32/test_fx (stdout) none/tests/ppc32/test_fx (stderr) none/tests/ppc32/test_gx (stdout) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Wed Feb 8 05:13:02 2006 --- new.short Wed Feb 8 05:23:59 2006 *************** *** 8,10 **** ! == 191 tests, 11 stderr failures, 5 stdout failures ================= memcheck/tests/leak-cycle (stderr) --- 8,10 ---- ! == 192 tests, 11 stderr failures, 5 stdout failures ================= memcheck/tests/leak-cycle (stderr) |
|
From: <js...@ac...> - 2006-02-08 03:59:06
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2006-02-08 03:30:01 GMT Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 223 tests, 7 stderr failures, 0 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: <js...@ac...> - 2006-02-08 03:57:31
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2006-02-08 04:40:00 CET Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 197 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/pointer-trace (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/mremap (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 195 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/pointer-trace (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/mremap (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Wed Feb 8 04:48:45 2006 --- new.short Wed Feb 8 04:57:25 2006 *************** *** 8,10 **** ! == 195 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-cycle (stderr) --- 8,10 ---- ! == 197 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-cycle (stderr) |
|
From: Tom H. <to...@co...> - 2006-02-08 03:44:24
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2006-02-08 03:30:06 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 225 tests, 8 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-02-08 03:30:58
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2006-02-08 03:15:02 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 224 tests, 21 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) memcheck/tests/badjump (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partial_load_dflt (stderr) memcheck/tests/partial_load_ok (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/stack_changes (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) memcheck/tests/xml1 (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-02-08 03:25:04
|
Nightly build on dellow ( x86_64, Fedora Core 4 ) started at 2006-02-08 03:10:14 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 5 stderr failures, 1 stdout failure ================= memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
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From: Tom H. <th...@cy...> - 2006-02-08 03:20:42
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Nightly build on aston ( x86_64, Fedora Core 3 ) started at 2006-02-08 03:05:11 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
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From: Tom H. <th...@cy...> - 2006-02-08 03:14:08
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Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2006-02-08 03:00:04 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 7 stderr failures, 1 stdout failure ================= memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |