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From: Oswald B. <os...@kd...> - 2006-02-11 23:04:22
|
On Sat, Feb 11, 2006 at 09:59:23PM +0000, Tom Hughes wrote: > Oswald Buddenhagen wrote: > > On Sat, Feb 11, 2006 at 04:26:48PM +0000, sv...@va... wrote: > > > Author: tom Implement the vm86 and vm86old system calls based on a > > > patch from Alper Akcan. Fixes bug #118939. > > > > i wouldn't be *too* surprised if this induced *tons* of false > > positives for some applications. > > Only applications that use it presumably, which is very few. > indeed, i have problems to come up with three of them. i just meant that people who requested this feature *might* be disappointed about its effects. > > i suppose you don't plan to implement instrumentation of 16 bit code > > ... > > I would expect that a reasonably large number of 16 bit instructions > are already implemented anyway. > believe me, it's "slightly" more complicated that this. we are talking about real/v86 mode here - you know, this stuff with 16 bit offset calculations and segment registers on which you can do arithmetic. also, i can't imagine a dynamic translator would have a particular lot of luck dealing with typical DOS code of mine. :) -- Hi! I'm a .signature virus! Copy me into your ~/.signature, please! -- Chaos, panic, and disorder - my work here is done. |
|
From: John R.
|
>> - You then do "stack--", which moves "stack" down one frame unit. Now
>> it overlaps with the kernel-constructed sigframe.
>
> No... the signal handler is called on a different stack than the one the
> thread... (sigaction is called with SA_ONSTACK flag)
The code was not clear enough; it fooled at least a couple analysts.
Add a comment at the receiving end which documents the expectations.
For example:
-----
void handler_new( int signo, siginfo_t* xx, void* uc)
{
ucontext_t* ctx = (ucontext_t*)uc;
printf("in handler2, setting EIP to %p\n", (void*)&diversion);
stack = (struct stack_layout*)ctx->uc_mcontext.gregs[REG_ESP];
stack--; /* push the stack_layout structure */
/* handler_new was established with SA_ONSTACK. So we
are on the alternate stack, while 'stack' points to
the user stack, which the kernel left undisturbed.
*/
-----
--
|
|
From: Tom H. <to...@co...> - 2006-02-11 21:59:37
|
In message <20060211183510.GA11881@ugly.local>
Oswald Buddenhagen <os...@kd...> wrote:
> On Sat, Feb 11, 2006 at 04:26:48PM +0000, sv...@va... wrote:
> > Author: tom
> > Implement the vm86 and vm86old system calls based on a patch
> > from Alper Akcan. Fixes bug #118939.
>
> i wouldn't be *too* surprised if this induced *tons* of false positives
> for some applications. i suppose you don't plan to implement
> instrumentation of 16 bit code ...
Only applications that use it presumably, which is very few.
I would expect that a reasonably large number of 16 bit instructions
are already implemented anyway.
Tom
--
Tom Hughes (to...@co...)
http://www.compton.nu/
|
|
From: Eric P. <eri...@wa...> - 2006-02-11 20:33:28
|
Julian Seward wrote:
>>I slightly changed your test program, to something that's closer to what
>>we do in Wine... and it doesn't work under VG :-(
> Wow. That's a really ugly hack :-)
thanks ;-)
> When you say "valgrind fails", exactly what happens?
test program compiled with the old fashion(linux < 2.4 signal frame)
(NB: using the new rt-signal leads to the same message)
[eric@calliope ~]$ valgrind --tool=none ./vgt
==14133== Nulgrind, a binary JIT-compiler.
==14133== Copyright (C) 2002-2005, and GNU GPL'd, by Nicholas Nethercote.
==14133== Using LibVEX rev 1471, a library for dynamic binary translation.
==14133== Copyright (C) 2004-2005, and GNU GPL'd, by OpenWorks LLP.
==14133== Using valgrind-3.1.0, a dynamic binary instrumentation framework.
==14133== Copyright (C) 2000-2005, and GNU GPL'd, by Julian Seward et al.
==14133== For more details, rerun with: -v
==14133==
before
in handler2, setting EIP to 0x804859e
==14133==
==14133== Process terminating with default action of signal 11 (SIGSEGV)
==14133== Access not within mapped region at address 0xDEADBAC2
==14133== at 0x4063E55: vfprintf (in /lib/tls/libc-2.3.4.so)
==14133== by 0x406C3CF: printf (in /lib/tls/libc-2.3.4.so)
==14133== by 0x80485E1: handler_old (vgt.c:58)
==14133== by 0x40517D7: (within /lib/tls/libc-2.3.4.so)
==14133== by 0x406C3CF: printf (in /lib/tls/libc-2.3.4.so)
==14133== by 0x80485B6: diversion (vgt.c:16)
==14133== by 0xDEADBABD: ???
==14133== by 0x403EE4A: __libc_start_main (in /lib/tls/libc-2.3.4.so)
--14133-- INTERNAL ERROR: Valgrind received a signal 11 (SIGSEGV) - exiting
--14133-- si_code=1; Faulting address: 0xDEADBAB6; sp: 0x62511898
valgrind: the 'impossible' happened:
Killed by fatal signal
==14133== at 0xB0005F4D: vgPlain_arena_free (m_mallocfree.c:181)
==14133== by 0xB0033DC5: free_LDT_or_GDT (syswrap-x86-linux.c:448)
==14133== by 0xB0033EEF: deallocate_LGDTs_for_thread
(syswrap-x86-linux.c:489)
==14133== by 0xB003434C: vgPlain_cleanup_thread (syswrap-x86-linux.c:711)
==14133== by 0xB001C48E: mostly_clear_thread_record (scheduler.c:478)
==14133== by 0xB001BD2E: vgPlain_exit_thread (scheduler.c:258)
==14133== by 0xB0003DF2: shutdown_actions_NORETURN (m_main.c:2581)
==14133== by 0xB002C301: run_a_thread_NORETURN (syswrap-linux.c:138)
sched status:
running_tid=1
Thread 1: status = VgTs_Runnable
==14133== at 0x4063E55: vfprintf (in /lib/tls/libc-2.3.4.so)
==14133== by 0x406C3CF: printf (in /lib/tls/libc-2.3.4.so)
==14133== by 0x80485E1: handler_old (vgt.c:58)
==14133== by 0x40517D7: (within /lib/tls/libc-2.3.4.so)
==14133== by 0x406C3CF: printf (in /lib/tls/libc-2.3.4.so)
==14133== by 0x80485B6: diversion (vgt.c:16)
==14133== by 0xDEADBABD: ???
==14133== by 0x403EE4A: __libc_start_main (in /lib/tls/libc-2.3.4.so)
A+
--
Eric Pouech
|
|
From: Eric P. <eri...@wa...> - 2006-02-11 20:23:25
|
> My understanding is: > > - in main, the segfault happens > > - kernel pushes a signal frame on the stack, saving the machine state > in it, and enters handler_new > > - handler_new finds out what %esp was at the time of the fault > (stack = ctx->uc_mcontext.gregs[REG_ESP]). > > My picture of the stack is now > > ------------ > frame for main() > ------------ <--- "stack" > kernel-constructed sigframe ... > ... > kernel-constructed sigframe ... > > - You then do "stack--", which moves "stack" down one frame unit. Now > it overlaps with the kernel-constructed sigframe. No... the signal handler is called on a different stack than the one the thread... (sigaction is called with SA_ONSTACK flag) We push the stack structure on the thread's stack, not the sigaltstack Furthermore, since the stack grows downwards, it's actually pushed onto the thread's stack, as if the thread had called the function itself, and doesn't trash any data on the stack. A+ -- Eric Pouech |
|
From: Oswald B. <os...@kd...> - 2006-02-11 18:35:32
|
On Sat, Feb 11, 2006 at 04:26:48PM +0000, sv...@va... wrote: > Author: tom > Implement the vm86 and vm86old system calls based on a patch > from Alper Akcan. Fixes bug #118939. > i wouldn't be *too* surprised if this induced *tons* of false positives for some applications. i suppose you don't plan to implement instrumentation of 16 bit code ... oh, well, i guess there is nothing that cannot be suppressed. :) -- Hi! I'm a .signature virus! Copy me into your ~/.signature, please! -- Chaos, panic, and disorder - my work here is done. |
|
From: <sv...@va...> - 2006-02-11 17:08:22
|
Author: tom
Date: 2006-02-11 17:08:15 +0000 (Sat, 11 Feb 2006)
New Revision: 5638
Log:
More bug status updates.
Modified:
trunk/docs/internals/3_1_BUGSTATUS.txt
Modified: trunk/docs/internals/3_1_BUGSTATUS.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/docs/internals/3_1_BUGSTATUS.txt 2006-02-11 16:32:16 UTC (rev 5=
637)
+++ trunk/docs/internals/3_1_BUGSTATUS.txt 2006-02-11 17:08:15 UTC (rev 5=
638)
@@ -37,9 +37,13 @@
vx1519 pending n-i-bz ppc32/64: allocate from callee-saved FP/VMX=
regs
vx1521/2 pending 119297 Incorrect error message for sse code
v5500 pending n-i-bz misaligned path word-size bug in mc_main.c
-v5514 pending 119914 more stabs problems
+v5514 pending 117936 more stabs problems
+ 119914
+ 120345
v5633 pending 120728 TIOCSERGETLSR, TIOCGICOUNT, HDIO_GET_DMA io=
ctls
v5635 pending 118939 vm86old system call
+vx1419 pending 120658 Build fixes for gcc 2.96
+v5593 pending 120658 Pass -Wdeclaration-after-statement to VEX b=
uild
=20
119482: mtfsb1 ppc instruction not implemented
fixed (head?) (vx1531, check)
@@ -49,11 +53,9 @@
120277 unimplemented PPC floating point instructions: fres, fctid,
fctidz, frsqrte
=20
-120345 another stabs bug (maybe =3D=3D 119914 ?)
=20
=20
=20
-
don't forget:
Dave Nomura extra suppression (dev, Tue Jan 17 00:14:30 2006)
Control-Z bug
|
|
From: <sv...@va...> - 2006-02-11 16:32:22
|
Author: tom Date: 2006-02-11 16:32:16 +0000 (Sat, 11 Feb 2006) New Revision: 5637 Log: Document fixes. Modified: trunk/docs/internals/3_1_BUGSTATUS.txt Modified: trunk/docs/internals/3_1_BUGSTATUS.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/3_1_BUGSTATUS.txt 2006-02-11 16:31:54 UTC (rev 5= 636) +++ trunk/docs/internals/3_1_BUGSTATUS.txt 2006-02-11 16:32:16 UTC (rev 5= 637) @@ -38,6 +38,8 @@ vx1521/2 pending 119297 Incorrect error message for sse code v5500 pending n-i-bz misaligned path word-size bug in mc_main.c v5514 pending 119914 more stabs problems +v5633 pending 120728 TIOCSERGETLSR, TIOCGICOUNT, HDIO_GET_DMA io= ctls +v5635 pending 118939 vm86old system call =20 119482: mtfsb1 ppc instruction not implemented fixed (head?) (vx1531, check) |
|
From: <sv...@va...> - 2006-02-11 16:32:03
|
Author: tom
Date: 2006-02-11 16:31:54 +0000 (Sat, 11 Feb 2006)
New Revision: 5636
Log:
Add missing VKI_ prefixes.
Modified:
trunk/include/vki-amd64-linux.h
Modified: trunk/include/vki-amd64-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-amd64-linux.h 2006-02-11 16:26:46 UTC (rev 5635)
+++ trunk/include/vki-amd64-linux.h 2006-02-11 16:31:54 UTC (rev 5636)
@@ -432,9 +432,9 @@
#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty */
=20
#define VKI_FIOASYNC 0x5452
-#define TIOCSERGETLSR 0x5459 /* Get line status register */
+#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
=20
-#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts *=
/
+#define VKI_IOCGICOUNT 0x545D /* read serial port inline interrupt count=
s */
=20
//----------------------------------------------------------------------
// From linux-2.6.9/include/asm-x86_64/poll.h
|
|
From: <sv...@va...> - 2006-02-11 16:26:55
|
Author: tom
Date: 2006-02-11 16:26:46 +0000 (Sat, 11 Feb 2006)
New Revision: 5635
Log:
Implement the vm86 and vm86old system calls based on a patch
from Alper Akcan. Fixes bug #118939.
Modified:
trunk/coregrind/m_syswrap/syswrap-x86-linux.c
trunk/include/vki-x86-linux.h
Modified: trunk/coregrind/m_syswrap/syswrap-x86-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syswrap/syswrap-x86-linux.c 2006-02-11 14:35:17 UTC=
(rev 5634)
+++ trunk/coregrind/m_syswrap/syswrap-x86-linux.c 2006-02-11 16:26:46 UTC=
(rev 5635)
@@ -772,6 +772,8 @@
DECL_TEMPLATE(x86_linux, sys_ptrace);
DECL_TEMPLATE(x86_linux, sys_sigaction);
DECL_TEMPLATE(x86_linux, old_select);
+DECL_TEMPLATE(x86_linux, sys_vm86old);
+DECL_TEMPLATE(x86_linux, sys_vm86);
DECL_TEMPLATE(x86_linux, sys_syscall223);
=20
PRE(old_select)
@@ -1677,7 +1679,33 @@
POST_MEM_WRITE( ARG3, sizeof(struct vki_old_sigaction));
}
=20
+PRE(sys_vm86old)
+{
+ PRINT("sys_vm86old ( %p )", ARG1);
+ PRE_REG_READ1(int, "vm86old", struct vm86_struct *, info);
+ PRE_MEM_WRITE( "vm86old(info)", ARG1, sizeof(struct vki_vm86_struct))=
;
+}
=20
+POST(sys_vm86old)
+{
+ POST_MEM_WRITE( ARG1, sizeof(struct vki_vm86_struct));
+}
+
+PRE(sys_vm86)
+{
+ PRINT("sys_vm86 ( %d, %p )", ARG1,ARG2);
+ PRE_REG_READ2(int, "vm86", unsigned long, fn, struct vm86plus_struct =
*, v86);
+ if (ARG1 =3D=3D VKI_VM86_ENTER || ARG1 =3D=3D VKI_VM86_ENTER_NO_BYPAS=
S)
+ PRE_MEM_WRITE( "vm86(v86)", ARG2, sizeof(struct vki_vm86plus_struc=
t));
+}
+
+POST(sys_vm86)
+{
+ if (ARG1 =3D=3D VKI_VM86_ENTER || ARG1 =3D=3D VKI_VM86_ENTER_NO_BYPAS=
S)
+ POST_MEM_WRITE( ARG2, sizeof(struct vki_vm86plus_struct));
+}
+
+
/* ---------------------------------------------------------------
PRE/POST wrappers for x86/Linux-variant specific syscalls
------------------------------------------------------------ */
@@ -1869,7 +1897,7 @@
GENX_(__NR_iopl, sys_iopl), // 110
LINX_(__NR_vhangup, sys_vhangup), // 111
GENX_(__NR_idle, sys_ni_syscall), // 112
-//zz // (__NR_vm86old, sys_vm86old), // 113 x86/Li=
nux-only
+ PLAXY(__NR_vm86old, sys_vm86old), // 113 x86/Linux-o=
nly
GENXY(__NR_wait4, sys_wait4), // 114
//zz=20
//zz // (__NR_swapoff, sys_swapoff), // 115 */Linu=
x=20
@@ -1935,7 +1963,7 @@
LINX_(__NR_setresuid, sys_setresuid16), // 164
=20
LINXY(__NR_getresuid, sys_getresuid16), // 165
-//zz // (__NR_vm86, sys_vm86), // 166 x86/Li=
nux-only
+ PLAXY(__NR_vm86, sys_vm86), // 166 x86/Linux-o=
nly
GENX_(__NR_query_module, sys_ni_syscall), // 167
GENXY(__NR_poll, sys_poll), // 168
//zz // (__NR_nfsservctl, sys_nfsservctl), // 169 */Linu=
x
Modified: trunk/include/vki-x86-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-x86-linux.h 2006-02-11 14:35:17 UTC (rev 5634)
+++ trunk/include/vki-x86-linux.h 2006-02-11 16:26:46 UTC (rev 5635)
@@ -786,6 +786,80 @@
#define VKI_PTRACE_SETFPXREGS 19
=20
//----------------------------------------------------------------------
+// From linux-2.6.15.4/include/asm-i386/vm86.h
+//----------------------------------------------------------------------
+
+#define VKI_VM86_PLUS_INSTALL_CHECK 0
+#define VKI_VM86_ENTER 1
+#define VKI_VM86_ENTER_NO_BYPASS 2
+#define VKI_VM86_REQUEST_IRQ 3
+#define VKI_VM86_FREE_IRQ 4
+#define VKI_VM86_GET_IRQ_BITS 5
+#define VKI_VM86_GET_AND_RESET_IRQ 6
+
+struct vki_vm86_regs {
+/*
+ * normal regs, with special meaning for the segment descriptors..
+ */
+ long ebx;
+ long ecx;
+ long edx;
+ long esi;
+ long edi;
+ long ebp;
+ long eax;
+ long __null_ds;
+ long __null_es;
+ long __null_fs;
+ long __null_gs;
+ long orig_eax;
+ long eip;
+ unsigned short cs, __csh;
+ long eflags;
+ long esp;
+ unsigned short ss, __ssh;
+/*
+ * these are specific to v86 mode:
+ */
+ unsigned short es, __esh;
+ unsigned short ds, __dsh;
+ unsigned short fs, __fsh;
+ unsigned short gs, __gsh;
+};
+
+struct vki_revectored_struct {
+ unsigned long __map[8]; /* 256 bits */
+};
+
+struct vki_vm86_struct {
+ struct vki_vm86_regs regs;
+ unsigned long flags;
+ unsigned long screen_bitmap;
+ unsigned long cpu_type;
+ struct vki_revectored_struct int_revectored;
+ struct vki_revectored_struct int21_revectored;
+};
+
+struct vki_vm86plus_info_struct {
+ unsigned long force_return_for_pic:1;
+ unsigned long vm86dbg_active:1; /* for debugger */
+ unsigned long vm86dbg_TFpendig:1; /* for debugger */
+ unsigned long unused:28;
+ unsigned long is_vm86pus:1; /* for vm86 internal use */
+ unsigned char vm86dbg_intxxtab[32]; /* for debugger */
+};
+
+struct vki_vm86plus_struct {
+ struct vki_vm86_regs regs;
+ unsigned long flags;
+ unsigned long screen_bitmap;
+ unsigned long cpu_type;
+ struct vki_revectored_struct int_revectored;
+ struct vki_revectored_struct int21_revectored;
+ struct vki_vm86plus_info_struct vm86plus;
+};
+
+//----------------------------------------------------------------------
// And that's it!
//----------------------------------------------------------------------
=20
|
|
From: <sv...@va...> - 2006-02-11 14:35:33
|
Author: sewardj
Date: 2006-02-11 14:35:17 +0000 (Sat, 11 Feb 2006)
New Revision: 5634
Log:
Enable enough syscalls to make self-hosting work on ppc64.
Modified:
trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c 2006-02-11 13:29:09 U=
TC (rev 5633)
+++ trunk/coregrind/m_syswrap/syswrap-ppc64-linux.c 2006-02-11 14:35:17 U=
TC (rev 5634)
@@ -1230,7 +1230,7 @@
// _____(__NR_setgid, sys_setgid), // 46
// _____(__NR_getgid, sys_getgid), // 47
// _____(__NR_signal, sys_signal), // 48
-// _____(__NR_geteuid, sys_geteuid), // 49
+ GENX_(__NR_geteuid, sys_geteuid), // 49
=20
// _____(__NR_getegid, sys_getegid), // 50
// _____(__NR_acct, sys_acct), // 51
@@ -1248,7 +1248,7 @@
// _____(__NR_chroot, sys_chroot), // 61
// _____(__NR_ustat, sys_ustat), // 62
GENXY(__NR_dup2, sys_dup2), // 63
-// _____(__NR_getppid, sys_getppid), // 64
+ GENX_(__NR_getppid, sys_getppid), // 64
=20
// _____(__NR_getpgrp, sys_getpgrp), // 65
// _____(__NR_setsid, sys_setsid), // 66
@@ -1274,7 +1274,7 @@
// _____(__NR_symlink, sys_symlink), // 83
// _____(__NR_oldlstat, sys_oldlstat), // 84
=20
-// _____(__NR_readlink, sys_readlink), // 85
+ GENX_(__NR_readlink, sys_readlink), // 85
// _____(__NR_uselib, sys_uselib), // 86
// _____(__NR_swapon, sys_swapon), // 87
// _____(__NR_reboot, sys_reboot), // 88
|
|
From: <sv...@va...> - 2006-02-11 13:29:27
|
Author: tom
Date: 2006-02-11 13:29:09 +0000 (Sat, 11 Feb 2006)
New Revision: 5633
Log:
Implement a few extra ioctls based on patch from Eric Pouech in bug #1207=
28.
Modified:
trunk/coregrind/m_syswrap/syswrap-generic.c
trunk/include/vki-amd64-linux.h
trunk/include/vki-linux.h
trunk/include/vki-ppc32-linux.h
trunk/include/vki-ppc64-linux.h
trunk/include/vki-x86-linux.h
Modified: trunk/coregrind/m_syswrap/syswrap-generic.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syswrap/syswrap-generic.c 2006-02-11 13:06:22 UTC (=
rev 5632)
+++ trunk/coregrind/m_syswrap/syswrap-generic.c 2006-02-11 13:29:09 UTC (=
rev 5633)
@@ -3163,6 +3163,14 @@
PRE_MEM_WRITE( "ioctl(FIONREAD)", ARG3, sizeof(int) );
break;
=20
+ case VKI_TIOCSERGETLSR:
+ PRE_MEM_WRITE( "ioctl(TIOCSERGETLSR)", ARG3, sizeof(int) );
+ break;
+ case VKI_TIOCGICOUNT:
+ PRE_MEM_WRITE( "ioctl(TIOCGICOUNT)", ARG3,
+ sizeof(struct vki_serial_icounter_struct) );
+ break;
+
case VKI_SG_SET_COMMAND_Q:
PRE_MEM_READ( "ioctl(SG_SET_COMMAND_Q)", ARG3, sizeof(int) );
break;
@@ -3549,6 +3557,9 @@
case VKI_HDIO_GETGEO: /* 0x0301 */
PRE_MEM_WRITE( "ioctl(HDIO_GETGEO)", ARG3, sizeof(struct vki_hd_ge=
ometry));
break;
+ case VKI_HDIO_GET_DMA: /* 0x030b */
+ PRE_MEM_WRITE( "ioctl(HDIO_GET_DMA)", ARG3, sizeof(long));
+ break;
case VKI_HDIO_GET_IDENTITY: /* 0x030d */
PRE_MEM_WRITE( "ioctl(HDIO_GET_IDENTITY)", ARG3,
VKI_SIZEOF_STRUCT_HD_DRIVEID );
@@ -3968,6 +3979,13 @@
POST_MEM_WRITE( ARG3, sizeof(int) );
break;
=20
+ case VKI_TIOCSERGETLSR:
+ POST_MEM_WRITE( ARG3, sizeof(int) );
+ break;
+ case VKI_TIOCGICOUNT:
+ POST_MEM_WRITE( ARG3, sizeof(struct vki_serial_icounter_struct) );
+ break;
+
case VKI_SG_SET_COMMAND_Q:
break;
case VKI_SG_IO:
@@ -4244,6 +4262,9 @@
case VKI_HDIO_GETGEO: /* 0x0301 */
POST_MEM_WRITE(ARG3, sizeof(struct vki_hd_geometry));
break;
+ case VKI_HDIO_GET_DMA: /* 0x030b */
+ POST_MEM_WRITE(ARG3, sizeof(long));
+ break;
case VKI_HDIO_GET_IDENTITY: /* 0x030d */
POST_MEM_WRITE(ARG3, VKI_SIZEOF_STRUCT_HD_DRIVEID );
break;
Modified: trunk/include/vki-amd64-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-amd64-linux.h 2006-02-11 13:06:22 UTC (rev 5632)
+++ trunk/include/vki-amd64-linux.h 2006-02-11 13:29:09 UTC (rev 5633)
@@ -432,7 +432,10 @@
#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty */
=20
#define VKI_FIOASYNC 0x5452
+#define TIOCSERGETLSR 0x5459 /* Get line status register */
=20
+#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts *=
/
+
//----------------------------------------------------------------------
// From linux-2.6.9/include/asm-x86_64/poll.h
//----------------------------------------------------------------------
Modified: trunk/include/vki-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-linux.h 2006-02-11 13:06:22 UTC (rev 5632)
+++ trunk/include/vki-linux.h 2006-02-11 13:29:09 UTC (rev 5633)
@@ -1826,6 +1826,7 @@
};
=20
#define VKI_HDIO_GETGEO 0x0301 /* get device geometry */
+#define VKI_HDIO_GET_DMA 0x030b /* get use-dma flag */
#define VKI_HDIO_GET_IDENTITY 0x030d /* get IDE identification info */
=20
// [[Nb: done like this because the original type is a huge struct that =
will
@@ -2048,6 +2049,18 @@
VKI_SNDRV_TIMER_IOCTL_PAUSE =3D _VKI_IO('T', 0xa3),
};
=20
+//----------------------------------------------------------------------
+// From linux-2.6.15.4/include/linux/serial.h
+//----------------------------------------------------------------------
+
+struct vki_serial_icounter_struct {
+ int cts, dsr, rng, dcd;
+ int rx, tx;
+ int frame, overrun, parity, brk;
+ int buf_overrun;
+ int reserved[9];
+};
+
#endif // __VKI_LINUX_H
=20
/*--------------------------------------------------------------------*/
Modified: trunk/include/vki-ppc32-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-ppc32-linux.h 2006-02-11 13:06:22 UTC (rev 5632)
+++ trunk/include/vki-ppc32-linux.h 2006-02-11 13:29:09 UTC (rev 5633)
@@ -605,14 +605,14 @@
//#define VKI_TIOCGLCKTRMIOS 0x5456
//#define VKI_TIOCSLCKTRMIOS 0x5457
//#define VKI_TIOCSERGSTRUCT 0x5458 /* For debugging only */
-//#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
-// /* ioctl (fd, VKI_TIOCSERGETLSR, &result) where result may be as bel=
ow */
+#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
+ /* ioctl (fd, VKI_TIOCSERGETLSR, &result) where result may be as below=
*/
//# define VKI_TIOCSER_TEMT 0x01 /* Transmitter physically empty */
//#define VKI_TIOCSERGETMULTI 0x545A /* Get multiport config */
//#define VKI_TIOCSERSETMULTI 0x545B /* Set multiport config */
=20
//#define VKI_TIOCMIWAIT 0x545C /* wait for a change on serial input li=
ne(s) */
-//#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt c=
ounts */
+#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt co=
unts */
=20
//----------------------------------------------------------------------
// From linux-2.6.9/include/asm-ppc/poll.h
Modified: trunk/include/vki-ppc64-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-ppc64-linux.h 2006-02-11 13:06:22 UTC (rev 5632)
+++ trunk/include/vki-ppc64-linux.h 2006-02-11 13:29:09 UTC (rev 5633)
@@ -598,6 +598,8 @@
/* Get Pty Number (of pty-mux device) */
#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty =
*/
#define VKI_FIOASYNC _VKI_IOW('f', 125, int)
+#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
+#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt =
counts */
=20
//----------------------------------------------------------------------
// From linux-2.6.13/include/asm-ppc64/poll.h
Modified: trunk/include/vki-x86-linux.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/vki-x86-linux.h 2006-02-11 13:06:22 UTC (rev 5632)
+++ trunk/include/vki-x86-linux.h 2006-02-11 13:29:09 UTC (rev 5633)
@@ -515,7 +515,10 @@
#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty */
=20
#define VKI_FIOASYNC 0x5452
+#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */
=20
+#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt coun=
ts */
+
//----------------------------------------------------------------------
// From linux-2.6.8.1/include/asm-i386/poll.h
//----------------------------------------------------------------------
|
|
From: <sv...@va...> - 2006-02-11 13:06:27
|
Author: njn
Date: 2006-02-11 13:06:22 +0000 (Sat, 11 Feb 2006)
New Revision: 5632
Log:
Changed the naming scheme for V+A bit variables. The number 'n' in
vabits<n> previously referred to the number of memory bits covered by the
V+A bits in the variable. Now it refers to the number of V+A bits held,
which is four times smaller (since there are 2 V+A bits per 8 memory bits=
).
I think this is easier to follow.
Modified:
branches/COMPVBITS/memcheck/mc_main.c
Modified: branches/COMPVBITS/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/COMPVBITS/memcheck/mc_main.c 2006-02-11 12:38:18 UTC (rev 56=
31)
+++ branches/COMPVBITS/memcheck/mc_main.c 2006-02-11 13:06:22 UTC (rev 56=
32)
@@ -59,11 +59,7 @@
#define EXPECTED_TAKEN(cond) __builtin_expect((cond),1)
#define EXPECTED_NOT_TAKEN(cond) __builtin_expect((cond),0)
=20
-/* Define to debug the mem audit system. Set to:
- 0 no debugging, fast cases are used
- 1 some sanity checking, fast cases are used
- 2 max sanity checking, only slow cases are used
-*/
+/* Set to 1 to do a little more sanity checking */
#define VG_DEBUG_MEMORY 0
=20
#define DEBUG(fmt, args...) //VG_(printf)(fmt, ## args)
@@ -140,7 +136,7 @@
=20
Note that this file has a lot of different functions for reading and
writing shadow memory. Only a couple are strictly necessary (eg.
- get_vabits8 and set_vabits8), most are just specialised for specific
+ get_vabits2 and set_vabits2), most are just specialised for specific
common cases to improve performance.
=20
Aside: the V+A bits are less precise than they could be -- we have no=
way
@@ -205,10 +201,10 @@
//
// We store the compressed V+A bits in 8-bit chunks, ie. the V+A bits fo=
r
// four bytes (32 bits) of memory are in each chunk. Hence the name
-// "vabits32". This lets us get the V+A bits for four bytes at a time
+// "vabits8". This lets us get the V+A bits for four bytes at a time
// easily (without having to do any shifting and/or masking), and that i=
s a
-// very common operation. (Note that although each vabits32 chunk
-// represents 32 bits of memory, but is only 8 bits in size.)
+// very common operation. (Note that although each vabits8 chunk
+// is 8 bits in size, it represents 32 bits of memory.)
//
// The representation is "inverse" little-endian... each 4 bytes of
// memory is represented by a 1 byte value, where:
@@ -222,7 +218,7 @@
// value bits to memory addresses; in this case the mapping is inverted=
.
// Ie. instead of particular value bits being held in certain addresses,=
in
// this case certain addresses are represented by particular value bits.
-// See insert_vabits8_into_vabits32() for an example.
+// See insert_vabits2_into_vabits8() for an example.
//=20
// But note that we don't compress the V bits stored in registers; they
// need to be explicit to made the shadow operations possible. Therefor=
e
@@ -231,27 +227,27 @@
// format. This isn't so difficult, it just requires careful attention =
in a
// few places.
=20
-#define VA_BITS8_NOACCESS 0x0 // 00b
-#define VA_BITS8_WRITABLE 0x1 // 01b
-#define VA_BITS8_READABLE 0x2 // 10b
-#define VA_BITS8_OTHER 0x3 // 11b
+#define VA_BITS2_NOACCESS 0x0 // 00b
+#define VA_BITS2_WRITABLE 0x1 // 01b
+#define VA_BITS2_READABLE 0x2 // 10b
+#define VA_BITS2_OTHER 0x3 // 11b
=20
-#define VA_BITS16_NOACCESS 0x0 // 00_00b
-#define VA_BITS16_WRITABLE 0x5 // 01_01b
-#define VA_BITS16_READABLE 0xa // 10_10b
+#define VA_BITS4_NOACCESS 0x0 // 00_00b
+#define VA_BITS4_WRITABLE 0x5 // 01_01b
+#define VA_BITS4_READABLE 0xa // 10_10b
=20
-#define VA_BITS32_NOACCESS 0x00 // 00_00_00_00b
-#define VA_BITS32_WRITABLE 0x55 // 01_01_01_01b
-#define VA_BITS32_READABLE 0xaa // 10_10_10_10b
+#define VA_BITS8_NOACCESS 0x00 // 00_00_00_00b
+#define VA_BITS8_WRITABLE 0x55 // 01_01_01_01b
+#define VA_BITS8_READABLE 0xaa // 10_10_10_10b
=20
-#define VA_BITS64_NOACCESS 0x0000 // 00_00_00_00b x 2
-#define VA_BITS64_WRITABLE 0x5555 // 01_01_01_01b x 2
-#define VA_BITS64_READABLE 0xaaaa // 10_10_10_10b x 2
+#define VA_BITS16_NOACCESS 0x0000 // 00_00_00_00b x 2
+#define VA_BITS16_WRITABLE 0x5555 // 01_01_01_01b x 2
+#define VA_BITS16_READABLE 0xaaaa // 10_10_10_10b x 2
=20
=20
#define SM_CHUNKS 16384
#define SM_OFF(aaa) (((aaa) & 0xffff) >> 2)
-#define SM_OFF_64(aaa) (((aaa) & 0xffff) >> 3)
+#define SM_OFF_16(aaa) (((aaa) & 0xffff) >> 3)
=20
// Paranoia: it's critical for performance that the requested inlining
// occurs. So try extra hard.
@@ -266,7 +262,7 @@
=20
typedef=20
struct {
- UChar vabits32[SM_CHUNKS];
+ UChar vabits8[SM_CHUNKS];
}
SecMap;
=20
@@ -500,39 +496,39 @@
/* --------------- Fundamental functions --------------- */
=20
static inline
-void insert_vabits8_into_vabits32 ( Addr a, UChar vabits8, UChar* vabits=
32 )
+void insert_vabits2_into_vabits8 ( Addr a, UChar vabits2, UChar* vabits8=
)
{
UInt shift =3D (a & 3) << 1; // shift by 0, 2, 4, or 6
- *vabits32 &=3D ~(0x3 << shift); // mask out the two old bits
- *vabits32 |=3D (vabits8 << shift); // mask in the two new bits
+ *vabits8 &=3D ~(0x3 << shift); // mask out the two old bits
+ *vabits8 |=3D (vabits2 << shift); // mask in the two new bits
}
=20
static inline
-void insert_vabits16_into_vabits32 ( Addr a, UChar vabits16, UChar* vabi=
ts32 )
+void insert_vabits4_into_vabits8 ( Addr a, UChar vabits4, UChar* vabits8=
)
{
UInt shift;
tl_assert(VG_IS_2_ALIGNED(a)); // Must be 2-aligned
- shift =3D (a & 2) << 1; // shift by 0 or 4
- *vabits32 &=3D ~(0xf << shift); // mask out the four old bits
- *vabits32 |=3D (vabits16 << shift); // mask in the four new bits
+ shift =3D (a & 2) << 1; // shift by 0 or 4
+ *vabits8 &=3D ~(0xf << shift); // mask out the four old bits
+ *vabits8 |=3D (vabits4 << shift); // mask in the four new bits
}
=20
static inline
-UChar extract_vabits8_from_vabits32 ( Addr a, UChar vabits32 )
+UChar extract_vabits2_from_vabits8 ( Addr a, UChar vabits8 )
{
UInt shift =3D (a & 3) << 1; // shift by 0, 2, 4, or 6
- vabits32 >>=3D shift; // shift the two bits to the bo=
ttom
- return 0x3 & vabits32; // mask out the rest
+ vabits8 >>=3D shift; // shift the two bits to the bo=
ttom
+ return 0x3 & vabits8; // mask out the rest
}
=20
static inline
-UChar extract_vabits16_from_vabits32 ( Addr a, UChar vabits32 )
+UChar extract_vabits4_from_vabits8 ( Addr a, UChar vabits8 )
{
UInt shift;
tl_assert(VG_IS_2_ALIGNED(a)); // Must be 2-aligned
shift =3D (a & 2) << 1; // shift by 0 or 4
- vabits32 >>=3D shift; // shift the four bits to the b=
ottom
- return 0xf & vabits32; // mask out the rest
+ vabits8 >>=3D shift; // shift the four bits to the b=
ottom
+ return 0xf & vabits8; // mask out the rest
}
=20
// Note that these four are only used in slow cases. The fast cases do
@@ -540,20 +536,20 @@
// get_secmap_{read,writ}able) with alignment checks.
=20
static inline
-void set_vabits8 ( Addr a, UChar vabits8 )
+void set_vabits2 ( Addr a, UChar vabits2 )
{
SecMap* sm =3D get_secmap_writable(a);
UWord sm_off =3D SM_OFF(a);
- insert_vabits8_into_vabits32( a, vabits8, &(sm->vabits32[sm_off]) );
+ insert_vabits2_into_vabits8( a, vabits2, &(sm->vabits8[sm_off]) );
}
=20
static inline
-UChar get_vabits8 ( Addr a )
+UChar get_vabits2 ( Addr a )
{
SecMap* sm =3D get_secmap_readable(a);
UWord sm_off =3D SM_OFF(a);
- UChar vabits32 =3D sm->vabits32[sm_off];
- return extract_vabits8_from_vabits32(a, vabits32);
+ UChar vabits8 =3D sm->vabits8[sm_off];
+ return extract_vabits2_from_vabits8(a, vabits8);
}
=20
// Forward declarations
@@ -565,16 +561,16 @@
Bool set_vbits8 ( Addr a, UChar vbits8 )
{
Bool ok =3D True;
- UChar vabits8 =3D get_vabits8(a);
- if ( VA_BITS8_NOACCESS !=3D vabits8 ) {
+ UChar vabits2 =3D get_vabits2(a);
+ if ( VA_BITS2_NOACCESS !=3D vabits2 ) {
// Addressable. Convert in-register format to in-memory format.
// Also remove any existing sec V bit entry for the byte if no
// longer necessary.
- if ( V_BITS8_VALID =3D=3D vbits8 ) { vabits8 =3D VA_BITS8_R=
EADABLE; }
- else if ( V_BITS8_INVALID =3D=3D vbits8 ) { vabits8 =3D VA_BITS8_W=
RITABLE; }
- else { vabits8 =3D VA_BITS8_OTHER=
;
+ if ( V_BITS8_VALID =3D=3D vbits8 ) { vabits2 =3D VA_BITS2_R=
EADABLE; }
+ else if ( V_BITS8_INVALID =3D=3D vbits8 ) { vabits2 =3D VA_BITS2_W=
RITABLE; }
+ else { vabits2 =3D VA_BITS2_OTHER=
;
set_sec_vbits8(a, vbits8);=
}
- set_vabits8(a, vabits8);
+ set_vabits2(a, vabits2);
=20
} else {
// Unaddressable! Do nothing -- when writing to unaddressable
@@ -591,16 +587,16 @@
Bool get_vbits8 ( Addr a, UChar* vbits8 )
{
Bool ok =3D True;
- UChar vabits8 =3D get_vabits8(a);
+ UChar vabits2 =3D get_vabits2(a);
=20
// Convert the in-memory format to in-register format.
- if ( VA_BITS8_READABLE =3D=3D vabits8 ) { *vbits8 =3D V_BITS8_VA=
LID; }
- else if ( VA_BITS8_WRITABLE =3D=3D vabits8 ) { *vbits8 =3D V_BITS8_IN=
VALID; }
- else if ( VA_BITS8_NOACCESS =3D=3D vabits8 ) {
+ if ( VA_BITS2_READABLE =3D=3D vabits2 ) { *vbits8 =3D V_BITS8_VA=
LID; }
+ else if ( VA_BITS2_WRITABLE =3D=3D vabits2 ) { *vbits8 =3D V_BITS8_IN=
VALID; }
+ else if ( VA_BITS2_NOACCESS =3D=3D vabits2 ) {
*vbits8 =3D V_BITS8_VALID; // Make V bits defined!
ok =3D False;
} else {
- tl_assert( VA_BITS8_OTHER =3D=3D vabits8 );
+ tl_assert( VA_BITS2_OTHER =3D=3D vabits2 );
*vbits8 =3D get_sec_vbits8(a);
}
return ok;
@@ -610,7 +606,7 @@
/* --------------- Secondary V bit table ------------ */
=20
// This table holds the full V bit pattern for partially-defined bytes
-// (PDBs) that are represented by VA_BITS8_OTHER in the main shadow memo=
ry.
+// (PDBs) that are represented by VA_BITS2_OTHER in the main shadow memo=
ry.
//
// Note: the nodes in this table can become stale. Eg. if you write a P=
DB,
// then overwrite the same address with a fully defined byte, the sec-V-=
bit
@@ -709,10 +705,10 @@
keep =3D True;
} else {
// Keep node if any of its bytes are non-stale. Using
- // get_vabits8() for the lookup is not very efficient, but I do=
n't
+ // get_vabits2() for the lookup is not very efficient, but I do=
n't
// think it matters.
for (i =3D 0; i < BYTES_PER_SEC_VBIT_NODE; i++) {
- if (VA_BITS8_OTHER =3D=3D get_vabits8(n->a + i)) {
+ if (VA_BITS2_OTHER =3D=3D get_vabits2(n->a + i)) {
keep =3D True; // Found a non-stale byte, so keep
break;
}
@@ -911,10 +907,10 @@
/*--- Setting permissions over address ranges. ---*/
/*------------------------------------------------------------*/
=20
-static void set_address_range_perms ( Addr a, SizeT lenT, UWord vabits64=
,
+static void set_address_range_perms ( Addr a, SizeT lenT, UWord vabits16=
,
UWord dsm_num )
{
- UWord vabits8, sm_off, sm_off64;
+ UWord vabits2, sm_off, sm_off16;
SizeT lenA, lenB, len_to_next_secmap;
Addr aNext;
SecMap* sm;
@@ -924,9 +920,9 @@
PROF_EVENT(150, "set_address_range_perms");
=20
/* Check the V+A bits make sense. */
- tl_assert(vabits64 =3D=3D VA_BITS64_NOACCESS ||
- vabits64 =3D=3D VA_BITS64_WRITABLE ||
- vabits64 =3D=3D VA_BITS64_READABLE);
+ tl_assert(vabits16 =3D=3D VA_BITS16_NOACCESS ||
+ vabits16 =3D=3D VA_BITS16_WRITABLE ||
+ vabits16 =3D=3D VA_BITS16_READABLE);
=20
if (lenT =3D=3D 0)
return;
@@ -934,9 +930,9 @@
if (lenT > 100 * 1000 * 1000) {
if (VG_(clo_verbosity) > 0 && !VG_(clo_xml)) {
Char* s =3D "unknown???";
- if (vabits64 =3D=3D VA_BITS64_NOACCESS) s =3D "noaccess";
- if (vabits64 =3D=3D VA_BITS64_WRITABLE) s =3D "writable";
- if (vabits64 =3D=3D VA_BITS64_READABLE) s =3D "readable";
+ if (vabits16 =3D=3D VA_BITS16_NOACCESS) s =3D "noaccess";
+ if (vabits16 =3D=3D VA_BITS16_WRITABLE) s =3D "writable";
+ if (vabits16 =3D=3D VA_BITS16_READABLE) s =3D "readable";
VG_(message)(Vg_UserMsg, "Warning: set address range perms: "
"large range %lu (%s)", lenT, s);
}
@@ -947,10 +943,10 @@
{
// Endianness doesn't matter here because all bytes are being set =
to
// the same value.
- UWord vabits8 =3D vabits64 & 0x3;
+ UWord vabits2 =3D vabits16 & 0x3;
SizeT i;
for (i =3D 0; i < lenT; i++) {
- set_vabits8(a + i, vabits8);
+ set_vabits2(a + i, vabits2);
}
return;
}
@@ -962,7 +958,7 @@
to use (part of the space-compression scheme). */
example_dsm =3D &sm_distinguished[dsm_num];
=20
- vabits8 =3D vabits64 & 0x3;
+ vabits2 =3D vabits16 & 0x3;
=20
// We have to handle ranges covering various combinations of partial =
and
// whole sec-maps. Here is how parts 1, 2 and 3 are used in each cas=
e.
@@ -1039,7 +1035,7 @@
if (lenA < 1) break;
PROF_EVENT(156, "set_address_range_perms-loop1a");
sm_off =3D SM_OFF(a);
- insert_vabits8_into_vabits32( a, vabits8, &(sm->vabits32[sm_off]) =
);
+ insert_vabits2_into_vabits8( a, vabits2, &(sm->vabits8[sm_off]) );
a +=3D 1;
lenA -=3D 1;
}
@@ -1047,8 +1043,8 @@
while (True) {
if (lenA < 8) break;
PROF_EVENT(157, "set_address_range_perms-loop8a");
- sm_off64 =3D SM_OFF_64(a);
- ((UShort*)(sm->vabits32))[sm_off64] =3D vabits64;
+ sm_off16 =3D SM_OFF_16(a);
+ ((UShort*)(sm->vabits8))[sm_off16] =3D vabits16;
a +=3D 8;
lenA -=3D 8;
}
@@ -1057,7 +1053,7 @@
if (lenA < 1) break;
PROF_EVENT(158, "set_address_range_perms-loop1b");
sm_off =3D SM_OFF(a);
- insert_vabits8_into_vabits32( a, vabits8, &(sm->vabits32[sm_off]) =
);
+ insert_vabits2_into_vabits8( a, vabits2, &(sm->vabits8[sm_off]) );
a +=3D 1;
lenA -=3D 1;
}
@@ -1118,8 +1114,8 @@
while (True) {
if (lenB < 8) break;
PROF_EVENT(163, "set_address_range_perms-loop8b");
- sm_off64 =3D SM_OFF_64(a);
- ((UShort*)(sm->vabits32))[sm_off64] =3D vabits64;
+ sm_off16 =3D SM_OFF_16(a);
+ ((UShort*)(sm->vabits8))[sm_off16] =3D vabits16;
a +=3D 8;
lenB -=3D 8;
}
@@ -1128,7 +1124,7 @@
if (lenB < 1) return;
PROF_EVENT(164, "set_address_range_perms-loop1c");
sm_off =3D SM_OFF(a);
- insert_vabits8_into_vabits32( a, vabits8, &(sm->vabits32[sm_off]) =
);
+ insert_vabits2_into_vabits8( a, vabits2, &(sm->vabits8[sm_off]) );
a +=3D 1;
lenB -=3D 1;
}
@@ -1141,21 +1137,21 @@
{
PROF_EVENT(40, "MC_(make_noaccess)");
DEBUG("MC_(make_noaccess)(%p, %lu)\n", a, len);
- set_address_range_perms ( a, len, VA_BITS64_NOACCESS, SM_DIST_NOACCES=
S );
+ set_address_range_perms ( a, len, VA_BITS16_NOACCESS, SM_DIST_NOACCES=
S );
}
=20
void MC_(make_writable) ( Addr a, SizeT len )
{
PROF_EVENT(41, "MC_(make_writable)");
DEBUG("MC_(make_writable)(%p, %lu)\n", a, len);
- set_address_range_perms ( a, len, VA_BITS64_WRITABLE, SM_DIST_WRITABL=
E );
+ set_address_range_perms ( a, len, VA_BITS16_WRITABLE, SM_DIST_WRITABL=
E );
}
=20
void MC_(make_readable) ( Addr a, SizeT len )
{
PROF_EVENT(42, "MC_(make_readable)");
DEBUG("MC_(make_readable)(%p, %lu)\n", a, len);
- set_address_range_perms ( a, len, VA_BITS64_READABLE, SM_DIST_READABL=
E );
+ set_address_range_perms ( a, len, VA_BITS16_READABLE, SM_DIST_READABL=
E );
}
=20
=20
@@ -1175,14 +1171,14 @@
if (src < dst) {
for (i =3D 0, j =3D len-1; i < len; i++, j--) {
PROF_EVENT(51, "MC_(copy_address_range_state)(loop)");
- set_vabits8( dst+j, get_vabits8( src+j ) );
+ set_vabits2( dst+j, get_vabits2( src+j ) );
}
}
=20
if (src > dst) {
for (i =3D 0; i < len; i++) {
PROF_EVENT(51, "MC_(copy_address_range_state)(loop)");
- set_vabits8( dst+i, get_vabits8( src+i ) );
+ set_vabits2( dst+i, get_vabits2( src+i ) );
}
}
}
@@ -1207,9 +1203,9 @@
return;
}
=20
- sm =3D get_secmap_writable_low(a);
- sm_off =3D SM_OFF(a);
- sm->vabits32[sm_off] =3D VA_BITS32_WRITABLE;
+ sm =3D get_secmap_writable_low(a);
+ sm_off =3D SM_OFF(a);
+ sm->vabits8[sm_off] =3D VA_BITS8_WRITABLE;
#endif
}
=20
@@ -1231,9 +1227,9 @@
return;
}
=20
- sm =3D get_secmap_writable_low(a);
- sm_off =3D SM_OFF(a);
- sm->vabits32[sm_off] =3D VA_BITS32_NOACCESS;
+ sm =3D get_secmap_writable_low(a);
+ sm_off =3D SM_OFF(a);
+ sm->vabits8[sm_off] =3D VA_BITS8_NOACCESS;
#endif
}
=20
@@ -1242,7 +1238,7 @@
static INLINE
void make_aligned_word64_writable ( Addr a )
{
- UWord sm_off64;
+ UWord sm_off16;
SecMap* sm;
=20
PROF_EVENT(320, "make_aligned_word64_writable");
@@ -1257,8 +1253,8 @@
}
=20
sm =3D get_secmap_writable_low(a);
- sm_off64 =3D SM_OFF_64(a);
- ((UShort*)(sm->vabits32))[sm_off64] =3D VA_BITS64_WRITABLE;
+ sm_off16 =3D SM_OFF_16(a);
+ ((UShort*)(sm->vabits8))[sm_off16] =3D VA_BITS16_WRITABLE;
#endif
}
=20
@@ -1266,7 +1262,7 @@
static INLINE
void make_aligned_word64_noaccess ( Addr a )
{
- UWord sm_off64;
+ UWord sm_off16;
SecMap* sm;
=20
PROF_EVENT(330, "make_aligned_word64_noaccess");
@@ -1281,8 +1277,8 @@
}
=20
sm =3D get_secmap_writable_low(a);
- sm_off64 =3D SM_OFF_64(a);
- ((UShort*)(sm->vabits32))[sm_off64] =3D VA_BITS64_NOACCESS;
+ sm_off16 =3D SM_OFF_16(a);
+ ((UShort*)(sm->vabits8))[sm_off16] =3D VA_BITS16_NOACCESS;
#endif
}
=20
@@ -1537,23 +1533,23 @@
if (EXPECTED_TAKEN(sm =3D=3D sm_hi)) {
// Finally, we know that the range is entirely within one se=
cmap.
UWord v_off =3D SM_OFF(a_lo);
- UShort* p =3D (UShort*)(&sm->vabits32[v_off]);
- p[ 0] =3D VA_BITS64_WRITABLE;
- p[ 1] =3D VA_BITS64_WRITABLE;
- p[ 2] =3D VA_BITS64_WRITABLE;
- p[ 3] =3D VA_BITS64_WRITABLE;
- p[ 4] =3D VA_BITS64_WRITABLE;
- p[ 5] =3D VA_BITS64_WRITABLE;
- p[ 6] =3D VA_BITS64_WRITABLE;
- p[ 7] =3D VA_BITS64_WRITABLE;
- p[ 8] =3D VA_BITS64_WRITABLE;
- p[ 9] =3D VA_BITS64_WRITABLE;
- p[10] =3D VA_BITS64_WRITABLE;
- p[11] =3D VA_BITS64_WRITABLE;
- p[12] =3D VA_BITS64_WRITABLE;
- p[13] =3D VA_BITS64_WRITABLE;
- p[14] =3D VA_BITS64_WRITABLE;
- p[15] =3D VA_BITS64_WRITABLE;
+ UShort* p =3D (UShort*)(&sm->vabits8[v_off]);
+ p[ 0] =3D VA_BITS16_WRITABLE;
+ p[ 1] =3D VA_BITS16_WRITABLE;
+ p[ 2] =3D VA_BITS16_WRITABLE;
+ p[ 3] =3D VA_BITS16_WRITABLE;
+ p[ 4] =3D VA_BITS16_WRITABLE;
+ p[ 5] =3D VA_BITS16_WRITABLE;
+ p[ 6] =3D VA_BITS16_WRITABLE;
+ p[ 7] =3D VA_BITS16_WRITABLE;
+ p[ 8] =3D VA_BITS16_WRITABLE;
+ p[ 9] =3D VA_BITS16_WRITABLE;
+ p[10] =3D VA_BITS16_WRITABLE;
+ p[11] =3D VA_BITS16_WRITABLE;
+ p[12] =3D VA_BITS16_WRITABLE;
+ p[13] =3D VA_BITS16_WRITABLE;
+ p[14] =3D VA_BITS16_WRITABLE;
+ p[15] =3D VA_BITS16_WRITABLE;
return;
}
}
@@ -1588,13 +1584,13 @@
Bool MC_(check_noaccess) ( Addr a, SizeT len, Addr* bad_addr )
{
SizeT i;
- UWord vabits8;
+ UWord vabits2;
=20
PROF_EVENT(60, "mc_check_noaccess");
for (i =3D 0; i < len; i++) {
PROF_EVENT(61, "mc_check_noaccess(loop)");
- vabits8 =3D get_vabits8(a);
- if (VA_BITS8_NOACCESS !=3D vabits8) {
+ vabits2 =3D get_vabits2(a);
+ if (VA_BITS2_NOACCESS !=3D vabits2) {
if (bad_addr !=3D NULL) *bad_addr =3D a;
return False;
}
@@ -1607,13 +1603,13 @@
static Bool mc_check_writable ( Addr a, SizeT len, Addr* bad_addr )
{
SizeT i;
- UWord vabits8;
+ UWord vabits2;
=20
PROF_EVENT(62, "mc_check_writable");
for (i =3D 0; i < len; i++) {
PROF_EVENT(63, "mc_check_writable(loop)");
- vabits8 =3D get_vabits8(a);
- if (VA_BITS8_NOACCESS =3D=3D vabits8) {
+ vabits2 =3D get_vabits2(a);
+ if (VA_BITS2_NOACCESS =3D=3D vabits2) {
if (bad_addr !=3D NULL) *bad_addr =3D a;
return False;
}
@@ -1625,19 +1621,19 @@
static MC_ReadResult mc_check_readable ( Addr a, SizeT len, Addr* bad_ad=
dr )
{
SizeT i;
- UWord vabits8;
+ UWord vabits2;
=20
PROF_EVENT(64, "mc_check_readable");
DEBUG("mc_check_readable\n");
for (i =3D 0; i < len; i++) {
PROF_EVENT(65, "mc_check_readable(loop)");
- vabits8 =3D get_vabits8(a);
- if (VA_BITS8_READABLE !=3D vabits8) {
+ vabits2 =3D get_vabits2(a);
+ if (VA_BITS2_READABLE !=3D vabits2) {
// Error! Nb: Report addressability errors in preference to
// definedness errors. And don't report definedeness errors un=
less
// --undef-value-errors=3Dyes.
if (bad_addr !=3D NULL) *bad_addr =3D a;
- if ( VA_BITS8_NOACCESS =3D=3D vabits8 ) return MC_AddrErr;=
=20
+ if ( VA_BITS2_NOACCESS =3D=3D vabits2 ) return MC_AddrErr;=
=20
else if ( MC_(clo_undef_value_errors) ) return MC_ValueErr;
}
a++;
@@ -1652,19 +1648,19 @@
=20
static Bool mc_check_readable_asciiz ( Addr a, Addr* bad_addr )
{
- UWord vabits8;
+ UWord vabits2;
=20
PROF_EVENT(66, "mc_check_readable_asciiz");
DEBUG("mc_check_readable_asciiz\n");
while (True) {
PROF_EVENT(67, "mc_check_readable_asciiz(loop)");
- vabits8 =3D get_vabits8(a);
- if (VA_BITS8_READABLE !=3D vabits8) {
+ vabits2 =3D get_vabits2(a);
+ if (VA_BITS2_READABLE !=3D vabits2) {
// Error! Nb: Report addressability errors in preference to
// definedness errors. And don't report definedeness errors un=
less
// --undef-value-errors=3Dyes.
if (bad_addr !=3D NULL) *bad_addr =3D a;
- if ( VA_BITS8_NOACCESS =3D=3D vabits8 ) return MC_AddrErr;=
=20
+ if ( VA_BITS2_NOACCESS =3D=3D vabits2 ) return MC_AddrErr;=
=20
else if ( MC_(clo_undef_value_errors) ) return MC_ValueErr;
}
/* Ok, a is safe to read. */
@@ -2711,7 +2707,7 @@
static INLINE
ULong mc_LOADV8 ( Addr a, Bool isBigEndian )
{
- UWord sm_off64, vabits64;
+ UWord sm_off16, vabits16;
SecMap* sm;
=20
PROF_EVENT(200, "mc_LOADV8");
@@ -2725,15 +2721,15 @@
}
=20
sm =3D get_secmap_readable_low(a);
- sm_off64 =3D SM_OFF_64(a);
- vabits64 =3D ((UShort*)(sm->vabits32))[sm_off64];
+ sm_off16 =3D SM_OFF_16(a);
+ vabits16 =3D ((UShort*)(sm->vabits8))[sm_off16];
=20
// Handle common case quickly: a is suitably aligned, is mapped, and
// addressible.
// Convert V bits from compact memory form to expanded register form.
- if (EXPECTED_TAKEN(vabits64 =3D=3D VA_BITS64_READABLE)) {
+ if (EXPECTED_TAKEN(vabits16 =3D=3D VA_BITS16_READABLE)) {
return V_BITS64_VALID;
- } else if (EXPECTED_TAKEN(vabits64 =3D=3D VA_BITS64_WRITABLE)) {
+ } else if (EXPECTED_TAKEN(vabits16 =3D=3D VA_BITS16_WRITABLE)) {
return V_BITS64_INVALID;
} else {
/* Slow case: the 8 bytes are not all-readable or all-writable. */
@@ -2756,7 +2752,7 @@
static INLINE
void mc_STOREV8 ( Addr a, ULong vbytes, Bool isBigEndian )
{
- UWord sm_off64, vabits64;
+ UWord sm_off16, vabits16;
SecMap* sm;
=20
PROF_EVENT(210, "mc_STOREV8");
@@ -2773,20 +2769,20 @@
}
=20
sm =3D get_secmap_readable_low(a);
- sm_off64 =3D SM_OFF_64(a);
- vabits64 =3D ((UShort*)(sm->vabits32))[sm_off64];
+ sm_off16 =3D SM_OFF_16(a);
+ vabits16 =3D ((UShort*)(sm->vabits8))[sm_off16];
=20
if (EXPECTED_TAKEN( !is_distinguished_sm(sm) &&=20
- (VA_BITS64_READABLE =3D=3D vabits64 ||
- VA_BITS64_WRITABLE =3D=3D vabits64) ))
+ (VA_BITS16_READABLE =3D=3D vabits16 ||
+ VA_BITS16_WRITABLE =3D=3D vabits16) ))
{
/* Handle common case quickly: a is suitably aligned, */
/* is mapped, and is addressible. */
// Convert full V-bits in register to compact 2-bit form.
if (V_BITS64_VALID =3D=3D vbytes) {
- ((UShort*)(sm->vabits32))[sm_off64] =3D (UShort)VA_BITS64_READA=
BLE;
+ ((UShort*)(sm->vabits8))[sm_off16] =3D (UShort)VA_BITS16_READAB=
LE;
} else if (V_BITS64_INVALID =3D=3D vbytes) {
- ((UShort*)(sm->vabits32))[sm_off64] =3D (UShort)VA_BITS64_WRITA=
BLE;
+ ((UShort*)(sm->vabits8))[sm_off16] =3D (UShort)VA_BITS16_WRITAB=
LE;
} else {
/* Slow but general case -- writing partially defined bytes. */
PROF_EVENT(212, "mc_STOREV8-slow2");
@@ -2815,7 +2811,7 @@
static INLINE
UWord mc_LOADV4 ( Addr a, Bool isBigEndian )
{
- UWord sm_off, vabits32;
+ UWord sm_off, vabits8;
SecMap* sm;
=20
PROF_EVENT(220, "mc_LOADV4");
@@ -2828,18 +2824,18 @@
return (UWord)mc_LOADVn_slow( a, 4, isBigEndian );
}
=20
- sm =3D get_secmap_readable_low(a);
- sm_off =3D SM_OFF(a);
- vabits32 =3D sm->vabits32[sm_off];
+ sm =3D get_secmap_readable_low(a);
+ sm_off =3D SM_OFF(a);
+ vabits8 =3D sm->vabits8[sm_off];
=20
// Handle common case quickly: a is suitably aligned, is mapped, and =
the
// entire word32 it lives in is addressible.
// Convert V bits from compact memory form to expanded register form.
// For 64-bit platforms, set the high 32 bits of retval to 1 (undefin=
ed).
// Almost certainly not necessary, but be paranoid.
- if (EXPECTED_TAKEN(vabits32 =3D=3D VA_BITS32_READABLE)) {
+ if (EXPECTED_TAKEN(vabits8 =3D=3D VA_BITS8_READABLE)) {
return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_VALID);
- } else if (EXPECTED_TAKEN(vabits32 =3D=3D VA_BITS32_WRITABLE)) {
+ } else if (EXPECTED_TAKEN(vabits8 =3D=3D VA_BITS8_WRITABLE)) {
return ((UWord)0xFFFFFFFF00000000ULL | (UWord)V_BITS32_INVALID);
} else {
/* Slow case: the 4 bytes are not all-readable or all-writable. */
@@ -2862,7 +2858,7 @@
static INLINE
void mc_STOREV4 ( Addr a, UWord vbytes, Bool isBigEndian )
{
- UWord sm_off, vabits32;
+ UWord sm_off, vabits8;
SecMap* sm;
=20
PROF_EVENT(230, "mc_STOREV4");
@@ -2876,9 +2872,9 @@
return;
}
=20
- sm =3D get_secmap_readable_low(a);
- sm_off =3D SM_OFF(a);
- vabits32 =3D sm->vabits32[sm_off];
+ sm =3D get_secmap_readable_low(a);
+ sm_off =3D SM_OFF(a);
+ vabits8 =3D sm->vabits8[sm_off];
=20
//----------------------------------------------------------------------=
-----
#if 1
@@ -2886,20 +2882,20 @@
// all, if we can tell that what we want to write is the same as what=
is
// already there.
if (V_BITS32_VALID =3D=3D vbytes) {
- if (vabits32 =3D=3D (UInt)VA_BITS32_READABLE) {
+ if (vabits8 =3D=3D (UInt)VA_BITS8_READABLE) {
return;
- } else if (!is_distinguished_sm(sm) && VA_BITS32_WRITABLE =3D=3D v=
abits32) {
- sm->vabits32[sm_off] =3D (UInt)VA_BITS32_READABLE;
+ } else if (!is_distinguished_sm(sm) && VA_BITS8_WRITABLE =3D=3D va=
bits8) {
+ sm->vabits8[sm_off] =3D (UInt)VA_BITS8_READABLE;
} else {
// not readable/writable, or distinguished and changing state
PROF_EVENT(232, "mc_STOREV4-slow2");
mc_STOREVn_slow( a, 4, (ULong)vbytes, isBigEndian );
}
} else if (V_BITS32_INVALID =3D=3D vbytes) {
- if (vabits32 =3D=3D (UInt)VA_BITS32_WRITABLE) {
+ if (vabits8 =3D=3D (UInt)VA_BITS8_WRITABLE) {
return;
- } else if (!is_distinguished_sm(sm) && VA_BITS32_READABLE =3D=3D v=
abits32) {
- sm->vabits32[sm_off] =3D (UInt)VA_BITS32_WRITABLE;
+ } else if (!is_distinguished_sm(sm) && VA_BITS8_READABLE =3D=3D va=
bits8) {
+ sm->vabits8[sm_off] =3D (UInt)VA_BITS8_WRITABLE;
} else {
// not readable/writable, or distinguished and changing state
PROF_EVENT(233, "mc_STOREV4-slow3");
@@ -2913,16 +2909,16 @@
//----------------------------------------------------------------------=
-----
#else
if (EXPECTED_TAKEN( !is_distinguished_sm(sm) &&=20
- (VA_BITS32_READABLE =3D=3D vabits32 ||
- VA_BITS32_WRITABLE =3D=3D vabits32) ))
+ (VA_BITS8_READABLE =3D=3D vabits8 ||
+ VA_BITS8_WRITABLE =3D=3D vabits8) ))
{
/* Handle common case quickly: a is suitably aligned, */
/* is mapped, and is addressible. */
// Convert full V-bits in register to compact 2-bit form.
if (V_BITS32_VALID =3D=3D vbytes) {
- sm->vabits32[sm_off] =3D VA_BITS32_READABLE;
+ sm->vabits8[sm_off] =3D VA_BITS8_READABLE;
} else if (V_BITS32_INVALID =3D=3D vbytes) {
- sm->vabits32[sm_off] =3D VA_BITS32_WRITABLE;
+ sm->vabits8[sm_off] =3D VA_BITS8_WRITABLE;
} else {
/* Slow but general case -- writing partially defined bytes. */
PROF_EVENT(232, "mc_STOREV4-slow2");
@@ -2953,7 +2949,7 @@
static INLINE
UWord mc_LOADV2 ( Addr a, Bool isBigEndian )
{
- UWord sm_off, vabits32;
+ UWord sm_off, vabits8;
SecMap* sm;
=20
PROF_EVENT(240, "mc_LOADV2");
@@ -2966,21 +2962,21 @@
return (UWord)mc_LOADVn_slow( a, 2, isBigEndian );
}
=20
- sm =3D get_secmap_readable_low(a);
- sm_off =3D SM_OFF(a);
- vabits32 =3D sm->vabits32[sm_off];
+ sm =3D get_secmap_readable_low(a);
+ sm_off =3D SM_OFF(a);
+ vabits8 =3D sm->vabits8[sm_off];
// Handle common case quickly: a is suitably aligned, is mapped, and =
is
// addressible.
// Convert V bits from compact memory form to expanded register form
// XXX: set the high 16/48 bits of retval to 1 for 64-bit paranoia?
- if (vabits32 =3D=3D VA_BITS32_READABLE) { return V_BITS16_VALID;=
}
- else if (vabits32 =3D=3D VA_BITS32_WRITABLE) { return V_BITS16_INVALI=
D; }
+ if (vabits8 =3D=3D VA_BITS8_READABLE) { return V_BITS16_VALID; =
}
+ else if (vabits8 =3D=3D VA_BITS8_WRITABLE) { return V_BITS16_INVALID;=
}
else {
// The 4 (yes, 4) bytes are not all-readable or all-writable, chec=
k
// the two sub-bytes.
- UChar vabits16 =3D extract_vabits16_from_vabits32(a, vabits32);
- if (vabits16 =3D=3D VA_BITS16_READABLE) { return V_BITS16_VAL=
ID; }
- else if (vabits16 =3D=3D VA_BITS16_WRITABLE) { return V_BITS16_INV=
ALID; }
+ UChar vabits4 =3D extract_vabits4_from_vabits8(a, vabits8);
+ if (vabits4 =3D=3D VA_BITS4_READABLE) { return V_BITS16_VALID=
; }
+ else if (vabits4 =3D=3D VA_BITS4_WRITABLE) { return V_BITS16_INVAL=
ID; }
else {
/* Slow case: the two bytes are not all-readable or all-writabl=
e. */
PROF_EVENT(242, "mc_LOADV2-slow2");
@@ -3003,7 +2999,7 @@
static INLINE
void mc_STOREV2 ( Addr a, UWord vbytes, Bool isBigEndian )
{
- UWord sm_off, vabits32;
+ UWord sm_off, vabits8;
SecMap* sm;
=20
PROF_EVENT(250, "mc_STOREV2");
@@ -3017,22 +3013,22 @@
return;
}
=20
- sm =3D get_secmap_readable_low(a);
- sm_off =3D SM_OFF(a);
- vabits32 =3D sm->vabits32[sm_off];
+ sm =3D get_secmap_readable_low(a);
+ sm_off =3D SM_OFF(a);
+ vabits8 =3D sm->vabits8[sm_off];
if (EXPECTED_TAKEN( !is_distinguished_sm(sm) &&=20
- (VA_BITS32_READABLE =3D=3D vabits32 ||
- VA_BITS32_WRITABLE =3D=3D vabits32) ))
+ (VA_BITS8_READABLE =3D=3D vabits8 ||
+ VA_BITS8_WRITABLE =3D=3D vabits8) ))
{
/* Handle common case quickly: a is suitably aligned, */
/* is mapped, and is addressible. */
// Convert full V-bits in register to compact 2-bit form.
if (V_BITS16_VALID =3D=3D vbytes) {
- insert_vabits16_into_vabits32( a, VA_BITS16_READABLE,
- &(sm->vabits32[sm_off]) );
+ insert_vabits4_into_vabits8( a, VA_BITS4_READABLE,
+ &(sm->vabits8[sm_off]) );
} else if (V_BITS16_INVALID =3D=3D vbytes) {
- insert_vabits16_into_vabits32( a, VA_BITS16_WRITABLE,
- &(sm->vabits32[sm_off]) );
+ insert_vabits4_into_vabits8( a, VA_BITS4_WRITABLE,
+ &(sm->vabits8[sm_off]) );
} else {
/* Slow but general case -- writing partially defined bytes. */
PROF_EVENT(252, "mc_STOREV2-slow2");
@@ -3062,7 +3058,7 @@
VG_REGPARM(1)
UWord MC_(helperc_LOADV1) ( Addr a )
{
- UWord sm_off, vabits32;
+ UWord sm_off, vabits8;
SecMap* sm;
=20
PROF_EVENT(260, "mc_LOADV1");
@@ -3075,21 +3071,21 @@
return (UWord)mc_LOADVn_slow( a, 1, False/*irrelevant*/ );
}
=20
- sm =3D get_secmap_readable_low(a);
- sm_off =3D SM_OFF(a);
- vabits32 =3D sm->vabits32[sm_off];
+ sm =3D get_secmap_readable_low(a);
+ sm_off =3D SM_OFF(a);
+ vabits8 =3D sm->vabits8[sm_off];
// Convert V bits from compact memory form to expanded register form
// Handle common case quickly: a is mapped, and the entire
// word32 it lives in is addressible.
// XXX: set the high 24/56 bits of retval to 1 for 64-bit paranoia?
- if (vabits32 =3D=3D VA_BITS32_READABLE) { return V_BITS8_VALID; =
}
- else if (vabits32 =3D=3D VA_BITS32_WRITABLE) { return V_BITS8_INVALID=
; }
+ if (vabits8 =3D=3D VA_BITS8_READABLE) { return V_BITS8_VALID; =
}
+ else if (vabits8 =3D=3D VA_BITS8_WRITABLE) { return V_BITS8_INVALID; =
}
else {
// The 4 (yes, 4) bytes are not all-readable or all-writable, chec=
k
// the single byte.
- UChar vabits8 =3D extract_vabits8_from_vabits32(a, vabits32);
- if (vabits8 =3D=3D VA_BITS8_READABLE) { return V_BITS8_VALID;=
}
- else if (vabits8 =3D=3D VA_BITS8_WRITABLE) { return V_BITS8_INVALI=
D; }
+ UChar vabits2 =3D extract_vabits2_from_vabits8(a, vabits8);
+ if (vabits2 =3D=3D VA_BITS2_READABLE) { return V_BITS8_VALID;=
}
+ else if (vabits2 =3D=3D VA_BITS2_WRITABLE) { return V_BITS8_INVALI=
D; }
else {
/* Slow case: the byte is not all-readable or all-writable. */
PROF_EVENT(262, "mc_LOADV1-slow2");
@@ -3103,7 +3099,7 @@
VG_REGPARM(2)
void MC_(helperc_STOREV1) ( Addr a, UWord vbyte )
{
- UWord sm_off, vabits32;
+ UWord sm_off, vabits8;
SecMap* sm;
=20
PROF_EVENT(270, "mc_STOREV1");
@@ -3117,22 +3113,22 @@
return;
}
=20
- sm =3D get_secmap_readable_low(a);
- sm_off =3D SM_OFF(a);
- vabits32 =3D sm->vabits32[sm_off];
+ sm =3D get_secmap_readable_low(a);
+ sm_off =3D SM_OFF(a);
+ vabits8 =3D sm->vabits8[sm_off];
if (EXPECTED_TAKEN( !is_distinguished_sm(sm) &&=20
- (VA_BITS32_READABLE =3D=3D vabits32 ||
- VA_BITS32_WRITABLE =3D=3D vabits32) ))
+ (VA_BITS8_READABLE =3D=3D vabits8 ||
+ VA_BITS8_WRITABLE =3D=3D vabits8) ))
{
/* Handle common case quickly: a is mapped, the entire word32 it
lives in is addressible. */
// Convert full V-bits in register to compact 2-bit form.
if (V_BITS8_VALID =3D=3D vbyte) {
- insert_vabits8_into_vabits32( a, VA_BITS8_READABLE,
- &(sm->vabits32[sm_off]) );
+ insert_vabits2_into_vabits8( a, VA_BITS2_READABLE,
+ &(sm->vabits8[sm_off]) );
} else if (V_BITS8_INVALID =3D=3D vbyte) {
- insert_vabits8_into_vabits32( a, VA_BITS8_WRITABLE,
- &(sm->vabits32[sm_off]) );
+ insert_vabits2_into_vabits8( a, VA_BITS2_WRITABLE,
+ &(sm->vabits8[sm_off]) );
} else {
/* Slow but general case -- writing partially defined bytes. */
PROF_EVENT(272, "mc_STOREV1-slow2");
@@ -3202,11 +3198,11 @@
=20
/* Check that arrays are addressible before doing any getting/setting=
. */
for (i =3D 0; i < szB; i++) {
- if (VA_BITS8_NOACCESS =3D=3D get_vabits8(a + i)) {
+ if (VA_BITS2_NOACCESS =3D=3D get_vabits2(a + i)) {
mc_record_address_error( tid, a + i, 1, setting ? True : Fa=
lse );
return 3;
}
- if (VA_BITS8_NOACCESS =3D=3D get_vabits8(vbits + i)) {
+ if (VA_BITS2_NOACCESS =3D=3D get_vabits2(vbits + i)) {
mc_record_address_error( tid, vbits + i, 1, setting ? False : T=
rue );
return 3;
}
@@ -3314,13 +3310,13 @@
=20
/* Build the 3 distinguished secondaries */
sm =3D &sm_distinguished[SM_DIST_NOACCESS];
- for (i =3D 0; i < SM_CHUNKS; i++) sm->vabits32[i] =3D VA_BITS32_NOACC=
ESS;
+ for (i =3D 0; i < SM_CHUNKS; i++) sm->vabits8[i] =3D VA_BITS8_NOACCES=
S;
=20
sm =3D &sm_distinguished[SM_DIST_WRITABLE];
- for (i =3D 0; i < SM_CHUNKS; i++) sm->vabits32[i] =3D VA_BITS32_WRITA=
BLE;
+ for (i =3D 0; i < SM_CHUNKS; i++) sm->vabits8[i] =3D VA_BITS8_WRITABL=
E;
=20
sm =3D &sm_distinguished[SM_DIST_READABLE];
- for (i =3D 0; i < SM_CHUNKS; i++) sm->vabits32[i] =3D VA_BITS32_READA=
BLE;
+ for (i =3D 0; i < SM_CHUNKS; i++) sm->vabits8[i] =3D VA_BITS8_READABL=
E;
=20
/* Set up the primary map. */
/* These entries gradually get overwritten as the used address
@@ -3362,19 +3358,19 @@
/* Check noaccess. */
sm =3D &sm_distinguished[SM_DIST_NOACCESS];
for (i =3D 0; i < SM_CHUNKS; i++)
- if (sm->vabits32[i] !=3D VA_BITS32_NOACCESS)
+ if (sm->vabits8[i] !=3D VA_BITS8_NOACCESS)
bad =3D True;
=20
/* Check writable. */
sm =3D &sm_distinguished[SM_DIST_WRITABLE];
for (i =3D 0; i < SM_CHUNKS; i++)
- if (sm->vabits32[i] !=3D VA_BITS32_WRITABLE)
+ if (sm->vabits8[i] !=3D VA_BITS8_WRITABLE)
bad =3D True;
=20
/* Check readable. */
sm =3D &sm_distinguished[SM_DIST_READABLE];
for (i =3D 0; i < SM_CHUNKS; i++)
- if (sm->vabits32[i] !=3D VA_BITS32_READABLE)
+ if (sm->vabits8[i] !=3D VA_BITS8_READABLE)
bad =3D True;
=20
if (bad) {
|
|
From: <sv...@va...> - 2006-02-11 12:38:27
|
Author: njn
Date: 2006-02-11 12:38:18 +0000 (Sat, 11 Feb 2006)
New Revision: 5631
Log:
Add some finer control over which of Memcheck's fast cases are used.
Modified:
branches/COMPVBITS/memcheck/mc_main.c
Modified: branches/COMPVBITS/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/COMPVBITS/memcheck/mc_main.c 2006-02-11 11:34:51 UTC (rev 56=
30)
+++ branches/COMPVBITS/memcheck/mc_main.c 2006-02-11 12:38:18 UTC (rev 56=
31)
@@ -70,6 +70,20 @@
=20
=20
/*------------------------------------------------------------*/
+/*--- Fast-case knobs ---*/
+/*------------------------------------------------------------*/
+=20
+// Comment these out to disable the fast cases (don't just set them to z=
ero).
+
+#define PERF_FAST_LOADV 1
+#define PERF_FAST_STOREV 1
+
+#define PERF_FAST_SARP 1
+
+#define PERF_FAST_STACK 1
+#define PERF_FAST_STACK2 1
+
+/*------------------------------------------------------------*/
/*--- V bits and A bits ---*/
/*------------------------------------------------------------*/
=20
@@ -807,6 +821,9 @@
static void mc_record_jump_error ( ThreadId tid, Addr a );
=20
static
+#ifndef PERF_FAST_LOADV
+INLINE
+#endif
ULong mc_LOADVn_slow ( Addr a, SizeT szB, Bool bigendian )
{
/* Make up a 64-bit result V word, which contains the loaded data for
@@ -858,7 +875,10 @@
}
=20
=20
-static=20
+static
+#ifndef PERF_FAST_STOREV
+INLINE
+#endif
void mc_STOREVn_slow ( Addr a, SizeT szB, ULong vbytes, Bool bigendian )
{
SizeT i, n_addrs_bad =3D 0;
@@ -922,9 +942,11 @@
}
}
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_SARP
/*------------------ debug-only case ------------------ */
{
+ // Endianness doesn't matter here because all bytes are being set =
to
+ // the same value.
UWord vabits8 =3D vabits64 & 0x3;
SizeT i;
for (i =3D 0; i < lenT; i++) {
@@ -932,7 +954,7 @@
}
return;
}
-# endif
+#endif
=20
/*------------------ standard handling ------------------ */
=20
@@ -1176,11 +1198,9 @@
=20
PROF_EVENT(300, "make_aligned_word32_writable");
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_STACK2
MC_(make_writable)(a, 4);
- return;
-# endif
-
+#else
if (EXPECTED_NOT_TAKEN(a > MAX_PRIMARY_ADDRESS)) {
PROF_EVENT(301, "make_aligned_word32_writable-slow1");
MC_(make_writable)(a, 4);
@@ -1190,6 +1210,7 @@
sm =3D get_secmap_writable_low(a);
sm_off =3D SM_OFF(a);
sm->vabits32[sm_off] =3D VA_BITS32_WRITABLE;
+#endif
}
=20
=20
@@ -1201,11 +1222,9 @@
=20
PROF_EVENT(310, "make_aligned_word32_noaccess");
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_STACK2
MC_(make_noaccess)(a, 4);
- return;
-# endif
-
+#else
if (EXPECTED_NOT_TAKEN(a > MAX_PRIMARY_ADDRESS)) {
PROF_EVENT(311, "make_aligned_word32_noaccess-slow1");
MC_(make_noaccess)(a, 4);
@@ -1215,6 +1234,7 @@
sm =3D get_secmap_writable_low(a);
sm_off =3D SM_OFF(a);
sm->vabits32[sm_off] =3D VA_BITS32_NOACCESS;
+#endif
}
=20
=20
@@ -1227,11 +1247,9 @@
=20
PROF_EVENT(320, "make_aligned_word64_writable");
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_STACK2
MC_(make_writable)(a, 8);
- return;
-# endif
-
+#else
if (EXPECTED_NOT_TAKEN(a > MAX_PRIMARY_ADDRESS)) {
PROF_EVENT(321, "make_aligned_word64_writable-slow1");
MC_(make_writable)(a, 8);
@@ -1241,6 +1259,7 @@
sm =3D get_secmap_writable_low(a);
sm_off64 =3D SM_OFF_64(a);
((UShort*)(sm->vabits32))[sm_off64] =3D VA_BITS64_WRITABLE;
+#endif
}
=20
=20
@@ -1252,11 +1271,9 @@
=20
PROF_EVENT(330, "make_aligned_word64_noaccess");
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_STACK2
MC_(make_noaccess)(a, 8);
- return;
-# endif
-
+#else
if (EXPECTED_NOT_TAKEN(a > MAX_PRIMARY_ADDRESS)) {
PROF_EVENT(331, "make_aligned_word64_noaccess-slow1");
MC_(make_noaccess)(a, 8);
@@ -1266,6 +1283,7 @@
sm =3D get_secmap_writable_low(a);
sm_off64 =3D SM_OFF_64(a);
((UShort*)(sm->vabits32))[sm_off64] =3D VA_BITS64_NOACCESS;
+#endif
}
=20
=20
@@ -2698,9 +2716,9 @@
=20
PROF_EVENT(200, "mc_LOADV8");
=20
- if (VG_DEBUG_MEMORY >=3D 2)
- return mc_LOADVn_slow( a, 8, isBigEndian );
-
+#ifndef PERF_FAST_LOADV
+ return mc_LOADVn_slow( a, 8, isBigEndian );
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,8) )) {
PROF_EVENT(201, "mc_LOADV8-slow1");
return (ULong)mc_LOADVn_slow( a, 8, isBigEndian );
@@ -2722,6 +2740,7 @@
PROF_EVENT(202, "mc_LOADV8-slow2");
return mc_LOADVn_slow( a, 8, isBigEndian );
}
+#endif
}
=20
VG_REGPARM(1) ULong MC_(helperc_LOADV8be) ( Addr a )
@@ -2742,13 +2761,11 @@
=20
PROF_EVENT(210, "mc_STOREV8");
=20
+#ifndef PERF_FAST_STOREV
// XXX: this slow case seems to be marginally faster than the fast ca=
se!
// Investigate further.
- if (VG_DEBUG_MEMORY >=3D 2) {
- mc_STOREVn_slow( a, 8, vbytes, isBigEndian );
- return;
- }
-
+ mc_STOREVn_slow( a, 8, vbytes, isBigEndian );
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,8) )) {
PROF_EVENT(211, "mc_STOREV8-slow1");
mc_STOREVn_slow( a, 8, vbytes, isBigEndian );
@@ -2780,6 +2797,7 @@
PROF_EVENT(213, "mc_STOREV8-slow3");
mc_STOREVn_slow( a, 8, vbytes, isBigEndian );
}
+#endif
}
=20
VG_REGPARM(1) void MC_(helperc_STOREV8be) ( Addr a, ULong vbytes )
@@ -2802,9 +2820,9 @@
=20
PROF_EVENT(220, "mc_LOADV4");
=20
- if (VG_DEBUG_MEMORY >=3D 2)
- return (UWord)mc_LOADVn_slow( a, 4, isBigEndian );
-
+#ifndef PERF_FAST_LOADV
+ return (UWord)mc_LOADVn_slow( a, 4, isBigEndian );
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,4) )) {
PROF_EVENT(221, "mc_LOADV4-slow1");
return (UWord)mc_LOADVn_slow( a, 4, isBigEndian );
@@ -2828,6 +2846,7 @@
PROF_EVENT(222, "mc_LOADV4-slow2");
return (UWord)mc_LOADVn_slow( a, 4, isBigEndian );
}
+#endif
}
=20
VG_REGPARM(1) UWord MC_(helperc_LOADV4be) ( Addr a )
@@ -2848,11 +2867,9 @@
=20
PROF_EVENT(230, "mc_STOREV4");
=20
- if (VG_DEBUG_MEMORY >=3D 2) {
- mc_STOREVn_slow( a, 4, (ULong)vbytes, isBigEndian );
- return;
- }
-
+#ifndef PERF_FAST_STOREV
+ mc_STOREVn_slow( a, 4, (ULong)vbytes, isBigEndian );
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,4) )) {
PROF_EVENT(231, "mc_STOREV4-slow1");
mc_STOREVn_slow( a, 4, (ULong)vbytes, isBigEndian );
@@ -2918,6 +2935,7 @@
}
#endif
//----------------------------------------------------------------------=
-----
+#endif
}
=20
VG_REGPARM(2) void MC_(helperc_STOREV4be) ( Addr a, UWord vbytes )
@@ -2940,9 +2958,9 @@
=20
PROF_EVENT(240, "mc_LOADV2");
=20
- if (VG_DEBUG_MEMORY >=3D 2)
- return (UWord)mc_LOADVn_slow( a, 2, isBigEndian );
-
+#ifndef PERF_FAST_LOADV
+ return (UWord)mc_LOADVn_slow( a, 2, isBigEndian );
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,2) )) {
PROF_EVENT(241, "mc_LOADV2-slow1");
return (UWord)mc_LOADVn_slow( a, 2, isBigEndian );
@@ -2969,6 +2987,7 @@
return (UWord)mc_LOADVn_slow( a, 2, isBigEndian );
}
}
+#endif
}
=20
VG_REGPARM(1) UWord MC_(helperc_LOADV2be) ( Addr a )
@@ -2989,11 +3008,9 @@
=20
PROF_EVENT(250, "mc_STOREV2");
=20
- if (VG_DEBUG_MEMORY >=3D 2) {
- mc_STOREVn_slow( a, 2, (ULong)vbytes, isBigEndian );
- return;
- }
-
+#ifndef PERF_FAST_STOREV
+ mc_STOREVn_slow( a, 2, (ULong)vbytes, isBigEndian );
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,2) )) {
PROF_EVENT(251, "mc_STOREV2-slow1");
mc_STOREVn_slow( a, 2, (ULong)vbytes, isBigEndian );
@@ -3026,6 +3043,7 @@
PROF_EVENT(253, "mc_STOREV2-slow3");
mc_STOREVn_slow( a, 2, (ULong)vbytes, isBigEndian );
}
+#endif
}
=20
VG_REGPARM(2) void MC_(helperc_STOREV2be) ( Addr a, UWord vbytes )
@@ -3049,10 +3067,9 @@
=20
PROF_EVENT(260, "mc_LOADV1");
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_LOADV
return (UWord)mc_LOADVn_slow( a, 1, False/*irrelevant*/ );
-# endif
-
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,1) )) {
PROF_EVENT(261, "mc_LOADV1-slow1");
return (UWord)mc_LOADVn_slow( a, 1, False/*irrelevant*/ );
@@ -3079,6 +3096,7 @@
return (UWord)mc_LOADVn_slow( a, 1, False/*irrelevant*/ );
}
}
+#endif
}
=20
=20
@@ -3090,11 +3108,9 @@
=20
PROF_EVENT(270, "mc_STOREV1");
=20
-# if VG_DEBUG_MEMORY >=3D 2
+#ifndef PERF_FAST_STOREV
mc_STOREVn_slow( a, 1, (ULong)vbyte, False/*irrelevant*/ );
- return;
-# endif
-
+#else
if (EXPECTED_NOT_TAKEN( UNALIGNED_OR_HIGH(a,1) )) {
PROF_EVENT(271, "mc_STOREV1-slow1");
mc_STOREVn_slow( a, 1, (ULong)vbyte, False/*irrelevant*/ );
@@ -3127,6 +3143,7 @@
PROF_EVENT(273, "mc_STOREV1-slow3");
mc_STOREVn_slow( a, 1, (ULong)vbyte, False/*irrelevant*/ );
}
+#endif
}
=20
=20
@@ -4006,18 +4023,22 @@
VG_(track_die_mem_brk) ( MC_(make_noaccess) );
VG_(track_die_mem_munmap) ( MC_(make_noaccess) );=20
=20
+#ifdef PERF_FAST_STACK
VG_(track_new_mem_stack_4) ( mc_new_mem_stack_4 );
VG_(track_new_mem_stack_8) ( mc_new_mem_stack_8 );
VG_(track_new_mem_stack_12) ( mc_new_mem_stack_12 );
VG_(track_new_mem_stack_16) ( mc_new_mem_stack_16 );
VG_(track_new_mem_stack_32) ( mc_new_mem_stack_32 );
+#endif
VG_(track_new_mem_stack) ( mc_new_mem_stack );
=20
+#ifdef PERF_FAST_STACK
VG_(track_die_mem_stack_4) ( mc_die_mem_stack_4 );
VG_(track_die_mem_stack_8) ( mc_die_mem_stack_8 );
VG_(track_die_mem_stack_12) ( mc_die_mem_stack_12 );
VG_(track_die_mem_stack_16) ( mc_die_mem_stack_16 );
VG_(track_die_mem_stack_32) ( mc_die_mem_stack_32 );
+#endif
VG_(track_die_mem_stack) ( mc_die_mem_stack );
=20
VG_(track_ban_mem_stack) ( MC_(make_noaccess) );
|
|
From: <js...@ac...> - 2006-02-11 11:43:26
|
Nightly build on minnie ( SuSE 10.0, ppc32 ) started at 2006-02-11 05:00:01 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 192 tests, 11 stderr failures, 5 stdout failures ================= memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/stack_changes (stdout) memcheck/tests/stack_changes (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) none/tests/ppc32/test_fx (stdout) none/tests/ppc32/test_fx (stderr) none/tests/ppc32/test_gx (stdout) |
|
From: <sv...@va...> - 2006-02-11 11:34:58
|
Author: njn
Date: 2006-02-11 11:34:51 +0000 (Sat, 11 Feb 2006)
New Revision: 5630
Log:
Formatting change only.
Modified:
branches/COMPVBITS/memcheck/mc_main.c
Modified: branches/COMPVBITS/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/COMPVBITS/memcheck/mc_main.c 2006-02-10 12:42:46 UTC (rev 56=
29)
+++ branches/COMPVBITS/memcheck/mc_main.c 2006-02-11 11:34:51 UTC (rev 56=
30)
@@ -2724,13 +2724,11 @@
}
}
=20
-VG_REGPARM(1)
-ULong MC_(helperc_LOADV8be) ( Addr a )
+VG_REGPARM(1) ULong MC_(helperc_LOADV8be) ( Addr a )
{
return mc_LOADV8(a, True);
}
-VG_REGPARM(1)
-ULong MC_(helperc_LOADV8le) ( Addr a )
+VG_REGPARM(1) ULong MC_(helperc_LOADV8le) ( Addr a )
{
return mc_LOADV8(a, False);
}
@@ -2784,13 +2782,11 @@
}
}
=20
-VG_REGPARM(1)
-void MC_(helperc_STOREV8be) ( Addr a, ULong vbytes )
+VG_REGPARM(1) void MC_(helperc_STOREV8be) ( Addr a, ULong vbytes )
{
mc_STOREV8(a, vbytes, True);
}
-VG_REGPARM(1)
-void MC_(helperc_STOREV8le) ( Addr a, ULong vbytes )
+VG_REGPARM(1) void MC_(helperc_STOREV8le) ( Addr a, ULong vbytes )
{
mc_STOREV8(a, vbytes, False);
}
@@ -2834,13 +2830,11 @@
}
}
=20
-VG_REGPARM(1)
-UWord MC_(helperc_LOADV4be) ( Addr a )
+VG_REGPARM(1) UWord MC_(helperc_LOADV4be) ( Addr a )
{
return mc_LOADV4(a, True);
}
-VG_REGPARM(1)
-UWord MC_(helperc_LOADV4le) ( Addr a )
+VG_REGPARM(1) UWord MC_(helperc_LOADV4le) ( Addr a )
{
return mc_LOADV4(a, False);
}
@@ -2926,13 +2920,11 @@
//----------------------------------------------------------------------=
-----
}
=20
-VG_REGPARM(2)
-void MC_(helperc_STOREV4be) ( Addr a, UWord vbytes )
+VG_REGPARM(2) void MC_(helperc_STOREV4be) ( Addr a, UWord vbytes )
{
mc_STOREV4(a, vbytes, True);
}
-VG_REGPARM(2)
-void MC_(helperc_STOREV4le) ( Addr a, UWord vbytes )
+VG_REGPARM(2) void MC_(helperc_STOREV4le) ( Addr a, UWord vbytes )
{
mc_STOREV4(a, vbytes, False);
}
@@ -2979,13 +2971,11 @@
}
}
=20
-VG_REGPARM(1)
-UWord MC_(helperc_LOADV2be) ( Addr a )
+VG_REGPARM(1) UWord MC_(helperc_LOADV2be) ( Addr a )
{
return mc_LOADV2(a, True);
}
-VG_REGPARM(1)
-UWord MC_(helperc_LOADV2le) ( Addr a )
+VG_REGPARM(1) UWord MC_(helperc_LOADV2le) ( Addr a )
{
return mc_LOADV2(a, False);
}
@@ -3038,13 +3028,11 @@
}
}
=20
-VG_REGPARM(2)
-void MC_(helperc_STOREV2be) ( Addr a, UWord vbytes )
+VG_REGPARM(2) void MC_(helperc_STOREV2be) ( Addr a, UWord vbytes )
{
mc_STOREV2(a, vbytes, True);
}
-VG_REGPARM(2)
-void MC_(helperc_STOREV2le) ( Addr a, UWord vbytes )
+VG_REGPARM(2) void MC_(helperc_STOREV2le) ( Addr a, UWord vbytes )
{
mc_STOREV2(a, vbytes, False);
}
|
|
From: John R.
|
>>struct stack_layout
>>{
>> void *ret_addr;
>> int i;
>> char *str;
>> char buf[16];
>> unsigned long ebp;
>> unsigned long eip;
>>};
>>
>>void handler_new( int signo, siginfo_t* xx, void* uc)
>>{
>> ucontext_t* ctx = (ucontext_t*)uc;
>> struct stack_layout* stack;
>> printf("in handler2, setting EIP to %p\n", (void*)&diversion);
>> stack = (struct stack_layout*)ctx->uc_mcontext.gregs[REG_ESP];
>>
>> stack--; /* push the stack_layout structure */
[snip]
> How do you know it is OK to overwrite the top of the
> kernel-constructed signal frame with your struct stack_layout?
It's **very** dirty, but it looks like it does "work" on recent Linux.
Look in linux-2.6.15/arch/i386/kernel/sigframe.h:
struct rt_sigframe
{
char __user *pretcode;
int sig;
struct siginfo __user *pinfo;
void __user *puc;
struct siginfo info;
struct ucontext uc;
struct _fpstate fpstate;
char retcode[8];
};
and in linux-2.6.15/include/asm-i386/sigcontext.h:
struct _fpstate {
/* Regular FPU environment */
unsigned long cw;
unsigned long sw;
unsigned long tag;
unsigned long ipoff;
unsigned long cssel;
unsigned long dataoff;
unsigned long datasel;
struct _fpreg _st[8];
unsigned short status;
unsigned short magic; /* 0xffff = regular FPU data only */
/* FXSR FPU environment */
unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */
unsigned long mxcsr;
unsigned long reserved;
struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
struct _xmmreg _xmm[8];
unsigned long padding[56];
};
and the comment in linux-2.6.15/arch/i386/kernel/signal.c:
/*
* This is movl $,%eax ; int $0x80
*
* WE DO NOT USE IT ANY MORE! It's only left here for historical
* reasons and because gdb uses it as a signature to notice
* signal handler stack frames.
*/
err |= __put_user(0xb8, (char __user *)(frame->retcode+0));
err |= __put_user(__NR_rt_sigreturn, (int __user *)(frame->retcode+1));
err |= __put_user(0x80cd, (short __user *)(frame->retcode+5));
So the 8 bytes of retcode is "available", as is the 4*56 bytes of
_fpstate.padding, assuming the space for the FXSR FPU environment
really is present. If so, then no "important" data gets overwritten
because sizeof(struct stack_layout) < (8 + 4*56) .
If the kernel actually pushes only struct sigframe (not struct rt_sigframe),
then you're much more likely to be in trouble:
struct sigframe
{
char __user *pretcode;
int sig;
struct sigcontext sc;
struct _fpstate fpstate;
unsigned long extramask[_NSIG_WORDS-1];
char retcode[8];
};
where _NSIG_WORDS equals 2. extramask[0] holds the bits for
the second (and last) group of 32 signals, and will be overwritten.
This can lead to _extremely_ hard-to-diagnose random behavior.
Notice that struct sigframe contains no siginfo; SA_SIGINFO was
omitted when asking the kernel to establish the handler.
This report:
rt_sigframe and vDSO inhibit virtualization of signal handling
https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=180351
might be of interest. Among other things: with the latest glibc-2.3.90
and Fedora Core kernel vDSO, then it is hard to avoid a race if you're
mucking with the frame when a pthread_cond_wait() gets canceled.
[snip]
> - changing %ESP inside the signal handler is likely to cause memcheck to
> emit lots of bogus messages, and these may be difficult to get rid of
> (changing %ESP is really asking for trouble from memcheck :-)
Any emulator must give special consideration to return from signal,
including noticing when %esp changes "unexpectedly."
--
|
|
From: <js...@ac...> - 2006-02-11 03:58:31
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2006-02-11 03:30:01 GMT Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 223 tests, 7 stderr failures, 0 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: <js...@ac...> - 2006-02-11 03:57:11
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2006-02-11 04:40:00 CET Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 197 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/pointer-trace (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/mremap (stderr) |
|
From: Tom H. <to...@co...> - 2006-02-11 03:44:14
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2006-02-11 03:30:05 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 225 tests, 18 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_creat (stderr) none/tests/fdleak_dup (stderr) none/tests/fdleak_dup2 (stderr) none/tests/fdleak_fcntl (stderr) none/tests/fdleak_ipv4 (stderr) none/tests/fdleak_open (stderr) none/tests/fdleak_pipe (stderr) none/tests/fdleak_socketpair (stderr) none/tests/rlimit_nofile (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-02-11 03:30:18
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2006-02-11 03:15:03 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 224 tests, 21 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) memcheck/tests/badjump (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partial_load_dflt (stderr) memcheck/tests/partial_load_ok (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/stack_changes (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) memcheck/tests/xml1 (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-02-11 03:24:39
|
Nightly build on dellow ( x86_64, Fedora Core 4 ) started at 2006-02-11 03:10:07 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 7 stderr failures, 1 stdout failure ================= memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Sat Feb 11 03:18:01 2006 --- new.short Sat Feb 11 03:24:32 2006 *************** *** 8,10 **** ! == 245 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/pointer-trace (stderr) --- 8,11 ---- ! == 245 tests, 7 stderr failures, 1 stdout failure ================= ! memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) |
|
From: Tom H. <th...@cy...> - 2006-02-11 03:20:21
|
Nightly build on aston ( x86_64, Fedora Core 3 ) started at 2006-02-11 03:05:12 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-02-11 03:15:08
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Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2006-02-11 03:00:04 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 245 tests, 7 stderr failures, 1 stdout failure ================= memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
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From: Julian S. <js...@ac...> - 2006-02-11 02:15:23
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In fact on further study I don't really understand how this is supposed
to work (safely), even natively.
> struct stack_layout
> {
> void *ret_addr;
> int i;
> char *str;
> char buf[16];
> unsigned long ebp;
> unsigned long eip;
> };
>
> void handler_new( int signo, siginfo_t* xx, void* uc)
> {
> ucontext_t* ctx = (ucontext_t*)uc;
> struct stack_layout* stack;
> printf("in handler2, setting EIP to %p\n", (void*)&diversion);
> stack = (struct stack_layout*)ctx->uc_mcontext.gregs[REG_ESP];
>
> stack--; /* push the stack_layout structure */
> VALGRIND_MAKE_WRITABLE(stack, sizeof(*stack));
> stack->ret_addr = (void *)0xdeadbabe; /* raise_func must not
> return */
> /* setting this to a reasonable value doesn't help
> stack->ret_addr = (unsigned long)&diversion;
> */
> stack->i = 12;
> stack->str = stack->buf;
> strcpy(stack->buf, "foo-bar");
>
> ctx->uc_mcontext.gregs[REG_EIP] = (unsigned long)&diversion;
> ctx->uc_mcontext.gregs[REG_ESP] = (unsigned long)stack;
> }
My understanding is:
- in main, the segfault happens
- kernel pushes a signal frame on the stack, saving the machine state
in it, and enters handler_new
- handler_new finds out what %esp was at the time of the fault
(stack = ctx->uc_mcontext.gregs[REG_ESP]).
My picture of the stack is now
------------
frame for main()
------------ <--- "stack"
kernel-constructed sigframe ...
...
kernel-constructed sigframe ...
- You then do "stack--", which moves "stack" down one frame unit. Now
it overlaps with the kernel-constructed sigframe.
- You write stuff in *stack, trashing part of the kernel-constructed frame.
- You set ctx->uc_mcontext.gregs[REG_EIP] and REG_ESP.
- handler_new returns. The machine state is restored from the partially
corrupted kernel-constructed sigframe. Execution resumes in diversion()
with the stack looking like this:
------------
frame for main()
------------
struct stack_layout
------------ <------- %esp
How do you know it is OK to overwrite the top of the
kernel-constructed signal frame with your struct stack_layout?
I suspect (if my analysis is right) that this could be a cause
of problems with V. V's signal delivery frames look different from
the kernel's one as they contain more information, and trashing
the top part of it will likely cause problems.
A perhaps safer approach is:
In the handler, do not write anything onto the stack and do not
change ctx->uc_mcontext.gregs[REG_ESP]. Instead copy all info you
need to construct the struct stack_layout, including the values
of ctx->uc_mcontext.gregs[REG_ESP] and [REG_EIP], to some safe place
(thread-local storage?). Set ctx->uc_mcontext.gregs[REG_EIP] to
point to a handwritten assembly function, and let the handler return.
You are now in your handwritten assembly function. Using the saved
info, construct the struct stack_layout, and jump the the EIP noted
in the saved info.
This relies on the ideas that
- overwriting the top end of the signal frame is likely to kill valgrind
- changing %ESP inside the signal handler is likely to cause memcheck to
emit lots of bogus messages, and these may be difficult to get rid of
(changing %ESP is really asking for trouble from memcheck :-)
My proposal avoids both problems.
J
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