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From: <sv...@va...> - 2006-01-10 20:58:52
|
Author: sewardj
Date: 2006-01-10 20:58:43 +0000 (Tue, 10 Jan 2006)
New Revision: 5513
Log:
Oops; unbreak x86 fn wrapping.
Modified:
branches/FNWRAP/include/valgrind.h
Modified: branches/FNWRAP/include/valgrind.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/include/valgrind.h 2006-01-10 20:40:11 UTC (rev 5512)
+++ branches/FNWRAP/include/valgrind.h 2006-01-10 20:58:43 UTC (rev 5513)
@@ -200,7 +200,7 @@
#define VALGRIND_CALL_NOREDIR_EAX \
__SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%EAX */ \
- "xchgl %%edx,%%edx"
+ "xchgl %%edx,%%edx\n\t"
#endif /* ARCH_x86 */
=20
/* --------------------------- amd64 --------------------------- */
@@ -245,7 +245,7 @@
#define VALGRIND_CALL_NOREDIR_RAX \
__SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%RAX */ \
- "xchgq %%rdx,%%rdx"
+ "xchgq %%rdx,%%rdx\n\t"
#endif /* ARCH_amd64 */
=20
/* --------------------------- ppc32 --------------------------- */
@@ -642,10 +642,10 @@
=20
/* --------------------------- amd64 --------------------------- */
=20
+#if defined(ARCH_amd64)
+
/* ARGREGS: rdi rsi rdx rcx r8 r9 (the rest on stack in R-to-L order) */
=20
-#if defined(ARCH_amd64)
-
/* These regs are trashed by the hidden call. */
#define __CALLER_SAVED_REGS /*"rax",*/ "rcx", "rdx", "rsi", \
"rdi", "r8", "r9", "r10", "r11"
@@ -711,6 +711,8 @@
=20
/* --------------------------- ppc32 --------------------------- */
=20
+#if defined(ARCH_ppc32)
+
/* ARGREGS: r3 r4 r5 r6 r7 r8 r9 r10 (the rest on stack somewhere) */
=20
/* These regs are trashed by the hidden call. */
@@ -781,6 +783,8 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
+#endif /* ARCH_ppc32 */
+
/* --------------------------- ppc64 --------------------------- */
=20
=20
|
|
From: Uttam P. <ut...@us...> - 2006-01-10 20:57:39
|
Hi Cerion,
> Not so strange - we developed on a ppc970 :-)
>
> Ok, it's a missing instruction.
> Hmm - you're not getting the hex printouts...
> Can you change VEX/priv/guest-ppc/toIR.c thusly:
>
> vex_printf("disInstr(ppc): unhandled instruction: "
> - "0x%x\n", theInstr);
> + "%u\n", theInstr);
>
> Rebuild, run the test, and repost none/tests/ppc32/jm-insns.stderr.diff
> - To run just that one test (from dir valgrind-3.1.0):
> $ perl ./tests/vg_regtest ./none/tests/ppc32/jm-insns
With the suggested change (in file VEX/priv/guest-ppc32/toIR.c),
building and re-running that one test we get following
(jm-insns.stderr.diff output)
$ cat none/tests/ppc32/jm-insns.stderr.diff
*** jm-insns.stderr.exp 2005-11-25 04:36:08.000000000 -0800
--- jm-insns.stderr.out 2006-01-10 12:47:26.000000000 -0800
***************
*** 1 ****
--- 2,22 ----
+ disInstr(ppc32): unhandled instruction: 2080393422
+ primary 31(0x........), secondary 206(0x........)
+ disInstr(ppc32): instr: 0111 1100 0000 0000 0100 1000 1100 1110
+ disInstr(ppc32): opcode1: 011111
+ disInstr(ppc32): opcode2: 0011001110
+
+ Your program just tried to execute an instruction that Valgrind
+ did not recognise. There are two possible reasons for this.
+ 1. Your program has a bug and erroneously jumped to a non-code
+ location. If you are running Memcheck and you just saw a
+ warning about a bad jump, it's probably your program's fault.
+ 2. The instruction is legitimate but Valgrind doesn't handle it,
+ i.e. it's Valgrind's fault. If you think this is the case or
+ you are not sure, please let us know.
+ Either way, Valgrind will now raise a SIGILL signal which will
+ probably kill your program.
+
+ Process terminating with default action of signal 4 (SIGILL)
+ Illegal opcode at address 0x........
+ at 0x........: build_viargs_table (in /home/pawar/valgrind-3.1.0/none/tests/ppc32/jm-insns)
+ by 0x........: main (in /home/pawar/valgrind-3.1.0/none/tests/ppc32/jm-insns)
Also, I noticed that, after making the change to toIR.c file, I'd to clean the directory with
make clean to rebuild libvex.a (toIR.o). Without that, toIR.o wouldn't get rebuild. And the test
result would be same as the previous one. Is it the known problem?
Thanks,
Uttam
|
|
From: <sv...@va...> - 2006-01-10 20:40:18
|
Author: sewardj
Date: 2006-01-10 20:40:11 +0000 (Tue, 10 Jan 2006)
New Revision: 5512
Log:
Make function wrapping work on ppc32-linux.
Modified:
branches/FNWRAP/coregrind/m_redir.c
branches/FNWRAP/coregrind/m_scheduler/scheduler.c
branches/FNWRAP/include/valgrind.h
Modified: branches/FNWRAP/coregrind/m_redir.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/coregrind/m_redir.c 2006-01-10 16:21:07 UTC (rev 5511=
)
+++ branches/FNWRAP/coregrind/m_redir.c 2006-01-10 20:40:11 UTC (rev 5512=
)
@@ -753,11 +753,11 @@
if (0=3D=3DVG_(strcmp)("Memcheck", VG_(details).name)) {
add_hardwired_spec(
"ld.so.1", "strlen",
- (Addr)&VG_(ppc32_linux_REDIR_FOR_strlen),
+ (Addr)&VG_(ppc32_linux_REDIR_FOR_strlen)
); =20
add_hardwired_spec(
"soname:ld.so.1", "strcmp",
- (Addr)&VG_(ppc32_linux_REDIR_FOR_strcmp),
+ (Addr)&VG_(ppc32_linux_REDIR_FOR_strcmp)
);
}
=20
Modified: branches/FNWRAP/coregrind/m_scheduler/scheduler.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/coregrind/m_scheduler/scheduler.c 2006-01-10 16:21:07=
UTC (rev 5511)
+++ branches/FNWRAP/coregrind/m_scheduler/scheduler.c 2006-01-10 20:40:11=
UTC (rev 5512)
@@ -643,6 +643,67 @@
" ret\n"
".previous\n"
);
+#elif defined(VGP_ppc32_linux)
+asm("\n"
+".text\n"
+"run_a_translation:\n"
+" stwu 1,-256(1)\n"
+" stw 14,128(1)\n"
+" stw 15,132(1)\n"
+" stw 16,136(1)\n"
+" stw 17,140(1)\n"
+" stw 18,144(1)\n"
+" stw 19,148(1)\n"
+" stw 20,152(1)\n"
+" stw 21,156(1)\n"
+" stw 22,160(1)\n"
+" stw 23,164(1)\n"
+" stw 24,168(1)\n"
+" stw 25,172(1)\n"
+" stw 26,176(1)\n"
+" stw 27,180(1)\n"
+" stw 28,184(1)\n"
+" stw 29,188(1)\n"
+" stw 30,192(1)\n"
+" stw 31,196(1)\n"
+" mflr 31\n"
+" stw 31,200(1)\n"
+
+" stw 3,204(1)\n"
+" lwz 31,4(3)\n"
+" lwz 30,0(3)\n"
+" mtlr 30\n"
+" blrl\n"
+
+" lwz 4,204(1)\n"
+" stw 3, 8(4)\n"
+" stw 31,12(4)\n"
+
+" lwz 14,128(1)\n"
+" lwz 15,132(1)\n"
+" lwz 16,136(1)\n"
+" lwz 17,140(1)\n"
+" lwz 18,144(1)\n"
+" lwz 19,148(1)\n"
+" lwz 20,152(1)\n"
+" lwz 21,156(1)\n"
+" lwz 22,160(1)\n"
+" lwz 23,164(1)\n"
+" lwz 24,168(1)\n"
+" lwz 25,172(1)\n"
+" lwz 26,176(1)\n"
+" lwz 27,180(1)\n"
+" lwz 28,184(1)\n"
+" lwz 29,188(1)\n"
+" lwz 30,192(1)\n"
+" lwz 31,200(1)\n"
+" mtlr 31\n"
+" lwz 31,196(1)\n"
+" addi 1,1,256\n"
+" blr\n"
+
+".previous\n"
+);
#else
# error "Not implemented"
#endif
Modified: branches/FNWRAP/include/valgrind.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/include/valgrind.h 2006-01-10 16:21:07 UTC (rev 5511)
+++ branches/FNWRAP/include/valgrind.h 2006-01-10 20:40:11 UTC (rev 5512)
@@ -200,7 +200,7 @@
#define VALGRIND_CALL_NOREDIR_EAX \
__SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%EAX */ \
- "xchgl %%edx,%%edx\n\t"
+ "xchgl %%edx,%%edx"
#endif /* ARCH_x86 */
=20
/* --------------------------- amd64 --------------------------- */
@@ -245,36 +245,54 @@
#define VALGRIND_CALL_NOREDIR_RAX \
__SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%RAX */ \
- "xchgq %%rdx,%%rdx\n\t"
+ "xchgq %%rdx,%%rdx"
#endif /* ARCH_amd64 */
=20
/* --------------------------- ppc32 --------------------------- */
=20
#if defined(ARCH_ppc32)
+#define __SPECIAL_INSTRUCTION_PREAMBLE \
+ "rlwinm 0,0,3,0,0 ; rlwinm 0,0,13,0,0\n\t" \
+ "rlwinm 0,0,29,0,0 ; rlwinm 0,0,19,0,0\n\t" \
+
#define VALGRIND_DO_CLIENT_REQUEST( \
_zzq_rlval, _zzq_default, _zzq_request, \
_zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4) \
\
{ volatile unsigned int _zzq_args[5]; \
- register unsigned int _zzq_tmp __asm__("r3"); \
+ register unsigned int _zzq_result __asm__("r3"); \
register volatile unsigned int *_zzq_ptr __asm__("r4"); \
- _zzq_args[0] =3D (volatile unsigned int)(_zzq_request); \
- _zzq_args[1] =3D (volatile unsigned int)(_zzq_arg1); \
- _zzq_args[2] =3D (volatile unsigned int)(_zzq_arg2); \
- _zzq_args[3] =3D (volatile unsigned int)(_zzq_arg3); \
- _zzq_args[4] =3D (volatile unsigned int)(_zzq_arg4); \
+ _zzq_args[0] =3D (unsigned int)(_zzq_request); \
+ _zzq_args[1] =3D (unsigned int)(_zzq_arg1); \
+ _zzq_args[2] =3D (unsigned int)(_zzq_arg2); \
+ _zzq_args[3] =3D (unsigned int)(_zzq_arg3); \
+ _zzq_args[4] =3D (unsigned int)(_zzq_arg4); \
_zzq_ptr =3D _zzq_args; \
- __asm__ volatile("tw 0,3,27\n\t" \
- "rlwinm 0,0,29,0,0\n\t" \
- "rlwinm 0,0,3,0,0\n\t" \
- "rlwinm 0,0,13,0,0\n\t" \
- "rlwinm 0,0,19,0,0\n\t" \
- "nop\n\t" \
- : "=3Dr" (_zzq_tmp) \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
+ /* %R3 =3D client_request ( %R4 ) */ \
+ "or 1,1,1" \
+ : "=3Dr" (_zzq_result) \
: "0" (_zzq_default), "r" (_zzq_ptr) \
- : "memory"); \
- _zzq_rlval =3D (__typeof__(_zzq_rlval)) _zzq_tmp; \
+ : "cc", "memory"); \
+ _zzq_rlval =3D _zzq_result; \
}
+
+#define VALGRIND_GET_NRADDR(_zzq_rlval) \
+ { register unsigned int __addr __asm__("r3"); \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
+ /* %R3 =3D guest_NRADDR */ \
+ "or 2,2,2" \
+ : "=3Dr" (__addr) \
+ : \
+ : "cc", "memory" \
+ ); \
+ _zzq_rlval =3D (void*)__addr; \
+ }
+
+#define VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R11 \
+ __SPECIAL_INSTRUCTION_PREAMBLE \
+ /* branch-and-link-to-noredir *%R11 */ \
+ "or 3,3,3\n\t"
#endif /* ARCH_ppc32 */
=20
/* --------------------------- ppc64 --------------------------- */
@@ -693,6 +711,76 @@
=20
/* --------------------------- ppc32 --------------------------- */
=20
+/* ARGREGS: r3 r4 r5 r6 r7 r8 r9 r10 (the rest on stack somewhere) */
+
+/* These regs are trashed by the hidden call. */
+#define __CALLER_SAVED_REGS "lr", \
+ "r0", "r2", "r3", "r4", "r5", "r6", \
+ "r7", "r8", "r9", "r10", "r11", "r12"
+
+/* These CALL_FN_ macros assume that on ppc32-linux, sizeof(unsigned
+ long) =3D=3D 4. */
+
+#define CALL_FN_W_v(lval, fnptr) \
+ do { \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[1]; \
+ volatile unsigned long _res; \
+ _argvec[0] =3D (unsigned long)_fnptr; \
+ __asm__ volatile( \
+ "mr 11,%1\n\t" \
+ "lwz 11,0(11)\n\t" /* target->r11 */ \
+ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R11 \
+ "mr %0,3" \
+ : /*out*/ "=3Dr" (_res) \
+ : /*in*/ "r" (&_argvec[0]) \
+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval =3D (__typeof__(lval)) _res; \
+ } while (0)
+
+#define CALL_FN_W_W(lval, fnptr, arg1) \
+ do { \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[2]; \
+ volatile unsigned long _res; \
+ _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[1] =3D (unsigned long)arg1; \
+ __asm__ volatile( \
+ "mr 11,%1\n\t" \
+ "lwz 3,4(11)\n\t" /* arg1->r3 */ \
+ "lwz 11,0(11)\n\t" /* target->r11 */ \
+ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R11 \
+ "mr %0,3" \
+ : /*out*/ "=3Dr" (_res) \
+ : /*in*/ "r" (&_argvec[0]) \
+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval =3D (__typeof__(lval)) _res; \
+ } while (0)
+
+#define CALL_FN_W_WW(lval, fnptr, arg1,arg2) \
+ do { \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[3]; \
+ volatile unsigned long _res; \
+ _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[1] =3D (unsigned long)arg1; \
+ _argvec[2] =3D (unsigned long)arg2; \
+ __asm__ volatile( \
+ "mr 11,%1\n\t" \
+ "lwz 3,4(11)\n\t" /* arg1->r3 */ \
+ "lwz 4,8(11)\n\t" \
+ "lwz 11,0(11)\n\t" /* target->r11 */ \
+ VALGRIND_BRANCH_AND_LINK_TO_NOREDIR_R11 \
+ "mr %0,3" \
+ : /*out*/ "=3Dr" (_res) \
+ : /*in*/ "r" (&_argvec[0]) \
+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval =3D (__typeof__(lval)) _res; \
+ } while (0)
+
/* --------------------------- ppc64 --------------------------- */
=20
=20
|
|
From: <sv...@va...> - 2006-01-10 20:39:11
|
Author: sewardj
Date: 2006-01-10 20:39:03 +0000 (Tue, 10 Jan 2006)
New Revision: 1535
Log:
Make function wrapping work on ppc32-linux.
Modified:
branches/FNWRAP/priv/guest-ppc32/toIR.c
branches/FNWRAP/priv/host-ppc32/hdefs.c
Modified: branches/FNWRAP/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/priv/guest-ppc32/toIR.c 2006-01-10 08:01:07 UTC (rev =
1534)
+++ branches/FNWRAP/priv/guest-ppc32/toIR.c 2006-01-10 20:39:03 UTC (rev =
1535)
@@ -77,7 +77,28 @@
results would then be zeroed, too.
*/
=20
+/* "Special" instructions.
=20
+ This instruction decoder can decode three special instructions
+ which mean nothing natively (are no-ops as far as regs/mem are
+ concerned) but have meaning for supporting Valgrind. A special
+ instruction is flagged by the 16-byte preamble 54001800 54006800
+ 5400E800 54009800 (in the standard interpretation, that means:
+ rlwinm 0,0,3,0,0; rlwinm 0,0,13,0,0; rlwinm 0,0,29,0,0; rlwinm
+ 0,0,19,0,0). Following that, one of the following 3 are allowed
+ (standard interpretation in parentheses):
+
+ 7C210B78 (or 1,1,1) %R3 =3D client_request ( %R4 )
+ 7C421378 (or 2,2,2) %R3 =3D guest_NRADDR
+ 7C631B78 (or 3,3,3) branch-and-link-to-noredir %R11
+
+ Any other bytes following the 16-byte preamble are illegal and
+ constitute a failure in instruction decoding. This all assumes
+ that the preamble will never occur except in specific code
+ fragments designed for Valgrind to catch.
+*/
+
+
/* Translates PPC32 & PPC64 code to IR. */
=20
/* References
@@ -199,7 +220,9 @@
#define OFFB64_TILEN offsetof(VexGuestPPC64State,guest_TILEN)
=20
#define OFFB64_RESVN offsetof(VexGuestPPC64State,guest_RESVN)
+#define OFFB64_NRADDR offsetof(VexGuestPPC64State,guest_NRADDR)
=20
+
// 32-bit offsets
#define OFFB32_CIA offsetof(VexGuestPPC32State,guest_CIA)
#define OFFB32_LR offsetof(VexGuestPPC32State,guest_LR)
@@ -221,6 +244,7 @@
#define OFFB32_TILEN offsetof(VexGuestPPC32State,guest_TILEN)
=20
#define OFFB32_RESVN offsetof(VexGuestPPC32State,guest_RESVN)
+#define OFFB32_NRADDR offsetof(VexGuestPPC32State,guest_NRADDR)
=20
=20
/*------------------------------------------------------------*/
@@ -7867,33 +7891,56 @@
if (put_IP)
putGST( PPC_GST_CIA, mkSzImm(ty, guest_CIA_curr_instr) );
=20
- /* Spot the client-request magic sequence. */
- // Essentially a v. unlikely sequence of noops that we can catch
+ /* Spot "Special" instructions (see comment at top of file). */
{
- UChar* code =3D (UChar*)(&guest_code[delta]);
-
- /* Spot this: =20
- 0x7C03D808 tw 0,3,27 =3D> trap word if (0) =3D> no=
p
- 0x5400E800 rlwinm 0,0,29,0,0 =3D> r0 =3D rotl(r0,29)
- 0x54001800 rlwinm 0,0, 3,0,0 =3D> r0 =3D rotl(r0, 3)
- 0x54006800 rlwinm 0,0,13,0,0 =3D> r0 =3D rotl(r0,13)
- 0x54009800 rlwinm 0,0,19,0,0 =3D> r0 =3D rotl(r0,19)
- 0x60000000 nop
+ UChar* code =3D (UChar*)(guest_code + delta);
+ /* Spot the 16-byte preamble:
+ 54001800 rlwinm 0,0,3,0,0
+ 54006800 rlwinm 0,0,13,0,0
+ 5400E800 rlwinm 0,0,29,0,0
+ 54009800 rlwinm 0,0,19,0,0
*/
- if (getUIntBigendianly(code+ 0) =3D=3D 0x7C03D808 &&
- getUIntBigendianly(code+ 4) =3D=3D 0x5400E800 &&
- getUIntBigendianly(code+ 8) =3D=3D 0x54001800 &&
- getUIntBigendianly(code+12) =3D=3D 0x54006800 &&
- getUIntBigendianly(code+16) =3D=3D 0x54009800 &&
- getUIntBigendianly(code+20) =3D=3D 0x60000000) {
- DIP("%%r3 =3D client_request ( %%r31 )\n");
- dres.len =3D 24;
- delta +=3D 24;
-
- irbb->next =3D mkSzImm( ty, guest_CIA_bbstart + delta );
- irbb->jumpkind =3D Ijk_ClientReq;
- dres.whatNext =3D Dis_StopHere;
- goto decode_success;
+ if (getUIntBigendianly(code+ 0) =3D=3D 0x54001800 &&
+ getUIntBigendianly(code+ 4) =3D=3D 0x54006800 &&
+ getUIntBigendianly(code+ 8) =3D=3D 0x5400E800 &&
+ getUIntBigendianly(code+12) =3D=3D 0x54009800) {
+ /* Got a "Special" instruction preamble. Which one is it? */
+ if (getUIntBigendianly(code+16) =3D=3D 0x7C210B78 /* or 1,1,1 *=
/) {
+ /* %R3 =3D client_request ( %R4 ) */
+ DIP("r3 =3D client_request ( %%r4 )\n");
+ delta +=3D 20;
+ irbb->next =3D mkSzImm( ty, guest_CIA_bbstart + delta );
+ irbb->jumpkind =3D Ijk_ClientReq;
+ dres.whatNext =3D Dis_StopHere;
+ goto decode_success;
+ }
+ else
+ if (getUIntBigendianly(code+16) =3D=3D 0x7C421378 /* or 2,2,2 *=
/) {
+ /* %R3 =3D guest_NRADDR */
+ DIP("r3 =3D guest_NRADDR\n");
+ delta +=3D 20;
+ dres.len =3D 20;
+ putIReg(3, IRExpr_Get( mode64 ? OFFB64_NRADDR : OFFB32_NRADD=
R, ty ));
+ goto decode_success;
+ }
+ else
+ if (getUIntBigendianly(code+16) =3D=3D 0x7C631B78 /* or 3,3,3 *=
/) {
+ /* branch-and-link-to-noredir %R11 */
+ DIP("branch-and-link-to-noredir r11\n");
+ delta +=3D 20;
+ putGST( PPC_GST_LR, mkSzImm(ty, guest_CIA_bbstart + delta) );
+ irbb->next =3D getIReg(11);
+ irbb->jumpkind =3D Ijk_NoRedir;
+ dres.whatNext =3D Dis_StopHere;
+ goto decode_success;
+ }
+ /* We don't know what it is. Set opc1/opc2 so decode_failure
+ can print the insn following the Special-insn preamble. */
+ theInstr =3D getUIntBigendianly(code+16);
+ opc1 =3D ifieldOPC(theInstr);
+ opc2 =3D ifieldOPClo10(theInstr);
+ goto decode_failure;
+ /*NOTREACHED*/
}
}
=20
@@ -8420,7 +8467,11 @@
/* All decode successes end up here. */
DIP("\n");
=20
- dres.len =3D 4;
+ if (dres.len =3D=3D 0) {
+ dres.len =3D 4;
+ } else {
+ vassert(dres.len =3D=3D 20);
+ }
return dres;
}
=20
Modified: branches/FNWRAP/priv/host-ppc32/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/priv/host-ppc32/hdefs.c 2006-01-10 08:01:07 UTC (rev =
1534)
+++ branches/FNWRAP/priv/host-ppc32/hdefs.c 2006-01-10 20:39:03 UTC (rev =
1535)
@@ -2591,6 +2591,7 @@
case Ijk_MapFail: trc =3D VEX_TRC_JMP_MAPFAIL; break;
case Ijk_NoDecode: trc =3D VEX_TRC_JMP_NODECODE; break;
case Ijk_TInval: trc =3D VEX_TRC_JMP_TINVAL; break;
+ case Ijk_NoRedir: trc =3D VEX_TRC_JMP_NOREDIR; break;
case Ijk_Ret:
case Ijk_Call:
case Ijk_Boring:
|
|
From: <sv...@va...> - 2006-01-10 16:21:11
|
Author: sewardj
Date: 2006-01-10 16:21:07 +0000 (Tue, 10 Jan 2006)
New Revision: 5511
Log:
Make this work the same on both 32- and 64-bit platforms.
Modified:
branches/FNWRAP/memcheck/tests/wrap6.c
branches/FNWRAP/memcheck/tests/wrap6.stdout.exp
Modified: branches/FNWRAP/memcheck/tests/wrap6.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/memcheck/tests/wrap6.c 2006-01-10 16:12:16 UTC (rev 5=
510)
+++ branches/FNWRAP/memcheck/tests/wrap6.c 2006-01-10 16:21:07 UTC (rev 5=
511)
@@ -8,27 +8,27 @@
attempt to shake out any problems caused by insufficient saving of
caller-save registers around the hidden call instruction. */
=20
-typedef unsigned long UWord;
+typedef unsigned int UInt;
=20
-#define ROL(_x,n) (((_x) << n) | ((UWord)(_x)) >> ((8*sizeof(UWord)-n)))
+#define ROL(_x,n) (((_x) << n) | ((UInt)(_x)) >> ((8*sizeof(UInt)-n)))
=20
#define TRASH_IREGS(_rlval, _vec) \
do { \
- UWord* vec =3D (_vec); \
+ UInt* vec =3D (_vec); \
/* x86 spills for v > 4, amd64 for v > 12. */ \
- UWord i, sum =3D 0; \
- UWord v1 =3D vec[1-1]; \
- UWord v2 =3D vec[2-1]; \
- UWord v3 =3D vec[3-1]; \
- UWord v4 =3D vec[4-1]; \
- UWord v5 =3D vec[5-1]; \
- UWord v6 =3D vec[6-1]; \
- UWord v7 =3D vec[7-1]; \
- UWord v8 =3D vec[8-1]; \
- UWord v9 =3D vec[9-1]; \
- UWord v10 =3D vec[10-1]; \
- UWord v11 =3D vec[11-1]; \
- UWord v12 =3D vec[12-1]; \
+ UInt i, sum =3D 0; \
+ UInt v1 =3D vec[1-1]; \
+ UInt v2 =3D vec[2-1]; \
+ UInt v3 =3D vec[3-1]; \
+ UInt v4 =3D vec[4-1]; \
+ UInt v5 =3D vec[5-1]; \
+ UInt v6 =3D vec[6-1]; \
+ UInt v7 =3D vec[7-1]; \
+ UInt v8 =3D vec[8-1]; \
+ UInt v9 =3D vec[9-1]; \
+ UInt v10 =3D vec[10-1]; \
+ UInt v11 =3D vec[11-1]; \
+ UInt v12 =3D vec[12-1]; \
for (i =3D 0; i < 50; i++) { \
v1 =3D ROL(v1,1); \
v2 =3D ROL(v2,2); \
@@ -59,18 +59,18 @@
=20
/* --------------- 0 --------------- */ =20
=20
-UWord fn_0 ( void )
+UInt fn_0 ( void )
{
- UWord r;
- UWord* words =3D calloc(200, sizeof(UWord));
+ UInt r;
+ UInt* words =3D calloc(200, sizeof(UInt));
TRASH_IREGS(r, words);
free(words);
return r;
}
=20
-UWord I_WRAP_SONAME_FNNAME_ZU(NONE,fn_0) ( UWord a1 )
+UInt I_WRAP_SONAME_FNNAME_ZU(NONE,fn_0) ( UInt a1 )
{
- UWord r;
+ UInt r;
void* fn;
VALGRIND_GET_ORIG_FN(fn);
printf("fn_0 wrapper pre ()\n");
@@ -83,19 +83,19 @@
=20
/* --------------- 1 --------------- */ =20
=20
-UWord fn_1 ( UWord a1 )
+UInt fn_1 ( UInt a1 )
{
- UWord r;
- UWord* words =3D calloc(200, sizeof(UWord));
+ UInt r;
+ UInt* words =3D calloc(200, sizeof(UInt));
words[1-1] =3D a1;
TRASH_IREGS(r, words);
free(words);
return r;
}
=20
-UWord I_WRAP_SONAME_FNNAME_ZU(NONE,fn_1) ( UWord a1 )
+UInt I_WRAP_SONAME_FNNAME_ZU(NONE,fn_1) ( UInt a1 )
{
- UWord r;
+ UInt r;
void* fn;
VALGRIND_GET_ORIG_FN(fn);
printf("fn_1 wrapper pre ( %d )\n", (int)a1);
@@ -108,10 +108,10 @@
=20
/* --------------- 2 --------------- */ =20
=20
-UWord fn_2 ( UWord a1, UWord a2 )
+UInt fn_2 ( UInt a1, UInt a2 )
{
- UWord r;
- UWord* words =3D calloc(200, sizeof(UWord));
+ UInt r;
+ UInt* words =3D calloc(200, sizeof(UInt));
words[1-1] =3D a1;
words[2-1] =3D a2;
TRASH_IREGS(r, words);
@@ -119,9 +119,9 @@
return r;
}
=20
-UWord I_WRAP_SONAME_FNNAME_ZU(NONE,fn_2) ( UWord a1, UWord a2 )
+UInt I_WRAP_SONAME_FNNAME_ZU(NONE,fn_2) ( UInt a1, UInt a2 )
{
- UWord r;
+ UInt r;
void* fn;
VALGRIND_GET_ORIG_FN(fn);
printf("fn_2 wrapper pre ( %d, %d )\n", (int)a1, (int)a2);
@@ -136,7 +136,7 @@
=20
int main ( void )
{
- UWord w;
+ UInt w;
=20
printf("fn_0 ...\n");
w =3D fn_0();
Modified: branches/FNWRAP/memcheck/tests/wrap6.stdout.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/memcheck/tests/wrap6.stdout.exp 2006-01-10 16:12:16 U=
TC (rev 5510)
+++ branches/FNWRAP/memcheck/tests/wrap6.stdout.exp 2006-01-10 16:21:07 U=
TC (rev 5511)
@@ -6,13 +6,13 @@
=20
fn_1 ...
fn_1 wrapper pre ( 42 )
-fn_1 wrapper post1 =3D -52
-fn_1 wrapper post2 =3D -52
- ... -52
+fn_1 wrapper post1 =3D -13631437
+fn_1 wrapper post2 =3D -13631437
+ ... -13631437
=20
fn_2 ...
fn_2 wrapper pre ( 42, 43 )
-fn_2 wrapper post1 =3D 2617
-fn_2 wrapper post2 =3D 2617
- ... 2617
+fn_2 wrapper post1 =3D 201956282
+fn_2 wrapper post2 =3D 201956282
+ ... 201956282
=20
|
|
From: <sv...@va...> - 2006-01-10 16:12:21
|
Author: sewardj
Date: 2006-01-10 16:12:16 +0000 (Tue, 10 Jan 2006)
New Revision: 5510
Log:
Common up CALL_FN_v_* macros.
Modified:
branches/FNWRAP/include/valgrind.h
Modified: branches/FNWRAP/include/valgrind.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/include/valgrind.h 2006-01-10 15:56:59 UTC (rev 5509)
+++ branches/FNWRAP/include/valgrind.h 2006-01-10 16:12:16 UTC (rev 5510)
@@ -348,6 +348,21 @@
one of the CALL_FN_ macros. */
#define VALGRIND_GET_ORIG_FN(_lval) VALGRIND_GET_NRADDR(_lval)
=20
+/* Derivatives of the main macros below, for calling functions
+ returning void. */
+
+#define CALL_FN_v_v(fnptr) \
+ do { volatile unsigned long _junk; \
+ CALL_FN_W_v(_junk,fnptr); } while (0)
+
+#define CALL_FN_v_W(fnptr, arg1) \
+ do { volatile unsigned long _junk; \
+ CALL_FN_W_W(_junk,fnptr,arg1); } while (0)
+
+#define CALL_FN_v_WW(fnptr, arg1,arg2) \
+ do { volatile unsigned long _junk; \
+ CALL_FN_W_WW(_junk,fnptr,arg1,arg2); } while (0)
+
/* ---------------------------- x86 ---------------------------- */
=20
#if defined(ARCH_x86)
@@ -375,9 +390,6 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
-#define CALL_FN_v_v(fnptr) \
- do { unsigned long _junk; CALL_FN_W_v(_junk,fnptr); } while (0)
-
#define CALL_FN_W_W(lval, fnptr, arg1) \
do { \
volatile void* _fnptr =3D (fnptr); \
@@ -639,11 +651,6 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
-#define CALL_FN_v_v(fnptr) \
- do { volatile unsigned long _junk; \
- CALL_FN_W_v(_junk,fnptr); } while (0)
-
-
#define CALL_FN_W_W(lval, fnptr, arg1) \
do { \
volatile void* _fnptr =3D (fnptr); \
@@ -662,11 +669,6 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
-#define CALL_FN_v_W(fnptr, arg1) \
- do { volatile unsigned long _junk; \
- CALL_FN_W_W(_junk,fnptr,arg1); } while (0)
-
-
#define CALL_FN_W_WW(lval, fnptr, arg1,arg2) \
do { \
volatile void* _fnptr =3D (fnptr); \
@@ -687,10 +689,6 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
-#define CALL_FN_v_WW(fnptr, arg1,arg2) \
- do { volatile unsigned long _junk; \
- CALL_FN_W_WW(_junk,fnptr,arg1,arg2); } while (0)
-
#endif /* ARCH_amd64 */
=20
/* --------------------------- ppc32 --------------------------- */
|
|
From: <sv...@va...> - 2006-01-10 15:57:03
|
Author: sewardj
Date: 2006-01-10 15:56:59 +0000 (Tue, 10 Jan 2006)
New Revision: 5509
Log:
Oops, handle amd64 arity-2 orig calls.
Modified:
branches/FNWRAP/include/valgrind.h
Modified: branches/FNWRAP/include/valgrind.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/include/valgrind.h 2006-01-10 15:49:46 UTC (rev 5508)
+++ branches/FNWRAP/include/valgrind.h 2006-01-10 15:56:59 UTC (rev 5509)
@@ -643,6 +643,7 @@
do { volatile unsigned long _junk; \
CALL_FN_W_v(_junk,fnptr); } while (0)
=20
+
#define CALL_FN_W_W(lval, fnptr, arg1) \
do { \
volatile void* _fnptr =3D (fnptr); \
@@ -661,6 +662,35 @@
lval =3D (__typeof__(lval)) _res; \
} while (0)
=20
+#define CALL_FN_v_W(fnptr, arg1) \
+ do { volatile unsigned long _junk; \
+ CALL_FN_W_W(_junk,fnptr,arg1); } while (0)
+
+
+#define CALL_FN_W_WW(lval, fnptr, arg1,arg2) \
+ do { \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[3]; \
+ volatile unsigned long _res; \
+ _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[1] =3D (unsigned long)(arg1); \
+ _argvec[2] =3D (unsigned long)(arg2); \
+ __asm__ volatile( \
+ "movq 16(%%rax), %%rsi\n\t" \
+ "movq 8(%%rax), %%rdi\n\t" \
+ "movq (%%rax), %%rax\n\t" /* target->%rax */ \
+ VALGRIND_CALL_NOREDIR_RAX \
+ : /*out*/ "=3Da" (_res) \
+ : /*in*/ "a" (&_argvec[0]) \
+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval =3D (__typeof__(lval)) _res; \
+ } while (0)
+
+#define CALL_FN_v_WW(fnptr, arg1,arg2) \
+ do { volatile unsigned long _junk; \
+ CALL_FN_W_WW(_junk,fnptr,arg1,arg2); } while (0)
+
#endif /* ARCH_amd64 */
=20
/* --------------------------- ppc32 --------------------------- */
|
|
From: <sv...@va...> - 2006-01-10 15:49:59
|
Author: sewardj
Date: 2006-01-10 15:49:46 +0000 (Tue, 10 Jan 2006)
New Revision: 5508
Log:
Add another function wrapping test.
Added:
branches/FNWRAP/memcheck/tests/wrap6.c
branches/FNWRAP/memcheck/tests/wrap6.stderr.exp
branches/FNWRAP/memcheck/tests/wrap6.stdout.exp
branches/FNWRAP/memcheck/tests/wrap6.vgtest
Modified:
branches/FNWRAP/memcheck/tests/Makefile.am
Modified: branches/FNWRAP/memcheck/tests/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/memcheck/tests/Makefile.am 2006-01-10 08:02:41 UTC (r=
ev 5507)
+++ branches/FNWRAP/memcheck/tests/Makefile.am 2006-01-10 15:49:46 UTC (r=
ev 5508)
@@ -107,6 +107,7 @@
wrap3.vgtest wrap3.stdout.exp wrap3.stderr.exp \
wrap4.vgtest wrap4.stdout.exp wrap4.stderr.exp \
wrap5.vgtest wrap5.stdout.exp wrap5.stderr.exp \
+ wrap6.vgtest wrap6.stdout.exp wrap6.stderr.exp \
writev.stderr.exp writev.stderr.exp2 writev.stderr.exp3 writev.vgtest \
xml1.stderr.exp xml1.stderr.exp2 xml1.stderr.exp3 \
xml1.stderr.exp64 xml1.stderr.exp64_2 xml1.stdout.exp \
@@ -140,7 +141,7 @@
trivialleak \
mismatches new_override metadata \
xml1 \
- wrap1 wrap2 wrap3 wrap4 wrap5 \
+ wrap1 wrap2 wrap3 wrap4 wrap5 wrap6 \
writev zeropage
=20
=20
Added: branches/FNWRAP/memcheck/tests/wrap6.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/memcheck/tests/wrap6.c (rev 0=
)
+++ branches/FNWRAP/memcheck/tests/wrap6.c 2006-01-10 15:49:46 UTC (rev 5=
508)
@@ -0,0 +1,155 @@
+
+#include <stdlib.h>
+#include <stdio.h>
+#include "valgrind.h"
+
+/* Program that checks all numbers of args (0 through 12) work for
+ wrapping. Also calls originals which trash all the iregs in an
+ attempt to shake out any problems caused by insufficient saving of
+ caller-save registers around the hidden call instruction. */
+
+typedef unsigned long UWord;
+
+#define ROL(_x,n) (((_x) << n) | ((UWord)(_x)) >> ((8*sizeof(UWord)-n)))
+
+#define TRASH_IREGS(_rlval, _vec) \
+ do { \
+ UWord* vec =3D (_vec); \
+ /* x86 spills for v > 4, amd64 for v > 12. */ \
+ UWord i, sum =3D 0; \
+ UWord v1 =3D vec[1-1]; \
+ UWord v2 =3D vec[2-1]; \
+ UWord v3 =3D vec[3-1]; \
+ UWord v4 =3D vec[4-1]; \
+ UWord v5 =3D vec[5-1]; \
+ UWord v6 =3D vec[6-1]; \
+ UWord v7 =3D vec[7-1]; \
+ UWord v8 =3D vec[8-1]; \
+ UWord v9 =3D vec[9-1]; \
+ UWord v10 =3D vec[10-1]; \
+ UWord v11 =3D vec[11-1]; \
+ UWord v12 =3D vec[12-1]; \
+ for (i =3D 0; i < 50; i++) { \
+ v1 =3D ROL(v1,1); \
+ v2 =3D ROL(v2,2); \
+ v3 =3D ROL(v3,3); \
+ v4 =3D ROL(v4,4); \
+ v5 =3D ROL(v5,5); \
+ v6 =3D ROL(v6,6); \
+ v7 =3D ROL(v7,7); \
+ v8 =3D ROL(v8,8); \
+ v9 =3D ROL(v9,9); \
+ v10 =3D ROL(v10,10); \
+ v11 =3D ROL(v11,11); \
+ v12 =3D ROL(v12,12); \
+ sum ^=3D (v1-v2); \
+ sum ^=3D (v1-v3); \
+ sum ^=3D (v1-v4); \
+ sum ^=3D (v1-v5); \
+ sum ^=3D (v1-v6); \
+ sum ^=3D (v1-v7); \
+ sum ^=3D (v1-v8); \
+ sum ^=3D (v1-v9); \
+ sum ^=3D (v1-v10); \
+ sum ^=3D (v1-v11); \
+ sum ^=3D (v1-v12); \
+ } \
+ _rlval =3D sum; \
+ } while (0)
+
+/* --------------- 0 --------------- */ =20
+
+UWord fn_0 ( void )
+{
+ UWord r;
+ UWord* words =3D calloc(200, sizeof(UWord));
+ TRASH_IREGS(r, words);
+ free(words);
+ return r;
+}
+
+UWord I_WRAP_SONAME_FNNAME_ZU(NONE,fn_0) ( UWord a1 )
+{
+ UWord r;
+ void* fn;
+ VALGRIND_GET_ORIG_FN(fn);
+ printf("fn_0 wrapper pre ()\n");
+ CALL_FN_W_v(r, fn);
+ printf("fn_0 wrapper post1 =3D %d\n", (int)r);
+ CALL_FN_v_v(fn);
+ printf("fn_0 wrapper post2 =3D %d\n", (int)r);
+ return r;
+}
+
+/* --------------- 1 --------------- */ =20
+
+UWord fn_1 ( UWord a1 )
+{
+ UWord r;
+ UWord* words =3D calloc(200, sizeof(UWord));
+ words[1-1] =3D a1;
+ TRASH_IREGS(r, words);
+ free(words);
+ return r;
+}
+
+UWord I_WRAP_SONAME_FNNAME_ZU(NONE,fn_1) ( UWord a1 )
+{
+ UWord r;
+ void* fn;
+ VALGRIND_GET_ORIG_FN(fn);
+ printf("fn_1 wrapper pre ( %d )\n", (int)a1);
+ CALL_FN_W_W(r, fn, a1);
+ printf("fn_1 wrapper post1 =3D %d\n", (int)r);
+ CALL_FN_v_W(fn, a1);
+ printf("fn_1 wrapper post2 =3D %d\n", (int)r);
+ return r;
+}
+
+/* --------------- 2 --------------- */ =20
+
+UWord fn_2 ( UWord a1, UWord a2 )
+{
+ UWord r;
+ UWord* words =3D calloc(200, sizeof(UWord));
+ words[1-1] =3D a1;
+ words[2-1] =3D a2;
+ TRASH_IREGS(r, words);
+ free(words);
+ return r;
+}
+
+UWord I_WRAP_SONAME_FNNAME_ZU(NONE,fn_2) ( UWord a1, UWord a2 )
+{
+ UWord r;
+ void* fn;
+ VALGRIND_GET_ORIG_FN(fn);
+ printf("fn_2 wrapper pre ( %d, %d )\n", (int)a1, (int)a2);
+ CALL_FN_W_WW(r, fn, a1, a2);
+ printf("fn_2 wrapper post1 =3D %d\n", (int)r);
+ CALL_FN_v_WW(fn, a1, a2);
+ printf("fn_2 wrapper post2 =3D %d\n", (int)r);
+ return r;
+}
+
+/* --------------- main --------------- */ =20
+
+int main ( void )
+{
+ UWord w;
+
+ printf("fn_0 ...\n");
+ w =3D fn_0();
+ printf(" ... %d\n\n", (int)w);
+
+ printf("fn_1 ...\n");
+ w =3D fn_1(42);
+ printf(" ... %d\n\n", (int)w);
+
+ printf("fn_2 ...\n");
+ w =3D fn_2(42,43);
+ printf(" ... %d\n\n", (int)w);
+
+ return 0;
+}
+
Added: branches/FNWRAP/memcheck/tests/wrap6.stderr.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Added: branches/FNWRAP/memcheck/tests/wrap6.stdout.exp
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/memcheck/tests/wrap6.stdout.exp =
(rev 0)
+++ branches/FNWRAP/memcheck/tests/wrap6.stdout.exp 2006-01-10 15:49:46 U=
TC (rev 5508)
@@ -0,0 +1,18 @@
+fn_0 ...
+fn_0 wrapper pre ()
+fn_0 wrapper post1 =3D 0
+fn_0 wrapper post2 =3D 0
+ ... 0
+
+fn_1 ...
+fn_1 wrapper pre ( 42 )
+fn_1 wrapper post1 =3D -52
+fn_1 wrapper post2 =3D -52
+ ... -52
+
+fn_2 ...
+fn_2 wrapper pre ( 42, 43 )
+fn_2 wrapper post1 =3D 2617
+fn_2 wrapper post2 =3D 2617
+ ... 2617
+
Added: branches/FNWRAP/memcheck/tests/wrap6.vgtest
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/memcheck/tests/wrap6.vgtest (=
rev 0)
+++ branches/FNWRAP/memcheck/tests/wrap6.vgtest 2006-01-10 15:49:46 UTC (=
rev 5508)
@@ -0,0 +1,2 @@
+prog: wrap6
+vgopts: -q
|
|
From: <js...@ac...> - 2006-01-10 09:49:45
|
Nightly build on minnie ( SuSE 10.0, ppc32 ) started at 2006-01-10 05:00:01 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 176 tests, 16 stderr failures, 2 stdout failures ================= memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/stack_changes (stdout) memcheck/tests/stack_changes (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 176 tests, 16 stderr failures, 3 stdout failures ================= memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/stack_changes (stdout) memcheck/tests/stack_changes (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/mremap (stderr) none/tests/ppc32/jm-fp (stdout) none/tests/ppc32/jm-fp (stderr) none/tests/tls (stdout) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Tue Jan 10 05:23:00 2006 --- new.short Tue Jan 10 05:45:51 2006 *************** *** 8,10 **** ! == 176 tests, 16 stderr failures, 3 stdout failures ================= memcheck/tests/badjump (stderr) --- 8,10 ---- ! == 176 tests, 16 stderr failures, 2 stdout failures ================= memcheck/tests/badjump (stderr) *************** *** 27,29 **** none/tests/ppc32/jm-fp (stderr) - none/tests/tls (stdout) --- 27,28 ---- |
|
From: Cerion Armour-B. <ce...@op...> - 2006-01-10 09:37:26
|
On Tuesday 10 January 2006 01:43, Uttam Pawar wrote:
...
> > > > none/tests/ppc32/jm-insns (stdout)
> > > > none/tests/ppc32/jm-insns (stderr)
> > >
> > > These should not fail -- tests of the basic integer instruction set.
> > > Can you send
> > >
> > > none/tests/ppc32/jm-insns.stdout.diff and
> > > none/tests/ppc32/jm-insns.stderr.diff
> > >
> > > so we can see why they failed.
>
> Strangely, these 2 tests did pass on a PPC970, altivec supported machine
> but failed on power4 and power5 platform.
Not so strange - we developed on a ppc970 :-)
> $ cat none/tests/ppc32/jm-insns.stderr.diff
>
> *** jm-insns.stderr.exp 2005-11-25 04:36:08.000000000 -0800
> --- jm-insns.stderr.out 2006-01-06 14:07:49.000000000 -0800
> ***************
> *** 1 ****
> --- 2,18 ----
> + disInstr(ppc32): unhandled instruction: 0x........
> + primary 31(0x........), secondary 206(0x........)
> + Your program just tried to execute an instruction that Valgrind
> + did not recognise. There are two possible reasons for this.
> + 1. Your program has a bug and erroneously jumped to a non-code
> + location. If you are running Memcheck and you just saw a
> + warning about a bad jump, it's probably your program's fault.
> + 2. The instruction is legitimate but Valgrind doesn't handle it,
> + i.e. it's Valgrind's fault. If you think this is the case or
> + you are not sure, please let us know.
> + Either way, Valgrind will now raise a SIGILL signal which will
> + probably kill your program.
> +
> + Process terminating with default action of signal 4 (SIGILL)
> + Illegal opcode at address 0x........
> + at 0x........: build_viargs_table (in
> /home/pawar/valgrind-3.1.0/none/tests/ppc32/jm-insns) + by 0x........:
> main (in /home/pawar/valgrind-3.1.0/none/tests/ppc32/jm-insns)
Ok, it's a missing instruction.
Hmm - you're not getting the hex printouts...
Can you change VEX/priv/guest-ppc/toIR.c thusly:
vex_printf("disInstr(ppc): unhandled instruction: "
- "0x%x\n", theInstr);
+ "%u\n", theInstr);
Rebuild, run the test, and repost none/tests/ppc32/jm-insns.stderr.diff
- To run just that one test (from dir valgrind-3.1.0):
$ perl ./tests/vg_regtest ./none/tests/ppc32/jm-insns
> 2) File "none/tests/ppc32/jm-insns.stdout.diff" is quite large, so sending
> as an attachment with this email.
This is indicating no output at all by valgrind - ignore until we solve the
missing insn problem.
Thanks,
Cerion
|
|
From: <sv...@va...> - 2006-01-10 08:02:44
|
Author: sewardj
Date: 2006-01-10 08:02:41 +0000 (Tue, 10 Jan 2006)
New Revision: 5507
Log:
Function wrapping support for amd64.
Modified:
branches/FNWRAP/coregrind/m_redir.c
branches/FNWRAP/coregrind/m_scheduler/scheduler.c
branches/FNWRAP/include/pub_tool_machine.h
branches/FNWRAP/include/valgrind.h
Modified: branches/FNWRAP/coregrind/m_redir.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/coregrind/m_redir.c 2006-01-09 09:30:48 UTC (rev 5506=
)
+++ branches/FNWRAP/coregrind/m_redir.c 2006-01-10 08:02:41 UTC (rev 5507=
)
@@ -470,8 +470,17 @@
Kludge: because this can get called befor the trampoline area (a
bunch of magic 'to' addresses) has its ownership changed from V
to C, we can't check the 'to' address similarly. Sigh.
- */
- if (!is_plausible_guest_addr(act.from_addr)) {
+
+ amd64-linux hack: the vsysinfo pages appear to have no
+ permissions
+ ffffffffff600000-ffffffffffe00000 ---p 00000000 00:00 0
+ so skip the check for them. */
+ if (!is_plausible_guest_addr(act.from_addr)
+# if defined(VGP_amd64_linux)
+ && act.from_addr !=3D 0xFFFFFFFFFF600000ULL
+ && act.from_addr !=3D 0xFFFFFFFFFF600400ULL
+# endif
+ ) {
what =3D "redirection from-address is in non-executable area";
goto bad;
}
Modified: branches/FNWRAP/coregrind/m_scheduler/scheduler.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/coregrind/m_scheduler/scheduler.c 2006-01-09 09:30:48=
UTC (rev 5506)
+++ branches/FNWRAP/coregrind/m_scheduler/scheduler.c 2006-01-10 08:02:41=
UTC (rev 5507)
@@ -600,13 +600,13 @@
" pushl %ebp\n"
" pushl %ebx\n"
=20
-" movl 20(%esp), %esi\n"
-" movl 4(%esi), %ebp\n"
-" call *0(%esi)\n"
+" movl 20(%esp), %edi\n"
+" movl 4(%edi), %ebp\n"
+" call *0(%edi)\n"
=20
-" movl 20(%esp), %esi\n"
-" movl %eax, 8(%esi)\n"
-" movl %ebp, 12(%esi)\n"
+" movl 20(%esp), %edi\n"
+" movl %eax, 8(%edi)\n"
+" movl %ebp, 12(%edi)\n"
=20
" popl %ebx\n"
" popl %ebp\n"
@@ -615,6 +615,34 @@
" ret\n"
".previous\n"
);
+#elif defined(VGP_amd64_linux)
+asm("\n"
+".text\n"
+"run_a_translation:\n"
+" pushq %rbx\n"
+" pushq %rbp\n"
+" pushq %r12\n"
+" pushq %r13\n"
+" pushq %r14\n"
+" pushq %r15\n"
+
+" pushq %rdi\n" /* we will need it after running the translation */
+" movq 8(%rdi), %rbp\n"
+" call *0(%rdi)\n"
+
+" popq %rdi\n"
+" movq %rax, 16(%rdi)\n"
+" movq %rbp, 24(%rdi)\n"
+
+" popq %r15\n"
+" popq %r14\n"
+" popq %r13\n"
+" popq %r12\n"
+" popq %rbp\n"
+" popq %rbx\n"
+" ret\n"
+".previous\n"
+);
#else
# error "Not implemented"
#endif
Modified: branches/FNWRAP/include/pub_tool_machine.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/include/pub_tool_machine.h 2006-01-09 09:30:48 UTC (r=
ev 5506)
+++ branches/FNWRAP/include/pub_tool_machine.h 2006-01-10 08:02:41 UTC (r=
ev 5507)
@@ -34,13 +34,13 @@
#if defined(VGA_x86)
# define VG_MIN_INSTR_SZB 1 // min length of native instructi=
on
# define VG_MAX_INSTR_SZB 16 // max length of native instructi=
on
-# define VG_CLREQ_SZB 18 // length of a client request, ma=
y
+# define VG_CLREQ_SZB 14 // length of a client request, ma=
y
// be larger than VG_MAX_INSTR_=
SZB
# define VG_STACK_REDZONE_SZB 0 // number of addressable bytes be=
low SP
#elif defined(VGA_amd64)
# define VG_MIN_INSTR_SZB 1
# define VG_MAX_INSTR_SZB 16
-# define VG_CLREQ_SZB 18
+# define VG_CLREQ_SZB 19
# define VG_STACK_REDZONE_SZB 128
#elif defined(VGA_ppc32)
# define VG_MIN_INSTR_SZB 4
Modified: branches/FNWRAP/include/valgrind.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/include/valgrind.h 2006-01-09 09:30:48 UTC (rev 5506)
+++ branches/FNWRAP/include/valgrind.h 2006-01-10 08:02:41 UTC (rev 5507)
@@ -161,32 +161,33 @@
/* ---------------------------- x86 ---------------------------- */
=20
#if defined(ARCH_x86)
+#define __SPECIAL_INSTRUCTION_PREAMBLE \
+ "roll $3, %%edi ; roll $13, %%edi\n\t" \
+ "roll $29, %%edi ; roll $19, %%edi\n\t" \
+
#define VALGRIND_DO_CLIENT_REQUEST( \
_zzq_rlval, _zzq_default, _zzq_request, \
_zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4) \
- { unsigned int _zzq_args[5]; \
+ { volatile unsigned int _zzq_args[5]; \
+ volatile unsigned int _zzq_result; \
_zzq_args[0] =3D (unsigned int)(_zzq_request); \
_zzq_args[1] =3D (unsigned int)(_zzq_arg1); \
_zzq_args[2] =3D (unsigned int)(_zzq_arg2); \
_zzq_args[3] =3D (unsigned int)(_zzq_arg3); \
_zzq_args[4] =3D (unsigned int)(_zzq_arg4); \
- __asm__ volatile(/* "Special" instruction preamble */ \
- "roll $3, %%edi ; roll $13, %%edi\n\t" \
- "roll $29, %%edi ; roll $19, %%edi\n\t" \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
/* %EDX =3D client_request ( %EAX ) */ \
"xchgl %%ebx,%%ebx" \
- : "=3Dd" (_zzq_rlval) \
+ : "=3Dd" (_zzq_result) \
: "a" (&_zzq_args[0]), "0" (_zzq_default) \
: "cc", "memory" \
); \
+ _zzq_rlval =3D _zzq_result; \
}
=20
#define VALGRIND_GET_NRADDR(_zzq_rlval) \
- { unsigned int __addr; \
- __asm__ volatile("movl $0, %%eax\n\t" \
- /* "Special" instruction preamble */ \
- "roll $3, %%edi ; roll $13, %%edi\n\t" \
- "roll $29, %%edi ; roll $19, %%edi\n\t" \
+ { volatile unsigned int __addr; \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
/* %EAX =3D guest_NRADDR */ \
"xchgl %%ecx,%%ecx" \
: "=3Da" (__addr) \
@@ -197,9 +198,7 @@
}
=20
#define VALGRIND_CALL_NOREDIR_EAX \
- /* "Special" instruction preamble */ \
- "roll $3, %%edi ; roll $13, %%edi\n\t" \
- "roll $29, %%edi ; roll $19, %%edi\n\t" \
+ __SPECIAL_INSTRUCTION_PREAMBLE \
/* call-noredir *%EAX */ \
"xchgl %%edx,%%edx\n\t"
#endif /* ARCH_x86 */
@@ -207,24 +206,46 @@
/* --------------------------- amd64 --------------------------- */
=20
#if defined(ARCH_amd64)
+#define __SPECIAL_INSTRUCTION_PREAMBLE \
+ "rolq $3, %%rdi ; rolq $13, %%rdi\n\t" \
+ "rolq $61, %%rdi ; rolq $51, %%rdi\n\t" \
+
#define VALGRIND_DO_CLIENT_REQUEST( \
_zzq_rlval, _zzq_default, _zzq_request, \
_zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4) \
- \
- { volatile unsigned long long _zzq_args[5]; \
- _zzq_args[0] =3D (volatile unsigned long long)(_zzq_request); \
- _zzq_args[1] =3D (volatile unsigned long long)(_zzq_arg1); \
- _zzq_args[2] =3D (volatile unsigned long long)(_zzq_arg2); \
- _zzq_args[3] =3D (volatile unsigned long long)(_zzq_arg3); \
- _zzq_args[4] =3D (volatile unsigned long long)(_zzq_arg4); \
- __asm__ volatile("roll $29, %%eax ; roll $3, %%eax\n\t" \
- "rorl $27, %%eax ; rorl $5, %%eax\n\t" \
- "roll $13, %%eax ; roll $19, %%eax" \
- : "=3Dd" (_zzq_rlval) \
+ { volatile unsigned long long int _zzq_args[5]; \
+ volatile unsigned long long int _zzq_result; \
+ _zzq_args[0] =3D (unsigned long long int)(_zzq_request); \
+ _zzq_args[1] =3D (unsigned long long int)(_zzq_arg1); \
+ _zzq_args[2] =3D (unsigned long long int)(_zzq_arg2); \
+ _zzq_args[3] =3D (unsigned long long int)(_zzq_arg3); \
+ _zzq_args[4] =3D (unsigned long long int)(_zzq_arg4); \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
+ /* %RDX =3D client_request ( %RAX ) */ \
+ "xchgq %%rbx,%%rbx" \
+ : "=3Dd" (_zzq_result) \
: "a" (&_zzq_args[0]), "0" (_zzq_default) \
: "cc", "memory" \
); \
+ _zzq_rlval =3D _zzq_result; \
}
+
+#define VALGRIND_GET_NRADDR(_zzq_rlval) \
+ { volatile unsigned long long int __addr; \
+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \
+ /* %RAX =3D guest_NRADDR */ \
+ "xchgq %%rcx,%%rcx" \
+ : "=3Da" (__addr) \
+ : \
+ : "cc", "memory" \
+ ); \
+ _zzq_rlval =3D (void*)__addr; \
+ }
+
+#define VALGRIND_CALL_NOREDIR_RAX \
+ __SPECIAL_INSTRUCTION_PREAMBLE \
+ /* call-noredir *%RAX */ \
+ "xchgq %%rdx,%%rdx\n\t"
#endif /* ARCH_amd64 */
=20
/* --------------------------- ppc32 --------------------------- */
@@ -305,7 +326,7 @@
=20
The naming scheme is as follows:
=20
- CALL_FN_{W,v}_{v,W,WW,WWW,WWWW,WWWWW,WWWWWW,etc}
+ CALL_FN_{W,v}_{v,W,WW,WWW,WWWW,5W,6W,7W,etc}
=20
'W' stands for "word" and 'v' for "void". Hence there are
different macros for calling arity 0, 1, 2, 3, 4, etc, functions,
@@ -340,9 +361,9 @@
=20
#define CALL_FN_W_v(lval, fnptr) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[1]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[1]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
__asm__ volatile( \
"movl (%%eax), %%eax\n\t" /* target->%eax */ \
@@ -359,9 +380,9 @@
=20
#define CALL_FN_W_W(lval, fnptr, arg1) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[2]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[2]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
__asm__ volatile( \
@@ -378,9 +399,9 @@
=20
#define CALL_FN_W_WW(lval, fnptr, arg1,arg2) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[3]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[3]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -399,9 +420,9 @@
=20
#define CALL_FN_W_WWWW(lval, fnptr, arg1,arg2,arg3,arg4) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[5]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[5]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -424,9 +445,9 @@
=20
#define CALL_FN_W_5W(lval, fnptr, arg1,arg2,arg3,arg4,arg5) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[6]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[6]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -451,9 +472,9 @@
=20
#define CALL_FN_W_6W(lval, fnptr, arg1,arg2,arg3,arg4,arg5,arg6) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[7]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[7]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -481,9 +502,9 @@
#define CALL_FN_W_7W(lval, fnptr, arg1,arg2,arg3,arg4,arg5,arg6, \
arg7) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[8]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[8]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -513,9 +534,9 @@
#define CALL_FN_W_8W(lval, fnptr, arg1,arg2,arg3,arg4,arg5,arg6, \
arg7,arg8) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[9]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[9]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -548,9 +569,9 @@
arg6,arg7,arg8,arg9,arg10, \
arg11,arg12) \
do { \
- void* _fnptr =3D (fnptr); \
- unsigned long _argvec[13]; \
- unsigned long _res; \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[13]; \
+ volatile unsigned long _res; \
_argvec[0] =3D (unsigned long)_fnptr; \
_argvec[1] =3D (unsigned long)(arg1); \
_argvec[2] =3D (unsigned long)(arg2); \
@@ -591,6 +612,57 @@
=20
/* --------------------------- amd64 --------------------------- */
=20
+/* ARGREGS: rdi rsi rdx rcx r8 r9 (the rest on stack in R-to-L order) */
+
+#if defined(ARCH_amd64)
+
+/* These regs are trashed by the hidden call. */
+#define __CALLER_SAVED_REGS /*"rax",*/ "rcx", "rdx", "rsi", \
+ "rdi", "r8", "r9", "r10", "r11"
+
+/* These CALL_FN_ macros assume that on amd64-linux, sizeof(unsigned
+ long) =3D=3D 8. */
+
+#define CALL_FN_W_v(lval, fnptr) \
+ do { \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[1]; \
+ volatile unsigned long _res; \
+ _argvec[0] =3D (unsigned long)_fnptr; \
+ __asm__ volatile( \
+ "movq (%%rax), %%rax\n\t" /* target->%rax */ \
+ VALGRIND_CALL_NOREDIR_RAX \
+ : /*out*/ "=3Da" (_res) \
+ : /*in*/ "a" (&_argvec[0]) \
+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval =3D (__typeof__(lval)) _res; \
+ } while (0)
+
+#define CALL_FN_v_v(fnptr) \
+ do { volatile unsigned long _junk; \
+ CALL_FN_W_v(_junk,fnptr); } while (0)
+
+#define CALL_FN_W_W(lval, fnptr, arg1) \
+ do { \
+ volatile void* _fnptr =3D (fnptr); \
+ volatile unsigned long _argvec[2]; \
+ volatile unsigned long _res; \
+ _argvec[0] =3D (unsigned long)_fnptr; \
+ _argvec[1] =3D (unsigned long)(arg1); \
+ __asm__ volatile( \
+ "movq 8(%%rax), %%rdi\n\t" \
+ "movq (%%rax), %%rax\n\t" /* target->%rax */ \
+ VALGRIND_CALL_NOREDIR_RAX \
+ : /*out*/ "=3Da" (_res) \
+ : /*in*/ "a" (&_argvec[0]) \
+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS \
+ ); \
+ lval =3D (__typeof__(lval)) _res; \
+ } while (0)
+
+#endif /* ARCH_amd64 */
+
/* --------------------------- ppc32 --------------------------- */
=20
/* --------------------------- ppc64 --------------------------- */
|
|
From: <sv...@va...> - 2006-01-10 08:01:14
|
Author: sewardj
Date: 2006-01-10 08:01:07 +0000 (Tue, 10 Jan 2006)
New Revision: 1534
Log:
Function wrapping support for amd64.
Modified:
branches/FNWRAP/priv/guest-amd64/toIR.c
branches/FNWRAP/priv/host-amd64/hdefs.c
Modified: branches/FNWRAP/priv/guest-amd64/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/priv/guest-amd64/toIR.c 2006-01-07 22:58:54 UTC (rev =
1533)
+++ branches/FNWRAP/priv/guest-amd64/toIR.c 2006-01-10 08:01:07 UTC (rev =
1534)
@@ -122,6 +122,28 @@
sto{s,sb,sw,sd,sq}
xlat{,b} */
=20
+/* "Special" instructions.
+
+ This instruction decoder can decode three special instructions
+ which mean nothing natively (are no-ops as far as regs/mem are
+ concerned) but have meaning for supporting Valgrind. A special
+ instruction is flagged by the 16-byte preamble 48C1C703 48C1C70D
+ 48C1C73D 48C1C733 (in the standard interpretation, that means: rolq
+ $3, %rdi; rolq $13, %rdi; rolq $61, %rdi; rolq $51, %rdi).
+ Following that, one of the following 3 are allowed (standard
+ interpretation in parentheses):
+
+ 4887DB (xchgq %rbx,%rbx) %RDX =3D client_request ( %RAX )
+ 4887C9 (xchgq %rcx,%rcx) %RAX =3D guest_NRADDR
+ 4887D2 (xchgq %rdx,%rdx) call-noredir *%RAX
+
+ Any other bytes following the 16-byte preamble are illegal and
+ constitute a failure in instruction decoding. This all assumes
+ that the preamble will never occur except in specific code
+ fragments designed for Valgrind to catch.
+
+ No prefixes may precede a "Special" instruction. */
+
/* Translates AMD64 code to IR. */
=20
#include "libvex_basictypes.h"
@@ -396,7 +418,9 @@
=20
#define OFFB_EMWARN offsetof(VexGuestAMD64State,guest_EMWARN)
=20
+#define OFFB_NRADDR offsetof(VexGuestAMD64State,guest_NRADDR)
=20
+
/*------------------------------------------------------------*/
/*--- Helper bits and pieces for deconstructing the ---*/
/*--- amd64 insn stream. ---*/
@@ -7940,29 +7964,61 @@
if (put_IP)
stmt( IRStmt_Put( OFFB_RIP, mkU64(guest_RIP_curr_instr)) );
=20
- /* Spot the client-request magic sequence. */
+ /* Spot "Special" instructions (see comment at top of file). */
{
UChar* code =3D (UChar*)(guest_code + delta);
- /* Spot this:
- C1C01D roll $29, %eax
- C1C003 roll $3, %eax
- C1C81B rorl $27, %eax
- C1C805 rorl $5, %eax
- C1C00D roll $13, %eax
- C1C013 roll $19, %eax =20
+ /* Spot the 16-byte preamble:
+ 48C1C703 rolq $3, %rdi
+ 48C1C70D rolq $13, %rdi
+ 48C1C73D rolq $61, %rdi
+ 48C1C733 rolq $51, %rdi
*/
- if (code[ 0] =3D=3D 0xC1 && code[ 1] =3D=3D 0xC0 && code[ 2] =3D=3D=
0x1D &&
- code[ 3] =3D=3D 0xC1 && code[ 4] =3D=3D 0xC0 && code[ 5] =3D=3D=
0x03 &&
- code[ 6] =3D=3D 0xC1 && code[ 7] =3D=3D 0xC8 && code[ 8] =3D=3D=
0x1B &&
- code[ 9] =3D=3D 0xC1 && code[10] =3D=3D 0xC8 && code[11] =3D=3D=
0x05 &&
- code[12] =3D=3D 0xC1 && code[13] =3D=3D 0xC0 && code[14] =3D=3D=
0x0D &&
- code[15] =3D=3D 0xC1 && code[16] =3D=3D 0xC0 && code[17] =3D=3D=
0x13
- ) {
- DIP("%%edx =3D client_request ( %%eax )\n"); =20
- delta +=3D 18;
- jmp_lit(Ijk_ClientReq, guest_RIP_bbstart+delta);
- dres.whatNext =3D Dis_StopHere;
- goto decode_success;
+ if (code[ 0] =3D=3D 0x48 && code[ 1] =3D=3D 0xC1 && code[ 2] =3D=3D=
0xC7=20
+ && code[ 3] =3D=3D 0x03 &=
&
+ code[ 4] =3D=3D 0x48 && code[ 5] =3D=3D 0xC1 && code[ 6] =3D=3D=
0xC7=20
+ && code[ 7] =3D=3D 0x0D &=
&
+ code[ 8] =3D=3D 0x48 && code[ 9] =3D=3D 0xC1 && code[10] =3D=3D=
0xC7=20
+ && code[11] =3D=3D 0x3D &=
&
+ code[12] =3D=3D 0x48 && code[13] =3D=3D 0xC1 && code[14] =3D=3D=
0xC7=20
+ && code[15] =3D=3D 0x33) =
{
+ /* Got a "Special" instruction preamble. Which one is it? */
+ if (code[16] =3D=3D 0x48 && code[17] =3D=3D 0x87=20
+ && code[18] =3D=3D 0xDB /* xchgq %rbx,%rbx=
*/) {
+ /* %RDX =3D client_request ( %RAX ) */
+ DIP("%%rdx =3D client_request ( %%rax )\n");
+ delta +=3D 19;
+ jmp_lit(Ijk_ClientReq, guest_RIP_bbstart+delta);
+ dres.whatNext =3D Dis_StopHere;
+ goto decode_success;
+ }
+ else
+ if (code[16] =3D=3D 0x48 && code[17] =3D=3D 0x87=20
+ && code[18] =3D=3D 0xC9 /* xchgq %rcx,%rcx=
*/) {
+ /* %RAX =3D guest_NRADDR */
+ DIP("%%rax =3D guest_NRADDR\n");
+ delta +=3D 19;
+ putIRegRAX(8, IRExpr_Get( OFFB_NRADDR, Ity_I64 ));
+ goto decode_success;
+ }
+ else
+ if (code[16] =3D=3D 0x48 && code[17] =3D=3D 0x87=20
+ && code[18] =3D=3D 0xD2 /* xchgq %rdx,%rdx=
*/) {
+ /* call-noredir *%RAX */
+ DIP("call-noredir *%%rax\n");
+ delta +=3D 19;
+ t1 =3D newTemp(Ity_I64);
+ assign(t1, getIRegRAX(8));
+ t2 =3D newTemp(Ity_I64);
+ assign(t2, binop(Iop_Sub64, getIReg64(R_RSP), mkU64(8)));
+ putIReg64(R_RSP, mkexpr(t2));
+ storeLE( mkexpr(t2), mkU64(guest_RIP_bbstart+delta));
+ jmp_treg(Ijk_NoRedir,t1);
+ dres.whatNext =3D Dis_StopHere;
+ goto decode_success;
+ }
+ /* We don't know what it is. */
+ goto decode_failure;
+ /*NOTREACHED*/
}
}
=20
Modified: branches/FNWRAP/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/FNWRAP/priv/host-amd64/hdefs.c 2006-01-07 22:58:54 UTC (rev =
1533)
+++ branches/FNWRAP/priv/host-amd64/hdefs.c 2006-01-10 08:01:07 UTC (rev =
1534)
@@ -2606,6 +2606,9 @@
case Ijk_TInval:
*p++ =3D 0xBD;
p =3D emit32(p, VEX_TRC_JMP_TINVAL); break;
+ case Ijk_NoRedir:
+ *p++ =3D 0xBD;
+ p =3D emit32(p, VEX_TRC_JMP_NOREDIR); break;
case Ijk_Ret:
case Ijk_Call:
case Ijk_Boring:
|
|
From: <js...@ac...> - 2006-01-10 03:56:20
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2006-01-10 04:40:00 CET Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 179 tests, 93 stderr failures, 7 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/malloc_usable (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/oset_test (stderr) memcheck/tests/overlap (stderr) memcheck/tests/partial_load_dflt (stderr) memcheck/tests/partial_load_ok (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pipe (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stdout) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/stack_changes (stdout) memcheck/tests/stack_changes (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/strchr (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/with-space (stderr) memcheck/tests/writev (stderr) memcheck/tests/xml1 (stdout) memcheck/tests/xml1 (stderr) memcheck/tests/zeropage (stderr) massif/tests/toobig-allocs (stderr) none/tests/blockfault (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_creat (stderr) none/tests/fdleak_dup (stderr) none/tests/fdleak_dup2 (stderr) none/tests/fdleak_fcntl (stderr) none/tests/fdleak_ipv4 (stderr) none/tests/fdleak_open (stderr) none/tests/fdleak_pipe (stderr) none/tests/fdleak_socketpair (stderr) none/tests/mremap (stderr) none/tests/mremap2 (stdout) none/tests/sem (stderr) none/tests/shell_valid2 (stderr) none/tests/shell_valid3 (stderr) |
|
From: <js...@ac...> - 2006-01-10 03:56:17
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2006-01-10 03:30:01 GMT Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 209 tests, 5 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <to...@co...> - 2006-01-10 03:42:47
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2006-01-10 03:30:04 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 211 tests, 6 stderr failures, 2 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 211 tests, 7 stderr failures, 2 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Tue Jan 10 03:36:28 2006 --- new.short Tue Jan 10 03:42:41 2006 *************** *** 8,12 **** ! == 211 tests, 7 stderr failures, 2 stdout failures ================= memcheck/tests/leak-tree (stderr) - memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) --- 8,11 ---- ! == 211 tests, 6 stderr failures, 2 stdout failures ================= memcheck/tests/leak-tree (stderr) memcheck/tests/pointer-trace (stderr) |
|
From: Tom H. <th...@cy...> - 2006-01-10 03:23:37
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2006-01-10 03:00:59 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 230 tests, 4 stderr failures, 1 stdout failure ================= memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-01-10 03:22:53
|
Nightly build on dellow ( x86_64, Fedora Core 4 ) started at 2006-01-10 03:10:07 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 230 tests, 5 stderr failures, 3 stdout failures ================= memcheck/tests/leakotron (stdout) memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2006-01-10 03:18:37
|
Nightly build on aston ( x86_64, Fedora Core 3 ) started at 2006-01-10 03:05:05 GMT Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 230 tests, 5 stderr failures, 2 stdout failures ================= memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 230 tests, 6 stderr failures, 2 stdout failures ================= memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) memcheck/tests/x86/sse1_memory (stdout) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Tue Jan 10 03:12:15 2006 --- new.short Tue Jan 10 03:18:31 2006 *************** *** 8,11 **** ! == 230 tests, 6 stderr failures, 2 stdout failures ================= ! memcheck/tests/pointer-trace (stderr) memcheck/tests/x86/scalar (stderr) --- 8,10 ---- ! == 230 tests, 5 stderr failures, 2 stdout failures ================= memcheck/tests/x86/scalar (stderr) |
|
From: Tom H. <th...@cy...> - 2006-01-10 03:18:00
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2006-01-10 03:15:04 GMT
Results differ from 24 hours ago
Checking out valgrind source tree ... done
Configuring valgrind ... failed
Last 20 lines of verbose log follow echo
A valgrind/VEX/Makefile-icc
A valgrind/VEX/Makefile
A valgrind/VEX/LICENSE.README
U valgrind/VEX
Checked out external at revision 1533.
Checked out revision 5506.
Configuring valgrind ... cd valgrind && ./autogen.sh && ./configure --prefix=/tmp/valgrind.31661/Inst
running: aclocal
running: autoheader
running: automake -a
configure.in: installing `./install-sh'
configure.in: installing `./mkinstalldirs'
configure.in: installing `./missing'
configure.in:112: installing `./config.guess'
configure.in:112: installing `./config.sub'
addrcheck/Makefile.am: installing `./depcomp'
auxprogs/Makefile.am: installing `./compile'
DIST_SUBDIRS: variable `VG_ARCH_ALL' is used but `VG_ARCH_ALL' is undefined
error: while running 'automake -a'
=================================================
== Results from 24 hours ago ==
=================================================
Checking out valgrind source tree ... done
Configuring valgrind ... failed
Last 20 lines of verbose log follow echo
A valgrind/VEX/Makefile-icc
A valgrind/VEX/Makefile
A valgrind/VEX/LICENSE.README
U valgrind/VEX
Checked out external at revision 1533.
Checked out revision 5505.
Configuring valgrind ... cd valgrind && ./autogen.sh && ./configure --prefix=/tmp/valgrind.31661/Inst
running: aclocal
running: autoheader
running: automake -a
configure.in: installing `./install-sh'
configure.in: installing `./mkinstalldirs'
configure.in: installing `./missing'
configure.in:112: installing `./config.guess'
configure.in:112: installing `./config.sub'
addrcheck/Makefile.am: installing `./depcomp'
auxprogs/Makefile.am: installing `./compile'
DIST_SUBDIRS: variable `VG_ARCH_ALL' is used but `VG_ARCH_ALL' is undefined
error: while running 'automake -a'
=================================================
== Difference between 24 hours ago and now ==
=================================================
*** old.short Tue Jan 10 03:16:41 2006
--- new.short Tue Jan 10 03:17:48 2006
***************
*** 11,13 ****
! Checked out revision 5505.
Configuring valgrind ... cd valgrind && ./autogen.sh && ./configure --prefix=/tmp/valgrind.31661/Inst
--- 11,13 ----
! Checked out revision 5506.
Configuring valgrind ... cd valgrind && ./autogen.sh && ./configure --prefix=/tmp/valgrind.31661/Inst
|
|
From: Uttam P. <ut...@us...> - 2006-01-10 00:41:10
|
Hi Thanks for the reply. > > You've got the right place, and it's great you're testing, but as J asked in > reply to yr last post (i guess yr not subscribed): Initially my subscribe request/response email bounced back as a spam. That's why I never received an email from Julian, till this message. But now I've completed the subscribe procedure successfully. > > On Friday 06 January 2006 22:42, Julian Seward wrote: > > Thanks. Most of these are harmless - they happen on a PPC970 box > > too. We should improve our regression test mechanism so it only > > reports a failure when there really is one, but that's not as simple > > as it sounds. > > > > > none/tests/ppc32/jm-vmx (stdout) > > > none/tests/ppc32/jm-vmx (stderr) > > > none/tests/ppc32/testVMX (stdout) > > > none/tests/ppc32/testVMX (stderr) > > > > These are VMX (Altivec) tests. I presume they failed because POWER5 > > doesn't support Altivec (right?) You are right. > > > > > none/tests/ppc32/jm-insns (stdout) > > > none/tests/ppc32/jm-insns (stderr) > > > > These should not fail -- tests of the basic integer instruction set. > > Can you send > > > > none/tests/ppc32/jm-insns.stdout.diff and > > none/tests/ppc32/jm-insns.stderr.diff > > > > so we can see why they failed. Strangely, these 2 tests did pass on a PPC970, altivec supported machine but failed on power4 and power5 platform. $ cat none/tests/ppc32/jm-insns.stderr.diff *** jm-insns.stderr.exp 2005-11-25 04:36:08.000000000 -0800 --- jm-insns.stderr.out 2006-01-06 14:07:49.000000000 -0800 *************** *** 1 **** --- 2,18 ---- + disInstr(ppc32): unhandled instruction: 0x........ + primary 31(0x........), secondary 206(0x........) + Your program just tried to execute an instruction that Valgrind + did not recognise. There are two possible reasons for this. + 1. Your program has a bug and erroneously jumped to a non-code + location. If you are running Memcheck and you just saw a + warning about a bad jump, it's probably your program's fault. + 2. The instruction is legitimate but Valgrind doesn't handle it, + i.e. it's Valgrind's fault. If you think this is the case or + you are not sure, please let us know. + Either way, Valgrind will now raise a SIGILL signal which will + probably kill your program. + + Process terminating with default action of signal 4 (SIGILL) + Illegal opcode at address 0x........ + at 0x........: build_viargs_table (in /home/pawar/valgrind-3.1.0/none/tests/ppc32/jm-insns) + by 0x........: main (in /home/pawar/valgrind-3.1.0/none/tests/ppc32/jm-insns) 2) File "none/tests/ppc32/jm-insns.stdout.diff" is quite large, so sending as an attachment with this email. Thanks, Uttam |
|
From: Cerion Armour-B. <ce...@op...> - 2006-01-10 00:10:28
|
On Monday 09 January 2006 22:20, Uttam Pawar wrote: > Hi, > > I'm new to the valgrind community. I recently did a > complete build of valgrind-3.1.0 release on a Power5 machine. After doing > make regtest I found total of 21 tests failure. These may be known or not, > but I just wanted to report them to the mailing list anyway. > > 1) Results on power5 platform, > == 174 tests, 18 stderr failures, 3 stdout failures > ================= > memcheck/tests/badjump (stderr) > memcheck/tests/badjump2 (stderr) > memcheck/tests/leak-cycle (stderr) > memcheck/tests/leak-tree (stderr) > memcheck/tests/mempool (stderr) > memcheck/tests/partiallydefinedeq (stderr) > memcheck/tests/pointer-trace (stderr) > memcheck/tests/supp1 (stderr) > memcheck/tests/supp_unknown (stderr) > memcheck/tests/toobig-allocs (stderr) > memcheck/tests/xml1 (stderr) > massif/tests/toobig-allocs (stderr) > none/tests/faultstatus (stderr) > none/tests/fdleak_cmsg (stderr) > none/tests/mremap (stderr) > none/tests/ppc32/jm-insns (stdout) > none/tests/ppc32/jm-insns (stderr) > none/tests/ppc32/jm-vmx (stdout) > none/tests/ppc32/jm-vmx (stderr) > none/tests/ppc32/testVMX (stdout) > none/tests/ppc32/testVMX (stderr) > > make: *** [regtest] Error 1 > > Enviornment: > Hardware: Power5 (with 8 8 processors) > OS: Linux elm3b149 2.6.5-7.97-pseries64.nm #1 SMP Thu Mar > 31 10:55:11 PST 2005 ppc64 ppc64 ppc64 GNU/Linux (SLES9) GCC: gcc -v > Reading specs > from /usr/lib/gcc-lib/powerpc-suse-linux/3.3.3/specs > Configured with: ../configure --enable-threads=posix > --prefix=/usr > --with-local-prefix=/usr/local --infodir=/usr/share/info > --mandir=/usr/share/man --enable-languages=c,c > ++,f77,objc,java,ada > --disable-checking --libdir=/usr/lib --enable-libgcj > --with-gxx-include-dir=/usr/include/g++ --with-slibdir=/lib > --with-system-zlib --enable-shared --enable-__cxa_atexit > --host=powerpc-suse-linux --build=powerpc-suse-linux > --target=powerpc-suse-linux > --enable-targets=powerpc64-suse-linux > --enable-biarch > Thread model: posix > gcc version 3.3.3 (SuSE Linux) > > > > 2) Results on power4 platform, > > == 174 tests, 23 stderr failures, 4 stdout failures > ================= > memcheck/tests/badjump (stderr) > memcheck/tests/badjump2 (stderr) > memcheck/tests/leak-cycle (stderr) > memcheck/tests/leak-tree (stderr) > memcheck/tests/mempool (stderr) > memcheck/tests/partiallydefinedeq (stderr) > memcheck/tests/pointer-trace (stderr) > memcheck/tests/stack_switch (stderr) > memcheck/tests/supp1 (stderr) > memcheck/tests/supp_unknown (stderr) > memcheck/tests/toobig-allocs (stderr) > memcheck/tests/xml1 (stderr) > massif/tests/toobig-allocs (stderr) > none/tests/faultstatus (stderr) > none/tests/fdleak_cmsg (stderr) > none/tests/mremap (stderr) > none/tests/ppc32/jm-insns (stdout) > none/tests/ppc32/jm-insns (stderr) > none/tests/ppc32/jm-vmx (stdout) > none/tests/ppc32/jm-vmx (stderr) > none/tests/ppc32/testVMX (stdout) > none/tests/ppc32/testVMX (stderr) > none/tests/shell (stdout) > none/tests/shell (stderr) > none/tests/shell_valid1 (stderr) > none/tests/shell_valid2 (stderr) > none/tests/shell_valid3 (stderr) > > make: *** [regtest] Error 1 > > Enviornment: > Hardware: Power4+ (with 4 processors) > OS: Linux elm3b11 2.4.21-17.EL #1 SMP Thu Jul 8 19:31:00 > EDT 2004 ppc64 ppc64 ppc64 GNU/Linux (RHEL3) > GCC: gcc -v > Reading specs > from /usr/lib/gcc-lib/ppc64-redhat-linux/3.2.3/specs > Configured with: ../configure --prefix=/usr > --mandir=/usr/share/man --infodir=/usr/share/info > --enable-shared --enable-threads=posix --disable-checking > --with-system-zlib --enable-__cxa_atexit > --host=ppc64-redhat-linux --build=ppc64-redhat-linux > --target=ppc64-redhat-linux --with-cpu=default32 > Thread model: posix > gcc version 3.2.3 20030502 (Red Hat Linux 3.2.3-52) > > > Please let me know if I'm missing some piece of information > to mention in this email. > > Also, let me know (which somebody will) if this is not the > right forum for this kind of information/questions. You've got the right place, and it's great you're testing, but as J asked in reply to yr last post (i guess yr not subscribed): On Friday 06 January 2006 22:42, Julian Seward wrote: > Thanks. Most of these are harmless - they happen on a PPC970 box > too. We should improve our regression test mechanism so it only > reports a failure when there really is one, but that's not as simple > as it sounds. > > > none/tests/ppc32/jm-vmx (stdout) > > none/tests/ppc32/jm-vmx (stderr) > > none/tests/ppc32/testVMX (stdout) > > none/tests/ppc32/testVMX (stderr) > > These are VMX (Altivec) tests. I presume they failed because POWER5 > doesn't support Altivec (right?) > > > none/tests/ppc32/jm-insns (stdout) > > none/tests/ppc32/jm-insns (stderr) > > These should not fail -- tests of the basic integer instruction set. > Can you send > > none/tests/ppc32/jm-insns.stdout.diff and > none/tests/ppc32/jm-insns.stderr.diff > > so we can see why they failed. > > J |