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|
From: Daniel T. <da...@dt...> - 2005-12-13 22:18:26
|
Hi, I just found that a long debugger command line makes valgrind crash. 100 bytes is simply too short when you tell gdb about source directories on the command line (-d path/to/foo -d path/to/bar etc...). The attached patch increases the buffer size to 1024 bytes. Daniel |
|
From: <sv...@va...> - 2005-12-13 22:00:22
|
Author: njn
Date: 2005-12-13 22:00:17 +0000 (Tue, 13 Dec 2005)
New Revision: 5338
Log:
whoops
Modified:
trunk/perf/vg_perf.in
Modified: trunk/perf/vg_perf.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/vg_perf.in 2005-12-13 21:58:29 UTC (rev 5337)
+++ trunk/perf/vg_perf.in 2005-12-13 22:00:17 UTC (rev 5338)
@@ -151,7 +151,7 @@
$alldirs =3D 1;
} elsif ($arg =3D~ /^--valgrind=3D(.*)$/) {
$vg_dir =3D $1;
- } elsif ($arg =3D~ /^--reps=3D(\d)+$/) {
+ } elsif ($arg =3D~ /^--reps=3D(\d+)$/) {
$n_reps =3D $1;
} else {
die $usage;
|
|
From: <sv...@va...> - 2005-12-13 21:58:37
|
Author: cerion Date: 2005-12-13 21:58:29 +0000 (Tue, 13 Dec 2005) New Revision: 5337 Log: Added some more svn:ignores. Modified: trunk/helgrind/tests/x86/ trunk/none/tests/ppc32/ trunk/none/tests/ppc64/ trunk/perf/ Property changes on: trunk/helgrind/tests/x86 ___________________________________________________________________ Name: svn:ignore + *.stderr.diff *.stderr.out *.stdout.diff *.stdout.out Property changes on: trunk/none/tests/ppc32 ___________________________________________________________________ Name: svn:ignore - .deps Makefile Makefile.in + .deps Makefile Makefile.in jm-insns lsw testVMX *.stderr.diff *.stderr.out *.stdout.diff *.stdout.out Property changes on: trunk/none/tests/ppc64 ___________________________________________________________________ Name: svn:ignore - Makefile Makefile.in + .deps Makefile Makefile.in *.stderr.diff *.stderr.out *.stdout.diff *.stdout.out Property changes on: trunk/perf ___________________________________________________________________ Name: svn:ignore + .deps Makefile Makefile.in fbench vg_perf ffbench bz2 sarp |
|
From: <sv...@va...> - 2005-12-13 21:55:21
|
Author: njn
Date: 2005-12-13 21:55:16 +0000 (Tue, 13 Dec 2005)
New Revision: 5336
Log:
Added a --reps option to control how many times each program is run.
Also added a better help message.
Modified:
trunk/perf/vg_perf.in
Modified: trunk/perf/vg_perf.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/vg_perf.in 2005-12-13 21:53:39 UTC (rev 5335)
+++ trunk/perf/vg_perf.in 2005-12-13 21:55:16 UTC (rev 5336)
@@ -62,10 +62,17 @@
#-----------------------------------------------------------------------=
-----
# Global vars
#-----------------------------------------------------------------------=
-----
-my $usage=3D"vg_perf [--all, --valgrind]\n";
+my $usage =3D <<END
+usage: vg_perf [options] [files or dirs]
=20
-my $tmp=3D"vg_perf.tmp.$$";
+ options for the user, with defaults in [ ], are:
+ -h --help show this message
+ --all run all tests under this directory
+ --reps number of repeats for each program [3]
=20
+END
+;
+
# Test variables
my $vgopts; # valgrind options
my $prog; # test prog
@@ -83,7 +90,7 @@
);
=20
# We run each program this many times and choose the best time.
-my $n_runs =3D 3;
+my $n_reps =3D 3;
=20
my $num_tests_done =3D 0;
my $num_timings_done =3D 0;
@@ -144,6 +151,8 @@
$alldirs =3D 1;
} elsif ($arg =3D~ /^--valgrind=3D(.*)$/) {
$vg_dir =3D $1;
+ } elsif ($arg =3D~ /^--reps=3D(\d)+$/) {
+ $n_reps =3D $1;
} else {
die $usage;
}
@@ -266,7 +275,7 @@
# Do the native run(s).
printf("nt:");
my $cmd =3D "$timecmd $prog $args";
- my $tNative =3D time_prog($cmd, $n_runs);
+ my $tNative =3D time_prog($cmd, $n_reps);
printf("%4.1fs ", $tNative);
=20
foreach my $tool (@tools) {
@@ -283,7 +292,7 @@
. "--memcheck:leak-check=3Dno --addrcheck:leak-check=
=3Dno "
. "$vgopts ";
my $cmd =3D "$vgsetup $timecmd $vgcmd $prog $args";
- my $tTool =3D time_prog($cmd, $n_runs);
+ my $tTool =3D time_prog($cmd, $n_reps);
printf("%4.1fs (%4.1fx) ", $tTool, $tTool/$tNative);
=20
$num_timings_done++;
|
|
From: <sv...@va...> - 2005-12-13 21:53:41
|
Author: njn Date: 2005-12-13 21:53:39 +0000 (Tue, 13 Dec 2005) New Revision: 5335 Log: remove bogus whitespace Modified: trunk/perf/bz2.vgperf Modified: trunk/perf/bz2.vgperf =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/perf/bz2.vgperf 2005-12-13 21:44:48 UTC (rev 5334) +++ trunk/perf/bz2.vgperf 2005-12-13 21:53:39 UTC (rev 5335) @@ -1,2 +1,2 @@ -prog: bz2=20 +prog: bz2 tools: none memcheck |
|
From: <sv...@va...> - 2005-12-13 21:44:51
|
Author: njn
Date: 2005-12-13 21:44:48 +0000 (Tue, 13 Dec 2005)
New Revision: 5334
Log:
Die if a performance benchmark is missing.
Modified:
trunk/perf/vg_perf.in
Modified: trunk/perf/vg_perf.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/vg_perf.in 2005-12-13 20:54:11 UTC (rev 5333)
+++ trunk/perf/vg_perf.in 2005-12-13 21:44:48 UTC (rev 5334)
@@ -186,7 +186,7 @@
} elsif ($line =3D~ /^\s*vgopts:\s*(.*)$/) {
$vgopts =3D $1;
} elsif ($line =3D~ /^\s*prog:\s*(.*)$/) {
- $prog =3D validate_program(".", $1, 0, 0);
+ $prog =3D validate_program(".", $1, 1, 1);
} elsif ($line =3D~ /^\s*tools:\s*(.*)$/) {
@tools =3D validate_tools($1);
} elsif ($line =3D~ /^\s*args:\s*(.*)$/) {
|
|
From: <sv...@va...> - 2005-12-13 21:30:52
|
Author: cerion
Date: 2005-12-13 21:30:48 +0000 (Tue, 13 Dec 2005)
New Revision: 1490
Log:
Switchbacker updates
- no longer using home-grown linker - simply compiling and linking switc=
hback.c with test_xxx.c
- updated to handle ppc64 (along with it's weirdo function descriptors..=
.)
- have to be careful not to use exported functions from libvex_arch_linu=
x.a, hence vex_printf -> vexxx_printf in test_xxx.c
Modified:
trunk/switchback/Makefile
trunk/switchback/binary_switchback.pl
trunk/switchback/linker.c
trunk/switchback/switchback.c
trunk/switchback/test_bzip2.c
trunk/switchback/test_emfloat.c
Modified: trunk/switchback/Makefile
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/switchback/Makefile 2005-12-13 20:23:36 UTC (rev 1489)
+++ trunk/switchback/Makefile 2005-12-13 21:30:48 UTC (rev 1490)
@@ -1,9 +1,10 @@
=20
all: switchback.c linker.c linker.h
- gcc -Wall -O -g -o switchback switchback.c linker.c ../libvex.a
+ gcc -m64 -Wall -O -g -o switchback switchback.c linker.c ../libvex_ppc6=
4_linux.a
+# gcc -Wall -O -g -o switchback switchback.c linker.c ../libvex.a
=20
test_ppc:
- gcc -Wall -O -c test_ppc_jm1.c -mregnames
+ gcc -Wall -m64 -mregnames -O -c test_ppc_jm1.c
=20
clean:
rm -f switchback switchback.o linker.o
Modified: trunk/switchback/binary_switchback.pl
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/switchback/binary_switchback.pl 2005-12-13 20:23:36 UTC (rev 14=
89)
+++ trunk/switchback/binary_switchback.pl 2005-12-13 21:30:48 UTC (rev 14=
90)
@@ -6,17 +6,20 @@
# Binary search script for switchback
# Finds bad basic block for seg faults and bad output.
#
-# To test output, you need to create $TEST.ref
-# $TEST.ref should hold the correct output for running the program:
+# To test output, you need to create test_ref
+# test_ref should hold the correct output for running the test_xxx progr=
am:
# - Everything between (not including) /^---START---$/ and /^---STOP---=
$/
# - But NOT including output from /^---begin SWITCHBACK/
# to /^--- end SWITCHBACK/ inclusive
#
+# This script can't handle other vex output,
+# so e.g switchback.c::DEBUG_TRACE_FLAGS should be 0
+#
=20
######################################################
# Global consts, vars
use constant DEBUG =3D> 0;
-use constant CONST_N_MAX =3D> 100000000;
+use constant CONST_N_MAX =3D> 10000000000;
use constant CONST_N_MUL =3D> 2;
=20
my $SWITCHBACK =3D "./switchback";
@@ -25,7 +28,7 @@
my $N_LAST_BAD =3D -1;
my $GIVEN_LAST_GOOD =3D -1;
my $GIVEN_LAST_BAD =3D -1;
-my $TEST;
+my $TEST_REF;
=20
=20
=20
@@ -37,9 +40,9 @@
}
=20
sub Usage {
- print "Usage: binary_switchback.pl test_name [last_good [last_bad]]\=
n";
+ print "Usage: binary_switchback.pl test_ref [last_good [last_bad]]\n=
";
print "where:\n";
- print " test_name =3D obj filename - without '.o'\n";
+ print " test_ref =3D reference output from test_xxx\n";
print " last_good =3D last known good bb (search space minimum)\n"=
;
print " last_bad =3D last known bad bb (search space maximum)\n";
print "\n";
@@ -60,12 +63,8 @@
QuitUsage "Error: Bad num args\n";
}
=20
-$TEST =3D $ARGV[0];
+$TEST_REF =3D $ARGV[0];
=20
-if ( ! -e "$TEST.o" ) {
- QuitUsage "File doesn't exist: '$TEST.o'\n";
-}
-
if ( ! -x "$SWITCHBACK" ) {
QuitUsage "File doesn't exist | not executable: '$SWITCHBACK'\n";
}
@@ -146,7 +145,7 @@
=20
print "=3D=3D=3D Calling switchback for bb $n =3D=3D=3D\n";
=20
- system("$SWITCHBACK $TEST.o $n >& $TMPFILE");
+ system("$SWITCHBACK $n >& $TMPFILE");
my $ret =3D $?;
=20
if ($ret =3D=3D 256) {
@@ -217,7 +216,7 @@
sub TestOutput {
my @lines =3D @{$_[0]};
my $n =3D $_[1];
- my $ref_output =3D "$TEST.ref";
+ my $ref_output =3D "$TEST_REF";
=20
# Get the current section we want to compare:
my @newlines;
Modified: trunk/switchback/linker.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/switchback/linker.c 2005-12-13 20:23:36 UTC (rev 1489)
+++ trunk/switchback/linker.c 2005-12-13 21:30:48 UTC (rev 1490)
@@ -1,4 +1,11 @@
+/*
+ 13 Dec '05
+ Linker no longer used - apart from mymalloc().
+ Instead, simply compile and link switchback.c with test_xxx.c, e.g.:
+ ./> (cd .. && make EXTRA_CFLAGS=3D"-m64" libvex_ppc64_linux.a) && gcc =
-m64 -Wall -O -g -o switchback switchback.c linker.c ../libvex_ppc64_linu=
x.a test_bzip2.c
+*/
=20
+
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
@@ -14,8 +21,10 @@
=20
#include "../pub/libvex_basictypes.h"
=20
+#if 0
#define IF_DEBUG(x,y) /* */
static int debug_linker =3D 0;
+#endif
=20
=20
#if defined(__x86_64__)
@@ -29,6 +38,7 @@
#endif
=20
=20
+#if 0
#define CALLOC_MAX 10000000
static HChar calloc_area[CALLOC_MAX];
static UInt calloc_used =3D 0;
@@ -44,6 +54,7 @@
calloc_used +=3D n*m;
return p;
}
+#endif
=20
#define MYMALLOC_MAX 50*1000*1000
static HChar mymalloc_area[MYMALLOC_MAX];
@@ -51,8 +62,11 @@
void* mymalloc ( Int n )
{
void* p;
- while=20
- ((UInt)(mymalloc_area+mymalloc_used) & 0xFFF)
+#if defined(__powerpc64__)
+ while ((ULong)(mymalloc_area+mymalloc_used) & 0xFFF)
+#else
+ while ((UInt)(mymalloc_area+mymalloc_used) & 0xFFF)
+#endif
mymalloc_used++;
assert(mymalloc_used+n < MYMALLOC_MAX);
p =3D (void*)(&mymalloc_area[mymalloc_used]);
@@ -66,6 +80,12 @@
}
=20
=20
+
+
+
+
+
+#if 0
///////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////
@@ -1460,3 +1480,4 @@
}
=20
=20
+#endif
Modified: trunk/switchback/switchback.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/switchback/switchback.c 2005-12-13 20:23:36 UTC (rev 1489)
+++ trunk/switchback/switchback.c 2005-12-13 21:30:48 UTC (rev 1490)
@@ -1,10 +1,15 @@
=20
/* HOW TO USE
=20
-Compile test file (eg test_hello.c) to a .o
+13 Dec '05 - Linker no longer used (apart from mymalloc)
+Simply compile and link switchback.c with test_xxx.c,
+e.g. for ppc64:
+$ (cd .. && make EXTRA_CFLAGS=3D"-m64" libvex_ppc64_linux.a)
+$ gcc -m64 -Wall -O -g -o switchback switchback.c linker.c ../libvex_ppc=
64_linux.a test_xxx.c
=20
-It must have an entry point called "entry", which expects to=20
-take a single argument which is a function pointer (to "serviceFn").
+Test file test_xxx.c must have an entry point called "entry",
+which expects to take a single argument which is a function pointer
+(to "serviceFn").
=20
Test file may not reference any other symbols.
=20
@@ -26,6 +31,7 @@
#include "../pub/libvex_guest_x86.h"
#include "../pub/libvex_guest_amd64.h"
#include "../pub/libvex_guest_ppc32.h"
+#include "../pub/libvex_guest_ppc64.h"
#include "../pub/libvex.h"
#include "../pub/libvex_trc_values.h"
#include "linker.h"
@@ -49,13 +55,24 @@
# define GuestPC guest_RIP
# define CacheLineSize 0/*irrelevant*/
#elif defined(__powerpc__)
+
+#if !defined(__powerpc64__) // ppc32
# define VexGuestState VexGuestPPC32State
# define LibVEX_Guest_initialise LibVEX_GuestPPC32_initialise
# define VexArch VexArchPPC32
-# define VexSubArch VexSubArchPPC32_noAV
+# define VexSubArch VexSubArchPPC32_FI
# define GuestPC guest_CIA
# define CacheLineSize 128
#else
+# define VexGuestState VexGuestPPC64State
+# define LibVEX_Guest_initialise LibVEX_GuestPPC64_initialise
+# define VexArch VexArchPPC64
+# define VexSubArch VexSubArchPPC64_FI
+# define GuestPC guest_CIA
+# define CacheLineSize 128
+#endif
+
+#else
# error "Unknown arch"
#endif
=20
@@ -67,8 +84,8 @@
/* 2: show selected insns */
/* 1: show after reg-alloc */
/* 0: show final assembly */
-#define TEST_FLAGS (1<<7)|(1<<3)|(1<<2)|(1<<1)|(0<<0)
-#define DEBUG_TRACE_FLAGS 0 //(1<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<3)|(1<<2)|=
(1<<1)|(0<<0)
+#define TEST_FLAGS (1<<7)|(1<<3)|(1<<2)|(1<<1)|(1<<0)
+#define DEBUG_TRACE_FLAGS 0//(1<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<3)|(1<<2)|(=
1<<1)|(1<<0)
=20
=20
/* guest state */
@@ -97,6 +114,24 @@
=20
static Bool chase_into_not_ok ( Addr64 dst ) { return False; }
=20
+#if 0
+// local_sys_write_stderr(&c,1);
+static void local_sys_write_stderr ( HChar* buf, Int n )
+{
+ UInt __res;
+ __asm__ volatile (
+ "li %%r0,4\n\t" /* set %r0 =3D __NR_write */
+ "li %%r3,1\n\t" /* set %r3 =3D stdout */
+ "mr %%r4,%1\n\t" /* set %r4 =3D buf */
+ "mr %%r5,%2\n\t" /* set %r5 =3D n */
+ "sc\n\t" /* write(stderr, buf, n) */
+ "mr %0,%%r3\n" /* set __res =3D r3 */
+ : "=3Dmr" (__res)
+ : "g" (buf), "g" (n)
+ : "r0", "r3", "r4", "r5" );
+}
+#endif
+
/* For providing services. */
static HWord serviceFn ( HWord arg1, HWord arg2 )
{
@@ -209,6 +244,7 @@
}
=20
=20
+#if !defined(__powerpc64__) // ppc32
asm(
"switchback_asm:\n"
// gst
@@ -275,6 +311,101 @@
" nop\n"
"nop_end_point:\n"
);
+
+#else // ppc64
+
+asm(
+".text\n"
+" .global switchback_asm\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"switchback_asm:\n"
+" .quad .switchback_asm,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .switchback_asm,@function\n"
+" .global .switchback_asm\n"
+".switchback_asm:\n"
+"switchback_asm_undotted:\n"
+
+// gst: load word of guest_state_ptr to r31
+" lis %r31,sb_helper1@highest\n"
+" ori %r31,%r31,sb_helper1@higher\n"
+" rldicr %r31,%r31,32,31\n"
+" oris %r31,%r31,sb_helper1@h\n"
+" ori %r31,%r31,sb_helper1@l\n"
+" ld %r31,0(%r31)\n"
+
+
+// LR
+" ld %r3,1032(%r31)\n" // guest_LR
+" mtlr %r3\n" // move to LR
+
+// CR
+" lis %r3,sb_helper2@highest\n"
+" ori %r3,%r3,sb_helper2@higher\n"
+" rldicr %r3,%r3,32,31\n"
+" oris %r3,%r3,sb_helper2@h\n"
+" ori %r3,%r3,sb_helper2@l\n"
+" ld %r3,0(%r3)\n" // load flags word to r3
+" mtcr %r3\n" // move r3 to CR
+
+// CTR
+" ld %r3,1040(%r31)\n" // guest_CTR
+" mtctr %r3\n" // move r3 to CTR
+
+// XER
+" lis %r3,sb_helper3@highest\n"
+" ori %r3,%r3,sb_helper3@higher\n"
+" rldicr %r3,%r3,32,31\n"
+" oris %r3,%r3,sb_helper3@h\n"
+" ori %r3,%r3,sb_helper3@l\n"
+" ld %r3,0(%r3)\n" // load xer word to r3
+" mtxer %r3\n" // move r3 to XER
+
+// GPR's
+" ld %r0, 0(%r31)\n"
+" ld %r1, 8(%r31)\n" // switch stacks (r1 =3D SP)
+" ld %r2, 16(%r31)\n"
+" ld %r3, 24(%r31)\n"
+" ld %r4, 32(%r31)\n"
+" ld %r5, 40(%r31)\n"
+" ld %r6, 48(%r31)\n"
+" ld %r7, 56(%r31)\n"
+" ld %r8, 64(%r31)\n"
+" ld %r9, 72(%r31)\n"
+" ld %r10, 80(%r31)\n"
+" ld %r11, 88(%r31)\n"
+" ld %r12, 96(%r31)\n"
+" ld %r13, 104(%r31)\n"
+" ld %r14, 112(%r31)\n"
+" ld %r15, 120(%r31)\n"
+" ld %r16, 128(%r31)\n"
+" ld %r17, 136(%r31)\n"
+" ld %r18, 144(%r31)\n"
+" ld %r19, 152(%r31)\n"
+" ld %r20, 160(%r31)\n"
+" ld %r21, 168(%r31)\n"
+" ld %r22, 176(%r31)\n"
+" ld %r23, 184(%r31)\n"
+" ld %r24, 192(%r31)\n"
+" ld %r25, 200(%r31)\n"
+" ld %r26, 208(%r31)\n"
+" ld %r27, 216(%r31)\n"
+" ld %r28, 224(%r31)\n"
+" ld %r29, 232(%r31)\n"
+" ld %r30, 240(%r31)\n"
+" ld %r31, 248(%r31)\n"
+"nop_start_point:\n"
+" nop\n"
+" nop\n"
+" nop\n"
+" nop\n"
+" nop\n"
+"nop_end_point:\n"
+);
+#endif
+
+extern void switchback_asm_undotted;
extern void nop_start_point;
extern void nop_end_point;
void switchback ( void )
@@ -284,10 +415,19 @@
memory on which can can set both write and execute permissions,
so we can poke around with it and then run the results. */
=20
+#if defined(__powerpc64__) // ppc32
+ UChar* sa_start =3D (UChar*)&switchback_asm_undotted;
+#else
UChar* sa_start =3D (UChar*)&switchback_asm;
+#endif
UChar* sa_nop_start =3D (UChar*)&nop_start_point;
UChar* sa_end =3D (UChar*)&nop_end_point;
=20
+#if 0
+ printf("sa_start %p\n", sa_start );
+ printf("sa_nop_start %p\n", sa_nop_start);
+ printf("sa_end %p\n", sa_end);
+#endif
Int nbytes =3D sa_end - sa_start;
Int off_nopstart =3D sa_nop_start - sa_start;
if (0)
@@ -301,6 +441,7 @@
=20
UInt* p =3D (UInt*)(©[off_nopstart]);
=20
+#if !defined(__powerpc64__) // ppc32
Addr32 addr_of_nop =3D (Addr32)p;
Addr32 where_to_go =3D gst.guest_CIA;
Int diff =3D ((Int)where_to_go) - ((Int)addr_of_nop);
@@ -311,6 +452,18 @@
printf("diff =3D 0x%x\n", diff);
#endif
=20
+#else // ppc64
+ Addr64 addr_of_nop =3D (Addr64)p;
+ Addr64 where_to_go =3D gst.guest_CIA;
+ Long diff =3D ((Long)where_to_go) - ((Long)addr_of_nop);
+
+#if 0
+ printf("addr of first nop =3D 0x%llx\n", addr_of_nop);
+ printf("where to go =3D 0x%llx\n", where_to_go);
+ printf("diff =3D 0x%llx\n", diff);
+#endif
+#endif
+
if (diff < -0x2000000 || diff >=3D 0x2000000) {
// we're hosed. Give up
printf("hosed -- offset too large\n");
@@ -318,8 +471,13 @@
}
=20
sb_helper1 =3D (HWord)&gst;
+#if !defined(__powerpc64__) // ppc32
sb_helper2 =3D LibVEX_GuestPPC32_get_CR(&gst);
sb_helper3 =3D LibVEX_GuestPPC32_get_XER(&gst);
+#else // ppc64
+ sb_helper2 =3D LibVEX_GuestPPC64_get_CR(&gst);
+ sb_helper3 =3D LibVEX_GuestPPC64_get_XER(&gst);
+#endif
=20
/* stay sane ... */
assert(p[0] =3D=3D 24<<26); /* nop */
@@ -329,7 +487,17 @@
=20
invalidate_icache( copy, nbytes );
=20
+#if defined(__powerpc64__)
+ //printf("jumping to %p\n", copy);
+ { ULong faketoc[3];
+ void* v;
+ faketoc[0] =3D (ULong)copy;
+ v =3D &faketoc[0];
+ ( (void(*)(void)) v )();
+ }
+#else
( (void(*)(void))copy )();
+#endif
}
=20
#else
@@ -397,6 +565,8 @@
);
=20
#elif defined(__powerpc__)
+
+#if !defined(__powerpc64__) // ppc32
asm(
"run_translation_asm:\n"
=20
@@ -483,6 +653,124 @@
" blr"
);
=20
+#else // ppc64
+
+asm(
+".text\n"
+" .global run_translation_asm\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"run_translation_asm:\n"
+" .quad .run_translation_asm,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .run_translation_asm,@function\n"
+" .global .run_translation_asm\n"
+".run_translation_asm:\n"
+
+// save LR,CTR
+" mflr %r0\n"
+" std %r0,16(%r1)\n"
+" mfctr %r0\n"
+" std %r0,8(%r1)\n"
+
+// create new stack:
+// save old sp at first word & update sp
+" stdu 1,-256(1)\n"
+
+// leave hole @ 4(%r1) for a callee to save it's LR
+// no params
+// no need to save non-volatile CR fields
+
+// store registers to stack: just the callee-saved regs
+" std %r13, 48(%r1)\n"
+" std %r14, 56(%r1)\n"
+" std %r15, 64(%r1)\n"
+" std %r16, 72(%r1)\n"
+" std %r17, 80(%r1)\n"
+" std %r18, 88(%r1)\n"
+" std %r19, 96(%r1)\n"
+" std %r20, 104(%r1)\n"
+" std %r21, 112(%r1)\n"
+" std %r22, 120(%r1)\n"
+" std %r23, 128(%r1)\n"
+" std %r24, 136(%r1)\n"
+" std %r25, 144(%r1)\n"
+" std %r26, 152(%r1)\n"
+" std %r27, 160(%r1)\n"
+" std %r28, 168(%r1)\n"
+" std %r29, 176(%r1)\n"
+" std %r30, 184(%r1)\n"
+" std %r31, 192(%r1)\n"
+
+// r31 (guest state ptr) :=3D global var "gp"
+" lis %r31,gp@highest\n"
+" ori %r31,%r31,gp@higher\n"
+" rldicr %r31,%r31,32,31\n"
+" oris %r31,%r31,gp@h\n"
+" ori %r31,%r31,gp@l\n"
+" ld %r31,0(%r31)\n"
+
+// call translation address in global var "f"
+" lis %r4,f@highest\n"
+" ori %r4,%r4,f@higher\n"
+" rldicr %r4,%r4,32,31\n"
+" oris %r4,%r4,f@h\n"
+" ori %r4,%r4,f@l\n"
+" ld %r4,0(%r4)\n"
+" mtctr %r4\n"
+" bctrl\n"
+
+// save return value (in r3) into global var "res"
+" lis %r5,res@highest\n"
+" ori %r5,%r5,res@higher\n"
+" rldicr %r5,%r5,32,31\n"
+" oris %r5,%r5,res@h\n"
+" ori %r5,%r5,res@l\n"
+" std %r3,0(%r5)\n"
+
+// save possibly modified guest state ptr (r31) in "gp"
+" lis %r5,gp@highest\n"
+" ori %r5,%r5,gp@higher\n"
+" rldicr %r5,%r5,32,31\n"
+" oris %r5,%r5,gp@h\n"
+" ori %r5,%r5,gp@l\n"
+" std %r31,0(%r5)\n"
+
+// reload registers from stack
+" ld %r13, 48(%r1)\n"
+" ld %r14, 56(%r1)\n"
+" ld %r15, 64(%r1)\n"
+" ld %r16, 72(%r1)\n"
+" ld %r17, 80(%r1)\n"
+" ld %r18, 88(%r1)\n"
+" ld %r19, 96(%r1)\n"
+" ld %r20, 104(%r1)\n"
+" ld %r21, 112(%r1)\n"
+" ld %r22, 120(%r1)\n"
+" ld %r23, 128(%r1)\n"
+" ld %r24, 136(%r1)\n"
+" ld %r25, 144(%r1)\n"
+" ld %r26, 152(%r1)\n"
+" ld %r27, 160(%r1)\n"
+" ld %r28, 168(%r1)\n"
+" ld %r29, 176(%r1)\n"
+" ld %r30, 184(%r1)\n"
+" ld %r31, 192(%r1)\n"
+
+// restore previous stack pointer
+" addi %r1,%r1,256\n"
+
+// restore LR,CTR
+" ld %r0,16(%r1)\n"
+" mtlr %r0\n"
+" ld %r0,8(%r1)\n"
+" mtctr %r0\n"
+
+// return
+" blr"
+);
+#endif
+
#else
=20
# error "Unknown arch"
@@ -632,7 +920,7 @@
=20
=20
static ULong stopAfter =3D 0;
-static UChar* entry =3D NULL;
+static UChar* entryP =3D NULL;
=20
=20
__attribute__ ((noreturn))
@@ -665,8 +953,12 @@
=20
if (0)
printf("\nnext_guest: 0x%x\n", (UInt)next_guest);
- =20
+
+#if defined(__powerpc64__)
+ if (next_guest =3D=3D Ptr_to_ULong( (void*)(*(ULong*)(&serviceFn))=
)) {
+#else
if (next_guest =3D=3D Ptr_to_ULong(&serviceFn)) {
+#endif
/* "do" the function call to serviceFn */
# if defined(__i386__)
{
@@ -736,13 +1028,15 @@
=20
static void usage ( void )
{
- printf("usage: switchback file.o #bbs\n");
+ printf("usage: switchback #bbs\n");
printf(" - begins switchback for basic block #bbs\n");
printf(" - use -1 for largest possible run without switchback\n\n")=
;
exit(1);
}
=20
#if defined(__powerpc__)
+
+#if !defined(__powerpc64__) // ppc32
UInt saved_R2;
asm(
"get_R2:\n"
@@ -750,29 +1044,63 @@
" stw %r2,saved_R2@l(%r10)\n"
" blr\n"
);
+#else // ppc64
+ULong saved_R2;
+ULong saved_R13;
+asm(
+".text\n"
+" .global get_R2\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"get_R2:\n"
+" .quad .get_R2,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .get_R2,@function\n"
+" .global .get_R2\n"
+".get_R2:\n"
+" lis %r10,saved_R2@highest\n"
+" ori %r10,%r10,saved_R2@higher\n"
+" rldicr %r10,%r10,32,31\n"
+" oris %r10,%r10,saved_R2@h\n"
+" ori %r10,%r10,saved_R2@l\n"
+" std %r2,0(%r10)\n"
+" blr\n"
+);
+asm(
+".text\n"
+" .global get_R13\n"
+" .section \".opd\",\"aw\"\n"
+" .align 3\n"
+"get_R13:\n"
+" .quad .get_R13,.TOC.@tocbase,0\n"
+" .previous\n"
+" .type .get_R13,@function\n"
+" .global .get_R13\n"
+".get_R13:\n"
+" lis %r10,saved_R13@highest\n"
+" ori %r10,%r10,saved_R13@higher\n"
+" rldicr %r10,%r10,32,31\n"
+" oris %r10,%r10,saved_R13@h\n"
+" ori %r10,%r10,saved_R13@l\n"
+" std %r13,0(%r10)\n"
+" blr\n"
+);
+#endif
extern void get_R2 ( void );
+extern void get_R13 ( void );
#endif
=20
int main ( Int argc, HChar** argv )
{
- HChar* oname;
-
- struct stat buf;
-
- if (argc !=3D 3)=20
+ if (argc !=3D 2)
usage();
=20
- oname =3D argv[1];
- stopAfter =3D (ULong)atoll(argv[2]);
+ stopAfter =3D (ULong)atoll(argv[1]);
=20
- if (stat(oname, &buf)) {
- printf("switchback: can't stat %s\n", oname);
- return 1;
- }
+ extern void entry ( void*(*service)(int,int) );
+ entryP =3D (UChar*)&entry;
=20
- entry =3D linker_top_level_LINK( 1, &argv[1] );
-
- if (!entry) {
+ if (!entryP) {
printf("switchback: can't find entry point\n");
exit(1);
}
@@ -788,22 +1116,35 @@
/* set up as if a call to the entry point passing serviceFn as=20
the one and only parameter */
# if defined(__i386__)
- gst.guest_EIP =3D (UInt)entry;
+ gst.guest_EIP =3D (UInt)entryP;
gst.guest_ESP =3D (UInt)&gstack[25000];
*(UInt*)(gst.guest_ESP+4) =3D (UInt)serviceFn;
*(UInt*)(gst.guest_ESP+0) =3D 0x12345678;
# elif defined(__x86_64__)
- gst.guest_RIP =3D (ULong)entry;
+ gst.guest_RIP =3D (ULong)entryP;
gst.guest_RSP =3D (ULong)&gstack[25000];
gst.guest_RDI =3D (ULong)serviceFn;
*(ULong*)(gst.guest_RSP+0) =3D 0x12345678AABBCCDDULL;
# elif defined(__powerpc__)
get_R2();
- gst.guest_CIA =3D (UInt)entry;
+
+#if !defined(__powerpc64__) // ppc32
+ gst.guest_CIA =3D (UInt)entryP;
gst.guest_GPR1 =3D (UInt)&gstack[25000]; /* stack pointer */
gst.guest_GPR3 =3D (UInt)serviceFn; /* param to entry */
gst.guest_GPR2 =3D saved_R2;
gst.guest_LR =3D 0x12345678; /* bogus return address */
+#else // ppc64
+ get_R13();
+ gst.guest_CIA =3D * (ULong*)entryP;
+ gst.guest_GPR1 =3D (ULong)&gstack[25000]; /* stack pointer */
+ gst.guest_GPR3 =3D (ULong)serviceFn; /* param to entry */
+ gst.guest_GPR2 =3D saved_R2;
+ gst.guest_GPR13 =3D saved_R13;
+ gst.guest_LR =3D 0x1234567812345678ULL; /* bogus return address */
+// printf("setting CIA to %p\n", (void*)gst.guest_CIA);
+#endif
+
# else
# error "Unknown arch"
# endif
@@ -813,7 +1154,7 @@
#if 1
run_simulator();
#else
- ( (void(*)(HWord(*)(HWord,HWord))) entry ) (serviceFn);
+ ( (void(*)(HWord(*)(HWord,HWord))) entryP ) (serviceFn);
#endif
=20
=20
Modified: trunk/switchback/test_bzip2.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/switchback/test_bzip2.c 2005-12-13 20:23:36 UTC (rev 1489)
+++ trunk/switchback/test_bzip2.c 2005-12-13 21:30:48 UTC (rev 1490)
@@ -451,17 +451,17 @@
{ if (!(cond)) bz_internal_error ( errcode ); }
#define AssertD(cond,msg) /* */
#define VPrintf0(zf) \
- vex_printf(zf)
+ vexxx_printf(zf)
#define VPrintf1(zf,za1) \
- vex_printf(zf,za1)
+ vexxx_printf(zf,za1)
#define VPrintf2(zf,za1,za2) \
- vex_printf(zf,za1,za2)
+ vexxx_printf(zf,za1,za2)
#define VPrintf3(zf,za1,za2,za3) \
- vex_printf(zf,za1,za2,za3)
+ vexxx_printf(zf,za1,za2,za3)
#define VPrintf4(zf,za1,za2,za3,za4) \
- vex_printf(zf,za1,za2,za3,za4)
+ vexxx_printf(zf,za1,za2,za3,za4)
#define VPrintf5(zf,za1,za2,za3,za4,za5) \
- vex_printf(zf,za1,za2,za3,za4,za5)
+ vexxx_printf(zf,za1,za2,za3,za4,za5)
#endif
=20
=20
@@ -955,7 +955,7 @@
=20
/////////////////////////////////////////////////////////////////////
=20
-static void vex_log_bytes ( char* p, int n )
+static void vexxx_log_bytes ( char* p, int n )
{
int i;
for (i =3D 0; i < n; i++)
@@ -963,14 +963,14 @@
}
=20
/*---------------------------------------------------------*/
-/*--- vex_printf ---*/
+/*--- vexxx_printf ---*/
/*---------------------------------------------------------*/
=20
/* This should be the only <...> include in the entire VEX library.
- New code for vex_util.c should go above this point. */
+ New code for vexxx_util.c should go above this point. */
#include <stdarg.h>
=20
-static HChar vex_toupper ( HChar c )
+static HChar vexxx_toupper ( HChar c )
{
if (c >=3D 'a' && c <=3D 'z')
return c + ('A' - 'a');
@@ -978,14 +978,14 @@
return c;
}
=20
-static Int vex_strlen ( const HChar* str )
+static Int vexxx_strlen ( const HChar* str )
{
Int i =3D 0;
while (str[i] !=3D 0) i++;
return i;
}
=20
-Bool vex_streq ( const HChar* s1, const HChar* s2 )
+Bool vexxx_streq ( const HChar* s1, const HChar* s2 )
{
while (True) {
if (*s1 =3D=3D 0 && *s2 =3D=3D 0)
@@ -1009,10 +1009,10 @@
myvprintf_str ( void(*send)(HChar), Int flags, Int width, HChar* str,=20
Bool capitalise )
{
-# define MAYBE_TOUPPER(ch) (capitalise ? vex_toupper(ch) : (ch))
+# define MAYBE_TOUPPER(ch) (capitalise ? vexxx_toupper(ch) : (ch))
UInt ret =3D 0;
Int i, extra;
- Int len =3D vex_strlen(str);
+ Int len =3D vexxx_strlen(str);
=20
if (width =3D=3D 0) {
ret +=3D len;
@@ -1257,7 +1257,7 @@
static void add_to_myprintf_buf ( HChar c )
{
if (c =3D=3D '\n' || n_myprintf_buf >=3D 1000-10 /*paranoia*/ ) {
- (*vex_log_bytes)( myprintf_buf, vex_strlen(myprintf_buf) );
+ (*vexxx_log_bytes)( myprintf_buf, vexxx_strlen(myprintf_buf) );
n_myprintf_buf =3D 0;
myprintf_buf[n_myprintf_buf] =3D 0; =20
}
@@ -1265,7 +1265,7 @@
myprintf_buf[n_myprintf_buf] =3D 0;
}
=20
-static UInt vex_printf ( const char *format, ... )
+static UInt vexxx_printf ( const char *format, ... )
{
UInt ret;
va_list vargs;
@@ -1276,7 +1276,7 @@
ret =3D vprintf_wrk ( add_to_myprintf_buf, format, vargs );
=20
if (n_myprintf_buf > 0) {
- (*vex_log_bytes)( myprintf_buf, n_myprintf_buf );
+ (*vexxx_log_bytes)( myprintf_buf, n_myprintf_buf );
}
=20
va_end(vargs);
@@ -1285,7 +1285,7 @@
}
=20
/*---------------------------------------------------------------*/
-/*--- end vex_util.c ---*/
+/*--- end vexxx_util.c ---*/
/*---------------------------------------------------------------*/
=20
=20
@@ -4427,13 +4427,13 @@
/*---------------------------------------------------*/
void BZ2_bz__AssertH__fail ( int errcode )
{
- vex_printf("BZ2_bz__AssertH__fail(%d) called, exiting\n", errcode);
+ vexxx_printf("BZ2_bz__AssertH__fail(%d) called, exiting\n", errcode);
(*serviceFn)(0,0);
}
=20
void bz_internal_error ( int errcode )
{
- vex_printf("bz_internal_error called, exiting\n", errcode);
+ vexxx_printf("bz_internal_error called, exiting\n", errcode);
(*serviceFn)(0,0);
}
=20
@@ -6062,40 +6062,40 @@
serviceFn =3D service;
=20
set_inbuf();
- nIn =3D vex_strlen(inbuf)+1;
- vex_printf( "%d bytes read\n", nIn );
+ nIn =3D vexxx_strlen(inbuf)+1;
+ vexxx_printf( "%d bytes read\n", nIn );
=20
nZ =3D M_BLOCK;
r =3D BZ2_bzBuffToBuffCompress (
zbuf, &nZ, inbuf, nIn, 9, 4/*verb*/, 30 );
=20
if (r !=3D BZ_OK) {
- vex_printf("initial compress failed!\n");
+ vexxx_printf("initial compress failed!\n");
(*serviceFn)(0,0);
}
- vex_printf( "%d after compression\n", nZ );
+ vexxx_printf( "%d after compression\n", nZ );
=20
for (bit =3D 0; bit < nZ*8; bit +=3D (bit < 35 ? 1 : 377)) {
- vex_printf( "bit %d ", bit );
+ vexxx_printf( "bit %d ", bit );
flip_bit ( bit );
nOut =3D M_BLOCK_OUT;
r =3D BZ2_bzBuffToBuffDecompress (
outbuf, &nOut, zbuf, nZ, 1/*small*/, 0 );
- vex_printf( " %d %s ", r, bzerrorstrings[-r] );
+ vexxx_printf( " %d %s ", r, bzerrorstrings[-r] );
=20
if (r !=3D BZ_OK) {
- vex_printf( "\n" );
+ vexxx_printf( "\n" );
} else {
if (nOut !=3D nIn) {
- vex_printf( "nIn/nOut mismatch %d %d\n", nIn, nOut );
+ vexxx_printf( "nIn/nOut mismatch %d %d\n", nIn, nOut );
(*serviceFn)(0,0);
} else {
for (i =3D 0; i < nOut; i++)
if (inbuf[i] !=3D outbuf[i]) {=20
- vex_printf( "mismatch at %d\n", i );=20
+ vexxx_printf( "mismatch at %d\n", i );=20
(*serviceFn)(0,0);=20
}
- if (i =3D=3D nOut) vex_printf( "really ok!\n" );
+ if (i =3D=3D nOut) vexxx_printf( "really ok!\n" );
}
}
=20
@@ -6106,12 +6106,12 @@
assert (nOut =3D=3D nIn);
for (i =3D 0; i < nOut; i++) {
if (inbuf[i] !=3D outbuf[i]) {
- vex_printf( "difference at %d !\n", i );
+ vexxx_printf( "difference at %d !\n", i );
return 1;
}
}
#endif
=20
- vex_printf( "all ok\n" );
+ vexxx_printf( "all ok\n" );
(*serviceFn)(0,0);
}
Modified: trunk/switchback/test_emfloat.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/switchback/test_emfloat.c 2005-12-13 20:23:36 UTC (rev 1489)
+++ trunk/switchback/test_emfloat.c 2005-12-13 21:30:48 UTC (rev 1490)
@@ -86,7 +86,7 @@
=20
/////////////////////////////////////////////////////////////////////
=20
-static void vex_log_bytes ( char* p, int n )
+static void vexxx_log_bytes ( char* p, int n )
{
int i;
for (i =3D 0; i < n; i++)
@@ -94,14 +94,14 @@
}
=20
/*---------------------------------------------------------*/
-/*--- vex_printf ---*/
+/*--- vexxx_printf ---*/
/*---------------------------------------------------------*/
=20
-/* This should be the only <...> include in the entire VEX library.
- New code for vex_util.c should go above this point. */
+/* This should be the only <...> include in the entire VEXXX library.
+ New code for vexxx_util.c should go above this point. */
#include <stdarg.h>
=20
-static HChar vex_toupper ( HChar c )
+static HChar vexxx_toupper ( HChar c )
{
if (c >=3D 'a' && c <=3D 'z')
return toHChar(c + ('A' - 'a'));
@@ -109,14 +109,14 @@
return c;
}
=20
-static Int vex_strlen ( const HChar* str )
+static Int vexxx_strlen ( const HChar* str )
{
Int i =3D 0;
while (str[i] !=3D 0) i++;
return i;
}
=20
-Bool vex_streq ( const HChar* s1, const HChar* s2 )
+Bool vexxx_streq ( const HChar* s1, const HChar* s2 )
{
while (True) {
if (*s1 =3D=3D 0 && *s2 =3D=3D 0)
@@ -140,10 +140,10 @@
myvprintf_str ( void(*send)(HChar), Int flags, Int width, HChar* str,=20
Bool capitalise )
{
-# define MAYBE_TOUPPER(ch) toHChar(capitalise ? vex_toupper(ch) : (ch))
+# define MAYBE_TOUPPER(ch) toHChar(capitalise ? vexxx_toupper(ch) : (ch=
))
UInt ret =3D 0;
Int i, extra;
- Int len =3D vex_strlen(str);
+ Int len =3D vexxx_strlen(str);
=20
if (width =3D=3D 0) {
ret +=3D len;
@@ -388,7 +388,7 @@
static void add_to_myprintf_buf ( HChar c )
{
if (c =3D=3D '\n' || n_myprintf_buf >=3D 1000-10 /*paranoia*/ ) {
- (*vex_log_bytes)( myprintf_buf, vex_strlen(myprintf_buf) );
+ (*vexxx_log_bytes)( myprintf_buf, vexxx_strlen(myprintf_buf) );
n_myprintf_buf =3D 0;
myprintf_buf[n_myprintf_buf] =3D 0; =20
}
@@ -396,7 +396,7 @@
myprintf_buf[n_myprintf_buf] =3D 0;
}
=20
-static UInt vex_printf ( const char *format, ... )
+static UInt vexxx_printf ( const char *format, ... )
{
UInt ret;
va_list vargs;
@@ -407,7 +407,7 @@
ret =3D vprintf_wrk ( add_to_myprintf_buf, format, vargs );
=20
if (n_myprintf_buf > 0) {
- (*vex_log_bytes)( myprintf_buf, n_myprintf_buf );
+ (*vexxx_log_bytes)( myprintf_buf, n_myprintf_buf );
}
=20
va_end(vargs);
@@ -416,7 +416,7 @@
}
=20
/*---------------------------------------------------------------*/
-/*--- end vex_util.c ---*/
+/*--- end vexxx_util.c ---*/
/*---------------------------------------------------------------*/
=20
=20
@@ -610,7 +610,7 @@
loops =3D 100;
number_of_loops=3Dloops-1; /* the index of the first loop we run */
=20
-vex_printf(str1, (int)loops);
+vexxx_printf(str1, (int)loops);
=20
/*
** Each pass through the array performs operations in
@@ -662,7 +662,7 @@
for(k=3D0;k<8;k++){
i=3Dj[k];
InternalFPFToString(buffer,abase+i);
- vex_printf("%6d: (%s) ",i,buffer);
+ vexxx_printf("%6d: (%s) ",i,buffer);
switch(jtable[i % 16])
{
case 0: my_strcpy(buffer,"+"); break;
@@ -670,11 +670,11 @@
case 2: my_strcpy(buffer,"*"); break;
case 3: my_strcpy(buffer,"/"); break;
}
- vex_printf("%s ",buffer);
+ vexxx_printf("%s ",buffer);
InternalFPFToString(buffer,bbase+i);
- vex_printf("(%s) =3D ",buffer);
+ vexxx_printf("(%s) =3D ",buffer);
InternalFPFToString(buffer,cbase+i);
- vex_printf("%s\n",buffer);
+ vexxx_printf("%s\n",buffer);
}
return 0;
}
@@ -944,7 +944,7 @@
=20
if (IsMantissaZero(ptr->mantissa))
{
- vex_printf("Error: zero significand in denormalize\n");
+ vexxx_printf("Error: zero significand in denormalize\n");
}
=20
exponent_difference =3D ptr->exp-minimum_exponent;
@@ -1938,7 +1938,7 @@
void entry ( HWord(*f)(HWord,HWord) )
{
serviceFn =3D f;
- vex_printf("starting\n");
+ vexxx_printf("starting\n");
DoEmFloat();
(*serviceFn)(0,0);
}
|
|
From: <sv...@va...> - 2005-12-13 20:54:15
|
Author: njn
Date: 2005-12-13 20:54:11 +0000 (Tue, 13 Dec 2005)
New Revision: 5333
Log:
Commit r5331 (vg_SP_update_pass improvement) from the trunk. A couple of
other minor commits from the trunk got dragged in too.
Modified:
branches/COMPVBITS/coregrind/m_translate.c
branches/COMPVBITS/coregrind/m_transtab.c
Modified: branches/COMPVBITS/coregrind/m_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/COMPVBITS/coregrind/m_translate.c 2005-12-13 20:23:38 UTC (r=
ev 5332)
+++ branches/COMPVBITS/coregrind/m_translate.c 2005-12-13 20:54:11 UTC (r=
ev 5333)
@@ -49,7 +49,35 @@
#include "pub_core_translate.h"
#include "pub_core_transtab.h"
=20
+/*------------------------------------------------------------*/
+/*--- Stats ---*/
+/*------------------------------------------------------------*/
=20
+static UInt n_SP_updates_fast =3D 0;
+static UInt n_SP_updates_generic_known =3D 0;
+static UInt n_SP_updates_generic_unknown =3D 0;
+
+void VG_(print_translation_stats) ( void )
+{
+ Char buf[6];
+ UInt n_SP_updates =3D n_SP_updates_fast + n_SP_updates_generic_known
+ + n_SP_updates_generic_unknown;
+ VG_(percentify)(n_SP_updates_fast, n_SP_updates, 1, 6, buf);
+ VG_(message)(Vg_DebugMsg,
+ "translate: fast SP updates identified: %,u (%s)",
+ n_SP_updates_fast, buf );
+
+ VG_(percentify)(n_SP_updates_generic_known, n_SP_updates, 1, 6, buf);
+ VG_(message)(Vg_DebugMsg,
+ "translate: generic_known SP updates identified: %,u (%s)",
+ n_SP_updates_generic_known, buf );
+
+ VG_(percentify)(n_SP_updates_generic_unknown, n_SP_updates, 1, 6, buf=
);
+ VG_(message)(Vg_DebugMsg,
+ "translate: generic_unknown SP updates identified: %,u (%s)",
+ n_SP_updates_generic_unknown, buf );
+}
+
/*------------------------------------------------------------*/
/*--- %SP-update pass ---*/
/*------------------------------------------------------------*/
@@ -70,24 +98,99 @@
VG_(tdict).track_die_mem_stack );
}
=20
-/* NOTE: this comment is out of date */
+// - The SP aliases are held in an array which is used as a circular buf=
fer.
+// This misses very few constant updates of SP (ie. < 0.1%) while usin=
g a
+// small, constant structure that will also never fill up and cause
+// execution to abort.
+// - Unused slots have a .temp value of 'IRTemp_INVALID'.
+// - 'next_SP_alias_slot' is the index where the next alias will be stor=
ed.
+// - If the buffer fills, we circle around and start over-writing
+// non-IRTemp_INVALID values. This is rare, and the overwriting of a
+// value that would have subsequently be used is even rarer.
+// - Every slot below next_SP_alias_slot holds a non-IRTemp_INVALID valu=
e.
+// The rest either all won't (if we haven't yet circled around) or all
+// will (if we have circled around).
=20
-/* For tools that want to know about %ESP changes, this pass adds
+typedef=20
+ struct {
+ IRTemp temp;
+ Long delta;
+ }
+ SP_Alias;
+
+// With 32 slots the buffer fills very rarely -- eg. once in a run of GC=
C.
+// And I've tested with smaller values and the wrap-around case works ok=
.
+#define N_ALIASES 32
+static SP_Alias SP_aliases[N_ALIASES];
+static Int next_SP_alias_slot =3D 0;
+
+static void clear_SP_aliases(void)
+{
+ Int i;
+ for (i =3D 0; i < N_ALIASES; i++) {
+ SP_aliases[i].temp =3D IRTemp_INVALID;
+ SP_aliases[i].delta =3D 0;
+ }
+ next_SP_alias_slot =3D 0;
+}
+
+static void add_SP_alias(IRTemp temp, Long delta)
+{
+ vg_assert(temp !=3D IRTemp_INVALID);
+ SP_aliases[ next_SP_alias_slot ].temp =3D temp;
+ SP_aliases[ next_SP_alias_slot ].delta =3D delta;
+ next_SP_alias_slot++;
+ if (N_ALIASES =3D=3D next_SP_alias_slot) next_SP_alias_slot =3D 0;
+}
+
+static Bool get_SP_delta(IRTemp temp, ULong* delta)
+{
+ Int i; // i must be signed!
+ vg_assert(IRTemp_INVALID !=3D temp);
+ // Search backwards between current buffer position and the start.
+ for (i =3D next_SP_alias_slot-1; i >=3D 0; i--) {
+ if (temp =3D=3D SP_aliases[i].temp) {
+ *delta =3D SP_aliases[i].delta;
+ return True;
+ }
+ }
+ // Search backwards between the end and the current buffer position.
+ for (i =3D N_ALIASES-1; i >=3D next_SP_alias_slot; i--) {
+ if (temp =3D=3D SP_aliases[i].temp) {
+ *delta =3D SP_aliases[i].delta;
+ return True;
+ }
+ }
+ return False;
+}
+
+static void update_SP_aliases(Long delta)
+{
+ Int i;
+ for (i =3D 0; i < N_ALIASES; i++) {
+ if (SP_aliases[i].temp =3D=3D IRTemp_INVALID) {
+ return;
+ }
+ SP_aliases[i].delta +=3D delta;
+ }
+}
+
+
+/* For tools that want to know about SP changes, this pass adds
in the appropriate hooks. We have to do it after the tool's
- instrumentation, so the tool doesn't have to worry about the CCALLs
+ instrumentation, so the tool doesn't have to worry about the C calls
it adds in, and we must do it before register allocation because
- spilled temps make it much harder to work out the %esp deltas.
- Thus we have it as an extra phase between the two.=20
- =20
- We look for "GETL %ESP, t_ESP", then track ADDs and SUBs of
- literal values to t_ESP, and the total delta of the ADDs/SUBs. Then =
if
- "PUTL t_ESP, %ESP" happens, we call the helper with the known delta. =
We
- also cope with "MOVL t_ESP, tX", making tX the new t_ESP. If any oth=
er
- instruction clobbers t_ESP, we don't track it anymore, and fall back =
to
- the delta-is-unknown case. That case is also used when the delta is =
not
- a nice small amount, or an unknown amount.
+ spilled temps make it much harder to work out the SP deltas.
+ This it is done with Vex's "second instrumentation" pass.
+
+ Basically, we look for GET(SP)/PUT(SP) pairs and track constant
+ increments/decrements of SP between them. (This requires tracking on=
e or
+ more "aliases", which are not exact aliases but instead are tempregs
+ whose value is equal to the SP's plus or minus a known constant.)
+ If all the changes to SP leading up to a PUT(SP) are by known, small
+ constants, we can do a specific call to eg. new_mem_stack_4, otherwis=
e
+ we fall back to the case that handles an unknown SP change.
*/
-
static
IRBB* vg_SP_update_pass ( IRBB* bb_in,=20
VexGuestLayout* layout,=20
@@ -101,9 +204,8 @@
IRStmt* st;
IRExpr* e;
IRArray* descr;
- IRTemp curr;
IRType typeof_SP;
- Long delta;
+ Long delta, con;
=20
/* Set up BB */
IRBB* bb =3D emptyIRBB();
@@ -111,7 +213,6 @@
bb->next =3D dopyIRExpr(bb_in->next);
bb->jumpkind =3D bb_in->jumpkind;
=20
- curr =3D IRTemp_INVALID;
delta =3D 0;
=20
sizeof_SP =3D layout->sizeof_SP;
@@ -128,9 +229,10 @@
(sizeof_SP=3D=3D4 ? (Long)(Int)(con->Ico.U32) =
\
: (Long)(con->Ico.U64))
=20
-# define DO(kind, syze) =
\
+// XXX: convert this to a function
+# define DO(kind, syze, tmpp) =
\
do { =
\
- if (!VG_(tdict).track_##kind##_mem_stack_##syze) \
+ if (!VG_(tdict).track_##kind##_mem_stack_##syze) =
\
goto generic; =
\
=
\
/* I don't know if it's really necessary to say that the */ =
\
@@ -139,7 +241,7 @@
1/*regparms*/, =
\
"track_" #kind "_mem_stack_" #syze, =
\
VG_(tdict).track_##kind##_mem_stack_##syze, =
\
- mkIRExprVec_1(IRExpr_Tmp(curr)) =
\
+ mkIRExprVec_1(IRExpr_Tmp(tmpp)) =
\
); =
\
dcall->nFxState =3D 1; =
\
dcall->fxState[0].fx =3D Ifx_Read; =
\
@@ -147,13 +249,18 @@
dcall->fxState[0].size =3D layout->sizeof_SP; =
\
=
\
addStmtToIRBB( bb, IRStmt_Dirty(dcall) ); =
\
+ =
\
+ update_SP_aliases(-delta); =
\
+ =
\
+ n_SP_updates_fast++; =
\
+ =
\
} while (0)
=20
+ clear_SP_aliases();
+
for (i =3D 0; i < bb_in->stmts_used; i++) {
=20
st =3D bb_in->stmts[i];
- if (!st)
- continue;
=20
/* t =3D Get(sp): curr =3D t, delta =3D 0 */
if (st->tag !=3D Ist_Tmp) goto case2;
@@ -161,8 +268,7 @@
if (e->tag !=3D Iex_Get) goto case2;
if (e->Iex.Get.offset !=3D offset_SP) goto case2;
if (e->Iex.Get.ty !=3D typeof_SP) goto case2;
- curr =3D st->Ist.Tmp.tmp;
- delta =3D 0;
+ add_SP_alias(st->Ist.Tmp.tmp, 0);
addStmtToIRBB( bb, st );
continue;
=20
@@ -172,14 +278,15 @@
e =3D st->Ist.Tmp.data;
if (e->tag !=3D Iex_Binop) goto case3;
if (e->Iex.Binop.arg1->tag !=3D Iex_Tmp) goto case3;
- if (e->Iex.Binop.arg1->Iex.Tmp.tmp !=3D curr) goto case3;
+ if (!get_SP_delta(e->Iex.Binop.arg1->Iex.Tmp.tmp, &delta)) goto ca=
se3;
if (e->Iex.Binop.arg2->tag !=3D Iex_Const) goto case3;
if (!IS_ADD_OR_SUB(e->Iex.Binop.op)) goto case3;
- curr =3D st->Ist.Tmp.tmp;
- if (IS_ADD(e->Iex.Binop.op))
- delta +=3D GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
- else
- delta -=3D GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
+ con =3D GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
+ if (IS_ADD(e->Iex.Binop.op)) {
+ add_SP_alias(st->Ist.Tmp.tmp, delta + con);
+ } else {
+ add_SP_alias(st->Ist.Tmp.tmp, delta - con);
+ }
addStmtToIRBB( bb, st );
continue;
=20
@@ -188,8 +295,8 @@
if (st->tag !=3D Ist_Tmp) goto case4;
e =3D st->Ist.Tmp.data;
if (e->tag !=3D Iex_Tmp) goto case4;
- if (e->Iex.Tmp.tmp !=3D curr) goto case4;
- curr =3D st->Ist.Tmp.tmp;
+ if (!get_SP_delta(e->Iex.Tmp.tmp, &delta)) goto case4;
+ add_SP_alias(st->Ist.Tmp.tmp, delta);
addStmtToIRBB( bb, st );
continue;
=20
@@ -198,23 +305,31 @@
if (st->tag !=3D Ist_Put) goto case5;
if (st->Ist.Put.offset !=3D offset_SP) goto case5;
if (st->Ist.Put.data->tag !=3D Iex_Tmp) goto case5;
- if (st->Ist.Put.data->Iex.Tmp.tmp =3D=3D curr) {
+ if (get_SP_delta(st->Ist.Put.data->Iex.Tmp.tmp, &delta)) {
+ IRTemp tttmp =3D st->Ist.Put.data->Iex.Tmp.tmp;
switch (delta) {
- case 0: addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 4: DO(die, 4); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -4: DO(new, 4); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 8: DO(die, 8); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -8: DO(new, 8); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 12: DO(die, 12); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -12: DO(new, 12); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 16: DO(die, 16); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -16: DO(new, 16); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 32: DO(die, 32); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -32: DO(new, 32); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- default: goto generic;
+ case 0: addStmtToIRBB(bb,st); continue=
;
+ case 4: DO(die, 4, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -4: DO(new, 4, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 8: DO(die, 8, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -8: DO(new, 8, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 12: DO(die, 12, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -12: DO(new, 12, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 16: DO(die, 16, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -16: DO(new, 16, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 32: DO(die, 32, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -32: DO(new, 32, tttmp); addStmtToIRBB(bb,st); continue=
;
+ default: =20
+ n_SP_updates_generic_known++;
+ goto generic;
}
} else {
IRTemp old_SP;
+ n_SP_updates_generic_unknown++;
+
+ // Nb: if all is well, this generic case will typically be
+ // called something like every 1000th SP update. If it's more =
than
+ // that, the above code may be missing some cases.
generic:
/* Pass both the old and new SP values to this helper. */
old_SP =3D newIRTemp(bb->tyenv, typeof_SP);
@@ -232,8 +347,8 @@
=20
addStmtToIRBB( bb, st );
=20
- curr =3D st->Ist.Put.data->Iex.Tmp.tmp;
- delta =3D 0;
+ clear_SP_aliases();
+ add_SP_alias(st->Ist.Put.data->Iex.Tmp.tmp, 0);
continue;
}
=20
@@ -272,7 +387,6 @@
=20
}
=20
-
/*------------------------------------------------------------*/
/*--- Main entry point for the JITter. ---*/
/*------------------------------------------------------------*/
@@ -384,7 +498,8 @@
=20
/* This stops Vex from chasing into function entry points that we wish
to redirect. Chasing across them obviously defeats the redirect
- mechanism, with bad effects for Memcheck and possibly others.
+ mechanism, with bad effects for Memcheck, Addrcheck, and possibly
+ others.
=20
Also, we must stop Vex chasing into blocks for which we might want
to self checking.
Modified: branches/COMPVBITS/coregrind/m_transtab.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/COMPVBITS/coregrind/m_transtab.c 2005-12-13 20:23:38 UTC (re=
v 5332)
+++ branches/COMPVBITS/coregrind/m_transtab.c 2005-12-13 20:54:11 UTC (re=
v 5333)
@@ -1295,16 +1295,16 @@
n_fast_updates, n_fast_flushes );
=20
VG_(message)(Vg_DebugMsg,
- "translate: new %,lld "
+ " transtab: new %,lld "
"(%,llu -> %,llu; ratio %,llu:10) [%,llu scs]",
n_in_count, n_in_osize, n_in_tsize,
safe_idiv(10*n_in_tsize, n_in_osize),
n_in_sc_count);
VG_(message)(Vg_DebugMsg,
- "translate: dumped %,llu (%,llu -> ?" "?)",
+ " transtab: dumped %,llu (%,llu -> ?" "?)",
n_dump_count, n_dump_osize );
VG_(message)(Vg_DebugMsg,
- "translate: discarded %,llu (%,llu -> ?" "?)",
+ " transtab: discarded %,llu (%,llu -> ?" "?)",
n_disc_count, n_disc_osize );
=20
if (0) {
|
|
From: <sv...@va...> - 2005-12-13 20:23:40
|
Author: njn
Date: 2005-12-13 20:23:38 +0000 (Tue, 13 Dec 2005)
New Revision: 5332
Log:
Use user time instead of wall-clock time.
Modified:
trunk/perf/vg_perf.in
Modified: trunk/perf/vg_perf.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/vg_perf.in 2005-12-13 20:05:00 UTC (rev 5331)
+++ trunk/perf/vg_perf.in 2005-12-13 20:23:38 UTC (rev 5332)
@@ -225,7 +225,7 @@
}
}
=20
-# Run program N times, return the best wall-clock time.
+# Run program N times, return the best user time.
sub time_prog($$)
{
my ($cmd, $n) =3D @_;
@@ -234,11 +234,11 @@
mysystem("echo '$cmd' > perf.cmd");
my $retval =3D mysystem("$cmd > perf.stdout 2> perf.stderr");
(0 =3D=3D $retval) or=20
- die "\n*** Command returned non-zero: $cmd\n"
+ die "\n*** Command returned non-zero: $cmd"
. "\n*** See perf.{cmd,stdout,stderr} to diagnose what wen=
t wrong.\n";
my $out =3D `cat perf.stderr`;
- ($out =3D~ /walltime: ([\d\.]+)s/) or=20
- die "\n*** missing walltime in perf.stderr\n";
+ ($out =3D~ /usertime: ([\d\.]+)s/) or=20
+ die "\n*** missing usertime in perf.stderr\n";
$tmin =3D $1 if ($1 < $tmin);
}
return $tmin;
@@ -261,7 +261,7 @@
=20
printf("%-12s", "$name:");
=20
- my $timecmd =3D "/usr/bin/time -f 'walltime: %es'";
+ my $timecmd =3D "/usr/bin/time -f 'usertime: %Us'";
=20
# Do the native run(s).
printf("nt:");
|
|
From: <sv...@va...> - 2005-12-13 20:23:40
|
Author: cerion
Date: 2005-12-13 20:23:36 +0000 (Tue, 13 Dec 2005)
New Revision: 1489
Log:
Fix vex_printf padding.
Modified:
trunk/priv/main/vex_util.c
Modified: trunk/priv/main/vex_util.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/main/vex_util.c 2005-12-13 20:21:11 UTC (rev 1488)
+++ trunk/priv/main/vex_util.c 2005-12-13 20:23:36 UTC (rev 1489)
@@ -375,8 +375,8 @@
str =3D "(null)";
len1 =3D len3 =3D 0;
len2 =3D vex_strlen(str);
- if (fwidth > len2) { len1 =3D ljustify ? fwidth-len2 : 0;
- len3 =3D ljustify ? 0 : fwidth-len2; }
+ if (fwidth > len2) { len1 =3D ljustify ? 0 : fwidth-len2;
+ len3 =3D ljustify ? fwidth-len2 : 0; }
PAD(len1); PUTSTR(str); PAD(len3);
break;
}
@@ -387,8 +387,8 @@
str[1] =3D 0;
len1 =3D len3 =3D 0;
len2 =3D vex_strlen(str);
- if (fwidth > len2) { len1 =3D ljustify ? fwidth-len2 : 0;
- len3 =3D ljustify ? 0 : fwidth-len2; }
+ if (fwidth > len2) { len1 =3D ljustify ? 0 : fwidth-len2;
+ len3 =3D ljustify ? fwidth-len2 : 0; }
PAD(len1); PUTSTR(str); PAD(len3);
break;
}
@@ -403,8 +403,8 @@
False/*irrelevant*/);
len1 =3D len3 =3D 0;
len2 =3D vex_strlen(intbuf);
- if (fwidth > len2) { len1 =3D ljustify ? fwidth-len2 : 0;
- len3 =3D ljustify ? 0 : fwidth-len2; }
+ if (fwidth > len2) { len1 =3D ljustify ? 0 : fwidth-len2;
+ len3 =3D ljustify ? fwidth-len2 : 0; }
PAD(len1); PUTSTR(intbuf); PAD(len3);
break;
}
@@ -422,8 +422,8 @@
convert_int(intbuf, l, base, False/*unsigned*/, hexcaps);
len1 =3D len3 =3D 0;
len2 =3D vex_strlen(intbuf);
- if (fwidth > len2) { len1 =3D ljustify ? fwidth-len2 : 0;
- len3 =3D ljustify ? 0 : fwidth-len2; }
+ if (fwidth > len2) { len1 =3D ljustify ? 0 : fwidth-len2;
+ len3 =3D ljustify ? fwidth-len2 : 0; }
PAD(len1); PUTSTR(intbuf); PAD(len3);
break;
}
@@ -434,8 +434,8 @@
convert_int(intbuf, l, 16/*base*/, False/*unsigned*/, hexcap=
s);
len1 =3D len3 =3D 0;
len2 =3D vex_strlen(intbuf)+2;
- if (fwidth > len2) { len1 =3D ljustify ? fwidth-len2 : 0;
- len3 =3D ljustify ? 0 : fwidth-len2; }
+ if (fwidth > len2) { len1 =3D ljustify ? 0 : fwidth-len2;
+ len3 =3D ljustify ? fwidth-len2 : 0; }
PAD(len1); PUT('0'); PUT('x'); PUTSTR(intbuf); PAD(len3);
break;
}
|
|
From: <sv...@va...> - 2005-12-13 20:21:18
|
Author: cerion Date: 2005-12-13 20:21:11 +0000 (Tue, 13 Dec 2005) New Revision: 1488 Log: Implemented backend for ppc64, sharing ppc32 backend. - all immediates now use ULongs - some change in register usage conventions Implemented most insns for mode64, plus most ppc64-only instructions - new Iop_DivU/S64 Fixed couple of bugs in backend: - iselIntExpr_RI must sign-extend immediates - hdefs.c::Iop_Mul16/32: set syned =3D False Currently runs several test programs succesfully via the switchbacker (bz= ip, emfloat), but still dies with real progs. Modified: trunk/auxprogs/genoffsets.c trunk/priv/guest-ppc32/gdefs.h trunk/priv/guest-ppc32/ghelpers.c trunk/priv/guest-ppc32/toIR.c trunk/priv/host-ppc32/hdefs.c trunk/priv/host-ppc32/hdefs.h trunk/priv/host-ppc32/isel.c trunk/priv/ir/irdefs.c trunk/priv/main/vex_main.c trunk/pub/libvex_ir.h [... diff too large to include ...] |
|
From: <sv...@va...> - 2005-12-13 20:05:13
|
Author: njn
Date: 2005-12-13 20:05:00 +0000 (Tue, 13 Dec 2005)
New Revision: 5331
Log:
Improve vg_SP_update_pass() to catch more constant offset cases. Improve=
s
performance by 1--3% on several programs on my machine.
Modified:
trunk/coregrind/m_translate.c
trunk/coregrind/m_transtab.c
trunk/docs/internals/performance.txt
Modified: trunk/coregrind/m_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_translate.c 2005-12-13 17:20:24 UTC (rev 5330)
+++ trunk/coregrind/m_translate.c 2005-12-13 20:05:00 UTC (rev 5331)
@@ -49,7 +49,6 @@
#include "pub_core_translate.h"
#include "pub_core_transtab.h"
=20
-
/*------------------------------------------------------------*/
/*--- Stats ---*/
/*------------------------------------------------------------*/
@@ -99,24 +98,99 @@
VG_(tdict).track_die_mem_stack );
}
=20
-/* NOTE: this comment is out of date */
+// - The SP aliases are held in an array which is used as a circular buf=
fer.
+// This misses very few constant updates of SP (ie. < 0.1%) while usin=
g a
+// small, constant structure that will also never fill up and cause
+// execution to abort.
+// - Unused slots have a .temp value of 'IRTemp_INVALID'.
+// - 'next_SP_alias_slot' is the index where the next alias will be stor=
ed.
+// - If the buffer fills, we circle around and start over-writing
+// non-IRTemp_INVALID values. This is rare, and the overwriting of a
+// value that would have subsequently be used is even rarer.
+// - Every slot below next_SP_alias_slot holds a non-IRTemp_INVALID valu=
e.
+// The rest either all won't (if we haven't yet circled around) or all
+// will (if we have circled around).
=20
-/* For tools that want to know about %ESP changes, this pass adds
+typedef=20
+ struct {
+ IRTemp temp;
+ Long delta;
+ }
+ SP_Alias;
+
+// With 32 slots the buffer fills very rarely -- eg. once in a run of GC=
C.
+// And I've tested with smaller values and the wrap-around case works ok=
.
+#define N_ALIASES 32
+static SP_Alias SP_aliases[N_ALIASES];
+static Int next_SP_alias_slot =3D 0;
+
+static void clear_SP_aliases(void)
+{
+ Int i;
+ for (i =3D 0; i < N_ALIASES; i++) {
+ SP_aliases[i].temp =3D IRTemp_INVALID;
+ SP_aliases[i].delta =3D 0;
+ }
+ next_SP_alias_slot =3D 0;
+}
+
+static void add_SP_alias(IRTemp temp, Long delta)
+{
+ vg_assert(temp !=3D IRTemp_INVALID);
+ SP_aliases[ next_SP_alias_slot ].temp =3D temp;
+ SP_aliases[ next_SP_alias_slot ].delta =3D delta;
+ next_SP_alias_slot++;
+ if (N_ALIASES =3D=3D next_SP_alias_slot) next_SP_alias_slot =3D 0;
+}
+
+static Bool get_SP_delta(IRTemp temp, ULong* delta)
+{
+ Int i; // i must be signed!
+ vg_assert(IRTemp_INVALID !=3D temp);
+ // Search backwards between current buffer position and the start.
+ for (i =3D next_SP_alias_slot-1; i >=3D 0; i--) {
+ if (temp =3D=3D SP_aliases[i].temp) {
+ *delta =3D SP_aliases[i].delta;
+ return True;
+ }
+ }
+ // Search backwards between the end and the current buffer position.
+ for (i =3D N_ALIASES-1; i >=3D next_SP_alias_slot; i--) {
+ if (temp =3D=3D SP_aliases[i].temp) {
+ *delta =3D SP_aliases[i].delta;
+ return True;
+ }
+ }
+ return False;
+}
+
+static void update_SP_aliases(Long delta)
+{
+ Int i;
+ for (i =3D 0; i < N_ALIASES; i++) {
+ if (SP_aliases[i].temp =3D=3D IRTemp_INVALID) {
+ return;
+ }
+ SP_aliases[i].delta +=3D delta;
+ }
+}
+
+
+/* For tools that want to know about SP changes, this pass adds
in the appropriate hooks. We have to do it after the tool's
- instrumentation, so the tool doesn't have to worry about the CCALLs
+ instrumentation, so the tool doesn't have to worry about the C calls
it adds in, and we must do it before register allocation because
- spilled temps make it much harder to work out the %esp deltas.
- Thus we have it as an extra phase between the two.=20
- =20
- We look for "GETL %ESP, t_ESP", then track ADDs and SUBs of
- literal values to t_ESP, and the total delta of the ADDs/SUBs. Then =
if
- "PUTL t_ESP, %ESP" happens, we call the helper with the known delta. =
We
- also cope with "MOVL t_ESP, tX", making tX the new t_ESP. If any oth=
er
- instruction clobbers t_ESP, we don't track it anymore, and fall back =
to
- the delta-is-unknown case. That case is also used when the delta is =
not
- a nice small amount, or an unknown amount.
+ spilled temps make it much harder to work out the SP deltas.
+ This it is done with Vex's "second instrumentation" pass.
+
+ Basically, we look for GET(SP)/PUT(SP) pairs and track constant
+ increments/decrements of SP between them. (This requires tracking on=
e or
+ more "aliases", which are not exact aliases but instead are tempregs
+ whose value is equal to the SP's plus or minus a known constant.)
+ If all the changes to SP leading up to a PUT(SP) are by known, small
+ constants, we can do a specific call to eg. new_mem_stack_4, otherwis=
e
+ we fall back to the case that handles an unknown SP change.
*/
-
static
IRBB* vg_SP_update_pass ( IRBB* bb_in,=20
VexGuestLayout* layout,=20
@@ -130,9 +204,8 @@
IRStmt* st;
IRExpr* e;
IRArray* descr;
- IRTemp curr;
IRType typeof_SP;
- Long delta;
+ Long delta, con;
=20
/* Set up BB */
IRBB* bb =3D emptyIRBB();
@@ -140,7 +213,6 @@
bb->next =3D dopyIRExpr(bb_in->next);
bb->jumpkind =3D bb_in->jumpkind;
=20
- curr =3D IRTemp_INVALID;
delta =3D 0;
=20
sizeof_SP =3D layout->sizeof_SP;
@@ -157,9 +229,10 @@
(sizeof_SP=3D=3D4 ? (Long)(Int)(con->Ico.U32) =
\
: (Long)(con->Ico.U64))
=20
-# define DO(kind, syze) =
\
+// XXX: convert this to a function
+# define DO(kind, syze, tmpp) =
\
do { =
\
- if (!VG_(tdict).track_##kind##_mem_stack_##syze) \
+ if (!VG_(tdict).track_##kind##_mem_stack_##syze) =
\
goto generic; =
\
=
\
/* I don't know if it's really necessary to say that the */ =
\
@@ -168,7 +241,7 @@
1/*regparms*/, =
\
"track_" #kind "_mem_stack_" #syze, =
\
VG_(tdict).track_##kind##_mem_stack_##syze, =
\
- mkIRExprVec_1(IRExpr_Tmp(curr)) =
\
+ mkIRExprVec_1(IRExpr_Tmp(tmpp)) =
\
); =
\
dcall->nFxState =3D 1; =
\
dcall->fxState[0].fx =3D Ifx_Read; =
\
@@ -177,15 +250,17 @@
=
\
addStmtToIRBB( bb, IRStmt_Dirty(dcall) ); =
\
=
\
+ update_SP_aliases(-delta); =
\
+ =
\
n_SP_updates_fast++; =
\
=
\
} while (0)
=20
+ clear_SP_aliases();
+
for (i =3D 0; i < bb_in->stmts_used; i++) {
=20
st =3D bb_in->stmts[i];
- if (!st)
- continue;
=20
/* t =3D Get(sp): curr =3D t, delta =3D 0 */
if (st->tag !=3D Ist_Tmp) goto case2;
@@ -193,8 +268,7 @@
if (e->tag !=3D Iex_Get) goto case2;
if (e->Iex.Get.offset !=3D offset_SP) goto case2;
if (e->Iex.Get.ty !=3D typeof_SP) goto case2;
- curr =3D st->Ist.Tmp.tmp;
- delta =3D 0;
+ add_SP_alias(st->Ist.Tmp.tmp, 0);
addStmtToIRBB( bb, st );
continue;
=20
@@ -204,14 +278,15 @@
e =3D st->Ist.Tmp.data;
if (e->tag !=3D Iex_Binop) goto case3;
if (e->Iex.Binop.arg1->tag !=3D Iex_Tmp) goto case3;
- if (e->Iex.Binop.arg1->Iex.Tmp.tmp !=3D curr) goto case3;
+ if (!get_SP_delta(e->Iex.Binop.arg1->Iex.Tmp.tmp, &delta)) goto ca=
se3;
if (e->Iex.Binop.arg2->tag !=3D Iex_Const) goto case3;
if (!IS_ADD_OR_SUB(e->Iex.Binop.op)) goto case3;
- curr =3D st->Ist.Tmp.tmp;
- if (IS_ADD(e->Iex.Binop.op))
- delta +=3D GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
- else
- delta -=3D GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
+ con =3D GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
+ if (IS_ADD(e->Iex.Binop.op)) {
+ add_SP_alias(st->Ist.Tmp.tmp, delta + con);
+ } else {
+ add_SP_alias(st->Ist.Tmp.tmp, delta - con);
+ }
addStmtToIRBB( bb, st );
continue;
=20
@@ -220,8 +295,8 @@
if (st->tag !=3D Ist_Tmp) goto case4;
e =3D st->Ist.Tmp.data;
if (e->tag !=3D Iex_Tmp) goto case4;
- if (e->Iex.Tmp.tmp !=3D curr) goto case4;
- curr =3D st->Ist.Tmp.tmp;
+ if (!get_SP_delta(e->Iex.Tmp.tmp, &delta)) goto case4;
+ add_SP_alias(st->Ist.Tmp.tmp, delta);
addStmtToIRBB( bb, st );
continue;
=20
@@ -230,19 +305,20 @@
if (st->tag !=3D Ist_Put) goto case5;
if (st->Ist.Put.offset !=3D offset_SP) goto case5;
if (st->Ist.Put.data->tag !=3D Iex_Tmp) goto case5;
- if (st->Ist.Put.data->Iex.Tmp.tmp =3D=3D curr) {
+ if (get_SP_delta(st->Ist.Put.data->Iex.Tmp.tmp, &delta)) {
+ IRTemp tttmp =3D st->Ist.Put.data->Iex.Tmp.tmp;
switch (delta) {
- case 0: addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 4: DO(die, 4); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -4: DO(new, 4); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 8: DO(die, 8); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -8: DO(new, 8); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 12: DO(die, 12); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -12: DO(new, 12); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 16: DO(die, 16); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -16: DO(new, 16); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case 32: DO(die, 32); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
- case -32: DO(new, 32); addStmtToIRBB(bb,st); delta =3D 0; co=
ntinue;
+ case 0: addStmtToIRBB(bb,st); continue=
;
+ case 4: DO(die, 4, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -4: DO(new, 4, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 8: DO(die, 8, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -8: DO(new, 8, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 12: DO(die, 12, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -12: DO(new, 12, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 16: DO(die, 16, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -16: DO(new, 16, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case 32: DO(die, 32, tttmp); addStmtToIRBB(bb,st); continue=
;
+ case -32: DO(new, 32, tttmp); addStmtToIRBB(bb,st); continue=
;
default: =20
n_SP_updates_generic_known++;
goto generic;
@@ -251,6 +327,9 @@
IRTemp old_SP;
n_SP_updates_generic_unknown++;
=20
+ // Nb: if all is well, this generic case will typically be
+ // called something like every 1000th SP update. If it's more =
than
+ // that, the above code may be missing some cases.
generic:
/* Pass both the old and new SP values to this helper. */
old_SP =3D newIRTemp(bb->tyenv, typeof_SP);
@@ -268,8 +347,8 @@
=20
addStmtToIRBB( bb, st );
=20
- curr =3D st->Ist.Put.data->Iex.Tmp.tmp;
- delta =3D 0;
+ clear_SP_aliases();
+ add_SP_alias(st->Ist.Put.data->Iex.Tmp.tmp, 0);
continue;
}
=20
@@ -308,7 +387,6 @@
=20
}
=20
-
/*------------------------------------------------------------*/
/*--- Main entry point for the JITter. ---*/
/*------------------------------------------------------------*/
Modified: trunk/coregrind/m_transtab.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_transtab.c 2005-12-13 17:20:24 UTC (rev 5330)
+++ trunk/coregrind/m_transtab.c 2005-12-13 20:05:00 UTC (rev 5331)
@@ -1295,16 +1295,16 @@
n_fast_updates, n_fast_flushes );
=20
VG_(message)(Vg_DebugMsg,
- "translate: new %,lld "
+ " transtab: new %,lld "
"(%,llu -> %,llu; ratio %,llu:10) [%,llu scs]",
n_in_count, n_in_osize, n_in_tsize,
safe_idiv(10*n_in_tsize, n_in_osize),
n_in_sc_count);
VG_(message)(Vg_DebugMsg,
- "translate: dumped %,llu (%,llu -> ?" "?)",
+ " transtab: dumped %,llu (%,llu -> ?" "?)",
n_dump_count, n_dump_osize );
VG_(message)(Vg_DebugMsg,
- "translate: discarded %,llu (%,llu -> ?" "?)",
+ " transtab: discarded %,llu (%,llu -> ?" "?)",
n_disc_count, n_disc_osize );
=20
if (0) {
Modified: trunk/docs/internals/performance.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/docs/internals/performance.txt 2005-12-13 17:20:24 UTC (rev 533=
0)
+++ trunk/docs/internals/performance.txt 2005-12-13 20:05:00 UTC (rev 533=
1)
@@ -11,6 +11,9 @@
=20
Post 3.1.0:
- Julian made the tree builder linear. Saved 2--13% on a range of progr=
ams.
+- Nick improved vg_SP_update_pass() to identify more small constant
+ increments/decrements of SP, so the fast cases can be used more often.
+ Saved 1--3% on a few programs.
=20
COMPVBITS branch:
- Nick converted to compress V bits, initial version saved 0--5% on most
|
|
From: <sv...@va...> - 2005-12-13 17:20:28
|
Author: njn Date: 2005-12-13 17:20:24 +0000 (Tue, 13 Dec 2005) New Revision: 5330 Log: File recording info about each performance benchmark. Added: trunk/perf/README Added: trunk/perf/README =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/perf/README (rev 0) +++ trunk/perf/README 2005-12-13 17:20:24 UTC (rev 5330) @@ -0,0 +1,34 @@ +------------------------------------------------------------------------= ----- +Notes about performance benchmarks +------------------------------------------------------------------------= ----- +For each benchmark, here is a brief description and notes about strength= s +and weaknesses of the benchmark. + +bz2: +- Description: Burrows-Wheeler compression and decompression. +- Strengths: A real, widely used program, very similar to the 256.bzip= 2 + SPEC2000 benchmark. Not dominated by any code, the hotte= st + 55 blocks account for only 90% of execution. Has lots of + short blocks and stresses the memory system hard. +- Weaknesses: None, really, it's a good benchmark. + +fbench: +- Description: Does some ray-tracing. +- Strengths: Moderately realistic program. +- Weaknesses: Dominated by sin and cos, which are not widely used, and = are + hardware-supported on x86 but not on other platforms such= as + PPC. + +ffbench:=20 +- Description: Does a Fast Fourier Transform (FFT). +- Strengths: Tests common FP ops (mostly adding and multiplying array + elements), FFT is a very important operation. +- Weaknesses: Dominated by the inner loop, which is quite long and flat= ters + Valgrind due to the small dispatcher overhead. + +sarp: +- Description: Does a lot of stack allocation and deallocation. +- Strengths: Tests for a specific performance bug that existed in 3.1.= 0 and + all earlier versions. +- Weaknesses: Highly artificial. + |
|
From: <sv...@va...> - 2005-12-13 17:13:42
|
Author: sewardj
Date: 2005-12-13 17:13:39 +0000 (Tue, 13 Dec 2005)
New Revision: 5329
Log:
Remove nanosleep and adjust iteration count and array size accordingly.
Modified:
trunk/perf/sarp.c
Modified: trunk/perf/sarp.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/sarp.c 2005-12-13 16:54:58 UTC (rev 5328)
+++ trunk/perf/sarp.c 2005-12-13 17:13:39 UTC (rev 5329)
@@ -11,18 +11,18 @@
#include <assert.h>
#include <time.h>
=20
-#define REPS 1000*1000
+#define REPS 1000*1000*10
=20
int f(int i)
{
// This nonsense is just to ensure that the compiler does not optimis=
e
// away the stack allocation.
- char big_array[8348];
- big_array[0] =3D 12;
- big_array[2333] =3D 34;
- big_array[5678] =3D 56;
- big_array[8347] =3D 78;
- assert( 8000 =3D=3D (&big_array[8100] - &big_array[100]) );
+ char big_array[500];
+ big_array[0] =3D 12;
+ big_array[ 23] =3D 34;
+ big_array[256] =3D 56;
+ big_array[434] =3D 78;
+ assert( 480 =3D=3D (&big_array[490] - &big_array[10]) );
return big_array[i];
}
=20
@@ -36,7 +36,7 @@
=20
// Pause for a bit so that the native run-time is not 0.00, which lea=
ds
// to ridiculous slow-down figures.
- nanosleep(&req, NULL);
+ //nanosleep(&req, NULL);
=20
for (i =3D 0; i < REPS; i++) {
sum +=3D f(i & 0xff);
|
|
From: <sv...@va...> - 2005-12-13 16:55:11
|
Author: njn
Date: 2005-12-13 16:54:58 +0000 (Tue, 13 Dec 2005)
New Revision: 5328
Log:
Abort the performance timings if any of the programs fail,
and record info in perf.{cmd,stdout,stderr} to allow diagnosis.
Modified:
trunk/perf/vg_perf.in
Modified: trunk/perf/vg_perf.in
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/vg_perf.in 2005-12-13 16:38:55 UTC (rev 5327)
+++ trunk/perf/vg_perf.in 2005-12-13 16:54:58 UTC (rev 5328)
@@ -216,7 +216,13 @@
# propagate a Ctrl-C enabling us to quit.
sub mysystem($)=20
{
- (system($_[0]) !=3D 2) or exit 1; # 2 is SIGINT
+ my ($cmd) =3D @_;
+ my $retval =3D system($cmd);
+ if ($retval =3D=3D 2) {=20
+ exit 1;=20
+ } else {
+ return $retval;
+ }
}
=20
# Run program N times, return the best wall-clock time.
@@ -225,8 +231,14 @@
my ($cmd, $n) =3D @_;
my $tmin =3D 999999;
for (my $i =3D 0; $i < $n; $i++) {
- my $out =3D `$cmd 2>&1 1>/dev/null`;
- $out =3D~ /walltime: ([\d\.]+)s/;
+ mysystem("echo '$cmd' > perf.cmd");
+ my $retval =3D mysystem("$cmd > perf.stdout 2> perf.stderr");
+ (0 =3D=3D $retval) or=20
+ die "\n*** Command returned non-zero: $cmd\n"
+ . "\n*** See perf.{cmd,stdout,stderr} to diagnose what wen=
t wrong.\n";
+ my $out =3D `cat perf.stderr`;
+ ($out =3D~ /walltime: ([\d\.]+)s/) or=20
+ die "\n*** missing walltime in perf.stderr\n";
$tmin =3D $1 if ($1 < $tmin);
}
return $tmin;
|
|
From: <sv...@va...> - 2005-12-13 16:39:11
|
Author: njn
Date: 2005-12-13 16:38:55 +0000 (Tue, 13 Dec 2005)
New Revision: 5327
Log:
Make sarp return zero.
Modified:
trunk/perf/sarp.c
Modified: trunk/perf/sarp.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/perf/sarp.c 2005-12-13 04:06:29 UTC (rev 5326)
+++ trunk/perf/sarp.c 2005-12-13 16:38:55 UTC (rev 5327)
@@ -41,6 +41,6 @@
for (i =3D 0; i < REPS; i++) {
sum +=3D f(i & 0xff);
}
- return sum % 256;
+ return ( sum =3D=3D 0xdeadbeef ? 1 : 0 );
}
=20
|
|
From: Nicholas N. <nj...@cs...> - 2005-12-13 15:25:11
|
On Tue, 13 Dec 2005, Cerion Armour-Brown wrote: >> Add two new programs to the performance suite. > > Now i get: > > bz2: nt: 1.1s nl: 0.0s ( 0.0x) mc: 0.0s ( 0.0x) > fbench: nt: 0.6s nl: 0.0s ( 0.0x) mc: 0.0s ( 0.0x) > ffbench: nt: 2.3s nl: 0.0s ( 0.0x) mc: 0.0s ( 0.0x) > sarp: nt: 0.1s nl: 0.0s ( 0.0x) mc: 0.0s ( 0.0x) So we shouldn't have any more complaints about Valgrind's speed? I have some changes to make vg_perf more robust, ie. detect if a test fails, and give you a chance to diagnose it. I'll commit them later today. Thanks, Nick |
|
From: <sv...@va...> - 2005-12-13 12:02:36
|
Author: cerion
Date: 2005-12-13 12:02:26 +0000 (Tue, 13 Dec 2005)
New Revision: 1487
Log:
Added 'Bool mode64' to the various backend functions, to distinguish 32/6=
4bit arch's.
This will be needed for the ppc32/64 backend.
Modified:
trunk/priv/guest-generic/bb_to_IR.c
trunk/priv/host-amd64/hdefs.c
trunk/priv/host-amd64/hdefs.h
trunk/priv/host-amd64/isel.c
trunk/priv/host-generic/h_generic_regs.h
trunk/priv/host-generic/reg_alloc2.c
trunk/priv/host-ppc32/hdefs.c
trunk/priv/host-ppc32/hdefs.h
trunk/priv/host-ppc32/isel.c
trunk/priv/host-x86/hdefs.c
trunk/priv/host-x86/hdefs.h
trunk/priv/host-x86/isel.c
trunk/priv/main/vex_main.c
Modified: trunk/priv/guest-generic/bb_to_IR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-generic/bb_to_IR.c 2005-12-07 22:19:36 UTC (rev 1486=
)
+++ trunk/priv/guest-generic/bb_to_IR.c 2005-12-13 12:02:26 UTC (rev 1487=
)
@@ -274,8 +274,8 @@
vassert(resteerOKfn(dres.continueAt));
delta =3D dres.continueAt - guest_IP_bbstart;
/* we now have to start a new extent slot. */
- vge->n_used++;
- vassert(vge->n_used <=3D 3);
+ vge->n_used++;
+ vassert(vge->n_used <=3D 3);
vge->base[vge->n_used-1] =3D dres.continueAt;
vge->len[vge->n_used-1] =3D 0;
n_resteers++;
Modified: trunk/priv/host-amd64/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-amd64/hdefs.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -1019,8 +1019,9 @@
return i;
}
=20
-void ppAMD64Instr ( AMD64Instr* i )=20
+void ppAMD64Instr ( AMD64Instr* i, Bool mode64 )=20
{
+ vassert(mode64 =3D=3D True);
switch (i->tag) {
case Ain_Imm64:=20
vex_printf("movabsq $0x%llx,", i->Ain.Imm64.imm64);
@@ -1335,9 +1336,10 @@
=20
/* --------- Helpers for register allocation. --------- */
=20
-void getRegUsage_AMD64Instr ( HRegUsage* u, AMD64Instr* i )
+void getRegUsage_AMD64Instr ( HRegUsage* u, AMD64Instr* i, Bool mode64 )
{
Bool unary;
+ vassert(mode64 =3D=3D True);
initHRegUsage(u);
switch (i->tag) {
case Ain_Imm64:
@@ -1607,7 +1609,7 @@
addHRegUse(u, HRmWrite, i->Ain.SseShuf.dst);
return;
default:
- ppAMD64Instr(i);
+ ppAMD64Instr(i, mode64);
vpanic("getRegUsage_AMD64Instr");
}
}
@@ -1618,8 +1620,9 @@
*r =3D lookupHRegRemap(m, *r);
}
=20
-void mapRegs_AMD64Instr ( HRegRemap* m, AMD64Instr* i )
+void mapRegs_AMD64Instr ( HRegRemap* m, AMD64Instr* i, Bool mode64 )
{
+ vassert(mode64 =3D=3D True);
switch (i->tag) {
case Ain_Imm64:
mapReg(m, &i->Ain.Imm64.dst);
@@ -1781,7 +1784,7 @@
mapReg(m, &i->Ain.SseShuf.dst);
return;
default:
- ppAMD64Instr(i);
+ ppAMD64Instr(i, mode64);
vpanic("mapRegs_AMD64Instr");
}
}
@@ -1818,11 +1821,12 @@
register allocator. Note it's critical these don't write the
condition codes. */
=20
-AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offsetB )
+AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offsetB, Bool mode64 )
{
AMD64AMode* am;
vassert(offsetB >=3D 0);
vassert(!hregIsVirtual(rreg));
+ vassert(mode64 =3D=3D True);
am =3D AMD64AMode_IR(offsetB, hregAMD64_RBP());
=20
switch (hregClass(rreg)) {
@@ -1836,11 +1840,12 @@
}
}
=20
-AMD64Instr* genReload_AMD64 ( HReg rreg, Int offsetB )
+AMD64Instr* genReload_AMD64 ( HReg rreg, Int offsetB, Bool mode64 )
{
AMD64AMode* am;
vassert(offsetB >=3D 0);
vassert(!hregIsVirtual(rreg));
+ vassert(mode64 =3D=3D True);
am =3D AMD64AMode_IR(offsetB, hregAMD64_RBP());
switch (hregClass(rreg)) {
case HRcInt64:
@@ -2195,7 +2200,7 @@
Note that buf is not the insn's final place, and therefore it is
imperative to emit position-independent code. */
=20
-Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i )
+Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64Instr* i, Bool mode64 )
{
UInt /*irno,*/ opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, su=
bopc;
UInt xtra;
@@ -2205,13 +2210,14 @@
UChar* ptmp;
Int j;
vassert(nbuf >=3D 32);
+ vassert(mode64 =3D=3D True);
=20
/* Wrap an integer as a int register, for use assembling
GrpN insns, in which the greg field is used as a sub-opcode
and does not really contain a register. */
# define fake(_n) mkHReg((_n), HRcInt64, False)
=20
- /* vex_printf("asm "); ppAMD64Instr(i); vex_printf("\n"); */
+ /* vex_printf("asm "); ppAMD64Instr(i, mode64); vex_printf("\n"); */
=20
switch (i->tag) {
=20
@@ -3337,7 +3343,7 @@
}
=20
bad:
- ppAMD64Instr(i);
+ ppAMD64Instr(i, mode64);
vpanic("emit_AMD64Instr");
/*NOTREACHED*/
=20
Modified: trunk/priv/host-amd64/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/hdefs.h 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-amd64/hdefs.h 2005-12-13 12:02:26 UTC (rev 1487)
@@ -708,16 +708,16 @@
extern AMD64Instr* AMD64Instr_SseShuf ( Int order, HReg src, HReg dst=
);
=20
=20
-extern void ppAMD64Instr ( AMD64Instr* );
+extern void ppAMD64Instr ( AMD64Instr*, Bool );
=20
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_AMD64Instr ( HRegUsage*, AMD64Instr* );
-extern void mapRegs_AMD64Instr ( HRegRemap*, AMD64Instr* );
+extern void getRegUsage_AMD64Instr ( HRegUsage*, AMD64Instr*, Bo=
ol );
+extern void mapRegs_AMD64Instr ( HRegRemap*, AMD64Instr*, Bo=
ol );
extern Bool isMove_AMD64Instr ( AMD64Instr*, HReg*, HReg* )=
;
-extern Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64=
Instr* );
-extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset );
-extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset );
+extern Int emit_AMD64Instr ( UChar* buf, Int nbuf, AMD64=
Instr*, Bool );
+extern AMD64Instr* genSpill_AMD64 ( HReg rreg, Int offset, Bool=
);
+extern AMD64Instr* genReload_AMD64 ( HReg rreg, Int offset, Bool=
);
extern void getAllocableRegs_AMD64 ( Int*, HReg** );
extern HInstrArray* iselBB_AMD64 ( IRBB*, VexArchInfo* );
=20
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-amd64/isel.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -171,7 +171,7 @@
{
addHInstr(env->code, instr);
if (vex_traceflags & VEX_TRACE_VCODE) {
- ppAMD64Instr(instr);
+ ppAMD64Instr(instr, False);
vex_printf("\n");
}
}
Modified: trunk/priv/host-generic/h_generic_regs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-generic/h_generic_regs.h 2005-12-07 22:19:36 UTC (rev=
1486)
+++ trunk/priv/host-generic/h_generic_regs.h 2005-12-13 12:02:26 UTC (rev=
1487)
@@ -253,20 +253,23 @@
Bool (*isMove) (HInstr*, HReg*, HReg*),
=20
/* Get info about register usage in this insn. */
- void (*getRegUsage) (HRegUsage*, HInstr*),
+ void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
=20
/* Apply a reg-reg mapping to an insn. */
- void (*mapRegs) (HRegRemap*, HInstr*),
+ void (*mapRegs) (HRegRemap*, HInstr*, Bool),
=20
/* Return an insn to spill/restore a real reg to a spill slot
offset. */
- HInstr* (*genSpill) ( HReg, Int ),
- HInstr* (*genReload) ( HReg, Int ),
+ HInstr* (*genSpill) ( HReg, Int, Bool ),
+ HInstr* (*genReload) ( HReg, Int, Bool ),
Int guest_sizeB,
=20
/* For debug printing only. */
- void (*ppInstr) ( HInstr* ),
- void (*ppReg) ( HReg )
+ void (*ppInstr) ( HInstr*, Bool ),
+ void (*ppReg) ( HReg ),
+
+ /* 32/64bit mode */
+ Bool mode64
);
=20
=20
Modified: trunk/priv/host-generic/reg_alloc2.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-generic/reg_alloc2.c 2005-12-07 22:19:36 UTC (rev 148=
6)
+++ trunk/priv/host-generic/reg_alloc2.c 2005-12-13 12:02:26 UTC (rev 148=
7)
@@ -155,14 +155,15 @@
=20
/* Does this instruction mention a particular reg? */
static Bool instrMentionsReg (=20
- void (*getRegUsage) (HRegUsage*, HInstr*),
+ void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
HInstr* instr,=20
- HReg r=20
+ HReg r,
+ Bool mode64
)
{
Int i;
HRegUsage reg_usage;
- (*getRegUsage)(®_usage, instr);
+ (*getRegUsage)(®_usage, instr, mode64);
for (i =3D 0; i < reg_usage.n_used; i++)
if (reg_usage.hreg[i] =3D=3D r)
return True;
@@ -184,11 +185,12 @@
spill, or -1 if none was found. */
static
Int findMostDistantlyMentionedVReg (=20
- void (*getRegUsage) (HRegUsage*, HInstr*),
+ void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
HInstrArray* instrs_in,
Int search_from_instr,
RRegState* state,
- Int n_state
+ Int n_state,
+ Bool mode64
)
{
Int k, m;
@@ -201,7 +203,7 @@
vassert(state[k].disp =3D=3D Bound);
for (m =3D search_from_instr; m < instrs_in->arr_used; m++) {
if (instrMentionsReg(getRegUsage,=20
- instrs_in->arr[m], state[k].vreg))
+ instrs_in->arr[m], state[k].vreg, mode64))
break;
}
if (m > furthest) {
@@ -258,23 +260,26 @@
=20
/* Return True iff the given insn is a reg-reg move, in which
case also return the src and dst regs. */
- Bool (*isMove) (HInstr*, HReg*, HReg*),
+ Bool (*isMove) ( HInstr*, HReg*, HReg* ),
=20
/* Get info about register usage in this insn. */
- void (*getRegUsage) (HRegUsage*, HInstr*),
+ void (*getRegUsage) ( HRegUsage*, HInstr*, Bool ),
=20
/* Apply a reg-reg mapping to an insn. */
- void (*mapRegs) (HRegRemap*, HInstr*),
+ void (*mapRegs) ( HRegRemap*, HInstr*, Bool ),
=20
/* Return an insn to spill/restore a real reg to a spill slot
byte offset. */
- HInstr* (*genSpill) ( HReg, Int ),
- HInstr* (*genReload) ( HReg, Int ),
+ HInstr* (*genSpill) ( HReg, Int, Bool ),
+ HInstr* (*genReload) ( HReg, Int, Bool ),
Int guest_sizeB,
=20
/* For debug printing only. */
- void (*ppInstr) ( HInstr* ),
- void (*ppReg) ( HReg )
+ void (*ppInstr) ( HInstr*, Bool ),
+ void (*ppReg) ( HReg ),
+
+ /* 32/64bit mode */
+ Bool mode64
)
{
# define N_SPILL64S (LibVEX_N_SPILL_BYTES / 8)
@@ -336,7 +341,7 @@
HInstr* _tmp =3D (_instr); \
if (DEBUG_REGALLOC) { \
vex_printf("** "); \
- (*ppInstr)(_tmp); \
+ (*ppInstr)(_tmp, mode64); \
vex_printf("\n\n"); \
} \
addHInstr ( instrs_out, _tmp ); \
@@ -451,11 +456,11 @@
=20
for (ii =3D 0; ii < instrs_in->arr_used; ii++) {
=20
- (*getRegUsage)( ®_usage, instrs_in->arr[ii] );
+ (*getRegUsage)( ®_usage, instrs_in->arr[ii], mode64 );
=20
# if 0
vex_printf("\n%d stage1: ", ii);
- (*ppInstr)(instrs_in->arr[ii]);
+ (*ppInstr)(instrs_in->arr[ii], mode64);
vex_printf("\n");
ppHRegUsage(®_usage);
# endif
@@ -472,7 +477,7 @@
k =3D hregNumber(vreg);
if (k < 0 || k >=3D n_vregs) {
vex_printf("\n");
- (*ppInstr)(instrs_in->arr[ii]);
+ (*ppInstr)(instrs_in->arr[ii], mode64);
vex_printf("\n");
vex_printf("vreg %d, n_vregs %d\n", k, n_vregs);
vpanic("doRegisterAllocation: out-of-range vreg");
@@ -561,7 +566,7 @@
(*ppReg)(available_real_regs[k]);
vex_printf("\n");
vex_printf("\nOFFENDING instr =3D ");
- (*ppInstr)(instrs_in->arr[ii]);
+ (*ppInstr)(instrs_in->arr[ii], mode64);
vex_printf("\n");
vpanic("doRegisterAllocation: "
"first event for rreg is Read");
@@ -574,7 +579,7 @@
(*ppReg)(available_real_regs[k]);
vex_printf("\n");
vex_printf("\nOFFENDING instr =3D ");
- (*ppInstr)(instrs_in->arr[ii]);
+ (*ppInstr)(instrs_in->arr[ii], mode64);
vex_printf("\n");
vpanic("doRegisterAllocation: "
"first event for rreg is Modify");
@@ -786,7 +791,7 @@
# if DEBUG_REGALLOC
vex_printf("\n=3D=3D=3D=3D----=3D=3D=3D=3D---- Insn %d ----=3D=3D=3D=
=3D----=3D=3D=3D=3D\n", ii);
vex_printf("---- ");
- (*ppInstr)(instrs_in->arr[ii]);
+ (*ppInstr)(instrs_in->arr[ii], mode64);
vex_printf("\n\nInitial state:\n");
PRINT_STATE;
vex_printf("\n");
@@ -1009,7 +1014,8 @@
if (vreg_lrs[m].dead_before > ii) {
vassert(vreg_lrs[m].reg_class !=3D HRcINVALID);
EMIT_INSTR( (*genSpill)( rreg_state[k].rreg,
- vreg_lrs[m].spill_offset ) );
+ vreg_lrs[m].spill_offset,
+ mode64 ) );
}
}
rreg_state[k].disp =3D Unavail;
@@ -1033,7 +1039,7 @@
We also build up the final vreg->rreg mapping to be applied
to the insn. */
=20
- (*getRegUsage)( ®_usage, instrs_in->arr[ii] );
+ (*getRegUsage)( ®_usage, instrs_in->arr[ii], mode64 );
=20
initHRegRemap(&remap);
=20
@@ -1098,7 +1104,8 @@
if (reg_usage.mode[j] !=3D HRmWrite) {
vassert(vreg_lrs[m].reg_class !=3D HRcINVALID);
EMIT_INSTR( (*genReload)( rreg_state[k].rreg,
- vreg_lrs[m].spill_offset ) );
+ vreg_lrs[m].spill_offset,
+ mode64 ) );
}
continue;
}
@@ -1133,7 +1140,7 @@
of consequent reloads required. */
spillee
=3D findMostDistantlyMentionedVReg (=20
- getRegUsage, instrs_in, ii+1, rreg_state, n_rregs );
+ getRegUsage, instrs_in, ii+1, rreg_state, n_rregs, mode=
64 );
=20
if (spillee =3D=3D -1) {
/* Hmmmmm. There don't appear to be any spill candidates.
@@ -1161,7 +1168,8 @@
vassert(vreg_lrs[m].dead_before > ii);
vassert(vreg_lrs[m].reg_class !=3D HRcINVALID);
EMIT_INSTR( (*genSpill)( rreg_state[spillee].rreg,
- vreg_lrs[m].spill_offset ) );
+ vreg_lrs[m].spill_offset,
+ mode64 ) );
=20
/* Update the rreg_state to reflect the new assignment for this
rreg. */
@@ -1177,7 +1185,8 @@
if (reg_usage.mode[j] !=3D HRmWrite) {
vassert(vreg_lrs[m].reg_class !=3D HRcINVALID);
EMIT_INSTR( (*genReload)( rreg_state[spillee].rreg,
- vreg_lrs[m].spill_offset ) );
+ vreg_lrs[m].spill_offset,
+ mode64 ) );
}
=20
/* So after much twisting and turning, we have vreg mapped to
@@ -1198,7 +1207,7 @@
*/
=20
/* NOTE, DESTRUCTIVELY MODIFIES instrs_in->arr[ii]. */
- (*mapRegs)( &remap, instrs_in->arr[ii] );
+ (*mapRegs)( &remap, instrs_in->arr[ii], mode64 );
EMIT_INSTR( instrs_in->arr[ii] );
=20
# if DEBUG_REGALLOC
Modified: trunk/priv/host-ppc32/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/hdefs.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-ppc32/hdefs.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -189,7 +189,7 @@
HReg hregPPC32_VR30 ( void ) { return mkHReg(30, HRcVec128, False); }
HReg hregPPC32_VR31 ( void ) { return mkHReg(31, HRcVec128, False); }
=20
-void getAllocableRegs_PPC32 ( Int* nregs, HReg** arr )
+void getAllocableRegs_PPC32 ( Int* nregs, HReg** arr, Bool mode64 )
{
UInt i=3D0;
*nregs =3D 90 - 24 - 24;
@@ -1088,7 +1088,7 @@
}
}
=20
-void ppPPC32Instr ( PPC32Instr* i )
+void ppPPC32Instr ( PPC32Instr* i, Bool mode64 )
{
switch (i->tag) {
case Pin_LI32:
@@ -1510,7 +1510,7 @@
=20
/* --------- Helpers for register allocation. --------- */
=20
-void getRegUsage_PPC32Instr ( HRegUsage* u, PPC32Instr* i )
+void getRegUsage_PPC32Instr ( HRegUsage* u, PPC32Instr* i, Bool mode64 )
{
initHRegUsage(u);
switch (i->tag) {
@@ -1734,18 +1734,18 @@
return;
=20
default:
- ppPPC32Instr(i);
+ ppPPC32Instr(i, mode64);
vpanic("getRegUsage_PPC32Instr");
}
}
=20
/* local helper */
-static void mapReg(HRegRemap* m, HReg* r)
+static void mapReg( HRegRemap* m, HReg* r )
{
*r =3D lookupHRegRemap(m, *r);
}
=20
-void mapRegs_PPC32Instr (HRegRemap* m, PPC32Instr* i)
+void mapRegs_PPC32Instr ( HRegRemap* m, PPC32Instr* i, Bool mode64 )
{
switch (i->tag) {
case Pin_LI32:
@@ -1907,7 +1907,7 @@
return;
=20
default:
- ppPPC32Instr(i);
+ ppPPC32Instr(i, mode64);
vpanic("mapRegs_PPC32Instr");
}
}
@@ -1946,7 +1946,7 @@
/* Generate ppc32 spill/reload instructions under the direction of the
register allocator. Note it's critical these don't write the
condition codes. */
-PPC32Instr* genSpill_PPC32 ( HReg rreg, UShort offsetB )
+PPC32Instr* genSpill_PPC32 ( HReg rreg, UShort offsetB, Bool mode64 )
{
PPC32AMode* am;
vassert(!hregIsVirtual(rreg));
@@ -1966,7 +1966,7 @@
}
}
=20
-PPC32Instr* genReload_PPC32 ( HReg rreg, UShort offsetB )
+PPC32Instr* genReload_PPC32 ( HReg rreg, UShort offsetB, Bool mode64 )
{
PPC32AMode* am;
vassert(!hregIsVirtual(rreg));
@@ -2286,13 +2286,13 @@
Note that buf is not the insn's final place, and therefore it is
imperative to emit position-independent code. */
=20
-Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32Instr* i )
+Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32Instr* i, Bool mode64 )
{
UChar* p =3D &buf[0];
UChar* ptmp =3D p;
vassert(nbuf >=3D 32);
=20
-// vex_printf("asm ");ppPPC32Instr(i); vex_printf("\n");
+// vex_printf("asm ");ppPPC32Instr(i, mode64); vex_printf("\n");
=20
switch (i->tag) {
=20
@@ -3295,7 +3295,7 @@
=20
bad:
vex_printf("\n=3D> ");
- ppPPC32Instr(i);
+ ppPPC32Instr(i, mode64);
vpanic("emit_PPC32Instr");
/*NOTREACHED*/
=20
Modified: trunk/priv/host-ppc32/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/hdefs.h 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-ppc32/hdefs.h 2005-12-13 12:02:26 UTC (rev 1487)
@@ -774,17 +774,17 @@
extern PPC32Instr* PPC32Instr_AvCMov ( PPC32CondCode, HReg dst, HReg=
src );
extern PPC32Instr* PPC32Instr_AvLdVSCR ( HReg src );
=20
-extern void ppPPC32Instr ( PPC32Instr* );
+extern void ppPPC32Instr ( PPC32Instr*, Bool mode64 );
=20
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_PPC32Instr ( HRegUsage*, PPC32Instr* );
-extern void mapRegs_PPC32Instr ( HRegRemap*, PPC32Instr* );
+extern void getRegUsage_PPC32Instr ( HRegUsage*, PPC32Instr*, Bo=
ol mode64 );
+extern void mapRegs_PPC32Instr ( HRegRemap*, PPC32Instr* , B=
ool mode64);
extern Bool isMove_PPC32Instr ( PPC32Instr*, HReg*, HReg* )=
;
-extern Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32=
Instr* );
-extern PPC32Instr* genSpill_PPC32 ( HReg rreg, UShort offsetB )=
;
-extern PPC32Instr* genReload_PPC32 ( HReg rreg, UShort offsetB )=
;
-extern void getAllocableRegs_PPC32 ( Int*, HReg** );
+extern Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32=
Instr*, Bool mode64 );
+extern PPC32Instr* genSpill_PPC32 ( HReg rreg, UShort offsetB, =
Bool mode64 );
+extern PPC32Instr* genReload_PPC32 ( HReg rreg, UShort offsetB, =
Bool mode64 );
+extern void getAllocableRegs_PPC32 ( Int*, HReg**, Bool mode64 )=
;
extern HInstrArray* iselBB_PPC32 ( IRBB*, VexArchInfo* );
=20
#endif /* ndef __LIBVEX_HOST_PPC32_HDEFS_H */
Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-ppc32/isel.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -209,7 +209,7 @@
{
addHInstr(env->code, instr);
if (vex_traceflags & VEX_TRACE_VCODE) {
- ppPPC32Instr(instr);
+ ppPPC32Instr(instr, False);
vex_printf("\n");
}
}
Modified: trunk/priv/host-x86/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/hdefs.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-x86/hdefs.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -877,7 +877,8 @@
return i;
}
=20
-void ppX86Instr ( X86Instr* i ) {
+void ppX86Instr ( X86Instr* i, Bool mode64 ) {
+ vassert(mode64 =3D=3D False);
switch (i->tag) {
case Xin_Alu32R:
vex_printf("%sl ", showX86AluOp(i->Xin.Alu32R.op));
@@ -1128,9 +1129,10 @@
=20
/* --------- Helpers for register allocation. --------- */
=20
-void getRegUsage_X86Instr (HRegUsage* u, X86Instr* i)
+void getRegUsage_X86Instr (HRegUsage* u, X86Instr* i, Bool mode64)
{
Bool unary;
+ vassert(mode64 =3D=3D False);
initHRegUsage(u);
switch (i->tag) {
case Xin_Alu32R:
@@ -1348,19 +1350,20 @@
addHRegUse(u, HRmWrite, i->Xin.SseShuf.dst);
return;
default:
- ppX86Instr(i);
+ ppX86Instr(i, False);
vpanic("getRegUsage_X86Instr");
}
}
=20
/* local helper */
-static void mapReg(HRegRemap* m, HReg* r)
+static void mapReg( HRegRemap* m, HReg* r )
{
*r =3D lookupHRegRemap(m, *r);
}
=20
-void mapRegs_X86Instr (HRegRemap* m, X86Instr* i)
+void mapRegs_X86Instr ( HRegRemap* m, X86Instr* i, Bool mode64 )
{
+ vassert(mode64 =3D=3D False);
switch (i->tag) {
case Xin_Alu32R:
mapRegs_X86RMI(m, i->Xin.Alu32R.src);
@@ -1493,7 +1496,7 @@
mapReg(m, &i->Xin.SseShuf.dst);
return;
default:
- ppX86Instr(i);
+ ppX86Instr(i, mode64);
vpanic("mapRegs_X86Instr");
}
}
@@ -1537,11 +1540,12 @@
register allocator. Note it's critical these don't write the
condition codes. */
=20
-X86Instr* genSpill_X86 ( HReg rreg, Int offsetB )
+X86Instr* genSpill_X86 ( HReg rreg, Int offsetB, Bool mode64 )
{
X86AMode* am;
vassert(offsetB >=3D 0);
vassert(!hregIsVirtual(rreg));
+ vassert(mode64 =3D=3D False);
am =3D X86AMode_IR(offsetB, hregX86_EBP());
=20
switch (hregClass(rreg)) {
@@ -1557,11 +1561,12 @@
}
}
=20
-X86Instr* genReload_X86 ( HReg rreg, Int offsetB )
+X86Instr* genReload_X86 ( HReg rreg, Int offsetB, Bool mode64 )
{
X86AMode* am;
vassert(offsetB >=3D 0);
vassert(!hregIsVirtual(rreg));
+ vassert(mode64 =3D=3D False);
am =3D X86AMode_IR(offsetB, hregX86_EBP());
switch (hregClass(rreg)) {
case HRcInt32:
@@ -1827,7 +1832,7 @@
Note that buf is not the insn's final place, and therefore it is
imperative to emit position-independent code. */
=20
-Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr* i )
+Int emit_X86Instr ( UChar* buf, Int nbuf, X86Instr* i, Bool mode64 )
{
UInt irno, opc, opc_rr, subopc_imm, opc_imma, opc_cl, opc_imm, subopc=
;
=20
@@ -1835,13 +1840,14 @@
UChar* p =3D &buf[0];
UChar* ptmp;
vassert(nbuf >=3D 32);
+ vassert(mode64 =3D=3D False);
=20
/* Wrap an integer as a int register, for use assembling
GrpN insns, in which the greg field is used as a sub-opcode
and does not really contain a register. */
# define fake(_n) mkHReg((_n), HRcInt32, False)
=20
- /* vex_printf("asm ");ppX86Instr(i); vex_printf("\n"); */
+ /* vex_printf("asm ");ppX86Instr(i, mode64); vex_printf("\n"); */
=20
switch (i->tag) {
=20
@@ -2815,7 +2821,7 @@
}
=20
bad:
- ppX86Instr(i);
+ ppX86Instr(i, mode64);
vpanic("emit_X86Instr");
/*NOTREACHED*/
=20
Modified: trunk/priv/host-x86/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/hdefs.h 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-x86/hdefs.h 2005-12-13 12:02:26 UTC (rev 1487)
@@ -653,16 +653,16 @@
extern X86Instr* X86Instr_SseShuf ( Int order, HReg src, HReg dst );
=20
=20
-extern void ppX86Instr ( X86Instr* );
+extern void ppX86Instr ( X86Instr*, Bool );
=20
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_X86Instr ( HRegUsage*, X86Instr* );
-extern void mapRegs_X86Instr ( HRegRemap*, X86Instr* );
+extern void getRegUsage_X86Instr ( HRegUsage*, X86Instr*, Bool )=
;
+extern void mapRegs_X86Instr ( HRegRemap*, X86Instr*, Bool )=
;
extern Bool isMove_X86Instr ( X86Instr*, HReg*, HReg* );
-extern Int emit_X86Instr ( UChar* buf, Int nbuf, X86Inst=
r* );
-extern X86Instr* genSpill_X86 ( HReg rreg, Int offset );
-extern X86Instr* genReload_X86 ( HReg rreg, Int offset );
+extern Int emit_X86Instr ( UChar* buf, Int nbuf, X86Inst=
r*, Bool );
+extern X86Instr* genSpill_X86 ( HReg rreg, Int offset, Bool )=
;
+extern X86Instr* genReload_X86 ( HReg rreg, Int offset, Bool )=
;
extern void getAllocableRegs_X86 ( Int*, HReg** );
extern HInstrArray* iselBB_X86 ( IRBB*, VexArchInfo* );
=20
Modified: trunk/priv/host-x86/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/isel.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/host-x86/isel.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -183,7 +183,7 @@
{
addHInstr(env->code, instr);
if (vex_traceflags & VEX_TRACE_VCODE) {
- ppX86Instr(instr);
+ ppX86Instr(instr, False);
vex_printf("\n");
}
}
Modified: trunk/priv/main/vex_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/main/vex_main.c 2005-12-07 22:19:36 UTC (rev 1486)
+++ trunk/priv/main/vex_main.c 2005-12-13 12:02:26 UTC (rev 1487)
@@ -215,15 +215,15 @@
from the target instruction set. */
HReg* available_real_regs;
Int n_available_real_regs;
- Bool (*isMove) (HInstr*, HReg*, HReg*);
- void (*getRegUsage) (HRegUsage*, HInstr*);
- void (*mapRegs) (HRegRemap*, HInstr*);
- HInstr* (*genSpill) ( HReg, Int );
- HInstr* (*genReload) ( HReg, Int );
- void (*ppInstr) ( HInstr* );
+ Bool (*isMove) ( HInstr*, HReg*, HReg* );
+ void (*getRegUsage) ( HRegUsage*, HInstr*, Bool );
+ void (*mapRegs) ( HRegRemap*, HInstr*, Bool );
+ HInstr* (*genSpill) ( HReg, Int, Bool );
+ HInstr* (*genReload) ( HReg, Int, Bool );
+ void (*ppInstr) ( HInstr*, Bool );
void (*ppReg) ( HReg );
HInstrArray* (*iselBB) ( IRBB*, VexArchInfo* );
- Int (*emit) ( UChar*, Int, HInstr* );
+ Int (*emit) ( UChar*, Int, HInstr*, Bool );
IRExpr* (*specHelper) ( HChar*, IRExpr** );
Bool (*preciseMemExnsFn) ( Int, Int );
=20
@@ -239,6 +239,7 @@
UChar insn_bytes[32];
IRType guest_word_type;
IRType host_word_type;
+ Bool mode64;
=20
guest_layout =3D NULL;
available_real_regs =3D NULL;
@@ -259,6 +260,7 @@
host_word_type =3D Ity_INVALID;
offB_TISTART =3D 0;
offB_TILEN =3D 0;
+ mode64 =3D False;
=20
vex_traceflags =3D traceflags;
=20
@@ -272,17 +274,18 @@
switch (arch_host) {
=20
case VexArchX86:
+ mode64 =3D False;
getAllocableRegs_X86 ( &n_available_real_regs,
&available_real_regs );
isMove =3D (Bool(*)(HInstr*,HReg*,HReg*)) isMove_X86Instr;
- getRegUsage =3D (void(*)(HRegUsage*,HInstr*)) getRegUsage_X86In=
str;
- mapRegs =3D (void(*)(HRegRemap*,HInstr*)) mapRegs_X86Instr;
- genSpill =3D (HInstr*(*)(HReg,Int)) genSpill_X86;
- genReload =3D (HInstr*(*)(HReg,Int)) genReload_X86;
- ppInstr =3D (void(*)(HInstr*)) ppX86Instr;
+ getRegUsage =3D (void(*)(HRegUsage*,HInstr*, Bool)) getRegUsage=
_X86Instr;
+ mapRegs =3D (void(*)(HRegRemap*,HInstr*, Bool)) mapRegs_X86=
Instr;
+ genSpill =3D (HInstr*(*)(HReg,Int, Bool)) genSpill_X86;
+ genReload =3D (HInstr*(*)(HReg,Int, Bool)) genReload_X86;
+ ppInstr =3D (void(*)(HInstr*, Bool)) ppX86Instr;
ppReg =3D (void(*)(HReg)) ppHRegX86;
iselBB =3D iselBB_X86;
- emit =3D (Int(*)(UChar*,Int,HInstr*)) emit_X86Instr;
+ emit =3D (Int(*)(UChar*,Int,HInstr*, Bool)) emit_X86Inst=
r;
host_is_bigendian =3D False;
host_word_type =3D Ity_I32;
vassert(archinfo_host->subarch =3D=3D VexSubArchX86_sse0
@@ -291,34 +294,36 @@
break;
=20
case VexArchAMD64:
+ mode64 =3D True;
getAllocableRegs_AMD64 ( &n_available_real_regs,
&available_real_regs );
isMove =3D (Bool(*)(HInstr*,HReg*,HReg*)) isMove_AMD64Inst=
r;
- getRegUsage =3D (void(*)(HRegUsage*,HInstr*)) getRegUsage_AMD64=
Instr;
- mapRegs =3D (void(*)(HRegRemap*,HInstr*)) mapRegs_AMD64Inst=
r;
- genSpill =3D (HInstr*(*)(HReg,Int)) genSpill_AMD64;
- genReload =3D (HInstr*(*)(HReg,Int)) genReload_AMD64;
- ppInstr =3D (void(*)(HInstr*)) ppAMD64Instr;
+ getRegUsage =3D (void(*)(HRegUsage*,HInstr*, Bool)) getRegUsage=
_AMD64Instr;
+ mapRegs =3D (void(*)(HRegRemap*,HInstr*, Bool)) mapRegs_AMD=
64Instr;
+ genSpill =3D (HInstr*(*)(HReg,Int, Bool)) genSpill_AMD64;
+ genReload =3D (HInstr*(*)(HReg,Int, Bool)) genReload_AMD64;
+ ppInstr =3D (void(*)(HInstr*, Bool)) ppAMD64Instr;
ppReg =3D (void(*)(HReg)) ppHRegAMD64;
iselBB =3D iselBB_AMD64;
- emit =3D (Int(*)(UChar*,Int,HInstr*)) emit_AMD64Instr;
+ emit =3D (Int(*)(UChar*,Int,HInstr*, Bool)) emit_AMD64In=
str;
host_is_bigendian =3D False;
host_word_type =3D Ity_I64;
vassert(archinfo_host->subarch =3D=3D VexSubArch_NONE);
break;
=20
case VexArchPPC32:
+ mode64 =3D False;
getAllocableRegs_PPC32 ( &n_available_real_regs,
- &available_real_regs );
+ &available_real_regs, mode64 );
isMove =3D (Bool(*)(HInstr*,HReg*,HReg*)) isMove_PPC32Inst=
r;
- getRegUsage =3D (void(*)(HRegUsage*,HInstr*)) getRegUsage_PPC32=
Instr;
- mapRegs =3D (void(*)(HRegRemap*,HInstr*)) mapRegs_PPC32Inst=
r;
- genSpill =3D (HInstr*(*)(HReg,Int)) genSpill_PPC32;
- genReload =3D (HInstr*(*)(HReg,Int)) genReload_PPC32;
- ppInstr =3D (void(*)(HInstr*)) ppPPC32Instr;
+ getRegUsage =3D (void(*)(HRegUsage*,HInstr*,Bool)) getRegUsage_=
PPC32Instr;
+ mapRegs =3D (void(*)(HRegRemap*,HInstr*,Bool)) mapRegs_PPC3=
2Instr;
+ genSpill =3D (HInstr*(*)(HReg,Int,Bool)) genSpill_PPC32;
+ genReload =3D (HInstr*(*)(HReg,Int,Bool)) genReload_PPC32;
+ ppInstr =3D (void(*)(HInstr*,Bool)) ppPPC32Instr;
ppReg =3D (void(*)(HReg)) ppHRegPPC32;
iselBB =3D iselBB_PPC32;
- emit =3D (Int(*)(UChar*,Int,HInstr*)) emit_PPC32Instr;
+ emit =3D (Int(*)(UChar*,Int,HInstr*,Bool)) emit_PPC32Ins=
tr;
host_is_bigendian =3D True;
host_word_type =3D Ity_I32;
vassert(archinfo_guest->subarch =3D=3D VexSubArchPPC32_I
@@ -553,7 +558,7 @@
if (vex_traceflags & VEX_TRACE_VCODE) {
for (i =3D 0; i < vcode->arr_used; i++) {
vex_printf("%3d ", i);
- ppInstr(vcode->arr[i]);
+ ppInstr(vcode->arr[i], mode64);
vex_printf("\n");
}
vex_printf("\n");
@@ -564,7 +569,7 @@
n_available_real_regs,
isMove, getRegUsage, mapRegs,=20
genSpill, genReload, guest_sizeB,
- ppInstr, ppReg );
+ ppInstr, ppReg, mode64 );
=20
vexAllocSanityCheck();
=20
@@ -574,7 +579,7 @@
"------------------------\n\n");
for (i =3D 0; i < rcode->arr_used; i++) {
vex_printf("%3d ", i);
- ppInstr(rcode->arr[i]);
+ ppInstr(rcode->arr[i], mode64);
vex_printf("\n");
}
vex_printf("\n");
@@ -594,10 +599,10 @@
out_used =3D 0; /* tracks along the host_bytes array */
for (i =3D 0; i < rcode->arr_used; i++) {
if (vex_traceflags & VEX_TRACE_ASM) {
- ppInstr(rcode->arr[i]);
+ ppInstr(rcode->arr[i], mode64);
vex_printf("\n");
}
- j =3D (*emit)( insn_bytes, 32, rcode->arr[i] );
+ j =3D (*emit)( insn_bytes, 32, rcode->arr[i], mode64 );
if (vex_traceflags & VEX_TRACE_ASM) {
for (k =3D 0; k < j; k++)
if (insn_bytes[k] < 16)
|
|
From: <sv...@va...> - 2005-12-13 04:06:33
|
Author: njn Date: 2005-12-13 04:06:29 +0000 (Tue, 13 Dec 2005) New Revision: 5326 Log: Add two new programs to the performance suite. Added: trunk/perf/bz2.c trunk/perf/bz2.vgperf trunk/perf/fbench.c trunk/perf/fbench.vgperf Modified: trunk/perf/Makefile.am trunk/perf/ffbench.c [... diff too large to include ...] |
|
From: <js...@ac...> - 2005-12-13 04:00:24
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2005-12-13 03:30:01 GMT Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 208 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-13 03:53:02
|
Nightly build on aston ( x86_64, Fedora Core 3 ) started at 2005-12-13 03:05:16 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 6 stderr failures, 2 stdout failures ================= memcheck/tests/mempool (stderr) memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/tls (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: <js...@ac...> - 2005-12-13 03:48:28
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2005-12-13 04:40:00 CET Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 175 tests, 15 stderr failures, 0 stdout failures ================= memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/xml1 (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/mremap (stderr) |
|
From: Tom H. <to...@co...> - 2005-12-13 03:42:21
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2005-12-13 03:30:06 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 210 tests, 7 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-13 03:29:18
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-12-13 03:15:06 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 209 tests, 17 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/match-overrun (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partial_load_dflt (stderr) memcheck/tests/partial_load_ok (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/stack_changes (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-13 03:25:23
|
Nightly build on dellow ( x86_64, Fedora Core 4 ) started at 2005-12-13 03:10:12 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 5 stderr failures, 1 stdout failure ================= memcheck/tests/mempool (stderr) memcheck/tests/x86/scalar (stderr) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |