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From: Tom H. <th...@cy...> - 2005-12-02 03:21:30
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2005-12-02 03:00:04 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/pointer-trace (stderr) none/tests/amd64/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-02 03:21:23
|
Nightly build on aston ( x86_64, Fedora Core 3 ) started at 2005-12-02 03:05:13 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 5 stderr failures, 1 stdout failure ================= memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: <sv...@va...> - 2005-12-01 23:14:03
|
Author: njn Date: 2005-12-01 23:13:57 +0000 (Thu, 01 Dec 2005) New Revision: 5263 Log: update Modified: trunk/docs/internals/release-HOWTO.txt Modified: trunk/docs/internals/release-HOWTO.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/release-HOWTO.txt 2005-12-01 19:05:41 UTC (rev 5= 262) +++ trunk/docs/internals/release-HOWTO.txt 2005-12-01 23:13:57 UTC (rev 5= 263) @@ -160,7 +160,8 @@ - Change release number in AC_INIT() in configure.in to "X.Y.Z.SVN", whe= re X.Y.Z is one more than the release just done. =20 -- Add a new section to docs/internals/X_Y_BUGSTATUS.txt. +- Add a new section to docs/internals/X_Y_BUGSTATUS.txt (or a new file i= f + it's a feature release). =20 - Add new entries to docs/internals/roadmap.txt for the next release(s). =20 |
|
From: <sv...@va...> - 2005-12-01 19:05:50
|
Author: cerion
Date: 2005-12-01 19:05:41 +0000 (Thu, 01 Dec 2005)
New Revision: 5262
Log:
Fix for a nasty bug in loading an fp reg with zero - thanks J!
Modified:
trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S
Modified: trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S 2005-12-01 19:03:50=
UTC (rev 5261)
+++ trunk/coregrind/m_dispatch/dispatch-ppc32-linux.S 2005-12-01 19:05:41=
UTC (rev 5262)
@@ -163,8 +163,8 @@
stw 3,28(1) /* spill orig guest_state ptr */
=20
/* 24(sp) used later to stop ctr reg being clobbered */
-
- /* 8:20(sp) free */
+ /* 20(sp) used later to load fpscr with zero */
+ /* 8:16(sp) free */
=09
/* Linkage Area (reserved)
4(sp) : LR
@@ -190,7 +190,14 @@
cmplwi 3,0
beq LafterFP2
=20
- fsub 3,3,3 /* generate zero */
+ /* get zero into f3 (tedious) */
+ /* note: fsub 3,3,3 is not a reliable way to do this,=20
+ since if f3 holds a NaN or similar then we don't necessarily
+ wind up with zero. */
+ li 3,0
+ stw 3,20(1)
+ lfs 3,20(1)
+ /* load f3 to fpscr (0xFF =3D all bit fields) */
mtfsf 0xFF,3
LafterFP2:
=20
|
|
From: <sv...@va...> - 2005-12-01 19:03:54
|
Author: sewardj Date: 2005-12-01 19:03:50 +0000 (Thu, 01 Dec 2005) New Revision: 5261 Log: New file to track bugs in 3.1.X. In a more terse form - not sure if it is a good idea, but worth a try. Added: trunk/docs/internals/3_1_BUGSTATUS.txt Modified: trunk/docs/internals/Makefile.am Added: trunk/docs/internals/3_1_BUGSTATUS.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/3_1_BUGSTATUS.txt (rev 0= ) +++ trunk/docs/internals/3_1_BUGSTATUS.txt 2005-12-01 19:03:50 UTC (rev 5= 261) @@ -0,0 +1,12 @@ + + +TRUNK 31BRANCH BUG# WHAT + +pending pending n-i-bz fsub 3,3,3 in ppc32 dispatcher doesn't clea= r NaNs +pending pending n-i-bz ppc32: __NR_setpriority (97) +pending pending 117332 missing line info with icc 8.1 (x86) +pending pending 117362 partially defined equality +pending pending 117366 amd64: 0xDD 0x7C fnstsw +pending pending 117367 amd64: 0xD9 0xF4 fxtract +v5256 v5260 117369 amd64: __NR_getpriority (140) +pending pending 117419 ppc32: lfsu f5, -4(r11) Modified: trunk/docs/internals/Makefile.am =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/docs/internals/Makefile.am 2005-12-01 10:03:58 UTC (rev 5260) +++ trunk/docs/internals/Makefile.am 2005-12-01 19:03:50 UTC (rev 5261) @@ -1,5 +1,5 @@ EXTRA_DIST =3D \ - 3_0_BUGSTATUS.txt 64-bit-cleanness.txt \ + 3_0_BUGSTATUS.txt 3_1_BUGSTATUS.txt 64-bit-cleanness.txt \ darwin-notes.txt darwin-syscalls.txt \ directory-structure.txt \ m_replacemalloc.txt \ |
|
From: <sv...@va...> - 2005-12-01 10:04:00
|
Author: dirk
Date: 2005-12-01 10:03:58 +0000 (Thu, 01 Dec 2005)
New Revision: 5260
Log:
merge from trunk:
r5256 | tom | 2005-12-01 10:21:37 +0100 (Thu, 01 Dec 2005) | 2 lines
Enable getpriority and setpriority on amd64. Fixes bug #117369.
Modified:
branches/VALGRIND_3_1_BRANCH/coregrind/m_syswrap/syswrap-amd64-linux.c
Modified: branches/VALGRIND_3_1_BRANCH/coregrind/m_syswrap/syswrap-amd64-=
linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_1_BRANCH/coregrind/m_syswrap/syswrap-amd64-linux.=
c 2005-12-01 10:03:23 UTC (rev 5259)
+++ branches/VALGRIND_3_1_BRANCH/coregrind/m_syswrap/syswrap-amd64-linux.=
c 2005-12-01 10:03:58 UTC (rev 5260)
@@ -1132,8 +1132,8 @@
GENXY(__NR_fstatfs, sys_fstatfs), // 138=20
// (__NR_sysfs, sys_sysfs), // 139=20
=20
- // (__NR_getpriority, sys_getpriority), // =
140=20
- // (__NR_setpriority, sys_setpriority), // =
141=20
+ GENX_(__NR_getpriority, sys_getpriority), // =
140=20
+ GENX_(__NR_setpriority, sys_setpriority), // =
141=20
//zz LINXY(__NR_sched_setparam, sys_sched_setparam), =
// 142=20
LINXY(__NR_sched_getparam, sys_sched_getparam), // =
143=20
LINX_(__NR_sched_setscheduler, sys_sched_setscheduler), // =
144=20
|
|
From: <sv...@va...> - 2005-12-01 10:03:28
|
Author: dirk Date: 2005-12-01 10:03:23 +0000 (Thu, 01 Dec 2005) New Revision: 5259 Log: merge from trunk:=20 r5254 | tom | 2005-11-30 01:03:58 +0100 (Wed, 30 Nov 2005) | 2 lines Automake 1.7 is required now. Modified: branches/VALGRIND_3_1_BRANCH/Makefile.am Modified: branches/VALGRIND_3_1_BRANCH/Makefile.am =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/VALGRIND_3_1_BRANCH/Makefile.am 2005-12-01 10:02:35 UTC (rev= 5258) +++ branches/VALGRIND_3_1_BRANCH/Makefile.am 2005-12-01 10:03:23 UTC (rev= 5259) @@ -1,5 +1,5 @@ =20 -AUTOMAKE_OPTIONS =3D foreign 1.6 dist-bzip2 +AUTOMAKE_OPTIONS =3D foreign 1.7 dist-bzip2 =20 include $(top_srcdir)/Makefile.all.am=20 =20 |
|
From: <sv...@va...> - 2005-12-01 10:02:38
|
Author: dirk
Date: 2005-12-01 10:02:35 +0000 (Thu, 01 Dec 2005)
New Revision: 5258
Log:
merge from trunk:
r5247 | cerion | 2005-11-29 12:08:33 +0100 (Tue, 29 Nov 2005) | 4 lines
Stop gcc4 complaints re ppc32 test - Moved all declarations in front of
statements.
Based on patch from Yao Qi <qiy...@cn...>.
Modified:
branches/VALGRIND_3_1_BRANCH/none/tests/ppc32/jm-insns.c
Modified: branches/VALGRIND_3_1_BRANCH/none/tests/ppc32/jm-insns.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_1_BRANCH/none/tests/ppc32/jm-insns.c 2005-12-01 1=
0:01:24 UTC (rev 5257)
+++ branches/VALGRIND_3_1_BRANCH/none/tests/ppc32/jm-insns.c 2005-12-01 1=
0:02:35 UTC (rev 5258)
@@ -3894,21 +3894,21 @@
#if defined (HAS_ALTIVEC)
static void build_viargs_table (void)
{
- unsigned int i=3D0;
- =20
#if !defined (ALTIVEC_ARGS_LARGE)
- i=3D2;
+ unsigned int i=3D2;
viargs =3D memalign(16, i * sizeof(vector unsigned int));
viargs[0] =3D (vector unsigned int) { 0x01020304,0x05060708,0x090A0B0=
C,0x0E0D0E0F };
viargs[1] =3D (vector unsigned int) { 0xF1F2F3F4,0xF5F6F7F8,0xF9FAFBF=
C,0xFEFDFEFF };
#else
+ unsigned int i,j;
// build from iargs table (large/default already set)
viargs =3D malloc(nb_iargs * sizeof(vector unsigned int));
for (i=3D0; i<nb_iargs; i++) {
- unsigned int j =3D iargs[i];
+ j =3D iargs[i];
viargs[i] =3D (vector unsigned int){ j, j*2, j*3, j*4 };
}
#endif
+
AB_DPRINTF("Registered %d viargs values\n", i);
nb_viargs =3D i;
}
@@ -4058,10 +4058,12 @@
=20
static void dump_vfargs (void)
{
+ vector float vf;
+ float f;
int i=3D0;
for (i=3D0; i<nb_vfargs; i++) {
- vector float vf =3D (vector float)vfargs[i];
- float f =3D ((float*)&vf)[0];
+ vf =3D (vector float)vfargs[i];
+ f =3D ((float*)&vf)[0];
printf("vfarg %3d: %24f : %08x\n", i, f, ((unsigned int*)&f)[0]);
}
}
@@ -4746,7 +4748,7 @@
__asm__ __volatile__ ("mtxer 18");
=20
printf("%s %d (%08x) =3D> %08x (%08x %08x, %08x, %08x)\n",
- name, 9, iargs[k], res, flags, xer, lr, ctr);
+ name, j, iargs[k], res, flags, xer, lr, ctr);
}
#endif
}
@@ -5627,18 +5629,23 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
+ unsigned int *src, *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
- vector unsigned int vec_in =3D (vector unsigned int)viargs[i];
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 };
+ vec_in =3D (vector unsigned int)viargs[i];
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5660,14 +5667,14 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x %08x %08x %08x\n", name,
src[0], src[1], src[2], src[3]);
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5680,20 +5687,25 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr;
+ unsigned int *src1, *src2, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- volatile vector unsigned int vec_in1 =3D (vector unsigned int)viar=
gs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<nb_viargs; j++) {
- volatile vector unsigned int vec_in2 =3D (vector unsigned int)v=
iargs[j];
- volatile vector unsigned int vec_out =3D (vector unsigned int){=
0,0,0,0 };
+ vec_in2 =3D (vector unsigned int)viargs[j];
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5716,16 +5728,16 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]=
);
printf("%08x%08x%08x%08x\n", src2[0], src2[1], src2[2], src2[3]=
);
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5740,22 +5752,27 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_in2, vec_in3, vec_out, vscr=
;
+ unsigned int *src1, *src2, *src3, *dst;
int i,j,k;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<nb_viargs; j++) {
- vector unsigned int vec_in2 =3D (vector unsigned int)viargs[j];
+ vec_in2 =3D (vector unsigned int)viargs[j];
for (k=3D0; k<nb_viargs; k++) {
- vector unsigned int vec_in3 =3D (vector unsigned int)viargs[=
k];
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0=
,0 };
+ vec_in3 =3D (vector unsigned int)viargs[k];
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DE=
FAULT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5779,10 +5796,10 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* src3 =3D (unsigned int*)&vec_in3;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ src3 =3D (unsigned int*)&vec_in3;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x, %08x%08x%08x=
%08x\n", name,
src1[0], src1[1], src1[2], src1[3],
src2[0], src2[1], src2[2], src2[3],
@@ -5791,7 +5808,7 @@
printf("%s: =3D> %08x%08x%08x%08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5808,21 +5825,27 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned char vec_shft;
+ volatile vector unsigned int vec_in1, vec_out, vscr;
+ unsigned int *src1, *src2, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<8; j++) {
/* low-order 3bits of every byte must be the same for the shift=
vector */
- vector unsigned char vec_shft =3D (vector unsigned char) { j,j,=
j,j, j,j,j,j, j,j,j,j, j,j,j,j };
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 =
};
+ vec_shft =3D (vector unsigned char) { j,j,j,j, j,j,j,j, j,j,j,j=
, j,j,j,j };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5845,9 +5868,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_shft;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_shft;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x%08x%08x%08x, ", src1[0], src1[1], src1[2], src1[3]=
);
printf("%08x%08x%08x%08x\n", src2[0], src2[1], src2[2], src2[3]=
);
@@ -5855,10 +5878,10 @@
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
- printf("(%08x, %08x)\n", flags, p_vscr[3]);
+ p_vscr =3D (unsigned int*)𝓋
+ printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
- printf("(%08x)\n", flags);
+ printf("(%08x)\n", flags);
#endif
}
if (verbose) printf("\n");
@@ -5870,14 +5893,19 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *src1, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
=20
for (j=3D0; j<16; j+=3D3) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 =
};
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -5890,7 +5918,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5912,18 +5940,18 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x %08x %08x %08x, %u\n", src1[0], src1[1], src1[2], =
src1[3], j);
=20
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
- printf("(%08x, %08x)\n", flags, p_vscr[3]);
+ p_vscr =3D (unsigned int*)𝓋
+ printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
- printf("(%08x)\n", flags);
+ printf("(%08x)\n", flags);
#endif
}
if (verbose) printf("\n");
@@ -5935,11 +5963,16 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<32; i++) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -5952,7 +5985,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -5971,12 +6004,12 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %2d =3D> ", name, i);
=20
printf("%08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -5989,15 +6022,20 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *src1, *src2, *dst;
int i,j,k;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_viargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)viargs[i];
+ vec_in1 =3D (vector unsigned int)viargs[i];
for (j=3D0; j<nb_viargs; j++) {
- vector unsigned int vec_in2 =3D (vector unsigned int)viargs[j];
+ vec_in2 =3D (vector unsigned int)viargs[j];
for (k=3D0; k<16; k+=3D14) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0=
,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -6010,7 +6048,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DE=
FAULT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6033,9 +6071,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: ", name);
printf("%08x%08x%08x%08x, %08x%08x%08x%08x, %u\n",
src1[0], src1[1], src1[2], src1[3],
@@ -6044,7 +6082,7 @@
printf("%s: =3D> %08x %08x %08x %08x] ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6061,10 +6099,15 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_out, vscr;
+ unsigned int *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D-1; i<17; i++) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
// make sure start address is 16 aligned - use viargs[0]
r15 =3D (uint32_t)&viargs[0];
@@ -6075,7 +6118,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags)); =20
@@ -6094,7 +6137,7 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ dst =3D (unsigned int*)&vec_out;
printf("%s %3d, %3d", name, i, 0);
printf(" =3D> %08x %08x %08x %08x ", dst[0], dst[1], dst[2], dst[3=
]);
printf("(%08x)\n", flags);
@@ -6165,6 +6208,8 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
+ unsigned int *src, *dst;
int i,j, k, do_mask;
=20
do_mask =3D 0;
@@ -6174,7 +6219,7 @@
=20
for (i=3D0; i<nb_viargs; i++) {
for (j=3D0; j<16; j+=3D7) {
- volatile vector unsigned int vec_out =3D (vector unsigned int){=
0,0,0,0 };
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
// load from viargs array + some dis-alignment
r15 =3D (uint32_t)&viargs[0];
@@ -6185,7 +6230,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6204,9 +6249,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- volatile vector unsigned int vec_in =3D (vector unsigned int)vi=
args[i];
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ vec_in =3D (vector unsigned int)viargs[i];
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
=20
/* For lvebx/lvehx/lvewx, as per the documentation, all of
the dest reg except the loaded bits are undefined
@@ -6218,19 +6263,19 @@
for (k =3D 0; k < 16; k++)
if (k !=3D j)
p[k] =3D (char)0;
- }
+ }
if (do_mask =3D=3D 2) {
short* p =3D (short*)dst;
for (k =3D 0; k < 8; k++)
if (k !=3D (j>>1))
p[k] =3D (short)0;
- }
+ }
if (do_mask =3D=3D 4) {
int* p =3D (int*)dst;
for (k =3D 0; k < 4; k++)
if (k !=3D (j>>2))
p[k] =3D (int)0;
- }
+ }
=20
printf("%s %3d, %08x %08x %08x %08x", name, j, src[0], src[1], =
src[2], src[3]);
printf(" =3D> %08x %08x %08x %08x ", dst[0], dst[1], dst[2], ds=
t[3]);
@@ -6247,6 +6292,8 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
+ unsigned int *src, *dst;
int i,j;
vector unsigned int* viargs_priv;
=20
@@ -6258,7 +6305,7 @@
for (i=3D0; i<nb_viargs; i++) {
for (j=3D0; j<16; j+=3D7) {
// read from viargs
- volatile vector unsigned int vec_in =3D (vector unsigned int)vi=
args[i];
+ vec_in =3D (vector unsigned int)viargs[i];
=20
// store to viargs_priv[0] + some dis-alignment
r16 =3D (uint32_t)&viargs_priv[0];
@@ -6269,7 +6316,7 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6290,9 +6337,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- volatile vector unsigned int vec_out =3D (vector unsigned int)v=
iargs_priv[i];
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ vec_out =3D (vector unsigned int)viargs_priv[i];
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
printf("%s %3d, %08x %08x %08x %08x", name, j, src[0], src[1], =
src[2], src[3]);
printf(" =3D> %08x %08x %08x %08x ", dst[0], dst[1], dst[2], ds=
t[3]);
printf("(%08x)\n", flags);
@@ -6324,7 +6371,13 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector float vec_in, vec_out;
+ volatile vector unsigned int vscr;
+ unsigned int *src, *dst;
int i;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
/* if we're doing an estimation operation, arrange to zap the
bottom byte of the result as it's basically garbage, and differs
@@ -6334,15 +6387,15 @@
? 0xFFFFFF00 : 0xFFFFFFFF;
=20
for (i=3D0; i<nb_vfargs; i++) {
- vector float vec_in =3D (vector float)vfargs[i];
- vector float vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
+ vec_in =3D (vector float)vfargs[i];
+ vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_=
VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6364,15 +6417,15 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src =3D (unsigned int*)&vec_in;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x %08x %08x %08x\n", name,
src[0], src[1], src[2], src[3]);
=20
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0] & mask, dst[1] & mask, dst[2] & mask, dst[3] & mask)=
;
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6385,20 +6438,26 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector float vec_in1, vec_in2, vec_out;
+ volatile vector unsigned int vscr;
+ unsigned int *src1, *src2, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_vfargs; i++) {
for (j=3D0; j<nb_vfargs; j+=3D3) {
- vector float vec_in1 =3D (vector float)vfargs[i];
- vector float vec_in2 =3D (vector float)vfargs[j];
- vector float vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
+ vec_in1 =3D (vector float)vfargs[i];
+ vec_in2 =3D (vector float)vfargs[j];
+ vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6421,9 +6480,9 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x\n", name,
src1[0], src1[1], src1[2], src1[3],
src2[0], src2[1], src2[2], src2[3]);
@@ -6431,7 +6490,7 @@
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6446,22 +6505,28 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector float vec_in1, vec_in2, vec_in3, vec_out;
+ volatile vector unsigned int vscr;
+ unsigned int *src1, *src2, *src3, *dst;
int i,j,k;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_vfargs; i++) {
for (j=3D0; j<nb_vfargs; j+=3D3) {
for (k=3D0; k<nb_vfargs; k+=3D5) {
- vector float vec_in1 =3D (vector float)vfargs[i];
- vector float vec_in2 =3D (vector float)vfargs[j];
- vector float vec_in3 =3D (vector float)vfargs[k];
- vector float vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 =
};
+ vec_in1 =3D (vector float)vfargs[i];
+ vec_in2 =3D (vector float)vfargs[j];
+ vec_in3 =3D (vector float)vfargs[k];
+ vec_out =3D (vector float){ 0.0, 0.0, 0.0, 0.0 };
=20
/* Save flags */
__asm__ __volatile__ ("mfcr %0" : "=3Dr" (tmpcr));
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DE=
FAULT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
@@ -6485,10 +6550,10 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* src2 =3D (unsigned int*)&vec_in2;
- unsigned int* src3 =3D (unsigned int*)&vec_in3;
- unsigned int* dst =3D (unsigned int*)&vec_out;
+ src1 =3D (unsigned int*)&vec_in1;
+ src2 =3D (unsigned int*)&vec_in2;
+ src3 =3D (unsigned int*)&vec_in3;
+ dst =3D (unsigned int*)&vec_out;
printf("%s: %08x%08x%08x%08x, %08x%08x%08x%08x, %08x%08x%08x=
%08x\n", name,
src1[0], src1[1], src1[2], src1[3],
src2[0], src2[1], src2[2], src2[3],
@@ -6497,7 +6562,7 @@
printf("%s: =3D> %08x %08x %08x %08x ", name,
dst[0], dst[1], dst[2], dst[3]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6513,14 +6578,19 @@
{
volatile uint32_t flags, tmpcr;
volatile vector unsigned int tmpvscr;
+ volatile vector unsigned int vec_in, vec_out, vscr;
uint32_t func_buf[2], *p;
+ unsigned int *src, *dst;
int i,j;
+#if defined TEST_VSCR_SAT
+ unsigned int* p_vscr;
+#endif
=20
for (i=3D0; i<nb_vfargs; i++) {
- vector unsigned int vec_in1 =3D (vector unsigned int)vfargs[i];
+ vec_in =3D (vector unsigned int)vfargs[i];
=20
for (j=3D0; j<32; j+=3D9) {
- vector unsigned int vec_out =3D (vector unsigned int){ 0,0,0,0 =
};
+ vec_out =3D (vector unsigned int){ 0,0,0,0 };
=20
/* Patch up the instruction */
p =3D (void *)func;
@@ -6533,13 +6603,13 @@
__asm__ __volatile__ ("mfvscr %0" : "=3Dvr" (tmpvscr));
=20
// reset VSCR and CR
- vector unsigned int vscr =3D (vector unsigned int){ 0,0,0,DEFAU=
LT_VSCR };
+ vscr =3D (vector unsigned int){ 0,0,0,DEFAULT_VSCR };
flags =3D 0;
__asm__ __volatile__ ("mtvscr %0" : : "vr" (vscr) );
__asm__ __volatile__ ("mtcr %0" : : "r" (flags));
=20
// load input -> r14
- __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in1));
+ __asm__ __volatile__ ("vor 14,%0,%0" : : "vr" (vec_in));
=20
// do stuff
(*func)();
@@ -6555,13 +6625,13 @@
__asm__ __volatile__ ("mtcr %0" : : "r" (tmpcr));
__asm__ __volatile__ ("mtvscr %0" : : "vr" (tmpvscr));
=20
- unsigned int* src1 =3D (unsigned int*)&vec_in1;
- unsigned int* dst =3D (unsigned int*)&vec_out;
- printf("%s: %08x (%13e), %2u", name, src1[0], *(float*)(&src1[0=
]), j);
+ src =3D (unsigned int*)&vec_in;
+ dst =3D (unsigned int*)&vec_out;
+ printf("%s: %08x (%13e), %2u", name, src[0], *(float*)(&src[0])=
, j);
printf(" =3D> %08x (%13e) ", dst[0], *(float*)(&dst[0]));
// printf(" =3D> %08x ", dst[0]);
#if defined TEST_VSCR_SAT
- unsigned int* p_vscr =3D (unsigned int*)𝓋
+ p_vscr =3D (unsigned int*)𝓋
printf("(%08x, %08x)\n", flags, p_vscr[3]);
#else
printf("(%08x)\n", flags);
@@ -6831,7 +6901,7 @@
{
#if !defined (USAGE_SIMPLE)
fprintf(stderr,
- "test-ppc [-1] [-2] [-3] [-*] [-t <type>] [-f <family>] [-u] =
"
+ "jm-insns [-1] [-2] [-3] [-*] [-t <type>] [-f <family>] [-u] =
"
"[-n <filter>] [-r <test_rigour>] [-h]\n"
"\t-1: test opcodes with one argument\n"
"\t-2: test opcodes with two arguments\n"
@@ -6863,7 +6933,7 @@
);
#else
fprintf(stderr,
- "test-ppc [-a]\n"
+ "jm-insns [-a]\n"
"\t-a: include tests for altivec instructions\n"
);
#endif
@@ -6998,8 +7068,8 @@
=20
#else
/* Simple usage:
- ./test-ppc =3D> all insns, except AV
- ./test-ppc -a =3D> all insns, including AV
+ ./jm-insns =3D> all insns, except AV
+ ./jm-insns -a =3D> all insns, including AV
*/
char *filter =3D NULL;
insn_sel_flags_t flags;
|
|
From: <sv...@va...> - 2005-12-01 10:01:28
|
Author: dirk
Date: 2005-12-01 10:01:24 +0000 (Thu, 01 Dec 2005)
New Revision: 5257
Log:
merge from trunk:=20
r5241 | njn | 2005-11-27 20:11:34 +0100 (Sun, 27 Nov 2005) | 3 lines
Disable 'yield' -- it fails so often that it's useless.
Added:
branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.disabled
Removed:
branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.vgtest
Modified:
branches/VALGRIND_3_1_BRANCH/none/tests/x86/Makefile.am
Modified: branches/VALGRIND_3_1_BRANCH/none/tests/x86/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_1_BRANCH/none/tests/x86/Makefile.am 2005-12-01 09=
:21:37 UTC (rev 5256)
+++ branches/VALGRIND_3_1_BRANCH/none/tests/x86/Makefile.am 2005-12-01 10=
:01:24 UTC (rev 5257)
@@ -26,7 +26,7 @@
seg_override.stderr.exp seg_override.stdout.exp seg_override.vgtest \
sigcontext.stdout.exp sigcontext.stderr.exp sigcontext.vgtest \
smc1.stderr.exp smc1.stdout.exp smc1.vgtest \
- yield.stderr.exp yield.stdout.exp yield.vgtest
+ yield.stderr.exp yield.stdout.exp yield.disabled
=20
check_PROGRAMS =3D \
badseg bt_everything bt_literal cmpxchg8b cpuid \
Copied: branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.disabled (from =
rev 5241, trunk/none/tests/x86/yield.disabled)
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.disabled =
(rev 0)
+++ branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.disabled 2005-12-01=
10:01:24 UTC (rev 5257)
@@ -0,0 +1,3 @@
+# This one is currently disabled because it fails frequently and randoml=
y
+# and so is no use at all.
+prog: yield
Deleted: branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.vgtest
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.vgtest 2005-12-01 0=
9:21:37 UTC (rev 5256)
+++ branches/VALGRIND_3_1_BRANCH/none/tests/x86/yield.vgtest 2005-12-01 1=
0:01:24 UTC (rev 5257)
@@ -1 +0,0 @@
-prog: yield
|
|
From: <sv...@va...> - 2005-12-01 09:21:42
|
Author: tom
Date: 2005-12-01 09:21:37 +0000 (Thu, 01 Dec 2005)
New Revision: 5256
Log:
Enable getpriority and setpriority on amd64. Fixes bug #117369.
Modified:
trunk/coregrind/m_syswrap/syswrap-amd64-linux.c
Modified: trunk/coregrind/m_syswrap/syswrap-amd64-linux.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_syswrap/syswrap-amd64-linux.c 2005-11-30 20:41:02 U=
TC (rev 5255)
+++ trunk/coregrind/m_syswrap/syswrap-amd64-linux.c 2005-12-01 09:21:37 U=
TC (rev 5256)
@@ -1132,8 +1132,8 @@
GENXY(__NR_fstatfs, sys_fstatfs), // 138=20
// (__NR_sysfs, sys_sysfs), // 139=20
=20
- // (__NR_getpriority, sys_getpriority), // =
140=20
- // (__NR_setpriority, sys_setpriority), // =
141=20
+ GENX_(__NR_getpriority, sys_getpriority), // =
140=20
+ GENX_(__NR_setpriority, sys_setpriority), // =
141=20
//zz LINXY(__NR_sched_setparam, sys_sched_setparam), =
// 142=20
LINXY(__NR_sched_getparam, sys_sched_getparam), // =
143=20
LINX_(__NR_sched_setscheduler, sys_sched_setscheduler), // =
144=20
|
|
From: Yao Qi <qiy...@cn...> - 2005-12-01 08:04:54
|
jm-insns.c would be more readable if we add Cerion's explanation in the
comment, so I coded a patch.
Index: none/tests/ppc32/jm-insns.c
===================================================================
--- none/tests/ppc32/jm-insns.c (revision 5254)
+++ none/tests/ppc32/jm-insns.c (working copy)
@@ -42,7 +42,50 @@
* I always get the result in r17 and also save XER and CCR for
* fixed-point
* operations. I also check FPSCR for floating points operations.
*
- * Improvments:
+ *
+ * Details of immediate operands patch:
+ *
+ * All the immediate test functions are of the form { imm_insn, blr }, so
+ * func_buf[1] = p[1] first copies the 'blr' over.
+ * Next, patch_op_imm16() 'patches' the imm_insn with an immediate (ii16[j])
+ * to imm_insn's operand, writing it out to func_buf, which is subsequently
+ * executed.
+ *
+ * So, for example, the function test_addi():
+ *
+ * extern void test_addi (void);
+ * asm(".text\n"
+ * "test_addi:\n"
+ * "\taddi 17, 14, 0\n"
+ * "\tblr\n"
+ * ".previous\n"
+ * );
+ *
+ * if ii16[j] is currently 9, and p[0] is,
+ *
+ * addi 17, 14, 0
+ *
+ * after patch_op_imm16, func_buf[0] becomes:
+ *
+ * addi 17, 14, 9
+ *
+ * In the immediate tests, e.g. test_int_one_reg_imm16(), if you use
+ * printf("original %s: %08x %08x\n", name, p[0], p[1]) before the patching,
+ * and printf("patched %s: %08x %08x\n", name, func_buf[0], func_buf[1])
+ * after, you can compare the imm_insn before and after patching.
+ *
+ * If you undefine USAGE_SIMPLE, you can specify a single op to test on the
+ * command-line.
+ *
+ * For reference,
+ * $./jm-insns -n addi
+ * ...
+ * original addi: 3a2e0000 4e800020
+ * patched addi: 3a2e03e7 4e800020
+ * addi 00000000, 000003e7 => 000003e7 (00000000 00000000)
+ * ...
+ *
+ * Improvements:
* a more clever FPSCR management is needed: for now, I always test
* the round-to-zero case. Other rounding modes also need to be
* tested.
*/
--
Regards, Yao
------------
Yao Qi
|
|
From: <js...@ac...> - 2005-12-01 03:54:41
|
Nightly build on phoenix ( SuSE 10.0 ) started at 2005-12-01 03:30:01 GMT Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 208 tests, 5 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <to...@co...> - 2005-12-01 03:48:25
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2005-12-01 03:30:07 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 210 tests, 7 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/mempool (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/stack_switch (stderr) memcheck/tests/x86/scalar (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: <js...@ac...> - 2005-12-01 03:47:06
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2005-12-01 04:40:00 CET Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 175 tests, 14 stderr failures, 0 stdout failures ================= memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/xml1 (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/mremap (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-01 03:30:12
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-12-01 03:15:05 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 209 tests, 17 stderr failures, 0 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/mempool (stderr) memcheck/tests/partial_load_dflt (stderr) memcheck/tests/partial_load_ok (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/stack_changes (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-01 03:25:57
|
Nightly build on dellow ( x86_64, Fedora Core 4 ) started at 2005-12-01 03:10:13 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 4 stderr failures, 1 stdout failure ================= memcheck/tests/x86/scalar (stderr) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-01 03:21:35
|
Nightly build on aston ( x86_64, Fedora Core 3 ) started at 2005-12-01 03:05:08 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 5 stderr failures, 1 stdout failure ================= memcheck/tests/x86/scalar (stderr) memcheck/tests/x86/scalar_supp (stderr) none/tests/amd64/faultstatus (stderr) none/tests/mremap2 (stdout) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-12-01 03:21:06
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2005-12-01 03:00:29 GMT Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 227 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/pointer-trace (stderr) none/tests/amd64/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/x86/faultstatus (stderr) none/tests/x86/int (stderr) |