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|
From: <sv...@va...> - 2005-09-12 22:53:40
|
Author: cerion
Date: 2005-09-12 23:53:39 +0100 (Mon, 12 Sep 2005)
New Revision: 4627
Log:
assert ppc guest_state vector regs are 16byte aligned
Modified:
trunk/coregrind/m_scheduler/scheduler.c
Modified: trunk/coregrind/m_scheduler/scheduler.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/m_scheduler/scheduler.c 2005-09-12 22:29:38 UTC (rev =
4626)
+++ trunk/coregrind/m_scheduler/scheduler.c 2005-09-12 22:53:39 UTC (rev =
4627)
@@ -410,6 +410,10 @@
for (i =3D 0; i < VG_N_THREADS; i++)
VG_(threads)[i].arch.vex.guest_RESVN =3D 0;
}
+
+ /* ppc guest_state vector regs must be 16byte aligned for loads/store=
s */
+ vg_assert(VG_IS_16_ALIGNED(VG_(threads)[tid].arch.vex.guest_VR0));
+ vg_assert(VG_IS_16_ALIGNED(VG_(threads)[tid].arch.vex_shadow.guest_VR=
0));
# endif =20
=20
/* there should be no undealt-with signals */
|
|
From: <sv...@va...> - 2005-09-12 22:51:58
|
Author: cerion
Date: 2005-09-12 23:51:53 +0100 (Mon, 12 Sep 2005)
New Revision: 1387
Log:
ppc guest_state vector regs must be 16byte aligned for loads/stores
Modified:
trunk/pub/libvex_guest_ppc32.h
Modified: trunk/pub/libvex_guest_ppc32.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_guest_ppc32.h 2005-09-12 20:49:09 UTC (rev 1386)
+++ trunk/pub/libvex_guest_ppc32.h 2005-09-12 22:51:53 UTC (rev 1387)
@@ -126,38 +126,38 @@
/* 376 */ ULong guest_FPR31;
=20
// Vector Registers
- /* 384 */ U128 guest_VR0;
- /* 400 */ U128 guest_VR1;
- /* 416 */ U128 guest_VR2;
- /* 432 */ U128 guest_VR3;
- /* 448 */ U128 guest_VR4;
- /* 464 */ U128 guest_VR5;
- /* 480 */ U128 guest_VR6;
- /* 496 */ U128 guest_VR7;
- /* 512 */ U128 guest_VR8;
- /* 528 */ U128 guest_VR9;
- /* 544 */ U128 guest_VR10;
- /* 560 */ U128 guest_VR11;
- /* 576 */ U128 guest_VR12;
- /* 592 */ U128 guest_VR13;
- /* 608 */ U128 guest_VR14;
- /* 624 */ U128 guest_VR15;
- /* 640 */ U128 guest_VR16;
- /* 656 */ U128 guest_VR17;
- /* 672 */ U128 guest_VR18;
- /* 688 */ U128 guest_VR19;
- /* 704 */ U128 guest_VR20;
- /* 720 */ U128 guest_VR21;
- /* 736 */ U128 guest_VR22;
- /* 752 */ U128 guest_VR23;
- /* 768 */ U128 guest_VR24;
- /* 784 */ U128 guest_VR25;
- /* 800 */ U128 guest_VR26;
- /* 816 */ U128 guest_VR27;
- /* 832 */ U128 guest_VR28;
- /* 848 */ U128 guest_VR29;
- /* 864 */ U128 guest_VR30;
- /* 880 */ U128 guest_VR31;
+ /* 384 */ U128 guest_VR0 __attribute__ ((aligned (16)));
+ /* 400 */ U128 guest_VR1 __attribute__ ((aligned (16)));
+ /* 416 */ U128 guest_VR2 __attribute__ ((aligned (16)));
+ /* 432 */ U128 guest_VR3 __attribute__ ((aligned (16)));
+ /* 448 */ U128 guest_VR4 __attribute__ ((aligned (16)));
+ /* 464 */ U128 guest_VR5 __attribute__ ((aligned (16)));
+ /* 480 */ U128 guest_VR6 __attribute__ ((aligned (16)));
+ /* 496 */ U128 guest_VR7 __attribute__ ((aligned (16)));
+ /* 512 */ U128 guest_VR8 __attribute__ ((aligned (16)));
+ /* 528 */ U128 guest_VR9 __attribute__ ((aligned (16)));
+ /* 544 */ U128 guest_VR10 __attribute__ ((aligned (16)));
+ /* 560 */ U128 guest_VR11 __attribute__ ((aligned (16)));
+ /* 576 */ U128 guest_VR12 __attribute__ ((aligned (16)));
+ /* 592 */ U128 guest_VR13 __attribute__ ((aligned (16)));
+ /* 608 */ U128 guest_VR14 __attribute__ ((aligned (16)));
+ /* 624 */ U128 guest_VR15 __attribute__ ((aligned (16)));
+ /* 640 */ U128 guest_VR16 __attribute__ ((aligned (16)));
+ /* 656 */ U128 guest_VR17 __attribute__ ((aligned (16)));
+ /* 672 */ U128 guest_VR18 __attribute__ ((aligned (16)));
+ /* 688 */ U128 guest_VR19 __attribute__ ((aligned (16)));
+ /* 704 */ U128 guest_VR20 __attribute__ ((aligned (16)));
+ /* 720 */ U128 guest_VR21 __attribute__ ((aligned (16)));
+ /* 736 */ U128 guest_VR22 __attribute__ ((aligned (16)));
+ /* 752 */ U128 guest_VR23 __attribute__ ((aligned (16)));
+ /* 768 */ U128 guest_VR24 __attribute__ ((aligned (16)));
+ /* 784 */ U128 guest_VR25 __attribute__ ((aligned (16)));
+ /* 800 */ U128 guest_VR26 __attribute__ ((aligned (16)));
+ /* 816 */ U128 guest_VR27 __attribute__ ((aligned (16)));
+ /* 832 */ U128 guest_VR28 __attribute__ ((aligned (16)));
+ /* 848 */ U128 guest_VR29 __attribute__ ((aligned (16)));
+ /* 864 */ U128 guest_VR30 __attribute__ ((aligned (16)));
+ /* 880 */ U128 guest_VR31 __attribute__ ((aligned (16)));
=20
/* 896 */ UInt guest_CIA; // IP (no arch visible register)
/* 900 */ UInt guest_LR; // Link Register
|
|
From: <sv...@va...> - 2005-09-12 22:29:43
|
Author: cerion
Date: 2005-09-12 23:29:38 +0100 (Mon, 12 Sep 2005)
New Revision: 4626
Log:
add case Iop_V128to32 to memcheck
Modified:
trunk/memcheck/mc_translate.c
Modified: trunk/memcheck/mc_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_translate.c 2005-09-12 10:20:02 UTC (rev 4625)
+++ trunk/memcheck/mc_translate.c 2005-09-12 22:29:38 UTC (rev 4626)
@@ -1909,6 +1909,7 @@
case Iop_16Uto32:
case Iop_16Sto32:
case Iop_8Sto32:
+ case Iop_V128to32:
return assignNew(mce, Ity_I32, unop(op, vatom));
=20
case Iop_8Sto16:
|
|
From: <sv...@va...> - 2005-09-12 20:55:49
|
Author: njn
Date: 2005-09-12 21:55:43 +0100 (Mon, 12 Sep 2005)
New Revision: 192
Log:
wibble
Modified:
trunk/gallery/survey_current/survey.html
Modified: trunk/gallery/survey_current/survey.html
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/gallery/survey_current/survey.html 2005-09-12 19:27:20 UTC (rev=
191)
+++ trunk/gallery/survey_current/survey.html 2005-09-12 20:55:43 UTC (rev=
192)
@@ -117,7 +117,7 @@
</td></tr>
<tr><td>
<input type=3D"hidden" name=3D"Q7[q]"=20
- value=3D"q7. Which command-line options do you (almost) always use"=
/>
+ value=3D"q7. Which command-line options do you always/almost always=
use"/>
<b>7. </b>Which of Valgrind's command-line options do you always, or
almost always, use?<br />
<textarea name=3D"Q7[txt]" rows=3D"2" cols=3D"56"></textarea>
|
|
From: <sv...@va...> - 2005-09-12 20:49:16
|
Author: cerion
Date: 2005-09-12 21:49:09 +0100 (Mon, 12 Sep 2005)
New Revision: 1386
Log:
front end:
- implemented insns: mfvscr, mtvscr, vand, vor, vxor
- fixed default vscr: enable non-java mode
back end:
- implemented enough to satisfy the front end: V128to32, 32UtoV128, not,=
and, or, xor
- fixed conversions to/from v128 to use quad-word-aligned stack addressi=
ng for their vector load/stores
Modified:
trunk/priv/guest-ppc32/gdefs.h
trunk/priv/guest-ppc32/ghelpers.c
trunk/priv/guest-ppc32/toIR.c
trunk/priv/host-ppc32/hdefs.c
trunk/priv/host-ppc32/hdefs.h
trunk/priv/host-ppc32/isel.c
trunk/pub/libvex_guest_ppc32.h
Modified: trunk/priv/guest-ppc32/gdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/gdefs.h 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/priv/guest-ppc32/gdefs.h 2005-09-12 20:49:09 UTC (rev 1386)
@@ -122,7 +122,7 @@
=20
=20
/*---------------------------------------------------------*/
-/*--- ppc32 guest helpers ---*/
+/*--- ppc32 guest helpers ---*/
/*---------------------------------------------------------*/
=20
/* --- CLEAN HELPERS --- */
Modified: trunk/priv/guest-ppc32/ghelpers.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/ghelpers.c 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/priv/guest-ppc32/ghelpers.c 2005-09-12 20:49:09 UTC (rev 1386)
@@ -318,7 +318,7 @@
=20
vex_state->guest_VRSAVE =3D 0;
=20
- vex_state->guest_VSCR =3D 0;
+ vex_state->guest_VSCR =3D 0x00010000; // Non-Java mode
=20
vex_state->guest_EMWARN =3D EmWarn_NONE;
=20
Modified: trunk/priv/guest-ppc32/toIR.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/guest-ppc32/toIR.c 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/priv/guest-ppc32/toIR.c 2005-09-12 20:49:09 UTC (rev 1386)
@@ -235,7 +235,7 @@
//zz PPC32_SPR_CR, // Condition Register
PPC32_SPR_FPSCR, // Floating Point Status/Control Register
PPC32_SPR_VRSAVE, // Vector Save/Restore Register
-//zz PPC32_SPR_VSCR, // Vector Status and Control Register
+ PPC32_SPR_VSCR, // Vector Status and Control Register
PPC32_SPR_MAX
} PPC32SPR;
=20
@@ -1188,13 +1188,13 @@
//zz case PPC32_SPR_VRSAVE:
//zz assign( val, IRExpr_Get(OFFB_VRSAVE, Ity_I32) );
//zz break;
-//zz=20
-//zz case PPC32_SPR_VSCR:
-//zz // All other bits are 'Reserved'. Returning zero for these bi=
ts.
-//zz mask =3D mask & 0x00010001;
-//zz assign( val, IRExpr_Get(OFFB_VSCR, Ity_I32) );
-//zz break;
=20
+ case PPC32_SPR_VSCR:
+ // All other bits are zero.
+ mask =3D mask & 0x00010001;
+ assign( val, IRExpr_Get(OFFB_VSCR, Ity_I32) );
+ break;
+
default:
vpanic("getReg(ppc32)");
}
@@ -1300,18 +1300,18 @@
//zz vassert(mask =3D=3D 0xFFFFFFFF); // Only ever need whole r=
eg
//zz stmt( IRStmt_Put( OFFB_VRSAVE, src ) );
//zz break;
-//zz=20
-//zz case PPC32_SPR_VSCR:
-//zz //CAB: There are only 2 valid bits in VSCR - maybe split into two v=
ars...
-//zz=20
-//zz // All other bits are 'Reserved'. Ignoring writes to these bi=
ts.
-//zz stmt( IRStmt_Put( OFFB_VSCR,
-//zz binop(Iop_Or32,
-//zz binop(Iop_And32, src, mkU32(mask & 0x00010001)=
),
-//zz getReg_masked( PPC32_SPR_VSCR, (~mask & 0x0001=
0001) ))));
-//zz break;
-//zz }
=20
+ case PPC32_SPR_VSCR:
+ // CAB: There are only 2 valid bits in VSCR - maybe split into two=
vars...
+ // ... or perhaps only 1 bit... is non-java mode bit ever set to z=
ero?
+
+ // All other bits are 'Reserved'. Ignoring writes to these bits.
+ stmt( IRStmt_Put( OFFB_VSCR,
+ binop(Iop_Or32,
+ binop(Iop_And32, src, mkU32(mask & 0x00010001)),
+ getReg_masked( PPC32_SPR_VSCR, (~mask & 0x00010001) ))));
+ break;
+
default:
vpanic("putReg(ppc32)");
}
@@ -1341,6 +1341,9 @@
case PPC32_SPR_VRSAVE:=20
stmt( IRStmt_Put( OFFB_VRSAVE, src ) );
break;
+ case PPC32_SPR_VSCR:
+ putReg_masked( reg, src, 0xFFFFFFFF );
+ break;
default:
vpanic("putSPR(ppc32)");
}
@@ -1355,6 +1358,8 @@
return IRExpr_Get( OFFB_CTR, Ity_I32 );
case PPC32_SPR_VRSAVE:=20
return IRExpr_Get( OFFB_VRSAVE, Ity_I32 );
+ case PPC32_SPR_VSCR:=20
+ return getReg_masked( reg, 0xFFFFFFFF );
default:
vpanic("getSPR(ppc32)");
}
@@ -2894,7 +2899,7 @@
case 0x010: // bclr (Branch Cond. to Link Register, PPC32 p365)=20
=20
if ((BO & 0x14 /* 1z1zz */) =3D=3D 0x14 && flag_LK =3D=3D 0) {
- DIP("blr");
+ DIP("blr\n");
} else {
DIP("bclr%s 0x%x, 0x%x\n", flag_LK ? "l" : "", BO, BI);
}
@@ -3427,7 +3432,7 @@
DIP("mcrxr crf%d\n", crfD);
=20
/* Compute XER[0-3] (the top 4 bits of XER) into the bottom
- 4 bits of xer_0to3. */
+ 4 bits of xer_0to3. */
assign(=20
xer_0to3,
unop(Iop_32to8,
@@ -4815,18 +4820,20 @@
return False;
}
DIP("mfvscr v%d\n", vD_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ putVReg( vD_addr, unop(Iop_32UtoV128, getSPR( PPC32_SPR_VSCR )) );=
=20
+ break;
=20
- case 0x644: // mtvscr (Move to VSCR, AV p130)
+ case 0x644: { // mtvscr (Move to VSCR, AV p130)
if (vD_addr !=3D 0 || vA_addr !=3D 0) {
vex_printf("dis_av_procctl(PPC32)(opc2,dst)\n");
return False;
}
DIP("mtvscr v%d\n", vB_addr);
- DIP(" =3D> not implemented\n");
- return False;
-
+ IRTemp vB =3D newTemp(Ity_V128);
+ assign( vB, getVReg(vB_addr));
+ putSPR( PPC32_SPR_VSCR, unop(Iop_V128to32, mkexpr(vB)) );=20
+ break;
+ }
default:
vex_printf("dis_av_procctl(PPC32)(opc2)\n");
return False;
@@ -4914,14 +4921,14 @@
UInt opc2 =3D (theInstr >> 1) & 0x3FF; /* theInstr[1:10=
] */
UChar b0 =3D toUChar((theInstr >> 0) & 1); /* theInstr[0] =
*/
=20
- IRTemp rA =3D newTemp(Ity_I32);
- IRTemp rB =3D newTemp(Ity_I32);
+ // IRTemp rA =3D newTemp(Ity_I32);
+ // IRTemp rB =3D newTemp(Ity_I32);
IRTemp vS =3D newTemp(Ity_V128);
IRTemp EA =3D newTemp(Ity_I32);
IRTemp EA_aligned =3D newTemp(Ity_I32);
=20
- assign( rA, getIReg(rA_addr));
- assign( rB, getIReg(rB_addr));
+ // assign( rA, getIReg(rA_addr));
+ // assign( rB, getIReg(rB_addr));
assign( vS, getVReg(vS_addr));
=20
assign( EA, ea_standard(rA_addr, rB_addr) );
@@ -5283,6 +5290,11 @@
UChar vB_addr =3D toUChar((theInstr >> 11) & 0x1F); /* theInstr[11:1=
5] */
UInt opc2 =3D (theInstr >> 0) & 0x7FF; /* theInstr[0:10=
] */
=20
+ IRTemp vA =3D newTemp(Ity_V128);
+ IRTemp vB =3D newTemp(Ity_V128);
+ assign( vA, getVReg(vA_addr));
+ assign( vB, getVReg(vB_addr));
+
if (opc1 !=3D 0x4) {
vex_printf("dis_av_logic(PPC32)(opc1 !=3D 0x4)\n");
return False;
@@ -5291,8 +5303,8 @@
switch (opc2) {
case 0x404: // vand (And, AV p147)
DIP("vand v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ putVReg( vD_addr, binop(Iop_AndV128, mkexpr(vA), mkexpr(vB)) );
+ break;
=20
case 0x444: // vandc (And, AV p148)
DIP("vandc v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
@@ -5301,13 +5313,13 @@
=20
case 0x484: // vor (Or, AV p217)
DIP("vor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ putVReg( vD_addr, binop(Iop_OrV128, mkexpr(vA), mkexpr(vB)) );
+ break;
=20
case 0x4C4: // vxor (Xor, AV p282)
DIP("vxor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
- DIP(" =3D> not implemented\n");
- return False;
+ putVReg( vD_addr, binop(Iop_XorV128, mkexpr(vA), mkexpr(vB)) );
+ break;
=20
case 0x504: // vnor (Nor, AV p216)
DIP("vnor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
@@ -6095,7 +6107,7 @@
opc1 =3D toUChar(ifieldOPC(theInstr));
opc2 =3D ifieldOPClo10(theInstr);
=20
-#if PPC32_TOIR_DEBUG
+#if 0 //PPC32_TOIR_DEBUG
vex_printf("\ndisInstr(ppc32): instr: 0x%x\n", theInstr);
vex_printf("disInstr(ppc32): instr: ");
vex_printf_binary( theInstr, 32, True );
@@ -6565,6 +6577,7 @@
default:
decode_failure:
/* All decode failures end up here. */
+ opc2 =3D (theInstr) & 0x7FF;
vex_printf("disInstr(ppc32): unhandled instruction: "
"0x%x\n", theInstr);
vex_printf(" primary %d(0x%x), secondary %u(0x%x)\n",=
=20
Modified: trunk/priv/host-ppc32/hdefs.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/hdefs.c 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/priv/host-ppc32/hdefs.c 2005-09-12 20:49:09 UTC (rev 1386)
@@ -1261,10 +1261,11 @@
ppLoadImm(hregPPC32_GPR30(), i->Pin.AvLdSt.addr->Pam.RR.index);
vex_printf(" ; ");
}
+ char* str_size =3D sz=3D=3D1 ? "eb" : sz=3D=3D2 ? "eh" : sz=3D=3D4=
? "ew" : "";
if (i->Pin.AvLdSt.isLoad)
- vex_printf("lv%sx ", sz=3D=3D8 ? "eb" : sz=3D=3D16 ? "eh" : sz=3D=
=3D32 ? "ew" : "");
+ vex_printf("lv%sx ", str_size);
else
- vex_printf("stv%sx ", sz=3D=3D8 ? "eb" : sz=3D=3D16 ? "eh" : sz=
=3D=3D32 ? "ew" : "");
+ vex_printf("stv%sx ", str_size);
ppHRegPPC32(i->Pin.AvLdSt.reg);
vex_printf(",");
if (i->Pin.AvLdSt.addr->tag =3D=3D Pam_IR)
@@ -2755,7 +2756,7 @@
UInt opc2, v_reg, r_idx, r_base;
UChar sz =3D i->Pin.AvLdSt.sz;
Bool idxd =3D toBool(i->Pin.AvLdSt.addr->tag =3D=3D Pam_RR);
- vassert(sz =3D=3D 8 || sz =3D=3D 16 || sz =3D=3D 32 || sz =3D=3D 1=
28);
+ vassert(sz =3D=3D 1 || sz =3D=3D 2 || sz =3D=3D 4 || sz =3D=3D 16)=
;
=20
v_reg =3D vregNo(i->Pin.AvLdSt.reg);
r_base =3D iregNo(i->Pin.AvLdSt.addr->Pam.RR.base);
@@ -2768,11 +2769,11 @@
r_idx =3D iregNo(i->Pin.AvLdSt.addr->Pam.RR.index);
}
=20
- if (i->Pin.FpLdSt.isLoad) { // Load from memory (8,16,32,128)
- opc2 =3D (sz =3D=3D 8) ? 7 : (sz =3D=3D 16) ? 39 : (sz =3D=3D 3=
2) ? 71 : 103;
+ if (i->Pin.FpLdSt.isLoad) { // Load from memory (1,2,4,16)
+ opc2 =3D (sz =3D=3D 1) ? 7 : (sz =3D=3D 2) ? 39 : (sz =3D=3D 4)=
? 71 : 103;
p =3D mkFormX(p, 31, v_reg, r_idx, r_base, opc2, 0);
- } else { // Store to memory (8,16,32,128)
- opc2 =3D (sz =3D=3D 8) ? 135 : (sz =3D=3D 16) ? 167 : (sz =3D=3D=
32) ? 199 : 231;
+ } else { // Store to memory (1,2,4,16)
+ opc2 =3D (sz =3D=3D 1) ? 135 : (sz =3D=3D 2) ? 167 : (sz =3D=3D=
4) ? 199 : 231;
p =3D mkFormX(p, 31, v_reg, r_idx, r_base, opc2, 0);
}
goto done;
@@ -2813,9 +2814,9 @@
UInt opc2;
switch (i->Pin.AvBinary.op) {
/* Bitwise */
- case Pav_AND: opc2 =3D 1026; break; // vand
+ case Pav_AND: opc2 =3D 1028; break; // vand
case Pav_OR: opc2 =3D 1156; break; // vor
- case Pav_XOR: opc2 =3D 1120; break; // vxor
+ case Pav_XOR: opc2 =3D 1220; break; // vxor
=20
/* Shift */
case Pav_SHL: opc2 =3D 452; break; // vsl
Modified: trunk/priv/host-ppc32/hdefs.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/hdefs.h 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/priv/host-ppc32/hdefs.h 2005-09-12 20:49:09 UTC (rev 1386)
@@ -54,7 +54,7 @@
/* --------- Registers. --------- */
=20
/* The usual HReg abstraction. There are 32 real int regs,
- 32 real float regs, and 0 real vector regs.=20
+ 32 real float regs, and 32 real vector regs.=20
*/
=20
extern void ppHRegPPC32 ( HReg );
Modified: trunk/priv/host-ppc32/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-ppc32/isel.c 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/priv/host-ppc32/isel.c 2005-09-12 20:49:09 UTC (rev 1386)
@@ -344,7 +344,28 @@
Palu_SUB, sp, sp, PPC32RH_Imm(True,toUShort(n))));
}
=20
+/*
+ returns a quadword aligned address on the stack
+ - copies SP, adds 16bytes, aligns to quadword.
+ use sub_from_sp(32) before calling this,
+ as expects to have 32 bytes to play with.
+*/
+static HReg get_sp_aligned16 ( ISelEnv* env )
+{
+ HReg r =3D newVRegI(env);
+ HReg align16 =3D newVRegI(env);
+ addInstr(env, mk_iMOVds_RR(r, StackFramePtr));
+ // add 16
+ addInstr(env, PPC32Instr_Alu32(
+ Palu_ADD, r, r, PPC32RH_Imm(True,toUShort(16))));
+ // mask to quadword
+ addInstr(env, PPC32Instr_LI32(align16, (UInt)0xFFFFFFF0));
+ addInstr(env, PPC32Instr_Alu32(Palu_AND, r,r, PPC32RH_Reg(align16)));
+ return r;
+}
=20
+
+
/* Load 2*I32 regs to fp reg */
static HReg mk_LoadRRtoFPR ( ISelEnv* env, HReg r_srcHi, HReg r_srcLo )
{
@@ -1188,17 +1209,25 @@
return r_dst;
}
=20
-//.. case Iop_V128to32: {
-//.. HReg dst =3D newVRegI(env);
-//.. HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
-//.. X86AMode* esp0 =3D X86AMode_IR(0, hregX86_ESP());
-//.. sub_from_esp(env, 16);
-//.. addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp=
0));
-//.. addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(esp=
0), dst ));
-//.. add_to_esp(env, 16);
-//.. return dst;
-//.. }
+ case Iop_V128to32: {
+ HReg dst =3D newVRegI(env);
+ HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
+ PPC32AMode *am_off0, *am_off12;
+ sub_from_sp( env, 32 ); // Move SP down 32 bytes
=20
+ // get a quadword aligned address within our stack space
+ HReg r_aligned16 =3D get_sp_aligned16( env );
+ am_off0 =3D PPC32AMode_IR( 0, r_aligned16 );
+ am_off12 =3D PPC32AMode_IR( 12,r_aligned16 );
+
+ // store vec, load low word to dst
+ addInstr(env, PPC32Instr_AvLdSt( False/*store*/, 16, vec, am_of=
f0 ));
+ addInstr(env, PPC32Instr_Load( 4, False, dst, am_off12 ));
+
+ add_to_sp( env, 32 ); // Reset SP
+ return dst;
+ }
+
case Iop_16to8:
case Iop_32to8:
case Iop_32to16:
@@ -2316,19 +2345,21 @@
HReg tLo =3D newVRegI(env);
HReg tHi =3D newVRegI(env);
HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
- PPC32AMode *sp0, *spLO, *spHI;
-
+ PPC32AMode *am_off0, *am_offLO, *am_offHI;
sub_from_sp( env, 32 ); // Move SP down 32 bytes
- sp0 =3D PPC32AMode_IR(0, StackFramePtr);
- spHI =3D PPC32AMode_IR(off, StackFramePtr);
- spLO =3D PPC32AMode_IR(off+4, StackFramePtr);
=20
+ // get a quadword aligned address within our stack space
+ HReg r_aligned16 =3D get_sp_aligned16( env );
+ am_off0 =3D PPC32AMode_IR( 0, r_aligned16 );
+ am_offHI =3D PPC32AMode_IR( off, r_aligned16 );
+ am_offLO =3D PPC32AMode_IR( off+4, r_aligned16 );
+
// store as Vec128
- addInstr(env, PPC32Instr_AvLdSt( False/*store*/, 16, vec, sp=
0 ));
+ addInstr(env, PPC32Instr_AvLdSt( False/*store*/, 16, vec, am=
_off0 ));
=20
// load hi,lo words (of hi/lo half of vec) as Ity_I32's
- addInstr(env, PPC32Instr_Load( 4, False, tHi, spHI ));
- addInstr(env, PPC32Instr_Load( 4, False, tLo, spLO ));
+ addInstr(env, PPC32Instr_Load( 4, False, tHi, am_offHI ));
+ addInstr(env, PPC32Instr_Load( 4, False, tLo, am_offLO ));
=20
add_to_sp( env, 32 ); // Reset SP
*rHi =3D tHi;
@@ -2781,7 +2812,7 @@
static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
{
//.. Bool arg1isEReg =3D False;
- // unused: PPC32AvOp op =3D Pav_INVALID;
+ PPC32AvOp op =3D Pav_INVALID;
IRType ty =3D typeOfIRExpr(env->type_env,e);
vassert(e);
vassert(ty =3D=3D Ity_V128);
@@ -2817,11 +2848,13 @@
if (e->tag =3D=3D Iex_Unop) {
switch (e->Iex.Unop.op) {
=20
-//.. case Iop_Not128: {
-//.. HReg arg =3D iselVecExpr(env, e->Iex.Unop.arg);
-//.. return do_sse_Not128(env, arg);
-//.. }
-//..=20
+ case Iop_NotV128: {
+ HReg arg =3D iselVecExpr(env, e->Iex.Unop.arg);
+ HReg dst =3D newVRegV(env);
+ addInstr(env, PPC32Instr_AvUnary(Pav_NOT, dst, arg));
+ return dst;
+ }
+
//.. case Iop_CmpNEZ64x2: {
//.. /* We can use SSE2 instructions for this. */
//.. /* Ideally, we want to do a 64Ix2 comparison against zero =
of
@@ -2963,17 +2996,37 @@
//.. addInstr(env, X86Instr_Sse64FLo(op, arg, dst));
//.. return dst;
//.. }
-//..=20
-//.. case Iop_32UtoV128: {
-//.. HReg dst =3D newVRegV(env);
-//.. X86AMode* esp0 =3D X86AMode_IR(0, hregX86_ESP());
-//.. X86RMI* rmi =3D iselIntExpr_RMI(env, e->Iex.Unop.arg);
-//.. addInstr(env, X86Instr_Push(rmi));
-//.. addInstr(env, X86Instr_SseLdzLO(4, dst, esp0));
-//.. add_to_esp(env, 4);
-//.. return dst;
-//.. }
-//..=20
+
+ case Iop_32UtoV128: {
+ HReg r_src =3D iselIntExpr_R(env, e->Iex.Unop.arg);
+ HReg dst =3D newVRegV(env);
+ PPC32AMode *am_off0, *am_off4, *am_off8, *am_off12;
+ sub_from_sp( env, 32 ); // Move SP down
+
+ /* Get a quadword aligned address within our stack space */
+ HReg r_aligned16 =3D get_sp_aligned16( env );
+ am_off0 =3D PPC32AMode_IR( 0, r_aligned16);
+ am_off4 =3D PPC32AMode_IR( 4, r_aligned16);
+ am_off8 =3D PPC32AMode_IR( 8, r_aligned16);
+ am_off12 =3D PPC32AMode_IR( 12, r_aligned16);
+
+ /* Store zero's */
+ HReg r_zeros =3D newVRegI(env);
+ addInstr(env, PPC32Instr_LI32(r_zeros, 0x0));
+ addInstr(env, PPC32Instr_Store( 4, am_off0, r_zeros ));
+ addInstr(env, PPC32Instr_Store( 4, am_off4, r_zeros ));
+ addInstr(env, PPC32Instr_Store( 4, am_off8, r_zeros ));
+
+ /* Store r_src in low word of quadword-aligned mem */
+ addInstr(env, PPC32Instr_Store( 4, am_off12, r_src ));
+
+ /* Load word into low word of quadword vector reg */
+ addInstr(env, PPC32Instr_AvLdSt( True/*load*/, 4, dst, am_off12=
));
+
+ add_to_sp( env, 32 ); // Reset SP
+ return dst;
+ }
+
//.. case Iop_64UtoV128: {
//.. HReg rHi, rLo;
//.. HReg dst =3D newVRegV(env);
@@ -3025,24 +3078,31 @@
//..=20
case Iop_64HLtoV128: {
HReg r3, r2, r1, r0;
- PPC32AMode *sp0 =3D PPC32AMode_IR(0, StackFramePtr);
- PPC32AMode *sp4 =3D PPC32AMode_IR(4, StackFramePtr);
- PPC32AMode *sp8 =3D PPC32AMode_IR(8, StackFramePtr);
- PPC32AMode *sp12 =3D PPC32AMode_IR(12, StackFramePtr);
+ PPC32AMode *am_off0, *am_off4, *am_off8, *am_off12;
HReg dst =3D newVRegV(env);
/* do this via the stack (easy, convenient, etc) */
- sub_from_sp( env, 16 ); // Move SP down 16 bytes
+ sub_from_sp( env, 32 ); // Move SP down
+
+ // get a quadword aligned address within our stack space
+ HReg r_aligned16 =3D get_sp_aligned16( env );
+ am_off0 =3D PPC32AMode_IR( 0, r_aligned16);
+ am_off4 =3D PPC32AMode_IR( 4, r_aligned16);
+ am_off8 =3D PPC32AMode_IR( 8, r_aligned16);
+ am_off12 =3D PPC32AMode_IR( 12, r_aligned16);
+
/* Do the less significant 64 bits */
iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
- addInstr(env, PPC32Instr_Store( 4, sp12, r0 ));
- addInstr(env, PPC32Instr_Store( 4, sp8, r1 ));
+ addInstr(env, PPC32Instr_Store( 4, am_off12, r0 ));
+ addInstr(env, PPC32Instr_Store( 4, am_off8, r1 ));
/* Do the more significant 64 bits */
iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
- addInstr(env, PPC32Instr_Store( 4, sp4, r2 ));
- addInstr(env, PPC32Instr_Store( 4, sp0, r3 ));
+ addInstr(env, PPC32Instr_Store( 4, am_off4, r2 ));
+ addInstr(env, PPC32Instr_Store( 4, am_off0, r3 ));
+
/* Fetch result back from stack. */
- addInstr(env, PPC32Instr_AvLdSt(True/*load*/, 16, dst, sp0));
- add_to_sp( env, 16 ); // Reset SP
+ addInstr(env, PPC32Instr_AvLdSt(True/*load*/, 16, dst, am_off0)=
);
+
+ add_to_sp( env, 32 ); // Reset SP
return dst;
}
=20
@@ -3146,10 +3206,10 @@
//.. op =3D Xsse_UNPCKLD; arg1isEReg =3D True; goto do_SseReRg;
//.. case Iop_InterleaveLO64x2:=20
//.. op =3D Xsse_UNPCKLQ; arg1isEReg =3D True; goto do_SseReRg;
-//..=20
-//.. case Iop_AndV128: op =3D Xsse_AND; goto do_SseReRg;
-//.. case Iop_OrV128: op =3D Xsse_OR; goto do_SseReRg;
-//.. case Iop_XorV128: op =3D Xsse_XOR; goto do_SseReRg;
+
+ case Iop_AndV128: op =3D Pav_AND; goto do_AvBin;
+ case Iop_OrV128: op =3D Pav_OR; goto do_AvBin;
+ case Iop_XorV128: op =3D Pav_XOR; goto do_AvBin;
//.. case Iop_Add8x16: op =3D Xsse_ADD8; goto do_SseReRg;
//.. case Iop_Add16x8: op =3D Xsse_ADD16; goto do_SseReRg;
//.. case Iop_Add32x4: op =3D Xsse_ADD32; goto do_SseReRg;
@@ -3181,6 +3241,13 @@
//.. case Iop_QSub16Sx8: op =3D Xsse_QSUB16S; goto do_SseReRg;
//.. case Iop_QSub8Ux16: op =3D Xsse_QSUB8U; goto do_SseReRg;
//.. case Iop_QSub16Ux8: op =3D Xsse_QSUB16U; goto do_SseReRg;
+ do_AvBin: {
+ HReg arg1 =3D iselVecExpr(env, e->Iex.Binop.arg1);
+ HReg arg2 =3D iselVecExpr(env, e->Iex.Binop.arg2);
+ HReg dst =3D newVRegV(env);
+ addInstr(env, PPC32Instr_AvBinary(op, dst, arg1, arg2));
+ return dst;
+ }
//.. do_SseReRg: {
//.. HReg arg1 =3D iselVecExpr(env, e->Iex.Binop.arg1);
//.. HReg arg2 =3D iselVecExpr(env, e->Iex.Binop.arg2);
Modified: trunk/pub/libvex_guest_ppc32.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/pub/libvex_guest_ppc32.h 2005-09-10 12:02:24 UTC (rev 1385)
+++ trunk/pub/libvex_guest_ppc32.h 2005-09-12 20:49:09 UTC (rev 1386)
@@ -208,7 +208,7 @@
/* 952 */ UInt guest_RESVN;
=20
/* Padding to make it have an 8-aligned size */
- /* UInt padding; */
+ UInt padding;
}
VexGuestPPC32State;
=20
|
|
From: <sv...@va...> - 2005-09-12 19:27:25
|
Author: njn Date: 2005-09-12 20:27:20 +0100 (Mon, 12 Sep 2005) New Revision: 191 Log: Clarify 'valgrind -v' instruction. Modified: trunk/support/bug_reports.html Modified: trunk/support/bug_reports.html =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/support/bug_reports.html 2005-09-02 10:13:54 UTC (rev 190) +++ trunk/support/bug_reports.html 2005-09-12 19:27:20 UTC (rev 191) @@ -35,7 +35,8 @@ <p>When you report a bug, please give the following information:</p> <ul> <li>The output of <code>uname -a</code>.</li> - <li>The full output of <code>valgrind -v</code>.</li> + <li>The full output you get when you run your program under Valgrind + with the <code>-v</code> flag.</li> </ul> =20 <p>If you can produce a small test program that exposes the |
|
From: Nicholas N. <nj...@cs...> - 2005-09-12 13:36:24
|
On Mon, 12 Sep 2005, Julian Seward wrote: > I think Nick plans to revamp this anyway, so that we would once > again have libcoregrind.a constructed in coregrind and the tools > would just link libcoregrind.a and libvex.a. Yep, I'll look at it once I've comprehended everything that happened in the past week :) Maybe tonight. Nick |
|
From: Nicholas N. <nj...@cs...> - 2005-09-12 13:31:43
|
On Mon, 12 Sep 2005, Tom Hughes wrote: > Really map_base should be somewhere in the middle of the address > space to allow room for the data segment underneath. Yes. On x86/Linux it is 0x40000000. In the trunk's code we approximate that by measuring the size of the hole between the executable and the top of the client's space, and then put map_base 1/3 of the way along. Something similar would be good for ASPACEM. N |
|
From: Julian S. <js...@ac...> - 2005-09-12 12:33:21
|
> > Well, that's promising. It gets as far as the x86 one does, and > > memory layout is roughly as expected -- artificially constrained > > to the lowest 16G for the most part. > > Presumably that constraint is to make memcheck efficient and stop > it using auxiliary maps? Yup. > In which case it is only client allocations that need to be below > the 16G boundary? True. Good point. The layout policy is controlled by just one function, VG_(aspacem_getAdvisory). It considers the space request contained in *req and forClient, and produces a suggested (advisory) address (or it decides "no, I'm going to veto that"). I was going to say: If you wanted to look at playing with layout policy, this is the place to start. But then I realised that it's more complicated, because VG_(aspacem_getAdvisory) observes the constraints imposed by reserved segments, and so there also needs to be some consideration of the initial placement of reservations. > I have a small patch here to move vStart up to 16G on amd64 if > you're interested. Thanks, but for the moment I need to stagger dazedly around the minefield for a while longer. I don't yet have a system which can run any program successfully to completion. Perhaps later in the week. J |
|
From: Tom H. <to...@co...> - 2005-09-12 11:47:59
|
In message <200...@ac...>
Julian Seward <js...@ac...> wrote:
> Well, that's promising. It gets as far as the x86 one does, and
> memory layout is roughly as expected -- artificially constrained
> to the lowest 16G for the most part.
Presumably that constraint is to make memcheck efficient and stop
it using auxiliary maps? In which case it is only client allocations
that need to be below the 16G boundary? Currently it tried to put
everything under that.
I have a small patch here to move vStart up to 16G on amd64 if
you're interested.
> Why did you need to change map_base? I had the idea that m_ume
> should load the executable at the place where the executable wants
> to be loaded, but that it could load the interpreter (ld.so) anywhere
> it feels like.
Because as it stood map_base was zero which meant that the interpreter
got mapped immediately above the client (because the client is loading
at 0x400000 so there is no space below it) and then when you try and
create the data segment immediately above the client the memory you
wanted is already in use.
I suspect you are getting away with it on x86 because there is
normally space below the client for the interpreter.
Really map_base should be somewhere in the middle of the address
space to allow room for the data segment underneath. We should also
really respect the load address from the interpreter if that is
possible - we currently calculate it in interp_addr but then ignore
it for some reason and just use map_base.
That doesn't help on amd64 though because the interpreters preferred
load address is well above the 16G boundary.
> One thing I couldn't figure out in ume.c is how the interpreter
> knows where the executable is. Presumably the interpreter, when
> started (on the VCPU), reads the executable's program header so
> as to find its immediate dependencies, and works from there.
> Any ideas?
Is it not in the auxiliary vector? I think it uses some combination
of AT_PHDR, AT_PHNUM and AT_ENTRY to find what it needs.
> Today am working to get client mmap/munmap/mprotect working, so
> programs can actually run. I have a long list of stuff which is
> now broken or needs reconsidering. What I plan to do is get basic
> functionality restored, tidy up and document how it works, and
> then we can look at whether the design needs revision or not.
> (Fred Brooks lurks in the background :-) I imagine that will take
> me most of this week.
Excellent.
Tom
--
Tom Hughes (to...@co...)
http://www.compton.nu/
|
|
From: Julian S. <js...@ac...> - 2005-09-12 11:29:55
|
> Well I have also had to hack VG_(main_thread_wrapper_NORETURN) in > the amd64 code to match what you did in the x86 code and also, since > your data segment commit this morning I have had to tweak map_base > in load_client but with those hacks and the above change to the amount > of reserved memory I get: Well, that's promising. It gets as far as the x86 one does, and memory layout is roughly as expected -- artificially constrained to the lowest 16G for the most part. Why did you need to change map_base? I had the idea that m_ume should load the executable at the place where the executable wants to be loaded, but that it could load the interpreter (ld.so) anywhere it feels like. One thing I couldn't figure out in ume.c is how the interpreter knows where the executable is. Presumably the interpreter, when started (on the VCPU), reads the executable's program header so as to find its immediate dependencies, and works from there. Any ideas? Today am working to get client mmap/munmap/mprotect working, so programs can actually run. I have a long list of stuff which is now broken or needs reconsidering. What I plan to do is get basic functionality restored, tidy up and document how it works, and then we can look at whether the design needs revision or not. (Fred Brooks lurks in the background :-) I imagine that will take me most of this week. J |
|
From: Tom H. <to...@co...> - 2005-09-12 10:57:09
|
In message <200...@ac...>
Julian Seward <js...@ac...> wrote:
>> Reserving the bottom 64M doesn't work on amd64 though as, at least on
>> my box, the default load address for an executable is 0x400000 which is
>> only 4M.
>>
>> I has to reduce spacem_minAddr to 0x400000 to make it work on amd64.
>
> Ok, interesting.
>
> What do you get from
>
> ./none/none -d -d --trace-signals=yes --trace-syscalls=yes date
Well I have also had to hack VG_(main_thread_wrapper_NORETURN) in
the amd64 code to match what you did in the x86 code and also, since
your data segment commit this morning I have had to tweak map_base
in load_client but with those hacks and the above change to the amount
of reserved memory I get:
--5358:1:debuglog DebugLog system started by Stage 2 (main), level 2 logging requested
--5358:1:main Welcome to Valgrind version 3.1.ASPACEM debug logging
--5358:1:main Checking current stack is plausible
--5358:1:main Checking initial stack was noted
--5358:1:main Starting the address space manager
--5358:2:aspacem sp_at_startup = 0x7FFFFFED7AB0 (supplied)
--5358:2:aspacem minAddr = 0x00400000 (computed)
--5358:2:aspacem maxAddr = 0x3FFFFFFFF (computed)
--5358:2:aspacem cStart = 0x00400000 (computed)
--5358:2:aspacem vStart = 0x200200000 (computed)
--5358:2:aspacem suggested_clstack_top = 0x3FF000FFF (computed)
--5358:2:aspacem <<< SHOW_SEGMENTS: Initial layout (0 segments, 0 segnames)
--5358:2:aspacem 0: RSVN 00000000-003FFFFF 4194304 ---- SmFixed
--5358:2:aspacem 1: 00400000-2001FFFFF 8190m
--5358:2:aspacem 2: RSVN 200200000-200200FFF 4096 ---- SmFixed
--5358:2:aspacem 3: 200201000-3FFFFFFFF 8189m
--5358:2:aspacem 4: RSVN 400000000-FFFFFFFFFFFFFFFF 17592186028032m ---- SmFixed
--5358:2:aspacem >>>
--5358:2:aspacem Reading /proc/self/maps
--5358:2:aspacem 0: FILE 70000000-7011CFFF 1167360 r-x- d=0xFD00 i=7704126 o=0 (0)
--5358:2:aspacem 0: FILE 7021C000-70225FFF 40960 rw-- d=0xFD00 i=7704126 o=1163264 (0)
--5358:2:aspacem 0: ANON 70226000-708E9FFF 7094272 rw-- d=0x000 i=0 o=0 (-1)
--5358:2:aspacem 0: ANON 7FFFFFEC4000-7FFFFFED8FFF 86016 rw-- d=0x000 i=0 o=0 (-1)
--5358:2:aspacem 0: ANON FFFFFFFFFF600000-FFFFFFFFFFDFFFFF 8388608 ---- d=0x000 i=0 o=0 (-1)
--5358:2:aspacem <<< SHOW_SEGMENTS: With contents of /proc/self/maps (0 segments, 1 segnames)
--5358:2:aspacem ( 0) /home/thh/src/valgrind-aspacem/none/none
--5358:2:aspacem 0: RSVN 00000000-003FFFFF 4194304 ---- SmFixed
--5358:2:aspacem 1: 00400000-6FFFFFFF 1788m
--5358:2:aspacem 2: FILE 70000000-7011CFFF 1167360 r-x- d=0xFD00 i=7704126 o=0 (0)
--5358:2:aspacem 3: 7011D000-7021BFFF 1044480
--5358:2:aspacem 4: FILE 7021C000-70225FFF 40960 rw-- d=0xFD00 i=7704126 o=1163264 (0)
--5358:2:aspacem 5: ANON 70226000-708E9FFF 7094272 rw-- d=0x000 i=0 o=0 (-1)
--5358:2:aspacem 6: 708EA000-2001FFFFF 6393m
--5358:2:aspacem 7: RSVN 200200000-200200FFF 4096 ---- SmFixed
--5358:2:aspacem 8: 200201000-3FFFFFFFF 8189m
--5358:2:aspacem 9: RSVN 400000000-7FFFFFEC3FFF 134201342m ---- SmFixed
--5358:2:aspacem 10: ANON 7FFFFFEC4000-7FFFFFED8FFF 86016 rw-- d=0x000 i=0 o=0 (-1)
--5358:2:aspacem 11: RSVN 7FFFFFED9000-FFFFFFFFFF5FFFFF 17592051826679m ---- SmFixed
--5358:2:aspacem 12: ANON FFFFFFFFFF600000-FFFFFFFFFFDFFFFF 8388608 ---- d=0x000 i=0 o=0 (-1)
--5358:2:aspacem 13: RSVN FFFFFFFFFFE00000-FFFFFFFFFFFFFFFF 2097152 ---- SmFixed
--5358:2:aspacem >>>
--5358:1:main Address space manager is running
--5358:1:main Starting the dynamic memory manager
--5358:1:mallocfr newSuperblock at 0x200201000, for VALGRIND, 1048552 payload bytes
--5358:1:main Dynamic memory manager is running
--5358:1:main Doing scan_auxv()
--5358:1:main Preprocess command line opts
--5358:1:main Loading client
--5358:1:main Setup client env
--5358:1:main preload_string = /tmp/valgrind-aspacem/lib/valgrind/vg_preload_core.so:/tmp/valgrind-aspacem/lib/valgrind/vgpreload_memcheck.so
--5358:1:main Setup client stack
--5358:2:main Client info: entry=0x400009E0 client_SP=0x3FEFFEC80 vg_argc=5 brkbase=0x50B000
--5358:1:main Setup client data (brk) segment
--5358:0:aspacem <<< SHOW_SEGMENTS: Before reserving data segment (0 segments, 1 segnames)
--5358:0:aspacem ( 0) /home/thh/src/valgrind-aspacem/none/none
--5358:0:aspacem 0: RSVN 00000000-003FFFFF 4194304 ---- SmFixed
--5358:0:aspacem 1: file 00400000-00409FFF 40960 r-x- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 2: 0040A000-00508FFF 1044480
--5358:0:aspacem 3: file 00509000-0050AFFF 8192 rw-- d=0x000 i=0 o=36864 (-1)
--5358:0:aspacem 4: 0050B000-3FFFFFFF 1018m
--5358:0:aspacem 5: file 40000000-40019FFF 106496 r-x- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 6: 4001A000-40118FFF 1044480
--5358:0:aspacem 7: file 40119000-4011AFFF 8192 rw-- d=0x000 i=0 o=102400 (-1)
--5358:0:aspacem 8: 4011B000-6FFFFFFF 766m
--5358:0:aspacem 9: FILE 70000000-7011CFFF 1167360 r-x- d=0xFD00 i=7704126 o=0 (0)
--5358:0:aspacem 10: 7011D000-7021BFFF 1044480
--5358:0:aspacem 11: FILE 7021C000-70225FFF 40960 rw-- d=0xFD00 i=7704126 o=1163264 (0)
--5358:0:aspacem 12: ANON 70226000-708E9FFF 7094272 rw-- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 13: 708EA000-2001FFFFF 6393m
--5358:0:aspacem 14: RSVN 200200000-200200FFF 4096 ---- SmFixed
--5358:0:aspacem 15: ANON 200201000-200300FFF 1048576 rwx- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 16: 200301000-3FE800FFF 8165m
--5358:0:aspacem 17: RSVN 3FE801000-3FEFFDFFF 8376320 ---- SmUpper
--5358:0:aspacem 18: anon 3FEFFE000-3FF000FFF 12288 rwx- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 19: 3FF001000-3FFFFFFFF 15m
--5358:0:aspacem 20: RSVN 400000000-7FFFFFEC3FFF 134201342m ---- SmFixed
--5358:0:aspacem 21: ANON 7FFFFFEC4000-7FFFFFED8FFF 86016 rw-- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 22: RSVN 7FFFFFED9000-FFFFFFFFFF5FFFFF 17592051826679m ---- SmFixed
--5358:0:aspacem 23: ANON FFFFFFFFFF600000-FFFFFFFFFFDFFFFF 8388608 ---- d=0x000 i=0 o=0 (-1)
--5358:0:aspacem 24: RSVN FFFFFFFFFFE00000-FFFFFFFFFFFFFFFF 2097152 ---- SmFixed
--5358:0:aspacem >>>
--5358:1:main Setup file descriptors
--5358:1:main Initialise the tool
==5358== Nulgrind, a binary JIT-compiler.
==5358== Copyright (C) 2002-2005, and GNU GPL'd, by Nicholas Nethercote.
==5358== Using LibVEX rev 1363, a library for dynamic binary translation.
==5358== Copyright (C) 2004-2005, and GNU GPL'd, by OpenWorks LLP.
==5358== Using valgrind-3.1.ASPACEM, a dynamic binary instrumentation framework.
==5358== Copyright (C) 2000-2005, and GNU GPL'd, by Julian Seward et al.
--5358:1:main Initialise scheduler
--5358:1:main Initialise thread 1's state
--5358:1:main Initialise signal management
--5358-- Max kernel-supported signal is 64
--5358:1:main Initialise TT/TC
--5358:1:main Initialise redirects
--5358:1:mallocfr newSuperblock at 0x200301000, for VALGRIND, 1048552 payload bytes
--5358:1:main Tell tool about permissions for asm helpers
==5358== For more details, rerun with: -v
==5358==
--5358:1:mallocfr newSuperblock at 0x200401000, for VALGRIND, 1048552 payload bytes
--5358:1:main
--5358:1:main
--5358:1:aspacem <<< SHOW_SEGMENTS: Memory layout at client startup (0 segments, 1 segnames)
--5358:1:aspacem ( 0) /home/thh/src/valgrind-aspacem/none/none
--5358:1:aspacem 0: RSVN 00000000-003FFFFF 4194304 ---- SmFixed
--5358:1:aspacem 1: file 00400000-00409FFF 40960 r-x- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 2: 0040A000-00508FFF 1044480
--5358:1:aspacem 3: file 00509000-0050AFFF 8192 rw-- d=0x000 i=0 o=36864 (-1)
--5358:1:aspacem 4: anon 0050B000-0050BFFF 4096 rwx- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 5: RSVN 0050C000-00D0AFFF 8384512 ---- SmLower
--5358:1:aspacem 6: 00D0B000-3FFFFFFF 1010m
--5358:1:aspacem 7: file 40000000-40019FFF 106496 r-x- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 8: 4001A000-40118FFF 1044480
--5358:1:aspacem 9: file 40119000-4011AFFF 8192 rw-- d=0x000 i=0 o=102400 (-1)
--5358:1:aspacem 10: 4011B000-6FFFFFFF 766m
--5358:1:aspacem 11: FILE 70000000-7011CFFF 1167360 r-x- d=0xFD00 i=7704126 o=0 (0)
--5358:1:aspacem 12: 7011D000-7021BFFF 1044480
--5358:1:aspacem 13: FILE 7021C000-70225FFF 40960 rw-- d=0xFD00 i=7704126 o=1163264 (0)
--5358:1:aspacem 14: ANON 70226000-708E9FFF 7094272 rw-- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 15: 708EA000-2001FFFFF 6393m
--5358:1:aspacem 16: RSVN 200200000-200200FFF 4096 ---- SmFixed
--5358:1:aspacem 17: ANON 200201000-200300FFF 1048576 rwx- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 18: ANON 200301000-200400FFF 1048576 rwx- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 19: ANON 200401000-200500FFF 1048576 rwx- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 20: 200501000-3FE800FFF 8163m
--5358:1:aspacem 21: RSVN 3FE801000-3FEFFDFFF 8376320 ---- SmUpper
--5358:1:aspacem 22: anon 3FEFFE000-3FF000FFF 12288 rwx- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 23: 3FF001000-3FFFFFFFF 15m
--5358:1:aspacem 24: RSVN 400000000-7FFFFFEC3FFF 134201342m ---- SmFixed
--5358:1:aspacem 25: ANON 7FFFFFEC4000-7FFFFFED8FFF 86016 rw-- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 26: RSVN 7FFFFFED9000-FFFFFFFFFF5FFFFF 17592051826679m ---- SmFixed
--5358:1:aspacem 27: ANON FFFFFFFFFF600000-FFFFFFFFFFDFFFFF 8388608 ---- d=0x000 i=0 o=0 (-1)
--5358:1:aspacem 28: RSVN FFFFFFFFFFE00000-FFFFFFFFFFFFFFFF 2097152 ---- SmFixed
--5358:1:aspacem >>>
--5358:1:main
--5358:1:main
--5358:1:main Running thread 1
--5358:1:syswrap- entering VG_(main_thread_wrapper_NORETURN)
--5358:1:syswrap- run_a_thread_NORETURN(tid=1): ML_(thread_wrapper) called
--5358:1:core_os ML_(thread_wrapper)(tid=1): entry
--5358:1:transtab allocate sector 0
SYSCALL[5358,1]( 12) sys_brk ( 0x0 ) --> [pre-success] Success(0x50B000)
SYSCALL[5358,1]( 9) sys_mmap2 ( 0x0, 4096, 3, 34, -1, 0 )
--5358:0:aspacem Valgrind: FATAL: find_map_space
--5358:0:aspacem Exiting now.
The file mappings at 0x40000000 are ld.so because that is what I have
set map_base to in load_client.
Tom
--
Tom Hughes (to...@co...)
http://www.compton.nu/
|
|
From: Julian S. <js...@ac...> - 2005-09-12 10:39:28
|
> Reserving the bottom 64M doesn't work on amd64 though as, at least on > my box, the default load address for an executable is 0x400000 which is > only 4M. > > I has to reduce spacem_minAddr to 0x400000 to make it work on amd64. Ok, interesting. What do you get from ./none/none -d -d --trace-signals=yes --trace-syscalls=yes date ? J |
|
From: <sv...@va...> - 2005-09-12 10:20:05
|
Author: tom Date: 2005-09-12 11:20:02 +0100 (Mon, 12 Sep 2005) New Revision: 4625 Log: Another go at trying to find a way for the tools to link in the core libraries properly... Modified: branches/ASPACEM/Makefile.tool.am Modified: branches/ASPACEM/Makefile.tool.am =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- branches/ASPACEM/Makefile.tool.am 2005-09-12 10:14:16 UTC (rev 4624) +++ branches/ASPACEM/Makefile.tool.am 2005-09-12 10:20:02 UTC (rev 4625) @@ -23,10 +23,10 @@ =20 ## Nb: do not call this variables "TOOL_LINKADD" and "TOOL_LDFLAGS" -- t= hat ## makes automake think we are building something called "TOOLS". -TOOL_LINKADD =3D -Wl,-whole-archive $(COREGRIND_LIBS) -Wl,-no-whole-arch= ive -lgcc +TOOL_LINKADD =3D $(COREGRIND_LIBS) -lgcc TOOL_LINKFLAGS =3D \ -static \ -Wl,-defsym,valt_load_address=3D@VALT_LOAD_ADDRESS@ \ -Wl,-T,$(top_srcdir)/valt_load_address.lds \ - -nodefaultlibs -nostartfiles + -nodefaultlibs -nostartfiles -u _start =20 |
|
From: <sv...@va...> - 2005-09-12 10:14:20
|
Author: sewardj
Date: 2005-09-12 11:14:16 +0100 (Mon, 12 Sep 2005)
New Revision: 4624
Log:
Set up a client data (brk) segment and partially restore brk support
in syswrap-generic.c:do_brk().
Modified:
branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
branches/ASPACEM/coregrind/m_main.c
branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c
Modified: branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-12 09:39:3=
7 UTC (rev 4623)
+++ branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-12 10:14:1=
6 UTC (rev 4624)
@@ -63,8 +63,8 @@
Addr VG_(clstk_end);
UWord VG_(clstk_id);
=20
-Addr VG_(brk_base); /* start of brk */
-Addr VG_(brk_limit); /* current brk */
+Addr VG_(brk_base) =3D 0; /* start of brk */
+Addr VG_(brk_limit) =3D 0; /* current brk */
=20
Addr VG_(shadow_base); /* tool's shadow memory */
Addr VG_(shadow_end);
Modified: branches/ASPACEM/coregrind/m_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_main.c 2005-09-12 09:39:37 UTC (rev 4623=
)
+++ branches/ASPACEM/coregrind/m_main.c 2005-09-12 10:14:16 UTC (rev 4624=
)
@@ -760,6 +760,37 @@
return client_SP;
}
=20
+
+/* Allocate the client data segment. It is an expandable anonymous
+ mapping abutting a shrinkable reservation of size max_dseg_size.
+ The data segment starts at VG_(brk_base), which is page-aligned,
+ and runs up to VG_(brk_limit), which isn't. */
+static void setup_client_dataseg ( SizeT max_size )
+{
+ Bool ok;
+ SysRes sres;
+ SizeT anon_size =3D VKI_PAGE_SIZE;
+ SizeT resvn_size =3D max_size - anon_size;
+ Addr anon_start =3D VG_(brk_base);
+ Addr resvn_start =3D anon_start + anon_size;
+
+ vg_assert(VG_IS_PAGE_ALIGNED(anon_size));
+ vg_assert(VG_IS_PAGE_ALIGNED(resvn_size));
+ vg_assert(VG_IS_PAGE_ALIGNED(anon_start));
+ vg_assert(VG_IS_PAGE_ALIGNED(resvn_start));
+
+ ok =3D VG_(create_reservation)( resvn_start, resvn_size, SmLower, ano=
n_size );
+ vg_assert(ok);
+ sres =3D VG_(mmap_anon_fixed_client)(=20
+ (void*)anon_start, anon_size,=20
+ VKI_PROT_READ|VKI_PROT_WRITE|VKI_PROT_EXEC=20
+ );
+ vg_assert(!sres.isError);
+ vg_assert(sres.val =3D=3D anon_start);
+}
+
+
+
/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D*/
/*=3D=3D=3D Find executable =
=3D=3D=3D*/
/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D*/
@@ -873,7 +904,7 @@
=20
/* Copy necessary bits of 'info' that were filled in */
*client_eip =3D info->init_eip;
- VG_(brk_base) =3D VG_(brk_limit) =3D info->brkbase;
+ VG_(brk_base) =3D VG_(brk_limit) =3D VG_PGROUNDUP(info->brkbase);
}
=20
=20
@@ -2266,13 +2297,14 @@
// p: fix_environment() [for 'env']
//--------------------------------------------------------------
VG_(debugLog)(1, "main", "Setup client stack\n");
- { void* init_sp =3D argv - 1;
-
- SizeT one_meg =3D 1024 * 1024;
- SizeT eight_megs =3D 8 * one_meg;
+ {=20
+ void* init_sp =3D argv - 1;
+ SizeT m1 =3D 1024 * 1024;
+ SizeT m8 =3D 8 * m1;
SizeT stack_max_size =3D (SizeT)VG_(client_rlimit_stack).rlim_cur;
- if (stack_max_size < one_meg) stack_max_size =3D one_meg;
- if (stack_max_size > eight_megs) stack_max_size =3D eight_megs;
+ if (stack_max_size < m1) stack_max_size =3D m1;
+ if (stack_max_size > m8) stack_max_size =3D m8;
+ stack_max_size =3D VG_PGROUNDUP(stack_max_size);
=20
initial_client_SP
=3D setup_client_stack( init_sp, cl_argv, env, &info,
@@ -2288,6 +2320,23 @@
(void*)initial_client_SP, vg_argc,=20
(void*)VG_(brk_base) );
=20
+ //--------------------------------------------------------------
+ // Setup client data (brk) segment. Initially a 1-page segment
+ // which abuts a shrinkable reservation.=20
+ // p: load_client() [for 'info' and hence VG_(brk_base)]
+ //setup_client_dataseg();
+ VG_(debugLog)(1, "main", "Setup client data (brk) segment\n");
+ {=20
+ SizeT m1 =3D 1024 * 1024;
+ SizeT m8 =3D 8 * m1;
+ SizeT dseg_max_size =3D (SizeT)VG_(client_rlimit_data).rlim_cur;
+ if (dseg_max_size < m1) dseg_max_size =3D m1;
+ if (dseg_max_size > m8) dseg_max_size =3D m8;
+ dseg_max_size =3D VG_PGROUNDUP(dseg_max_size);
+
+ setup_client_dataseg( dseg_max_size );
+ }
+
//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
// Finished setting up operating environment. Now initialise
// Valgrind. (This is where the old VG_(main)() started.)
Modified: branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c 2005-09-12 09:=
39:37 UTC (rev 4623)
+++ branches/ASPACEM/coregrind/m_syswrap/syswrap-generic.c 2005-09-12 10:=
14:16 UTC (rev 4624)
@@ -783,7 +783,23 @@
Data seg end, for brk()
------------------------------------------------------------------ */
=20
-static Addr do_brk(Addr newbrk)
+/* +--------+------------+
+ | anon | resvn |
+ +--------+------------+
+
+ ^ ^ ^
+ | | boundary is page aligned
+ | VG_(brk_limit) -- no alignment constraint
+ VG_(brk_base) -- page aligned -- does not move
+
+ Both the anon part and the reservation part are always at least
+ one page. =20
+*/
+
+/* Set the new data segment end to NEWBRK. If this succeeds, return
+ NEWBRK, else return the current data segment end. */
+
+static Addr do_brk ( Addr newbrk )
{
Addr ret =3D VG_(brk_limit);
static const Bool debug =3D False;
@@ -799,9 +815,12 @@
if (0) show_segments("in_brk");
# endif
=20
- if (newbrk < VG_(brk_base) || newbrk >=3D VG_(client_end))
+ if (newbrk < VG_(brk_base))
+ /* Clearly impossible. */
return VG_(brk_limit);
=20
+vg_assert(0);
+
/* brk isn't allowed to grow over anything else */
seg =3D VG_(find_segment)(VG_(brk_limit) -1);
=20
|
|
From: Julian S. <js...@ac...> - 2005-09-12 10:11:44
|
Arrgh .. > What does seem to work for me is going back to the old code (and in > fact getting rid of the second duplicate library) and then adding to > the LDFLAGS a "-u _start" option to tell the linker that _start is > needed which then causes a chain reaction of pulling in required code > from the libraries. Ok. Can you commit that then? I think Nick plans to revamp this anyway, so that we would once again have libcoregrind.a constructed in coregrind and the tools would just link libcoregrind.a and libvex.a. J |
|
From: Tom H. <to...@co...> - 2005-09-12 10:00:31
|
In message <200...@ja...>
sv...@va... wrote:
> Modified: branches/ASPACEM/Makefile.tool.am
> ===================================================================
> --- branches/ASPACEM/Makefile.tool.am 2005-09-11 00:48:18 UTC (rev 4616)
> +++ branches/ASPACEM/Makefile.tool.am 2005-09-11 10:06:07 UTC (rev 4617)
> @@ -23,7 +23,7 @@
>
> ## Nb: do not call this variables "TOOL_LINKADD" and "TOOL_LDFLAGS" -- that
> ## makes automake think we are building something called "TOOLS".
> -TOOL_LINKADD = $(COREGRIND_LIBS) $(COREGRIND_LIBS) -lgcc
> +TOOL_LINKADD = -Wl,-whole-archive $(COREGRIND_LIBS) -Wl,-no-whole-archive -lgcc
> TOOL_LINKFLAGS = \
> -static \
> -Wl,-defsym,valt_load_address=@VALT_LOAD_ADDRESS@ \
Unfortunately this doesn't work on my machine:
running: automake -a
cachegrind/Makefile.am:16: linker flags such as `-Wl,-whole-archive' belong in `cachegrind_LDFLAGS
lackey/Makefile.am:7: linker flags such as `-Wl,-whole-archive' belong in `lackey_LDFLAGS
massif/Makefile.am:17: linker flags such as `-Wl,-whole-archive' belong in `massif_LDFLAGS
memcheck/Makefile.am:23: linker flags such as `-Wl,-whole-archive' belong in `memcheck_LDFLAGS
none/Makefile.am:7: linker flags such as `-Wl,-whole-archive' belong in `none_LDFLAGS
error: while running 'automake -a'
Of course you can't actually move those flags to LDFLAGS as you can't
then turn them off again.
What does seem to work for me is going back to the old code (and in
fact getting rid of the second duplicate library) and then adding to
the LDFLAGS a "-u _start" option to tell the linker that _start is
needed which then causes a chain reaction of pulling in required code
from the libraries.
Tom
--
Tom Hughes (to...@co...)
http://www.compton.nu/
|
|
From: Tom H. <to...@co...> - 2005-09-12 09:51:00
|
In message <200...@ac...>
Julian Seward <js...@ac...> wrote:
> You can see for example that there's a reservation for 0xC0000000-0xFFFFFFFF
> since that's unavailable to us. The reservation (7,9) is interrupted
> by the sysinfo page (8). Similarly I (somewhat arbitrarily) placed a
> reservation in the lowest 64M since I didn't think allocating down there
> was a good idea.
Reserving the bottom 64M doesn't work on amd64 though as, at least on
my box, the default load address for an executable is 0x400000 which is
only 4M.
I has to reduce spacem_minAddr to 0x400000 to make it work on amd64.
Tom
--
Tom Hughes (to...@co...)
http://www.compton.nu/
|
|
From: <sv...@va...> - 2005-09-12 09:39:43
|
Author: tom
Date: 2005-09-12 10:39:37 +0100 (Mon, 12 Sep 2005)
New Revision: 4623
Log:
Fix the amd64 startup code and remove a redundant instruction from
the x86 startup code.
Modified:
branches/ASPACEM/coregrind/m_main.c
Modified: branches/ASPACEM/coregrind/m_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_main.c 2005-09-12 02:40:24 UTC (rev 4622=
)
+++ branches/ASPACEM/coregrind/m_main.c 2005-09-12 09:39:37 UTC (rev 4623=
)
@@ -2760,7 +2760,6 @@
"\t.globl _start\n"
"\t.type _start,@function\n"
"_start:\n"
- "\tmovl %esp,%eax\n"
/* set up the new stack in %eax */
"\tmovl $vgPlain_the_root_stack, %eax\n"
"\taddl $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %eax\n"
@@ -2779,8 +2778,14 @@
"\t.globl _start\n"
"\t.type _start,@function\n"
"_start:\n"
- "\tmovq %rsp,%rdi\n" /* Pass pointer to argc to _start_in_C */
- "\tandq $~15,%rsp\n" /* Make sure stack is 16 byte aligned */
+ /* set up the new stack in %rdi */
+ "\tmovq $vgPlain_the_root_stack, %rdi\n"
+ "\taddq $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %rdi\n"
+ "\taddq $"VG_STRINGIFY(VG_STACK_ACTIVE_SZB)", %rdi\n"
+ "\tandq $~15, %rdi\n"
+ /* install it, and collect the original one */
+ "\txchgq %rdi, %rsp\n"
+ /* call _start_in_C, passing it the startup %rsp */
"\tcall _start_in_C\n"
"\thlt\n"
);
|
|
From: Tom H. <th...@cy...> - 2005-09-12 03:25:31
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2005-09-12 03:00:03 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 165 tests, 8 stderr failures, 2 stdout failures ================= memcheck/tests/sigprocmask (stderr) memcheck/tests/strchr (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_fcntl (stderr) none/tests/ppc32/lsw (stdout) none/tests/ppc32/lsw (stderr) none/tests/tls (stdout) |
|
From: <js...@ac...> - 2005-09-12 02:57:18
|
Nightly build on phoenix ( SuSE 9.1 ) started at 2005-09-12 03:30:00 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 186 tests, 3 stderr failures, 1 stdout failure ================= none/tests/faultstatus (stderr) none/tests/ppc32/lsw (stdout) none/tests/ppc32/lsw (stderr) none/tests/x86/int (stderr) |
|
From: <js...@ac...> - 2005-09-12 02:44:51
|
Nightly build on g5 ( YDL 4.0, ppc970 ) started at 2005-09-12 04:40:00 CEST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 159 tests, 18 stderr failures, 1 stdout failure ================= memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/fprw (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp_unknown (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/xml1 (stderr) cachegrind/tests/chdir (stderr) cachegrind/tests/dlclose (stdout) cachegrind/tests/dlclose (stderr) none/tests/faultstatus (stderr) none/tests/fdleak_cmsg (stderr) none/tests/fdleak_ipv4 (stderr) |
|
From: Tom H. <to...@co...> - 2005-09-12 02:41:11
|
Nightly build on dunsmere ( athlon, Fedora Core 4 ) started at 2005-09-12 03:30:05 BST Results unchanged from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 188 tests, 6 stderr failures, 1 stdout failure ================= memcheck/tests/leak-tree (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/xml1 (stderr) none/tests/faultstatus (stderr) none/tests/ppc32/lsw (stdout) none/tests/ppc32/lsw (stderr) none/tests/x86/int (stderr) |
|
From: <sv...@va...> - 2005-09-12 02:40:30
|
Author: sewardj
Date: 2005-09-12 03:40:24 +0100 (Mon, 12 Sep 2005)
New Revision: 4622
Log:
Use shrinkable reservation infrastructure to reimplement
segfault-based stack growth.
Modified:
branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
branches/ASPACEM/coregrind/m_main.c
branches/ASPACEM/coregrind/m_signals.c
branches/ASPACEM/coregrind/m_transtab.c
branches/ASPACEM/coregrind/pub_core_aspacemgr.h
Modified: branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-12 00:56:1=
4 UTC (rev 4621)
+++ branches/ASPACEM/coregrind/m_aspacemgr/aspacemgr.c 2005-09-12 02:40:2=
4 UTC (rev 4622)
@@ -1489,7 +1489,7 @@
Int i;
if (seg < &nsegments[0] || seg >=3D &nsegments[nsegments_used])
return -1;
- i =3D (seg - &nsegments[0]) / sizeof(NSegment);
+ i =3D ((UChar*)seg - (UChar*)(&nsegments[0])) / sizeof(NSegment);
if (i < 0 || i >=3D nsegments_used)
return -1;
if (seg =3D=3D &nsegments[i])
@@ -1497,7 +1497,31 @@
return -1;
}
=20
+/* Find the next segment along from HERE, if it is a file/anon/resvn
+ segment. */
+NSegment* VG_(next_nsegment) ( NSegment* here, Bool fwds )
+{
+ Int i =3D segAddr_to_index(here);
+ if (i < 0 || i >=3D nsegments_used)
+ return NULL;
+ if (fwds) {
+ i++;
+ if (i >=3D nsegments_used)
+ return NULL;
+ } else {
+ i--;
+ if (i < 0)
+ return NULL;
+ }
+ if (nsegments[i].kind =3D=3D SkFile=20
+ || nsegments[i].kind =3D=3D SkAnon
+ || nsegments[i].kind =3D=3D SkResvn)
+ return &nsegments[i];
+ else=20
+ return NULL;
+}
=20
+
ULong VG_(aspacem_get_anonsize_total)( void )
{
Int i;
@@ -2343,9 +2367,9 @@
if (extra > 0) end2 +=3D extra;
=20
aspacem_assert(VG_IS_PAGE_ALIGNED(start));
- aspacem_assert(VG_IS_PAGE_ALIGNED(start+length-1));
+ aspacem_assert(VG_IS_PAGE_ALIGNED(start+length));
aspacem_assert(VG_IS_PAGE_ALIGNED(start2));
- aspacem_assert(VG_IS_PAGE_ALIGNED(end2));
+ aspacem_assert(VG_IS_PAGE_ALIGNED(end2+1));
=20
startI =3D find_nsegment_idx( start2 );
endI =3D find_nsegment_idx( end2 );
Modified: branches/ASPACEM/coregrind/m_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_main.c 2005-09-12 00:56:14 UTC (rev 4621=
)
+++ branches/ASPACEM/coregrind/m_main.c 2005-09-12 02:40:24 UTC (rev 4622=
)
@@ -484,11 +484,13 @@
space manager. A modified version of our auxv is copied into the
new stack. The returned value is the SP value for the client. */
static=20
-Addr setup_client_stack( void* init_sp,
- char **orig_argv, char **orig_envp,=20
+Addr setup_client_stack( void* init_sp,
+ char** orig_argv,=20
+ char** orig_envp,=20
const struct exeinfo *info,
UInt** client_auxv,
- Addr clstack_end )
+ Addr clstack_end,
+ SizeT clstack_max_size )
{
SysRes res;
char **cpp;
@@ -576,23 +578,51 @@
=20
clstack_start =3D VG_PGROUNDDN(client_SP);
=20
+ /* The max stack size */
+ clstack_max_size =3D VG_PGROUNDUP(clstack_max_size);
+
if (0)
- VG_(printf)("stringsize=3D%d auxsize=3D%d stacksize=3D%d\n"
+ VG_(printf)("stringsize=3D%d auxsize=3D%d stacksize=3D%d maxsize=3D=
0x%x\n"
"clstack_start %p\n"
"clstack_end %p\n",
- stringsize, auxsize, stacksize,
+ stringsize, auxsize, stacksize, (Int)clstack_max_size,
(void*)clstack_start, (void*)clstack_end);
=20
/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D alloc=
ate space =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
=20
- /* allocate a stack - mmap enough space for the stack */
- res =3D VG_(mmap_anon_fixed_client)(
- (void *)clstack_start -40960,
- clstack_end - clstack_start + 1 +40960,
- VKI_PROT_READ|VKI_PROT_WRITE|VKI_PROT_EXEC
- );
- vg_assert(!res.isError);=20
+ { SizeT anon_size =3D clstack_end - clstack_start + 1;
+ SizeT resvn_size =3D clstack_max_size - anon_size;
+ Addr anon_start =3D clstack_start;
+ Addr resvn_start =3D anon_start - resvn_size;
=20
+ vg_assert(VG_IS_PAGE_ALIGNED(anon_size));
+ vg_assert(VG_IS_PAGE_ALIGNED(resvn_size));
+ vg_assert(VG_IS_PAGE_ALIGNED(anon_start));
+ vg_assert(VG_IS_PAGE_ALIGNED(resvn_start));
+ vg_assert(resvn_start =3D clstack_end + 1 - clstack_max_size);
+
+ if (0)
+ VG_(printf)("%p 0x%x %p 0x%x\n",=20
+ resvn_start, resvn_size, anon_start, anon_size);
+
+ /* Create a shrinkable reservation followed by an anonymous
+ segment. Together these constitute a growdown stack. */
+ Bool ok =3D VG_(create_reservation)(
+ resvn_start,
+ resvn_size,
+ SmUpper,=20
+ anon_size
+ );
+ vg_assert(ok);
+ /* allocate a stack - mmap enough space for the stack */
+ res =3D VG_(mmap_anon_fixed_client)(
+ (void*)anon_start,
+ anon_size,
+ VKI_PROT_READ|VKI_PROT_WRITE|VKI_PROT_EXEC
+ );
+ vg_assert(!res.isError);=20
+ }
+
/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D copy =
client stack =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
*/
=20
ptr =3D (Addr*)client_SP;
@@ -820,6 +850,7 @@
}
}
=20
+ VG_(memset)(info, 0, sizeof(*info));
info->map_base =3D VG_(client_mapbase);
info->exe_base =3D VG_(client_base);
info->exe_end =3D VG_(client_end);
@@ -827,8 +858,6 @@
=20
if (need_help) {
VG_(clexecfd) =3D -1;
- // Totally zero 'info' before continuing.
- VG_(memset)(info, 0, sizeof(*info));
} else {
Int ret;
/* HACK: assumes VG_(open) always succeeds */
@@ -2239,9 +2268,16 @@
VG_(debugLog)(1, "main", "Setup client stack\n");
{ void* init_sp =3D argv - 1;
=20
+ SizeT one_meg =3D 1024 * 1024;
+ SizeT eight_megs =3D 8 * one_meg;
+ SizeT stack_max_size =3D (SizeT)VG_(client_rlimit_stack).rlim_cur;
+ if (stack_max_size < one_meg) stack_max_size =3D one_meg;
+ if (stack_max_size > eight_megs) stack_max_size =3D eight_megs;
+
initial_client_SP
- =3D setup_client_stack(init_sp, cl_argv, env, &info,
- &client_auxv,clstack_top);
+ =3D setup_client_stack( init_sp, cl_argv, env, &info,
+ &client_auxv, clstack_top, stack_max_size=
);
+
VG_(free)(env);
}
=20
Modified: branches/ASPACEM/coregrind/m_signals.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_signals.c 2005-09-12 00:56:14 UTC (rev 4=
621)
+++ branches/ASPACEM/coregrind/m_signals.c 2005-09-12 02:40:24 UTC (rev 4=
622)
@@ -80,6 +80,7 @@
*/
=20
#include "pub_core_basics.h"
+#include "pub_core_debuglog.h"
#include "pub_core_threadstate.h"
#include "pub_core_debuginfo.h" // Needed for pub_core_aspacemgr :(
#include "pub_core_aspacemgr.h"
@@ -1701,66 +1702,43 @@
*/
Bool VG_(extend_stack)(Addr addr, UInt maxsize)
{
- Segment *seg;
- Addr base;
- UInt newsize;
+ SizeT udelta;
=20
/* Find the next Segment above addr */
- seg =3D VG_(find_segment)(addr);
- if (seg)
+ NSegment* seg =3D VG_(find_nsegment)(addr);
+ NSegment* seg_next =3D seg ? VG_(next_nsegment)( seg, True/*fwds*/ ) =
: NULL;
+
+ if (seg && seg->kind =3D=3D SkAnon)
+ /* addr is already mapped. Nothing to do. */
return True;
=20
- /* now we know addr is definitely unmapped */
- seg =3D VG_(find_segment_above_unmapped)(addr);
-
- /* If there isn't one, or it isn't growable, fail */
- if (seg =3D=3D NULL ||=20
- !(seg->flags & SF_GROWDOWN) ||
- VG_(seg_contains)(seg, addr, sizeof(void *)))
+ /* Check that the requested new base is in a shrink-down
+ reservation section which abuts an anonymous mapping that
+ belongs to the client. */
+ if ( ! (seg
+ && seg->kind =3D=3D SkResvn
+ && seg->smode =3D=3D SmUpper
+ && seg_next
+ && seg_next->kind =3D=3D SkAnon
+ && seg_next->isClient
+ && seg->end+1 =3D=3D seg_next->start))
return False;
- =20
- vg_assert(seg->addr > addr);
=20
- /* Create the mapping */
- base =3D VG_PGROUNDDN(addr);
- newsize =3D seg->addr - base;
-
- if (seg->len + newsize >=3D maxsize)
+ udelta =3D VG_PGROUNDUP(seg_next->start - addr);
+ VG_(debugLog)(1, "signals",=20
+ "extending a stack base 0x%llx down by %lld ..\n",
+ (ULong)seg_next->start, (ULong)udelta);
+ if (! VG_(extend_into_adjacent_reservation)( seg_next, -(SSizeT)udelt=
a )) {
+ VG_(debugLog)(1, "signals", " .. failure\n");
return False;
+ }
=20
- /* Nasty Hack. The new segment will have SF_MMAP set because
- that's what VG_(mmap) does. But the existing stack segment
- won't necessarily have it set, because the initial segment list
- entry for the main thread's stack doesn't have it set. That
- means that the segment list preener won't merge the segments
- together (because they have different flags). That means the
- segment list will in fact list two adjacent segments for the
- main stack, which is wrong. This means that the tests which
- check if a translation is from a stack-like area and therefore
- in need of a self-check will not work right. Sigh.
+ VG_(debugLog)(1, "signals", " .. success\n");
=20
- So .. in lieu of fixing this properly (viz, rationalising all
- the SF_ flags), just mark the original stack segment as having
- SF_MMAP. Then the preener will merge it into the new area.
- This is a hack. */
- seg->flags |=3D SF_MMAP;
- /* end of Nasty Hack */
-
- if (VG_(mmap)((Char *)base, newsize,
- seg->prot,
- VKI_MAP_PRIVATE | VKI_MAP_FIXED | VKI_MAP_ANONYMOUS | VKI_MAP_CLIENT,
- seg->flags,
- -1, 0) =3D=3D (void *)-1)
- return False;
-
/* When we change the main stack, we have to let the stack handling
code know about it. */
- VG_(change_stack)(VG_(clstk_id), base, VG_(clstk_end));
+ /// FIXME VG_(change_stack)(VG_(clstk_id), base, VG_(clstk_end));
=20
- if (0)
- VG_(printf)("extended stack: %p %d\n",
- base, newsize);
-
if (VG_(clo_sanity_level) > 2)
VG_(sanity_check_general)(False);
=20
@@ -1855,7 +1833,8 @@
}=20
=20
if (VG_(clo_trace_signals)) {
- VG_(message)(Vg_DebugMsg, "signal %d arrived ... si_code=3D%d, EIP=
=3D%p, eip=3D%p",
+ VG_(message)(Vg_DebugMsg, "signal %d arrived ... si_code=3D%d, "
+ "EIP=3D%p, eip=3D%p",
sigNo, info->si_code, VG_(get_IP)(tid),=20
VG_UCONTEXT_INSTR_PTR(uc) );
}
@@ -1867,27 +1846,32 @@
if (info->si_signo =3D=3D VKI_SIGSEGV) {
Addr fault =3D (Addr)info->_sifields._sigfault._addr;
Addr esp =3D VG_(get_SP)(tid);
- Segment* seg;
+ NSegment* seg =3D VG_(find_nsegment)(fault);
+ NSegment* seg_next =3D seg ? VG_(next_nsegment)( seg, True/*fwds*/=
) : NULL;
=20
- seg =3D VG_(find_segment)(fault);
- if (seg =3D=3D NULL)
- seg =3D VG_(find_segment_above_unmapped)(fault);
-
if (VG_(clo_trace_signals)) {
if (seg =3D=3D NULL)
VG_(message)(Vg_DebugMsg,
- "SIGSEGV: si_code=3D%d faultaddr=3D%p tid=3D%d ESP=3D%p seg=3DNULL s=
had=3D%p-%p",
+ "SIGSEGV: si_code=3D%d faultaddr=3D%p tid=3D%d ESP=3D%p "
+ "seg=3DNULL shad=3D%p-%p",
info->si_code, fault, tid, esp,
VG_(shadow_base), VG_(shadow_end));
else
VG_(message)(Vg_DebugMsg,
- "SIGSEGV: si_code=3D%d faultaddr=3D%p tid=3D%d ESP=3D%p seg=3D%p-%p =
fl=3D%x shad=3D%p-%p",
- info->si_code, fault, tid, esp, seg->addr, seg->addr+seg->len, seg->=
flags,
- VG_(shadow_base), VG_(shadow_end));
+ "SIGSEGV: si_code=3D%d faultaddr=3D%p tid=3D%d ESP=3D%p "
+ "seg=3D%p-%p shad=3D%p-%p",
+ info->si_code, fault, tid, esp, seg->start, seg->end,=20
+ VG_(shadow_base), VG_(shadow_end));
}
if (info->si_code =3D=3D 1 /* SEGV_MAPERR */
- && fault >=3D (esp - VG_STACK_REDZONE_SZB)
- && fault < VG_(client_end)) {
+ && seg
+ && seg->kind =3D=3D SkResvn
+ && seg->smode =3D=3D SmUpper
+ && seg_next
+ && seg_next->kind =3D=3D SkAnon
+ && seg_next->isClient
+ && seg->end+1 =3D=3D seg_next->start
+ && fault >=3D (esp - VG_STACK_REDZONE_SZB)) {
/* If the fault address is above esp but below the current known
stack segment base, and it was a fault because there was
nothing mapped there (as opposed to a permissions fault),
@@ -1897,10 +1881,12 @@
if (VG_(extend_stack)(base, VG_(threads)[tid].client_stack_szB)) {
if (VG_(clo_trace_signals))
VG_(message)(Vg_DebugMsg,=20
- " -> extended stack base to %p", VG_PGROUNDDN(fault));
- return; // extension succeeded, restart instruction
+ " -> extended stack base to %p",=20
+ VG_PGROUNDDN(fault));
+ return; // extension succeeded, restart instruction
} else
- VG_(message)(Vg_UserMsg, "Stack overflow in thread %d: can't grow s=
tack to %p",=20
+ VG_(message)(Vg_UserMsg,=20
+ "Stack overflow in thread %d: can't grow stack =
to %p",=20
tid, fault);
}
/* Fall into normal signal handling for all other cases */
Modified: branches/ASPACEM/coregrind/m_transtab.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/m_transtab.c 2005-09-12 00:56:14 UTC (rev =
4621)
+++ branches/ASPACEM/coregrind/m_transtab.c 2005-09-12 02:40:24 UTC (rev =
4622)
@@ -312,7 +312,7 @@
8 * tc_sector_szQ );
/*NOTREACHED*/
}
- sectors[sno].tc =3D sres.val;
+ sectors[sno].tc =3D (ULong*)sres.val;
=20
sres =3D VG_(map_anon_float_valgrind)( N_TTES_PER_SECTOR * sizeof(=
TTEntry) );
if (sres.isError) {
@@ -320,7 +320,7 @@
N_TTES_PER_SECTOR * sizeof(TTEntry)=
);
/*NOTREACHED*/
}
- sectors[sno].tt =3D sres.val;
+ sectors[sno].tt =3D (TTEntry*)sres.val;
=20
if (VG_(clo_verbosity) > 2)
VG_(message)(Vg_DebugMsg, "TT/TC: initialise sector %d", sno);
Modified: branches/ASPACEM/coregrind/pub_core_aspacemgr.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- branches/ASPACEM/coregrind/pub_core_aspacemgr.h 2005-09-12 00:56:14 U=
TC (rev 4621)
+++ branches/ASPACEM/coregrind/pub_core_aspacemgr.h 2005-09-12 02:40:24 U=
TC (rev 4622)
@@ -269,7 +269,12 @@
=20
extern SysRes VG_(munmap_client)( Addr base, SizeT length );
=20
+/* Finds the segment containing 'a'. Only returns file/anon/resvn
+ segments. */
extern NSegment* VG_(find_nsegment) ( Addr a );
+
+/* Find the next segment along from HERE, if it is a file/anon/resvn
+ segment. */
extern NSegment* VG_(next_nsegment) ( NSegment* here, Bool fwds );
=20
/* Create a reservation from START .. START+LENGTH-1, with the given
|
|
From: Tom H. <th...@cy...> - 2005-09-12 02:28:31
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-09-12 03:15:04 BST Results differ from 24 hours ago Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 187 tests, 15 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/stack_changes (stderr) none/tests/faultstatus (stderr) none/tests/ppc32/lsw (stdout) none/tests/ppc32/lsw (stderr) none/tests/x86/int (stderr) ================================================= == Results from 24 hours ago == ================================================= Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 187 tests, 15 stderr failures, 2 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/erringfds (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/partiallydefinedeq (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/sigkill (stderr) memcheck/tests/stack_changes (stderr) none/tests/faultstatus (stderr) none/tests/ppc32/lsw (stdout) none/tests/ppc32/lsw (stderr) none/tests/x86/int (stderr) none/tests/x86/yield (stdout) ================================================= == Difference between 24 hours ago and now == ================================================= *** old.short Mon Sep 12 03:22:03 2005 --- new.short Mon Sep 12 03:28:26 2005 *************** *** 8,10 **** ! == 187 tests, 15 stderr failures, 2 stdout failures ================= memcheck/tests/addressable (stderr) --- 8,10 ---- ! == 187 tests, 15 stderr failures, 1 stdout failure ================= memcheck/tests/addressable (stderr) *************** *** 25,27 **** none/tests/x86/int (stderr) - none/tests/x86/yield (stdout) --- 25,26 ---- |