You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
(36) |
2
(30) |
|
3
(17) |
4
(21) |
5
(18) |
6
(14) |
7
(23) |
8
(12) |
9
(11) |
|
10
(11) |
11
(12) |
12
(11) |
13
(12) |
14
(11) |
15
(11) |
16
(15) |
|
17
(12) |
18
(15) |
19
(15) |
20
(25) |
21
(26) |
22
(21) |
23
(18) |
|
24
(25) |
25
(28) |
26
(27) |
27
(32) |
28
(13) |
29
(12) |
30
(10) |
|
From: <sv...@va...> - 2005-04-23 23:41:52
|
Author: sewardj
Date: 2005-04-24 00:41:46 +0100 (Sun, 24 Apr 2005)
New Revision: 1138
Modified:
trunk/priv/host-amd64/isel.c
Log:
Handle some artefacts resulting from memchecking of x87 floating-point
code (I64-typed PutI/GetI).
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-04-23 01:15:47 UTC (rev 1137)
+++ trunk/priv/host-amd64/isel.c 2005-04-23 23:41:46 UTC (rev 1138)
@@ -1403,6 +1403,10 @@
addInstr(env, AMD64Instr_LoadEX( 1, False, am, dst ));
return dst;
}
+ if (ty =3D=3D Ity_I64) {
+ addInstr(env, AMD64Instr_Alu64R( Aalu_MOV, AMD64RMI_Mem(am), ds=
t ));
+ return dst;
+ }
break;
}
=20
@@ -3547,14 +3551,11 @@
addInstr(env, AMD64Instr_Store( 1, r, am ));
return;
}
-//.. if (ty =3D=3D Ity_I64) {
-//.. HReg rHi, rLo;
-//.. X86AMode* am4 =3D advance4(am);
-//.. iselInt64Expr(&rHi, &rLo, env, stmt->Ist.PutI.data);
-//.. addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(rLo), a=
m ));
-//.. addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(rHi), a=
m4 ));
-//.. return;
-//.. }
+ if (ty =3D=3D Ity_I64) {
+ AMD64RI* ri =3D iselIntExpr_RI(env, stmt->Ist.PutI.data);
+ addInstr(env, AMD64Instr_Alu64M( Aalu_MOV, ri, am ));
+ return;
+ }
break;
}
=20
|
|
From: <sv...@va...> - 2005-04-23 23:26:35
|
Author: sewardj
Date: 2005-04-24 00:26:29 +0100 (Sun, 24 Apr 2005)
New Revision: 3548
Modified:
trunk/memcheck/mc_translate.c
Log:
Add 64-bit values to the bogus-literal detector.
Modified: trunk/memcheck/mc_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_translate.c 2005-04-23 23:25:49 UTC (rev 3547)
+++ trunk/memcheck/mc_translate.c 2005-04-23 23:26:29 UTC (rev 3548)
@@ -2372,10 +2372,12 @@
default: ppIRExpr(at); tl_assert(0);
}
/* VG_(printf)("%llx\n", n); */
- return (n =3D=3D 0xFEFEFEFF
- || n =3D=3D 0x80808080 /*
- || n =3D=3D 0x01010101
- || n =3D=3D 0x01010100*/);
+ return (/*32*/ n =3D=3D 0xFEFEFEFFULL
+ /*32*/ || n =3D=3D 0x80808080ULL
+ /*64*/ || n =3D=3D 0xFEFEFEFEFEFEFEFFULL
+ /*64*/ || n =3D=3D 0x8080808080808080ULL
+ /*64*/ || n =3D=3D 0x0101010101010101ULL
+ );
}
=20
static Bool checkForBogusLiterals ( /*FLAT*/ IRStmt* st )
|
|
From: <sv...@va...> - 2005-04-23 23:25:54
|
Author: sewardj
Date: 2005-04-24 00:25:49 +0100 (Sun, 24 Apr 2005)
New Revision: 3547
Modified:
trunk/memcheck/mc_main.c
Log:
Add 64-bit fast case handlers for loads/stores. On amd64,
MC_(helperc_LOADV8) compiles down to just 12 instructions for the
fast-path, which is pretty darn good.
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-23 22:42:27 UTC (rev 3546)
+++ trunk/memcheck/mc_main.c 2005-04-23 23:25:49 UTC (rev 3547)
@@ -1179,17 +1179,92 @@
/* ------------------------ Size =3D 8 ------------------------ */
=20
VGA_REGPARM(1)
-ULong MC_(helperc_LOADV8) ( Addr a )
+ULong MC_(helperc_LOADV8) ( Addr aA )
{
- PROF_EVENT(70, "helperc_LOADV8");
- return mc_LOADVn_slow( a, 8, False/*littleendian*/ );
+ PROF_EVENT(200, "helperc_LOADV8");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ return mc_LOADVn_slow( aA, 8, False/*littleendian*/ );
+# else
+
+ const UWord mask =3D ~((0x10000-8) | ((N_PRIMARY_MAP-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, either 'a' is not
+ naturally aligned, or 'a' exceeds the range covered by the
+ primary map. Either way we defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(201, "helperc_LOADV8-slow1");
+ return (UWord)mc_LOADVn_slow( aA, 8, False/*littleendian*/ );
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAP);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D (UWord)(sm->abits[a_off]);
+
+ if (EXPECTED_TAKEN(abits =3D=3D VGM_BYTE_VALID)) {
+ /* Handle common case quickly: a is suitably aligned, is mapped,
+ and is addressible. */
+ return ((ULong*)(sm->vbyte))[ v_off >> 3 ];
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(202, "helperc_LOADV8-slow2");
+ return mc_LOADVn_slow( a, 8, False/*littleendian*/ );
+ }
+
+# endif
}
=20
VGA_REGPARM(1)
-void MC_(helperc_STOREV8) ( Addr a, ULong vbytes )
+void MC_(helperc_STOREV8) ( Addr aA, ULong vbytes )
{
- PROF_EVENT(71, "helperc_STOREV8");
- mc_STOREVn_slow( a, 8, vbytes, False/*littleendian*/ );
+ PROF_EVENT(210, "helperc_STOREV8");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ mc_STOREVn_slow( aA, 8, vbytes, False/*littleendian*/ );
+# else
+
+ const UWord mask =3D ~((0x10000-8) | ((N_PRIMARY_MAP-1) << 16));
+ UWord a =3D (UWord)aA;
+
+ /* If any part of 'a' indicated by the mask is 1, either 'a' is not
+ naturally aligned, or 'a' exceeds the range covered by the
+ primary map. Either way we defer to the slow-path case. */
+ if (EXPECTED_NOT_TAKEN(a & mask)) {
+ PROF_EVENT(211, "helperc_STOREV8-slow1");
+ mc_STOREVn_slow( aA, 8, vbytes, False/*littleendian*/ );
+ return;
+ }
+
+ UWord sec_no =3D (UWord)(a >> 16);
+
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAP);
+# endif
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+ UWord abits =3D (UWord)(sm->abits[a_off]);
+
+ if (EXPECTED_TAKEN(!is_distinguished_sm(sm)=20
+ && abits =3D=3D VGM_BYTE_VALID)) {
+ /* Handle common case quickly: a is suitably aligned, is mapped,
+ and is addressible. */
+ ((ULong*)(sm->vbyte))[ v_off >> 3 ] =3D vbytes;
+ } else {
+ /* Slow but general case. */
+ PROF_EVENT(212, "helperc_STOREV8-slow2");
+ mc_STOREVn_slow( aA, 8, vbytes, False/*littleendian*/ );
+ }
+# endif
}
=20
/* ------------------------ Size =3D 4 ------------------------ */
|
|
From: <sv...@va...> - 2005-04-23 22:42:33
|
Author: sewardj
Date: 2005-04-23 23:42:27 +0100 (Sat, 23 Apr 2005)
New Revision: 3546
Modified:
trunk/NOTES.txt
trunk/coregrind/amd64/core_arch.h
trunk/coregrind/x86/core_arch.h
trunk/include/amd64/tool_arch.h
trunk/include/x86/tool_arch.h
trunk/memcheck/mac_shared.h
Log:
Allow memcheck to take account of VGA_STACK_REDZONE_SIZE -- that is,
account for the fact that on amd64 (really, on amd64-linux) the area
up to 128 bytes below the stack pointer is accessible. This meant
moving the definitions of VGA_STACK_REDZONE_SIZE to tool-visible
places.
Modified: trunk/NOTES.txt
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/NOTES.txt 2005-04-23 22:38:38 UTC (rev 3545)
+++ trunk/NOTES.txt 2005-04-23 22:42:27 UTC (rev 3546)
@@ -1,4 +1,14 @@
=20
+23 Apr 05 (memcheck-on-amd64 notes)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+If a thread is given an initial stack with address range [lo .. hi],
+we need to tell memcheck that the area [lo - VGA_STACK_REDZONE_SIZE
+.. hi] is valid, rather than just [lo .. hi] as has been the case on
+x86-only systems. However, am not sure where to look for the=20
+call into memcheck that states the new stack area.
+
+
9 Apr 05 (starting work on memcheck for 32/64-bit and big/little endian)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* get rid of memcheck/mc_asm.h and include/tool_asm.h. I think=20
Modified: trunk/coregrind/amd64/core_arch.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/amd64/core_arch.h 2005-04-23 22:38:38 UTC (rev 3545)
+++ trunk/coregrind/amd64/core_arch.h 2005-04-23 22:42:27 UTC (rev 3546)
@@ -76,9 +76,6 @@
asm("movq %%rbp, %0" : "=3Dr" (lval)); \
} while (0)
=20
-// On AMD64, it's ok to access up to 128 bytes below %rsp.
-// The signal handler needs to know this.
-#define VGA_STACK_REDZONE_SIZE 128
=20
/* ---------------------------------------------------------------------
Architecture-specific part of a ThreadState
Modified: trunk/coregrind/x86/core_arch.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/coregrind/x86/core_arch.h 2005-04-23 22:38:38 UTC (rev 3545)
+++ trunk/coregrind/x86/core_arch.h 2005-04-23 22:42:27 UTC (rev 3546)
@@ -76,10 +76,6 @@
asm("movl %%ebp, %0" : "=3Dr" (ebp)); \
} while (0)
=20
-// On X86, any access below %esp is illegal.
-// The signal handler needs to know this.
-#define VGA_STACK_REDZONE_SIZE 0
-
//extern const Char VG_(helper_wrapper_before)[]; /* in dispatch.S */
//extern const Char VG_(helper_wrapper_return)[]; /* in dispatch.S */
=20
Modified: trunk/include/amd64/tool_arch.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/amd64/tool_arch.h 2005-04-23 22:38:38 UTC (rev 3545)
+++ trunk/include/amd64/tool_arch.h 2005-04-23 22:42:27 UTC (rev 3546)
@@ -30,15 +30,20 @@
#ifndef __AMD64_TOOL_ARCH_H
#define __AMD64_TOOL_ARCH_H
=20
-/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D*/
-/*=3D=3D=3D Registers, etc =
=3D=3D=3D*/
-/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D*/
=20
-#define VGA_REGPARM(n)
+#define VGA_REGPARM(n) /* */
=20
+
#define VGA_MIN_INSTR_SIZE 1
#define VGA_MAX_INSTR_SIZE 16
=20
+
+/* How many bytes below the stack pointer are validly addressible?
+ On amd64, the answer is: 128.
+*/
+#define VGA_STACK_REDZONE_SIZE 128
+
+
#endif // __AMD64_TOOL_ARCH_H
=20
/*--------------------------------------------------------------------*/
Modified: trunk/include/x86/tool_arch.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/include/x86/tool_arch.h 2005-04-23 22:38:38 UTC (rev 3545)
+++ trunk/include/x86/tool_arch.h 2005-04-23 22:42:27 UTC (rev 3546)
@@ -30,16 +30,20 @@
#ifndef __X86_TOOL_ARCH_H
#define __X86_TOOL_ARCH_H
=20
-/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D*/
-/*=3D=3D=3D Registers, etc =
=3D=3D=3D*/
-/*=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D*/
=20
#define VGA_REGPARM(n) __attribute__((regparm(n)))
=20
+
#define VGA_MIN_INSTR_SIZE 1
#define VGA_MAX_INSTR_SIZE 16
=20
=20
+/* How many bytes below the stack pointer are validly addressible?
+ On x86, the answer is: none.
+*/
+#define VGA_STACK_REDZONE_SIZE 0
+
+
#endif // __X86_TOOL_ARCH_H
=20
/*--------------------------------------------------------------------*/
Modified: trunk/memcheck/mac_shared.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mac_shared.h 2005-04-23 22:38:38 UTC (rev 3545)
+++ trunk/memcheck/mac_shared.h 2005-04-23 22:42:27 UTC (rev 3546)
@@ -437,163 +437,163 @@
factoring, rather than eg. using function pointers. =20
*/
=20
-#define SP_UPDATE_HANDLERS(ALIGNED4_NEW, ALIGNED4_DIE, \
- ALIGNED8_NEW, ALIGNED8_DIE, \
- UNALIGNED_NEW, UNALIGNED_DIE) \
- \
-void VGA_REGPARM(1) MAC_(new_mem_stack_4)(Addr new_SP) \
-{ \
- PROF_EVENT(110, "new_mem_stack_4"); \
- if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_NEW ( new_SP ); \
- } else { \
- UNALIGNED_NEW ( new_SP, 4 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(die_mem_stack_4)(Addr new_SP) \
-{ \
- PROF_EVENT(120, "die_mem_stack_4"); \
- if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_DIE ( new_SP-4 ); \
- } else { \
- UNALIGNED_DIE ( new_SP-4, 4 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(new_mem_stack_8)(Addr new_SP) \
-{ \
- PROF_EVENT(111, "new_mem_stack_8"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_NEW ( new_SP ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_NEW ( new_SP ); \
- ALIGNED4_NEW ( new_SP+4 ); \
- } else { \
- UNALIGNED_NEW ( new_SP, 8 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(die_mem_stack_8)(Addr new_SP) \
-{ \
- PROF_EVENT(121, "die_mem_stack_8"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_DIE ( new_SP-8 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_DIE ( new_SP-8 ); \
- ALIGNED4_DIE ( new_SP-4 ); \
- } else { \
- UNALIGNED_DIE ( new_SP-8, 8 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(new_mem_stack_12)(Addr new_SP) \
-{ \
- PROF_EVENT(112, "new_mem_stack_12"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_NEW ( new_SP ); \
- ALIGNED4_NEW ( new_SP+8 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_NEW ( new_SP ); \
- ALIGNED8_NEW ( new_SP+4 ); \
- } else { \
- UNALIGNED_NEW ( new_SP, 12 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(die_mem_stack_12)(Addr new_SP) \
-{ \
- PROF_EVENT(122, "die_mem_stack_12"); \
- /* Note the -12 in the test */ \
- if (VG_IS_8_ALIGNED(new_SP-12)) { \
- ALIGNED8_DIE ( new_SP-12 ); \
- ALIGNED4_DIE ( new_SP-4 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_DIE ( new_SP-12 ); \
- ALIGNED8_DIE ( new_SP-8 ); \
- } else { \
- UNALIGNED_DIE ( new_SP-12, 12 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(new_mem_stack_16)(Addr new_SP) \
-{ \
- PROF_EVENT(113, "new_mem_stack_16"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_NEW ( new_SP ); \
- ALIGNED8_NEW ( new_SP+8 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_NEW ( new_SP ); \
- ALIGNED8_NEW ( new_SP+4 ); \
- ALIGNED4_NEW ( new_SP+12 ); \
- } else { \
- UNALIGNED_NEW ( new_SP, 16 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(die_mem_stack_16)(Addr new_SP) \
-{ \
- PROF_EVENT(123, "die_mem_stack_16"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_DIE ( new_SP-16 ); \
- ALIGNED8_DIE ( new_SP-8 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_DIE ( new_SP-16 ); \
- ALIGNED8_DIE ( new_SP-12 ); \
- ALIGNED4_DIE ( new_SP-4 ); \
- } else { \
- UNALIGNED_DIE ( new_SP-16, 16 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(new_mem_stack_32)(Addr new_SP) \
-{ \
- PROF_EVENT(114, "new_mem_stack_32"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_NEW ( new_SP ); \
- ALIGNED8_NEW ( new_SP+8 ); \
- ALIGNED8_NEW ( new_SP+16 ); \
- ALIGNED8_NEW ( new_SP+24 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_NEW ( new_SP ); \
- ALIGNED8_NEW ( new_SP+4 ); \
- ALIGNED8_NEW ( new_SP+12 ); \
- ALIGNED8_NEW ( new_SP+20 ); \
- ALIGNED4_NEW ( new_SP+28 ); \
- } else { \
- UNALIGNED_NEW ( new_SP, 32 ); \
- } \
-} \
- \
-void VGA_REGPARM(1) MAC_(die_mem_stack_32)(Addr new_SP) \
-{ \
- PROF_EVENT(124, "die_mem_stack_32"); \
- if (VG_IS_8_ALIGNED(new_SP)) { \
- ALIGNED8_DIE ( new_SP-32 ); \
- ALIGNED8_DIE ( new_SP-24 ); \
- ALIGNED8_DIE ( new_SP-16 ); \
- ALIGNED8_DIE ( new_SP- 8 ); \
- } else if (VG_IS_4_ALIGNED(new_SP)) { \
- ALIGNED4_DIE ( new_SP-32 ); \
- ALIGNED8_DIE ( new_SP-28 ); \
- ALIGNED8_DIE ( new_SP-20 ); \
- ALIGNED8_DIE ( new_SP-12 ); \
- ALIGNED4_DIE ( new_SP-4 ); \
- } else { \
- UNALIGNED_DIE ( new_SP-32, 32 ); \
- } \
-} \
- \
-void MAC_(new_mem_stack) ( Addr a, SizeT len ) \
-{ \
- PROF_EVENT(115, "new_mem_stack"); \
- UNALIGNED_NEW ( a, len ); \
-} \
- \
-void MAC_(die_mem_stack) ( Addr a, SizeT len ) \
-{ \
- PROF_EVENT(125, "die_mem_stack"); \
- UNALIGNED_DIE ( a, len ); \
+#define SP_UPDATE_HANDLERS(ALIGNED4_NEW, ALIGNED4_DIE, \
+ ALIGNED8_NEW, ALIGNED8_DIE, \
+ UNALIGNED_NEW, UNALIGNED_DIE) \
+ \
+void VGA_REGPARM(1) MAC_(new_mem_stack_4)(Addr new_SP) \
+{ \
+ PROF_EVENT(110, "new_mem_stack_4"); \
+ if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ } else { \
+ UNALIGNED_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP, 4 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(die_mem_stack_4)(Addr new_SP) \
+{ \
+ PROF_EVENT(120, "die_mem_stack_4"); \
+ if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-4 ); \
+ } else { \
+ UNALIGNED_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-4, 4 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(new_mem_stack_8)(Addr new_SP) \
+{ \
+ PROF_EVENT(111, "new_mem_stack_8"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+4 ); \
+ } else { \
+ UNALIGNED_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP, 8 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(die_mem_stack_8)(Addr new_SP) \
+{ \
+ PROF_EVENT(121, "die_mem_stack_8"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-8 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-8 ); \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-4 ); \
+ } else { \
+ UNALIGNED_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-8, 8 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(new_mem_stack_12)(Addr new_SP) \
+{ \
+ PROF_EVENT(112, "new_mem_stack_12"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+8 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+4 ); \
+ } else { \
+ UNALIGNED_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP, 12 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(die_mem_stack_12)(Addr new_SP) \
+{ \
+ PROF_EVENT(122, "die_mem_stack_12"); \
+ /* Note the -12 in the test */ \
+ if (VG_IS_8_ALIGNED(new_SP-12)) { \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-12 ); \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-4 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-12 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-8 ); \
+ } else { \
+ UNALIGNED_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-12, 12 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(new_mem_stack_16)(Addr new_SP) \
+{ \
+ PROF_EVENT(113, "new_mem_stack_16"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+8 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+4 ); \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+12 ); \
+ } else { \
+ UNALIGNED_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP, 16 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(die_mem_stack_16)(Addr new_SP) \
+{ \
+ PROF_EVENT(123, "die_mem_stack_16"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-16 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-8 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-16 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-12 ); \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-4 ); \
+ } else { \
+ UNALIGNED_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-16, 16 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(new_mem_stack_32)(Addr new_SP) \
+{ \
+ PROF_EVENT(114, "new_mem_stack_32"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+8 ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+16 ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+24 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+4 ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+12 ); \
+ ALIGNED8_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+20 ); \
+ ALIGNED4_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP+28 ); \
+ } else { \
+ UNALIGNED_NEW ( -VGA_STACK_REDZONE_SIZE + new_SP, 32 ); \
+ } \
+} \
+ \
+void VGA_REGPARM(1) MAC_(die_mem_stack_32)(Addr new_SP) \
+{ \
+ PROF_EVENT(124, "die_mem_stack_32"); \
+ if (VG_IS_8_ALIGNED(new_SP)) { \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-32 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-24 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-16 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP- 8 ); \
+ } else if (VG_IS_4_ALIGNED(new_SP)) { \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-32 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-28 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-20 ); \
+ ALIGNED8_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-12 ); \
+ ALIGNED4_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-4 ); \
+ } else { \
+ UNALIGNED_DIE ( -VGA_STACK_REDZONE_SIZE + new_SP-32, 32 ); \
+ } \
+} \
+ \
+void MAC_(new_mem_stack) ( Addr a, SizeT len ) \
+{ \
+ PROF_EVENT(115, "new_mem_stack"); \
+ UNALIGNED_NEW ( -VGA_STACK_REDZONE_SIZE + a, len ); \
+} \
+ \
+void MAC_(die_mem_stack) ( Addr a, SizeT len ) \
+{ \
+ PROF_EVENT(125, "die_mem_stack"); \
+ UNALIGNED_DIE ( -VGA_STACK_REDZONE_SIZE + a, len ); \
}
=20
#endif /* __MAC_SHARED_H */
|
|
From: <sv...@va...> - 2005-04-23 22:38:46
|
Author: sewardj
Date: 2005-04-23 23:38:38 +0100 (Sat, 23 Apr 2005)
New Revision: 3545
Modified:
trunk/memcheck/mc_include.h
trunk/memcheck/mc_main.c
trunk/memcheck/mc_translate.c
Log:
Handle 8-byte value-check failures using a special fast-case fn (like
0,1,4 sized) rather than the generic one. Remove size 2 since that
never seems to get used.
Modified: trunk/memcheck/mc_include.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_include.h 2005-04-23 01:14:51 UTC (rev 3544)
+++ trunk/memcheck/mc_include.h 2005-04-23 22:38:38 UTC (rev 3545)
@@ -55,8 +55,8 @@
=20
/* Functions defined in mc_main.c */
extern VGA_REGPARM(1) void MC_(helperc_complain_undef) ( HWord );
+extern void MC_(helperc_value_check8_fail) ( void );
extern void MC_(helperc_value_check4_fail) ( void );
-extern void MC_(helperc_value_check2_fail) ( void );
extern void MC_(helperc_value_check1_fail) ( void );
extern void MC_(helperc_value_check0_fail) ( void );
=20
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-23 01:14:51 UTC (rev 3544)
+++ trunk/memcheck/mc_main.c 2005-04-23 22:38:38 UTC (rev 3545)
@@ -1493,16 +1493,16 @@
MC_(record_value_error) ( VG_(get_running_tid)(), 1 );
}
=20
-//zz void MC_(helperc_value_check2_fail) ( void )
-//zz {
-//zz MC_(record_value_error) ( VG_(get_running_tid)(), 2 );
-//zz }
-
void MC_(helperc_value_check4_fail) ( void )
{
MC_(record_value_error) ( VG_(get_running_tid)(), 4 );
}
=20
+void MC_(helperc_value_check8_fail) ( void )
+{
+ MC_(record_value_error) ( VG_(get_running_tid)(), 8 );
+}
+
VGA_REGPARM(1) void MC_(helperc_complain_undef) ( HWord sz )
{
MC_(record_value_error) ( VG_(get_running_tid)(), (Int)sz );
Modified: trunk/memcheck/mc_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_translate.c 2005-04-23 01:14:51 UTC (rev 3544)
+++ trunk/memcheck/mc_translate.c 2005-04-23 22:38:38 UTC (rev 3545)
@@ -702,6 +702,13 @@
mkIRExprVec_0()=20
);
break;
+ case 8:
+ di =3D unsafeIRDirty_0_N( 0/*regparms*/,=20
+ "MC_(helperc_value_check8_fail)",
+ &MC_(helperc_value_check8_fail),
+ mkIRExprVec_0()=20
+ );
+ break;
default:
di =3D unsafeIRDirty_0_N( 1/*regparms*/,=20
"MC_(helperc_complain_undef)",
|
|
From: <js...@ac...> - 2005-04-23 03:02:51
|
Nightly build on phoenix ( SuSE 9.1 ) started at 2005-04-23 03:50:00 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: (skipping, prereq failed: ../../../tests/cputest x86-mmxext) insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 201 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/writev (stderr) corecheck/tests/fdleak_fcntl (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <to...@co...> - 2005-04-23 02:35:57
|
Nightly build on dunsmere ( athlon, Fedora Core 3 ) started at 2005-04-23 03:30:04 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 176 tests, 78 stderr failures, 4 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:30:39
|
Nightly build on audi ( i686, Red Hat 9 ) started at 2005-04-23 03:25:01 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 175 tests, 15 stderr failures, 3 stdout failures ================= memcheck/tests/error_counts (stdout) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/trivialleak (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:29:02
|
Nightly build on ginetta ( i686, Red Hat 8.0 ) started at 2005-04-23 03:20:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 16 stderr failures, 3 stdout failures ================= memcheck/tests/error_counts (stdout) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/trivialleak (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <to...@co...> - 2005-04-23 02:26:27
|
Nightly build on dunsmere ( Fedora Core 3 ) started at 2005-04-23 03:20:03 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int sh: line 1: 25400 Segmentation fault VALGRINDLIB=/tmp/valgrind.32070/valgrind/.in_place /tmp/valgrind.32070/valgrind/./coregrind/valgrind --command-line-only=yes --memcheck:leak-check=no --addrcheck:leak-check=no --tool=none ./int >int.stdout.out 2>int.stderr.out pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 207 tests, 4 stderr failures, 0 stdout failures ================= memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_supp (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:22:20
|
Nightly build on audi ( Red Hat 9 ) started at 2005-04-23 03:15:01 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow fpu_lazy_eflags: valgrind ./fpu_lazy_eflags insn_basic: valgrind ./insn_basic insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 206 tests, 1 stderr failure, 0 stdout failures ================= memcheck/tests/scalar (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:20:38
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-04-23 03:15:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 20 stderr failures, 3 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/match-overrun (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:19:15
|
Nightly build on ginetta ( Red Hat 8.0 ) started at 2005-04-23 03:10:01 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 205 tests, 3 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:16:18
|
Nightly build on honda ( x86_64, Fedora Core 3 ) started at 2005-04-23 03:10:06 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 156 tests, 84 stderr failures, 20 stdout failures ================= memcheck/tests/addressable (stdout) memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stdout) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stdout) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stdout) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stdout) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stdout) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stdout) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stdout) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stdout) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stdout) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stdout) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stdout) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stdout) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/zeropage (stdout) memcheck/tests/zeropage (stderr) corecheck/tests/fdleak_cmsg (stderr) corecheck/tests/fdleak_creat (stderr) corecheck/tests/fdleak_dup (stderr) corecheck/tests/fdleak_dup2 (stderr) corecheck/tests/fdleak_fcntl (stderr) corecheck/tests/fdleak_ipv4 (stderr) corecheck/tests/fdleak_open (stderr) corecheck/tests/fdleak_pipe (stderr) corecheck/tests/fdleak_socketpair (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:11:40
|
Nightly build on alvis ( Red Hat 7.3 ) started at 2005-04-23 03:05:01 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow == 205 tests, 17 stderr failures, 0 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/distinguished-writes (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/vgtest_ume (stderr) addrcheck/tests/leak-0 (stderr) addrcheck/tests/leak-cycle (stderr) addrcheck/tests/leak-regroot (stderr) addrcheck/tests/leak-tree (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-23 02:02:56
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2005-04-23 03:00:03 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 156 tests, 84 stderr failures, 20 stdout failures ================= memcheck/tests/addressable (stdout) memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stdout) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stdout) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stdout) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stdout) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stdout) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stdout) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stdout) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stdout) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stdout) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stdout) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stdout) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stdout) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/zeropage (stdout) memcheck/tests/zeropage (stderr) corecheck/tests/fdleak_cmsg (stderr) corecheck/tests/fdleak_creat (stderr) corecheck/tests/fdleak_dup (stderr) corecheck/tests/fdleak_dup2 (stderr) corecheck/tests/fdleak_fcntl (stderr) corecheck/tests/fdleak_ipv4 (stderr) corecheck/tests/fdleak_open (stderr) corecheck/tests/fdleak_pipe (stderr) corecheck/tests/fdleak_socketpair (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) |
|
From: <sv...@va...> - 2005-04-23 01:15:51
|
Author: sewardj
Date: 2005-04-23 02:15:47 +0100 (Sat, 23 Apr 2005)
New Revision: 1137
Modified:
trunk/priv/host-amd64/isel.c
Log:
More code-generation cases.
Modified: trunk/priv/host-amd64/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-amd64/isel.c 2005-04-22 21:21:09 UTC (rev 1136)
+++ trunk/priv/host-amd64/isel.c 2005-04-23 01:15:47 UTC (rev 1137)
@@ -1283,8 +1283,8 @@
return dst;
}
//.. case Iop_1Sto8:
-//.. case Iop_1Sto16:
-//.. case Iop_1Sto32:
+ case Iop_1Sto16:
+ case Iop_1Sto32:
case Iop_1Sto64: {
/* could do better than this, but for now ... */
HReg dst =3D newVRegI(env);
@@ -1316,18 +1316,15 @@
return dst;
}
=20
-//.. case Iop_128to32: {
-//.. HReg dst =3D newVRegI(env);
-//.. HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
-//.. X86AMode* esp0 =3D X86AMode_IR(0, hregX86_ESP());
-//.. sub_from_esp(env, 16);
-//.. addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp=
0));
-//.. addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(esp=
0), dst ));
-//.. add_to_esp(env, 16);
-//.. return dst;
-//.. }
+ case Iop_V128to32: {
+ HReg dst =3D newVRegI(env);
+ HReg vec =3D iselVecExpr(env, e->Iex.Unop.arg);
+ AMD64AMode* rsp_m16 =3D AMD64AMode_IR(-16, hregAMD64_RSP());
+ addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, vec, rs=
p_m16));
+ addInstr(env, AMD64Instr_LoadEX(4, False/*z-widen*/, rsp_m16=
, dst));
+ return dst;
+ }
=20
-
/* V128{HI}to64 */
case Iop_V128HIto64:
case Iop_V128to64: {
@@ -1816,6 +1813,24 @@
}
}
=20
+ /* CmpEQ32 / CmpNE32 */
+ if (e->tag =3D=3D Iex_Binop=20
+ && (e->Iex.Binop.op =3D=3D Iop_CmpEQ32
+ || e->Iex.Binop.op =3D=3D Iop_CmpNE32)) {
+ HReg r1 =3D iselIntExpr_R(env, e->Iex.Binop.arg1);
+ AMD64RMI* rmi2 =3D iselIntExpr_RMI(env, e->Iex.Binop.arg2);
+ HReg r =3D newVRegI(env);
+ addInstr(env, mk_iMOVsd_RR(r1,r));
+ addInstr(env, AMD64Instr_Alu64R(Aalu_XOR,rmi2,r));
+ addInstr(env, AMD64Instr_Sh64(Ash_SHL, 32, AMD64RM_Reg(r)));
+ switch (e->Iex.Binop.op) {
+ case Iop_CmpEQ32: return Acc_Z;
+ case Iop_CmpNE32: return Acc_NZ;
+ default: vpanic("iselCondCode(amd64): CmpXX8");
+ }
+ }
+
+
//.. /* CmpEQ16 / CmpNE16 */
//.. if (e->tag =3D=3D Iex_Binop=20
//.. && (e->Iex.Binop.op =3D=3D Iop_CmpEQ16
@@ -3172,32 +3187,28 @@
if (e->tag =3D=3D Iex_Binop) {
switch (e->Iex.Binop.op) {
=20
-//.. case Iop_Set128lo32: {
-//.. HReg dst =3D newVRegV(env);
-//.. HReg srcV =3D iselVecExpr(env, e->Iex.Binop.arg1);
-//.. HReg srcI =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
-//.. X86AMode* esp0 =3D X86AMode_IR(0, hregX86_ESP());
-//.. sub_from_esp(env, 16);
-//.. addInstr(env, X86Instr_SseLdSt(False/*store*/, srcV, esp0)=
);
-//.. addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcI), e=
sp0));
-//.. addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
-//.. add_to_esp(env, 16);
-//.. return dst;
-//.. }
-
case Iop_SetV128lo64: {
HReg dst =3D newVRegV(env);
HReg srcV =3D iselVecExpr(env, e->Iex.Binop.arg1);
HReg srcI =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
- AMD64AMode* rsp0 =3D AMD64AMode_IR(0, hregAMD64_RSP());
- sub_from_rsp(env, 16);
- addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, srcV, rsp0=
));
- addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, AMD64RI_Reg(srcI), rs=
p0));
- addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, dst, rsp0));
- add_to_rsp(env, 16);
+ AMD64AMode* rsp_m16 =3D AMD64AMode_IR(-16, hregAMD64_RSP());
+ addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, srcV, rsp_=
m16));
+ addInstr(env, AMD64Instr_Alu64M(Aalu_MOV, AMD64RI_Reg(srcI), rs=
p_m16));
+ addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, dst, rsp_m16=
));
return dst;
}
=20
+ case Iop_SetV128lo32: {
+ HReg dst =3D newVRegV(env);
+ HReg srcV =3D iselVecExpr(env, e->Iex.Binop.arg1);
+ HReg srcI =3D iselIntExpr_R(env, e->Iex.Binop.arg2);
+ AMD64AMode* rsp_m16 =3D AMD64AMode_IR(-16, hregAMD64_RSP());
+ addInstr(env, AMD64Instr_SseLdSt(False/*store*/, 16, srcV, rsp_=
m16));
+ addInstr(env, AMD64Instr_Store(4, srcI, rsp_m16));
+ addInstr(env, AMD64Instr_SseLdSt(True/*load*/, 16, dst, rsp_m16=
));
+ return dst;
+ }
+
case Iop_64HLtoV128: {
AMD64AMode* rsp =3D AMD64AMode_IR(0, hregAMD64_RSP());
HReg dst =3D newVRegV(env);
@@ -3613,7 +3624,8 @@
return;
=20
retty =3D typeOfIRTemp(env->type_env, d->tmp);
- if (retty =3D=3D Ity_I64 || retty =3D=3D Ity_I32) {
+ if (retty =3D=3D Ity_I64 || retty =3D=3D Ity_I32=20
+ || retty =3D=3D Ity_I16 || retty =3D=3D Ity_I8) {
/* The returned value is in %rax. Park it in the register
associated with tmp. */
HReg dst =3D lookupIRTemp(env, d->tmp);
|
|
From: <sv...@va...> - 2005-04-23 01:14:57
|
Author: sewardj
Date: 2005-04-23 02:14:51 +0100 (Sat, 23 Apr 2005)
New Revision: 3544
Modified:
trunk/memcheck/mc_translate.c
Log:
Add a few cases arising from testing on amd64.
Modified: trunk/memcheck/mc_translate.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_translate.c 2005-04-22 21:10:28 UTC (rev 3543)
+++ trunk/memcheck/mc_translate.c 2005-04-23 01:14:51 UTC (rev 3544)
@@ -507,7 +507,18 @@
case Ity_I64:=20
tmp1 =3D assignNew(mce, Ity_I1, binop(Iop_CmpNE64, vbits, mkU64=
(0)));
break;
+ case Ity_I128: {
+ /* Gah. Chop it in half, OR the halves together, and compare
+ that with zero. */
+ IRAtom* tmp2 =3D assignNew(mce, Ity_I64, unop(Iop_128HIto64, vb=
its));
+ IRAtom* tmp3 =3D assignNew(mce, Ity_I64, unop(Iop_128to64, vbit=
s));
+ IRAtom* tmp4 =3D assignNew(mce, Ity_I64, binop(Iop_Or64, tmp2, =
tmp3));
+ tmp1 =3D assignNew(mce, Ity_I1,=20
+ binop(Iop_CmpNE64, tmp4, mkU64(0)=
));
+ break;
+ }
default:
+ ppIRType(ty);
VG_(tool_panic)("mkPCastTo(1)");
}
tl_assert(tmp1);
@@ -527,6 +538,10 @@
tmp1 =3D assignNew(mce, Ity_I64, unop(Iop_1Sto64, tmp1));
tmp1 =3D assignNew(mce, Ity_V128, binop(Iop_64HLtoV128, tmp1, t=
mp1));
return tmp1;
+ case Ity_I128:
+ tmp1 =3D assignNew(mce, Ity_I64, unop(Iop_1Sto64, tmp1));
+ tmp1 =3D assignNew(mce, Ity_I128, binop(Iop_64HLto128, tmp1, tm=
p1));
+ return tmp1;
default:=20
ppIRType(dst_ty);
VG_(tool_panic)("mkPCastTo(2)");
@@ -1509,6 +1524,10 @@
case Iop_InterleaveHI8x16:
return assignNew(mce, Ity_V128, binop(op, vatom1, vatom2));
=20
+ /* I128-bit data-steering */
+ case Iop_64HLto128:
+ return assignNew(mce, Ity_I128, binop(op, vatom1, vatom2));
+
/* Scalar floating point */
=20
case Iop_RoundF64:
@@ -1550,6 +1569,10 @@
case Iop_DivModS64to32:
return mkLazy2(mce, Ity_I64, vatom1, vatom2);
=20
+ case Iop_DivModU128to64:
+ case Iop_DivModS128to64:
+ return mkLazy2(mce, Ity_I128, vatom1, vatom2);
+
case Iop_16HLto32:
return assignNew(mce, Ity_I32, binop(op, vatom1, vatom2));
case Iop_32HLto64:
@@ -1601,6 +1624,7 @@
return mkLeft32(mce, mkUifU32(mce, vatom1,vatom2));
=20
/* could do better: Add64, Sub64 */
+ case Iop_Mul64:
case Iop_Add64:
case Iop_Sub64:
return mkLeft64(mce, mkUifU64(mce, vatom1,vatom2));
@@ -1614,12 +1638,22 @@
case Iop_Add8:
return mkLeft8(mce, mkUifU8(mce, vatom1,vatom2));
=20
+ case Iop_CmpEQ64:=20
+ if (mce->bogusLiterals)
+ return expensiveCmpEQorNE(mce,Ity_I64, vatom1,vatom2, atom1,=
atom2 );
+ else
+ goto cheap_cmp64;
+ cheap_cmp64:
+ // case Iop_CmpLE64S: case Iop_CmpLE64U:=20
+ // case Iop_CmpLT64U: case Iop_CmpLT64S:
+ // case Iop_CmpNE64:
+ return mkPCastTo(mce, Ity_I1, mkUifU64(mce, vatom1,vatom2));
+
case Iop_CmpEQ32:=20
if (mce->bogusLiterals)
return expensiveCmpEQorNE(mce,Ity_I32, vatom1,vatom2, atom1,=
atom2 );
else
goto cheap_cmp32;
-
cheap_cmp32:
case Iop_CmpLE32S: case Iop_CmpLE32U:=20
case Iop_CmpLT32U: case Iop_CmpLT32S:
@@ -1648,7 +1682,7 @@
complainIfUndefined(mce, atom2);
return assignNew(mce, Ity_I8, binop(op, vatom1, atom2));
=20
- case Iop_Shl64: case Iop_Shr64:=20
+ case Iop_Shl64: case Iop_Shr64: case Iop_Sar64:
/* Same scheme as with 32-bit shifts. */
complainIfUndefined(mce, atom2);
return assignNew(mce, Ity_I64, binop(op, vatom1, atom2));
@@ -1991,6 +2025,10 @@
if (tyH =3D=3D Ity_I64) {
switch (ty) {
case Ity_I32: return assignNew(mce, tyH, unop(Iop_32Uto64, vato=
m));
+ case Ity_I16: return assignNew(mce, tyH, unop(Iop_32Uto64,=20
+ assignNew(mce, Ity_I32, unop(Iop_16Uto32, =
vatom))));
+ case Ity_I8: return assignNew(mce, tyH, unop(Iop_32Uto64,=20
+ assignNew(mce, Ity_I32, unop(Iop_8Uto32, v=
atom))));
default: goto unhandled;
}
} else {
|