You can subscribe to this list here.
| 2002 |
Jan
|
Feb
|
Mar
|
Apr
|
May
|
Jun
|
Jul
|
Aug
|
Sep
(1) |
Oct
(122) |
Nov
(152) |
Dec
(69) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2003 |
Jan
(6) |
Feb
(25) |
Mar
(73) |
Apr
(82) |
May
(24) |
Jun
(25) |
Jul
(10) |
Aug
(11) |
Sep
(10) |
Oct
(54) |
Nov
(203) |
Dec
(182) |
| 2004 |
Jan
(307) |
Feb
(305) |
Mar
(430) |
Apr
(312) |
May
(187) |
Jun
(342) |
Jul
(487) |
Aug
(637) |
Sep
(336) |
Oct
(373) |
Nov
(441) |
Dec
(210) |
| 2005 |
Jan
(385) |
Feb
(480) |
Mar
(636) |
Apr
(544) |
May
(679) |
Jun
(625) |
Jul
(810) |
Aug
(838) |
Sep
(634) |
Oct
(521) |
Nov
(965) |
Dec
(543) |
| 2006 |
Jan
(494) |
Feb
(431) |
Mar
(546) |
Apr
(411) |
May
(406) |
Jun
(322) |
Jul
(256) |
Aug
(401) |
Sep
(345) |
Oct
(542) |
Nov
(308) |
Dec
(481) |
| 2007 |
Jan
(427) |
Feb
(326) |
Mar
(367) |
Apr
(255) |
May
(244) |
Jun
(204) |
Jul
(223) |
Aug
(231) |
Sep
(354) |
Oct
(374) |
Nov
(497) |
Dec
(362) |
| 2008 |
Jan
(322) |
Feb
(482) |
Mar
(658) |
Apr
(422) |
May
(476) |
Jun
(396) |
Jul
(455) |
Aug
(267) |
Sep
(280) |
Oct
(253) |
Nov
(232) |
Dec
(304) |
| 2009 |
Jan
(486) |
Feb
(470) |
Mar
(458) |
Apr
(423) |
May
(696) |
Jun
(461) |
Jul
(551) |
Aug
(575) |
Sep
(134) |
Oct
(110) |
Nov
(157) |
Dec
(102) |
| 2010 |
Jan
(226) |
Feb
(86) |
Mar
(147) |
Apr
(117) |
May
(107) |
Jun
(203) |
Jul
(193) |
Aug
(238) |
Sep
(300) |
Oct
(246) |
Nov
(23) |
Dec
(75) |
| 2011 |
Jan
(133) |
Feb
(195) |
Mar
(315) |
Apr
(200) |
May
(267) |
Jun
(293) |
Jul
(353) |
Aug
(237) |
Sep
(278) |
Oct
(611) |
Nov
(274) |
Dec
(260) |
| 2012 |
Jan
(303) |
Feb
(391) |
Mar
(417) |
Apr
(441) |
May
(488) |
Jun
(655) |
Jul
(590) |
Aug
(610) |
Sep
(526) |
Oct
(478) |
Nov
(359) |
Dec
(372) |
| 2013 |
Jan
(467) |
Feb
(226) |
Mar
(391) |
Apr
(281) |
May
(299) |
Jun
(252) |
Jul
(311) |
Aug
(352) |
Sep
(481) |
Oct
(571) |
Nov
(222) |
Dec
(231) |
| 2014 |
Jan
(185) |
Feb
(329) |
Mar
(245) |
Apr
(238) |
May
(281) |
Jun
(399) |
Jul
(382) |
Aug
(500) |
Sep
(579) |
Oct
(435) |
Nov
(487) |
Dec
(256) |
| 2015 |
Jan
(338) |
Feb
(357) |
Mar
(330) |
Apr
(294) |
May
(191) |
Jun
(108) |
Jul
(142) |
Aug
(261) |
Sep
(190) |
Oct
(54) |
Nov
(83) |
Dec
(22) |
| 2016 |
Jan
(49) |
Feb
(89) |
Mar
(33) |
Apr
(50) |
May
(27) |
Jun
(34) |
Jul
(53) |
Aug
(53) |
Sep
(98) |
Oct
(206) |
Nov
(93) |
Dec
(53) |
| 2017 |
Jan
(65) |
Feb
(82) |
Mar
(102) |
Apr
(86) |
May
(187) |
Jun
(67) |
Jul
(23) |
Aug
(93) |
Sep
(65) |
Oct
(45) |
Nov
(35) |
Dec
(17) |
| 2018 |
Jan
(26) |
Feb
(35) |
Mar
(38) |
Apr
(32) |
May
(8) |
Jun
(43) |
Jul
(27) |
Aug
(30) |
Sep
(43) |
Oct
(42) |
Nov
(38) |
Dec
(67) |
| 2019 |
Jan
(32) |
Feb
(37) |
Mar
(53) |
Apr
(64) |
May
(49) |
Jun
(18) |
Jul
(14) |
Aug
(53) |
Sep
(25) |
Oct
(30) |
Nov
(49) |
Dec
(31) |
| 2020 |
Jan
(87) |
Feb
(45) |
Mar
(37) |
Apr
(51) |
May
(99) |
Jun
(36) |
Jul
(11) |
Aug
(14) |
Sep
(20) |
Oct
(24) |
Nov
(40) |
Dec
(23) |
| 2021 |
Jan
(14) |
Feb
(53) |
Mar
(85) |
Apr
(15) |
May
(19) |
Jun
(3) |
Jul
(14) |
Aug
(1) |
Sep
(57) |
Oct
(73) |
Nov
(56) |
Dec
(22) |
| 2022 |
Jan
(3) |
Feb
(22) |
Mar
(6) |
Apr
(55) |
May
(46) |
Jun
(39) |
Jul
(15) |
Aug
(9) |
Sep
(11) |
Oct
(34) |
Nov
(20) |
Dec
(36) |
| 2023 |
Jan
(79) |
Feb
(41) |
Mar
(99) |
Apr
(169) |
May
(48) |
Jun
(16) |
Jul
(16) |
Aug
(57) |
Sep
(19) |
Oct
|
Nov
|
Dec
|
| S | M | T | W | T | F | S |
|---|---|---|---|---|---|---|
|
|
|
|
|
|
1
(36) |
2
(30) |
|
3
(17) |
4
(21) |
5
(18) |
6
(14) |
7
(23) |
8
(12) |
9
(11) |
|
10
(11) |
11
(12) |
12
(11) |
13
(12) |
14
(11) |
15
(11) |
16
(15) |
|
17
(12) |
18
(15) |
19
(15) |
20
(25) |
21
(26) |
22
(21) |
23
(18) |
|
24
(25) |
25
(28) |
26
(27) |
27
(32) |
28
(13) |
29
(12) |
30
(10) |
|
From: <sv...@va...> - 2005-04-22 21:21:13
|
Author: sewardj Date: 2005-04-22 22:21:09 +0100 (Fri, 22 Apr 2005) New Revision: 1136 Modified: trunk/TODO.txt Log: Update. Modified: trunk/TODO.txt =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- trunk/TODO.txt 2005-04-22 21:20:47 UTC (rev 1135) +++ trunk/TODO.txt 2005-04-22 21:21:09 UTC (rev 1136) @@ -12,21 +12,12 @@ x86 guest: look at FP accuracy =20 =20 -Test -~~~~ -Test adc/sbb carry dependency in memcheck - - Optimisation opportunities ~~~~~~~~~~~~~~~~~~~~~~~~~~ Improved isel for memcheck artefacts on x86 (generate neg ; sbbl) =20 Assess tt_fast miss rates=20 =20 -Better register allocation - spilling reduction - -iropt less conservative re precise exns - improve stack-update pass =20 proper profiling machinery @@ -35,6 +26,7 @@ =20 x86 iselIntExpr_RMI: actually generate the M case if possible =20 + JIT speedups ~~~~~~~~~~~~ Ensure incremental flatness throughout @@ -54,19 +46,10 @@ =20 disallow dirty helpers from writing SP/IP =20 -make instrumentation work at no optimisation - write API doc, clarify IR semantics =20 make IR utils module =20 -tt/tc simplification, also profiling - generic stack pointer identification at startup? =20 New memstack_k: old or new sp? - -Set host FPU mode before starting. Also set Dflag =3D 0=20 - -skin_panic -> tool_panic - |
|
From: <sv...@va...> - 2005-04-22 21:20:50
|
Author: sewardj
Date: 2005-04-22 22:20:47 +0100 (Fri, 22 Apr 2005)
New Revision: 1135
Modified:
trunk/priv/host-x86/isel.c
Log:
Comment-only change.
Modified: trunk/priv/host-x86/isel.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/priv/host-x86/isel.c 2005-04-21 01:57:44 UTC (rev 1134)
+++ trunk/priv/host-x86/isel.c 2005-04-22 21:20:47 UTC (rev 1135)
@@ -44,9 +44,11 @@
#include "host-generic/h_generic_simd64.h"
#include "host-x86/hdefs.h"
=20
-/* TODO 4 Feb 2005:
+/* TODO 21 Apr 2005:
=20
- -- Fill in load-case in iselIntExpr_RMI
+ -- (Really an assembler issue) don't emit CMov32 as a cmov
+ insn, since that's expensive on P4 and conditional branch
+ is cheaper if (as we expect) the condition is highly predictable
=20
-- preserve xmm registers across function calls (by declaring them
as trashed by call insns)
|
|
From: <sv...@va...> - 2005-04-22 21:10:33
|
Author: sewardj
Date: 2005-04-22 22:10:28 +0100 (Fri, 22 Apr 2005)
New Revision: 3543
Modified:
trunk/memcheck/mc_main.c
Log:
Tidy up: remove lots of old code, rearrange order of functions
somewhat.
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-22 20:23:27 UTC (rev 3542)
+++ trunk/memcheck/mc_main.c 2005-04-22 21:10:28 UTC (rev 3543)
@@ -30,31 +30,14 @@
The GNU General Public License is contained in the file COPYING.
*/
=20
-/* TODO urgently
+/* TODO 22 Apr 05
=20
- sanity check:=20
- auxmap only covers address space that the primary doesn't
- auxmap entries non-duplicated (expensive)
- there are no secondary map leaks. this can easily be established
- by counting the number of secmaps issued, and ensuring that
- the same number of pointers-to-secmaps from the main/aux
- primary map can be found
- there is only one pointer to each non-distinguished secmap.
-
- types of helper functions
-
- set_address_range_perms to notice when a distinguished secondary
- will work, and use that (viz, re-implement compression scheme)
-
- profile
-
- reinstate fast-path cases
+ test whether it would be faster, for LOADV4, to check
+ only for 8-byte validity on the fast path
*/
=20
-
#include "mc_include.h"
#include "memcheck.h" /* for client requests */
-//#include "vg_profile.c"
=20
=20
#define EXPECTED_TAKEN(cond) __builtin_expect((cond),1)
@@ -79,6 +62,56 @@
/*--- Basic A/V bitmap representation. ---*/
/*------------------------------------------------------------*/
=20
+/* TODO: fix this comment */
+//zz /* All reads and writes are checked against a memory map, which
+//zz records the state of all memory in the process. The memory map =
is
+//zz organised like this:
+//zz=20
+//zz The top 16 bits of an address are used to index into a top-level
+//zz map table, containing 65536 entries. Each entry is a pointer to=
a
+//zz second-level map, which records the accesibililty and validity
+//zz permissions for the 65536 bytes indexed by the lower 16 bits of =
the
+//zz address. Each byte is represented by nine bits, one indicating
+//zz accessibility, the other eight validity. So each second-level m=
ap
+//zz contains 73728 bytes. This two-level arrangement conveniently
+//zz divides the 4G address space into 64k lumps, each size 64k bytes=
.
+//zz=20
+//zz All entries in the primary (top-level) map must point to a valid
+//zz secondary (second-level) map. Since most of the 4G of address
+//zz space will not be in use -- ie, not mapped at all -- there is a
+//zz distinguished secondary map, which indicates `not addressible an=
d
+//zz not valid' writeable for all bytes. Entries in the primary map =
for
+//zz which the entire 64k is not in use at all point at this
+//zz distinguished map.
+//zz=20
+//zz There are actually 4 distinguished secondaries. These are used =
to
+//zz represent a memory range which is either not addressable (validi=
ty
+//zz doesn't matter), addressable+not valid, addressable+valid.
+//zz=20
+//zz [...] lots of stuff deleted due to out of date-ness
+//zz=20
+//zz As a final optimisation, the alignment and address checks for
+//zz 4-byte loads and stores are combined in a neat way. The primary
+//zz map is extended to have 262144 entries (2^18), rather than 2^16.
+//zz The top 3/4 of these entries are permanently set to the
+//zz distinguished secondary map. For a 4-byte load/store, the
+//zz top-level map is indexed not with (addr >> 16) but instead f(add=
r),
+//zz where
+//zz=20
+//zz f( XXXX XXXX XXXX XXXX ____ ____ ____ __YZ )
+//zz =3D ____ ____ ____ __YZ XXXX XXXX XXXX XXXX or=20
+//zz =3D ____ ____ ____ __ZY XXXX XXXX XXXX XXXX
+//zz=20
+//zz ie the lowest two bits are placed above the 16 high address bits=
.
+//zz If either of these two bits are nonzero, the address is misalign=
ed;
+//zz this will select a secondary map from the upper 3/4 of the prima=
ry
+//zz map. Because this is always the distinguished secondary map, a
+//zz (bogus) address check failure will result. The failure handling
+//zz code can then figure out whether this is a genuine addr check
+//zz failure or whether it is a possibly-legitimate access at a
+//zz misaligned address. =20
+//zz */
+
/* --------------- Basic configuration --------------- */
=20
/* The number of entries in the primary map can be altered. However
@@ -387,248 +420,6 @@
}
=20
=20
-///////////////////////////////////////////////////////////////
-
-
-
-
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-
-//zz #if 0 /* this is the old implementation */
-//zz=20
-//zz=20
-//zz=20
-//zz /*------------------------------------------------------------*/
-//zz /*--- Low-level support for memory checking. ---*/
-//zz /*------------------------------------------------------------*/
-//zz=20
-//zz /* All reads and writes are checked against a memory map, which
-//zz records the state of all memory in the process. The memory map =
is
-//zz organised like this:
-//zz=20
-//zz The top 16 bits of an address are used to index into a top-level
-//zz map table, containing 65536 entries. Each entry is a pointer to=
a
-//zz second-level map, which records the accesibililty and validity
-//zz permissions for the 65536 bytes indexed by the lower 16 bits of =
the
-//zz address. Each byte is represented by nine bits, one indicating
-//zz accessibility, the other eight validity. So each second-level m=
ap
-//zz contains 73728 bytes. This two-level arrangement conveniently
-//zz divides the 4G address space into 64k lumps, each size 64k bytes=
.
-//zz=20
-//zz All entries in the primary (top-level) map must point to a valid
-//zz secondary (second-level) map. Since most of the 4G of address
-//zz space will not be in use -- ie, not mapped at all -- there is a
-//zz distinguished secondary map, which indicates `not addressible an=
d
-//zz not valid' writeable for all bytes. Entries in the primary map =
for
-//zz which the entire 64k is not in use at all point at this
-//zz distinguished map.
-//zz=20
-//zz There are actually 4 distinguished secondaries. These are used =
to
-//zz represent a memory range which is either not addressable (validi=
ty
-//zz doesn't matter), addressable+not valid, addressable+valid.
-//zz=20
-//zz [...] lots of stuff deleted due to out of date-ness
-//zz=20
-//zz As a final optimisation, the alignment and address checks for
-//zz 4-byte loads and stores are combined in a neat way. The primary
-//zz map is extended to have 262144 entries (2^18), rather than 2^16.
-//zz The top 3/4 of these entries are permanently set to the
-//zz distinguished secondary map. For a 4-byte load/store, the
-//zz top-level map is indexed not with (addr >> 16) but instead f(add=
r),
-//zz where
-//zz=20
-//zz f( XXXX XXXX XXXX XXXX ____ ____ ____ __YZ )
-//zz =3D ____ ____ ____ __YZ XXXX XXXX XXXX XXXX or=20
-//zz =3D ____ ____ ____ __ZY XXXX XXXX XXXX XXXX
-//zz=20
-//zz ie the lowest two bits are placed above the 16 high address bits=
.
-//zz If either of these two bits are nonzero, the address is misalign=
ed;
-//zz this will select a secondary map from the upper 3/4 of the prima=
ry
-//zz map. Because this is always the distinguished secondary map, a
-//zz (bogus) address check failure will result. The failure handling
-//zz code can then figure out whether this is a genuine addr check
-//zz failure or whether it is a possibly-legitimate access at a
-//zz misaligned address. =20
-//zz */
-//zz=20
-//zz /*------------------------------------------------------------*/
-//zz /*--- Function declarations. ---*/
-//zz /*------------------------------------------------------------*/
-//zz=20
-//zz static ULong mc_rd_V8_SLOWLY ( Addr a );
-//zz static UInt mc_rd_V4_SLOWLY ( Addr a );
-//zz static UInt mc_rd_V2_SLOWLY ( Addr a );
-//zz static UInt mc_rd_V1_SLOWLY ( Addr a );
-//zz=20
-//zz static void mc_wr_V8_SLOWLY ( Addr a, ULong vbytes );
-//zz static void mc_wr_V4_SLOWLY ( Addr a, UInt vbytes );
-//zz static void mc_wr_V2_SLOWLY ( Addr a, UInt vbytes );
-//zz static void mc_wr_V1_SLOWLY ( Addr a, UInt vbytes );
-//zz=20
-//zz /*------------------------------------------------------------*/
-//zz /*--- Data defns. ---*/
-//zz /*------------------------------------------------------------*/
-//zz=20
-//zz typedef=20
-//zz struct {
-//zz UChar abits[SECONDARY_SIZE/8];
-//zz UChar vbyte[SECONDARY_SIZE];
-//zz }
-//zz SecMap;
-//zz=20
-//zz=20
-//zz static SecMap* primary_map[ /*PRIMARY_SIZE*/ PRIMARY_SIZE*4 ];
-//zz=20
-//zz #define DSM_IDX(a, v) ((((a)&1) << 1) + ((v)&1))
-//zz=20
-//zz /* 4 secondary maps, but one is redundant (because the !addressable=
&&
-//zz valid state is meaningless) */
-//zz static const SecMap distinguished_secondary_maps[4] =3D {
-//zz #define INIT(a, v) \
-//zz [ DSM_IDX(a, v) ] =3D { { [0 ... (SECONDARY_SIZE/8)-1] =3D BIT_E=
XPAND(a) }, \
-//zz { [0 ... SECONDARY_SIZE-1] =3D BIT_EXPAND(a|v) } }
-//zz INIT(VGM_BIT_VALID, VGM_BIT_VALID),
-//zz INIT(VGM_BIT_VALID, VGM_BIT_INVALID),
-//zz INIT(VGM_BIT_INVALID, VGM_BIT_VALID),
-//zz INIT(VGM_BIT_INVALID, VGM_BIT_INVALID),
-//zz #undef INIT
-//zz };
-//zz #define N_SECONDARY_MAPS (sizeof(distinguished_secondary_maps)/size=
of(*distinguished_secondary_maps))
-//zz=20
-//zz #define DSM(a,v) ((SecMap *)&distinguished_secondary_maps[DSM_IDX(=
a, v)])
-//zz=20
-//zz #define DSM_NOTADDR DSM(VGM_BIT_INVALID, VGM_BIT_INVALID)
-//zz #define DSM_ADDR_NOTVALID DSM(VGM_BIT_VALID, VGM_BIT_INVALID)
-//zz #define DSM_ADDR_VALID DSM(VGM_BIT_VALID, VGM_BIT_VALID)
-
-static void init_shadow_memory ( void )
-{
- Int i;
- SecMap* sm;
-
- /* Build the 3 distinguished secondaries */
- tl_assert(VGM_BIT_INVALID =3D=3D 1);
- tl_assert(VGM_BIT_VALID =3D=3D 0);
- tl_assert(VGM_BYTE_INVALID =3D=3D 0xFF);
- tl_assert(VGM_BYTE_VALID =3D=3D 0);
-
- /* Set A invalid, V invalid. */
- sm =3D &sm_distinguished[SM_DIST_NOACCESS];
- for (i =3D 0; i < 65536; i++)
- sm->vbyte[i] =3D VGM_BYTE_INVALID;
- for (i =3D 0; i < 8192; i++)
- sm->abits[i] =3D VGM_BYTE_INVALID;
-
- /* Set A valid, V invalid. */
- sm =3D &sm_distinguished[SM_DIST_ACCESS_UNDEFINED];
- for (i =3D 0; i < 65536; i++)
- sm->vbyte[i] =3D VGM_BYTE_INVALID;
- for (i =3D 0; i < 8192; i++)
- sm->abits[i] =3D VGM_BYTE_VALID;
-
- /* Set A valid, V valid. */
- sm =3D &sm_distinguished[SM_DIST_ACCESS_DEFINED];
- for (i =3D 0; i < 65536; i++)
- sm->vbyte[i] =3D VGM_BYTE_VALID;
- for (i =3D 0; i < 8192; i++)
- sm->abits[i] =3D VGM_BYTE_VALID;
-
- /* Set up the primary map. */
- /* These entries gradually get overwritten as the used address
- space expands. */
- for (i =3D 0; i < N_PRIMARY_MAP; i++)
- primary_map[i] =3D &sm_distinguished[SM_DIST_NOACCESS];
-
- /* auxmap_size =3D auxmap_used =3D 0;=20
- no ... these are statically initialised */
-}
-
-
-//zz /*------------------------------------------------------------*/
-//zz /*--- Basic bitmap management, reading and writing. ---*/
-//zz /*------------------------------------------------------------*/
-//zz=20
-//zz /* Allocate and initialise a secondary map. */
-//zz=20
-//zz static SecMap* alloc_secondary_map ( __attribute__ ((unused))=20
-//zz Char* caller,
-//zz const SecMap *prototype)
-//zz {
-//zz SecMap* map;
-//zz PROF_EVENT(10);
-//zz=20
-//zz map =3D (SecMap *)VG_(shadow_alloc)(sizeof(SecMap));
-//zz=20
-//zz VG_(memcpy)(map, prototype, sizeof(*map));
-//zz=20
-//zz /* VG_(printf)("ALLOC_2MAP(%s)\n", caller ); */
-//zz return map;
-//zz }
-//zz=20
-//zz=20
-//zz /* Basic reading/writing of the bitmaps, for byte-sized accesses. *=
/
-//zz=20
-//zz static __inline__ UChar get_abit ( Addr a )
-//zz {
-//zz SecMap* sm =3D primary_map[PM_IDX(a)];
-//zz UInt sm_off =3D SM_OFF(a);
-//zz PROF_EVENT(20);
-//zz # if 0
-//zz if (IS_DISTINGUISHED_SM(sm))
-//zz VG_(message)(Vg_DebugMsg,=20
-//zz "accessed distinguished 2ndary (A)map! 0x%x\n=
", a);
-//zz # endif
-//zz return BITARR_TEST(sm->abits, sm_off)=20
-//zz ? VGM_BIT_INVALID : VGM_BIT_VALID;
-//zz }
-//zz=20
-//zz static __inline__ UChar get_vbyte ( Addr a )
-//zz {
-//zz SecMap* sm =3D primary_map[PM_IDX(a)];
-//zz UInt sm_off =3D SM_OFF(a);
-//zz PROF_EVENT(21);
-//zz # if 0
-//zz if (IS_DISTINGUISHED_SM(sm))
-//zz VG_(message)(Vg_DebugMsg,=20
-//zz "accessed distinguished 2ndary (V)map! 0x%x\n=
", a);
-//zz # endif
-//zz return sm->vbyte[sm_off];
-//zz }
-//zz=20
-//zz static /* __inline__ */ void set_abit ( Addr a, UChar abit )
-//zz {
-//zz SecMap* sm;
-//zz UInt sm_off;
-//zz PROF_EVENT(22);
-//zz ENSURE_MAPPABLE(a, "set_abit");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz if (abit)=20
-//zz BITARR_SET(sm->abits, sm_off);
-//zz else
-//zz BITARR_CLEAR(sm->abits, sm_off);
-//zz }
-//zz=20
-//zz static __inline__ void set_vbyte ( Addr a, UChar vbyte )
-//zz {
-//zz SecMap* sm;
-//zz UInt sm_off;
-//zz PROF_EVENT(23);
-//zz ENSURE_MAPPABLE(a, "set_vbyte");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz sm->vbyte[sm_off] =3D vbyte;
-//zz }
-//zz=20
-//zz=20
//zz /* Reading/writing of the bitmaps, for aligned word-sized accesses.=
*/
//zz=20
//zz static __inline__ UChar get_abits4_ALIGNED ( Addr a )
@@ -870,8 +661,9 @@
# endif
}
=20
-/* Set permissions for address ranges ... */
=20
+/* --- Set permissions for arbitrary address ranges --- */
+
static void mc_make_noaccess ( Addr a, SizeT len )
{
PROF_EVENT(40, "mc_make_noaccess");
@@ -894,6 +686,26 @@
}
=20
=20
+/* --- Block-copy permissions (needed for implementing realloc()). --- *=
/
+
+static void mc_copy_address_range_state ( Addr src, Addr dst, SizeT len =
)
+{
+ SizeT i;
+ UWord abit, vbyte;
+
+ DEBUG("mc_copy_address_range_state\n");
+
+ PROF_EVENT(50, "mc_copy_address_range_state");
+ for (i =3D 0; i < len; i++) {
+ PROF_EVENT(51, "mc_copy_address_range_state(loop)");
+ get_abit_and_vbyte( &abit, &vbyte, src+i );
+ set_abit_and_vbyte( dst+i, abit, vbyte );
+ }
+}
+
+
+/* --- Fast case permission setters, for dealing with stacks. --- */
+
static __inline__
void make_aligned_word32_writable ( Addr aA )
{
@@ -1060,23 +872,7 @@
mc_make_noaccess=20
);
=20
-/* Block-copy permissions (needed for implementing realloc()). */
-static void mc_copy_address_range_state ( Addr src, Addr dst, SizeT len =
)
-{
- SizeT i;
- UWord abit, vbyte;
=20
- DEBUG("mc_copy_address_range_state\n");
-
- PROF_EVENT(50, "mc_copy_address_range_state");
- for (i =3D 0; i < len; i++) {
- PROF_EVENT(51, "mc_copy_address_range_state(loop)");
- get_abit_and_vbyte( &abit, &vbyte, src+i );
- set_abit_and_vbyte( dst+i, abit, vbyte );
- }
-}
-
-
/*------------------------------------------------------------*/
/*--- Checking memory ---*/
/*------------------------------------------------------------*/
@@ -1365,7 +1161,8 @@
=20
=20
/*------------------------------------------------------------*/
-/*--- Functions called directly from generated code. ---*/
+/*--- Functions called directly from generated code: ---*/
+/*--- Load/store handlers. ---*/
/*------------------------------------------------------------*/
=20
/* Types: LOADV4, LOADV2, LOADV1 are:
@@ -1379,27 +1176,6 @@
are a UWord, and for STOREV8 they are a ULong.
*/
=20
-//zz static __inline__ UInt rotateRight16 ( UInt x )
-//zz {
-//zz /* Amazingly, gcc turns this into a single rotate insn. */
-//zz return (x >> 16) | (x << 16);
-//zz }
-//zz=20
-//zz=20
-//zz static __inline__ UInt shiftRight16 ( UInt x )
-//zz {
-//zz return x >> 16;
-//zz }
-//zz=20
-//zz=20
-//zz /* Read/write 1/2/4/8 sized V bytes, and emit an address error if
-//zz needed. */
-//zz=20
-//zz /* MC_(helperc_{LD,ST}V{1,2,4,8}) handle the common case fast.
-//zz Under all other circumstances, it defers to the relevant _SLOWLY
-//zz function, which can handle all situations.
-//zz */
-
/* ------------------------ Size =3D 8 ------------------------ */
=20
VGA_REGPARM(1)
@@ -1407,35 +1183,6 @@
{
PROF_EVENT(70, "helperc_LOADV8");
return mc_LOADVn_slow( a, 8, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz return mc_rd_V8_SLOWLY(a);
-//zz # else
-//zz if (VG_IS_8_ALIGNED(a)) {
-//zz UInt sec_no =3D shiftRight16(a) & 0xFFFF;
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz UChar abits =3D sm->abits[a_off];
-//zz if (abits =3D=3D VGM_BYTE_VALID) {
-//zz /* a is 8-aligned, mapped, and addressible. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz /* LITTLE-ENDIAN */
-//zz UInt vLo =3D ((UInt*)(sm->vbyte))[ (v_off >> 2) ];
-//zz UInt vHi =3D ((UInt*)(sm->vbyte))[ (v_off >> 2) + 1 ];
-//zz return ( ((ULong)vHi) << 32 ) | ((ULong)vLo);
-//zz } else {
-//zz return mc_rd_V8_SLOWLY(a);
-//zz }
-//zz }
-//zz else
-//zz if (VG_IS_4_ALIGNED(a)) {
-//zz /* LITTLE-ENDIAN */
-//zz UInt vLo =3D MC_(helperc_LOADV4)(a+0);
-//zz UInt vHi =3D MC_(helperc_LOADV4)(a+4);
-//zz return ( ((ULong)vHi) << 32 ) | ((ULong)vLo);
-//zz }
-//zz else
-//zz return mc_rd_V8_SLOWLY(a);
-//zz # endif
}
=20
VGA_REGPARM(1)
@@ -1443,38 +1190,6 @@
{
PROF_EVENT(71, "helperc_STOREV8");
mc_STOREVn_slow( a, 8, vbytes, False/*littleendian*/ );
-//zz # ifdef VG_DEBUG_MEMORY
-//zz mc_wr_V8_SLOWLY(a, vbytes);
-//zz # else
-//zz if (VG_IS_8_ALIGNED(a)) {
-//zz UInt sec_no =3D shiftRight16(a) & 0xFFFF;
-//zz SecMap* sm =3D primary_map[sec_no];
-//zz UInt a_off =3D (SM_OFF(a)) >> 3;
-//zz if (!IS_DISTINGUISHED_SM(sm) && sm->abits[a_off] =3D=3D VGM_B=
YTE_VALID) {
-//zz /* a is 8-aligned, mapped, and addressible. */
-//zz UInt v_off =3D SM_OFF(a);
-//zz UInt vHi =3D (UInt)(vbytes >> 32);
-//zz UInt vLo =3D (UInt)vbytes;
-//zz /* LITTLE-ENDIAN */
-//zz ((UInt*)(sm->vbyte))[ (v_off >> 2) ] =3D vLo;
-//zz ((UInt*)(sm->vbyte))[ (v_off >> 2) + 1 ] =3D vHi;
-//zz } else {
-//zz mc_wr_V8_SLOWLY(a, vbytes);
-//zz }
-//zz return;
-//zz }
-//zz else
-//zz if (VG_IS_4_ALIGNED(a)) {
-//zz UInt vHi =3D (UInt)(vbytes >> 32);
-//zz UInt vLo =3D (UInt)vbytes;
-//zz /* LITTLE-ENDIAN */
-//zz MC_(helperc_STOREV4)(a+0, vLo);
-//zz MC_(helperc_STOREV4)(a+4, vHi);
-//zz return;
-//zz }
-//zz else
-//zz mc_wr_V8_SLOWLY(a, vbytes);
-//zz # endif
}
=20
/* ------------------------ Size =3D 4 ------------------------ */
@@ -1576,7 +1291,6 @@
# endif
}
=20
-
/* ------------------------ Size =3D 2 ------------------------ */
=20
VGA_REGPARM(1)
@@ -1627,7 +1341,6 @@
# endif
}
=20
-
VGA_REGPARM(2)
void MC_(helperc_STOREV2) ( Addr aA, UWord vbytes )
{
@@ -1671,7 +1384,6 @@
# endif
}
=20
-
/* ------------------------ Size =3D 1 ------------------------ */
=20
VGA_REGPARM(1)
@@ -1766,311 +1478,11 @@
}
=20
=20
-//zz /*------------------------------------------------------------*/
-//zz /*--- Fallback functions to handle cases that the above ---*/
-//zz /*--- VG_(helperc_{LD,ST}V{1,2,4,8}) can't manage. ---*/
-//zz /*------------------------------------------------------------*/
-//zz=20
-//zz /* ------------------------ Size =3D 8 ------------------------ */
-//zz=20
-//zz static ULong mc_rd_V8_SLOWLY ( Addr a )
-//zz {
-//zz Bool a0ok, a1ok, a2ok, a3ok, a4ok, a5ok, a6ok, a7ok;
-//zz UInt vb0, vb1, vb2, vb3, vb4, vb5, vb6, vb7;
-//zz=20
-//zz PROF_EVENT(70);
-//zz=20
-//zz /* First establish independently the addressibility of the 4 byt=
es
-//zz involved. */
-//zz a0ok =3D get_abit(a+0) =3D=3D VGM_BIT_VALID;
-//zz a1ok =3D get_abit(a+1) =3D=3D VGM_BIT_VALID;
-//zz a2ok =3D get_abit(a+2) =3D=3D VGM_BIT_VALID;
-//zz a3ok =3D get_abit(a+3) =3D=3D VGM_BIT_VALID;
-//zz a4ok =3D get_abit(a+4) =3D=3D VGM_BIT_VALID;
-//zz a5ok =3D get_abit(a+5) =3D=3D VGM_BIT_VALID;
-//zz a6ok =3D get_abit(a+6) =3D=3D VGM_BIT_VALID;
-//zz a7ok =3D get_abit(a+7) =3D=3D VGM_BIT_VALID;
-//zz=20
-//zz /* Also get the validity bytes for the address. */
-//zz vb0 =3D (UInt)get_vbyte(a+0);
-//zz vb1 =3D (UInt)get_vbyte(a+1);
-//zz vb2 =3D (UInt)get_vbyte(a+2);
-//zz vb3 =3D (UInt)get_vbyte(a+3);
-//zz vb4 =3D (UInt)get_vbyte(a+4);
-//zz vb5 =3D (UInt)get_vbyte(a+5);
-//zz vb6 =3D (UInt)get_vbyte(a+6);
-//zz vb7 =3D (UInt)get_vbyte(a+7);
-//zz=20
-//zz /* Now distinguish 3 cases */
-//zz=20
-//zz /* Case 1: the address is completely valid, so:
-//zz - no addressing error
-//zz - return V bytes as read from memory
-//zz */
-//zz if (a0ok && a1ok && a2ok && a3ok && a4ok && a5ok && a6ok && a7ok=
) {
-//zz ULong vw =3D VGM_WORD64_INVALID;
-//zz vw <<=3D 8; vw |=3D vb7;
-//zz vw <<=3D 8; vw |=3D vb6;
-//zz vw <<=3D 8; vw |=3D vb5;
-//zz vw <<=3D 8; vw |=3D vb4;
-//zz vw <<=3D 8; vw |=3D vb3;
-//zz vw <<=3D 8; vw |=3D vb2;
-//zz vw <<=3D 8; vw |=3D vb1;
-//zz vw <<=3D 8; vw |=3D vb0;
-//zz return vw;
-//zz }
-//zz=20
-//zz /* Case 2: the address is completely invalid. =20
-//zz - emit addressing error
-//zz - return V word indicating validity. =20
-//zz This sounds strange, but if we make loads from invalid addres=
ses=20
-//zz give invalid data, we also risk producing a number of confusi=
ng
-//zz undefined-value errors later, which confuses the fact that th=
e
-//zz error arose in the first place from an invalid address.=20
-//zz */
-//zz /* VG_(printf)("%p (%d %d %d %d)\n", a, a0ok, a1ok, a2ok, a3ok);=
*/
-//zz if (!MAC_(clo_partial_loads_ok)=20
-//zz || ((a & 7) !=3D 0)
-//zz || (!a0ok && !a1ok && !a2ok && !a3ok && !a4ok && !a5ok && !a=
6ok && !a7ok)) {
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 8, Fal=
se );
-//zz return VGM_WORD64_VALID;
-//zz }
-//zz=20
-//zz /* Case 3: the address is partially valid. =20
-//zz - no addressing error
-//zz - returned V word is invalid where the address is invalid,=20
-//zz and contains V bytes from memory otherwise.=20
-//zz Case 3 is only allowed if MC_(clo_partial_loads_ok) is True
-//zz (which is the default), and the address is 4-aligned. =20
-//zz If not, Case 2 will have applied.
-//zz */
-//zz tl_assert(MAC_(clo_partial_loads_ok));
-//zz {
-//zz ULong vw =3D VGM_WORD64_INVALID;
-//zz vw <<=3D 8; vw |=3D (a7ok ? vb7 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a6ok ? vb6 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a5ok ? vb5 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a4ok ? vb4 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a3ok ? vb3 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a2ok ? vb2 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a1ok ? vb1 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a0ok ? vb0 : VGM_BYTE_INVALID);
-//zz return vw;
-//zz }
-//zz }
-//zz=20
-//zz static void mc_wr_V8_SLOWLY ( Addr a, ULong vbytes )
-//zz {
-//zz /* Check the address for validity. */
-//zz Bool aerr =3D False;
-//zz PROF_EVENT(71);
-//zz=20
-//zz if (get_abit(a+0) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+1) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+2) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+3) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+4) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+5) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+6) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+7) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz=20
-//zz /* Store the V bytes, remembering to do it little-endian-ly. */
-//zz set_vbyte( a+0, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+1, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+2, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+3, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+4, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+5, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+6, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+7, vbytes & 0x000000FF );
-//zz=20
-//zz /* If an address error has happened, report it. */
-//zz if (aerr)
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 8, Tru=
e );
-//zz }
-//zz=20
-//zz /* ------------------------ Size =3D 4 ------------------------ */
-//zz=20
-//zz static UInt mc_rd_V4_SLOWLY ( Addr a )
-//zz {
-//zz Bool a0ok, a1ok, a2ok, a3ok;
-//zz UInt vb0, vb1, vb2, vb3;
-//zz=20
-//zz PROF_EVENT(70);
-//zz=20
-//zz /* First establish independently the addressibility of the 4 byt=
es
-//zz involved. */
-//zz a0ok =3D get_abit(a+0) =3D=3D VGM_BIT_VALID;
-//zz a1ok =3D get_abit(a+1) =3D=3D VGM_BIT_VALID;
-//zz a2ok =3D get_abit(a+2) =3D=3D VGM_BIT_VALID;
-//zz a3ok =3D get_abit(a+3) =3D=3D VGM_BIT_VALID;
-//zz=20
-//zz /* Also get the validity bytes for the address. */
-//zz vb0 =3D (UInt)get_vbyte(a+0);
-//zz vb1 =3D (UInt)get_vbyte(a+1);
-//zz vb2 =3D (UInt)get_vbyte(a+2);
-//zz vb3 =3D (UInt)get_vbyte(a+3);
-//zz=20
-//zz /* Now distinguish 3 cases */
-//zz=20
-//zz /* Case 1: the address is completely valid, so:
-//zz - no addressing error
-//zz - return V bytes as read from memory
-//zz */
-//zz if (a0ok && a1ok && a2ok && a3ok) {
-//zz UInt vw =3D VGM_WORD_INVALID;
-//zz vw <<=3D 8; vw |=3D vb3;
-//zz vw <<=3D 8; vw |=3D vb2;
-//zz vw <<=3D 8; vw |=3D vb1;
-//zz vw <<=3D 8; vw |=3D vb0;
-//zz return vw;
-//zz }
-//zz=20
-//zz /* Case 2: the address is completely invalid. =20
-//zz - emit addressing error
-//zz - return V word indicating validity. =20
-//zz This sounds strange, but if we make loads from invalid addres=
ses=20
-//zz give invalid data, we also risk producing a number of confusi=
ng
-//zz undefined-value errors later, which confuses the fact that th=
e
-//zz error arose in the first place from an invalid address.=20
-//zz */
-//zz /* VG_(printf)("%p (%d %d %d %d)\n", a, a0ok, a1ok, a2ok, a3ok);=
*/
-//zz if (!MAC_(clo_partial_loads_ok)=20
-//zz || ((a & 3) !=3D 0)
-//zz || (!a0ok && !a1ok && !a2ok && !a3ok)) {
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 4, Fal=
se );
-//zz return (VGM_BYTE_VALID << 24) | (VGM_BYTE_VALID << 16)=20
-//zz | (VGM_BYTE_VALID << 8) | VGM_BYTE_VALID;
-//zz }
-//zz=20
-//zz /* Case 3: the address is partially valid. =20
-//zz - no addressing error
-//zz - returned V word is invalid where the address is invalid,=20
-//zz and contains V bytes from memory otherwise.=20
-//zz Case 3 is only allowed if MC_(clo_partial_loads_ok) is True
-//zz (which is the default), and the address is 4-aligned. =20
-//zz If not, Case 2 will have applied.
-//zz */
-//zz tl_assert(MAC_(clo_partial_loads_ok));
-//zz {
-//zz UInt vw =3D VGM_WORD_INVALID;
-//zz vw <<=3D 8; vw |=3D (a3ok ? vb3 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a2ok ? vb2 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a1ok ? vb1 : VGM_BYTE_INVALID);
-//zz vw <<=3D 8; vw |=3D (a0ok ? vb0 : VGM_BYTE_INVALID);
-//zz return vw;
-//zz }
-//zz }
-//zz=20
-//zz static void mc_wr_V4_SLOWLY ( Addr a, UInt vbytes )
-//zz {
-//zz /* Check the address for validity. */
-//zz Bool aerr =3D False;
-//zz PROF_EVENT(71);
-//zz=20
-//zz if (get_abit(a+0) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+1) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+2) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+3) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz=20
-//zz /* Store the V bytes, remembering to do it little-endian-ly. */
-//zz set_vbyte( a+0, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+1, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+2, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+3, vbytes & 0x000000FF );
-//zz=20
-//zz /* If an address error has happened, report it. */
-//zz if (aerr)
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 4, Tru=
e );
-//zz }
-//zz=20
-//zz /* ------------------------ Size =3D 2 ------------------------ */
-//zz=20
-//zz static UInt mc_rd_V2_SLOWLY ( Addr a )
-//zz {
-//zz /* Check the address for validity. */
-//zz UInt vw =3D VGM_WORD_INVALID;
-//zz Bool aerr =3D False;
-//zz PROF_EVENT(72);
-//zz=20
-//zz if (get_abit(a+0) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+1) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz=20
-//zz /* Fetch the V bytes, remembering to do it little-endian-ly. */
-//zz vw <<=3D 8; vw |=3D (UInt)get_vbyte(a+1);
-//zz vw <<=3D 8; vw |=3D (UInt)get_vbyte(a+0);
-//zz=20
-//zz /* If an address error has happened, report it. */
-//zz if (aerr) {
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 2, Fal=
se );
-//zz vw =3D (VGM_BYTE_INVALID << 24) | (VGM_BYTE_INVALID << 16)=20
-//zz | (VGM_BYTE_VALID << 8) | (VGM_BYTE_VALID);
-//zz }
-//zz return vw; =20
-//zz }
-//zz=20
-//zz static void mc_wr_V2_SLOWLY ( Addr a, UInt vbytes )
-//zz {
-//zz /* Check the address for validity. */
-//zz Bool aerr =3D False;
-//zz PROF_EVENT(73);
-//zz=20
-//zz if (get_abit(a+0) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz if (get_abit(a+1) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz=20
-//zz /* Store the V bytes, remembering to do it little-endian-ly. */
-//zz set_vbyte( a+0, vbytes & 0x000000FF ); vbytes >>=3D 8;
-//zz set_vbyte( a+1, vbytes & 0x000000FF );
-//zz=20
-//zz /* If an address error has happened, report it. */
-//zz if (aerr)
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 2, Tru=
e );
-//zz }
-//zz=20
-//zz /* ------------------------ Size =3D 1 ------------------------ */
-//zz=20
-//zz static UInt mc_rd_V1_SLOWLY ( Addr a )
-//zz {
-//zz /* Check the address for validity. */
-//zz UInt vw =3D VGM_WORD_INVALID;
-//zz Bool aerr =3D False;
-//zz PROF_EVENT(74);
-//zz=20
-//zz if (get_abit(a+0) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz=20
-//zz /* Fetch the V byte. */
-//zz vw <<=3D 8; vw |=3D (UInt)get_vbyte(a+0);
-//zz=20
-//zz /* If an address error has happened, report it. */
-//zz if (aerr) {
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 1, Fal=
se );
-//zz vw =3D (VGM_BYTE_INVALID << 24) | (VGM_BYTE_INVALID << 16)=20
-//zz | (VGM_BYTE_INVALID << 8) | (VGM_BYTE_VALID);
-//zz }
-//zz return vw; =20
-//zz }
-//zz=20
-//zz static void mc_wr_V1_SLOWLY ( Addr a, UInt vbytes )
-//zz {
-//zz /* Check the address for validity. */
-//zz Bool aerr =3D False;
-//zz PROF_EVENT(75);
-//zz if (get_abit(a+0) !=3D VGM_BIT_VALID) aerr =3D True;
-//zz=20
-//zz /* Store the V bytes, remembering to do it little-endian-ly. */
-//zz set_vbyte( a+0, vbytes & 0x000000FF );
-//zz=20
-//zz /* If an address error has happened, report it. */
-//zz if (aerr)
-//zz MAC_(record_address_error)( VG_(get_running_tid)(), a, 1, Tru=
e );
-//zz }
+/*------------------------------------------------------------*/
+/*--- Functions called directly from generated code: ---*/
+/*--- Value-check failure handlers. ---*/
+/*------------------------------------------------------------*/
=20
-
-/* ---------------------------------------------------------------------
- Called from generated code, or from the assembly helpers.
- Handlers for value check failures.
- ------------------------------------------------------------------ */
-
void MC_(helperc_value_check0_fail) ( void )
{
MC_(record_value_error) ( VG_(get_running_tid)(), 0 );
@@ -2220,10 +1632,57 @@
}
=20
=20
-/* ---------------------------------------------------------------------
- Sanity check machinery (permanently engaged).
- ------------------------------------------------------------------ */
+/*------------------------------------------------------------*/
+/*--- Initialisation ---*/
+/*------------------------------------------------------------*/
=20
+static void init_shadow_memory ( void )
+{
+ Int i;
+ SecMap* sm;
+
+ /* Build the 3 distinguished secondaries */
+ tl_assert(VGM_BIT_INVALID =3D=3D 1);
+ tl_assert(VGM_BIT_VALID =3D=3D 0);
+ tl_assert(VGM_BYTE_INVALID =3D=3D 0xFF);
+ tl_assert(VGM_BYTE_VALID =3D=3D 0);
+
+ /* Set A invalid, V invalid. */
+ sm =3D &sm_distinguished[SM_DIST_NOACCESS];
+ for (i =3D 0; i < 65536; i++)
+ sm->vbyte[i] =3D VGM_BYTE_INVALID;
+ for (i =3D 0; i < 8192; i++)
+ sm->abits[i] =3D VGM_BYTE_INVALID;
+
+ /* Set A valid, V invalid. */
+ sm =3D &sm_distinguished[SM_DIST_ACCESS_UNDEFINED];
+ for (i =3D 0; i < 65536; i++)
+ sm->vbyte[i] =3D VGM_BYTE_INVALID;
+ for (i =3D 0; i < 8192; i++)
+ sm->abits[i] =3D VGM_BYTE_VALID;
+
+ /* Set A valid, V valid. */
+ sm =3D &sm_distinguished[SM_DIST_ACCESS_DEFINED];
+ for (i =3D 0; i < 65536; i++)
+ sm->vbyte[i] =3D VGM_BYTE_VALID;
+ for (i =3D 0; i < 8192; i++)
+ sm->abits[i] =3D VGM_BYTE_VALID;
+
+ /* Set up the primary map. */
+ /* These entries gradually get overwritten as the used address
+ space expands. */
+ for (i =3D 0; i < N_PRIMARY_MAP; i++)
+ primary_map[i] =3D &sm_distinguished[SM_DIST_NOACCESS];
+
+ /* auxmap_size =3D auxmap_used =3D 0;=20
+ no ... these are statically initialised */
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Sanity check machinery (permanently engaged) ---*/
+/*------------------------------------------------------------*/
+
Bool TL_(cheap_sanity_check) ( void )
{
/* nothing useful we can rapidly check */
@@ -2336,16 +1795,6 @@
}
=20
=20
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-/////////////////////////////////////////////////////////////////
-
/*------------------------------------------------------------*/
/*--- Command line args ---*/
/*------------------------------------------------------------*/
|
|
From: <sv...@va...> - 2005-04-22 20:23:36
|
Author: sewardj
Date: 2005-04-22 21:23:27 +0100 (Fri, 22 Apr 2005)
New Revision: 3542
Modified:
trunk/memcheck/mc_main.c
Log:
mc_LOADVn_slow: When loading from invalid addresses, mark loaded data
as defined.
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-22 16:29:19 UTC (rev 3541)
+++ trunk/memcheck/mc_main.c 2005-04-22 20:23:27 UTC (rev 3542)
@@ -322,9 +322,9 @@
ULong mc_LOADVn_slow ( Addr a, SizeT szB, Bool bigendian )
{
/* Make up a result V word, which contains the loaded data for
- valid addresses and Undefined for invalid addresses. Iterate
- over the bytes in the word, from the most significant down to
- the least. */
+ valid addresses and Defined for invalid addresses. Iterate over
+ the bytes in the word, from the most significant down to the
+ least. */
ULong vw =3D VGM_WORD64_INVALID;
SizeT i =3D szB-1;
SizeT n_addrs_bad =3D 0;
@@ -343,7 +343,7 @@
if (!aok)
n_addrs_bad++;
vw <<=3D 8;=20
- vw |=3D 0xFF & (aok ? vbyte : VGM_BYTE_INVALID);
+ vw |=3D 0xFF & (aok ? vbyte : VGM_BYTE_VALID);
if (i =3D=3D 0) break;
i--;
}
@@ -351,8 +351,6 @@
if (n_addrs_bad > 0)
MAC_(record_address_error)( VG_(get_running_tid)(), a, szB, False =
);
=20
- //if (n_addrs_bad =3D=3D n)
- // vw =3D VGM_WORD64_VALID;
return vw;
}
=20
|
|
From: Nicholas N. <nj...@cs...> - 2005-04-22 18:31:55
|
On Fri, 22 Apr 2005, Benoit Peccatte wrote: >> How do you detect source lines with code never executed? > > Valgrind reads a part of the dwarf informations (which are available > when you compile with -g option). Debug informations contain a list of > locations where code can be found. I read all of them for each segment > and thus know what could be run. That's interesting, I've been working on a coverage tool that works in the same way. N |
|
From: <sv...@va...> - 2005-04-22 16:29:27
|
Author: sewardj
Date: 2005-04-22 17:29:19 +0100 (Fri, 22 Apr 2005)
New Revision: 3541
Modified:
trunk/memcheck/Makefile.am
trunk/memcheck/mac_shared.h
trunk/memcheck/mc_main.c
Log:
Mostly finish fixing fast-path cases. Also enhance sanity checking.
Modified: trunk/memcheck/Makefile.am
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/Makefile.am 2005-04-21 22:16:29 UTC (rev 3540)
+++ trunk/memcheck/Makefile.am 2005-04-22 16:29:19 UTC (rev 3541)
@@ -34,3 +34,4 @@
=20
mac_replace_strmem.o: CFLAGS +=3D -fno-omit-frame-pointer
=20
+mc_main.o: CFLAGS +=3D -fomit-frame-pointer
Modified: trunk/memcheck/mac_shared.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mac_shared.h 2005-04-21 22:16:29 UTC (rev 3540)
+++ trunk/memcheck/mac_shared.h 2005-04-22 16:29:19 UTC (rev 3541)
@@ -171,7 +171,7 @@
VgpToolCC;
=20
/* Define to collect detailed performance info. */
-#define MAC_PROFILE_MEMORY
+/* #define MAC_PROFILE_MEMORY */
=20
#ifdef MAC_PROFILE_MEMORY
# define N_PROF_EVENTS 500
@@ -196,13 +196,13 @@
#endif /* MAC_PROFILE_MEMORY */
=20
=20
-//zz /*------------------------------------------------------------*/
-//zz /*--- V and A bits (Victoria & Albert ?) ---*/
-//zz /*------------------------------------------------------------*/
-//zz=20
-//zz /* expand 1 bit -> 8 */
-//zz #define BIT_EXPAND(b) ((~(((UChar)(b) & 1) - 1)) & 0xFF)
-//zz=20
+/*------------------------------------------------------------*/
+/*--- V and A bits (Victoria & Albert ?) ---*/
+/*------------------------------------------------------------*/
+
+/* expand 1 bit -> 8 */
+#define BIT_TO_BYTE(b) ((~(((UChar)(b) & 1) - 1)) & 0xFF)
+
//zz #define SECONDARY_SHIFT 16
//zz #define SECONDARY_SIZE (1 << SECONDARY_SHIFT)
//zz #define SECONDARY_MASK (SECONDARY_SIZE - 1)
Modified: trunk/memcheck/mc_main.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/memcheck/mc_main.c 2005-04-21 22:16:29 UTC (rev 3540)
+++ trunk/memcheck/mc_main.c 2005-04-22 16:29:19 UTC (rev 3541)
@@ -35,6 +35,11 @@
sanity check:=20
auxmap only covers address space that the primary doesn't
auxmap entries non-duplicated (expensive)
+ there are no secondary map leaks. this can easily be established
+ by counting the number of secmaps issued, and ensuring that
+ the same number of pointers-to-secmaps from the main/aux
+ primary map can be found
+ there is only one pointer to each non-distinguished secmap.
=20
types of helper functions
=20
@@ -60,7 +65,7 @@
1 some sanity checking, fast cases are used
2 max sanity checking, only slow cases are used
*/
-#define VG_DEBUG_MEMORY 1
+#define VG_DEBUG_MEMORY 0
=20
=20
typedef enum {
@@ -79,17 +84,28 @@
/* The number of entries in the primary map can be altered. However
we hardwire the assumption that each secondary map covers precisely
64k of address space. */
+#define SECONDARY_SIZE 65536 /* DO NOT CHANGE */
+#define SECONDARY_MASK (SECONDARY_SIZE-1) /* DO NOT CHANGE */
=20
-/* Only change this. N_PRIMARY_MAPS *must* be a power of 2. */
+/* Only change this. N_PRIMARY_MAP *must* be a power of 2. */
#define N_PRIMARY_BITS 16
=20
/* Do not change this. */
-#define N_PRIMARY_MAPS (1 << N_PRIMARY_BITS)
+#define N_PRIMARY_MAP (1 << N_PRIMARY_BITS)
=20
/* Do not change this. */
-#define MAX_PRIMARY_ADDRESS (Addr)((((Addr)65536) * N_PRIMARY_MAPS)-1)
+#define MAX_PRIMARY_ADDRESS (Addr)((((Addr)65536) * N_PRIMARY_MAP)-1)
=20
=20
+/* --------------- Stats maps --------------- */
+
+static Int n_secmaps_issued =3D 0;
+static ULong n_auxmap_searches =3D 0;
+static ULong n_auxmap_cmps =3D 0;
+static Int n_sanity_cheap =3D 0;
+static Int n_sanity_expensive =3D 0;
+
+
/* --------------- Secondary maps --------------- */
=20
typedef=20
@@ -125,6 +141,7 @@
=20
new_sm =3D VG_(shadow_alloc)(sizeof(SecMap));
VG_(memcpy)(new_sm, dist_sm, sizeof(SecMap));
+ n_secmaps_issued++;
return new_sm;
}
=20
@@ -132,10 +149,10 @@
/* --------------- Primary maps --------------- */
=20
/* The main primary map. This covers some initial part of the address
- space, addresses 0 .. (N_PRIMARY_MAPS << 16)-1. The rest of it is
+ space, addresses 0 .. (N_PRIMARY_MAP << 16)-1. The rest of it is
handled using the auxiliary primary map. =20
*/
-static SecMap* primary_map[N_PRIMARY_MAPS];
+static SecMap* primary_map[N_PRIMARY_MAP];
=20
=20
/* An entry in the auxiliary primary map. base must be a 64k-aligned
@@ -145,7 +162,7 @@
*/
typedef
struct {=20
- Addr base;
+ Addr base;
SecMap* sm;
}
AuxMapEnt;
@@ -157,11 +174,7 @@
static Int auxmap_used =3D 0;
static AuxMapEnt* auxmap =3D &hacky_auxmaps[0];
=20
-/* Auxmap statistics */
-static ULong n_auxmap_searches =3D 0;
-static ULong n_auxmap_cmps =3D 0;
=20
-
/* Find an entry in the auxiliary map. If an entry is found, move it
one step closer to the front of the array, then return its address.
If an entry is not found, allocate one. Note carefully that
@@ -533,7 +546,7 @@
/* Set up the primary map. */
/* These entries gradually get overwritten as the used address
space expands. */
- for (i =3D 0; i < N_PRIMARY_MAPS; i++)
+ for (i =3D 0; i < N_PRIMARY_MAP; i++)
primary_map[i] =3D &sm_distinguished[SM_DIST_NOACCESS];
=20
/* auxmap_size =3D auxmap_used =3D 0;=20
@@ -668,16 +681,69 @@
/*--- Setting permissions over address ranges. ---*/
/*------------------------------------------------------------*/
=20
-static void set_address_range_perms ( Addr a, SizeT len,=20
+/* Given address 'a', find the place where the pointer to a's
+ secondary map lives. If a falls into the primary map, the returned
+ value points to one of the entries in primary_map[]. Otherwise,
+ the auxiliary primary map is searched for 'a', or an entry is
+ created for it; either way, the returned value points to the
+ relevant AuxMapEnt's .sm field.
+
+ The point of this is to enable set_address_range_perms to assign
+ secondary maps in a uniform way, without worrying about whether a
+ given secondary map is pointed to from the main or auxiliary
+ primary map. =20
+*/
+
+static SecMap** find_secmap_binder_for_addr ( Addr aA )
+{
+ if (aA > MAX_PRIMARY_ADDRESS) {
+ AuxMapEnt* am =3D find_or_alloc_in_auxmap(aA);
+ return &am->sm;
+ } else {
+ UWord a =3D (UWord)aA;
+ UWord sec_no =3D (UWord)(a >> 16);
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAP);
+# endif
+ return &primary_map[sec_no];
+ }
+}
+
+
+static void set_address_range_perms ( Addr aA, SizeT len,=20
UWord example_a_bit,
UWord example_v_bit )
{
+ PROF_EVENT(150, "set_address_range_perms");
+
+ /* Check the permissions make sense. */
+ tl_assert(example_a_bit =3D=3D VGM_BIT_VALID=20
+ || example_a_bit =3D=3D VGM_BIT_INVALID);
+ tl_assert(example_v_bit =3D=3D VGM_BIT_VALID=20
+ || example_v_bit =3D=3D VGM_BIT_INVALID);
+ if (example_a_bit =3D=3D VGM_BIT_INVALID)
+ tl_assert(example_v_bit =3D=3D VGM_BIT_INVALID);
+
+ if (len =3D=3D 0)
+ return;
+
+ if (VG_(clo_verbosity) > 0) {
+ if (len > 100 * 1000 * 1000) {
+ VG_(message)(Vg_UserMsg,=20
+ "Warning: set address range perms: "
+ "large range %u, a %d, v %d",
+ len, example_a_bit, example_v_bit );
+ }
+ }
+
+ UWord a =3D (UWord)aA;
+
+# if VG_DEBUG_MEMORY >=3D 2
+
+ /*------------------ debug-only case ------------------ */
SizeT i;
=20
- UWord example_vbyte =3D 1 & example_v_bit;
- example_vbyte |=3D (example_vbyte << 1);
- example_vbyte |=3D (example_vbyte << 2);
- example_vbyte |=3D (example_vbyte << 4);
+ UWord example_vbyte =3D BIT_TO_BYTE(example_v_bit);
=20
tl_assert(sizeof(SizeT) =3D=3D sizeof(Addr));
=20
@@ -691,152 +757,121 @@
for (i =3D 0; i < len; i++) {
set_abit_and_vbyte(a+i, example_a_bit, example_vbyte);
}
+
+# else
+
+ /*------------------ standard handling ------------------ */
+ UWord vbits8, abits8, vbits32, v_off, a_off;
+ SecMap* sm;
+ SecMap** binder;
+ SecMap* example_dsm;
+
+ /* Decide on the distinguished secondary that we might want
+ to use (part of the space-compression scheme). */
+ if (example_a_bit =3D=3D VGM_BIT_INVALID) {
+ example_dsm =3D &sm_distinguished[SM_DIST_NOACCESS];
+ } else {
+ if (example_v_bit =3D=3D VGM_BIT_VALID) {
+ example_dsm =3D &sm_distinguished[SM_DIST_ACCESS_DEFINED];
+ } else {
+ example_dsm =3D &sm_distinguished[SM_DIST_ACCESS_UNDEFINED];
+ }
+ }
+
+ /* Make various wider versions of the A/V values to use. */
+ vbits8 =3D BIT_TO_BYTE(example_v_bit);
+ abits8 =3D BIT_TO_BYTE(example_a_bit);
+ vbits32 =3D (vbits8 << 24) | (vbits8 << 16) | (vbits8 << 8) | vbits8;
+
+ /* Slowly do parts preceding 8-byte alignment. */
+ while (True) {
+ if (len =3D=3D 0) break;
+ PROF_EVENT(151, "set_address_range_perms-loop1-pre");
+ if (VG_IS_8_ALIGNED(a)) break;
+ set_abit_and_vbyte( a, example_a_bit, vbits8 );
+ a++;
+ len--;
+ } =20
+
+ if (len =3D=3D 0)
+ return;
+
+ tl_assert(VG_IS_8_ALIGNED(a) && len > 0);
+
+ /* Now go in steps of 8 bytes. */
+ binder =3D find_secmap_binder_for_addr(a);
+
+ while (True) {
+
+ if (len < 8) break;
+
+ PROF_EVENT(152, "set_address_range_perms-loop8");
+
+ if ((a & SECONDARY_MASK) =3D=3D 0) {
+ /* we just traversed a primary map boundary, so update the
+ binder. */
+ binder =3D find_secmap_binder_for_addr(a);
+ PROF_EVENT(153, "set_address_range_perms-update-binder");
+
+ /* Space-optimisation. If we are setting the entire
+ secondary map, just point this entry at one of our
+ distinguished secondaries. However, only do that if it
+ already points at a distinguished secondary, since doing
+ otherwise would leak the existing secondary. We could do
+ better and free up any pre-existing non-distinguished
+ secondary at this point, since we are guaranteed that each
+ non-dist secondary only has one pointer to it, and we have
+ that pointer right here. */
+ if (len >=3D SECONDARY_SIZE && is_distinguished_sm(*binder)) {
+ PROF_EVENT(154, "set_address_range_perms-entire-secmap");
+ *binder =3D example_dsm;
+ len -=3D SECONDARY_SIZE;
+ a +=3D SECONDARY_SIZE;
+ continue;
+ }
+ }
+
+ /* If the primary is already pointing to a distinguished map
+ with the same properties as we're trying to set, then leave
+ it that way. */
+ if (*binder =3D=3D example_dsm) {
+ a +=3D 8;
+ len -=3D 8;
+ continue;
+ }
+
+ /* Make sure it's OK to write the secondary. */
+ if (is_distinguished_sm(*binder))
+ *binder =3D copy_for_writing(*binder);
+
+ sm =3D *binder;
+ v_off =3D a & 0xFFFF;
+ a_off =3D v_off >> 3;
+ sm->abits[a_off] =3D (UChar)abits8;
+ ((UInt*)(sm->vbyte))[(v_off >> 2) + 0] =3D (UInt)vbits32;
+ ((UInt*)(sm->vbyte))[(v_off >> 2) + 1] =3D (UInt)vbits32;
+
+ a +=3D 8;
+ len -=3D 8;
+ }
+
+ if (len =3D=3D 0)
+ return;
+
+ tl_assert(VG_IS_8_ALIGNED(a) && len > 0 && len < 8);
+
+ /* Finish the upper fragment. */
+ while (True) {
+ if (len =3D=3D 0) break;
+ PROF_EVENT(155, "set_address_range_perms-loop1-post");
+ set_abit_and_vbyte ( a, example_a_bit, vbits8 );
+ a++;
+ len--;
+ } =20
+
+# endif
}
=20
-//zz {
-//zz UChar vbyte, abyte8;
-//zz UInt vword4, sm_off;
-//zz SecMap* sm;
-//zz=20
-//zz PROF_EVENT(30);
-//zz=20
-//zz if (len =3D=3D 0)
-//zz return;
-//zz=20
-//zz if (VG_(clo_verbosity) > 0) {
-//zz if (len > 100 * 1000 * 1000) {
-//zz VG_(message)(Vg_UserMsg,=20
-//zz "Warning: set address range perms: "
-//zz "large range %u, a %d, v %d",
-//zz len, example_a_bit, example_v_bit );
-//zz }
-//zz }
-//zz=20
-//zz VGP_PUSHCC(VgpSetMem);
-//zz=20
-//zz /* Requests to change permissions of huge address ranges may
-//zz indicate bugs in our machinery. 30,000,000 is arbitrary, but=
so
-//zz far all legitimate requests have fallen beneath that size. */
-//zz /* 4 Mar 02: this is just stupid; get rid of it. */
-//zz /* tl_assert(len < 30000000); */
-//zz=20
-//zz /* Check the permissions make sense. */
-//zz tl_assert(example_a_bit =3D=3D VGM_BIT_VALID=20
-//zz || example_a_bit =3D=3D VGM_BIT_INVALID);
-//zz tl_assert(example_v_bit =3D=3D VGM_BIT_VALID=20
-//zz || example_v_bit =3D=3D VGM_BIT_INVALID);
-//zz if (example_a_bit =3D=3D VGM_BIT_INVALID)
-//zz tl_assert(example_v_bit =3D=3D VGM_BIT_INVALID);
-//zz=20
-//zz /* The validity bits to write. */
-//zz vbyte =3D example_v_bit=3D=3DVGM_BIT_VALID=20
-//zz ? VGM_BYTE_VALID : VGM_BYTE_INVALID;
-//zz=20
-//zz /* In order that we can charge through the address space at 8
-//zz bytes/main-loop iteration, make up some perms. */
-//zz abyte8 =3D BIT_EXPAND(example_a_bit);
-//zz vword4 =3D (vbyte << 24) | (vbyte << 16) | (vbyte << 8) | vbyte;
-//zz=20
-//zz # ifdef VG_DEBUG_MEMORY
-//zz /* Do it ... */
-//zz while (True) {
-//zz PROF_EVENT(31);
-//zz if (len =3D=3D 0) break;
-//zz set_abit ( a, example_a_bit );
-//zz set_vbyte ( a, vbyte );
-//zz a++;
-//zz len--;
-//zz }
-//zz=20
-//zz # else
-//zz /* Slowly do parts preceding 8-byte alignment. */
-//zz while (True) {
-//zz PROF_EVENT(31);
-//zz if (len =3D=3D 0) break;
-//zz if ((a % 8) =3D=3D 0) break;
-//zz set_abit ( a, example_a_bit );
-//zz set_vbyte ( a, vbyte );
-//zz a++;
-//zz len--;
-//zz } =20
-//zz=20
-//zz if (len =3D=3D 0) {
-//zz VGP_POPCC(VgpSetMem);
-//zz return;
-//zz }
-//zz tl_assert((a % 8) =3D=3D 0 && len > 0);
-//zz=20
-//zz /* Now align to the next primary_map entry */
-//zz for (; (a & SECONDARY_MASK) && len >=3D 8; a +=3D 8, len -=3D 8)=
{
-//zz=20
-//zz PROF_EVENT(32);
-//zz /* If the primary is already pointing to a distinguished map
-//zz with the same properties as we're trying to set, then leav=
e
-//zz it that way. */
-//zz if (primary_map[PM_IDX(a)] =3D=3D DSM(example_a_bit, example_=
v_bit))
-//zz continue;
-//zz=20
-//zz ENSURE_MAPPABLE(a, "set_address_range_perms(fast)");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz sm->abits[sm_off >> 3] =3D abyte8;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 0] =3D vword4;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 1] =3D vword4;
-//zz }
-//zz=20
-//zz /* Now set whole secondary maps to the right distinguished value=
.
-//zz=20
-//zz Note that if the primary already points to a non-distinguishe=
d
-//zz secondary, then don't replace the reference. That would just
-//zz leak memory.
-//zz */
-//zz for(; len >=3D SECONDARY_SIZE; a +=3D SECONDARY_SIZE, len -=3D S=
ECONDARY_SIZE) {
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz=20
-//zz if (IS_DISTINGUISHED_SM(sm))
-//zz primary_map[PM_IDX(a)] =3D DSM(example_a_bit, example_v_bi=
t);
-//zz else {
-//zz VG_(memset)(sm->abits, abyte8, sizeof(sm->abits));
-//zz VG_(memset)(sm->vbyte, vbyte, sizeof(sm->vbyte));
-//zz }
-//zz }
-//zz=20
-//zz /* Now finish off any remains */
-//zz for (; len >=3D 8; a +=3D 8, len -=3D 8) {
-//zz PROF_EVENT(32);
-//zz=20
-//zz /* If the primary is already pointing to a distinguished map
-//zz with the same properties as we're trying to set, then leav=
e
-//zz it that way. */
-//zz if (primary_map[PM_IDX(a)] =3D=3D DSM(example_a_bit, example_=
v_bit))
-//zz continue;
-//zz=20
-//zz ENSURE_MAPPABLE(a, "set_address_range_perms(fast)");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz sm->abits[sm_off >> 3] =3D abyte8;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 0] =3D vword4;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 1] =3D vword4;
-//zz }
-//zz=20
-//zz /* Finish the upper fragment. */
-//zz while (True) {
-//zz PROF_EVENT(33);
-//zz if (len =3D=3D 0) break;
-//zz set_abit ( a, example_a_bit );
-//zz set_vbyte ( a, vbyte );
-//zz a++;
-//zz len--;
-//zz } =20
-//zz # endif
-//zz=20
-//zz /* Check that zero page and highest page have not been written t=
o
-//zz -- this could happen with buggy syscall wrappers. Today
-//zz (2001-04-26) had precisely such a problem with __NR_setitimer=
. */
-//zz tl_assert(TL_(cheap_sanity_check)());
-//zz VGP_POPCC(VgpSetMem);
-//zz }
-
/* Set permissions for address ranges ... */
=20
static void mc_make_noaccess ( Addr a, SizeT len )
@@ -871,7 +906,7 @@
# else
=20
if (EXPECTED_NOT_TAKEN(aA > MAX_PRIMARY_ADDRESS)) {
- PROF_EVENT(300, "make_aligned_word32_writable-slow1");
+ PROF_EVENT(301, "make_aligned_word32_writable-slow1");
mc_make_writable(aA, 4);
return;
}
@@ -879,7 +914,7 @@
UWord a =3D (UWord)aA;
UWord sec_no =3D (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
@@ -919,7 +954,7 @@
UWord a =3D (UWord)aA;
UWord sec_no =3D (UWord)(a >> 16);
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
@@ -944,41 +979,80 @@
=20
/* Nb: by "aligned" here we mean 8-byte aligned */
static __inline__
-void make_aligned_word64_writable(Addr a)
+void make_aligned_word64_writable ( Addr aA )
{
- PROF_EVENT(45, "make_aligned_word64_writable");
- mc_make_writable(a, 8);
-//zz SecMap* sm;
-//zz UInt sm_off;
-//zz=20
-//zz VGP_PUSHCC(VgpESPAdj);
-//zz ENSURE_MAPPABLE(a, "make_aligned_doubleword_writable");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz sm->abits[sm_off >> 3] =3D VGM_BYTE_VALID;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 0] =3D VGM_WORD_INVALID;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 1] =3D VGM_WORD_INVALID;
-//zz VGP_POPCC(VgpESPAdj);
+ PROF_EVENT(320, "make_aligned_word64_writable");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ mc_make_writable(aA, 8);
+# else
+
+ if (EXPECTED_NOT_TAKEN(aA > MAX_PRIMARY_ADDRESS)) {
+ PROF_EVENT(321, "make_aligned_word64_writable-slow1");
+ mc_make_writable(aA, 8);
+ return;
+ }
+
+ UWord a =3D (UWord)aA;
+ UWord sec_no =3D (UWord)(a >> 16);
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAP);
+# endif
+
+ if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
+ primary_map[sec_no] =3D copy_for_writing(primary_map[sec_no]);
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+
+ /* Paint the new area as uninitialised. */
+ ((ULong*)(sm->vbyte))[v_off >> 3] =3D VGM_WORD64_INVALID;
+
+ /* Make the relevant area accessible. */
+ sm->abits[a_off] =3D VGM_BYTE_VALID;
+# endif
}
=20
+
static __inline__
-void make_aligned_word64_noaccess(Addr a)
+void make_aligned_word64_noaccess ( Addr aA )
{
- PROF_EVENT(46, "make_aligned_word64_noaccess");
- mc_make_noaccess(a, 8);
-//zz SecMap* sm;
-//zz UInt sm_off;
-//zz=20
-//zz VGP_PUSHCC(VgpESPAdj);
-//zz ENSURE_MAPPABLE(a, "make_aligned_doubleword_noaccess");
-//zz sm =3D primary_map[PM_IDX(a)];
-//zz sm_off =3D SM_OFF(a);
-//zz sm->abits[sm_off >> 3] =3D VGM_BYTE_INVALID;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 0] =3D VGM_WORD_INVALID;
-//zz ((UInt*)(sm->vbyte))[(sm_off >> 2) + 1] =3D VGM_WORD_INVALID;
-//zz VGP_POPCC(VgpESPAdj);
+ PROF_EVENT(330, "make_aligned_word64_noaccess");
+
+# if VG_DEBUG_MEMORY >=3D 2
+ mc_make_noaccess(aA, 8);
+# else
+
+ if (EXPECTED_NOT_TAKEN(aA > MAX_PRIMARY_ADDRESS)) {
+ PROF_EVENT(331, "make_aligned_word64_noaccess-slow1");
+ mc_make_noaccess(aA, 8);
+ return;
+ }
+
+ UWord a =3D (UWord)aA;
+ UWord sec_no =3D (UWord)(a >> 16);
+# if VG_DEBUG_MEMORY >=3D 1
+ tl_assert(sec_no < N_PRIMARY_MAP);
+# endif
+
+ if (EXPECTED_NOT_TAKEN(is_distinguished_sm(primary_map[sec_no])))
+ primary_map[sec_no] =3D copy_for_writing(primary_map[sec_no]);
+
+ SecMap* sm =3D primary_map[sec_no];
+ UWord v_off =3D a & 0xFFFF;
+ UWord a_off =3D v_off >> 3;
+
+ /* Paint the abandoned data as uninitialised. Probably not
+ necessary, but still .. */
+ ((ULong*)(sm->vbyte))[v_off >> 3] =3D VGM_WORD64_INVALID;
+
+ /* Make the abandoned area inaccessible. */
+ sm->abits[a_off] =3D VGM_BYTE_INVALID;
+# endif
}
=20
+
/* The stack-pointer update handling functions */
SP_UPDATE_HANDLERS ( make_aligned_word32_writable,
make_aligned_word32_noaccess,
@@ -1416,7 +1490,7 @@
return (UWord)mc_LOADVn_slow( aA, 4, False/*littleendian*/ );
# else
=20
- const UWord mask =3D ~((0x10000-4) | ((N_PRIMARY_MAPS-1) << 16));
+ const UWord mask =3D ~((0x10000-4) | ((N_PRIMARY_MAP-1) << 16));
UWord a =3D (UWord)aA;
=20
/* If any part of 'a' indicated by the mask is 1, either 'a' is not
@@ -1430,7 +1504,7 @@
UWord sec_no =3D (UWord)(a >> 16);
=20
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
SecMap* sm =3D primary_map[sec_no];
@@ -1464,10 +1538,10 @@
PROF_EVENT(230, "helperc_STOREV4");
=20
# if VG_DEBUG_MEMORY >=3D 2
- mc_STOREVn_slow( a, 4, (ULong)vbytes, False/*littleendian*/ );
+ mc_STOREVn_slow( aA, 4, (ULong)vbytes, False/*littleendian*/ );
# else
=20
- const UWord mask =3D ~((0x10000-4) | ((N_PRIMARY_MAPS-1) << 16));
+ const UWord mask =3D ~((0x10000-4) | ((N_PRIMARY_MAP-1) << 16));
UWord a =3D (UWord)aA;
=20
/* If any part of 'a' indicated by the mask is 1, either 'a' is not
@@ -1482,7 +1556,7 @@
UWord sec_no =3D (UWord)(a >> 16);
=20
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
SecMap* sm =3D primary_map[sec_no];
@@ -1516,7 +1590,7 @@
return (UWord)mc_LOADVn_slow( aA, 2, False/*littleendian*/ );
# else
=20
- const UWord mask =3D ~((0x10000-2) | ((N_PRIMARY_MAPS-1) << 16));
+ const UWord mask =3D ~((0x10000-2) | ((N_PRIMARY_MAP-1) << 16));
UWord a =3D (UWord)aA;
=20
/* If any part of 'a' indicated by the mask is 1, either 'a' is not
@@ -1530,7 +1604,7 @@
UWord sec_no =3D (UWord)(a >> 16);
=20
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
SecMap* sm =3D primary_map[sec_no];
@@ -1562,10 +1636,10 @@
PROF_EVENT(250, "helperc_STOREV2");
=20
# if VG_DEBUG_MEMORY >=3D 2
- mc_STOREVn_slow( a, 2, (ULong)vbytes, False/*littleendian*/ );
+ mc_STOREVn_slow( aA, 2, (ULong)vbytes, False/*littleendian*/ );
# else
=20
- const UWord mask =3D ~((0x10000-2) | ((N_PRIMARY_MAPS-1) << 16));
+ const UWord mask =3D ~((0x10000-2) | ((N_PRIMARY_MAP-1) << 16));
UWord a =3D (UWord)aA;
=20
/* If any part of 'a' indicated by the mask is 1, either 'a' is not
@@ -1580,7 +1654,7 @@
UWord sec_no =3D (UWord)(a >> 16);
=20
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
SecMap* sm =3D primary_map[sec_no];
@@ -1608,10 +1682,10 @@
PROF_EVENT(260, "helperc_LOADV1");
=20
# if VG_DEBUG_MEMORY >=3D 2
- return (UWord)mc_LOADVn_slow( a, 1, False/*littleendian*/ );
+ return (UWord)mc_LOADVn_slow( aA, 1, False/*littleendian*/ );
# else
=20
- const UWord mask =3D ~((0x10000-1) | ((N_PRIMARY_MAPS-1) << 16));
+ const UWord mask =3D ~((0x10000-1) | ((N_PRIMARY_MAP-1) << 16));
UWord a =3D (UWord)aA;
=20
/* If any part of 'a' indicated by the mask is 1, it means 'a'
@@ -1625,7 +1699,7 @@
UWord sec_no =3D (UWord)(a >> 16);
=20
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
SecMap* sm =3D primary_map[sec_no];
@@ -1659,7 +1733,7 @@
mc_STOREVn_slow( aA, 1, (ULong)vbyte, False/*littleendian*/ );
# else
=20
- const UWord mask =3D ~((0x10000-1) | ((N_PRIMARY_MAPS-1) << 16));
+ const UWord mask =3D ~((0x10000-1) | ((N_PRIMARY_MAP-1) << 16));
UWord a =3D (UWord)aA;
/* If any part of 'a' indicated by the mask is 1, it means 'a'
exceeds the range covered by the primary map. In which case we
@@ -1673,7 +1747,7 @@
UWord sec_no =3D (UWord)(a >> 16);
=20
# if VG_DEBUG_MEMORY >=3D 1
- tl_assert(sec_no < N_PRIMARY_MAPS);
+ tl_assert(sec_no < N_PRIMARY_MAP);
# endif
=20
SecMap* sm =3D primary_map[sec_no];
@@ -2155,49 +2229,111 @@
Bool TL_(cheap_sanity_check) ( void )
{
/* nothing useful we can rapidly check */
+ n_sanity_cheap++;
PROF_EVENT(490, "cheap_sanity_check");
return True;
}
=20
Bool TL_(expensive_sanity_check) ( void )
{
- Int i;
+ Int i, n_secmaps_found;
SecMap* sm;
+ Bool bad =3D False;
=20
+ n_sanity_expensive++;
PROF_EVENT(491, "expensive_sanity_check");
=20
- /* Check the 3 distinguished SMs. */
+ /* Check that the 3 distinguished SMs are still as they should
+ be. */
=20
/* Check A invalid, V invalid. */
sm =3D &sm_distinguished[SM_DIST_NOACCESS];
for (i =3D 0; i < 65536; i++)
if (!(sm->vbyte[i] =3D=3D VGM_BYTE_INVALID))
- return False;
+ bad =3D True;
for (i =3D 0; i < 8192; i++)
if (!(sm->abits[i] =3D=3D VGM_BYTE_INVALID))
- return False;
+ bad =3D True;
=20
/* Check A valid, V invalid. */
sm =3D &sm_distinguished[SM_DIST_ACCESS_UNDEFINED];
for (i =3D 0; i < 65536; i++)
if (!(sm->vbyte[i] =3D=3D VGM_BYTE_INVALID))
- return False;
+ bad =3D True;
for (i =3D 0; i < 8192; i++)
if (!(sm->abits[i] =3D=3D VGM_BYTE_VALID))
- return False;
+ bad =3D True;
=20
/* Check A valid, V valid. */
sm =3D &sm_distinguished[SM_DIST_ACCESS_DEFINED];
for (i =3D 0; i < 65536; i++)
if (!(sm->vbyte[i] =3D=3D VGM_BYTE_VALID))
- return False;
+ bad =3D True;
for (i =3D 0; i < 8192; i++)
if (!(sm->abits[i] =3D=3D VGM_BYTE_VALID))
- return False;
+ bad =3D True;
=20
+ if (bad) {
+ VG_(printf)("memcheck expensive sanity: "
+ "distinguished_secondaries have changed\n");
+ return False;
+ }
+
+ /* check nonsensical auxmap sizing */
if (auxmap_used > auxmap_size)
- return False;
+ bad =3D True;
=20
+ if (bad) {
+ VG_(printf)("memcheck expensive sanity: "
+ "nonsensical auxmap sizing\n");
+ return False;
+ }
+
+ /* check that the number of secmaps issued matches the number that
+ are reachable (iow, no secmap leaks) */
+ n_secmaps_found =3D 0;
+ for (i =3D 0; i < N_PRIMARY_MAP; i++) {
+ if (primary_map[i] =3D=3D NULL) {
+ bad =3D True;
+ } else {
+ if (!is_distinguished_sm(primary_map[i]))
+ n_secmaps_found++;
+ }
+ }
+
+ for (i =3D 0; i < auxmap_used; i++) {
+ if (auxmap[i].sm =3D=3D NULL) {
+ bad =3D True;
+ } else {
+ if (!is_distinguished_sm(auxmap[i].sm))
+ n_secmaps_found++;
+ }
+ }
+
+ if (n_secmaps_found !=3D n_secmaps_issued)
+ bad =3D True;
+
+ if (bad) {
+ VG_(printf)("memcheck expensive sanity: "
+ "apparent secmap leakage\n");
+ return False;
+ }
+
+ /* check that auxmap only covers address space that the primary
+ doesn't */
+ =20
+ for (i =3D 0; i < auxmap_used; i++)
+ if (auxmap[i].base <=3D MAX_PRIMARY_ADDRESS)
+ bad =3D True;
+
+ if (bad) {
+ VG_(printf)("memcheck expensive sanity: "
+ "auxmap covers wrong address space\n");
+ return False;
+ }
+
+ /* there is only one pointer to each secmap (expensive) */
+
return True;
}
=20
@@ -2607,14 +2743,47 @@
{
MAC_(common_fini)( mc_detect_memory_leaks );
=20
+ Int i, n_accessible_dist;
+ SecMap* sm;
+
if (VG_(clo_verbosity) > 1) {
VG_(message)(Vg_DebugMsg,
- "memcheck: auxmaps: %d auxmap entries (%dk, %dM) in use",
+ " memcheck: sanity checks: %d cheap, %d expensive",
+ n_sanity_cheap, n_sanity_expensive );
+ VG_(message)(Vg_DebugMsg,
+ " memcheck: auxmaps: %d auxmap entries (%dk, %dM) in use",
auxmap_used,=20
- 64 * auxmap_used, auxmap_used / 16 );
+ auxmap_used * 64,=20
+ auxmap_used / 16 );
VG_(message)(Vg_DebugMsg,
- "memcheck: auxmaps: %lld searches, %lld comparisons",
+ " memcheck: auxmaps: %lld searches, %lld comparisons",
n_auxmap_searches, n_auxmap_cmps ); =20
+ VG_(message)(Vg_DebugMsg,
+ " memcheck: secondaries: %d issued (%dk, %dM)",
+ n_secmaps_issued,=20
+ n_secmaps_issued * 64,
+ n_secmaps_issued / 16 ); =20
+
+ n_accessible_dist =3D 0;
+ for (i =3D 0; i < N_PRIMARY_MAP; i++) {
+ sm =3D primary_map[i];
+ if (is_distinguished_sm(sm)
+ && sm !=3D &sm_distinguished[SM_DIST_NOACCESS])
+ n_accessible_dist ++;
+ }
+ for (i =3D 0; i < auxmap_used; i++) {
+ sm =3D auxmap[i].sm;
+ if (is_distinguished_sm(sm)
+ && sm !=3D &sm_distinguished[SM_DIST_NOACCESS])
+ n_accessible_dist ++;
+ }
+
+ VG_(message)(Vg_DebugMsg,
+ " memcheck: secondaries: %d accessible and distinguished (%dk, =
%dM)",
+ n_accessible_dist,=20
+ n_accessible_dist * 64,
+ n_accessible_dist / 16 ); =20
+
}
=20
if (0) {
|
|
From: <sv...@va...> - 2005-04-22 15:58:58
|
Author: njn
Date: 2005-04-22 16:58:52 +0100 (Fri, 22 Apr 2005)
New Revision: 108
Modified:
trunk/gallery/users.html
Log:
Added FOX Toolkit.
Modified: trunk/gallery/users.html
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- trunk/gallery/users.html 2005-04-16 12:33:37 UTC (rev 107)
+++ trunk/gallery/users.html 2005-04-22 15:58:52 UTC (rev 108)
@@ -403,6 +403,10 @@
a free library which makes it fun to write a server that
connects to VNCViewer.</li>
=20
+ <li><a href=3D"http://www.fox-toolkit.org">FOX Toolkit:</a>
+ a platform-independent C++ toolkit for developing
+ graphical user interface applications.</li>
+
</ul>
=20
=20
|
|
From: Benoit P. <ben...@en...> - 2005-04-22 14:59:15
|
Le ven 22/04/2005 =E0 14:04, Josef Weidendorfer a =E9crit : > On Friday 22 April 2005 11:21, Benoit Peccatte wrote: > > The output is currently a file containing information about how many > > times each function/source line has been called or not called. >=20 > How do you detect source lines with code never executed? Valgrind reads a part of the dwarf informations (which are available when you compile with -g option). Debug informations contain a list of locations where code can be found. I read all of them for each segment and thus know what could be run. > > I made a perl script that parses it and produces a summary > > withpercentage per function and file. > > Now I'd like to add a source file viewer which could navigate through > > source files and display those informations. >=20 > How about using cachegrind's format as output? Then you can use=20 > cg_annotate/KCachegrind as Viewer/Browser. That's a good idea, I'm reading the documentation. But I think I may make a simple interface to be able to do it without kcachegrind.=20 > I would chose the following events related to a source line > 1) "Line has debug info" (i.e. relevant code for coverage): Yes 1, No 0 > 2) "Line was NOT executed" Yes: 1, No: 0 > As cg_annotate sorts according highest values, the "NOT" in 2) is importa= nt=20 > for the overview: You get the sorted list of function where a lot of line= s=20 > are never executed. We don't know when a line don't have debug info, we even don't know that it= exist. What about an event like this : events: Executed ExecCount Executed is 0 or 1 whereas ExecCount give the number of time each line was = executed. > It would be good here to define derived events like "2) divided by 1)", t= o get=20 > the percentage values calculated. This is interesting for cachegrind itse= lf=20 > (e.g. cache hit ratio). I am sure a patch for cg_annotate is welcome. > In KCachegrind, derived metrics are already possible, but only with opera= tor=20 > "+". I would add "/" for you ;-) > And callgrind even extends cachegrind's format to allow to specify derive= d=20 > metric formulas. I don't really understand here. Should I calculate the percentage withing t= he tool ? How can I specify or get values for summary such as percentage of executed = code=20 by function, by file or by soname ? > > > > I've got almost all data I need but I can't find in which directory= is > > > > a source file for a given symbol. Does valgrind read this in format= ion > > > > ? > > > > > > I don't think so. > > > > Too bad, should I use a DWARF reader library ? >=20 > A long time ago I had a local patch for prefixing every source file name = with=20 > the directory name while loading the debug info... This is exactly whan I need, I would be glad if you could find it. > But is this needed? > With cg_annotate / KCachegrind you can specify the directories where to l= ook=20 > for source. Of course there is a problem if a program has source files wi= th=20 > the same name. Yes it is, I work on a big project with many sub directories. I don't want the user to find himself where is each source file, especially if the software can do it automaticly. |
|
From: Josef W. <Jos...@gm...> - 2005-04-22 12:07:01
|
On Friday 22 April 2005 11:21, Benoit Peccatte wrote: > Le mer 20/04/2005 =C3=A0 01:52, Nicholas Nethercote a =C3=A9crit : > > On Tue, 19 Apr 2005, Benoit Peccatte wrote: > > > I'm developping a coverage tool for valgrind. > > > > How does it work? Is the output gcov-compatible? Does it give > > percentage coverage per file? I'm curious. > > The output is currently a file containing information about how many > times each function/source line has been called or not called. How do you detect source lines with code never executed? > I made a perl script that parses it and produces a summary > withpercentage per function and file. > Now I'd like to add a source file viewer which could navigate through > source files and display those informations. How about using cachegrind's format as output? Then you can use=20 cg_annotate/KCachegrind as Viewer/Browser. In this format, you can specify arbitrary events (names are specified in a= =20 header), and 64bit integer values for these events, related to source code= =20 lines (callgrind extends this to allow for relation to instructions). See cachegrind docu and/or=20 http://kcachegrind.sourceforge.net/cgi-bin/show.cgi/KcacheGrindCalltreeForm= at If that is not enough, the format could be extended (in an compatible way). I would chose the following events related to a source line 1) "Line has debug info" (i.e. relevant code for coverage): Yes 1, No 0 2) "Line was NOT executed" Yes: 1, No: 0 As cg_annotate sorts according highest values, the "NOT" in 2) is important= =20 for the overview: You get the sorted list of function where a lot of lines= =20 are never executed. It would be good here to define derived events like "2) divided by 1)", to = get=20 the percentage values calculated. This is interesting for cachegrind itself= =20 (e.g. cache hit ratio). I am sure a patch for cg_annotate is welcome. In KCachegrind, derived metrics are already possible, but only with operato= r=20 "+". I would add "/" for you ;-) And callgrind even extends cachegrind's format to allow to specify derived= =20 metric formulas. > > > I've got almost all data I need but I can't find in which directory is > > > a source file for a given symbol. Does valgrind read this in formation > > > ? > > > > I don't think so. > > Too bad, should I use a DWARF reader library ? A long time ago I had a local patch for prefixing every source file name wi= th=20 the directory name while loading the debug info... But is this needed? With cg_annotate / KCachegrind you can specify the directories where to loo= k=20 for source. Of course there is a problem if a program has source files with= =20 the same name. Josef |
|
From: Benoit P. <ben...@en...> - 2005-04-22 09:22:27
|
Le mer 20/04/2005 =E0 01:52, Nicholas Nethercote a =E9crit : > On Tue, 19 Apr 2005, Benoit Peccatte wrote: >=20 > > I'm developping a coverage tool for valgrind. >=20 > How does it work? Is the output gcov-compatible? Does it give percentag= e=20 > coverage per file? I'm curious. The output is currently a file containing information about how many times each function/source line has been called or not called. I made a perl script that parses it and produces a summary withpercentage per function and file. Now I'd like to add a source file viewer which could navigate through source files and display those informations. > > I've got almost all data I need but I can't find in which directory is = a=20 > > source file for a given symbol. Does valgrind read this in formation ? >=20 > I don't think so. Too bad, should I use a DWARF reader library ? |
|
From: <js...@ac...> - 2005-04-22 03:08:33
|
Nightly build on phoenix ( SuSE 9.1 ) started at 2005-04-22 03:50:01 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: (skipping, prereq failed: ../../../tests/cputest x86-mmxext) insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 201 tests, 5 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/writev (stderr) corecheck/tests/fdleak_fcntl (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <to...@co...> - 2005-04-22 02:36:03
|
Nightly build on dunsmere ( athlon, Fedora Core 3 ) started at 2005-04-22 03:30:04 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 176 tests, 78 stderr failures, 4 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:30:52
|
Nightly build on audi ( i686, Red Hat 9 ) started at 2005-04-22 03:25:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 175 tests, 76 stderr failures, 3 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <to...@co...> - 2005-04-22 02:26:30
|
Nightly build on dunsmere ( Fedora Core 3 ) started at 2005-04-22 03:20:04 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int sh: line 1: 15806 Segmentation fault VALGRINDLIB=/tmp/valgrind.22519/valgrind/.in_place /tmp/valgrind.22519/valgrind/./coregrind/valgrind --command-line-only=yes --memcheck:leak-check=no --addrcheck:leak-check=no --tool=none ./int >int.stdout.out 2>int.stderr.out pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 207 tests, 4 stderr failures, 0 stdout failures ================= memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_supp (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:25:53
|
Nightly build on ginetta ( i686, Red Hat 8.0 ) started at 2005-04-22 03:20:01 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 76 stderr failures, 3 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:22:26
|
Nightly build on audi ( Red Hat 9 ) started at 2005-04-22 03:15:01 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow fpu_lazy_eflags: valgrind ./fpu_lazy_eflags insn_basic: valgrind ./insn_basic insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 206 tests, 1 stderr failure, 0 stdout failures ================= memcheck/tests/scalar (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:21:07
|
Nightly build on alvis ( i686, Red Hat 7.3 ) started at 2005-04-22 03:15:02 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 174 tests, 76 stderr failures, 4 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/x86/fpeflags (stderr) memcheck/tests/x86/pushfpopf (stderr) memcheck/tests/x86/tronical (stderr) memcheck/tests/zeropage (stderr) none/tests/faultstatus (stderr) none/tests/x86/int (stderr) none/tests/yield (stdout) |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:20:25
|
Nightly build on honda ( x86_64, Fedora Core 3 ) started at 2005-04-22 03:10:07 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 156 tests, 84 stderr failures, 21 stdout failures ================= memcheck/tests/addressable (stdout) memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stdout) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stdout) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stdout) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stdout) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stdout) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stdout) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stdout) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stdout) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stdout) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stdout) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stdout) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stdout) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/zeropage (stdout) memcheck/tests/zeropage (stderr) corecheck/tests/fdleak_cmsg (stderr) corecheck/tests/fdleak_creat (stderr) corecheck/tests/fdleak_dup (stderr) corecheck/tests/fdleak_dup2 (stderr) corecheck/tests/fdleak_fcntl (stderr) corecheck/tests/fdleak_ipv4 (stderr) corecheck/tests/fdleak_open (stderr) corecheck/tests/fdleak_pipe (stderr) corecheck/tests/fdleak_socketpair (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) none/tests/yield (stdout) |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:16:46
|
Nightly build on ginetta ( Red Hat 8.0 ) started at 2005-04-22 03:10:02 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow insn_cmov: valgrind ./insn_cmov insn_fpu: valgrind ./insn_fpu insn_mmx: valgrind ./insn_mmx insn_mmxext: valgrind ./insn_mmxext insn_sse: valgrind ./insn_sse insn_sse2: (skipping, prereq failed: ../../../tests/cputest x86-sse2) int: valgrind ./int pushpopseg: valgrind ./pushpopseg rcl_assert: valgrind ./rcl_assert seg_override: valgrind ./seg_override -- Finished tests in none/tests/x86 ------------------------------------ yield: valgrind ./yield -- Finished tests in none/tests ---------------------------------------- == 205 tests, 3 stderr failures, 0 stdout failures ================= memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:11:35
|
Nightly build on alvis ( Red Hat 7.3 ) started at 2005-04-22 03:05:01 BST Checking out source tree ... done Configuring ... done Building ... done Running regression tests ... done Last 20 lines of log.verbose follow == 205 tests, 17 stderr failures, 0 stdout failures ================= memcheck/tests/addressable (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/distinguished-writes (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/pth_once (stderr) memcheck/tests/scalar (stderr) memcheck/tests/threadederrno (stderr) memcheck/tests/vgtest_ume (stderr) addrcheck/tests/leak-0 (stderr) addrcheck/tests/leak-cycle (stderr) addrcheck/tests/leak-regroot (stderr) addrcheck/tests/leak-tree (stderr) make: *** [regtest] Error 1 |
|
From: Tom H. <th...@cy...> - 2005-04-22 02:02:57
|
Nightly build on gill ( x86_64, Fedora Core 2 ) started at 2005-04-22 03:00:03 BST Checking out vex source tree ... done Building vex ... done Checking out valgrind source tree ... done Configuring valgrind ... done Building valgrind ... done Running regression tests ... failed Regression test results follow == 156 tests, 84 stderr failures, 21 stdout failures ================= memcheck/tests/addressable (stdout) memcheck/tests/addressable (stderr) memcheck/tests/badaddrvalue (stdout) memcheck/tests/badaddrvalue (stderr) memcheck/tests/badfree-2trace (stderr) memcheck/tests/badfree (stderr) memcheck/tests/badjump (stderr) memcheck/tests/badjump2 (stderr) memcheck/tests/badloop (stderr) memcheck/tests/badpoll (stderr) memcheck/tests/badrw (stderr) memcheck/tests/brk (stderr) memcheck/tests/brk2 (stderr) memcheck/tests/buflen_check (stderr) memcheck/tests/clientperm (stdout) memcheck/tests/clientperm (stderr) memcheck/tests/custom_alloc (stderr) memcheck/tests/describe-block (stderr) memcheck/tests/doublefree (stderr) memcheck/tests/error_counts (stdout) memcheck/tests/errs1 (stderr) memcheck/tests/execve (stderr) memcheck/tests/execve2 (stderr) memcheck/tests/exitprog (stderr) memcheck/tests/fprw (stderr) memcheck/tests/fwrite (stdout) memcheck/tests/fwrite (stderr) memcheck/tests/inits (stderr) memcheck/tests/inline (stdout) memcheck/tests/inline (stderr) memcheck/tests/leak-0 (stderr) memcheck/tests/leak-cycle (stderr) memcheck/tests/leak-regroot (stderr) memcheck/tests/leak-tree (stderr) memcheck/tests/leakotron (stdout) memcheck/tests/malloc1 (stderr) memcheck/tests/malloc2 (stderr) memcheck/tests/malloc3 (stdout) memcheck/tests/malloc3 (stderr) memcheck/tests/manuel1 (stdout) memcheck/tests/manuel1 (stderr) memcheck/tests/manuel2 (stdout) memcheck/tests/manuel2 (stderr) memcheck/tests/manuel3 (stderr) memcheck/tests/match-overrun (stderr) memcheck/tests/memalign2 (stderr) memcheck/tests/memalign_test (stderr) memcheck/tests/memcmptest (stdout) memcheck/tests/memcmptest (stderr) memcheck/tests/mempool (stderr) memcheck/tests/metadata (stdout) memcheck/tests/metadata (stderr) memcheck/tests/mismatches (stderr) memcheck/tests/mmaptest (stderr) memcheck/tests/nanoleak (stderr) memcheck/tests/nanoleak_supp (stderr) memcheck/tests/new_nothrow (stderr) memcheck/tests/new_override (stdout) memcheck/tests/new_override (stderr) memcheck/tests/null_socket (stderr) memcheck/tests/overlap (stdout) memcheck/tests/overlap (stderr) memcheck/tests/pointer-trace (stderr) memcheck/tests/post-syscall (stdout) memcheck/tests/post-syscall (stderr) memcheck/tests/realloc1 (stderr) memcheck/tests/realloc2 (stderr) memcheck/tests/realloc3 (stderr) memcheck/tests/scalar (stderr) memcheck/tests/scalar_exit_group (stderr) memcheck/tests/scalar_fork (stderr) memcheck/tests/scalar_supp (stderr) memcheck/tests/scalar_vfork (stderr) memcheck/tests/sigaltstack (stderr) memcheck/tests/signal2 (stdout) memcheck/tests/signal2 (stderr) memcheck/tests/sigprocmask (stderr) memcheck/tests/str_tester (stderr) memcheck/tests/supp1 (stderr) memcheck/tests/supp2 (stderr) memcheck/tests/suppfree (stderr) memcheck/tests/threadederrno (stdout) memcheck/tests/threadederrno (stderr) memcheck/tests/toobig-allocs (stderr) memcheck/tests/trivialleak (stderr) memcheck/tests/vgtest_ume (stderr) memcheck/tests/weirdioctl (stdout) memcheck/tests/weirdioctl (stderr) memcheck/tests/writev (stderr) memcheck/tests/zeropage (stdout) memcheck/tests/zeropage (stderr) corecheck/tests/fdleak_cmsg (stderr) corecheck/tests/fdleak_creat (stderr) corecheck/tests/fdleak_dup (stderr) corecheck/tests/fdleak_dup2 (stderr) corecheck/tests/fdleak_fcntl (stderr) corecheck/tests/fdleak_ipv4 (stderr) corecheck/tests/fdleak_open (stderr) corecheck/tests/fdleak_pipe (stderr) corecheck/tests/fdleak_socketpair (stderr) massif/tests/toobig-allocs (stderr) none/tests/faultstatus (stderr) none/tests/selfrun (stdout) none/tests/selfrun (stderr) none/tests/yield (stdout) |