[Valgrind-developers] valgrind

[Tom H. <th...@cy...>]

CVS commit by thughes: 

Added VG_(cpuid) to replace the various bits of inline assembler used
to query the CPU characteristics as the use of four implicit registers
causes havoc when GCC tries to inline and optimise the assembler.

Fix to bug #79696.


  A            coregrind/vg_cpuid.S   1.1
  M +10 -19    cachegrind/cg_main.c   1.66
  M +2 -1      coregrind/Makefile.am   1.72
  M +4 -27     coregrind/vg_to_ucode.c   1.139
  M +4 -0      include/vg_skin.h.base   1.19


--- valgrind/cachegrind/cg_main.c  #1.65:1.66
@@ -1178,13 +1178,4 @@ static cache_t clo_L2_cache = UNDEFINED_
  */
 
-static __inline__ void cpuid(Int n, UInt *a, UInt *b, UInt *c, UInt *d)
-{
-   __asm__ __volatile__ (
-    "cpuid"
-    : "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)      /* output */
-    : "0" (n)         /* input */
-    );
-}
-
 static void micro_ops_warn(Int actual_size, Int used_size, Int line_size)
 {
@@ -1215,5 +1206,5 @@ Int Intel_cache_info(Int level, cache_t*
    }
 
-   cpuid(2, (Int*)&info[0], (Int*)&info[4], 
+   VG_(cpuid)(2, (Int*)&info[0], (Int*)&info[4], 
             (Int*)&info[8], (Int*)&info[12]);
    trials  = info[0] - 1;   /* AL register - bits 0..7 of %eax */
@@ -1359,8 +1350,8 @@ Int AMD_cache_info(cache_t* I1c, cache_t
 {
    UInt ext_level;
-   Int dummy, model;
-   Int I1i, D1i, L2i;
+   UInt dummy, model;
+   UInt I1i, D1i, L2i;
    
-   cpuid(0x80000000, &ext_level, &dummy, &dummy, &dummy);
+   VG_(cpuid)(0x80000000, &ext_level, &dummy, &dummy, &dummy);
 
    if (0 == (ext_level & 0x80000000) || ext_level < 0x80000006) {
@@ -1371,8 +1362,8 @@ Int AMD_cache_info(cache_t* I1c, cache_t
    }
 
-   cpuid(0x80000005, &dummy, &dummy, &D1i, &I1i);
-   cpuid(0x80000006, &dummy, &dummy, &L2i, &dummy);
+   VG_(cpuid)(0x80000005, &dummy, &dummy, &D1i, &I1i);
+   VG_(cpuid)(0x80000006, &dummy, &dummy, &L2i, &dummy);
 
-   cpuid(0x1, &model, &dummy, &dummy, &dummy);
+   VG_(cpuid)(0x1, &model, &dummy, &dummy, &dummy);
    /*VG_(message)(Vg_UserMsg,"CPU model %04x",model);*/
 
@@ -1427,5 +1418,5 @@ Int get_caches_from_CPUID(cache_t* I1c, 
     * doesn't support CPUID. */
    if (__builtin_setjmp(cpuid_jmpbuf) == 0) {
-      cpuid(0, &level, (int*)&vendor_id[0], 
+      VG_(cpuid)(0, &level, (int*)&vendor_id[0], 
                        (int*)&vendor_id[8], (int*)&vendor_id[4]);    
       vendor_id[12] = '\0';

--- valgrind/coregrind/Makefile.am  #1.71:1.72
@@ -76,5 +76,6 @@
         vg_translate.c \
         vg_transtab.c \
-        vg_ldt.c
+        vg_ldt.c \
+        vg_cpuid.S
 stage2_DEPENDENCIES = $(srcdir)/valgrind.vs x86/stage2.lds
 stage2_LDFLAGS=-Wl,--export-dynamic -Wl,-e,_ume_entry  -g \

--- valgrind/coregrind/vg_to_ucode.c  #1.138:1.139
@@ -96,27 +96,4 @@ static Bool has_cpuid(void)
 }
 
-static inline UInt cpuid_eax(UInt eax)
-{
-   asm("cpuid" : "=a" (eax) : "0" (eax) : "bx", "cx", "dx");
-   return eax;
-}
-
-static inline void cpuid(UInt eax, 
-                         UInt *eax_ret, UInt *ebx_ret, UInt *ecx_ret, UInt *edx_ret)
-{
-   UInt ebx, ecx, edx;
-
-   asm("cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "0" (eax));
-
-   if (eax_ret)
-      *eax_ret = eax;
-   if (ebx_ret)
-      *ebx_ret = ebx;
-   if (ecx_ret)
-      *ecx_ret = ecx;
-   if (edx_ret)
-      *edx_ret = edx;
-}
-
 static void get_cpu_features(void)
 {
@@ -131,5 +108,5 @@ static void get_cpu_features(void)
    cpu_features[VG_INT_FEAT] |= (1 << (VG_X86_FEAT_CPUID%32));
 
-   cpuid(0, &cpuid_level, (UInt *)&vendorstr[0], (UInt *)&vendorstr[8], (UInt *)&vendorstr[4]);
+   VG_(cpuid)(0, &cpuid_level, (UInt *)&vendorstr[0], (UInt *)&vendorstr[8], (UInt *)&vendorstr[4]);
    vendorstr[12] = '\0';
 
@@ -141,10 +118,10 @@ static void get_cpu_features(void)
 
    if (cpuid_level >= 1)
-      cpuid(1, NULL, NULL, &cpu_features[VG_EXT_FEAT], &cpu_features[VG_X86_FEAT]);
+      VG_(cpuid)(1, NULL, NULL, &cpu_features[VG_EXT_FEAT], &cpu_features[VG_X86_FEAT]);
 
    switch(cpu_vendor) {
    case VG_CPU_VENDOR_AMD:
       /* get AMD-specific flags */
-      cpuid(0x80000001, NULL, NULL, NULL, &cpu_features[VG_AMD_FEAT]);
+      VG_(cpuid)(0x80000001, NULL, NULL, NULL, &cpu_features[VG_AMD_FEAT]);
       break;
 
@@ -260,5 +237,5 @@ void VG_(helperc_CPUID)(UInt op, UInt *e
       get_cpu_features();       /* for cpu_vendor */
 
-   cpuid(op, &eax, &ebx, &ecx, &edx);
+   VG_(cpuid)(op, &eax, &ebx, &ecx, &edx);
 
    /* Common mangling */

--- valgrind/include/vg_skin.h.base  #1.18:1.19
@@ -586,4 +586,8 @@
 extern UInt VG_(read_millisecond_timer) ( void );
 
+extern void VG_(cpuid) ( UInt eax,
+                         UInt *eax_ret, UInt *ebx_ret,
+                         UInt *ecx_ret, UInt *edx_ret );
+
 /*====================================================================*/
 /*=== UCode definition                                             ===*/