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From: Tom H. <th...@cy...> - 2004-03-28 10:36:33
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CVS commit by thughes: Added more floating point instruction tests. M +45 -0 addrcheck/tests/insn_fpu.stdout.exp 1.3 M +45 -0 cachegrind/tests/insn_fpu.stdout.exp 1.3 M +45 -0 helgrind/tests/insn_fpu.stdout.exp 1.3 M +45 -0 memcheck/tests/insn_fpu.stdout.exp 1.3 M +45 -0 none/tests/insn_fpu.def 1.3 M +45 -0 none/tests/insn_fpu.stdout.exp 1.3 --- valgrind/addrcheck/tests/insn_fpu.stdout.exp #1.2:1.3 @@ -59,4 +59,28 @@ fiaddl_7 ... ok fiaddl_8 ... ok +fcomi_1 ... ok +fcomi_2 ... ok +fcomi_3 ... ok +fcomi_4 ... ok +fcomi_5 ... ok +fcomi_6 ... ok +fcomip_1 ... ok +fcomip_2 ... ok +fcomip_3 ... ok +fcomip_4 ... ok +fcomip_5 ... ok +fcomip_6 ... ok +fucomi_1 ... ok +fucomi_2 ... ok +fucomi_3 ... ok +fucomi_4 ... ok +fucomi_5 ... ok +fucomi_6 ... ok +fucomip_1 ... ok +fucomip_2 ... ok +fucomip_3 ... ok +fucomip_4 ... ok +fucomip_5 ... ok +fucomip_6 ... ok fchs_1 ... ok fchs_2 ... ok @@ -175,4 +199,23 @@ fidivrl_7 ... ok fidivrl_8 ... ok +filds_1 ... ok +filds_2 ... ok +filds_3 ... ok +filds_4 ... ok +fildl_1 ... ok +fildl_2 ... ok +fildl_3 ... ok +fildl_4 ... ok +fildq_1 ... ok +fildq_2 ... ok +fildq_3 ... ok +fildq_4 ... ok +flds_1 ... ok +flds_2 ... ok +fldl_1 ... ok +fldl_2 ... ok +fld_1 ... ok +fld_2 ... ok +fld_3 ... ok fld1_1 ... ok fldl2t_1 ... ok @@ -350,2 +393,4 @@ fisubrl_7 ... ok fisubrl_8 ... ok +fxch_1 ... ok +fxch_2 ... ok --- valgrind/cachegrind/tests/insn_fpu.stdout.exp #1.2:1.3 @@ -59,4 +59,28 @@ fiaddl_7 ... ok fiaddl_8 ... ok +fcomi_1 ... ok +fcomi_2 ... ok +fcomi_3 ... ok +fcomi_4 ... ok +fcomi_5 ... ok +fcomi_6 ... ok +fcomip_1 ... ok +fcomip_2 ... ok +fcomip_3 ... ok +fcomip_4 ... ok +fcomip_5 ... ok +fcomip_6 ... ok +fucomi_1 ... ok +fucomi_2 ... ok +fucomi_3 ... ok +fucomi_4 ... ok +fucomi_5 ... ok +fucomi_6 ... ok +fucomip_1 ... ok +fucomip_2 ... ok +fucomip_3 ... ok +fucomip_4 ... ok +fucomip_5 ... ok +fucomip_6 ... ok fchs_1 ... ok fchs_2 ... ok @@ -175,4 +199,23 @@ fidivrl_7 ... ok fidivrl_8 ... ok +filds_1 ... ok +filds_2 ... ok +filds_3 ... ok +filds_4 ... ok +fildl_1 ... ok +fildl_2 ... ok +fildl_3 ... ok +fildl_4 ... ok +fildq_1 ... ok +fildq_2 ... ok +fildq_3 ... ok +fildq_4 ... ok +flds_1 ... ok +flds_2 ... ok +fldl_1 ... ok +fldl_2 ... ok +fld_1 ... ok +fld_2 ... ok +fld_3 ... ok fld1_1 ... ok fldl2t_1 ... ok @@ -350,2 +393,4 @@ fisubrl_7 ... ok fisubrl_8 ... ok +fxch_1 ... ok +fxch_2 ... ok --- valgrind/helgrind/tests/insn_fpu.stdout.exp #1.2:1.3 @@ -59,4 +59,28 @@ fiaddl_7 ... ok fiaddl_8 ... ok +fcomi_1 ... ok +fcomi_2 ... ok +fcomi_3 ... ok +fcomi_4 ... ok +fcomi_5 ... ok +fcomi_6 ... ok +fcomip_1 ... ok +fcomip_2 ... ok +fcomip_3 ... ok +fcomip_4 ... ok +fcomip_5 ... ok +fcomip_6 ... ok +fucomi_1 ... ok +fucomi_2 ... ok +fucomi_3 ... ok +fucomi_4 ... ok +fucomi_5 ... ok +fucomi_6 ... ok +fucomip_1 ... ok +fucomip_2 ... ok +fucomip_3 ... ok +fucomip_4 ... ok +fucomip_5 ... ok +fucomip_6 ... ok fchs_1 ... ok fchs_2 ... ok @@ -175,4 +199,23 @@ fidivrl_7 ... ok fidivrl_8 ... ok +filds_1 ... ok +filds_2 ... ok +filds_3 ... ok +filds_4 ... ok +fildl_1 ... ok +fildl_2 ... ok +fildl_3 ... ok +fildl_4 ... ok +fildq_1 ... ok +fildq_2 ... ok +fildq_3 ... ok +fildq_4 ... ok +flds_1 ... ok +flds_2 ... ok +fldl_1 ... ok +fldl_2 ... ok +fld_1 ... ok +fld_2 ... ok +fld_3 ... ok fld1_1 ... ok fldl2t_1 ... ok @@ -350,2 +393,4 @@ fisubrl_7 ... ok fisubrl_8 ... ok +fxch_1 ... ok +fxch_2 ... ok --- valgrind/memcheck/tests/insn_fpu.stdout.exp #1.2:1.3 @@ -59,4 +59,28 @@ fiaddl_7 ... ok fiaddl_8 ... ok +fcomi_1 ... ok +fcomi_2 ... ok +fcomi_3 ... ok +fcomi_4 ... ok +fcomi_5 ... ok +fcomi_6 ... ok +fcomip_1 ... ok +fcomip_2 ... ok +fcomip_3 ... ok +fcomip_4 ... ok +fcomip_5 ... ok +fcomip_6 ... ok +fucomi_1 ... ok +fucomi_2 ... ok +fucomi_3 ... ok +fucomi_4 ... ok +fucomi_5 ... ok +fucomi_6 ... ok +fucomip_1 ... ok +fucomip_2 ... ok +fucomip_3 ... ok +fucomip_4 ... ok +fucomip_5 ... ok +fucomip_6 ... ok fchs_1 ... ok fchs_2 ... ok @@ -175,4 +199,23 @@ fidivrl_7 ... ok fidivrl_8 ... ok +filds_1 ... ok +filds_2 ... ok +filds_3 ... ok +filds_4 ... ok +fildl_1 ... ok +fildl_2 ... ok +fildl_3 ... ok +fildl_4 ... ok +fildq_1 ... ok +fildq_2 ... ok +fildq_3 ... ok +fildq_4 ... ok +flds_1 ... ok +flds_2 ... ok +fldl_1 ... ok +fldl_2 ... ok +fld_1 ... ok +fld_2 ... ok +fld_3 ... ok fld1_1 ... ok fldl2t_1 ... ok @@ -350,2 +393,4 @@ fisubrl_7 ... ok fisubrl_8 ... ok +fxch_1 ... ok +fxch_2 ... ok --- valgrind/none/tests/insn_fpu.def #1.2:1.3 @@ -59,4 +59,28 @@ fiaddl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679] fiaddl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321] +fcomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00] +fcomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01] +fcomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40] +fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00] +fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01] +fcomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40] +fcomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00] +fcomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01] +fcomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40] +fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00] +fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01] +fcomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40] +fucomi st2.ps[1234.5678] st0.ps[1234.5679] => st0.ps[1234.5678] st2.ps[1234.5679] eflags[0x45,0x00] +fucomi st2.ps[1234.5678] st0.ps[1234.5676] => st0.ps[1234.5678] st2.ps[1234.5676] eflags[0x45,0x01] +fucomi st2.ps[1234.5678] st0.ps[1234.5678] => st0.ps[1234.5678] st2.ps[1234.5678] eflags[0x45,0x40] +fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st0.pd[1234567.7654322] st2.pd[1234567.7654321] eflags[0x45,0x00] +fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st0.pd[1234567.7654320] st2.pd[1234567.7654321] eflags[0x45,0x01] +fucomi st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st0.pd[1234567.7654321] st2.pd[1234567.7654321] eflags[0x45,0x40] +fucomip st2.ps[1234.5678] st0.ps[1234.5679] => st1.ps[1234.5679] eflags[0x45,0x00] +fucomip st2.ps[1234.5678] st0.ps[1234.5676] => st1.ps[1234.5676] eflags[0x45,0x01] +fucomip st2.ps[1234.5678] st0.ps[1234.5678] => st1.ps[1234.5678] eflags[0x45,0x40] +fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654322] => st1.pd[1234567.7654321] eflags[0x45,0x00] +fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654320] => st1.pd[1234567.7654321] eflags[0x45,0x01] +fucomip st2.pd[1234567.7654321] st0.pd[1234567.7654321] => st1.pd[1234567.7654321] eflags[0x45,0x40] fchs st0.ps[1234.5678] : => st0.ps[-1234.5678] fchs st0.ps[-1234.5678] : => st0.ps[1234.5678] @@ -175,4 +199,23 @@ fidivrl st0.pd[1234567.7654321] : m32.sd[-654321] => st0.pd[-0.530000068300007] fidivrl st0.pd[-1234567.7654321] : m32.sd[-654321] => st0.pd[0.530000068300007] +filds m16.sw[12345] => st0.ps[12345.0] +filds m16.sw[-12345] => st0.ps[-12345.0] +filds m16.sw[12345] => st0.pd[12345.0] +filds m16.sw[-12345] => st0.pd[-12345.0] +fildl m32.sd[12345678] => st0.ps[12345678.0] +fildl m32.sd[-12345678] => st0.ps[-12345678.0] +fildl m32.sd[12345678] => st0.pd[12345678.0] +fildl m32.sd[-12345678] => st0.pd[-12345678.0] +fildq m64.sq[123456787654321] => st0.ps[123456787654321.0] +fildq m64.sq[-123456787654321] => st0.ps[-123456787654321.0] +fildq m64.sq[123456787654321] => st0.pd[123456787654321.0] +fildq m64.sq[-123456787654321] => st0.pd[-123456787654321.0] +flds m32.ps[1234.5678] => st0.ps[1234.5678] +flds m32.ps[-1234.5678] => st0.ps[-1234.5678] +fldl m64.pd[1234567.7654321] => st0.pd[1234567.7654321] +fldl m64.pd[-1234567.7654321] => st0.pd[-1234567.7654321] +fld st2.ps[1234.5678] => st0.ps[1234.5678] st3.ps[1234.5678] +fld st2.ps[-1234.5678] => st0.ps[-1234.5678] st3.ps[-1234.5678] +fld st2.pd[1234567.7654321] => st0.pd[1234567.7654321] st3.pd[1234567.7654321] fld1 => st0.pd[1.0] fldl2t => st0.pd[3.321928094887362] @@ -350,2 +393,4 @@ fisubrl st0.pd[1234567.7654321] : m32.sd[-87654321] => st0.pd[-88888888.7654321] fisubrl st0.pd[-1234567.7654321] : m32.sd[-87654321] => st0.pd[-86419753.2345679] +fxch st0.ps[1234.5678] : st2.ps[8765.4321] => st0.ps[8765.4321] st2.ps[1234.5678] +fxch st0.pd[1234567.7654321] : st2.pd[7654321.1234567] => st0.pd[7654321.1234567] st2.pd[1234567.7654321] --- valgrind/none/tests/insn_fpu.stdout.exp #1.2:1.3 @@ -59,4 +59,28 @@ fiaddl_7 ... ok fiaddl_8 ... ok +fcomi_1 ... ok +fcomi_2 ... ok +fcomi_3 ... ok +fcomi_4 ... ok +fcomi_5 ... ok +fcomi_6 ... ok +fcomip_1 ... ok +fcomip_2 ... ok +fcomip_3 ... ok +fcomip_4 ... ok +fcomip_5 ... ok +fcomip_6 ... ok +fucomi_1 ... ok +fucomi_2 ... ok +fucomi_3 ... ok +fucomi_4 ... ok +fucomi_5 ... ok +fucomi_6 ... ok +fucomip_1 ... ok +fucomip_2 ... ok +fucomip_3 ... ok +fucomip_4 ... ok +fucomip_5 ... ok +fucomip_6 ... ok fchs_1 ... ok fchs_2 ... ok @@ -175,4 +199,23 @@ fidivrl_7 ... ok fidivrl_8 ... ok +filds_1 ... ok +filds_2 ... ok +filds_3 ... ok +filds_4 ... ok +fildl_1 ... ok +fildl_2 ... ok +fildl_3 ... ok +fildl_4 ... ok +fildq_1 ... ok +fildq_2 ... ok +fildq_3 ... ok +fildq_4 ... ok +flds_1 ... ok +flds_2 ... ok +fldl_1 ... ok +fldl_2 ... ok +fld_1 ... ok +fld_2 ... ok +fld_3 ... ok fld1_1 ... ok fldl2t_1 ... ok @@ -350,2 +393,4 @@ fisubrl_7 ... ok fisubrl_8 ... ok +fxch_1 ... ok +fxch_2 ... ok |