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From: Tom H. <th...@cy...> - 2004-03-04 23:43:24
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CVS commit by thughes:
Add support for 16 bit pushes and pops of segment registers to
fix bug #76762.
A none/tests/pushpopseg.c 1.1 [POSSIBLY UNSAFE: printf] [no copyright]
A none/tests/pushpopseg.stderr.exp 1.1
A none/tests/pushpopseg.stdout.exp 1.1
A none/tests/pushpopseg.vgtest 1.1
M +3 -3 coregrind/vg_to_ucode.c 1.131
M +1 -0 none/tests/.cvsignore 1.10
M +3 -1 none/tests/Makefile.am 1.29
--- valgrind/coregrind/vg_to_ucode.c #1.130:1.131
@@ -3746,9 +3746,9 @@ void dis_push_segreg ( UCodeBlock* cb, U
{
Int t1 = newTemp(cb), t2 = newTemp(cb);
- vg_assert(sz == 4);
+ vg_assert(sz == 2 || sz == 4);
uInstr2(cb, GETSEG, 2, ArchRegS, sreg, TempReg, t1);
uInstr2(cb, GET, 4, ArchReg, R_ESP, TempReg, t2);
uInstr2(cb, SUB, 4, Literal, 0, TempReg, t2);
- uLiteral(cb, 4);
+ uLiteral(cb, sz);
uInstr2(cb, PUT, 4, TempReg, t2, ArchReg, R_ESP);
uInstr2(cb, STORE, 2, TempReg, t1, TempReg, t2);
@@ -3760,5 +3760,5 @@ void dis_pop_segreg ( UCodeBlock* cb, UI
{
Int t1 = newTemp(cb), t2 = newTemp(cb);
- vg_assert(sz == 4);
+ vg_assert(sz == 2 || sz == 4);
uInstr2(cb, GET, 4, ArchReg, R_ESP, TempReg, t2);
uInstr2(cb, LOAD, 2, TempReg, t2, TempReg, t1);
--- valgrind/none/tests/.cvsignore #1.9:1.10
@@ -57,4 +57,5 @@
pth_specific
pth_yield
+pushpopseg
*.stdout.diff
*.stderr.diff
--- valgrind/none/tests/Makefile.am #1.28:1.29
@@ -37,4 +37,5 @@
pth_blockedsig.stderr.exp \
pth_blockedsig.stdout.exp pth_blockedsig.vgtest \
+ pushpopseg.stderr.exp pushpopseg.stdout.exp pushpopseg.vgtest \
rcl_assert.stderr.exp rcl_assert.vgtest \
rcrl.stderr.exp rcrl.stdout.exp rcrl.vgtest \
@@ -60,5 +61,5 @@
munmap_exe map_unmap mremap rcl_assert \
rcrl readline1 resolv seg_override sha1_test shortpush shorts smc1 \
- pth_blockedsig \
+ pth_blockedsig pushpopseg \
syscall-restart1 syscall-restart2 system \
coolo_sigaction gxx304 yield
@@ -98,4 +99,5 @@
mremap_SOURCES = mremap.c
munmap_exe_SOURCES = munmap_exe.c
+pushpopseg_SOURCES = pushpopseg.c
rcl_assert_SOURCES = rcl_assert.S
rcrl_SOURCES = rcrl.c
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