Re: [Valgrind-users] New experimental skin: signal handler checker

[John R. <jr...@Bi...>]

Dan Kegel wrote:
> John Reiser wrote:
> 
>>> Well, surely the buffer pointer updates need to be protected, unless
>>> you're using strictly atomic operations?
>>
>>
>> No, the buffer pointer updates do not need to be "protected".
[snip]
 >> the significant exceptions are on "8-bit"
>> (or less) microcontrollers where a pointer is wider than the memory bus.
> 
> 
> Don't forget the other significant exception, which is on SMP
> machines.  You may need memory barrier instructions to
> avoid caching problems if variables are used by more than
> one processor.

Cache coherency suffices.  [If not cache coherent, then there is
not _a_ memory: each cache is a different memory.]  In one sense,
cache coherency is stronger than necessary: as long as a write
eventually propagates to the other cache [and becomes the value
fetched by a read], then communication succeeds.  The delay
can affect throughput and latency, but not correctness.  Multiple
writes to the same control pointer [which are done by only one
processor] may even be "optimized" by suppressing all but the
most recent one.

> 
> Semaphores provide the needed memory barriers.  I'm sure
> some pthread stuff does, too.
> Volatile variables don't, I think (except maybe in Java :-)
> 
> It's such a pain that I personally use synchronous signal
> delivery for absolutely everything...
> - Dan
>