Re: [Valgrind-developers] Absolutely mystifying problem with fxrstor

[Philippe E. <ph...@wa...>]

Nicholas Nethercote wrote:
> On Mon, 28 Apr 2003, Julian Seward wrote:
> 
> 
>>Help!  I'm stuck.  Is there some other magic constraints on
>>fxrstor I need to know about?  I read the fine print in the P4
>>documentation carefully, but I cannot see anything other than the
>>16-byte-alignment constraint.
> 
> 
> I know nothing about fxrstor, but the docs do also say:
> 
>   Bit 6 and bits 16 through 32 of the MXCSR register are defined as
>   reserved and should be set to 0.  Attempting to write a 1 in any of
>   these bits from the saved state image will result in a general
>   protection exception (#GP) being generated.

Probably an error in P4 documentation, see Intel documentation
Volume 1 11.6.6. On PIII or below setting this bit segfault
but on P4 it would work.

Someone can try this (very ugly) piece of code on a P4 ?

int main(void)
{
     char save_area[512 + 15];
     char * ptr = save_area + (16 - ((int)save_area & 15));
     __asm__ ("fxsave (%0)" : : "r" (ptr) );
     ptr[24] |= 1 << 6;
     __asm__ ("fxrstor (%0)" : : "r" (ptr) );

   return 0;
}


regards,
Philippe Elie