From: Andreas A. <ar...@so...> - 2025-04-01 14:52:21
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https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=957b7e0a7e0f987baa3482bc607e84b668ce7a00 commit 957b7e0a7e0f987baa3482bc607e84b668ce7a00 Author: Andreas Arnez <ar...@li...> Date: Tue Apr 1 16:25:05 2025 +0200 s390x: Reflect ppno -> prno renaming in opcode checker After consequently renaming ppno to prno, the tool s390-check-opcodes.pl complains: *** opcode prno is implemented but CSV file does not say so *** opcode ppno is not implemented but CSV file says so *** opcode ppno is not handled by the decoder Fix this by renaming to "prno" in s390-opcodes.csv as well and declaring "ppno" instead of "prno" as an alias in s390-check-opcodes.pl. Diff: --- auxprogs/s390-check-opcodes.pl | 2 +- docs/internals/s390-opcodes.csv | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/auxprogs/s390-check-opcodes.pl b/auxprogs/s390-check-opcodes.pl index 474bb3a7e8..bd1abc8057 100755 --- a/auxprogs/s390-check-opcodes.pl +++ b/auxprogs/s390-check-opcodes.pl @@ -175,7 +175,7 @@ my @extended_mnemonics = ( # Base mnemonic(s) "wftci[sdx]b", "wfsq*[sdx]b", "vl(ed|de)", - "prno" # ppno + "ppno" # prno ); # Compile excluded mnemonics into one regular expression to optimize diff --git a/docs/internals/s390-opcodes.csv b/docs/internals/s390-opcodes.csv index e2d69fc996..931d8987cb 100644 --- a/docs/internals/s390-opcodes.csv +++ b/docs/internals/s390-opcodes.csv @@ -1343,7 +1343,7 @@ lochi,"load halfword immediate on condition into 32 bit gpr",implemented,z13 verllvh,"vector element rotate left logical reg halfword",implemented,z13 cpdt,"convert from long dfp to packed","not implemented",z13 vrepb,"vector replicate byte","implemented",z13 -ppno,"perform pseudorandom number operation",implemented,z13 +prno,"perform random number operation",implemented,z13 irbm,"insert reference bits multiple",N/A,"privileged instruction",arch12 tpei,"test pending external interruption",N/A,"privileged instruction",arch12 vfeef,"vector find element equal word","implemented",z13 |