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From: Vincent Penquerc'h <Vin...@ar...> - 2003-07-28 09:48:00
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> OK, so an implementation to do cycle counting needs to have > a table that lists for every instruction how many cycles it > need for the different cache-hit/miss situations. > > Are these informations available (for all the processors)? Yes, but there is an awful lot of possible combinations. That would be nifty to try out a piece of time critical code on various architectures to see how it fares, since one would usually optimize for one's dev machine... -- Vincent Penquerc'h |