From: Fei Wu <fe...@in...> - 2023-05-26 13:57:49
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disp_run_translations in dispatch-riscv64-linux.S shift guest_state by 2048, it needs to adjust accordingly on calling helper. Signed-off-by: Fei Wu <fe...@in...> --- VEX/priv/host_riscv64_isel.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/VEX/priv/host_riscv64_isel.c b/VEX/priv/host_riscv64_isel.c index 355f559bd..127200d8e 100644 --- a/VEX/priv/host_riscv64_isel.c +++ b/VEX/priv/host_riscv64_isel.c @@ -425,8 +425,10 @@ static Bool doHelperCall(/*OUT*/ UInt* stackAdjustAfterCall, } else if (arg->tag == Iex_GSPTR) { if (nextArgReg >= RISCV64_N_ARGREGS) return False; /* Out of argregs. */ + /* See dispatch-riscv64-linux.S for -2048 */ addInstr(env, - RISCV64Instr_MV(argregs[nextArgReg], hregRISCV64_x8())); + RISCV64Instr_ALUImm(RISCV64op_ADDI, argregs[nextArgReg], + hregRISCV64_x8(), -2048)); nextArgReg++; } else if (arg->tag == Iex_VECRET) { /* Because of the go_fast logic above, we can't get here, since @@ -461,7 +463,10 @@ static Bool doHelperCall(/*OUT*/ UInt* stackAdjustAfterCall, } else if (arg->tag == Iex_GSPTR) { if (nextArgReg >= RISCV64_N_ARGREGS) return False; /* Out of argregs. */ - tmpregs[nextArgReg] = hregRISCV64_x8(); + + addInstr(env, + RISCV64Instr_ALUImm(RISCV64op_ADDI, tmpregs[nextArgReg], + hregRISCV64_x8(), -2048)); nextArgReg++; } else if (arg->tag == Iex_VECRET) { vassert(!hregIsInvalid(r_vecRetAddr)); -- 2.25.1 |