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From: Eyal S. <eya...@gm...> - 2022-11-27 18:54:24
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Oh man that sounds way easier! So we just recognize this combination of
cmovns after test and instead of doing the CCall, we do it in IR. And then
mc_translate will do its usual work of tracking V bits for regular IR
instead of for the CCall and it'll get that right.
This is great! I'll get on it soon. Thanks for the tip.
Eyal
On Sun, Nov 27, 2022, 11:10 Julian Seward <jse...@gm...> wrote:
>
> The way most of these problems got fixed in the past is for the IR
> optimiser
> to, effectively, inline the amd64g_calculate_condition call for the
> specific
> arg-pair you have (0x9/0x14). That gets rid of the false data dependency
> that you (correctly) diagnosed.
>
> > C: t27 =
> >
> amd64g_calculate_condition[mcx=0x13]{0x5814d3e0}(0x9:I64,0x14:I64,t20,0x0:I64,0x0:I64):I64
>
> For that you need to add a folding rule to guest_amd64_spechelper. Here's
> the folding rule for S after a 32-bit-LOGIC operation:
>
> if (isU64(cc_op, AMD64G_CC_OP_LOGICL) && isU64(cond, AMD64CondNS)) {
> /* long and/or/xor, then S --> (ULong) ~ result[31] */
> return binop(Iop_Xor64,
> binop(Iop_And64,
> binop(Iop_Shr64, cc_dep1, mkU8(31)),
> mkU64(1)),
> mkU64(1));
> }
>
> Make a 64-bit version of that and add it to the LOGICQ section of the file
> just above.
>
> J
>
>
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