[Valgrind-developers] [valgrind] arm64 front end: add support for 'dc civac', handling it the same as 'dc cvau'.

[Julian S. <se...@so...>]

https://sourceware.org/git/gitweb.cgi?p=valgrind.git;h=c82d35f6d67ed34cf20d79f90a7400bd7f83ebad

commit c82d35f6d67ed34cf20d79f90a7400bd7f83ebad
Author: Julian Seward <js...@ac...>
Date:   Wed Jan 22 11:21:53 2020 +0100

    arm64 front end: add support for 'dc civac', handling it the same as 'dc cvau'.
    
    This partially fixes #412377.

Diff:
---
 VEX/priv/guest_arm64_toIR.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c
index bee348a..aae3c6f 100644
--- a/VEX/priv/guest_arm64_toIR.c
+++ b/VEX/priv/guest_arm64_toIR.c
@@ -7247,10 +7247,10 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn,
 
    /* ------------------ DC_CVAU ------------------ */
    /* D5 0B 7B 001 Rt  dc cvau, rT
+      D5 0B 7E 001 Rt  dc civac, rT
    */
-   if ((INSN(31,0) & 0xFFFFFFE0) == 0xD50B7B20) {
-      /* JRS 2019Nov24: should we handle DC_CIVAC the same?
-         || (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7E20 */
+   if (   (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7B20
+       || (INSN(31,0) & 0xFFFFFFE0) == 0xD50B7E20) {
       /* Exactly the same scheme as for IC IVAU, except we observe the
          dMinLine size, and request an Ijk_FlushDCache instead of
          Ijk_InvalICache. */