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From: Carl L. <ce...@us...> - 2018-03-01 22:07:50
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Peter:
Thanks for the input on the incorrect register constraints for the new
tests. I have committed a fix for them.
commit 839b244af27d6b7d27001c10ed308c485fecd3a8
Author: Carl Love <ca...@us...>
Date: Thu Mar 1 13:50:56 2018 -0600
PPC64, Fix tests for mtvsrwa and mtfprd.
Fix the register constraints for the vtvsrwa and mtfprd instructions
in test_isa_2_07_part2.c. Update the expected output in
none/tests/jm_vec_isa_2_07.stdout.exp.
Carl Love
-----------------------------------------------
On Wed, 2018-02-28 at 16:34 -0600, Peter Bergner wrote:
> On 2/27/18 6:40 PM, Carl Love wrote:
> > +static void test_mtvsrwa (void)
> > +{
> > + __asm__ __volatile__ ("mtvsrwa %x0,%1" : "=d" (vec_out) : "r"
> > (r14));
> > +};
>
> The mtvsrwa instruction writes a VSX register and you correctly use
> %x0
> to write its reg number, but you should also use the "=ws" constraint
> instead of "=d". You won't get an error, but you're forcing the
> inline
> asm to only use FP regs (a subset of VSX regs).
>
>
>
>
> > +static void test_mtfprd (void)
> > +{
> > + __asm__ __volatile__ ("mtfprd %0,%1" : "=v" (vec_out) : "r"
> > (r14));
> > +};
>
> The mtfprd writes a FP register, so you need to use the "=d"
> constraint
> instead of "=v". The assembler won't give an error since the reg
> numbers
> are the same (0-31), but unless you got really lucky, this should
> have
> led to a runtime error (ie, value not what you expected).
>
>
> Peter
>
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