From: Philippe W. <phi...@sk...> - 2016-12-22 20:15:14
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On Fri, 2016-12-16 at 19:37 +0100, Petar Jovanovic wrote: > On Sun, Dec 11, 2016 at 10:39 PM, <sv...@va...> wrote: > > > > * for mips32/mips64 and tilegx, there is a strange unconditional assignment > > of 0 to a register (guest_r2 on mips, guest_r0 on tilegx). > > Not needed. Removed in r16188. > Thanks for noticing. And thanks for the cleanup. The same question/remark is still pending for tilegx. I do not remember any tilegx related commit/feedback/bug report or whatever since more than one year. Is there a contact person for tilegx/tilera ? Philippe |