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From: <sv...@va...> - 2016-08-03 11:40:45
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Author: sewardj
Date: Wed Aug 3 12:40:36 2016
New Revision: 15921
Log:
Add infrastructure for detection of 32-bit ARMv8 capable CPUs (Valgrind side).
Modified:
trunk/coregrind/m_initimg/initimg-linux.c
trunk/coregrind/m_machine.c
Modified: trunk/coregrind/m_initimg/initimg-linux.c
==============================================================================
--- trunk/coregrind/m_initimg/initimg-linux.c (original)
+++ trunk/coregrind/m_initimg/initimg-linux.c Wed Aug 3 12:40:36 2016
@@ -691,8 +691,9 @@
"ARM has-neon from-auxv: %s\n",
has_neon ? "YES" : "NO");
VG_(machine_arm_set_has_NEON)( has_neon );
- #define VKI_HWCAP_TLS 32768
+# define VKI_HWCAP_TLS 32768
Bool has_tls = (auxv->u.a_val & VKI_HWCAP_TLS) > 0;
+# undef VKI_HWCAP_TLS
VG_(debugLog)(2, "initimg",
"ARM has-tls from-auxv: %s\n",
has_tls ? "YES" : "NO");
Modified: trunk/coregrind/m_machine.c
==============================================================================
--- trunk/coregrind/m_machine.c (original)
+++ trunk/coregrind/m_machine.c Wed Aug 3 12:40:36 2016
@@ -1523,7 +1523,7 @@
vki_sigaction_fromK_t saved_sigill_act, saved_sigfpe_act;
vki_sigaction_toK_t tmp_sigill_act, tmp_sigfpe_act;
- volatile Bool have_VFP, have_VFP2, have_VFP3, have_NEON;
+ volatile Bool have_VFP, have_VFP2, have_VFP3, have_NEON, have_V8;
volatile Int archlevel;
Int r;
@@ -1602,6 +1602,19 @@
}
}
+ /* ARMv8 insns */
+ have_V8 = True;
+ if (archlevel == 7) {
+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) {
+ have_V8 = False;
+ } else {
+ __asm__ __volatile__(".word 0xF3044F54"); /* VMAXNM.F32 q2,q2,q2 */
+ }
+ if (have_V8 && have_NEON && have_VFP3) {
+ archlevel = 8;
+ }
+ }
+
VG_(convert_sigaction_fromK_to_toK)(&saved_sigill_act, &tmp_sigill_act);
VG_(convert_sigaction_fromK_to_toK)(&saved_sigfpe_act, &tmp_sigfpe_act);
VG_(sigaction)(VKI_SIGILL, &tmp_sigill_act, NULL);
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