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From: Florian K. <fl...@ei...> - 2015-11-29 15:34:59
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Patch applied as VEX r3206 Florian On 24.11.2015 23:15, Florian Krohm wrote: > OK, thanks for the explanation. Attached is the patch I'm proposing > which removes the ad-hoc limitation and allows shift amounts up to and > including 31. I looked at the downstream code and it has not problems > handling such shift amounts. > I'm copying Julian to he can chime in and offer an explanation as to why > that limitation existed at all. If there is no yelling I'm going to > commit this in the next couple of days. > > Florian > > On 24.11.2015 21:14, Michael Daniels wrote: >>> are there other values >4 possible, that we should handle as well? >> >> Shifts are 5 bits, so its possible this value could be as high as 31. >> Like the other patch, the check could/should probably just be >> removed altogether. It was just not clear why it was limited in the >> first place, so I only bumped it as needed. >> ________________________________________ >> From: Florian Krohm [fl...@ei...] >> Sent: Tuesday, November 24, 2015 2:48 PM >> To: Michael Daniels; val...@li... >> Subject: Re: [Valgrind-developers] [PATCH][VEX] Bump allowed shift value for "add.w reg, sp, reg, lsl #N" >> >> I'm not familiar with arm. But I'm wondering whether allowing teh value >> 4 here is the right thing to do. Or, phrased differently: are there >> other values >4 possible, that we should handle as well? >> >> Florian >> >> >> On 19.11.2015 17:51, Michael Daniels wrote: >>> Hello, >>> >>> When using GCC 5.2 I am seeing this assembly generated in some cases: >>> >>> add.w reg, sp, reg, lsl #4 >>> >>> The current limit is 3 though, so it was causing it to be caught as an unhandled instruction. >>> >>> Patch attached to bump the number from 3 to 4. >>> >>> Thanks, >>> >>> Mike |