[Valgrind-developers] Valgrind: r15494 - in /trunk/cachegrind: cg_arch.c cg_main.c cg_sim.c

[<sv...@va...>]

Author: florian
Date: Wed Aug  5 14:46:58 2015
New Revision: 15494

Log:
Fix printf format inconsistencies as pointed out by gcc -Wformat-signedness.

Modified:
    trunk/cachegrind/cg_arch.c
    trunk/cachegrind/cg_main.c
    trunk/cachegrind/cg_sim.c

Modified: trunk/cachegrind/cg_arch.c
==============================================================================
--- trunk/cachegrind/cg_arch.c (original)
+++ trunk/cachegrind/cg_arch.c Wed Aug  5 14:46:58 2015
@@ -382,7 +382,7 @@
          }
          VG_(dmsg)("warning: Pentium 4 with %u KB micro-op instruction trace cache\n",
                    i1->sizeB / 1024);
-         VG_(dmsg)("         Simulating a %d KB I-cache with %d B lines\n",
+         VG_(dmsg)("         Simulating a %u KB I-cache with %u B lines\n",
                    adjusted_size / 1024, guessed_line_size);
 
          *I1c = (cache_t) { adjusted_size, i1->assoc, guessed_line_size };

Modified: trunk/cachegrind/cg_main.c
==============================================================================
--- trunk/cachegrind/cg_main.c (original)
+++ trunk/cachegrind/cg_main.c Wed Aug  5 14:46:58 2015
@@ -1456,7 +1456,7 @@
 
       // Print the LineCC
       if (clo_cache_sim && clo_branch_sim) {
-         VG_(fprintf)(fp,  "%u %llu %llu %llu"
+         VG_(fprintf)(fp,  "%d %llu %llu %llu"
                              " %llu %llu %llu"
                              " %llu %llu %llu"
                              " %llu %llu %llu %llu\n",
@@ -1468,7 +1468,7 @@
                             lineCC->Bi.b, lineCC->Bi.mp);
       }
       else if (clo_cache_sim && !clo_branch_sim) {
-         VG_(fprintf)(fp,  "%u %llu %llu %llu"
+         VG_(fprintf)(fp,  "%d %llu %llu %llu"
                              " %llu %llu %llu"
                              " %llu %llu %llu\n",
                             lineCC->loc.line,
@@ -1477,7 +1477,7 @@
                             lineCC->Dw.a, lineCC->Dw.m1, lineCC->Dw.mL);
       }
       else if (!clo_cache_sim && clo_branch_sim) {
-         VG_(fprintf)(fp,  "%u %llu"
+         VG_(fprintf)(fp,  "%d %llu"
                              " %llu %llu %llu %llu\n",
                             lineCC->loc.line,
                             lineCC->Ir.a, 
@@ -1485,7 +1485,7 @@
                             lineCC->Bi.b, lineCC->Bi.mp);
       }
       else {
-         VG_(fprintf)(fp,  "%u %llu\n",
+         VG_(fprintf)(fp,  "%d %llu\n",
                             lineCC->loc.line,
                             lineCC->Ir.a);
       }

Modified: trunk/cachegrind/cg_sim.c
==============================================================================
--- trunk/cachegrind/cg_sim.c (original)
+++ trunk/cachegrind/cg_sim.c Wed Aug  5 14:46:58 2015
@@ -155,7 +155,7 @@
       }
       return cachesim_setref_is_miss(c, set2, tag2);
    }
-   VG_(printf)("addr: %lx  size: %u  blocks: %ld %ld",
+   VG_(printf)("addr: %lx  size: %u  blocks: %lu %lu",
                a, size, block1, block2);
    VG_(tool_panic)("item straddles more than two cache sets");
    /* not reached */