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From: Philippe W. <phi...@sk...> - 2015-04-11 11:29:14
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On Sat, 2015-04-11 at 01:12 +0200, Philippe Waroquiers wrote:
> On Sat, 2015-04-11 at 01:02 +0200, Philippe Waroquiers wrote:
> > Julian,
> > do you agree that the offB_HOST_* offsets are depending on the host
> > architecture, and not on the guest architecture ?
> Moving the offB_HOST_* to the arch_host switch makes
> guest amd64/host tilegx
> work ok.
>
> It looks to me that this is the good thing to do
After an irc discussion with Julian, it became clear that this
is not the good thing to do, and that I misunderstood
the somewhat misleading names offB_HOST_EvC_COUNTER and
offB_HOST_EvC_FAILADDR.
Here is what I understand now:
These offB_HOST_* are really offset in the guest state,
which give locations in the guest state that are used by the
(generated) host code.
Basically, a translation entry (generated host code) is doing
if (-- guest_state->COUNTER) == 0) goto guest_state->FAILADDR
So, COUNTER and FAILADDR are in the guest state.
FAILADDR must be an host address
(this is in fact wrongly defined in all 32 bits guest states.
E.g. libvex_guest_x86.h and libvex_guest_ppc32.h defines
UInt host_EvC_FAILADDR;
while it should be the size of an host address (or at least
big enough to hold a 64 bit host address, if the host would
be 64 bits in a multiarch setup).
So, now I think the problem guest amd64/host tilegx
is better solved in the host tilegx code, that should ensure to always
generate the same nr of bytes for the evCheck instructions
(this was suggested by Zhigang)
(or maybe dynamically compute
the needed nr of instructions for an eventcheck, depending
on the offsets of the host_EvC_*, that changes the size of the
instructions).
Zhigang, does the above look reasonable to do in tilegx ?
(waiting for this to be done, I could always disable in the test
using tilegx as a host)
Thanks
Philippe
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