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[Valgrind-developers] Valgrind: r15078 - in /trunk/coregrind: m_initimg/initimg-linux.c m_main.c pub_core_initimg.h
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From: <sv...@va...> - 2015-04-09 16:23:28
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Author: carll
Date: Thu Apr 9 17:23:20 2015
New Revision: 15078
Log:
ADD AT_DCACHEBSIZE and AT_HWCAP2 support for POWER PC
Valgrind currently does not support the following AUX vector entries:
AT_DCACHEBSIZE, and AT_HWCAP2. By default these entries are suppressed by
Valgrind. The attached patch adds the needed support so the user level programs
can correctly determine that hardware level they are running on. Specifically
that the ISA 2.07 for Power 8 is supported.
Bugzilla 345695
This fix adds the needed support. It makes a minor change to allow the
VEX settings of the host platform to be passed down so they can be checked
against the HWCAP values.
The files touched are:
coregrind/m_initimg/initimg-linux.c
coregrind/pub_core_initimg.h
coregrind/m_main.c
committed by Carl Love ce...@us...
Modified:
trunk/coregrind/m_initimg/initimg-linux.c
trunk/coregrind/m_main.c
trunk/coregrind/pub_core_initimg.h
Modified: trunk/coregrind/m_initimg/initimg-linux.c
==============================================================================
--- trunk/coregrind/m_initimg/initimg-linux.c (original)
+++ trunk/coregrind/m_initimg/initimg-linux.c Thu Apr 9 17:23:20 2015
@@ -246,6 +246,10 @@
/*=== Setting up the client's stack ===*/
/*====================================================================*/
+#ifndef AT_DCACHEBSIZE
+#define AT_DCACHEBSIZE 19
+#endif /* AT_DCACHEBSIZE */
+
#ifndef AT_ICACHEBSIZE
#define AT_ICACHEBSIZE 20
#endif /* AT_ICACHEBSIZE */
@@ -262,6 +266,10 @@
#define AT_RANDOM 25
#endif /* AT_RANDOM */
+#ifndef AT_HWCAP2
+#define AT_HWCAP2 26
+#endif /* AT_HWCAP2 */
+
#ifndef AT_EXECFN
#define AT_EXECFN 31
#endif /* AT_EXECFN */
@@ -377,8 +385,14 @@
const ExeInfo* info,
UInt** client_auxv,
Addr clstack_end,
- SizeT clstack_max_size )
+ SizeT clstack_max_size,
+ const VexArchInfo* vex_archinfo )
{
+ /* The HW configuration setting (hwcaps) of the target can be
+ * checked against the Vex settings of the host platform as given
+ * by the values in vex_archinfo.
+ */
+
SysRes res;
HChar **cpp;
HChar *strtab; /* string table */
@@ -690,8 +704,44 @@
}
# endif
break;
+# if defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux)
+ case AT_HWCAP2:
+ /* The HWCAP2 value has the entry arch_2_07 which indicates the
+ * processor is a Power 8 or beyond. The Valgrind vai.hwcaps
+ * value (coregrind/m_machine.c) has the VEX_HWCAPS_PPC64_ISA2_07
+ * flag set so Valgrind knows about Power8. Need to pass the
+ * HWCAP2 value along so the user level programs can detect that
+ * the processor supports ISA 2.07 and beyond.
+ */
+ /* Power Architecture 64-Bit ELF V2 ABI Specification
+ July 21, 2014, version 1.0, Page 124
+ www-03.ibm.com/technologyconnect/tgcm/TGCMServlet.wss?alias=OpenPOWER&linkid=1n0000
+
+ AT_HWCAP2
+ The a_val member of this entry is a bit map of hardware
+ capabilities. Some bit mask values include:
+
+ PPC_FEATURE2_ARCH_2_07 0x80000000
+ PPC_FEATURE2_HAS_HTM 0x40000000
+ PPC_FEATURE2_HAS_DSCR 0x20000000
+ PPC_FEATURE2_HAS_EBB 0x10000000
+ PPC_FEATURE2_HAS_ISEL 0x08000000
+ PPC_FEATURE2_HAS_TAR 0x04000000
+ PPC_FEATURE2_HAS_VCRYPTO 0x02000000
+ */
+
+ if ((auxv->u.a_val & ~(0x80000000ULL)) != 0) {
+ /* Verify if PPC_FEATURE2_ARCH_2_07 is set in HWCAP2
+ * that arch_2_07 is also set in VEX HWCAPS
+ */
+ vg_assert((vex_archinfo->hwcaps & VEX_HWCAPS_PPC64_ISA2_07) == VEX_HWCAPS_PPC64_ISA2_07);
+ }
+
+ break;
+# endif
case AT_ICACHEBSIZE:
+ case AT_DCACHEBSIZE:
case AT_UCACHEBSIZE:
# if defined(VGP_ppc32_linux)
/* acquire cache info */
@@ -852,7 +902,8 @@
/*====================================================================*/
/* Create the client's initial memory image. */
-IIFinaliseImageInfo VG_(ii_create_image)( IICreateImageInfo iicii )
+IIFinaliseImageInfo VG_(ii_create_image)( IICreateImageInfo iicii,
+ const VexArchInfo* vex_archinfo )
{
ExeInfo info;
HChar** env = NULL;
@@ -913,7 +964,8 @@
iifii.initial_client_SP
= setup_client_stack( init_sp, env,
&info, &iifii.client_auxv,
- iicii.clstack_end, iifii.clstack_max_size );
+ iicii.clstack_end, iifii.clstack_max_size,
+ vex_archinfo );
VG_(free)(env);
Modified: trunk/coregrind/m_main.c
==============================================================================
--- trunk/coregrind/m_main.c (original)
+++ trunk/coregrind/m_main.c Thu Apr 9 17:23:20 2015
@@ -1822,9 +1822,12 @@
//--------------------------------------------------------------
// Figure out what sort of CPU we're on, and whether it is
// able to run V.
+ /* The vex_archinfo structure is passed down later to the client
+ * to verify the HW info settings are consistent.
+ */
+ VexArchInfo vex_archinfo;
VG_(debugLog)(1, "main", "Get hardware capabilities ...\n");
{ VexArch vex_arch;
- VexArchInfo vex_archinfo;
Bool ok = VG_(machine_get_hwcaps)();
if (!ok) {
VG_(printf)("\n");
@@ -1952,7 +1955,7 @@
# endif
/* NOTE: this call reads VG_(clo_main_stacksize). */
- the_iifii = VG_(ii_create_image)( the_iicii );
+ the_iifii = VG_(ii_create_image)( the_iicii, &vex_archinfo );
}
//==============================================================
Modified: trunk/coregrind/pub_core_initimg.h
==============================================================================
--- trunk/coregrind/pub_core_initimg.h (original)
+++ trunk/coregrind/pub_core_initimg.h Thu Apr 9 17:23:20 2015
@@ -33,6 +33,7 @@
#define __PUB_CORE_INITIMG_H
#include "pub_core_basics.h" // Addr
+#include "libvex.h"
//--------------------------------------------------------------------
// PURPOSE: Map the client executable into memory, then set up its
@@ -50,7 +51,8 @@
structure, which is gathered in an OS-specific way at startup.
This returns an IIFinaliseImageInfo structure: */
extern
-IIFinaliseImageInfo VG_(ii_create_image)( IICreateImageInfo );
+IIFinaliseImageInfo VG_(ii_create_image)( IICreateImageInfo,
+ const VexArchInfo* vex_archinfo );
/* Just before starting the client, we may need to make final
adjustments to its initial image. Also we need to set up the VEX
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