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From: <sv...@va...> - 2014-10-08 08:54:53
|
Author: florian
Date: Wed Oct 8 09:54:44 2014
New Revision: 2970
Log:
Constification part 5.
Constify ppXXXInstr, getRegUsage_XXXInstr, isMove_XXXInstr, emit_XXXInstr,
and iselSB_XXX.
Modified:
trunk/priv/host_amd64_defs.c
trunk/priv/host_amd64_defs.h
trunk/priv/host_amd64_isel.c
trunk/priv/host_arm64_defs.c
trunk/priv/host_arm64_defs.h
trunk/priv/host_arm64_isel.c
trunk/priv/host_arm_defs.c
trunk/priv/host_arm_defs.h
trunk/priv/host_arm_isel.c
trunk/priv/host_generic_reg_alloc2.c
trunk/priv/host_generic_regs.h
trunk/priv/host_mips_defs.c
trunk/priv/host_mips_defs.h
trunk/priv/host_mips_isel.c
trunk/priv/host_ppc_defs.c
trunk/priv/host_ppc_defs.h
trunk/priv/host_ppc_isel.c
trunk/priv/host_s390_defs.c
trunk/priv/host_s390_defs.h
trunk/priv/host_s390_isel.c
trunk/priv/host_x86_defs.c
trunk/priv/host_x86_defs.h
trunk/priv/host_x86_isel.c
trunk/priv/main_main.c
Modified: trunk/priv/host_amd64_defs.c
==============================================================================
--- trunk/priv/host_amd64_defs.c (original)
+++ trunk/priv/host_amd64_defs.c Wed Oct 8 09:54:44 2014
@@ -1010,7 +1010,7 @@
return i;
}
-void ppAMD64Instr ( AMD64Instr* i, Bool mode64 )
+void ppAMD64Instr ( const AMD64Instr* i, Bool mode64 )
{
vassert(mode64 == True);
switch (i->tag) {
@@ -1327,7 +1327,7 @@
/* --------- Helpers for register allocation. --------- */
-void getRegUsage_AMD64Instr ( HRegUsage* u, AMD64Instr* i, Bool mode64 )
+void getRegUsage_AMD64Instr ( HRegUsage* u, const AMD64Instr* i, Bool mode64 )
{
Bool unary;
vassert(mode64 == True);
@@ -1818,7 +1818,7 @@
source and destination to *src and *dst. If in doubt say No. Used
by the register allocator to do move coalescing.
*/
-Bool isMove_AMD64Instr ( AMD64Instr* i, HReg* src, HReg* dst )
+Bool isMove_AMD64Instr ( const AMD64Instr* i, HReg* src, HReg* dst )
{
switch (i->tag) {
case Ain_Alu64R:
@@ -2264,7 +2264,7 @@
leave it unchanged. */
Int emit_AMD64Instr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, AMD64Instr* i,
+ UChar* buf, Int nbuf, const AMD64Instr* i,
Bool mode64, VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
const void* disp_cp_chain_me_to_fastEP,
Modified: trunk/priv/host_amd64_defs.h
==============================================================================
--- trunk/priv/host_amd64_defs.h (original)
+++ trunk/priv/host_amd64_defs.h Wed Oct 8 09:54:44 2014
@@ -746,16 +746,16 @@
extern AMD64Instr* AMD64Instr_ProfInc ( void );
-extern void ppAMD64Instr ( AMD64Instr*, Bool );
+extern void ppAMD64Instr ( const AMD64Instr*, Bool );
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_AMD64Instr ( HRegUsage*, AMD64Instr*, Bool );
-extern void mapRegs_AMD64Instr ( HRegRemap*, AMD64Instr*, Bool );
-extern Bool isMove_AMD64Instr ( AMD64Instr*, HReg*, HReg* );
+extern void getRegUsage_AMD64Instr ( HRegUsage*, const AMD64Instr*, Bool );
+extern void mapRegs_AMD64Instr ( HRegRemap*, AMD64Instr*, Bool );
+extern Bool isMove_AMD64Instr ( const AMD64Instr*, HReg*, HReg* );
extern Int emit_AMD64Instr ( /*MB_MOD*/Bool* is_profInc,
UChar* buf, Int nbuf,
- AMD64Instr* i,
+ const AMD64Instr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
@@ -771,8 +771,8 @@
extern void getAllocableRegs_AMD64 ( Int*, HReg** );
extern HInstrArray* iselSB_AMD64 ( IRSB*,
VexArch,
- VexArchInfo*,
- VexAbiInfo*,
+ const VexArchInfo*,
+ const VexAbiInfo*,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_amd64_isel.c
==============================================================================
--- trunk/priv/host_amd64_isel.c (original)
+++ trunk/priv/host_amd64_isel.c Wed Oct 8 09:54:44 2014
@@ -4852,8 +4852,8 @@
HInstrArray* iselSB_AMD64 ( IRSB* bb,
VexArch arch_host,
- VexArchInfo* archinfo_host,
- VexAbiInfo* vbi/*UNUSED*/,
+ const VexArchInfo* archinfo_host,
+ const VexAbiInfo* vbi/*UNUSED*/,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_arm64_defs.c
==============================================================================
--- trunk/priv/host_arm64_defs.c (original)
+++ trunk/priv/host_arm64_defs.c Wed Oct 8 09:54:44 2014
@@ -1312,7 +1312,7 @@
/* ... */
-void ppARM64Instr ( ARM64Instr* i ) {
+void ppARM64Instr ( const ARM64Instr* i ) {
switch (i->tag) {
case ARM64in_Arith:
vex_printf("%s ", i->ARM64in.Arith.isAdd ? "add" : "sub");
@@ -1802,7 +1802,7 @@
/* --------- Helpers for register allocation. --------- */
-void getRegUsage_ARM64Instr ( HRegUsage* u, ARM64Instr* i, Bool mode64 )
+void getRegUsage_ARM64Instr ( HRegUsage* u, const ARM64Instr* i, Bool mode64 )
{
vassert(mode64 == True);
initHRegUsage(u);
@@ -2341,7 +2341,7 @@
source and destination to *src and *dst. If in doubt say No. Used
by the register allocator to do move coalescing.
*/
-Bool isMove_ARM64Instr ( ARM64Instr* i, HReg* src, HReg* dst )
+Bool isMove_ARM64Instr ( const ARM64Instr* i, HReg* src, HReg* dst )
{
switch (i->tag) {
case ARM64in_MovI:
@@ -3107,7 +3107,7 @@
leave it unchanged. */
Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, ARM64Instr* i,
+ UChar* buf, Int nbuf, const ARM64Instr* i,
Bool mode64, VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
const void* disp_cp_chain_me_to_fastEP,
Modified: trunk/priv/host_arm64_defs.h
==============================================================================
--- trunk/priv/host_arm64_defs.h (original)
+++ trunk/priv/host_arm64_defs.h Wed Oct 8 09:54:44 2014
@@ -912,16 +912,16 @@
ARM64AMode* amFailAddr );
extern ARM64Instr* ARM64Instr_ProfInc ( void );
-extern void ppARM64Instr ( ARM64Instr* );
+extern void ppARM64Instr ( const ARM64Instr* );
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_ARM64Instr ( HRegUsage*, ARM64Instr*, Bool );
+extern void getRegUsage_ARM64Instr ( HRegUsage*, const ARM64Instr*, Bool );
extern void mapRegs_ARM64Instr ( HRegRemap*, ARM64Instr*, Bool );
-extern Bool isMove_ARM64Instr ( ARM64Instr*, HReg*, HReg* );
+extern Bool isMove_ARM64Instr ( const ARM64Instr*, HReg*, HReg* );
extern Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, ARM64Instr* i,
+ UChar* buf, Int nbuf, const ARM64Instr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
@@ -937,8 +937,8 @@
extern void getAllocableRegs_ARM64 ( Int*, HReg** );
extern HInstrArray* iselSB_ARM64 ( IRSB*,
VexArch,
- VexArchInfo*,
- VexAbiInfo*,
+ const VexArchInfo*,
+ const VexAbiInfo*,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_arm64_isel.c
==============================================================================
--- trunk/priv/host_arm64_isel.c (original)
+++ trunk/priv/host_arm64_isel.c Wed Oct 8 09:54:44 2014
@@ -3782,8 +3782,8 @@
HInstrArray* iselSB_ARM64 ( IRSB* bb,
VexArch arch_host,
- VexArchInfo* archinfo_host,
- VexAbiInfo* vbi/*UNUSED*/,
+ const VexArchInfo* archinfo_host,
+ const VexAbiInfo* vbi/*UNUSED*/,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_arm_defs.c
==============================================================================
--- trunk/priv/host_arm_defs.c (original)
+++ trunk/priv/host_arm_defs.c Wed Oct 8 09:54:44 2014
@@ -1034,7 +1034,7 @@
}
}
-static const HChar* showARMNeonDataSize ( ARMInstr* i )
+static const HChar* showARMNeonDataSize ( const ARMInstr* i )
{
switch (i->tag) {
case ARMin_NBinary:
@@ -1551,7 +1551,7 @@
/* ... */
-void ppARMInstr ( ARMInstr* i ) {
+void ppARMInstr ( const ARMInstr* i ) {
switch (i->tag) {
case ARMin_Alu:
vex_printf("%-4s ", showARMAluOp(i->ARMin.Alu.op));
@@ -2018,7 +2018,7 @@
/* --------- Helpers for register allocation. --------- */
-void getRegUsage_ARMInstr ( HRegUsage* u, ARMInstr* i, Bool mode64 )
+void getRegUsage_ARMInstr ( HRegUsage* u, const ARMInstr* i, Bool mode64 )
{
vassert(mode64 == False);
initHRegUsage(u);
@@ -2523,7 +2523,7 @@
source and destination to *src and *dst. If in doubt say No. Used
by the register allocator to do move coalescing.
*/
-Bool isMove_ARMInstr ( ARMInstr* i, HReg* src, HReg* dst )
+Bool isMove_ARMInstr ( const ARMInstr* i, HReg* src, HReg* dst )
{
/* Moves between integer regs */
switch (i->tag) {
@@ -2970,7 +2970,7 @@
leave it unchanged. */
Int emit_ARMInstr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, ARMInstr* i,
+ UChar* buf, Int nbuf, const ARMInstr* i,
Bool mode64, VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
const void* disp_cp_chain_me_to_fastEP,
Modified: trunk/priv/host_arm_defs.h
==============================================================================
--- trunk/priv/host_arm_defs.h (original)
+++ trunk/priv/host_arm_defs.h Wed Oct 8 09:54:44 2014
@@ -1016,16 +1016,16 @@
ARMAMode1* amFailAddr );
extern ARMInstr* ARMInstr_ProfInc ( void );
-extern void ppARMInstr ( ARMInstr* );
+extern void ppARMInstr ( const ARMInstr* );
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_ARMInstr ( HRegUsage*, ARMInstr*, Bool );
+extern void getRegUsage_ARMInstr ( HRegUsage*, const ARMInstr*, Bool );
extern void mapRegs_ARMInstr ( HRegRemap*, ARMInstr*, Bool );
-extern Bool isMove_ARMInstr ( ARMInstr*, HReg*, HReg* );
+extern Bool isMove_ARMInstr ( const ARMInstr*, HReg*, HReg* );
extern Int emit_ARMInstr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, ARMInstr* i,
+ UChar* buf, Int nbuf, const ARMInstr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
@@ -1041,8 +1041,8 @@
extern void getAllocableRegs_ARM ( Int*, HReg** );
extern HInstrArray* iselSB_ARM ( IRSB*,
VexArch,
- VexArchInfo*,
- VexAbiInfo*,
+ const VexArchInfo*,
+ const VexAbiInfo*,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_arm_isel.c
==============================================================================
--- trunk/priv/host_arm_isel.c (original)
+++ trunk/priv/host_arm_isel.c Wed Oct 8 09:54:44 2014
@@ -6314,8 +6314,8 @@
HInstrArray* iselSB_ARM ( IRSB* bb,
VexArch arch_host,
- VexArchInfo* archinfo_host,
- VexAbiInfo* vbi/*UNUSED*/,
+ const VexArchInfo* archinfo_host,
+ const VexAbiInfo* vbi/*UNUSED*/,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_generic_reg_alloc2.c
==============================================================================
--- trunk/priv/host_generic_reg_alloc2.c (original)
+++ trunk/priv/host_generic_reg_alloc2.c Wed Oct 8 09:54:44 2014
@@ -144,7 +144,7 @@
/* Does this instruction mention a particular reg? */
static Bool instrMentionsReg (
- void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
+ void (*getRegUsage) (HRegUsage*, const HInstr*, Bool),
HInstr* instr,
HReg r,
Bool mode64
@@ -174,7 +174,7 @@
spill, or -1 if none was found. */
static
Int findMostDistantlyMentionedVReg (
- void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
+ void (*getRegUsage) (HRegUsage*, const HInstr*, Bool),
HInstrArray* instrs_in,
Int search_from_instr,
RRegState* state,
@@ -316,10 +316,10 @@
/* Return True iff the given insn is a reg-reg move, in which
case also return the src and dst regs. */
- Bool (*isMove) ( HInstr*, HReg*, HReg* ),
+ Bool (*isMove) ( const HInstr*, HReg*, HReg* ),
/* Get info about register usage in this insn. */
- void (*getRegUsage) ( HRegUsage*, HInstr*, Bool ),
+ void (*getRegUsage) ( HRegUsage*, const HInstr*, Bool ),
/* Apply a reg-reg mapping to an insn. */
void (*mapRegs) ( HRegRemap*, HInstr*, Bool ),
@@ -337,7 +337,7 @@
Int guest_sizeB,
/* For debug printing only. */
- void (*ppInstr) ( HInstr*, Bool ),
+ void (*ppInstr) ( const HInstr*, Bool ),
void (*ppReg) ( HReg ),
/* 32/64bit mode */
Modified: trunk/priv/host_generic_regs.h
==============================================================================
--- trunk/priv/host_generic_regs.h (original)
+++ trunk/priv/host_generic_regs.h Wed Oct 8 09:54:44 2014
@@ -326,10 +326,10 @@
/* Return True iff the given insn is a reg-reg move, in which
case also return the src and dst regs. */
- Bool (*isMove) (HInstr*, HReg*, HReg*),
+ Bool (*isMove) (const HInstr*, HReg*, HReg*),
/* Get info about register usage in this insn. */
- void (*getRegUsage) (HRegUsage*, HInstr*, Bool),
+ void (*getRegUsage) (HRegUsage*, const HInstr*, Bool),
/* Apply a reg-reg mapping to an insn. */
void (*mapRegs) (HRegRemap*, HInstr*, Bool),
@@ -342,7 +342,7 @@
Int guest_sizeB,
/* For debug printing only. */
- void (*ppInstr) ( HInstr*, Bool ),
+ void (*ppInstr) ( const HInstr*, Bool ),
void (*ppReg) ( HReg ),
/* 32/64bit mode */
Modified: trunk/priv/host_mips_defs.c
==============================================================================
--- trunk/priv/host_mips_defs.c (original)
+++ trunk/priv/host_mips_defs.c Wed Oct 8 09:54:44 2014
@@ -1601,7 +1601,7 @@
vex_printf(",0x%016llx", imm);
}
-void ppMIPSInstr(MIPSInstr * i, Bool mode64)
+void ppMIPSInstr(const MIPSInstr * i, Bool mode64)
{
switch (i->tag) {
case Min_LI:
@@ -1991,7 +1991,7 @@
/* --------- Helpers for register allocation. --------- */
-void getRegUsage_MIPSInstr(HRegUsage * u, MIPSInstr * i, Bool mode64)
+void getRegUsage_MIPSInstr(HRegUsage * u, const MIPSInstr * i, Bool mode64)
{
initHRegUsage(u);
switch (i->tag) {
@@ -2370,7 +2370,7 @@
source and destination to *src and *dst. If in doubt say No. Used
by the register allocator to do move coalescing.
*/
-Bool isMove_MIPSInstr(MIPSInstr * i, HReg * src, HReg * dst)
+Bool isMove_MIPSInstr(const MIPSInstr * i, HReg * src, HReg * dst)
{
/* Moves between integer regs */
if (i->tag == Min_Alu) {
@@ -2918,7 +2918,7 @@
instruction was a profiler inc, set *is_profInc to True, else
leave it unchanged. */
Int emit_MIPSInstr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, MIPSInstr* i,
+ UChar* buf, Int nbuf, const MIPSInstr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
Modified: trunk/priv/host_mips_defs.h
==============================================================================
--- trunk/priv/host_mips_defs.h (original)
+++ trunk/priv/host_mips_defs.h Wed Oct 8 09:54:44 2014
@@ -705,15 +705,15 @@
MIPSAMode* amFailAddr );
extern MIPSInstr *MIPSInstr_ProfInc( void );
-extern void ppMIPSInstr(MIPSInstr *, Bool mode64);
+extern void ppMIPSInstr(const MIPSInstr *, Bool mode64);
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_MIPSInstr (HRegUsage *, MIPSInstr *, Bool);
-extern void mapRegs_MIPSInstr (HRegRemap *, MIPSInstr *, Bool mode64);
-extern Bool isMove_MIPSInstr (MIPSInstr *, HReg *, HReg *);
+extern void getRegUsage_MIPSInstr (HRegUsage *, const MIPSInstr *, Bool);
+extern void mapRegs_MIPSInstr (HRegRemap *, MIPSInstr *, Bool mode64);
+extern Bool isMove_MIPSInstr (const MIPSInstr *, HReg *, HReg *);
extern Int emit_MIPSInstr (/*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, MIPSInstr* i,
+ UChar* buf, Int nbuf, const MIPSInstr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
@@ -729,8 +729,8 @@
extern void getAllocableRegs_MIPS (Int *, HReg **, Bool mode64);
extern HInstrArray *iselSB_MIPS ( IRSB*,
VexArch,
- VexArchInfo*,
- VexAbiInfo*,
+ const VexArchInfo*,
+ const VexAbiInfo*,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_mips_isel.c
==============================================================================
--- trunk/priv/host_mips_isel.c (original)
+++ trunk/priv/host_mips_isel.c Wed Oct 8 09:54:44 2014
@@ -4153,8 +4153,8 @@
/* Translate an entire BB to mips code. */
HInstrArray *iselSB_MIPS ( IRSB* bb,
VexArch arch_host,
- VexArchInfo* archinfo_host,
- VexAbiInfo* vbi,
+ const VexArchInfo* archinfo_host,
+ const VexAbiInfo* vbi,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_ppc_defs.c
==============================================================================
--- trunk/priv/host_ppc_defs.c (original)
+++ trunk/priv/host_ppc_defs.c Wed Oct 8 09:54:44 2014
@@ -1528,7 +1528,7 @@
}
}
-void ppPPCInstr ( PPCInstr* i, Bool mode64 )
+void ppPPCInstr ( const PPCInstr* i, Bool mode64 )
{
switch (i->tag) {
case Pin_LI:
@@ -2297,7 +2297,7 @@
/* --------- Helpers for register allocation. --------- */
-void getRegUsage_PPCInstr ( HRegUsage* u, PPCInstr* i, Bool mode64 )
+void getRegUsage_PPCInstr ( HRegUsage* u, const PPCInstr* i, Bool mode64 )
{
initHRegUsage(u);
switch (i->tag) {
@@ -3034,7 +3034,7 @@
source and destination to *src and *dst. If in doubt say No. Used
by the register allocator to do move coalescing.
*/
-Bool isMove_PPCInstr ( PPCInstr* i, HReg* src, HReg* dst )
+Bool isMove_PPCInstr ( const PPCInstr* i, HReg* src, HReg* dst )
{
/* Moves between integer regs */
if (i->tag == Pin_Alu) {
@@ -3804,7 +3804,7 @@
it unchanged.
*/
Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, PPCInstr* i,
+ UChar* buf, Int nbuf, const PPCInstr* i,
Bool mode64, VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
const void* disp_cp_chain_me_to_fastEP,
Modified: trunk/priv/host_ppc_defs.h
==============================================================================
--- trunk/priv/host_ppc_defs.h (original)
+++ trunk/priv/host_ppc_defs.h Wed Oct 8 09:54:44 2014
@@ -1134,16 +1134,16 @@
PPCAMode* amFailAddr );
extern PPCInstr* PPCInstr_ProfInc ( void );
-extern void ppPPCInstr(PPCInstr*, Bool mode64);
+extern void ppPPCInstr(const PPCInstr*, Bool mode64);
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_PPCInstr ( HRegUsage*, PPCInstr*, Bool mode64 );
-extern void mapRegs_PPCInstr ( HRegRemap*, PPCInstr* , Bool mode64);
-extern Bool isMove_PPCInstr ( PPCInstr*, HReg*, HReg* );
+extern void getRegUsage_PPCInstr ( HRegUsage*, const PPCInstr*, Bool mode64 );
+extern void mapRegs_PPCInstr ( HRegRemap*, PPCInstr* , Bool mode64);
+extern Bool isMove_PPCInstr ( const PPCInstr*, HReg*, HReg* );
extern Int emit_PPCInstr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, PPCInstr* i,
+ UChar* buf, Int nbuf, const PPCInstr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
@@ -1159,8 +1159,8 @@
extern void getAllocableRegs_PPC ( Int*, HReg**, Bool mode64 );
extern HInstrArray* iselSB_PPC ( IRSB*,
VexArch,
- VexArchInfo*,
- VexAbiInfo*,
+ const VexArchInfo*,
+ const VexAbiInfo*,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_ppc_isel.c
==============================================================================
--- trunk/priv/host_ppc_isel.c (original)
+++ trunk/priv/host_ppc_isel.c Wed Oct 8 09:54:44 2014
@@ -285,7 +285,7 @@
Bool mode64;
- VexAbiInfo* vbi;
+ const VexAbiInfo* vbi; // unused
Bool chainingAllowed;
Addr64 max_ga;
@@ -6085,8 +6085,8 @@
/* Translate an entire SB to ppc code. */
HInstrArray* iselSB_PPC ( IRSB* bb,
VexArch arch_host,
- VexArchInfo* archinfo_host,
- VexAbiInfo* vbi,
+ const VexArchInfo* archinfo_host,
+ const VexAbiInfo* vbi,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_s390_defs.c
==============================================================================
--- trunk/priv/host_s390_defs.c (original)
+++ trunk/priv/host_s390_defs.c Wed Oct 8 09:54:44 2014
@@ -406,7 +406,7 @@
}
void
-ppS390Instr(s390_insn *insn, Bool mode64)
+ppS390Instr(const s390_insn *insn, Bool mode64)
{
vex_printf("%s", s390_insn_as_string(insn));
}
@@ -432,7 +432,7 @@
/* Tell the register allocator how the given instruction uses the registers
it refers to. */
void
-getRegUsage_S390Instr(HRegUsage *u, s390_insn *insn, Bool mode64)
+getRegUsage_S390Instr(HRegUsage *u, const s390_insn *insn, Bool mode64)
{
s390_insn_get_reg_usage(u, insn);
}
@@ -450,7 +450,7 @@
assign the source and destination to *src and *dst. If in doubt say No.
Used by the register allocator to do move coalescing. */
Bool
-isMove_S390Instr(s390_insn *insn, HReg *src, HReg *dst)
+isMove_S390Instr(const s390_insn *insn, HReg *src, HReg *dst)
{
return s390_insn_is_reg_reg_move(insn, src, dst);
}
@@ -9896,7 +9896,7 @@
Int
-emit_S390Instr(Bool *is_profinc, UChar *buf, Int nbuf, s390_insn *insn,
+emit_S390Instr(Bool *is_profinc, UChar *buf, Int nbuf, const s390_insn *insn,
Bool mode64, VexEndness endness_host,
const void *disp_cp_chain_me_to_slowEP,
const void *disp_cp_chain_me_to_fastEP,
Modified: trunk/priv/host_s390_defs.h
==============================================================================
--- trunk/priv/host_s390_defs.h (original)
+++ trunk/priv/host_s390_defs.h Wed Oct 8 09:54:44 2014
@@ -727,22 +727,22 @@
/*--------------------------------------------------------*/
void ppS390AMode(s390_amode *);
-void ppS390Instr(s390_insn *, Bool mode64);
+void ppS390Instr(const s390_insn *, Bool mode64);
void ppHRegS390(HReg);
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-void getRegUsage_S390Instr( HRegUsage *, s390_insn *, Bool );
+void getRegUsage_S390Instr( HRegUsage *, const s390_insn *, Bool );
void mapRegs_S390Instr ( HRegRemap *, s390_insn *, Bool );
-Bool isMove_S390Instr ( s390_insn *, HReg *, HReg * );
-Int emit_S390Instr ( Bool *, UChar *, Int, s390_insn *, Bool,
+Bool isMove_S390Instr ( const s390_insn *, HReg *, HReg * );
+Int emit_S390Instr ( Bool *, UChar *, Int, const s390_insn *, Bool,
VexEndness, const void *, const void *,
const void *, const void *);
void getAllocableRegs_S390( Int *, HReg **, Bool );
void genSpill_S390 ( HInstr **, HInstr **, HReg , Int , Bool );
void genReload_S390 ( HInstr **, HInstr **, HReg , Int , Bool );
-HInstrArray *iselSB_S390 ( IRSB *, VexArch, VexArchInfo *, VexAbiInfo *,
- Int, Int, Bool, Bool, Addr64);
+HInstrArray *iselSB_S390 ( IRSB *, VexArch, const VexArchInfo *,
+ const VexAbiInfo *, Int, Int, Bool, Bool, Addr64);
/* Return the number of bytes of code needed for an event check */
Int evCheckSzB_S390(VexEndness endness_host);
Modified: trunk/priv/host_s390_isel.c
==============================================================================
--- trunk/priv/host_s390_isel.c (original)
+++ trunk/priv/host_s390_isel.c Wed Oct 8 09:54:44 2014
@@ -4078,8 +4078,8 @@
Do not assign it to a global variable! */
HInstrArray *
-iselSB_S390(IRSB *bb, VexArch arch_host, VexArchInfo *archinfo_host,
- VexAbiInfo *vbi, Int offset_host_evcheck_counter,
+iselSB_S390(IRSB *bb, VexArch arch_host, const VexArchInfo *archinfo_host,
+ const VexAbiInfo *vbi, Int offset_host_evcheck_counter,
Int offset_host_evcheck_fail_addr, Bool chaining_allowed,
Bool add_profinc, Addr64 max_ga)
{
Modified: trunk/priv/host_x86_defs.c
==============================================================================
--- trunk/priv/host_x86_defs.c (original)
+++ trunk/priv/host_x86_defs.c Wed Oct 8 09:54:44 2014
@@ -924,7 +924,7 @@
return i;
}
-void ppX86Instr ( X86Instr* i, Bool mode64 ) {
+void ppX86Instr ( const X86Instr* i, Bool mode64 ) {
vassert(mode64 == False);
switch (i->tag) {
case Xin_Alu32R:
@@ -1220,7 +1220,7 @@
/* --------- Helpers for register allocation. --------- */
-void getRegUsage_X86Instr (HRegUsage* u, X86Instr* i, Bool mode64)
+void getRegUsage_X86Instr (HRegUsage* u, const X86Instr* i, Bool mode64)
{
Bool unary;
vassert(mode64 == False);
@@ -1668,7 +1668,7 @@
source and destination to *src and *dst. If in doubt say No. Used
by the register allocator to do move coalescing.
*/
-Bool isMove_X86Instr ( X86Instr* i, HReg* src, HReg* dst )
+Bool isMove_X86Instr ( const X86Instr* i, HReg* src, HReg* dst )
{
/* Moves between integer regs */
if (i->tag == Xin_Alu32R) {
@@ -2101,7 +2101,7 @@
leave it unchanged. */
Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, X86Instr* i,
+ UChar* buf, Int nbuf, const X86Instr* i,
Bool mode64, VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
const void* disp_cp_chain_me_to_fastEP,
Modified: trunk/priv/host_x86_defs.h
==============================================================================
--- trunk/priv/host_x86_defs.h (original)
+++ trunk/priv/host_x86_defs.h Wed Oct 8 09:54:44 2014
@@ -707,15 +707,15 @@
extern X86Instr* X86Instr_ProfInc ( void );
-extern void ppX86Instr ( X86Instr*, Bool );
+extern void ppX86Instr ( const X86Instr*, Bool );
/* Some functions that insulate the register allocator from details
of the underlying instruction set. */
-extern void getRegUsage_X86Instr ( HRegUsage*, X86Instr*, Bool );
+extern void getRegUsage_X86Instr ( HRegUsage*, const X86Instr*, Bool );
extern void mapRegs_X86Instr ( HRegRemap*, X86Instr*, Bool );
-extern Bool isMove_X86Instr ( X86Instr*, HReg*, HReg* );
+extern Bool isMove_X86Instr ( const X86Instr*, HReg*, HReg* );
extern Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc,
- UChar* buf, Int nbuf, X86Instr* i,
+ UChar* buf, Int nbuf, const X86Instr* i,
Bool mode64,
VexEndness endness_host,
const void* disp_cp_chain_me_to_slowEP,
@@ -733,8 +733,8 @@
extern void getAllocableRegs_X86 ( Int*, HReg** );
extern HInstrArray* iselSB_X86 ( IRSB*,
VexArch,
- VexArchInfo*,
- VexAbiInfo*,
+ const VexArchInfo*,
+ const VexAbiInfo*,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/host_x86_isel.c
==============================================================================
--- trunk/priv/host_x86_isel.c (original)
+++ trunk/priv/host_x86_isel.c Wed Oct 8 09:54:44 2014
@@ -4411,8 +4411,8 @@
HInstrArray* iselSB_X86 ( IRSB* bb,
VexArch arch_host,
- VexArchInfo* archinfo_host,
- VexAbiInfo* vbi/*UNUSED*/,
+ const VexArchInfo* archinfo_host,
+ const VexAbiInfo* vbi/*UNUSED*/,
Int offs_Host_EvC_Counter,
Int offs_Host_EvC_FailAddr,
Bool chainingAllowed,
Modified: trunk/priv/main_main.c
==============================================================================
--- trunk/priv/main_main.c (original)
+++ trunk/priv/main_main.c Wed Oct 8 09:54:44 2014
@@ -210,18 +210,19 @@
from the target instruction set. */
HReg* available_real_regs;
Int n_available_real_regs;
- Bool (*isMove) ( HInstr*, HReg*, HReg* );
- void (*getRegUsage) ( HRegUsage*, HInstr*, Bool );
+ Bool (*isMove) ( const HInstr*, HReg*, HReg* );
+ void (*getRegUsage) ( HRegUsage*, const HInstr*, Bool );
void (*mapRegs) ( HRegRemap*, HInstr*, Bool );
void (*genSpill) ( HInstr**, HInstr**, HReg, Int, Bool );
void (*genReload) ( HInstr**, HInstr**, HReg, Int, Bool );
HInstr* (*directReload) ( HInstr*, HReg, Short );
- void (*ppInstr) ( HInstr*, Bool );
+ void (*ppInstr) ( const HInstr*, Bool );
void (*ppReg) ( HReg );
- HInstrArray* (*iselSB) ( IRSB*, VexArch, VexArchInfo*, VexAbiInfo*,
- Int, Int, Bool, Bool, Addr64 );
+ HInstrArray* (*iselSB) ( IRSB*, VexArch, const VexArchInfo*,
+ const VexAbiInfo*, Int, Int, Bool, Bool,
+ Addr64 );
Int (*emit) ( /*MB_MOD*/Bool*,
- UChar*, Int, HInstr*, Bool, VexEndness,
+ UChar*, Int, const HInstr*, Bool, VexEndness,
const void*, const void*, const void*,
const void* );
IRExpr* (*specHelper) ( const HChar*, IRExpr**, IRStmt**, Int );
|