Author: petarj
Date: Sat Sep 27 06:40:33 2014
New Revision: 14572
Log:
mips64: enable soft-float build of the tests
Cavium toolchain defaults to soft-float, so it is important to enable full
build of the test suite to work in that case as well.
This boils down to protecting FPU-specific code segments with
#if defined(__mips_hard_float)
#endif
Modified:
trunk/none/tests/mips64/fpu_arithmetic.c
trunk/none/tests/mips64/fpu_branches.c
trunk/none/tests/mips64/fpu_control_word.c
trunk/none/tests/mips64/fpu_load_store.c
trunk/none/tests/mips64/load_store_unaligned.c
trunk/none/tests/mips64/macro_fpu.h
trunk/none/tests/mips64/move_instructions.c
trunk/none/tests/mips64/round.c
trunk/none/tests/mips64/rounding_mode.h
trunk/none/tests/mips64/test_fcsr.c
Modified: trunk/none/tests/mips64/fpu_arithmetic.c
==============================================================================
--- trunk/none/tests/mips64/fpu_arithmetic.c (original)
+++ trunk/none/tests/mips64/fpu_arithmetic.c Sat Sep 27 06:40:33 2014
@@ -3,6 +3,7 @@
#include "rounding_mode.h"
#include "macro_fpu.h"
+#if defined(__mips_hard_float)
int arithmeticOperations(flt_art_op_t op)
{
double fd_d = 0;
@@ -154,9 +155,11 @@
}
return 0;
}
+#endif
int main()
{
+#if defined(__mips_hard_float)
flt_art_op_t op;
printf("-------------------------- %s --------------------------\n",
@@ -164,6 +167,6 @@
for (op = ABSS; op <= NMSUBD; op++) {
arithmeticOperations(op);
}
-
+#endif
return 0;
}
Modified: trunk/none/tests/mips64/fpu_branches.c
==============================================================================
--- trunk/none/tests/mips64/fpu_branches.c (original)
+++ trunk/none/tests/mips64/fpu_branches.c Sat Sep 27 06:40:33 2014
@@ -3,6 +3,7 @@
int main()
{
+#if defined(__mips_hard_float)
int i = 0;
printf("--- BC1F --- if fs == ft then " \
@@ -144,6 +145,7 @@
TESTINST_CONDs("c.ngt.s", i);
TESTINST_CONDd("c.ngt.d", i);
}
+#endif
return 0;
}
Modified: trunk/none/tests/mips64/fpu_control_word.c
==============================================================================
--- trunk/none/tests/mips64/fpu_control_word.c (original)
+++ trunk/none/tests/mips64/fpu_control_word.c Sat Sep 27 06:40:33 2014
@@ -1,5 +1,6 @@
#include <stdio.h>
+#if defined(__mips_hard_float)
#define TESTINST_CFC1_CTC1(N) \
{ \
unsigned int out = 0; \
@@ -14,6 +15,9 @@
); \
printf("out=%d, in=%d\n", out, N); \
}
+#else
+#define TESTINST_CFC1_CTC1(N)
+#endif
int main()
{
Modified: trunk/none/tests/mips64/fpu_load_store.c
==============================================================================
--- trunk/none/tests/mips64/fpu_load_store.c (original)
+++ trunk/none/tests/mips64/fpu_load_store.c Sat Sep 27 06:40:33 2014
@@ -3,6 +3,7 @@
int main()
{
+#if defined(__mips_hard_float)
int i;
int s1 = sizeof(int);
int s2 = sizeof(unsigned long long);
@@ -64,6 +65,7 @@
for (i = 0; i < (N-1)*s1; i = i+4) {
TEST6("swxc1", i);
}
+#endif
return 0;
}
Modified: trunk/none/tests/mips64/load_store_unaligned.c
==============================================================================
--- trunk/none/tests/mips64/load_store_unaligned.c (original)
+++ trunk/none/tests/mips64/load_store_unaligned.c Sat Sep 27 06:40:33 2014
@@ -23,6 +23,7 @@
int main()
{
+#if defined(__mips_hard_float)
int i, index;
unsigned long long outLoad;
for (i = 0; i < N * SOLL; i++) {
@@ -42,5 +43,6 @@
printf("i: %d, memSrc[%d]: 0x%llx, memDst[%d]: 0x%llx, outLoad: 0x%llx\n",
i, index, memSrc[index], index, memDst[index], outLoad);
}
+#endif
return 0;
}
Modified: trunk/none/tests/mips64/macro_fpu.h
==============================================================================
--- trunk/none/tests/mips64/macro_fpu.h (original)
+++ trunk/none/tests/mips64/macro_fpu.h Sat Sep 27 06:40:33 2014
@@ -52,6 +52,7 @@
"cvt.l.d", "cvt.s.l",
};
+#if defined(__mips_hard_float)
#define UNOPdd(op) \
fd_d = 0; \
__asm__ __volatile__( \
@@ -352,3 +353,4 @@
printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \
instruction, outd, fs_d[i], ft_d[i]); \
}
+#endif
Modified: trunk/none/tests/mips64/move_instructions.c
==============================================================================
--- trunk/none/tests/mips64/move_instructions.c (original)
+++ trunk/none/tests/mips64/move_instructions.c Sat Sep 27 06:40:33 2014
@@ -46,6 +46,7 @@
-347856.475, 23.04 -1.0, 356047.56
};
+#if defined(__mips_hard_float)
#define TEST1(mem) \
{ \
unsigned long long out; \
@@ -190,9 +191,11 @@
printf("%s :: RDval: 0x%x, RSval: 0x%x, out: 0x%lx\n", \
instruction, RDval, RSval, out); \
}
+#endif
int main()
{
+#if defined(__mips_hard_float)
int i;
init_reg_val2();
@@ -366,6 +369,6 @@
TEST5("movt", 0x5555ffff, 0xffffffff, t3, t1);
TEST5("movt", 0xeeeeeeee, 0xffffeeee, t3, t0);
}
-
+#endif
return 0;
}
Modified: trunk/none/tests/mips64/round.c
==============================================================================
--- trunk/none/tests/mips64/round.c (original)
+++ trunk/none/tests/mips64/round.c Sat Sep 27 06:40:33 2014
@@ -2,6 +2,7 @@
#include "rounding_mode.h"
#include "macro_fpu.h"
+#if defined(__mips_hard_float)
int directedRoundingMode(flt_dir_op_t op) {
int fd_w = 0;
long long int fd_l = 0;
@@ -170,9 +171,11 @@
}
return 0;
}
+#endif
int main()
{
+#if defined(__mips_hard_float)
flt_dir_op_t op;
flt_round_op_t op1;
@@ -187,5 +190,6 @@
for (op1 = CVTDS; op1 <= CVTSL; op1++) {
FCSRRoundingMode(op1);
}
+#endif
return 0;
}
Modified: trunk/none/tests/mips64/rounding_mode.h
==============================================================================
--- trunk/none/tests/mips64/rounding_mode.h (original)
+++ trunk/none/tests/mips64/rounding_mode.h Sat Sep 27 06:40:33 2014
@@ -1,3 +1,4 @@
+#if defined(__mips_hard_float)
typedef enum {
TO_NEAREST=0,
TO_ZERO,
@@ -59,3 +60,4 @@
break;
}
}
+#endif
Modified: trunk/none/tests/mips64/test_fcsr.c
==============================================================================
--- trunk/none/tests/mips64/test_fcsr.c (original)
+++ trunk/none/tests/mips64/test_fcsr.c Sat Sep 27 06:40:33 2014
@@ -2,6 +2,7 @@
int main ()
{
+#if defined(__mips_hard_float)
long out [] = {0, 0};
__asm__ volatile("cfc1 $a1, $31" "\n\t"
"dli $t0, 0x405ee0a3d70a3d71" "\n\t"
@@ -22,5 +23,6 @@
: "a1", "a2", "t0", "$f0"
);
printf("FCSR::1: 0x%lx, 2: 0x%lx\n", out[0], out[1]);
+#endif
return 0;
}
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