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From: <sv...@va...> - 2014-02-14 08:55:47
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Author: florian
Date: Fri Feb 14 08:55:32 2014
New Revision: 2818
Log:
Fix comments and code snippets that were making incorrect claims about
the alignment requirement of the guest state, shadow areas, and register
spill area sizes.
The size of these areas ought to be a multiple of 16 bytes.
Modified:
trunk/priv/guest_arm_helpers.c
trunk/priv/guest_x86_helpers.c
trunk/priv/host_generic_reg_alloc2.c
trunk/pub/libvex.h
trunk/pub/libvex_guest_arm.h
trunk/pub/libvex_guest_arm64.h
trunk/pub/libvex_guest_mips32.h
trunk/pub/libvex_guest_mips64.h
trunk/pub/libvex_guest_ppc32.h
trunk/pub/libvex_guest_s390x.h
trunk/pub/libvex_guest_x86.h
Modified: trunk/priv/guest_arm_helpers.c
==============================================================================
--- trunk/priv/guest_arm_helpers.c (original)
+++ trunk/priv/guest_arm_helpers.c Fri Feb 14 08:55:32 2014
@@ -1030,10 +1030,6 @@
vex_state->guest_ITSTATE = 0;
vex_state->padding1 = 0;
- vex_state->padding2 = 0;
- vex_state->padding3 = 0;
- vex_state->padding4 = 0;
- vex_state->padding5 = 0;
}
Modified: trunk/priv/guest_x86_helpers.c
==============================================================================
--- trunk/priv/guest_x86_helpers.c (original)
+++ trunk/priv/guest_x86_helpers.c Fri Feb 14 08:55:32 2014
@@ -2764,11 +2764,7 @@
vex_state->guest_SC_CLASS = 0;
vex_state->guest_IP_AT_SYSCALL = 0;
- Int i;
- for (i = 0; i < sizeof(vex_state->padding)
- / sizeof(vex_state->padding[0]); i++) {
- vex_state->padding[i] = 0;
- }
+ vex_state->padding1 = 0;
}
Modified: trunk/priv/host_generic_reg_alloc2.c
==============================================================================
--- trunk/priv/host_generic_reg_alloc2.c (original)
+++ trunk/priv/host_generic_reg_alloc2.c Fri Feb 14 08:55:32 2014
@@ -399,9 +399,9 @@
not at each insn processed. */
Bool do_sanity_check;
- vassert(0 == (guest_sizeB % 32));
- vassert(0 == (LibVEX_N_SPILL_BYTES % 32));
- vassert(0 == (N_SPILL64S % 4));
+ vassert(0 == (guest_sizeB % 16));
+ vassert(0 == (LibVEX_N_SPILL_BYTES % 16));
+ vassert(0 == (N_SPILL64S % 2));
/* The live range numbers are signed shorts, and so limiting the
number of insns to 15000 comfortably guards against them
Modified: trunk/pub/libvex.h
==============================================================================
--- trunk/pub/libvex.h (original)
+++ trunk/pub/libvex.h Fri Feb 14 08:55:32 2014
@@ -521,7 +521,7 @@
typedef
struct {
/* Total size of the guest state, in bytes. Must be
- 8-aligned. */
+ 16-aligned. */
Int total_sizeB;
/* Whereabouts is the stack pointer? */
Int offset_SP;
Modified: trunk/pub/libvex_guest_arm.h
==============================================================================
--- trunk/pub/libvex_guest_arm.h (original)
+++ trunk/pub/libvex_guest_arm.h Fri Feb 14 08:55:32 2014
@@ -193,12 +193,8 @@
*/
UInt guest_ITSTATE;
- /* Padding to make it have an 32-aligned size */
+ /* Padding to make it have an 16-aligned size */
UInt padding1;
- UInt padding2;
- UInt padding3;
- UInt padding4;
- UInt padding5;
}
VexGuestARMState;
Modified: trunk/pub/libvex_guest_arm64.h
==============================================================================
--- trunk/pub/libvex_guest_arm64.h (original)
+++ trunk/pub/libvex_guest_arm64.h Fri Feb 14 08:55:32 2014
@@ -158,7 +158,7 @@
does get set when required. */
UInt guest_FPSR;
- /* Padding to make it have an 32-aligned size */
+ /* Padding to make it have an 16-aligned size */
UInt pad_end_0;
ULong pad_end_1;
}
Modified: trunk/pub/libvex_guest_mips32.h
==============================================================================
--- trunk/pub/libvex_guest_mips32.h (original)
+++ trunk/pub/libvex_guest_mips32.h Fri Feb 14 08:55:32 2014
@@ -148,7 +148,7 @@
ULong guest_ac2; /* 344 */
ULong guest_ac3; /* 352 */
- UInt padding[6];
+ UInt padding[2];
} VexGuestMIPS32State;
/*---------------------------------------------------------------*/
/*--- Utility functions for MIPS32 guest stuff. ---*/
Modified: trunk/pub/libvex_guest_mips64.h
==============================================================================
--- trunk/pub/libvex_guest_mips64.h (original)
+++ trunk/pub/libvex_guest_mips64.h Fri Feb 14 08:55:32 2014
@@ -145,7 +145,7 @@
ULong host_EvC_FAILADDR; /* 600 */
UInt host_EvC_COUNTER; /* 608 */
UInt guest_COND; /* 612 */
- UInt padding[6];
+ UInt padding[2];
} VexGuestMIPS64State;
/*---------------------------------------------------------------*/
Modified: trunk/pub/libvex_guest_ppc32.h
==============================================================================
--- trunk/pub/libvex_guest_ppc32.h (original)
+++ trunk/pub/libvex_guest_ppc32.h Fri Feb 14 08:55:32 2014
@@ -242,7 +242,7 @@
/* 1368 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
/* 1376 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
- /* Padding to make it have an 8-aligned size */
+ /* Padding to make it have an 16-aligned size */
/* 1384 */ UInt padding2;
}
Modified: trunk/pub/libvex_guest_s390x.h
==============================================================================
--- trunk/pub/libvex_guest_s390x.h (original)
+++ trunk/pub/libvex_guest_s390x.h Fri Feb 14 08:55:32 2014
@@ -148,11 +148,11 @@
/* 424 */ ULong host_EvC_FAILADDR;
/*------------------------------------------------------------*/
-/*--- Force alignment to 32 bytes ---*/
+/*--- Force alignment to 16 bytes ---*/
/*------------------------------------------------------------*/
- /* 432 */ UChar padding[16];
+ /* 432 */ UChar padding[0];
- /* 448 */ /* This is the size of the guest state */
+ /* 432 */ /* This is the size of the guest state */
} VexGuestS390XState;
Modified: trunk/pub/libvex_guest_x86.h
==============================================================================
--- trunk/pub/libvex_guest_x86.h (original)
+++ trunk/pub/libvex_guest_x86.h Fri Feb 14 08:55:32 2014
@@ -220,8 +220,8 @@
been interrupted by a signal. */
UInt guest_IP_AT_SYSCALL;
- /* Padding to make it have an 32-aligned size */
- UInt padding[5];
+ /* Padding to make it have an 16-aligned size */
+ UInt padding1;
}
VexGuestX86State;
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