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From: <sv...@va...> - 2013-08-03 19:37:05
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florian 2013-08-03 20:36:55 +0100 (Sat, 03 Aug 2013)
New Revision: 2735
Log:
Rename ppc_cache_line_szB to indicate that this is the size
of the instruction cache.
Modified files:
trunk/priv/guest_ppc_toIR.c
trunk/priv/main_main.c
trunk/pub/libvex.h
trunk/switchback/switchback.c
trunk/test_main.c
Modified: trunk/switchback/switchback.c (+1 -1)
===================================================================
--- trunk/switchback/switchback.c 2013-08-02 17:02:28 +01:00 (rev 2734)
+++ trunk/switchback/switchback.c 2013-08-03 20:36:55 +01:00 (rev 2735)
@@ -846,7 +846,7 @@
LibVEX_default_VexArchInfo(&vex_archinfo);
vex_archinfo.subarch = VexSubArch;
- vex_archinfo.ppc_cache_line_szB = CacheLineSize;
+ vex_archinfo.ppc_icache_line_szB = CacheLineSize;
/* */
vta.arch_guest = VexArch;
Modified: trunk/pub/libvex.h (+2 -2)
===================================================================
--- trunk/pub/libvex.h 2013-08-02 17:02:28 +01:00 (rev 2734)
+++ trunk/pub/libvex.h 2013-08-03 20:36:55 +01:00 (rev 2735)
@@ -245,8 +245,8 @@
/* The following two fields are mandatory. */
UInt hwcaps;
VexCacheInfo hwcache_info;
- /* PPC32/PPC64 only: size of cache line */
- Int ppc_cache_line_szB;
+ /* PPC32/PPC64 only: size of instruction cache line */
+ Int ppc_icache_line_szB;
/* PPC32/PPC64 only: sizes zeroed by the dcbz/dcbzl instructions
* (bug#135264) */
UInt ppc_dcbz_szB;
Modified: trunk/priv/guest_ppc_toIR.c (+1 -1)
===================================================================
--- trunk/priv/guest_ppc_toIR.c 2013-08-02 17:02:28 +01:00 (rev 2734)
+++ trunk/priv/guest_ppc_toIR.c 2013-08-03 20:36:55 +01:00 (rev 2735)
@@ -6654,7 +6654,7 @@
UChar rB_addr = ifieldRegB(theInstr);
UInt opc2 = ifieldOPClo10(theInstr);
UChar b0 = ifieldBIT0(theInstr);
- UInt lineszB = guest_archinfo->ppc_cache_line_szB;
+ UInt lineszB = guest_archinfo->ppc_icache_line_szB;
Bool is_dcbzl = False;
IRType ty = mode64 ? Ity_I64 : Ity_I32;
Modified: trunk/priv/main_main.c (+4 -4)
===================================================================
--- trunk/priv/main_main.c 2013-08-02 17:02:28 +01:00 (rev 2734)
+++ trunk/priv/main_main.c 2013-08-03 20:36:55 +01:00 (rev 2735)
@@ -1171,10 +1171,10 @@
/* Write default settings info *vai. */
void LibVEX_default_VexArchInfo ( /*OUT*/VexArchInfo* vai )
{
- vai->hwcaps = 0;
- vai->ppc_cache_line_szB = 0;
- vai->ppc_dcbz_szB = 0;
- vai->ppc_dcbzl_szB = 0;
+ vai->hwcaps = 0;
+ vai->ppc_icache_line_szB = 0;
+ vai->ppc_dcbz_szB = 0;
+ vai->ppc_dcbzl_szB = 0;
vai->hwcache_info.num_levels = 0;
vai->hwcache_info.num_caches = 0;
Modified: trunk/test_main.c (+1 -1)
===================================================================
--- trunk/test_main.c 2013-08-02 17:02:28 +01:00 (rev 2734)
+++ trunk/test_main.c 2013-08-03 20:36:55 +01:00 (rev 2735)
@@ -178,7 +178,7 @@
LibVEX_default_VexArchInfo(&vai_ppc32);
vai_ppc32.hwcaps = 0;
- vai_ppc32.ppc_cache_line_szB = 128;
+ vai_ppc32.ppc_icache_line_szB = 128;
LibVEX_default_VexArchInfo(&vai_arm);
vai_arm.hwcaps = VEX_HWCAPS_ARM_VFP3 | VEX_HWCAPS_ARM_NEON | 7;
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