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From: Niall D. <ndo...@bl...> - 2013-06-20 14:53:29
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This list may find this discussion on WG21 SG5 Transactional Memory of use: https://groups.google.com/a/isocpp.org/d/msg/tm/zfRyY_XfxSU/47esUzUcHX0J In short, I think you should simulate TM directly as effectively a "super longjmp" which preserves memory as well as registers. That's the most future proof, and it gives you a third way from the two you proposed to handle transactional memory. I'd recommend that approach instead, because (a) Haswell's HTM is known to be incomplete by Intel's own definition and they're planning on improving it and (ii) you can't handle it using the real CPU because Haswell's HTM either captures all memory writes or it doesn't i.e. all of valgrind's writes in addition to program writes. The fact Haswell's HTM is all or nothing I think suggests strongly what Intel will improve upon. Niall --- Opinions expressed here are my own and do not necessarily represent those of BlackBerry Inc. |