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From: <sv...@va...> - 2013-01-29 03:56:21
|
florian 2013-01-29 03:56:06 +0000 (Tue, 29 Jan 2013)
New Revision: 2668
Log:
Infrastructure cleanup part 2.
Replace Iex_Mux0X with Iex_ITE (if-then-else)
and
IRExpr_Mux0X( cond, iffalse, iftrue ) with
IRExpr_ITE ( cond, iftrue, iffalse );
Modified files:
trunk/priv/guest_amd64_toIR.c
trunk/priv/guest_arm_helpers.c
trunk/priv/guest_arm_toIR.c
trunk/priv/guest_mips_toIR.c
trunk/priv/guest_ppc_toIR.c
trunk/priv/guest_s390_toIR.c
trunk/priv/guest_x86_toIR.c
trunk/priv/host_amd64_isel.c
trunk/priv/host_arm_isel.c
trunk/priv/host_mips_isel.c
trunk/priv/host_ppc_isel.c
trunk/priv/host_s390_isel.c
trunk/priv/host_x86_isel.c
trunk/priv/ir_defs.c
trunk/priv/ir_opt.c
trunk/pub/libvex_ir.h
trunk/test_main.c
Modified: trunk/priv/guest_ppc_toIR.c (+117 -116)
===================================================================
--- trunk/priv/guest_ppc_toIR.c 2013-01-26 20:28:00 +00:00 (rev 2667)
+++ trunk/priv/guest_ppc_toIR.c 2013-01-29 03:56:06 +00:00 (rev 2668)
@@ -797,15 +797,15 @@
assign( hi32, unop(Iop_64HIto32, t64));
assign( lo32, unop(Iop_64to32, t64));
- return IRExpr_Mux0X(
+ return IRExpr_ITE(
/* if (hi32 == (lo32 >>s 31)) */
binop(Iop_CmpEQ32, mkexpr(hi32),
binop( Iop_Sar32, mkexpr(lo32), mkU8(31))),
+ /* then: within signed-32 range: lo half good enough */
+ mkexpr(lo32),
/* else: sign dep saturate: 1->0x80000000, 0->0x7FFFFFFF */
binop(Iop_Add32, mkU32(0x7FFFFFFF),
- binop(Iop_Shr32, mkexpr(hi32), mkU8(31))),
- /* then: within signed-32 range: lo half good enough */
- mkexpr(lo32) );
+ binop(Iop_Shr32, mkexpr(hi32), mkU8(31))));
}
/* Unsigned saturating narrow 64S to 32 */
@@ -819,13 +819,13 @@
assign( hi32, unop(Iop_64HIto32, t64));
assign( lo32, unop(Iop_64to32, t64));
- return IRExpr_Mux0X(
+ return IRExpr_ITE(
/* if (top 32 bits of t64 are 0) */
binop(Iop_CmpEQ32, mkexpr(hi32), mkU32(0)),
+ /* then: within unsigned-32 range: lo half good enough */
+ mkexpr(lo32),
/* else: positive saturate -> 0xFFFFFFFF */
- mkU32(0xFFFFFFFF),
- /* then: within unsigned-32 range: lo half good enough */
- mkexpr(lo32) );
+ mkU32(0xFFFFFFFF));
}
/* Signed saturate narrow 64->32, combining to V128 */
@@ -1446,13 +1446,13 @@
binop(Iop_Shl32, src, mask),
binop(Iop_Shr32, src, binop(Iop_Sub8, mkU8(32), mask)));
}
- /* Note: the MuxOX is not merely an optimisation; it's needed
+ /* Note: the ITE not merely an optimisation; it's needed
because otherwise the Shr is a shift by the word size when
mask denotes zero. For rotates by immediates, a lot of
this junk gets folded out. */
- return IRExpr_Mux0X( binop(Iop_CmpNE8, mask, mkU8(0)),
- /* zero rotate */ src,
- /* non-zero rotate */ rot );
+ return IRExpr_ITE( binop(Iop_CmpNE8, mask, mkU8(0)),
+ /* non-zero rotate */ rot,
+ /* zero rotate */ src);
}
/* Standard effective address calc: (rA + rB) */
@@ -2229,13 +2229,13 @@
)
);
xer_ca
- = IRExpr_Mux0X(
+ = IRExpr_ITE(
/* shift amt > 31 ? */
binop(Iop_CmpLT32U, mkU32(31), argR),
+ /* yes -- get sign bit of argL */
+ binop(Iop_Shr32, argL, mkU8(31)),
/* no -- be like srawi */
- unop(Iop_1Uto32, binop(Iop_CmpNE32, xer_ca, mkU32(0))),
- /* yes -- get sign bit of argL */
- binop(Iop_Shr32, argL, mkU8(31))
+ unop(Iop_1Uto32, binop(Iop_CmpNE32, xer_ca, mkU32(0)))
);
break;
@@ -2349,14 +2349,14 @@
)
);
xer_ca
- = IRExpr_Mux0X(
+ = IRExpr_ITE(
/* shift amt > 31 ? */
binop(Iop_CmpLT64U, mkU64(31), argR),
+ /* yes -- get sign bit of argL */
+ unop(Iop_64to32, binop(Iop_Shr64, argL, mkU8(63))),
/* no -- be like srawi */
- unop(Iop_1Uto32, binop(Iop_CmpNE64, xer_ca, mkU64(0))),
- /* yes -- get sign bit of argL */
- unop(Iop_64to32, binop(Iop_Shr64, argL, mkU8(63)))
- );
+ unop(Iop_1Uto32, binop(Iop_CmpNE64, xer_ca, mkU64(0)))
+ );
break;
case /* 11 */ PPCG_FLAG_OP_SRAWI:
@@ -2403,13 +2403,13 @@
)
);
xer_ca
- = IRExpr_Mux0X(
+ = IRExpr_ITE(
/* shift amt > 63 ? */
binop(Iop_CmpLT64U, mkU64(63), argR),
+ /* yes -- get sign bit of argL */
+ unop(Iop_64to32, binop(Iop_Shr64, argL, mkU8(63))),
/* no -- be like sradi */
- unop(Iop_1Uto32, binop(Iop_CmpNE64, xer_ca, mkU64(0))),
- /* yes -- get sign bit of argL */
- unop(Iop_64to32, binop(Iop_Shr64, argL, mkU8(63)))
+ unop(Iop_1Uto32, binop(Iop_CmpNE64, xer_ca, mkU64(0)))
);
break;
@@ -3855,9 +3855,9 @@
// Iop_Clz32 undefined for arg==0, so deal with that case:
irx = binop(Iop_CmpNE32, lo32, mkU32(0));
assign(rA, mkWidenFrom32(ty,
- IRExpr_Mux0X( irx,
- mkU32(32),
- unop(Iop_Clz32, lo32)),
+ IRExpr_ITE( irx,
+ unop(Iop_Clz32, lo32),
+ mkU32(32)),
False));
// TODO: alternatively: assign(rA, verbose_Clz32(rS));
@@ -3962,9 +3962,9 @@
flag_rC ? ".":"", rA_addr, rS_addr);
// Iop_Clz64 undefined for arg==0, so deal with that case:
irx = binop(Iop_CmpNE64, mkexpr(rS), mkU64(0));
- assign(rA, IRExpr_Mux0X( irx,
- mkU64(64),
- unop(Iop_Clz64, mkexpr(rS)) ));
+ assign(rA, IRExpr_ITE( irx,
+ unop(Iop_Clz64, mkexpr(rS)),
+ mkU64(64) ));
// TODO: alternatively: assign(rA, verbose_Clz64(rS));
break;
@@ -6095,9 +6095,9 @@
e_tmp = binop( Iop_Sar32,
mkexpr(rS_lo32),
unop( Iop_32to8,
- IRExpr_Mux0X( mkexpr(outofrange),
- mkexpr(sh_amt),
- mkU32(31)) ) );
+ IRExpr_ITE( mkexpr(outofrange),
+ mkU32(31),
+ mkexpr(sh_amt)) ) );
assign( rA, mkWidenFrom32(ty, e_tmp, /* Signed */True) );
set_XER_CA( ty, PPCG_FLAG_OP_SRAW,
@@ -6193,9 +6193,9 @@
binop( Iop_Sar64,
mkexpr(rS),
unop( Iop_64to8,
- IRExpr_Mux0X( mkexpr(outofrange),
- mkexpr(sh_amt),
- mkU64(63)) ))
+ IRExpr_ITE( mkexpr(outofrange),
+ mkU64(63),
+ mkexpr(sh_amt)) ))
);
set_XER_CA( ty, PPCG_FLAG_OP_SRAD,
mkexpr(rA), mkexpr(rS), mkexpr(sh_amt),
@@ -7373,10 +7373,10 @@
// frD = (frA >= 0.0) ? frC : frB
// = (cc_b0 == 0) ? frC : frB
assign( frD,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpEQ32, mkexpr(cc_b0), mkU32(0)),
- mkexpr(frB),
- mkexpr(frC) ));
+ mkexpr(frC),
+ mkexpr(frB) ));
/* One of the rare ones which don't mess with FPRF */
set_FPRF = False;
@@ -8258,14 +8258,15 @@
/* need to preserve sign of zero */
/* frD = (fabs(frB) > 9e18) ? frB :
(sign(frB)) ? -fabs((double)r_tmp64) : (double)r_tmp64 */
- assign(frD, IRExpr_Mux0X(
+ assign(frD, IRExpr_ITE(
binop(Iop_CmpNE8,
unop(Iop_32to8,
binop(Iop_CmpF64,
IRExpr_Const(IRConst_F64(9e18)),
unop(Iop_AbsF64, mkexpr(frB)))),
mkU8(0)),
- IRExpr_Mux0X(
+ mkexpr(frB),
+ IRExpr_ITE(
binop(Iop_CmpNE32,
binop(Iop_Shr32,
unop(Iop_64HIto32,
@@ -8273,13 +8274,12 @@
mkexpr(frB))),
mkU8(31)),
mkU32(0)),
- binop(Iop_I64StoF64, mkU32(0), mkexpr(r_tmp64) ),
unop(Iop_NegF64,
unop( Iop_AbsF64,
binop(Iop_I64StoF64, mkU32(0),
- mkexpr(r_tmp64)) ))
- ),
- mkexpr(frB)
+ mkexpr(r_tmp64)) )),
+ binop(Iop_I64StoF64, mkU32(0), mkexpr(r_tmp64) )
+ )
));
break;
@@ -11839,26 +11839,26 @@
assign( res1, unop(Iop_64HIto32, mkexpr(lo64)) );
assign( res0, unop(Iop_64to32, mkexpr(lo64)) );
- b3_result = IRExpr_Mux0X(is_NaN_32(b3),
- // else: result is from the Iop_QFtoI32{s|u}x4_RZ
- mkexpr(res3),
- // then: result is 0x{8|0}80000000
- mkU32(un_signed ? 0x00000000 : 0x80000000));
- b2_result = IRExpr_Mux0X(is_NaN_32(b2),
- // else: result is from the Iop_QFtoI32{s|u}x4_RZ
- mkexpr(res2),
- // then: result is 0x{8|0}80000000
- mkU32(un_signed ? 0x00000000 : 0x80000000));
- b1_result = IRExpr_Mux0X(is_NaN_32(b1),
- // else: result is from the Iop_QFtoI32{s|u}x4_RZ
- mkexpr(res1),
- // then: result is 0x{8|0}80000000
- mkU32(un_signed ? 0x00000000 : 0x80000000));
- b0_result = IRExpr_Mux0X(is_NaN_32(b0),
- // else: result is from the Iop_QFtoI32{s|u}x4_RZ
- mkexpr(res0),
- // then: result is 0x{8|0}80000000
- mkU32(un_signed ? 0x00000000 : 0x80000000));
+ b3_result = IRExpr_ITE(is_NaN_32(b3),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res3));
+ b2_result = IRExpr_ITE(is_NaN_32(b2),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res2));
+ b1_result = IRExpr_ITE(is_NaN_32(b1),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res1));
+ b0_result = IRExpr_ITE(is_NaN_32(b0),
+ // then: result is 0x{8|0}80000000
+ mkU32(un_signed ? 0x00000000 : 0x80000000),
+ // else: result is from the Iop_QFtoI32{s|u}x4_RZ
+ mkexpr(res0));
putVSReg( XT,
binop( Iop_64HLtoV128,
@@ -12781,19 +12781,19 @@
#define SNAN_MASK 0x0008000000000000ULL
return
- IRExpr_Mux0X(mkexpr(frA_isSNaN),
- /* else: if frB is a SNaN */
- IRExpr_Mux0X(mkexpr(frB_isSNaN),
- /* else: if frB is a QNaN */
- IRExpr_Mux0X(mkexpr(frB_isQNaN),
- /* else: frA is a QNaN, so result = frB */
- mkexpr(frB_I64),
- /* then: result = frA */
- mkexpr(frA_I64)),
- /* then: result = frB converted to QNaN */
- binop(Iop_Or64, mkexpr(frB_I64), mkU64(SNAN_MASK))),
- /* then: result = frA converted to QNaN */
- binop(Iop_Or64, mkexpr(frA_I64), mkU64(SNAN_MASK)));
+ IRExpr_ITE(mkexpr(frA_isSNaN),
+ /* then: result = frA converted to QNaN */
+ binop(Iop_Or64, mkexpr(frA_I64), mkU64(SNAN_MASK)),
+ /* else: if frB is a SNaN */
+ IRExpr_ITE(mkexpr(frB_isSNaN),
+ /* then: result = frB converted to QNaN */
+ binop(Iop_Or64, mkexpr(frB_I64), mkU64(SNAN_MASK)),
+ /* else: if frB is a QNaN */
+ IRExpr_ITE(mkexpr(frB_isQNaN),
+ /* then: result = frA */
+ mkexpr(frA_I64),
+ /* else: frA is a QNaN, so result = frB */
+ mkexpr(frB_I64))));
}
/*
@@ -12807,13 +12807,13 @@
unop( Iop_ReinterpI64asF64,
mkexpr( src2 ) ) ) );
- return IRExpr_Mux0X( binop( Iop_CmpEQ32,
+ return IRExpr_ITE( binop( Iop_CmpEQ32,
mkexpr( src1cmpsrc2 ),
mkU32( isMin ? PPC_CMP_LT : PPC_CMP_GT ) ),
- /* else: use src2 */
- mkexpr( src2 ),
- /* then: use src1 */
- mkexpr( src1 ) );
+ /* then: use src1 */
+ mkexpr( src1 ),
+ /* else: use src2 */
+ mkexpr( src2 ) );
}
/*
@@ -12840,23 +12840,23 @@
assign(anyNaN, mkOR1(is_NaN(frA_I64), is_NaN(frB_I64)));
#define MINUS_ZERO 0x8000000000000000ULL
- return IRExpr_Mux0X( /* If both arguments are zero . . . */
- mkAND1( mkexpr( frA_isZero ), mkexpr( frB_isZero ) ),
- /* else: check if either input is a NaN*/
- IRExpr_Mux0X( mkexpr( anyNaN ),
- /* else: use "comparison helper" */
- _get_maxmin_fp_cmp( frB_I64, frA_I64, isMin ),
- /* then: use "NaN helper" */
- _get_maxmin_fp_NaN( frA_I64, frB_I64 ) ),
- /* then: if frA is -0 and isMin==True, return -0;
- * else if frA is +0 and isMin==False; return +0;
- * otherwise, simply return frB. */
- IRExpr_Mux0X( binop( Iop_CmpEQ32,
- unop( Iop_64HIto32,
- mkexpr( frA_I64 ) ),
- mkU32( isMin ? 0x80000000 : 0 ) ),
- mkexpr( frB_I64 ),
- mkU64( isMin ? MINUS_ZERO : 0ULL ) ) );
+ return IRExpr_ITE( /* If both arguments are zero . . . */
+ mkAND1( mkexpr( frA_isZero ), mkexpr( frB_isZero ) ),
+ /* then: if frA is -0 and isMin==True, return -0;
+ * else if frA is +0 and isMin==False; return +0;
+ * otherwise, simply return frB. */
+ IRExpr_ITE( binop( Iop_CmpEQ32,
+ unop( Iop_64HIto32,
+ mkexpr( frA_I64 ) ),
+ mkU32( isMin ? 0x80000000 : 0 ) ),
+ mkU64( isMin ? MINUS_ZERO : 0ULL ),
+ mkexpr( frB_I64 ) ),
+ /* else: check if either input is a NaN*/
+ IRExpr_ITE( mkexpr( anyNaN ),
+ /* then: use "NaN helper" */
+ _get_maxmin_fp_NaN( frA_I64, frB_I64 ),
+ /* else: use "comparison helper" */
+ _get_maxmin_fp_cmp( frB_I64, frA_I64, isMin ) ));
}
/*
@@ -12910,30 +12910,30 @@
/* frD = (fabs(frB) > 9e18) ? frB :
(sign(frB)) ? -fabs((double)intermediateResult) : (double)intermediateResult */
assign( frD,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop( Iop_CmpNE8,
unop( Iop_32to8,
binop( Iop_CmpF64,
IRExpr_Const( IRConst_F64( 9e18 ) ),
unop( Iop_AbsF64, mkexpr( frB ) ) ) ),
mkU8(0) ),
- IRExpr_Mux0X(
+ mkexpr( frB ),
+ IRExpr_ITE(
binop( Iop_CmpNE32,
binop( Iop_Shr32,
unop( Iop_64HIto32,
mkexpr( frB_I64 ) ),
mkU8( 31 ) ),
mkU32(0) ),
- binop( Iop_I64StoF64,
- mkU32( 0 ),
- mkexpr( intermediateResult ) ),
unop( Iop_NegF64,
unop( Iop_AbsF64,
binop( Iop_I64StoF64,
mkU32( 0 ),
- mkexpr( intermediateResult ) ) ) )
- ),
- mkexpr( frB )
+ mkexpr( intermediateResult ) ) ) ),
+ binop( Iop_I64StoF64,
+ mkU32( 0 ),
+ mkexpr( intermediateResult ) )
+ )
)
);
@@ -12948,12 +12948,12 @@
binop( Iop_And32, hi32, mkU32( 0x00080000 ) ),
mkU32( 0 ) ) ) );
- return IRExpr_Mux0X( mkexpr( is_SNAN ),
- mkexpr( frD ),
+ return IRExpr_ITE( mkexpr( is_SNAN ),
unop( Iop_ReinterpI64asF64,
binop( Iop_Xor64,
mkU64( SNAN_MASK ),
- mkexpr( frB_I64 ) ) ) );
+ mkexpr( frB_I64 ) ) ),
+ mkexpr( frD ));
}
/*
@@ -17577,10 +17577,11 @@
UInt bi = ifieldRegC( theInstr );
putIReg(
rT,
- IRExpr_Mux0X( binop(Iop_CmpNE32, getCRbit( bi ), mkU32(0)),
- getIReg(rB),
- rA == 0 ? (mode64 ? mkU64(0) : mkU32(0))
- : getIReg(rA) )
+ IRExpr_ITE( binop(Iop_CmpNE32, getCRbit( bi ), mkU32(0)),
+ rA == 0 ? (mode64 ? mkU64(0) : mkU32(0))
+ : getIReg(rA),
+ getIReg(rB))
+
);
DIP("isel r%u,r%u,r%u,crb%u\n", rT,rA,rB,bi);
goto decode_success;
Modified: trunk/priv/guest_mips_toIR.c (+109 -70)
===================================================================
--- trunk/priv/guest_mips_toIR.c 2013-01-26 20:28:00 +00:00 (rev 2667)
+++ trunk/priv/guest_mips_toIR.c 2013-01-29 03:56:06 +00:00 (rev 2668)
@@ -318,11 +318,13 @@
putIReg(rt, binop(op, getIReg(rs), mkU64(imm)));
#define FP_CONDITIONAL_CODE \
- t3 = newTemp(Ity_I32); \
- assign(t3, binop(Iop_And32, IRExpr_Mux0X( unop(Iop_1Uto8, \
- binop(Iop_CmpEQ32, mkU32(cc), mkU32(0))), \
- binop(Iop_Shr32, getFCSR(), mkU8(24+cc)), \
- binop(Iop_Shr32, getFCSR(), mkU8(23))), mkU32(0x1)));
+ t3 = newTemp(Ity_I32); \
+ assign(t3, binop(Iop_And32, \
+ IRExpr_ITE( unop(Iop_1Uto8, \
+ binop(Iop_CmpEQ32, mkU32(cc), mkU32(0))), \
+ binop(Iop_Shr32, getFCSR(), mkU8(23)), \
+ binop(Iop_Shr32, getFCSR(), mkU8(24+cc))), \
+ mkU32(0x1)));
/*------------------------------------------------------------*/
/*--- Field helpers ---*/
@@ -1385,11 +1387,16 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkU32(bc1_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(24 + bc1_cc)), mkU32(0x1)), binop(Iop_And32,
- binop(Iop_Shr32, getFCSR(), mkU8(23)),
- mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + bc1_cc)),
+ mkU32(0x1))
+ ));
if (tf == 1 && nd == 0) {
//branch on true
@@ -1611,8 +1618,8 @@
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpNE32, mkU32(0),
getIReg(rt))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- mkexpr(t2), mkexpr(t1)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ mkexpr(t1), mkexpr(t2)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
@@ -1625,8 +1632,8 @@
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpNE32, mkU32(0),
getIReg(rt))));
- putDReg(fd, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- getDReg(fd), getDReg(fs)));
+ putDReg(fd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ getDReg(fs), getDReg(fd)));
break;
default:
goto decode_failure;
@@ -1647,8 +1654,8 @@
assign(t2, unop(Iop_F32toF64, getFReg(fd)));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
getIReg(rt))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- mkexpr(t2), mkexpr(t1)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ mkexpr(t1), mkexpr(t2)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
@@ -1662,8 +1669,8 @@
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
getIReg(rt))));
- putDReg(fd, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- getDReg(fd), getDReg(fs)));
+ putDReg(fd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ getDReg(fs), getDReg(fd)));
break;
default:
goto decode_failure;
@@ -1684,16 +1691,21 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkU32(mov_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(24 + mov_cc)), mkU32(0x1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(23)), mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + mov_cc)),
+ mkU32(0x1))
+ ));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
mkexpr(t2))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- getDReg(fs), getDReg(fd)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ getDReg(fd), getDReg(fs)));
putDReg(fd, mkexpr(t4));
break;
case 0x10: // S
@@ -1711,17 +1723,21 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkU32(mov_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32,
- getFCSR(), mkU8(24 + mov_cc)),
- mkU32(0x1)), binop(Iop_And32,
- binop(Iop_Shr32, getFCSR(),
- mkU8(23)), mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + mov_cc)),
+ mkU32(0x1))
+ ));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
mkexpr(t2))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- mkexpr(t5), mkexpr(t6)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ mkexpr(t6), mkexpr(t5)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
@@ -1743,16 +1759,21 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32,
mkU32(0), mkU32(mov_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(24 + mov_cc)), mkU32(0x1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(23)), mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + mov_cc)),
+ mkU32(0x1))
+ ));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
mkexpr(t2))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- getDReg(fd), getDReg(fs)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ getDReg(fs), getDReg(fd)));
putDReg(fd, mkexpr(t4));
break;
case 0x10: // S
@@ -1770,16 +1791,21 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkU32(mov_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(24 + mov_cc)), mkU32(0x1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(23)), mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + mov_cc)),
+ mkU32(0x1))
+ ));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
mkexpr(t2))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- mkexpr(t6), mkexpr(t5)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ mkexpr(t5), mkexpr(t6)));
putFReg(fd, binop(Iop_F64toF32, get_IR_roundingmode(),
mkexpr(t4)));
}
@@ -2644,8 +2670,9 @@
assign(t5, unop(Iop_1Sto32, binop(Iop_CmpLT32U, mkexpr(t2),
mkexpr(t4))));
- assign(t6, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t5)), mkexpr(t1),
- binop(Iop_Sub32, mkexpr(t1), mkU32(0x1))));
+ assign(t6, IRExpr_ITE(unop(Iop_32to8, mkexpr(t5)),
+ binop(Iop_Sub32, mkexpr(t1), mkU32(0x1)),
+ mkexpr(t1)));
putHI(binop(Iop_Sub32, mkexpr(t6), unop(Iop_64HIto32, mkexpr(t3))));
putLO(binop(Iop_Sub32, mkexpr(t2), mkexpr(t4)));
@@ -2671,8 +2698,9 @@
assign(t5, unop(Iop_1Sto32, binop(Iop_CmpLT32U, mkexpr(t2),
mkexpr(t4))));
- assign(t6, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t5)),
- mkexpr(t1), binop(Iop_Sub32, mkexpr(t1), mkU32(0x1))));
+ assign(t6, IRExpr_ITE(unop(Iop_32to8, mkexpr(t5)),
+ binop(Iop_Sub32, mkexpr(t1), mkU32(0x1)),
+ mkexpr(t1)));
putHI(binop(Iop_Sub32, mkexpr(t6), unop(Iop_64HIto32, mkexpr(t3))));
putLO(binop(Iop_Sub32, mkexpr(t2), mkexpr(t4)));
@@ -2684,8 +2712,9 @@
t1 = newTemp(Ity_I32);
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, getIReg(rs),
mkU32(0))));
- putIReg(rd, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- unop(Iop_Clz32, getIReg(rs)), mkU32(0x00000020)));
+ putIReg(rd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ mkU32(0x00000020),
+ unop(Iop_Clz32, getIReg(rs))));
break;
}
@@ -2694,9 +2723,9 @@
t1 = newTemp(Ity_I32);
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, getIReg(rs),
mkU32(0xffffffff))));
- putIReg(rd, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- unop(Iop_Clz32, unop(Iop_Not32, getIReg(rs))),
- mkU32(0x00000020)));
+ putIReg(rd, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ mkU32(0x00000020),
+ unop(Iop_Clz32, unop(Iop_Not32, getIReg(rs)))));
break;
}
@@ -2853,16 +2882,21 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkU32(mov_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(24 + mov_cc)), mkU32(0x1)), binop(Iop_And32,
- binop(Iop_Shr32, getFCSR(), mkU8(23)),
- mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + mov_cc)),
+ mkU32(0x1))
+ ));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkexpr(t2))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- getIReg(rd), getIReg(rs)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ getIReg(rs), getIReg(rd)));
putIReg(rd, mkexpr(t4));
}
} else if (tf == 1) { /* MOVT */
@@ -2875,16 +2909,21 @@
assign(t1, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(0),
mkU32(mov_cc))));
- assign(t2, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t1)),
- binop(Iop_And32, binop(Iop_Shr32, getFCSR(),
- mkU8(24 + mov_cc)), mkU32(0x1)), binop(Iop_And32,
- binop(Iop_Shr32, getFCSR(), mkU8(23)),
- mkU32(0x1))));
+ assign(t2, IRExpr_ITE(unop(Iop_32to8, mkexpr(t1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(23)),
+ mkU32(0x1)),
+ binop(Iop_And32,
+ binop(Iop_Shr32, getFCSR(),
+ mkU8(24 + mov_cc)),
+ mkU32(0x1))
+ ));
assign(t3, unop(Iop_1Sto32, binop(Iop_CmpEQ32, mkU32(1),
mkexpr(t2))));
- assign(t4, IRExpr_Mux0X(unop(Iop_32to8, mkexpr(t3)),
- getIReg(rd), getIReg(rs)));
+ assign(t4, IRExpr_ITE(unop(Iop_32to8, mkexpr(t3)),
+ getIReg(rs), getIReg(rd)));
putIReg(rd, mkexpr(t4));
}
}
Modified: trunk/priv/guest_amd64_toIR.c (+141 -141)
===================================================================
--- trunk/priv/guest_amd64_toIR.c 2013-01-26 20:28:00 +00:00 (rev 2667)
+++ trunk/priv/guest_amd64_toIR.c 2013-01-29 03:56:06 +00:00 (rev 2668)
@@ -1825,17 +1825,17 @@
/* DEP1 contains the result, DEP2 contains the undershifted value. */
stmt( IRStmt_Put( OFFB_CC_OP,
- IRExpr_Mux0X( mkexpr(guardB),
- IRExpr_Get(OFFB_CC_OP,Ity_I64),
- mkU64(ccOp))) );
+ IRExpr_ITE( mkexpr(guardB),
+ mkU64(ccOp),
+ IRExpr_Get(OFFB_CC_OP,Ity_I64) ) ));
stmt( IRStmt_Put( OFFB_CC_DEP1,
- IRExpr_Mux0X( mkexpr(guardB),
- IRExpr_Get(OFFB_CC_DEP1,Ity_I64),
- widenUto64(mkexpr(res)))) );
+ IRExpr_ITE( mkexpr(guardB),
+ widenUto64(mkexpr(res)),
+ IRExpr_Get(OFFB_CC_DEP1,Ity_I64) ) ));
stmt( IRStmt_Put( OFFB_CC_DEP2,
- IRExpr_Mux0X( mkexpr(guardB),
- IRExpr_Get(OFFB_CC_DEP2,Ity_I64),
- widenUto64(mkexpr(resUS)))) );
+ IRExpr_ITE( mkexpr(guardB),
+ widenUto64(mkexpr(resUS)),
+ IRExpr_Get(OFFB_CC_DEP2,Ity_I64) ) ));
}
@@ -3607,21 +3607,21 @@
/* CC_DEP1 is the rotated value. CC_NDEP is flags before. */
stmt( IRStmt_Put( OFFB_CC_OP,
- IRExpr_Mux0X( mkexpr(rot_amt64b),
- IRExpr_Get(OFFB_CC_OP,Ity_I64),
- mkU64(ccOp))) );
+ IRExpr_ITE( mkexpr(rot_amt64b),
+ mkU64(ccOp),
+ IRExpr_Get(OFFB_CC_OP,Ity_I64) ) ));
stmt( IRStmt_Put( OFFB_CC_DEP1,
- IRExpr_Mux0X( mkexpr(rot_amt64b),
- IRExpr_Get(OFFB_CC_DEP1,Ity_I64),
- widenUto64(mkexpr(dst1)))) );
+ IRExpr_ITE( mkexpr(rot_amt64b),
+ widenUto64(mkexpr(dst1)),
+ IRExpr_Get(OFFB_CC_DEP1,Ity_I64) ) ));
stmt( IRStmt_Put( OFFB_CC_DEP2,
- IRExpr_Mux0X( mkexpr(rot_amt64b),
- IRExpr_Get(OFFB_CC_DEP2,Ity_I64),
- mkU64(0))) );
+ IRExpr_ITE( mkexpr(rot_amt64b),
+ mkU64(0),
+ IRExpr_Get(OFFB_CC_DEP2,Ity_I64) ) ));
stmt( IRStmt_Put( OFFB_CC_NDEP,
- IRExpr_Mux0X( mkexpr(rot_amt64b),
- IRExpr_Get(OFFB_CC_NDEP,Ity_I64),
- mkexpr(oldFlags))) );
+ IRExpr_ITE( mkexpr(rot_amt64b),
+ mkexpr(oldFlags),
+ IRExpr_Get(OFFB_CC_NDEP,Ity_I64) ) ));
} /* if (isRotate) */
/* Save result, and finish up. */
@@ -4663,10 +4663,10 @@
// special-case around that.
IRTemp res64 = newTemp(Ity_I64);
assign(res64,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpEQ64, mkexpr(src64x), mkU64(0)),
- unop(Iop_Clz64, mkexpr(src64x)),
- mkU64(8 * sizeofIRType(ty))
+ mkU64(8 * sizeofIRType(ty)),
+ unop(Iop_Clz64, mkexpr(src64x))
));
IRTemp res = newTemp(ty);
@@ -4805,11 +4805,11 @@
{
put_ST_UNCHECKED(
i,
- IRExpr_Mux0X( binop(Iop_CmpNE8, get_ST_TAG(i), mkU8(0)),
- /* 0 means empty */
- value,
- /* non-0 means full */
- mkQNaN64()
+ IRExpr_ITE( binop(Iop_CmpNE8, get_ST_TAG(i), mkU8(0)),
+ /* non-0 means full */
+ mkQNaN64(),
+ /* 0 means empty */
+ value
)
);
}
@@ -4831,11 +4831,11 @@
static IRExpr* get_ST ( Int i )
{
return
- IRExpr_Mux0X( binop(Iop_CmpNE8, get_ST_TAG(i), mkU8(0)),
- /* 0 means empty */
- mkQNaN64(),
- /* non-0 means full */
- get_ST_UNCHECKED(i));
+ IRExpr_ITE( binop(Iop_CmpNE8, get_ST_TAG(i), mkU8(0)),
+ /* non-0 means full */
+ get_ST_UNCHECKED(i),
+ /* 0 means empty */
+ mkQNaN64());
}
@@ -5007,13 +5007,13 @@
IRTemp t32 = newTemp(Ity_I32);
assign( t32, e32 );
return
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U,
unop(Iop_32Uto64,
binop(Iop_Add32, mkexpr(t32), mkU32(32768))),
mkU64(65536)),
- mkU16( 0x8000 ),
- unop(Iop_32to16, mkexpr(t32)));
+ unop(Iop_32to16, mkexpr(t32)),
+ mkU16( 0x8000 ) );
}
@@ -5748,36 +5748,36 @@
r_src = (UInt)modrm - 0xC0;
DIP("fcmovb %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondB),
- get_ST(0), get_ST(r_src)) );
+ get_ST(r_src), get_ST(0)) );
break;
case 0xC8 ... 0xCF: /* FCMOVE(Z) ST(i), ST(0) */
r_src = (UInt)modrm - 0xC8;
DIP("fcmovz %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondZ),
- get_ST(0), get_ST(r_src)) );
+ get_ST(r_src), get_ST(0)) );
break;
case 0xD0 ... 0xD7: /* FCMOVBE ST(i), ST(0) */
r_src = (UInt)modrm - 0xD0;
DIP("fcmovbe %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondBE),
- get_ST(0), get_ST(r_src)) );
+ get_ST(r_src), get_ST(0)) );
break;
case 0xD8 ... 0xDF: /* FCMOVU ST(i), ST(0) */
r_src = (UInt)modrm - 0xD8;
DIP("fcmovu %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondP),
- get_ST(0), get_ST(r_src)) );
+ get_ST(r_src), get_ST(0)) );
break;
case 0xE9: /* FUCOMPP %st(0),%st(1) */
@@ -5912,9 +5912,9 @@
r_src = (UInt)modrm - 0xC0;
DIP("fcmovnb %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondNB),
- get_ST(0), get_ST(r_src)) );
+ get_ST(r_src), get_ST(0)) );
break;
case 0xC8 ... 0xCF: /* FCMOVNE(NZ) ST(i), ST(0) */
@@ -5922,10 +5922,10 @@
DIP("fcmovnz %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(
0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondNZ),
- get_ST(0),
- get_ST(r_src)
+ get_ST(r_src),
+ get_ST(0)
)
);
break;
@@ -5935,10 +5935,10 @@
DIP("fcmovnbe %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(
0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondNBE),
- get_ST(0),
- get_ST(r_src)
+ get_ST(r_src),
+ get_ST(0)
)
);
break;
@@ -5948,10 +5948,10 @@
DIP("fcmovnu %%st(%u), %%st(0)\n", r_src);
put_ST_UNCHECKED(
0,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mk_amd64g_calculate_condition(AMD64CondNP),
- get_ST(0),
- get_ST(r_src)
+ get_ST(r_src),
+ get_ST(0)
)
);
break;
@@ -6887,20 +6887,20 @@
if (shl || shr) {
assign(
g1,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U,mkexpr(amt),mkU64(size)),
- mkU64(0),
- binop(op, mkexpr(g0), mkexpr(amt8))
+ binop(op, mkexpr(g0), mkexpr(amt8)),
+ mkU64(0)
)
);
} else
if (sar) {
assign(
g1,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U,mkexpr(amt),mkU64(size)),
- binop(op, mkexpr(g0), mkU8(size-1)),
- binop(op, mkexpr(g0), mkexpr(amt8))
+ binop(op, mkexpr(g0), mkexpr(amt8)),
+ binop(op, mkexpr(g0), mkU8(size-1))
)
);
} else {
@@ -7374,14 +7374,14 @@
else (base << amt) | (xtra >>u (64-amt))
*/
return
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpNE8, mkexpr(amt), mkU8(0)),
- mkexpr(base),
binop(Iop_Or64,
binop(Iop_Shl64, mkexpr(base), mkexpr(amt)),
binop(Iop_Shr64, mkexpr(xtra),
binop(Iop_Sub8, mkU8(64), mkexpr(amt)))
- )
+ ),
+ mkexpr(base)
);
}
@@ -7395,14 +7395,14 @@
else (base >>u amt) | (xtra << (64-amt))
*/
return
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpNE8, mkexpr(amt), mkU8(0)),
- mkexpr(base),
binop(Iop_Or64,
binop(Iop_Shr64, mkexpr(base), mkexpr(amt)),
binop(Iop_Shl64, mkexpr(xtra),
binop(Iop_Sub8, mkU8(64), mkexpr(amt)))
- )
+ ),
+ mkexpr(base)
);
}
@@ -7802,11 +7802,11 @@
stmt( IRStmt_Put( OFFB_CC_DEP2, mkU64(0) ));
stmt( IRStmt_Put(
OFFB_CC_DEP1,
- IRExpr_Mux0X( mkexpr(srcB),
- /* src==0 */
- mkU64(AMD64G_CC_MASK_Z),
- /* src!=0 */
- mkU64(0)
+ IRExpr_ITE( mkexpr(srcB),
+ /* src!=0 */
+ mkU64(0),
+ /* src==0 */
+ mkU64(AMD64G_CC_MASK_Z)
)
));
/* Set NDEP even though it isn't used. This makes redundant-PUT
@@ -7841,15 +7841,15 @@
/* The main computation, guarding against zero. */
assign( dst64,
- IRExpr_Mux0X(
+ IRExpr_ITE(
mkexpr(srcB),
- /* src == 0 -- leave dst unchanged */
- widenUto64( getIRegG( sz, pfx, modrm ) ),
/* src != 0 */
fwds ? unop(Iop_Ctz64, mkexpr(src64))
: binop(Iop_Sub64,
mkU64(63),
- unop(Iop_Clz64, mkexpr(src64)))
+ unop(Iop_Clz64, mkexpr(src64))),
+ /* src == 0 -- leave dst unchanged */
+ widenUto64( getIRegG( sz, pfx, modrm ) )
)
);
@@ -7974,10 +7974,10 @@
/* There are 3 cases to consider:
reg-reg: ignore any lock prefix, generate sequence based
- on Mux0X
+ on ITE
reg-mem, not locked: ignore any lock prefix, generate sequence
- based on Mux0X
+ based on ITE
reg-mem, locked: use IRCAS
*/
@@ -7990,8 +7990,8 @@
assign( acc, getIRegRAX(size) );
setFlags_DEP1_DEP2(Iop_Sub8, acc, dest, ty);
assign( cond, mk_amd64g_calculate_condition(AMD64CondZ) );
- assign( dest2, IRExpr_Mux0X(mkexpr(cond), mkexpr(dest), mkexpr(src)) );
- assign( acc2, IRExpr_Mux0X(mkexpr(cond), mkexpr(dest), mkexpr(acc)) );
+ assign( dest2, IRExpr_ITE(mkexpr(cond), mkexpr(src), mkexpr(dest)) );
+ assign( acc2, IRExpr_ITE(mkexpr(cond), mkexpr(acc), mkexpr(dest)) );
putIRegRAX(size, mkexpr(acc2));
putIRegE(size, pfx, rm, mkexpr(dest2));
DIP("cmpxchg%c %s,%s\n", nameISize(size),
@@ -8007,8 +8007,8 @@
assign( acc, getIRegRAX(size) );
setFlags_DEP1_DEP2(Iop_Sub8, acc, dest, ty);
assign( cond, mk_amd64g_calculate_condition(AMD64CondZ) );
- assign( dest2, IRExpr_Mux0X(mkexpr(cond), mkexpr(dest), mkexpr(src)) );
- assign( acc2, IRExpr_Mux0X(mkexpr(cond), mkexpr(dest), mkexpr(acc)) );
+ assign( dest2, IRExpr_ITE(mkexpr(cond), mkexpr(src), mkexpr(dest)) );
+ assign( acc2, IRExpr_ITE(mkexpr(cond), mkexpr(acc), mkexpr(dest)) );
putIRegRAX(size, mkexpr(acc2));
storeLE( mkexpr(addr), mkexpr(dest2) );
DIP("cmpxchg%c %s,%s\n", nameISize(size),
@@ -8030,7 +8030,7 @@
));
setFlags_DEP1_DEP2(Iop_Sub8, acc, dest, ty);
assign( cond, mk_amd64g_calculate_condition(AMD64CondZ) );
- assign( acc2, IRExpr_Mux0X(mkexpr(cond), mkexpr(dest), mkexpr(acc)) );
+ assign( acc2, IRExpr_ITE(mkexpr(cond), mkexpr(acc), mkexpr(dest)) );
putIRegRAX(size, mkexpr(acc2));
DIP("cmpxchg%c %s,%s\n", nameISize(size),
nameIRegG(size,pfx,rm), dis_buf);
@@ -8079,9 +8079,9 @@
assign( tmpd, getIRegG(sz, pfx, rm) );
putIRegG( sz, pfx, rm,
- IRExpr_Mux0X( mk_amd64g_calculate_condition(cond),
- mkexpr(tmpd),
- mkexpr(tmps) )
+ IRExpr_ITE( mk_amd64g_calculate_condition(cond),
+ mkexpr(tmps),
+ mkexpr(tmpd) )
);
DIP("cmov%s %s,%s\n", name_AMD64Condcode(cond),
nameIRegE(sz,pfx,rm),
@@ -8096,9 +8096,9 @@
assign( tmpd, getIRegG(sz, pfx, rm) );
putIRegG( sz, pfx, rm,
- IRExpr_Mux0X( mk_amd64g_calculate_condition(cond),
- mkexpr(tmpd),
- mkexpr(tmps) )
+ IRExpr_ITE( mk_amd64g_calculate_condition(cond),
+ mkexpr(tmps),
+ mkexpr(tmpd) )
);
DIP("cmov%s %s,%s\n", name_AMD64Condcode(cond),
@@ -8822,20 +8822,20 @@
if (shl || shr) {
assign(
g1,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U, mkexpr(amt), mkU64(size)),
- mkV128(0x0000),
- binop(op, mkexpr(g0), mkexpr(amt8))
+ binop(op, mkexpr(g0), mkexpr(amt8)),
+ mkV128(0x0000)
)
);
} else
if (sar) {
assign(
g1,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U, mkexpr(amt), mkU64(size)),
- binop(op, mkexpr(g0), mkU8(size-1)),
- binop(op, mkexpr(g0), mkexpr(amt8))
+ binop(op, mkexpr(g0), mkexpr(amt8)),
+ binop(op, mkexpr(g0), mkU8(size-1))
)
);
} else {
@@ -16909,9 +16909,9 @@
IRTemp validL = newTemp(Ity_I32);
assign(validL, binop(Iop_Sub32,
- IRExpr_Mux0X(mkexpr(zmaskL_zero),
- mkU32(0),
- binop(Iop_Shl32, mkU32(1), ctzL)),
+ IRExpr_ITE(mkexpr(zmaskL_zero),
+ binop(Iop_Shl32, mkU32(1), ctzL),
+ mkU32(0)),
mkU32(1)));
/* And similarly for validR. */
@@ -16920,9 +16920,9 @@
assign(zmaskR_zero, binop(Iop_ExpCmpNE32, mkexpr(zmaskR), mkU32(0)));
IRTemp validR = newTemp(Ity_I32);
assign(validR, binop(Iop_Sub32,
- IRExpr_Mux0X(mkexpr(zmaskR_zero),
- mkU32(0),
- binop(Iop_Shl32, mkU32(1), ctzR)),
+ IRExpr_ITE(mkexpr(zmaskR_zero),
+ binop(Iop_Shl32, mkU32(1), ctzR),
+ mkU32(0)),
mkU32(1)));
/* Do the actual comparison. */
@@ -16962,18 +16962,18 @@
/* Now for the condition codes... */
/* C == 0 iff intRes2 == 0 */
- IRExpr *c_bit = IRExpr_Mux0X( binop(Iop_ExpCmpNE32, mkexpr(intRes2),
- mkU32(0)),
- mkU32(0),
- mkU32(1 << AMD64G_CC_SHIFT_C) );
+ IRExpr *c_bit = IRExpr_ITE( binop(Iop_ExpCmpNE32, mkexpr(intRes2),
+ mkU32(0)),
+ mkU32(1 << AMD64G_CC_SHIFT_C),
+ mkU32(0));
/* Z == 1 iff any in argL is 0 */
- IRExpr *z_bit = IRExpr_Mux0X( mkexpr(zmaskL_zero),
- mkU32(0),
- mkU32(1 << AMD64G_CC_SHIFT_Z) );
+ IRExpr *z_bit = IRExpr_ITE( mkexpr(zmaskL_zero),
+ mkU32(1 << AMD64G_CC_SHIFT_Z),
+ mkU32(0));
/* S == 1 iff any in argR is 0 */
- IRExpr *s_bit = IRExpr_Mux0X( mkexpr(zmaskR_zero),
- mkU32(0),
- mkU32(1 << AMD64G_CC_SHIFT_S) );
+ IRExpr *s_bit = IRExpr_ITE( mkexpr(zmaskR_zero),
+ mkU32(1 << AMD64G_CC_SHIFT_S),
+ mkU32(0));
/* O == IntRes2[0] */
IRExpr *o_bit = binop(Iop_Shl32, binop(Iop_And32, mkexpr(intRes2),
mkU32(0x01)),
@@ -18912,37 +18912,37 @@
If zero, put 1 in OFFB_DFLAG, else -1 in OFFB_DFLAG. */
stmt( IRStmt_Put(
OFFB_DFLAG,
- IRExpr_Mux0X(
+ IRExpr_ITE(
unop(Iop_64to1,
binop(Iop_And64,
binop(Iop_Shr64, mkexpr(t1), mkU8(10)),
mkU64(1))),
- mkU64(1),
- mkU64(0xFFFFFFFFFFFFFFFFULL)))
+ mkU64(0xFFFFFFFFFFFFFFFFULL),
+ mkU64(1)))
);
/* And set the ID flag */
stmt( IRStmt_Put(
OFFB_IDFLAG,
- IRExpr_Mux0X(
+ IRExpr_ITE(
unop(Iop_64to1,
binop(Iop_And64,
binop(Iop_Shr64, mkexpr(t1), mkU8(21)),
mkU64(1))),
- mkU64(0),
- mkU64(1)))
+ mkU64(1),
+ mkU64(0)))
);
/* And set the AC flag too */
stmt( IRStmt_Put(
OFFB_ACFLAG,
- IRExpr_Mux0X(
+ IRExpr_ITE(
unop(Iop_64to1,
binop(Iop_And64,
binop(Iop_Shr64, mkexpr(t1), mkU8(18)),
mkU64(1))),
- mkU64(0),
- mkU64(1)))
+ mkU64(1),
+ mkU64(0)))
);
DIP("popf%c\n", nameISize(sz));
@@ -20344,16 +20344,16 @@
expdHi64:expdLo64, even if we're doing a cmpxchg8b. */
/* It's just _so_ much fun ... */
putIRegRDX( 8,
- IRExpr_Mux0X( mkexpr(success),
- sz == 4 ? unop(Iop_32Uto64, mkexpr(oldHi))
- : mkexpr(oldHi),
- mkexpr(expdHi64)
+ IRExpr_ITE( mkexpr(success),
+ mkexpr(expdHi64),
+ sz == 4 ? unop(Iop_32Uto64, mkexpr(oldHi))
+ : mkexpr(oldHi)
));
putIRegRAX( 8,
- IRExpr_Mux0X( mkexpr(success),
- sz == 4 ? unop(Iop_32Uto64, mkexpr(oldLo))
- : mkexpr(oldLo),
- mkexpr(expdLo64)
+ IRExpr_ITE( mkexpr(success),
+ mkexpr(expdLo64),
+ sz == 4 ? unop(Iop_32Uto64, mkexpr(oldLo))
+ : mkexpr(oldLo)
));
/* Copy the success bit into the Z flag and leave the others
@@ -20838,20 +20838,20 @@
if (shl || shr) {
assign(
g1,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U, mkexpr(amt), mkU64(size)),
- mkV128(0x0000),
- binop(op, mkexpr(g0), mkexpr(amt8))
+ binop(op, mkexpr(g0), mkexpr(amt8)),
+ mkV128(0x0000)
)
);
} else
if (sar) {
assign(
g1,
- IRExpr_Mux0X(
+ IRExpr_ITE(
binop(Iop_CmpLT64U, mkexpr(amt), mkU64(size)),
- binop(op, mkexpr(g0), mkU8(size-1)),
- binop(op, mkexpr(g0), mkexpr(amt8))
+ binop(op, mkexpr(g0), mkexpr(amt8)),
+ binop(op, mkexpr(g0), mkU8(size-1))
)
);
} else {
@@ -24620,13 +24620,13 @@
breakupV128to64s( dataV, &dHi, &dLo );
breakupV128to64s( ctrlV, &cHi, &cLo );
IRExpr* rHi
- = IRExpr_Mux0X( unop(Iop_64to1,
- binop(Iop_Shr64, mkexpr(cHi), mkU8(1))),
- mkexpr(dLo), mkexpr(dHi) );
+ = IRExpr_ITE( unop(Iop_64to1,
+ binop(Iop_Shr64,...
[truncated message content] |