[Valgrind-developers] valgrind: r12817: Back off from 32 alignment of various guest state bits. We don't

[<sv...@va...>]

sewardj	2012-08-02 23:08:53 +0100 (Thu, 02 Aug 2012)

  New Revision: 12817

  Log:
    Back off from 32 alignment of various guest state bits.  We don't
    actually need it, and gcc on MacOS simply fails (for whatever reason)
    to actually honour requests for 32 alignment, and fall back to the
    previous setting (16 alignment).

  Modified files:
    trunk/coregrind/m_scheduler/scheduler.c
    trunk/coregrind/m_threadstate.c
    trunk/coregrind/pub_core_threadstate.h


  Modified: trunk/coregrind/m_threadstate.c (+1 -1)
===================================================================
--- trunk/coregrind/m_threadstate.c	2012-08-02 22:01:13 +01:00 (rev 12816)
+++ trunk/coregrind/m_threadstate.c	2012-08-02 23:08:53 +01:00 (rev 12817)
@@ -44,7 +44,7 @@
 
 ThreadId VG_(running_tid) = VG_INVALID_THREADID;
 
-ThreadState VG_(threads)[VG_N_THREADS] __attribute__((aligned(32)));
+ThreadState VG_(threads)[VG_N_THREADS] __attribute__((aligned(16)));
 
 /*------------------------------------------------------------*/
 /*--- Operations.                                          ---*/

  Modified: trunk/coregrind/pub_core_threadstate.h (+5 -5)
===================================================================
--- trunk/coregrind/pub_core_threadstate.h	2012-08-02 22:01:13 +01:00 (rev 12816)
+++ trunk/coregrind/pub_core_threadstate.h	2012-08-02 23:08:53 +01:00 (rev 12817)
@@ -104,19 +104,19 @@
 
       /* Note that for code generation reasons, we require that the
          guest state area, its two shadows, and the spill area, are
-         32-aligned and have 32-aligned sizes, and there are no holes
+         16-aligned and have 16-aligned sizes, and there are no holes
          in between.  This is checked by do_pre_run_checks() in
          scheduler.c. */
 
       /* Saved machine context. */
-      VexGuestArchState vex __attribute__((aligned(32)));
+      VexGuestArchState vex __attribute__((aligned(16)));
 
       /* Saved shadow context (2 copies). */
-      VexGuestArchState vex_shadow1 __attribute__((aligned(32)));
-      VexGuestArchState vex_shadow2 __attribute__((aligned(32)));
+      VexGuestArchState vex_shadow1 __attribute__((aligned(16)));
+      VexGuestArchState vex_shadow2 __attribute__((aligned(16)));
 
       /* Spill area. */
-      UChar vex_spill[LibVEX_N_SPILL_BYTES] __attribute__((aligned(32)));
+      UChar vex_spill[LibVEX_N_SPILL_BYTES] __attribute__((aligned(16)));
 
       /* --- END vex-mandated guest state --- */
    } 

  Modified: trunk/coregrind/m_scheduler/scheduler.c (+9 -9)
===================================================================
--- trunk/coregrind/m_scheduler/scheduler.c	2012-08-02 22:01:13 +01:00 (rev 12816)
+++ trunk/coregrind/m_scheduler/scheduler.c	2012-08-02 23:08:53 +01:00 (rev 12817)
@@ -699,15 +699,15 @@
                (void*)a_vexsh2, sz_vexsh2,
                (void*)a_spill, sz_spill );
 
-   vg_assert(VG_IS_32_ALIGNED(sz_vex));
-   vg_assert(VG_IS_32_ALIGNED(sz_vexsh1));
-   vg_assert(VG_IS_32_ALIGNED(sz_vexsh2));
-   vg_assert(VG_IS_32_ALIGNED(sz_spill));
+   vg_assert(VG_IS_16_ALIGNED(sz_vex));
+   vg_assert(VG_IS_16_ALIGNED(sz_vexsh1));
+   vg_assert(VG_IS_16_ALIGNED(sz_vexsh2));
+   vg_assert(VG_IS_16_ALIGNED(sz_spill));
 
-   vg_assert(VG_IS_32_ALIGNED(a_vex));
-   vg_assert(VG_IS_32_ALIGNED(a_vexsh1));
-   vg_assert(VG_IS_32_ALIGNED(a_vexsh2));
-   vg_assert(VG_IS_32_ALIGNED(a_spill));
+   vg_assert(VG_IS_16_ALIGNED(a_vex));
+   vg_assert(VG_IS_16_ALIGNED(a_vexsh1));
+   vg_assert(VG_IS_16_ALIGNED(a_vexsh2));
+   vg_assert(VG_IS_16_ALIGNED(a_spill));
 
    /* Check that the guest state and its two shadows have the same
       size, and that there are no holes in between.  The latter is
@@ -746,7 +746,7 @@
        - offsetof(VexGuestAMD64State,guest_YMM0))
       == (17/*#regs*/-1) * 32/*bytes per reg*/
    );
-   vg_assert(VG_IS_32_ALIGNED(offsetof(VexGuestAMD64State,guest_YMM0)));
+   vg_assert(VG_IS_16_ALIGNED(offsetof(VexGuestAMD64State,guest_YMM0)));
    vg_assert(VG_IS_8_ALIGNED(offsetof(VexGuestAMD64State,guest_FPREG)));
    vg_assert(16 == offsetof(VexGuestAMD64State,guest_RAX));
    vg_assert(VG_IS_8_ALIGNED(offsetof(VexGuestAMD64State,guest_RAX)));