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From: <sv...@va...> - 2012-06-22 13:44:12
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petarj 2012-06-22 14:44:04 +0100 (Fri, 22 Jun 2012)
New Revision: 12661
Log:
Initializing destination reg for MoveIns test for MIPS.
The test none/tests/mips32/MoveIns.c did not initialize destination register,
and that is important for movn.s and movn.d instructions. This improves the
test as we will get the same stdout with different compilers and options now.
Modified files:
trunk/none/tests/mips32/MoveIns.c
trunk/none/tests/mips32/MoveIns.stdout.exp
trunk/none/tests/mips32/MoveIns.stdout.exp-BE
Modified: trunk/none/tests/mips32/MoveIns.stdout.exp (+24 -24)
===================================================================
--- trunk/none/tests/mips32/MoveIns.stdout.exp 2012-06-22 10:34:58 +01:00 (rev 12660)
+++ trunk/none/tests/mips32/MoveIns.stdout.exp 2012-06-22 14:44:04 +01:00 (rev 12661)
@@ -190,36 +190,36 @@
movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
movf.d $f4, $f6, $fcc0 :: out: 0x3ff00000 0x0, cc: 0
MOVN.S
-movn.s $f0, $f2, $t3 :: fs rt 0x1
+movn.s $f0, $f2, $t3 :: fs rt 0x0
movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.s $f0, $f2, $t3 :: fs rt 0x40400000
movn.s $f0, $f2, $t3 :: fs rt 0xbf800000
movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
movn.s $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
movn.s $f0, $f2, $t3 :: fs rt 0x44db0000
movn.s $f0, $f2, $t3 :: fs rt 0x3b210e02
movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.s $f0, $f2, $t3 :: fs rt 0x42080079
movn.s $f0, $f2, $t3 :: fs rt 0x4732da7a
MOVN.D
-movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
+movn.d $f0, $f2, $t3 :: fs rt 0x0
movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.d $f0, $f2, $t3 :: fs rt 0x40400000
movn.d $f0, $f2, $t3 :: fs rt 0xbf800000
movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
movn.d $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
movn.d $f0, $f2, $t3 :: fs rt 0x44db0000
movn.d $f0, $f2, $t3 :: fs rt 0x3b210e02
movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.d $f0, $f2, $t3 :: fs rt 0x42080079
movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
@@ -311,15 +311,15 @@
movz.s $f0, $f2, $t3 :: fs rt 0xc0e96d19
movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
movz.s $f0, $f2, $t3 :: fs rt 0xc872bcb1
movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
MOVZ.D
movz.d $f0, $f2, $t3 :: fs rt 0x0
movz.d $f0, $f2, $t3 :: fs rt 0x0
@@ -328,12 +328,12 @@
movz.d $f0, $f2, $t3 :: fs rt 0x0
movz.d $f0, $f2, $t3 :: fs rt 0xc0e96d19
movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
movz.d $f0, $f2, $t3 :: fs rt 0xc872bcb1
movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
Modified: trunk/none/tests/mips32/MoveIns.stdout.exp-BE (+24 -24)
===================================================================
--- trunk/none/tests/mips32/MoveIns.stdout.exp-BE 2012-06-22 10:34:58 +01:00 (rev 12660)
+++ trunk/none/tests/mips32/MoveIns.stdout.exp-BE 2012-06-22 14:44:04 +01:00 (rev 12661)
@@ -190,36 +190,36 @@
movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
movf.d $f4, $f6, $fcc0 :: out: 0x0 0x3ff00000, cc: 0
MOVN.S
-movn.s $f0, $f2, $t3 :: fs rt 0x1
+movn.s $f0, $f2, $t3 :: fs rt 0x0
movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.s $f0, $f2, $t3 :: fs rt 0x40400000
movn.s $f0, $f2, $t3 :: fs rt 0xbf800000
movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
movn.s $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
movn.s $f0, $f2, $t3 :: fs rt 0x44db0000
movn.s $f0, $f2, $t3 :: fs rt 0x3b210e02
movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.s $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.s $f0, $f2, $t3 :: fs rt 0x0
+movn.s $f0, $f2, $t3 :: fs rt 0x0
movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.s $f0, $f2, $t3 :: fs rt 0x42080079
movn.s $f0, $f2, $t3 :: fs rt 0x4732da7a
MOVN.D
-movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
+movn.d $f0, $f2, $t3 :: fs rt 0x0
movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.d $f0, $f2, $t3 :: fs rt 0x40400000
movn.d $f0, $f2, $t3 :: fs rt 0xbf800000
movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
-movn.d $f0, $f2, $t3 :: fs rt 0x44ad1333
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
movn.d $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
movn.d $f0, $f2, $t3 :: fs rt 0x44db0000
movn.d $f0, $f2, $t3 :: fs rt 0x3b210e02
movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
-movn.d $f0, $f2, $t3 :: fs rt 0x322bcc77
+movn.d $f0, $f2, $t3 :: fs rt 0x0
+movn.d $f0, $f2, $t3 :: fs rt 0x0
movn.d $f0, $f2, $t3 :: fs rt 0x43e41fde
movn.d $f0, $f2, $t3 :: fs rt 0x42080079
movn.d $f0, $f2, $t3 :: fs rt 0x4732da7a
@@ -311,15 +311,15 @@
movz.s $f0, $f2, $t3 :: fs rt 0xc0e96d19
movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.s $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
movz.s $f0, $f2, $t3 :: fs rt 0xc872bcb1
movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.s $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
+movz.s $f0, $f2, $t3 :: fs rt 0x0
MOVZ.D
movz.d $f0, $f2, $t3 :: fs rt 0x0
movz.d $f0, $f2, $t3 :: fs rt 0x0
@@ -328,12 +328,12 @@
movz.d $f0, $f2, $t3 :: fs rt 0x0
movz.d $f0, $f2, $t3 :: fs rt 0xc0e96d19
movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
-movz.d $f0, $f2, $t3 :: fs rt 0x4e6e6b28
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
movz.d $f0, $f2, $t3 :: fs rt 0xc872bcb1
movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
-movz.d $f0, $f2, $t3 :: fs rt 0xc732da7a
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
+movz.d $f0, $f2, $t3 :: fs rt 0x0
Modified: trunk/none/tests/mips32/MoveIns.c (+3 -0)
===================================================================
--- trunk/none/tests/mips32/MoveIns.c 2012-06-22 10:34:58 +01:00 (rev 12660)
+++ trunk/none/tests/mips32/MoveIns.c 2012-06-22 14:44:04 +01:00 (rev 12661)
@@ -214,6 +214,7 @@
"move $" #RT ", %3\n\t" \
"move $t0, %2\n\t" \
"lwc1 $" #FS ", "#offset"($t0)\n\t" \
+ "mtc1 $0, $" #FD "\n\t" \
instruction "\n\t" \
"mov.s %0, $" #FD"\n\t" \
"mfc1 %1, $" #FD"\n\t" \
@@ -234,6 +235,8 @@
"move $" #RT ", %3\n\t" \
"move $t0, %2\n\t" \
"ldc1 $" #FS ", "#offset"($t0)\n\t" \
+ "mtc1 $0, $" #FD "\n\t" \
+ "mtc1 $0, $" #FD + 1"\n\t" \
instruction "\n\t" \
"mov.d %0, $" #FD"\n\t" \
"mfc1 %1, $" #FD"\n\t" \
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